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From: <sv...@ed...> - 2011-06-03 12:52:45
|
Revision: 614
https://www.edumips.org/changeset/614
Author: lupino3
Date: 2011-06-03 14:52:38 +0200 (Fri, 03 Jun 2011)
Log Message:
-----------
Fixed the order of the biographies
Modified Paths:
--------------
paper/ieee-tedu/bios.tex
Modified: paper/ieee-tedu/bios.tex
===================================================================
--- paper/ieee-tedu/bios.tex 2011-06-03 12:48:42 UTC (rev 613)
+++ paper/ieee-tedu/bios.tex 2011-06-03 12:52:38 UTC (rev 614)
@@ -1,11 +1,3 @@
-\begin{biographynophoto}{Andrea Spadaccini} (GSM'11) received the M.S. degree
- with honors in Computer Engineering in 2008 from the University of Catania,
- Italy, where he is currently a Ph.D. candidate. He is the project leader of
- EduMIPS64 and one of its core developers. His research activity is focused
- on biometric recognition, novel biometrics, speaker recognition and signal
- processing.
-\end{biographynophoto}
-
\begin{biographynophoto}{Davide Patti} (M'06)
Davide Patti received the Laurea degree and the Ph.D. degree in
computer engineering at University of Catania, in 2003 and 2007,
@@ -15,6 +7,14 @@
and Network-on-Chip architectures.
\end{biographynophoto}
+\begin{biographynophoto}{Andrea Spadaccini} (GSM'11) received the M.S. degree
+ with honors in Computer Engineering in 2008 from the University of Catania,
+ Italy, where he is currently a Ph.D. candidate. He is the project leader of
+ EduMIPS64 and one of its core developers. His research activity is focused
+ on biometric recognition, novel biometrics, speaker recognition and signal
+ processing.
+\end{biographynophoto}
+
\begin{biographynophoto}{Maurizio
Palesi} (M'06) received the M.S. and Ph.D. degrees in computer
engineering from the Universit\`a di Catania, Catania, Italy, in
|
|
From: <sv...@ed...> - 2011-06-03 12:48:50
|
Revision: 613
https://www.edumips.org/changeset/613
Author: lupino3
Date: 2011-06-03 14:48:42 +0200 (Fri, 03 Jun 2011)
Log Message:
-----------
Fixed 1k typo
Modified Paths:
--------------
paper/ieee-tedu/conclusions.tex
paper/ieee-tedu/paper.tex
paper/ieee-tedu/related-works.tex
paper/ieee-tedu/survey.tex
paper/ieee-tedu/teaching.tex
Modified: paper/ieee-tedu/conclusions.tex
===================================================================
--- paper/ieee-tedu/conclusions.tex 2011-06-03 11:19:00 UTC (rev 612)
+++ paper/ieee-tedu/conclusions.tex 2011-06-03 12:48:42 UTC (rev 613)
@@ -13,4 +13,4 @@
We evaluated the impact of the adoption of the simulator on the teaching
process by means of a survey compiled by students after the completion of the
course; thanks to this feedback, we found that \EM{} is perceived as a good
-educational aid, and spotted its strengths and weaknessess.
+educational aid, and spotted its strengths and weaknesses.
Modified: paper/ieee-tedu/paper.tex
===================================================================
--- paper/ieee-tedu/paper.tex 2011-06-03 11:19:00 UTC (rev 612)
+++ paper/ieee-tedu/paper.tex 2011-06-03 12:48:42 UTC (rev 613)
@@ -67,9 +67,9 @@
\title{Supporting Undergraduate Computer Architecture Students using a Visual
MIPS64 CPU Simulator}
-\author{Andrea Spadaccini, \emph{Student Member, IEEE}, Davide Patti,
-\emph{Member, IEEE}, Maurizio Palesi, \emph{Member, IEEE}
-and Fabrizio Fazzino, \emph{Member, IEEE}\thanks{A. Spadaccini and D. Patti are with the Dipartimento di
+\author{Davide~Patti,~\emph{Member,~IEEE}, Andrea~Spadaccini,~\emph{Graduate~Student~Member,~IEEE},
+Maurizio~Palesi,~\emph{Member,~IEEE}, Fabrizio~Fazzino,~\emph{Member,~IEEE}
+and Vincenzo~Catania\thanks{D. Patti, A. Spadaccini and V. Catania are with the Dipartimento di
Ingegneria Elettrica, Elettronica ed Informatica, University of
Catania, Catania, Italy (email:
\{andrea.spadaccini,davide.patti\}@dieei.unict.it).
Modified: paper/ieee-tedu/related-works.tex
===================================================================
--- paper/ieee-tedu/related-works.tex 2011-06-03 11:19:00 UTC (rev 612)
+++ paper/ieee-tedu/related-works.tex 2011-06-03 12:48:42 UTC (rev 613)
@@ -1,10 +1,10 @@
\section{Related Works}
\label{sec:related-works}
-Several different tools and methologies have been adopted
+Several different tools and methodologies have been adopted
in order to enhance the learning process of the basic concepts of
CPU organization usually taught in introductory Computer Architecture courses.
-Some approaches focuse on the adopted framework (e.g.
+Some approaches focus on the adopted framework (e.g.
simulators, web-based learning, games), while others try to exploit the positive
effect of collaborative projects in improving students' motivation.
@@ -15,11 +15,11 @@
produced.
An educational experience of teaching computer architecture topics
using a project-based learning is described and evaluated
-in~\cite{Martinez-Mones2005}. The main idea is using a collaborative approch
+in~\cite{Martinez-Mones2005}. The main idea is using a collaborative approach
where students are assigned to different subprojects but still have to
exchange some acquired knowledge in order to complete their tasks.
Authors of~\cite{Verginis2011} present a web-based environment to
-support the learning process in introductory conputer science course
+support the learning process in introductory computer science course
using a customizable e-learning approach.
%tool oriented
@@ -36,5 +36,5 @@
Computer Architecture and Engineering to teach some topics related to
the tuning of cache parameters with the aim of optimizing performance and energy
consumption. In~\cite{Sahuquillo2007} authors present a pedagogical
-tool for dealing with code-based exercises expressely focused on cache
+tool for dealing with code-based exercises expressly focused on cache
memory related topics.
Modified: paper/ieee-tedu/survey.tex
===================================================================
--- paper/ieee-tedu/survey.tex 2011-06-03 11:19:00 UTC (rev 612)
+++ paper/ieee-tedu/survey.tex 2011-06-03 12:48:42 UTC (rev 613)
@@ -31,11 +31,11 @@
Summarizing these results, it can definitely be assumed that the choice of using Java
as a cross-platform technology did not penalize the user-experience from
both the performance and visual points of view, since only a
-neglegible fraction of the users rated \EM{} as less than sufficient.
+negligible fraction of the users rated \EM{} as less than sufficient.
\subsection{Impact on Learning}
The percent of the time spent by the students on \EM{} is an indicator
-of the role played by the laboratory-based methology in the course. Only a small percentage of
+of the role played by the laboratory-based methodology in the course. Only a small percentage of
them, less than $8\%$, used \EM{} for less than 10\% of the time
period ranging from the beginning of the course to the exam. About
$20\%$ of them used \EM{} for the $20\%-30\%$ of the time, whereas the
@@ -50,7 +50,8 @@
\end{figure}
An interesting issue to investigate was the impact of the adopted
methodology on the understanding of the different topics encountered during the
-course. Note that some topics that are usually strictly related to the theoric
+course. Note that some topics that are usually strictly related to the
+theoretical
part of a computer architecture course were deliberately included, in order to
capture more accurately to which extent, even indirectly, the
adoption of \EM{} can affect the learning process and the students'
@@ -59,6 +60,6 @@
different power) all the topics presented in our survey: it can
be observed an obvious predominance of topics like
registers and data encoding - due to bit-accurate encoding
-- and the assembly programming and pipelining, positevely
+- and the assembly programming and pipelining, positively
impacted by the visual representation of the CPU during the execution of
instructions flow.
Modified: paper/ieee-tedu/teaching.tex
===================================================================
--- paper/ieee-tedu/teaching.tex 2011-06-03 11:19:00 UTC (rev 612)
+++ paper/ieee-tedu/teaching.tex 2011-06-03 12:48:42 UTC (rev 613)
@@ -32,7 +32,7 @@
will not only require the teacher to explain the fundamental concepts of
instruction-set architectures and assembly language, but also hexadecimal number conversions,
instruction encoding (with the three main types: R-type, I-type and J-type)
-and even the concept of endianess (ordering of byte in words into memory).
+and even the concept of endianness (ordering of byte in words into memory).
So, a first step with \EM{} should be to show how an assembly source
file written following a MIPS-like syntax is loaded into memory and
@@ -57,7 +57,7 @@
\item \emph{Maximize the memory encoding window and highlight some lines, then
try to find the corresponding snippet of code in the text editor.}
\item \emph{Choose one of the lines in the memory or code window of \EM{}
-and try to explain the meaning of the exadecimal value associated to
+and try to explain the meaning of the hexadecimal value associated to
them.}
\end{itemize}
@@ -152,7 +152,7 @@
\EM{}. There are two main classes of assignments that involve the usage of the
\texttt{SYSCALL} instruction:
\begin{itemize}
-\item Assigments that test the students' ability to put properly the inputs
+\item Assignments that test the students' ability to put properly the inputs
of the \texttt{SYSCALL} in the \texttt{.data} section and then get the outputs when
the \texttt{SYSCALL} has ended
\item Assignments that stress the usage of \texttt{SYSCALL}
@@ -201,7 +201,7 @@
total time affected by the enhancement and $S_{e}$ the speedup of the improved
part of the system.
-Using \EM{} in conjuction with DineroIV,
+Using \EM{} in conjunction with DineroIV,
simple assignments can be designed in order to help students to
understand how the overall performance of the system is governed by
the slowest component.
@@ -210,9 +210,9 @@
\begin{itemize}
\item Assignments that ask them to compute which will be the
speedup of the system if a particular component improves its
-perfomances, in other words, the direct usage of Amdahl's law in order
+performances, in other words, the direct usage of Amdahl's law in order
to compute $S_{overall}$ from a given $F_e$ and $S_e$.
-\item Assignments that ask students to find which would be the
+\item Assignments that ask students to find which would be
the required $S_e$ of a particular component in order to achieve a
global overall system speedup. This is an inverse usage of
Amdahl's law, that is, finding $S_e$ from a given desired
@@ -223,16 +223,16 @@
\begin{itemize}
\item \emph{Starting from the results obtained when executing a given MIPS64 program
code on separated instruction and data caches, compute which overall
-speedup would be achieved if the L1D data cache had only half of the
+speedup would be achieved if the L1 data cache had only half of the
previously reported demand misses.}
\item \emph{Starting from the results obtained when executing your program
-code on unified L1 cache memory, find which miss penality would be
+code on unified L1 cache memory, find which miss penalty would be
needed to get and overall system speedup of $30\%$ in performance.}
\end{itemize}
-Both assigments stress students' ability to compute quantitatively the
+Both assignments stress students' ability to compute quantitatively the
correct $F_e$ from execution statistics. A very interesting feature is
present in the second category, which can result in a negative value
for $S_e$; this is useful to make the students understand that
-sometimes a desidered speedup cannot be obtained, no matter how big is the
+sometimes a desired speedup cannot be obtained, no matter how big is the
$S_e$ of the component improved.
|
|
From: <sv...@ed...> - 2011-06-03 11:19:08
|
Revision: 612
https://www.edumips.org/changeset/612
Author: dpatti
Date: 2011-06-03 13:19:00 +0200 (Fri, 03 Jun 2011)
Log Message:
-----------
Fixed typo
Modified Paths:
--------------
paper/ieee-tedu/survey.tex
Modified: paper/ieee-tedu/survey.tex
===================================================================
--- paper/ieee-tedu/survey.tex 2011-06-03 11:13:11 UTC (rev 611)
+++ paper/ieee-tedu/survey.tex 2011-06-03 11:19:00 UTC (rev 612)
@@ -50,7 +50,7 @@
\end{figure}
An interesting issue to investigate was the impact of the adopted
methodology on the understanding of the different topics encountered during the
-course. Note that some topics that are usually strictly relathed to the theoric
+course. Note that some topics that are usually strictly related to the theoric
part of a computer architecture course were deliberately included, in order to
capture more accurately to which extent, even indirectly, the
adoption of \EM{} can affect the learning process and the students'
|
|
From: <sv...@ed...> - 2011-06-03 11:13:19
|
Revision: 611
https://www.edumips.org/changeset/611
Author: lupino3
Date: 2011-06-03 13:13:11 +0200 (Fri, 03 Jun 2011)
Log Message:
-----------
Fixed FF's bio; wrote 90% of the Conclusions section, that still needs a conclusive statement.
Modified Paths:
--------------
paper/ieee-tedu/bios.tex
paper/ieee-tedu/conclusions.tex
Modified: paper/ieee-tedu/bios.tex
===================================================================
--- paper/ieee-tedu/bios.tex 2011-06-03 11:05:03 UTC (rev 610)
+++ paper/ieee-tedu/bios.tex 2011-06-03 11:13:11 UTC (rev 611)
@@ -41,7 +41,7 @@
responsible for the functional verification of 32-bit lines of
microprocessors at STMicroelectronics. Since 2004 he collaborates
with the Department of Computer and Telecommunications
- Engineering. He is Silicon Engineer at Icera Inc., Bristol (UK).
+ Engineering. He is Silicon Engineer at Icera Inc, Bristol (UK).
\end{biographynophoto}
\begin{biographynophoto}{Vincenzo
Modified: paper/ieee-tedu/conclusions.tex
===================================================================
--- paper/ieee-tedu/conclusions.tex 2011-06-03 11:05:03 UTC (rev 610)
+++ paper/ieee-tedu/conclusions.tex 2011-06-03 11:13:11 UTC (rev 611)
@@ -1,30 +1,16 @@
\section{Conclusions}
\label{sec:conclusions}
-In this paper we have presented \EM{}, a platform-independent MIPS64
-Instruction-Set Simulator conceived with the aim of introducing
-students of computer science disciplines in understanding the basic
-principles which govern RISC-based computing architectures. We have
-shown how \EM{} represents a viable tool for both students and
-teachers. The first can take advantage of an effective user interface,
-to rapidly learn how instructions are executed, how bubbles propagate
-into the pipeline, how forwarding helps to reduce data hazards, and
-how memory hierarchy impacts on overall system performance. On the
-other front, teachers can visually and easily transmit important
-concepts like code optimization by means of instruction re-ordering
-and make it natural the acquisition of the design practice based on
-the quatitative approach.
+Computer Architecture and Organization is one of the core topics that a solid
+Computer engineer needs to master in order to be successful. This paper
+presented the outline of an undergraduate-level Computer Architecture course
+that adopts as the main educational tool a visual, free and
+platform-independent MIPS64 Instruction-Set Simulator called \EM{}.
-We evaluated the impact of the adoption of the simulator on the teaching
-process, from both the teachers' and the students' point of view; thanks to
-this feedback, we found that \EM{} is perceived as a good educational aid,
-and spotted its strengths and weaknessess.
+The features of the simulator and its user-friendly interface allowed for its
+adoption as the main tool of the course, and several assignments and teaching
+processes that revolve around it have been described.
-In addition to the features already described in this paper, other features
-are being developed, tested and integrated in the simulator; the most
-important ones are the support for floating point instructions and registers,
-the implementation of the branch delay slot, and the development of a cache
-simulator.
-
-Future research activity will need to be addressed towards the release of new
-versions of the simulator and on the continuous evaluation of its
-effectiveness for students and teachers of Computer Architecture courses.
+We evaluated the impact of the adoption of the simulator on the teaching
+process by means of a survey compiled by students after the completion of the
+course; thanks to this feedback, we found that \EM{} is perceived as a good
+educational aid, and spotted its strengths and weaknessess.
|
|
From: <sv...@ed...> - 2011-06-03 11:05:10
|
Revision: 610
https://www.edumips.org/changeset/610
Author: lupino3
Date: 2011-06-03 13:05:03 +0200 (Fri, 03 Jun 2011)
Log Message:
-----------
Removed subjective statement from the Teaching section; small changes to the Assessment section.
Modified Paths:
--------------
paper/ieee-tedu/survey.tex
paper/ieee-tedu/teaching.tex
Modified: paper/ieee-tedu/survey.tex
===================================================================
--- paper/ieee-tedu/survey.tex 2011-06-03 10:47:09 UTC (rev 609)
+++ paper/ieee-tedu/survey.tex 2011-06-03 11:05:03 UTC (rev 610)
@@ -1,21 +1,16 @@
\section{Assessment Survey and Evaluation}
\label{sec:survey}
-
-A survey was conducted to obtain feedback from both students and
-teacher after completion of their course, with aim to receive a
-feedback on the effectiveness of the adopeted methodology.
+A survey was conducted in order to obtain feedback on the effectiveness of the
+adopted methodology from the students, after the completion of the course.
The survey was designed to investigate the following areas:
\begin{itemize}
\item {\bf Simulation environment:} issues regarding the easiness of use
-of the adopted tool, i.e. the user interface, the learning curve to
-face when learning the \EM{} simulator, the consistency and
+of the adopted tool, i.e. the user interface, the learning curve
+faced when learning the \EM{} simulator, the consistency and
readability the whole learning environment.
-%\item {\bf Impact on teaching:} how the used methodology
-%influences the course organization, the way the different topics are
-%addressed, the effort for teacher, the hardware equipment required.
-\item {\bf Impact on learning:} investigate how \EM{} can improve their
-ability to understand topics, increasing their motivation to learn.
+\item {\bf Impact on learning:} investigate how \EM{} was effective in helping
+ them understand the course topics, increasing their motivation to learn.
\end{itemize}
Two online forms were created, involving a total of 93 students belonging to
@@ -24,32 +19,20 @@
\subsection{Simulation environment}
Usability and easiness of use are one of the main reasons behind the
-adoption of the \EM{} project as simulation environment. A first aspect that was investigated is the general
+adoption of the \EM{} project as the course's simulation environment. A first aspect that was investigated is the general
speed/responsiveness of the simulator that, because of running on an high-level
-Java virtual machine could suffer some performance/memory usage
+Java virtual machine could suffer of some performance/memory usage
issues. However, $19\%$ of users evaluated as excellent the
performance of the simulator and $60\%$ of them considered it good, while
$18\%$ think that it was sufficient and
$3\%$ considered it poor. The graphical user interface of \EM{} was evaluated
-excellent from $60\%$ of users, $20\%$ found it good while the
+as excellent by $60\%$ of users, $20\%$ of them found it good while the
remaining $19\%$ and $1\%$ sufficient and poor respectively.
Summarizing these results, it can definitely be assumed that the choice of using Java
as a cross-platform technology did not penalize the user-experience from
both the performance and visual points of view, since only a
-neglegible fraction of the users rated \EM{} less than sufficient.
+neglegible fraction of the users rated \EM{} as less than sufficient.
-%\subsection{Impact on teaching}
-%
-%The number of teachers ($6$ in total) that have been using \EM{} is
-%obviously much smaller than the number of students, nevertheless it was
-%considered useful to investigate some aspects from the teacher's
-%perspective. The results confirmed that the similarity to WinMIPS/WinDLX was one of
-%the main reason for switching to \EM{}, while the total amount of time
-%of \EM{} usage during the course is quite inhomogeneous, since it will
-%likely depend on the course organization. Some missing features of \EM{}
-%have also been reported, such as an integrated text editor for writing code,
-%an internal cache simulator and some missing instructions from the MIPS ISA.
-
\subsection{Impact on Learning}
The percent of the time spent by the students on \EM{} is an indicator
of the role played by the laboratory-based methology in the course. Only a small percentage of
@@ -65,17 +48,17 @@
\caption{}
\label{fig:topics}
\end{figure}
-An interesting issue to investigate was the impact of the adopeted
+An interesting issue to investigate was the impact of the adopted
methodology on the understanding of the different topics encountered during the
-course. Note that some topics usually strictly relathed to the theoric
+course. Note that some topics that are usually strictly relathed to the theoric
part of a computer architecture course were deliberately included, in order to
capture more accurately to which extent, even indirectly, the
-adoption of \EM{} can impact on the learning process and students'
+adoption of \EM{} can affect the learning process and the students'
motivation. Figure~\ref{fig:topics} summarizes the result obtained,
-showing that the experience with \EM{} seems to influence (even with
-different impacts) all the topics presented in our survey: it can
-be observed an obvious predominance of topics like the teaching of
-registers and data encoding, due the bit-accurate encoding feature
-of \EM{}, and the assembly programming and pipelining, positevely
+showing that the experience with \EM{} seems to influence (even if with
+different power) all the topics presented in our survey: it can
+be observed an obvious predominance of topics like
+registers and data encoding - due to bit-accurate encoding
+- and the assembly programming and pipelining, positevely
impacted by the visual representation of the CPU during the execution of
instructions flow.
Modified: paper/ieee-tedu/teaching.tex
===================================================================
--- paper/ieee-tedu/teaching.tex 2011-06-03 10:47:09 UTC (rev 609)
+++ paper/ieee-tedu/teaching.tex 2011-06-03 11:05:03 UTC (rev 610)
@@ -62,20 +62,16 @@
\end{itemize}
\subsection{Understanding the MIPS instruction set}
-The behaviour of each instruction of the MIPS instruction set
-repertoire, its effect on registers, memory and code execution are
-certainly some of the most tricky concepts to deal with, both from the
-teaching and learning perspectives. We do believe that showing few
-complex algorithms and structures, even if more representative of the
-``real world'', is not the more appropriate approach in this part of
-the course. Instead, \EM{} can be used to effectively show different
-implementations of several simple and small algorithms in a visual and
-intuitive way, so that students can capture the real meaning of each
-assembly instruction of the repertoire.
+The behaviour of each instruction of the MIPS instruction set repertoire, its
+effect on registers, memory and code execution are certainly some of the most
+tricky concepts to deal with, both from the teaching and learning
+perspectives. In an introductory Computer Architecture course, showing complex
+algorithms and data structures, even if more representative of the ``real
+world'', is not the most appropriate approach Instead, \EM{} can be used to
+effectively show different implementations of several simple and small
+algorithms in a visual and intuitive way, so that students can capture the
+real meaning of each assembly instruction of the repertoire.
-% ANDREA: ho lasciato il ``we'' nel paragrafo precedente perche' stiamo
-% esprimendo un'opinione.. TODO TODO TODO verificare
-
Example assignments:
\begin{itemize}
\item \emph{Write a MIPS assembly program implementing an
|
|
From: <sv...@ed...> - 2011-06-03 10:47:15
|
Revision: 609
https://www.edumips.org/changeset/609
Author: lupino3
Date: 2011-06-03 12:47:09 +0200 (Fri, 03 Jun 2011)
Log Message:
-----------
Small changes to the Teaching Methodology section
Modified Paths:
--------------
paper/ieee-tedu/introduction.tex
paper/ieee-tedu/teaching.tex
Modified: paper/ieee-tedu/introduction.tex
===================================================================
--- paper/ieee-tedu/introduction.tex 2011-06-03 09:41:47 UTC (rev 608)
+++ paper/ieee-tedu/introduction.tex 2011-06-03 10:47:09 UTC (rev 609)
@@ -32,7 +32,7 @@
a solid and involving Computer Architecture course.
This paper is focused on the description and assessment of a Computer
-Architecture Undergraduate course in which the \EM{} simulator
+Architecture undergraduate course in which the \EM{} simulator
\cite{edumips_wiley_caee} has been employed as the primary tool for explaining
the topics, for the students' homework and for the final exam. \EM{} is a free
visual MIPS64 CPU simulator built over the last 5 years at the University of
Modified: paper/ieee-tedu/teaching.tex
===================================================================
--- paper/ieee-tedu/teaching.tex 2011-06-03 09:41:47 UTC (rev 608)
+++ paper/ieee-tedu/teaching.tex 2011-06-03 10:47:09 UTC (rev 609)
@@ -2,15 +2,15 @@
\label{sec:teaching}
\EM{} is tailored for use in introductory courses of Computer Architecture
usually taught in electrical engineering or computer science curricula.
-It can be successfully adopted as the main tool to teach the basics of the
-way in which a Central Processing Unit (CPU) and the memory hierarchy work.
-
-Computer Architecture courses usually start with an ``onion view'' of a computer
+%It can be successfully adopted as the main tool to teach the basics of the
+%way in which a Central Processing Unit (CPU) and the memory hierarchy work.
+these courses usually start with an ``onion view'' of a computer
+%Computer Architecture courses usually start with an ``onion view'' of a computer
system seen as a stack of layers, and where a usual level of abstraction is given
by the bare-metal CPU able to execute assembly sources translated (``assembled'')
-into machine code.
-Even at this level \EM{} can be productively used to test and improve student's
-understanding on the following topics:
+into binary machine code.
+\EM{} can be productively used to test and improve the students' understanding of
+the following topics:
\begin{itemize}
\item {Instruction/Data encoding}
\item {MIPS instruction set}
@@ -42,7 +42,7 @@
they will see that their data and code (complete with labels and
mnemonics) magically appear in the memory map shown in the two
corresponding \EM{} \emph{memory} and \emph{code} windows described in
-Subsection~\ref{sec:frames}. Note that the bit-accurate encoding of
+Section~\ref{subsec:gui}. Note that the bit-accurate encoding of
instructions of \EM{} allows students to verify how the different
three instruction formats are represented in memory. In this case
some of the windows inside \EM{} can be safely ignored (namely Cycles,
@@ -51,8 +51,8 @@
Example assignments:
\begin{itemize}
-\item \emph{Before loading a program into memory, try to figure out
- how some given lines of the \texttt{.data} section will appear in the \EM{}
+\item \emph{Before loading a given program into memory, try to figure out
+ how some lines of the \texttt{.data} section will appear in the \EM{}
memory window.}
\item \emph{Maximize the memory encoding window and highlight some lines, then
try to find the corresponding snippet of code in the text editor.}
@@ -78,7 +78,7 @@
Example assignments:
\begin{itemize}
-\item \emph{Use the text editor to write a MIPS assembly program implementing an
+\item \emph{Write a MIPS assembly program implementing an
algorithm that loads a set of values previously encoded in the
\texttt{.data} section and then copies them in a different area of
memory, according to the following \texttt{<condition>}.}
@@ -117,8 +117,8 @@
\subsection{Understanding the Memory Hierarchy}
-The possibility to interface \EM{} with the well-know DineroIV cache simulator
-allows both teacher and students to experiment quantitatively the
+The possibility to interface \EM{} with the well-known DineroIV cache simulator
+allows both teacher and students to experiment quantitatively with the
impact of different cache configurations on code execution and
performance.
@@ -127,7 +127,7 @@
\item \emph{Assuming a CPU clock frequency $f=1GHz$, compare the ideal time of
execution $T_{CPU\_ideal}$ of your code against a system with unified,
single port, direct-mapped 4K data/instruction L1 Cache memory, with block size 16
-byte and miss penalty $L1_{penality}=50$ cycles.}
+byte and miss delay $L1_{delay}=50$ cycles.}
\item \emph{Change the proposed cache configuration so that the number of
@@ -150,15 +150,15 @@
instruction cache parameters.
\subsection{Understanding I/O and system calls}
-These concepts are often addressed in the second part the course,
+These concepts are often addressed in the second part of the course,
depending on the whole course organization, nevertheless they can be
easily assessed using the \texttt{SYSCALL} instruction of
\EM{}. There are two main classes of assignments that involve the usage of the
\texttt{SYSCALL} instruction:
\begin{itemize}
-\item Assigments that test student ability to put properly the inputs
-of the syscall in the \texttt{.data} section and then get the outputs when
-the syscall has ended
+\item Assigments that test the students' ability to put properly the inputs
+of the \texttt{SYSCALL} in the \texttt{.data} section and then get the outputs when
+the \texttt{SYSCALL} has ended
\item Assignments that stress the usage of \texttt{SYSCALL}
in combination to an external routine, called
\texttt{input\_unsigned}, provided with \EM{} as part of example
@@ -168,17 +168,17 @@
The motivation behind the second class of assignments is to enrich the
complexity of the algorithms that can be developed. This class
exploits the usage of the \texttt{input\_unsigned} routine
-to facilitate the interactive input of unsigned integer values. The only
-thing to do is to include its source code using the \texttt{\#include}
+to facilitate the interactive input of unsigned integer values. The students
+must include it in their programs using the \texttt{\#include}
directive and then call it when necessary by jumping to the routine
using the \texttt{jal input\_unsigned} instruction. When the routine
execution has ended, the read unsigned integer value can be found on
-register $R1$. In addition, the teacher should consider the possibility of
-dedicating a whole lesson to the content of the
-\texttt{input\_unsigned} itself, which is a very good example of how
-simple syscalls works and how they can be used to build an higher
+register R1. In addition, the teacher should consider the possibility of
+dedicating a whole lesson to the contents of the
+\texttt{input\_unsigned} routine itself, which is a very good example of how
+simple system calls work and how they can be used to build an higher
abstraction routine similar to the C-like \texttt{scanf(...)}
-function that students encountered in previous courses.
+function that students have been using in previous courses.
Example assignments:
\begin{itemize}
@@ -193,16 +193,19 @@
When teaching computer architecture from the performance
analysis perspective, Amdahl's law is probably the most important
-principle that students should capture. In short, Amdahls's law is used to
+principle that students should learn. In short, Amdahl's law is used to
find the maximum expected improvement to an overall system when only
-part of the system is improved, that is:
+one part of the system is improved, that is:
-$S_{overall} = \frac{1}{1-F_{e}+\frac{1}{S_{e}}}$
+\begin{equation*}
+S_{overall} = \frac{1}{1-F_{e}+\frac{1}{S_{e}}}
+\end{equation*}
-where $F_{e}$ is the fraction of the total time affected by the
-enhancement and $S_{e}$ the speedup of the improved part of the system.
+where $S_{overall}$ is the overall speedup, $F_{e}$ is the fraction of the
+total time affected by the enhancement and $S_{e}$ the speedup of the improved
+part of the system.
-Using the output of \EM{} in conjuction with DineroIV statistics,
+Using \EM{} in conjuction with DineroIV,
simple assignments can be designed in order to help students to
understand how the overall performance of the system is governed by
the slowest component.
@@ -215,14 +218,14 @@
to compute $S_{overall}$ from a given $F_e$ and $S_e$.
\item Assignments that ask students to find which would be the
the required $S_e$ of a particular component in order to achieve a
-global overall system speedup. This is like a inverse usage of
+global overall system speedup. This is an inverse usage of
Amdahl's law, that is, finding $S_e$ from a given desired
$S_{overall}$ and known $F_e$.
\end{itemize}
Example assignments:
\begin{itemize}
-\item \emph{Starting from the results obtained when executing the MIPS64 program
+\item \emph{Starting from the results obtained when executing a given MIPS64 program
code on separated instruction and data caches, compute which overall
speedup would be achieved if the L1D data cache had only half of the
previously reported demand misses.}
@@ -232,8 +235,8 @@
\end{itemize}
Both assigments stress students' ability to compute quantitatively the
-right $F_e$ from execution statistics. A very interesting feature is
+correct $F_e$ from execution statistics. A very interesting feature is
present in the second category, which can result in a negative value
-for $S_e$; this is useful to make student understand that in some
-cases a desidered speedup cannot be obtained, no matter how big is the
+for $S_e$; this is useful to make the students understand that
+sometimes a desidered speedup cannot be obtained, no matter how big is the
$S_e$ of the component improved.
|
|
From: <sv...@ed...> - 2011-06-03 09:41:56
|
Revision: 608
https://www.edumips.org/changeset/608
Author: lupino3
Date: 2011-06-03 11:41:47 +0200 (Fri, 03 Jun 2011)
Log Message:
-----------
Added a picture and fixed a typo in my bio
Modified Paths:
--------------
paper/ieee-tedu/bios.tex
paper/ieee-tedu/edumips-description.tex
Added Paths:
-----------
paper/ieee-tedu/interface.eps
Modified: paper/ieee-tedu/bios.tex
===================================================================
--- paper/ieee-tedu/bios.tex 2011-06-03 09:16:37 UTC (rev 607)
+++ paper/ieee-tedu/bios.tex 2011-06-03 09:41:47 UTC (rev 608)
@@ -1,5 +1,5 @@
\begin{biographynophoto}{Andrea Spadaccini} (GSM'11) received the M.S. degree
- with honors in Computer Engineering in 2008 from the Univerity of Catania,
+ with honors in Computer Engineering in 2008 from the University of Catania,
Italy, where he is currently a Ph.D. candidate. He is the project leader of
EduMIPS64 and one of its core developers. His research activity is focused
on biometric recognition, novel biometrics, speaker recognition and signal
Modified: paper/ieee-tedu/edumips-description.tex
===================================================================
--- paper/ieee-tedu/edumips-description.tex 2011-06-03 09:16:37 UTC (rev 607)
+++ paper/ieee-tedu/edumips-description.tex 2011-06-03 09:41:47 UTC (rev 608)
@@ -4,7 +4,16 @@
Simulator; in the reminder of this section, the main features of the simulator
and of its graphical user interface will be briefly described. For more
details on the simulator, please refer to \cite{edumips_wiley_caee}.
+Figure~\ref{fig:interface} shows an overview of the User Interface of the
+simulator.
+\begin{figure}[!htb]
+ \centering
+ \includegraphics[width=\columnwidth]{interface.eps}
+ \caption{Overview of the EduMIPS64 User Interface}
+ \label{fig:interface}
+\end{figure}
+
\begin{table*}[t]
\begin{centering}
\caption{The \EM{} Instruction Set}
Added: paper/ieee-tedu/interface.eps
===================================================================
--- paper/ieee-tedu/interface.eps (rev 0)
+++ paper/ieee-tedu/interface.eps 2011-06-03 09:41:47 UTC (rev 608)
@@ -0,0 +1,57129 @@
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[truncated message content] |
|
From: <sv...@ed...> - 2011-06-03 09:16:43
|
Revision: 607
https://www.edumips.org/changeset/607
Author: dpatti
Date: 2011-06-03 11:16:37 +0200 (Fri, 03 Jun 2011)
Log Message:
-----------
Updated my life
Modified Paths:
--------------
paper/ieee-tedu/bios.tex
Modified: paper/ieee-tedu/bios.tex
===================================================================
--- paper/ieee-tedu/bios.tex 2011-06-03 09:11:10 UTC (rev 606)
+++ paper/ieee-tedu/bios.tex 2011-06-03 09:16:37 UTC (rev 607)
@@ -9,7 +9,8 @@
\begin{biographynophoto}{Davide Patti} (M'06)
Davide Patti received the Laurea degree and the Ph.D. degree in
computer engineering at University of Catania, in 2003 and 2007,
-respectively. His research focuses on Platform based system design,
+respectively. He is currently research assistant at the same
+university and his research focuses on Platform based system design,
design space exploration, low-power techniques for embedded systems,
and Network-on-Chip architectures.
\end{biographynophoto}
|
|
From: <sv...@ed...> - 2011-06-03 09:11:16
|
Revision: 606
https://www.edumips.org/changeset/606
Author: lupino3
Date: 2011-06-03 11:11:10 +0200 (Fri, 03 Jun 2011)
Log Message:
-----------
Added my short biography.
Modified Paths:
--------------
paper/ieee-tedu/bios.tex
Modified: paper/ieee-tedu/bios.tex
===================================================================
--- paper/ieee-tedu/bios.tex 2011-06-03 08:59:15 UTC (rev 605)
+++ paper/ieee-tedu/bios.tex 2011-06-03 09:11:10 UTC (rev 606)
@@ -1,4 +1,9 @@
-\begin{biographynophoto}{Andrea Spadaccini}...
+\begin{biographynophoto}{Andrea Spadaccini} (GSM'11) received the M.S. degree
+ with honors in Computer Engineering in 2008 from the Univerity of Catania,
+ Italy, where he is currently a Ph.D. candidate. He is the project leader of
+ EduMIPS64 and one of its core developers. His research activity is focused
+ on biometric recognition, novel biometrics, speaker recognition and signal
+ processing.
\end{biographynophoto}
\begin{biographynophoto}{Davide Patti} (M'06)
|
|
From: <sv...@ed...> - 2011-06-03 08:59:21
|
Revision: 605
https://www.edumips.org/changeset/605
Author: lupino3
Date: 2011-06-03 10:59:15 +0200 (Fri, 03 Jun 2011)
Log Message:
-----------
Don't work in isolation, please.
Modified Paths:
--------------
paper/ieee-tedu/introduction.tex
Modified: paper/ieee-tedu/introduction.tex
===================================================================
--- paper/ieee-tedu/introduction.tex 2011-06-03 08:57:34 UTC (rev 604)
+++ paper/ieee-tedu/introduction.tex 2011-06-03 08:59:15 UTC (rev 605)
@@ -23,8 +23,8 @@
aspects of a computer system, like assembly language~\cite{spim-web},
pipelining~\cite{windlx-web} or memory hierarchy~\cite{dinero-web}; the
heterogeneous nature of the tools used to cover the different topics of the
-course, could take to a fragmentation of the knowledge. In fact, analyzing in
-isolation the different sub-systems of the computer system, make it difficult
+course, could take to a fragmentation of the knowledge. In fact, analyzing
+separately the different sub-systems of the computer system, make it difficult
for the student to understand how those parts interact with each other, with a
consequent blinding of the system-level view. Moreover most of them do not
offer the other qualities mentioned before, like platform independence or
|
|
From: <sv...@ed...> - 2011-06-03 08:57:40
|
Revision: 604
https://www.edumips.org/changeset/604
Author: lupino3
Date: 2011-06-03 10:57:34 +0200 (Fri, 03 Jun 2011)
Log Message:
-----------
The Introduction, reloaded
Modified Paths:
--------------
paper/ieee-tedu/introduction.tex
Modified: paper/ieee-tedu/introduction.tex
===================================================================
--- paper/ieee-tedu/introduction.tex 2011-06-03 08:39:09 UTC (rev 603)
+++ paper/ieee-tedu/introduction.tex 2011-06-03 08:57:34 UTC (rev 604)
@@ -3,66 +3,48 @@
\PARstart{C}{omputer} Architecture and Organization is one of the key
elements which characterizes the curricula of electrical and computer
-engineers. One of the most critical aspects on teaching such
-discipline is how to support the theoretical concepts of the subjects
+engineers \cite{ieee-curricula}. One of the most critical aspects on teaching
+such discipline is how to support the theoretical concepts of the subjects
with appropriate practical experiences usually organized as laboratory
-assignments. Such experiences are mainly aimed at performing a
-quantitative analysis on the system parameters related to both the
-\emph{computer architecture} (which encompasses the programmer's
-abstract view of the machine) and the \emph{computer organization}
-(which deals with implementation details).
+assignments. Such experiences are mainly aimed at performing a quantitative
+analysis on the system parameters related to both the \emph{computer
+architecture} (which encompasses the programmer's abstract view of the
+machine) and the \emph{computer organization} (which deals with implementation
+details).
Instruction-Set Simulators (ISSs) represent the basic tool used for
supporting teaching of the topics related to the computer architecture
-part of the course. Unfortunately, most of the available educational
-ISSs focus on specific aspects of a computer system like assembly
-language~\cite{spim-web}, pipelining~\cite{windlx-web}, memory
-hierarchy~\cite{dinero-web}, out-of-order execution~\cite{???},
-superscalar systems principles~\cite{???}, \etc. The heterogeneous
-nature of the tools used to cover the different topics of the course,
-could take to a fragmentation of the knowledge. In fact, analyzing in
-isolation the different sub-systems of the computer system, make it
-difficult for the student to understand how those parts interact with each
-other, with a consequent blinding of the system-level view.
+part of the course. In this context, visual representation of the concept
+introduced in the course, platform independence, distance learning support,
+free availability of the tools and full coverage of the course topics are key
+factors which determine the effectiveness of the teaching armaments.
-This paper emphasizes the role of ISSs and its ability of making
-practical the theoretical topics dealt in a computer architecture
-course. The basic premise of this work is the lack of tools (ISSs in
-particular) which have been specifically designed with the aim of
-supporting students of computer architecture course in understanding
-the fundamentals of the basic topics of assembly programming, basic
-pipeline, and memory hierarchies. In this context, visual
-representation of the concepts introduced in the course, platform
-independence, distance learning support and free availability of the
-tools are the key factors which determine the effectiveness of the
-teaching armaments.
+Unfortunately, some of the available educational ISSs focus on specific
+aspects of a computer system, like assembly language~\cite{spim-web},
+pipelining~\cite{windlx-web} or memory hierarchy~\cite{dinero-web}; the
+heterogeneous nature of the tools used to cover the different topics of the
+course, could take to a fragmentation of the knowledge. In fact, analyzing in
+isolation the different sub-systems of the computer system, make it difficult
+for the student to understand how those parts interact with each other, with a
+consequent blinding of the system-level view. Moreover most of them do not
+offer the other qualities mentioned before, like platform independence or
+distance learning support, and this makes it difficult to base on those tools
+a solid and involving Computer Architecture course.
-Based on the international curricula recommendations, the joint IEEE
-Computer Society and Association for Computing Machinery (ACM)
-Computer Engineering Task Force has identified memory hierarchy
-together with pipelining as core topics in the computer organization
-and architecture area of knowledge~\cite{ieee-curricula}. One of the
-main difficulties encountered by the teacher in presenting the above
-core topics is finding a suitable representation of the system which,
-in general, cannot be static. In fact, presentating the basic pipeline
-events (like hazards) or the discussing the different policies to
-manage the memory hierarchy require the design of ad-hoc examples
-which cannot be summarized with a single slide. Instead, a
-cycle-by-cycle analysis is needed to show how bubbles propagate
-through the pipeline, how forwarding helps to solve kinds of data
-hazards, \etc. This paper shows how the use of a visual CPU simulator,
-namely \EM, improved the teaching quality and its effectiveness in an
-undergraduate course of basic computer architectures.
+This paper is focused on the description and assessment of a Computer
+Architecture Undergraduate course in which the \EM{} simulator
+\cite{edumips_wiley_caee} has been employed as the primary tool for explaining
+the topics, for the students' homework and for the final exam. \EM{} is a free
+visual MIPS64 CPU simulator built over the last 5 years at the University of
+Catania.
-The rest of the paper is organized as
-follows. Section~\ref{sec:related-works} provides a brief overview on
-available tools and methodologies aimed at enhancing the learning
-process of the topics in an undergraduate course of basic computer
-architectures. Section~\ref{sec:em_description} presents the main
-features of \EM{} used as the reference simulation platform in this
-paper. The teaching methodology based on the use of \EM{} is presented
-in Section~\ref{sec:teaching}. The suitability of \EM{} is discussed
-in Section~\ref{sec:survey} by means of a quantitative assessment
-carried out by survey compiled by students themselves. Finally,
-Section~\ref{sec:conclusions} draws conclusions and discusses possible
-future investigations.
+The rest of the paper is organized as follows. Section~\ref{sec:related-works}
+provides a brief overview on available tools and methodologies aimed at
+enhancing the learning process of the topics in an undergraduate course of
+basic computer architectures. Section~\ref{sec:em_description} presents the
+main features of \EM{} used as the reference simulation platform in this
+paper. The teaching methodology based on the use of \EM{} is presented in
+Section~\ref{sec:teaching}. The suitability of \EM{} is discussed in
+Section~\ref{sec:survey} by means of a quantitative assessment carried out by
+survey compiled by students themselves. Finally, Section~\ref{sec:conclusions}
+draws conclusions and discusses possible future investigations.
|
|
From: <sv...@ed...> - 2011-06-03 08:39:15
|
Revision: 603
https://www.edumips.org/changeset/603
Author: dpatti
Date: 2011-06-03 10:39:09 +0200 (Fri, 03 Jun 2011)
Log Message:
-----------
- misc fixes
Modified Paths:
--------------
paper/ieee-tedu/related-works.tex
Modified: paper/ieee-tedu/related-works.tex
===================================================================
--- paper/ieee-tedu/related-works.tex 2011-06-03 08:33:12 UTC (rev 602)
+++ paper/ieee-tedu/related-works.tex 2011-06-03 08:39:09 UTC (rev 603)
@@ -16,14 +16,14 @@
An educational experience of teaching computer architecture topics
using a project-based learning is described and evaluated
in~\cite{Martinez-Mones2005}. The main idea is using a collaborative approch
-where students are assigned to different subprojects but have to
-exchange some aquired knowledge in order to complete their tasks.
+where students are assigned to different subprojects but still have to
+exchange some acquired knowledge in order to complete their tasks.
Authors of~\cite{Verginis2011} present a web-based environment to
support the learning process in introductory conputer science course
using a customizable e-learning approach.
%tool oriented
-As regards tools-based approaches, topics of computer architecture are
+As regards tools-based approaches, computer architecture topics are
addressed at different levels of abstraction and granularity. The
work~\cite{Djordjevic2005} introduces an educational computer system
specifically designed to help teaching architecture topics from the
@@ -34,7 +34,7 @@
architecture course. The work in~\cite{Quislant2008} shows how an
educational framework has been used in introductory courses on
Computer Architecture and Engineering to teach some topics related to
-the tuning of cache parameters related to performance and energy
+the tuning of cache parameters with the aim of optimizing performance and energy
consumption. In~\cite{Sahuquillo2007} authors present a pedagogical
tool for dealing with code-based exercises expressely focused on cache
memory related topics.
|
|
From: <sv...@ed...> - 2011-06-03 08:33:18
|
Revision: 602
https://www.edumips.org/changeset/602
Author: dpatti
Date: 2011-06-03 10:33:12 +0200 (Fri, 03 Jun 2011)
Log Message:
-----------
- Improved, some comments, removed repetions of "In [..] "
Modified Paths:
--------------
paper/ieee-tedu/related-works.tex
Modified: paper/ieee-tedu/related-works.tex
===================================================================
--- paper/ieee-tedu/related-works.tex 2011-06-03 08:29:48 UTC (rev 601)
+++ paper/ieee-tedu/related-works.tex 2011-06-03 08:33:12 UTC (rev 602)
@@ -13,25 +13,28 @@
designed to improve student motivation in computer architecture
courses by showing them how to successfully optimize the assembly code
produced.
-In~\cite{Martinez-Mones2005} is described and evaluated the
-educational experience of teaching computer architecture topics using
-a project-based learning approch where students are assigned to
-different subprojects.
-In~\cite{Verginis2011} authors present a web-based environment to
-support the learning process in a introductory conputer science course
+An educational experience of teaching computer architecture topics
+using a project-based learning is described and evaluated
+in~\cite{Martinez-Mones2005}. The main idea is using a collaborative approch
+where students are assigned to different subprojects but have to
+exchange some aquired knowledge in order to complete their tasks.
+Authors of~\cite{Verginis2011} present a web-based environment to
+support the learning process in introductory conputer science course
using a customizable e-learning approach.
%tool oriented
-In~\cite{Djordjevic2005} authors presents an educational computer
-system specifically designed to help teaching architecture topics from
-the designer's perspective. In~\cite{Garcia2009} the authors propose a pedagogical and fully
-configurable simulator of the MC88110 32-bit microprocessor, with the
-aim to reduce the effort of using many different simulators to cover
-the topics of a typical computer architecture course.
-The work in~\cite{Quislant2008} shows how an educational framework
-has been used in introductory courses on Computer Architecture and
-Engineering to teach some topics related to the tuning of cache
-parameters related to performance and energy consumption.
-In~\cite{Sahuquillo2007} authors present a pedagogical tool for
-dealing with code-based exercises expressely focused on cache memory
-related topics.
+As regards tools-based approaches, topics of computer architecture are
+addressed at different levels of abstraction and granularity. The
+work~\cite{Djordjevic2005} introduces an educational computer system
+specifically designed to help teaching architecture topics from the
+designer's perspective. In~\cite{Garcia2009} the authors propose a
+pedagogical and fully configurable simulator of the MC88110 32-bit
+microprocessor, with the aim to reduce the effort of using many
+different simulators to cover the topics of a typical computer
+architecture course. The work in~\cite{Quislant2008} shows how an
+educational framework has been used in introductory courses on
+Computer Architecture and Engineering to teach some topics related to
+the tuning of cache parameters related to performance and energy
+consumption. In~\cite{Sahuquillo2007} authors present a pedagogical
+tool for dealing with code-based exercises expressely focused on cache
+memory related topics.
|
|
From: <sv...@ed...> - 2011-06-03 08:29:55
|
Revision: 601
https://www.edumips.org/changeset/601
Author: lupino3
Date: 2011-06-03 10:29:48 +0200 (Fri, 03 Jun 2011)
Log Message:
-----------
Fixed typos in the introduction
Modified Paths:
--------------
paper/ieee-tedu/introduction.tex
Modified: paper/ieee-tedu/introduction.tex
===================================================================
--- paper/ieee-tedu/introduction.tex 2011-06-03 08:23:43 UTC (rev 600)
+++ paper/ieee-tedu/introduction.tex 2011-06-03 08:29:48 UTC (rev 601)
@@ -7,7 +7,7 @@
discipline is how to support the theoretical concepts of the subjects
with appropriate practical experiences usually organized as laboratory
assignments. Such experiences are mainly aimed at performing a
-quantitative analysis on system parameters related to both the
+quantitative analysis on the system parameters related to both the
\emph{computer architecture} (which encompasses the programmer's
abstract view of the machine) and the \emph{computer organization}
(which deals with implementation details).
@@ -18,12 +18,12 @@
ISSs focus on specific aspects of a computer system like assembly
language~\cite{spim-web}, pipelining~\cite{windlx-web}, memory
hierarchy~\cite{dinero-web}, out-of-order execution~\cite{???},
-superscalar systems principles~\cite{???}, \etc. The heterogeneity
+superscalar systems principles~\cite{???}, \etc. The heterogeneous
nature of the tools used to cover the different topics of the course,
could take to a fragmentation of the knowledge. In fact, analyzing in
isolation the different sub-systems of the computer system, make it
-difficult the student understanding on how those parts interact each
-other with a consequent blinding of the system-level view.
+difficult for the student to understand how those parts interact with each
+other, with a consequent blinding of the system-level view.
This paper emphasizes the role of ISSs and its ability of making
practical the theoretical topics dealt in a computer architecture
@@ -33,8 +33,8 @@
the fundamentals of the basic topics of assembly programming, basic
pipeline, and memory hierarchies. In this context, visual
representation of the concepts introduced in the course, platform
-independence, distance learning support and freely availability of the
-tools are key factors which determine the effectiveness of the
+independence, distance learning support and free availability of the
+tools are the key factors which determine the effectiveness of the
teaching armaments.
Based on the international curricula recommendations, the joint IEEE
|
|
From: <sv...@ed...> - 2011-06-03 08:23:50
|
Revision: 600
https://www.edumips.org/changeset/600
Author: dpatti
Date: 2011-06-03 10:23:43 +0200 (Fri, 03 Jun 2011)
Log Message:
-----------
- Fixed reference
Modified Paths:
--------------
paper/ieee-tedu/edumips-description.tex
paper/ieee-tedu/teaching.tex
Modified: paper/ieee-tedu/edumips-description.tex
===================================================================
--- paper/ieee-tedu/edumips-description.tex 2011-06-03 07:53:55 UTC (rev 599)
+++ paper/ieee-tedu/edumips-description.tex 2011-06-03 08:23:43 UTC (rev 600)
@@ -59,6 +59,7 @@
operations, and provides support for maskable synchronous exceptions.
\subsection{The User Interface}
+\label{subsec:gui}
The user interface of \EM{} is similar to the one provided by WinMIPS64
\cite{winmips-web} and WinDLX \cite{windlx-web}. It adopts the Multiple
Document Interface paradigm, with a main window that contains the individual
Modified: paper/ieee-tedu/teaching.tex
===================================================================
--- paper/ieee-tedu/teaching.tex 2011-06-03 07:53:55 UTC (rev 599)
+++ paper/ieee-tedu/teaching.tex 2011-06-03 08:23:43 UTC (rev 600)
@@ -94,7 +94,7 @@
The teaching of the pipelining mechanisms and the related
micro-architectural events involved can take a great benefit from
the visual representation of CPU described in
-Subsection~\ref{sec:frames}. By executing code using \EM{} in the
+Subsection~\ref{subsec:gui}. By executing code using \EM{} in the
cycle-by-cycle mode, the teacher can show how the different elements
of the pipeline deal with data (e.g. using forwarding, creating
bubbles), and also which is the current stage of execution of each instruction, which signal
|
|
From: <sv...@ed...> - 2011-06-03 07:54:03
|
Revision: 599
https://www.edumips.org/changeset/599
Author: mpalesi
Date: 2011-06-03 09:53:55 +0200 (Fri, 03 Jun 2011)
Log Message:
-----------
added bios of the authors.
Modified Paths:
--------------
paper/ieee-tedu/Makefile
paper/ieee-tedu/paper.tex
Added Paths:
-----------
paper/ieee-tedu/bios.tex
Modified: paper/ieee-tedu/Makefile
===================================================================
--- paper/ieee-tedu/Makefile 2011-06-02 15:21:21 UTC (rev 598)
+++ paper/ieee-tedu/Makefile 2011-06-03 07:53:55 UTC (rev 599)
@@ -8,7 +8,7 @@
paper.dvi: paper.tex abstract.tex introduction.tex survey.tex \
teaching.tex conclusions.tex bibliography.bib related-works.tex \
- edumips-description.tex
+ edumips-description.tex bios.tex
latex paper
bibtex paper
latex paper
Added: paper/ieee-tedu/bios.tex
===================================================================
--- paper/ieee-tedu/bios.tex (rev 0)
+++ paper/ieee-tedu/bios.tex 2011-06-03 07:53:55 UTC (rev 599)
@@ -0,0 +1,57 @@
+\begin{biographynophoto}{Andrea Spadaccini}...
+\end{biographynophoto}
+
+\begin{biographynophoto}{Davide Patti} (M'06)
+Davide Patti received the Laurea degree and the Ph.D. degree in
+computer engineering at University of Catania, in 2003 and 2007,
+respectively. His research focuses on Platform based system design,
+design space exploration, low-power techniques for embedded systems,
+and Network-on-Chip architectures.
+\end{biographynophoto}
+
+\begin{biographynophoto}{Maurizio
+ Palesi} (M'06) received the M.S. and Ph.D. degrees in computer
+ engineering from the Universit\`a di Catania, Catania, Italy, in
+ 1999 and 2003, respectively. Since November 2010 he is Assistant
+ Professor at Kore University, Enna, Italy. Dr. Palesi serves on the
+ Editorial Board of VLSI Design journal as an Associate Editor since
+ May 2007. He has served as a Guest Editor for the VLSI Design
+ Journal - Special Issue on Networks-on-Chip in 2008, as a Guest
+ Editor for the International Journal of High Performance Systems
+ Architecture - Special Issue on Power-Efficient, High Performance
+ General Purpose and Application-Specific Computing Architectures in
+ 2009, and as Guest Editor for Elsevier MICPRO Journal - Special
+ Issue on Network-on-Chip Architectures and Design Methodologies in
+ 2010. He serves as the Technical Program Committee Member for the
+ following IEEE/ACM International Conferences: RTAS, CODES+ISSS,
+ ESTIMedia, SOCC, VLSI, ISC, and SITIS. He was also the Co-organizer
+ of International Workshops on Network-on-Chip Architectures (NoCArc)
+ in 2008, 2009, and 2010.
+\end{biographynophoto}
+
+\begin{biographynophoto}{Fabrizio
+ Fazzino} (M'08) received the M.S. degree in Computer Engineering
+ from the University of Catania in 1997. Until 2001 he was
+ responsible for the functional verification of 32-bit lines of
+ microprocessors at STMicroelectronics. Since 2004 he collaborates
+ with the Department of Computer and Telecommunications
+ Engineering. He is Silicon Engineer at Icera Inc., Bristol (UK).
+\end{biographynophoto}
+
+\begin{biographynophoto}{Vincenzo
+ Catania} received the M.S. degree with Honors in electrical
+ engineering from the Universit\`a di Catania, Catania, Italy, in
+ 1982. Up until 1984, he was responsible for testing microprocessor
+ system at STMicroelectronics, Catania, Italy. Since 1985, he has
+ cooperated in research on advanced computer architectures and
+ computer networks with the Dipartimento di Ingegneria Informatica e
+ delle Telecomunicazioni, Facolt\`a di Ingegneria, Universit\`a di
+ Catania, where he is currently a Full Professor of Computer
+ Science. Since November 2006, he has served as the Director of the
+ Department of Computer Science and Telecommunications Engineering,
+ Universit\`a di Catania. He is the author of more than 200 articles
+ on international journals and conference proceedings and holds two
+ patents. Currently, his research focuses on pervasive embedded
+ systems, network-on-chip architectures, and mobile terminal platform
+ and services.
+\end{biographynophoto}
Modified: paper/ieee-tedu/paper.tex
===================================================================
--- paper/ieee-tedu/paper.tex 2011-06-02 15:21:21 UTC (rev 598)
+++ paper/ieee-tedu/paper.tex 2011-06-03 07:53:55 UTC (rev 599)
@@ -133,4 +133,8 @@
%------------------------------------------------------------------------------
+\input{bios.tex}
+
+%------------------------------------------------------------------------------
+
\end{document}
|
|
From: <sv...@ed...> - 2011-06-02 15:21:27
|
Revision: 598
https://www.edumips.org/changeset/598
Author: lupino3
Date: 2011-06-02 17:21:21 +0200 (Thu, 02 Jun 2011)
Log Message:
-----------
Changed version to 0.5.3-rc3; fixed indentation and missing parentheses in GUIRegisters.java
Modified Paths:
--------------
branches/0.5/Main.java
branches/0.5/build.xml
branches/0.5/ui/GUIRegisters.java
Modified: branches/0.5/Main.java
===================================================================
--- branches/0.5/Main.java 2011-06-02 15:00:29 UTC (rev 597)
+++ branches/0.5/Main.java 2011-06-02 15:21:21 UTC (rev 598)
@@ -52,7 +52,7 @@
public class Main extends JApplet {
- public static final String VERSION = "0.5.3";
+ public static final String VERSION = "0.5.3-rc3";
static CPU cpu;
public static CPUGUIThread cgt;
static Parser parser;
Modified: branches/0.5/build.xml
===================================================================
--- branches/0.5/build.xml 2011-06-02 15:00:29 UTC (rev 597)
+++ branches/0.5/build.xml 2011-06-02 15:21:21 UTC (rev 598)
@@ -14,7 +14,7 @@
<!-- Set build file properties -->
<property name="sourceDir" value="." />
<property name="helpClassesDir" value="./libs" />
- <property name="version" value="0.5.3" />
+ <property name="version" value="0.5.3-rc3" />
<property name="outputDir" value="edumips" />
<property name="tarbz2File" value="edumips64-${version}.tar.bz2" />
<property name="svn_jar_filename" value="edumips64-svn.jar" />
Modified: branches/0.5/ui/GUIRegisters.java
===================================================================
--- branches/0.5/ui/GUIRegisters.java 2011-06-02 15:00:29 UTC (rev 597)
+++ branches/0.5/ui/GUIRegisters.java 2011-06-02 15:21:21 UTC (rev 598)
@@ -165,49 +165,20 @@
value[33] = "0000000000000000";
}
-
-
-
- public String fillFirstColumn(int i)
-
-
- {
-
-
- if((Boolean) Config.get("show_aliases"))
-
-
- return registerToAlias(" " + i) + "=";
-
-
- else
-
-
- return "R" + i+ " =";
-
-
+ public String fillFirstColumn(int i) {
+ if((Boolean) Config.get("show_aliases")) {
+ return registerToAlias(" " + i) + "=";
+ } else {
+ return "R" + i+ " =";
}
+ }
-
-
-
-
- public void updateRegistersNames()
-
-
- {
-
-
- for (int i = 0; i < 32; i++)
-
-
- numR[i] = fillFirstColumn(i);
-
-
- draw();
-
-
- }
+ public void updateRegistersNames() {
+ for (int i = 0; i < 32; i++) {
+ numR[i] = fillFirstColumn(i);
+ }
+ draw();
+ }
//classe interna che gestisce l'evento doppio click
class MyMouseListener implements MouseListener
|
|
From: <sv...@ed...> - 2011-06-02 15:00:41
|
Revision: 597
https://www.edumips.org/changeset/597
Author: lupino3
Date: 2011-06-02 17:00:29 +0200 (Thu, 02 Jun 2011)
Log Message:
-----------
Added a regression test for the last bug; updated the ChangeLog
Modified Paths:
--------------
branches/0.5/ChangeLog
Added Paths:
-----------
branches/0.5/test/test-parse-addresses.s
Modified: branches/0.5/ChangeLog
===================================================================
--- branches/0.5/ChangeLog 2011-06-02 14:58:27 UTC (rev 596)
+++ branches/0.5/ChangeLog 2011-06-02 15:00:29 UTC (rev 597)
@@ -11,6 +11,8 @@
- Embedded JavaHelp viewer (andrea)
- Converted the TeX docs to RST, so that the same sources can be used for
the PDF manual and for the newly-embedded JavaHelp viewer (andrea)
+ - Fixed a bug that disallowed access to odd memory locations from the code
+ (odd labels were not correctly parsed).
0.5.2 (17/04/2008)
- Fixed a bug about a stall for synchronous exceptions and forwarding (max83t)
Added: branches/0.5/test/test-parse-addresses.s
===================================================================
--- branches/0.5/test/test-parse-addresses.s (rev 0)
+++ branches/0.5/test/test-parse-addresses.s 2011-06-02 15:00:29 UTC (rev 597)
@@ -0,0 +1,23 @@
+.data
+src: .byte 0, 1, 2, 3, 4, 5, 6, 7
+dst: .space 0
+
+.code
+
+lb r1, 0(r0)
+lb r2, 1(r0)
+lb r3, 2(r0)
+lb r4, 3(r0)
+lb r5, 4(r0)
+lb r6, 5(r0)
+lb r7, 6(r0)
+lb r8, 7(r0)
+
+sb r1, 8(r0)
+sb r2, 9(r0)
+sb r3, 10(r0)
+sb r4, 11(r0)
+sb r5, 12(r0)
+sb r6, 13(r0)
+sb r7, 14(r0)
+sb r8, 15(r0)
|
|
From: <sv...@ed...> - 2011-06-02 14:58:33
|
Revision: 596
https://www.edumips.org/changeset/596
Author: lupino3
Date: 2011-06-02 16:58:27 +0200 (Thu, 02 Jun 2011)
Log Message:
-----------
Fixed a bug that made impossible to access odd memory locations from the code.
Modified Paths:
--------------
branches/0.5/core/Parser.java
branches/0.5/core/is/Instruction.java
branches/0.5/edumips64-svn.jar
Modified: branches/0.5/core/Parser.java
===================================================================
--- branches/0.5/core/Parser.java 2011-06-02 14:22:45 UTC (rev 595)
+++ branches/0.5/core/Parser.java 2011-06-02 14:58:27 UTC (rev 596)
@@ -891,17 +891,15 @@
else if(isNumber(param.substring(indPar,endPar).trim()))
{
int tmp = Integer.parseInt(param.substring(indPar,endPar).trim());
- if (tmp<0 || tmp%2!=0 || tmp > edumips64.core.CPU.DATALIMIT)
+ //if (tmp<0 || tmp%2!=0 || tmp > edumips64.core.CPU.DATALIMIT)
+ if (tmp<0 || tmp > edumips64.core.CPU.DATALIMIT)
{
numError++;
String er = "LABELADDRESSINVALID";
if (tmp > edumips64.core.CPU.DATALIMIT) {
er = "LABELTOOLARGE";
- error.add(er,row,line.indexOf(param.substring(indPar,endPar))+1,line);
}
- else {
- error.add("LABELADDRESSINVALID",row,line.indexOf(param.substring(indPar,endPar))+1,line);
- }
+ error.add(er,row,line.indexOf(param.substring(indPar,endPar))+1,line);
i = line.length();
indPar = endPar+1;
tmpInst.getParams().add(0);
Modified: branches/0.5/core/is/Instruction.java
===================================================================
--- branches/0.5/core/is/Instruction.java 2011-06-02 14:22:45 UTC (rev 595)
+++ branches/0.5/core/is/Instruction.java 2011-06-02 14:58:27 UTC (rev 596)
@@ -24,6 +24,7 @@
import edumips64.core.*;
import edumips64.utils.*;
import java.util.*;
+import java.util.logging.Logger;
import java.lang.Enum.*;
/**Abstract class: it provides all methods and attributes for each instruction type
*
@@ -42,6 +43,7 @@
protected String fullname;
protected static boolean enableForwarding=(Boolean)Config.get("forwarding");
protected String label;
+ protected static final Logger logger = Logger.getLogger(Instruction.class.getName());
/** Creates a new instance of Instruction */
public Instruction() {
Modified: branches/0.5/edumips64-svn.jar
===================================================================
(Binary files differ)
|
|
From: <sv...@ed...> - 2011-06-02 14:22:54
|
Revision: 595
https://www.edumips.org/changeset/595
Author: lupino3
Date: 2011-06-02 16:22:45 +0200 (Thu, 02 Jun 2011)
Log Message:
-----------
While seeking for a bug, I found another bug and I fixed it.
Modified Paths:
--------------
branches/0.5/core/Parser.java
Modified: branches/0.5/core/Parser.java
===================================================================
--- branches/0.5/core/Parser.java 2011-06-01 14:19:14 UTC (rev 594)
+++ branches/0.5/core/Parser.java 2011-06-02 14:22:45 UTC (rev 595)
@@ -895,10 +895,13 @@
{
numError++;
String er = "LABELADDRESSINVALID";
- if (tmp > edumips64.core.CPU.DATALIMIT)
+ if (tmp > edumips64.core.CPU.DATALIMIT) {
er = "LABELTOOLARGE";
error.add(er,row,line.indexOf(param.substring(indPar,endPar))+1,line);
- error.add("LABELADDRESSINVALID",row,line.indexOf(param.substring(indPar,endPar))+1,line);
+ }
+ else {
+ error.add("LABELADDRESSINVALID",row,line.indexOf(param.substring(indPar,endPar))+1,line);
+ }
i = line.length();
indPar = endPar+1;
tmpInst.getParams().add(0);
|
|
From: <sv...@ed...> - 2011-06-01 14:19:22
|
Revision: 594
https://www.edumips.org/changeset/594
Author: mpalesi
Date: 2011-06-01 16:19:14 +0200 (Wed, 01 Jun 2011)
Log Message:
-----------
Updated draft of the introduction.
Modified Paths:
--------------
paper/ieee-tedu/edumips-description.tex
paper/ieee-tedu/introduction.tex
Modified: paper/ieee-tedu/edumips-description.tex
===================================================================
--- paper/ieee-tedu/edumips-description.tex 2011-05-30 10:26:30 UTC (rev 593)
+++ paper/ieee-tedu/edumips-description.tex 2011-06-01 14:19:14 UTC (rev 594)
@@ -1,4 +1,5 @@
\section{Description of the Simulator}
+\label{sec:em_description}
As stated in the previous section, EduMIPS64 is a visual MIPS64 Instruction Set
Simulator; in the reminder of this section, the main features of the simulator
and of its graphical user interface will be briefly described. For more
Modified: paper/ieee-tedu/introduction.tex
===================================================================
--- paper/ieee-tedu/introduction.tex 2011-05-30 10:26:30 UTC (rev 593)
+++ paper/ieee-tedu/introduction.tex 2011-06-01 14:19:14 UTC (rev 594)
@@ -20,7 +20,7 @@
hierarchy~\cite{dinero-web}, out-of-order execution~\cite{???},
superscalar systems principles~\cite{???}, \etc. The heterogeneity
nature of the tools used to cover the different topics of the course,
-could take to a fragmentation of the knowledge. In fact, analysing in
+could take to a fragmentation of the knowledge. In fact, analyzing in
isolation the different sub-systems of the computer system, make it
difficult the student understanding on how those parts interact each
other with a consequent blinding of the system-level view.
@@ -39,55 +39,30 @@
Based on the international curricula recommendations, the joint IEEE
Computer Society and Association for Computing Machinery (ACM)
-Computer Engineering Task Force has identified memory hierarchy
+Computer Engineering Task Force has identified memory hierarchy
together with pipelining as core topics in the computer organization
-and architecture area of knowledge~\cite{ieee-curricula}.
+and architecture area of knowledge~\cite{ieee-curricula}. One of the
+main difficulties encountered by the teacher in presenting the above
+core topics is finding a suitable representation of the system which,
+in general, cannot be static. In fact, presentating the basic pipeline
+events (like hazards) or the discussing the different policies to
+manage the memory hierarchy require the design of ad-hoc examples
+which cannot be summarized with a single slide. Instead, a
+cycle-by-cycle analysis is needed to show how bubbles propagate
+through the pipeline, how forwarding helps to solve kinds of data
+hazards, \etc. This paper shows how the use of a visual CPU simulator,
+namely \EM, improved the teaching quality and its effectiveness in an
+undergraduate course of basic computer architectures.
-TODO [difficolta' nel far capire argomenti a studenti, argomenti
- critici da affrontare (es. quelli del survey), noi abbiamo adottato
- questo approccio, abbiamo ottenuto questi risultati]
-
-%% The MIPS64\textregistered{} architecture~\ref{mips-1} represents
-%% one of the most widespread reference architecture in several computer
-%% architecture courses. The simplicity which characterizes such an
-%% architecture along with its flexibility in supporting a range of
-%% architectural and microarchitectural features for performance
-%% improvement, make it an ideal platform for understanding basic
-%% principles of computer architecture like ISA, pipelining, memory
-%% hierarchies, \etc.~\cite{hp}.
-
-
-
-%% For this reason, in the first half of 2006, a group of students of the
-%% Computer Science Engineering Faculty at University of Catania, Italy,
-%% developed a MIPS64 simulator, called
-%% \EM{}~\cite{edumips-web}. The project was originally started in
-%% order to make a simulator similar to WinMIPS64~\cite{winmips-web}
-%% available to users of every platform, but it progressively went beyond
-%% the original idea, growing up quickly and extending the original
-%% functionalities of WinMIPS64 with new and important (under the
-%% educational viewpoint) features like the implementation of an
-%% interrupt and exception handling system. Further, the choice of implementing
-%% the simulator in Java gave to the \EM{} project two important
-%% advantages over WinMIPS64: first, the possibility of using the
-%% simulator across different operating systems and platforms, feature of
-%% fundamental importance when dealing with heterogeneous environments
-%% (different universities, teaching laboratories, students notebooks, \etc) with
-%% no deployment issues. On the
-%% other hand, the availability of a Java-applet web interface to the simulator
-%% enables the support for new approaches in teaching courses such as
-%% distance learning. Finally, thanks to its licensing policy (GNU General Public
-%% License) \EM{} itself becomes an experimental laboratory, where
-%% every user is able to study the source code, do research activities and
-%% experiments, modify it and share the contributions back with the community.
-
-%% The rest of this paper is organized as follows.
-%Section~\ref{sec:related-works}
-%% provides a brief overview on ISSs mainly used in educational scenarios and
-%% describes how \EM{} compares to them. The basic features of \EM{} and its user
-%% interface are presented in Sections~\ref{sec:simulator} and~\ref{sec:gui}
-%% respectively. Section~\ref{sec:teaching} describes the teaching methodology
-%% supported by \EM{} along with a set of example assignments. The assessment
-%% survey and evaluation is reported in Section~\ref{sec:survey}. Finally, in
-%% Section~\ref{sec:conclusions} we draw our conclusions and discuss possible
-%% future developments.
+The rest of the paper is organized as
+follows. Section~\ref{sec:related-works} provides a brief overview on
+available tools and methodologies aimed at enhancing the learning
+process of the topics in an undergraduate course of basic computer
+architectures. Section~\ref{sec:em_description} presents the main
+features of \EM{} used as the reference simulation platform in this
+paper. The teaching methodology based on the use of \EM{} is presented
+in Section~\ref{sec:teaching}. The suitability of \EM{} is discussed
+in Section~\ref{sec:survey} by means of a quantitative assessment
+carried out by survey compiled by students themselves. Finally,
+Section~\ref{sec:conclusions} draws conclusions and discusses possible
+future investigations.
|
|
From: <sv...@ed...> - 2011-05-30 10:26:36
|
Revision: 593
https://www.edumips.org/changeset/593
Author: dpatti
Date: 2011-05-30 12:26:30 +0200 (Mon, 30 May 2011)
Log Message:
-----------
- Updated to compile Related works
Modified Paths:
--------------
paper/ieee-tedu/Makefile
paper/ieee-tedu/introduction.tex
paper/ieee-tedu/paper.tex
paper/ieee-tedu/related-works.tex
Modified: paper/ieee-tedu/Makefile
===================================================================
--- paper/ieee-tedu/Makefile 2011-05-30 10:22:20 UTC (rev 592)
+++ paper/ieee-tedu/Makefile 2011-05-30 10:26:30 UTC (rev 593)
@@ -7,7 +7,7 @@
dvips -t a4 -G0 paper.dvi -o paper.ps
paper.dvi: paper.tex abstract.tex introduction.tex survey.tex \
- teaching.tex conclusions.tex bibliography.bib comparison.tex \
+ teaching.tex conclusions.tex bibliography.bib related-works.tex \
edumips-description.tex
latex paper
bibtex paper
Modified: paper/ieee-tedu/introduction.tex
===================================================================
--- paper/ieee-tedu/introduction.tex 2011-05-30 10:22:20 UTC (rev 592)
+++ paper/ieee-tedu/introduction.tex 2011-05-30 10:26:30 UTC (rev 593)
@@ -81,7 +81,8 @@
%% every user is able to study the source code, do research activities and
%% experiments, modify it and share the contributions back with the community.
-%% The rest of this paper is organized as follows. Section~\ref{sec:comparison}
+%% The rest of this paper is organized as follows.
+%Section~\ref{sec:related-works}
%% provides a brief overview on ISSs mainly used in educational scenarios and
%% describes how \EM{} compares to them. The basic features of \EM{} and its user
%% interface are presented in Sections~\ref{sec:simulator} and~\ref{sec:gui}
Modified: paper/ieee-tedu/paper.tex
===================================================================
--- paper/ieee-tedu/paper.tex 2011-05-30 10:22:20 UTC (rev 592)
+++ paper/ieee-tedu/paper.tex 2011-05-30 10:26:30 UTC (rev 593)
@@ -100,7 +100,7 @@
%------------------------------------------------------------------------------
-\input{comparison.tex}
+\input{related-works.tex}
%------------------------------------------------------------------------------
Modified: paper/ieee-tedu/related-works.tex
===================================================================
--- paper/ieee-tedu/related-works.tex 2011-05-30 10:22:20 UTC (rev 592)
+++ paper/ieee-tedu/related-works.tex 2011-05-30 10:26:30 UTC (rev 593)
@@ -1,5 +1,5 @@
\section{Related Works}
-\label{sec:comparison}
+\label{sec:related-works}
Several different tools and methologies have been adopted
in order to enhance the learning process of the basic concepts of
|
|
From: <sv...@ed...> - 2011-05-30 10:22:27
|
Revision: 592
https://www.edumips.org/changeset/592
Author: dpatti
Date: 2011-05-30 12:22:20 +0200 (Mon, 30 May 2011)
Log Message:
-----------
- First commit of related works
- Changed filename: focus on everview of other approaches, NOT simulator
comparison
Added Paths:
-----------
paper/ieee-tedu/related-works.tex
Removed Paths:
-------------
paper/ieee-tedu/comparison.tex
Deleted: paper/ieee-tedu/comparison.tex
===================================================================
--- paper/ieee-tedu/comparison.tex 2011-05-30 08:36:53 UTC (rev 591)
+++ paper/ieee-tedu/comparison.tex 2011-05-30 10:22:20 UTC (rev 592)
@@ -1,8 +0,0 @@
-\section{Comparison with Other Simulators}
-\label{sec:comparison}
-
-Several different approaches, tools and methologies have been adopted
-in order to enhance the learning process of the basic concepts of
-CPU organization usually taught in introductory Computer Architecture courses.
-
-
Copied: paper/ieee-tedu/related-works.tex (from rev 591, paper/ieee-tedu/comparison.tex)
===================================================================
--- paper/ieee-tedu/related-works.tex (rev 0)
+++ paper/ieee-tedu/related-works.tex 2011-05-30 10:22:20 UTC (rev 592)
@@ -0,0 +1,37 @@
+\section{Related Works}
+\label{sec:comparison}
+
+Several different tools and methologies have been adopted
+in order to enhance the learning process of the basic concepts of
+CPU organization usually taught in introductory Computer Architecture courses.
+Some approaches focuse on the adopted framework (e.g.
+simulators, web-based learning, games), while others try to exploit the positive
+effect of collaborative projects in improving students' motivation.
+
+% social/collaborative
+In~\cite{Anguita2007} the authors propose a method and activity
+designed to improve student motivation in computer architecture
+courses by showing them how to successfully optimize the assembly code
+produced.
+In~\cite{Martinez-Mones2005} is described and evaluated the
+educational experience of teaching computer architecture topics using
+a project-based learning approch where students are assigned to
+different subprojects.
+In~\cite{Verginis2011} authors present a web-based environment to
+support the learning process in a introductory conputer science course
+using a customizable e-learning approach.
+
+%tool oriented
+In~\cite{Djordjevic2005} authors presents an educational computer
+system specifically designed to help teaching architecture topics from
+the designer's perspective. In~\cite{Garcia2009} the authors propose a pedagogical and fully
+configurable simulator of the MC88110 32-bit microprocessor, with the
+aim to reduce the effort of using many different simulators to cover
+the topics of a typical computer architecture course.
+The work in~\cite{Quislant2008} shows how an educational framework
+has been used in introductory courses on Computer Architecture and
+Engineering to teach some topics related to the tuning of cache
+parameters related to performance and energy consumption.
+In~\cite{Sahuquillo2007} authors present a pedagogical tool for
+dealing with code-based exercises expressely focused on cache memory
+related topics.
|
|
From: <sv...@ed...> - 2011-05-30 08:37:00
|
Revision: 591
https://www.edumips.org/changeset/591
Author: dpatti
Date: 2011-05-30 10:36:53 +0200 (Mon, 30 May 2011)
Log Message:
-----------
Updated with related works references
Modified Paths:
--------------
paper/ieee-tedu/bibliography.bib
Modified: paper/ieee-tedu/bibliography.bib
===================================================================
--- paper/ieee-tedu/bibliography.bib 2011-05-30 08:20:48 UTC (rev 590)
+++ paper/ieee-tedu/bibliography.bib 2011-05-30 08:36:53 UTC (rev 591)
@@ -234,3 +234,98 @@
url = "http://rti.etf.bg.ac.rs/rti/ri3aor/Simulators/"
}
+@article{Anguita2007,
+author = {Anguita, Mancia and Fernandez-Baldomero, F. Javier},
+file = {::},
+issn = {0018-9359},
+journal = {IEEE Transactions on Education},
+month = nov,
+number = {4},
+pages = {373--378},
+title = {{Software Optimization for Improving Student Motivation in a Computer Architecture Course}},
+url = {http://ieeexplore.ieee.org/lpdocs/epic03/wrapper.htm?arnumber=4371514},
+volume = {50},
+year = {2007}
+}
+
+@article{Djordjevic2005,
+author = {Djordjevic, J. and Nikolic, B. and Milenkovic, a.},
+file = {::},
+issn = {0018-9359},
+journal = {IEEE Transactions on Education},
+month = may,
+number = {2},
+pages = {264--273},
+title = {{Flexible Web-Based Educational System for Teaching Computer Architecture and Organization}},
+url = {http://ieeexplore.ieee.org/lpdocs/epic03/wrapper.htm?arnumber=1427876},
+volume = {48},
+year = {2005}
+}
+
+@article{Garcia2009,
+author = {Garcia, M. Isabel and Rodriguez, Santiago and Perez, Antonio and Garcia, Antonio},
+file = {::},
+issn = {0018-9359},
+journal = {IEEE Transactions on Education},
+month = may,
+number = {2},
+pages = {248--256},
+title = {{p88110: A Graphical Simulator for Computer Architecture and Organization Courses}},
+url = {http://ieeexplore.ieee.org/lpdocs/epic03/wrapper.htm?arnumber=4909478},
+volume = {52},
+year = {2009}
+}
+
+@article{Martinez-Mones2005,
+author = {Martinez-Mones, a. and Gomez-Sanchez, E. and Dimitriadis, Y.a. and Jorrin-Abellan, I.M. and Rubia-Avi, B. and Vega-Gorgojo, G.},
+file = {::},
+issn = {0018-9359},
+journal = {IEEE Transactions on Education},
+month = aug,
+number = {3},
+pages = {482--489},
+title = {{Multiple Case Studies to Enhance Project-Based Learning in a Computer Architecture Course}},
+url = {http://ieeexplore.ieee.org/lpdocs/epic03/wrapper.htm?arnumber=1495656},
+volume = {48},
+year = {2005}
+}
+
+@article{Quislant2008,
+author = {Quislant, Ricardo and Herruzo, Ezequiel and Plata, Oscar and Benavides, Jos\'{E} Ignacio and Zapata, Emilio L.},
+file = {::},
+issn = {0018-9359},
+journal = {IEEE Transactions on Education},
+month = aug,
+number = {3},
+pages = {336--341},
+title = {{Teaching the Cache Memory System Using a Reconfigurable Approach}},
+url = {http://ieeexplore.ieee.org/lpdocs/epic03/wrapper.htm?arnumber=4544800},
+volume = {51},
+year = {2008}
+}
+@article{Sahuquillo2007,
+author = {Sahuquillo, Julio and Tomas, Noel and Petit, Salvador and Pont, Ana},
+file = {::},
+issn = {0018-9359},
+journal = {IEEE Transactions on Education},
+month = aug,
+number = {3},
+pages = {244--250},
+title = {{Spim-Cache: A Pedagogical Tool for Teaching Cache Memories Through Code-Based Exercises}},
+url = {http://ieeexplore.ieee.org/lpdocs/epic03/wrapper.htm?arnumber=4287124},
+volume = {50},
+year = {2007}
+}
+@article{Verginis2011,
+
+author = {Verginis, Ilias and Gogoulou, Agoritsa and Gouli, Evaggelia and Boubouka, Maria and Grigoriadou, Maria},
+issn = {0018-9359},
+journal = {IEEE Transactions on Education},
+month = feb,
+number = {1},
+pages = {1--13},
+title = {{Enhancing Learning in Introductory Computer Science Courses Through SCALE: An Empirical Study}},
+url = {http://ieeexplore.ieee.org/lpdocs/epic03/wrapper.htm?arnumber=5411930},
+volume = {54},
+year = {2011}
+}
|
|
From: <sv...@ed...> - 2011-05-30 08:20:55
|
Revision: 590
https://www.edumips.org/changeset/590
Author: dpatti
Date: 2011-05-30 10:20:48 +0200 (Mon, 30 May 2011)
Log Message:
-----------
- Sdiregned previous version in order to start from scratch
Modified Paths:
--------------
paper/ieee-tedu/comparison.tex
Modified: paper/ieee-tedu/comparison.tex
===================================================================
--- paper/ieee-tedu/comparison.tex 2011-05-30 08:03:50 UTC (rev 589)
+++ paper/ieee-tedu/comparison.tex 2011-05-30 08:20:48 UTC (rev 590)
@@ -1,131 +1,8 @@
\section{Comparison with Other Simulators}
\label{sec:comparison}
-This section provides a brief overview of the most common simulation platforms
-used for teaching Computer Architecture topics and analyzes how \EM{} compares
-to them.
-In particular, we focus on simulators designed for beginners courses on
-computer organization and architecture. Thus, we will exclude simulators
-addressing topics such as microarchitecture design at RT-level, custom
-instruction-set, or tools strictly focused on architectures that demonstrated
-to be not so effective for teaching the basic principles of a computer
-architecture (e.g. not RISC-like architectures like x86).
+Several different approaches, tools and methologies have been adopted
+in order to enhance the learning process of the basic concepts of
+CPU organization usually taught in introductory Computer Architecture courses.
-The authors of~\cite{nikolic_tedu09} analyze 28 simulators, classifying them
-into 2 different groups: those that allow the user to design a computer
-environment and those that allow the simulation of a target architecture.
-\EM{} fits in the second category, so in this section we will compare it to
-the most representative simulators described in the survey.
-The evaluation criteria proposed by them are of two types: teaching topics
-coverage and simulation features. The first kind of criteria is meant to
-assess how much the simulators are suited to teach the topics of Computer
-Engineering, according to the IEEE Curriculum Guidelines for Undergraduate
-Degree Programs in Computer Engineering \cite{ieee-curricula}; the second kind
-is meant to compare some specific features of the simulators not strictly
-related to teaching topics.
-
-Each key area defined in the first group of criteria is composed by several
-topics, and each simulator is awarded 1 point if it supports that topic
-directly, 0 points if it is not supported and 0.5 points if it is not directly
-supported but support can be achieved in some way.
-
-We followed the subjective evaluation protocol described in~\cite{nikolic-web}
-to see how \EM{} compares to the other simulators presented in the survey, and
-the results are shown in Table~\ref{table:knowledge-units-coverage}.
-
-\begin{table}[t]
- \begin{centering}
- \caption{Coverage of Computer Engineering Topics}
- \begin{tabular}{lr}
- \hline
- \hline
- Knowledge Unit & Coverage\\
- \hline
- Fundamentals of Computer Architecture & 87.50\%\\
- Memory system organization and architecture & 14.28\%\\
- Interfacing and communication & 0.00\%\\
- Device subsystems & 0.00\%\\
- Processor systems design & 10.00\%\\
- Organization of the CPU & 72.72\%\\
- \hline
- Overall & 30.75\%\\
- \hline
- \end{tabular}
- \label{table:knowledge-units-coverage}
- \end{centering}
-\end{table}
-
-\EM{} is not meant to be a comprehensive tool for Computer Engineering
-education, but it aims to be a valuable aid for education in Computer
-Architecture topics. This means that some of the topics contained
-in~\cite{ieee-curricula} are not covered at all (Interfacing and
-Communication, Device subsystems) or very briefly (Processor systems design).
-
-Instead, the simulator is focused on topics related to the basic concepts of
-computer architecture and CPU organization, usually taught in introductory
-Computer Architecture courses, and the coverage values for those areas
-obtained through this evaluation suggest us that \EM{} is a solid teaching aid
-for those courses.
-
-The survey also compares simulators according to their features.
-Table~\ref{table:simulator-features} shows the results of the evaluation of
-\EM{} according to those criteria.
-\begin{table}[t]
- \begin{centering}
- \caption{Evaluation results for the Simulation Features}
- \begin{tabular}{ll}
- \hline
- \hline
- Feature & Evaluation result\\
- \hline
- Scope and complexity & Basic Architecture\\
- Design Support & No\\
- Visual Presentation & Yes\\
- Simulation Flow & Interactive\\
- Simulation Level & Clock level\\
- Implementation Details & Yes\\
- Distance Learning & Yes\\
- \hline
- \end{tabular}
- \label{table:simulator-features}
- \end{centering}
-\end{table}
-
-In addition to the simulators compared in~\cite{nikolic_tedu09}, there are
-three other simulators that can be directly compared to \EM{}.
-
-The first one is SPIM~\cite{spim-web}, an open source MIPS32 simulator with a
-simple user interface for interactive execution and debugging, called QtSpim.
-
-The other simulators that have been a great source of inspiration for the
-design and development of \EM{} are WinDLX~\cite{windlx-web} and
-WinMIPS64~\cite{winmips-web}. They have a very good user interface, with a
-visual dynamic representation of the CPU pipeline, that \EM{} borrowed.
-
-\EM{} tries to take the best from those three simulators, implementing an
-unique feature set: it is a cross-platform visual MIPS64 CPU simulator
-released under a free license (GNU General Public License version 2) and
-suitable for web-based distance learning.
-
-SPIM implements the MIPS32 ISA, is open source and is cross-platform, even if
-a recompilation of the source code might be required, but its GUI does not
-offer a graphical representation of the execution of the program apart from
-the memory and register file contents and input/output.
-
-WinDLX and WinMIPS64 offer a richer visual representation of the CPU state,
-but they are not cross-platform and they are not released under a free
-license.
-
-Finally, none of the three simulators supports distance learning activities,
-an important requirement that also has the nice side effect of making the
-simulator's installation almost effortless. In fact, the only dependency to
-satisfy in order to use \EM{} is the presence of a Java Runtime Environment
-that supports Java 5 or later.
-
-There are some features of each of those three simulators that have not yet
-been implemented in \EM{}, but as described in the Computer Engineering topics
-coverage analysis, all the basic features are already implemented and the
-additional benefits described in the latter part of this section are
-compelling enough to justify its adoption in introductory Computer
-Architecture courses.
|
