[Edumips64-commit] SF.net SVN: edumips64:[599] paper/ieee-tedu

[<sv...@ed...>]

Revision: 599
          https://www.edumips.org/changeset/599
Author:   mpalesi
Date:     2011-06-03 09:53:55 +0200 (Fri, 03 Jun 2011)
Log Message:
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added bios of the authors.

Modified Paths:
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    paper/ieee-tedu/Makefile
    paper/ieee-tedu/paper.tex

Added Paths:
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    paper/ieee-tedu/bios.tex

Modified: paper/ieee-tedu/Makefile
===================================================================
--- paper/ieee-tedu/Makefile	2011-06-02 15:21:21 UTC (rev 598)
+++ paper/ieee-tedu/Makefile	2011-06-03 07:53:55 UTC (rev 599)
@@ -8,7 +8,7 @@
 
 paper.dvi: paper.tex abstract.tex introduction.tex survey.tex \
 	teaching.tex conclusions.tex bibliography.bib related-works.tex \
-	edumips-description.tex
+	edumips-description.tex bios.tex
 	latex paper
 	bibtex paper
 	latex paper

Added: paper/ieee-tedu/bios.tex
===================================================================
--- paper/ieee-tedu/bios.tex	                        (rev 0)
+++ paper/ieee-tedu/bios.tex	2011-06-03 07:53:55 UTC (rev 599)
@@ -0,0 +1,57 @@
+\begin{biographynophoto}{Andrea Spadaccini}...
+\end{biographynophoto}
+
+\begin{biographynophoto}{Davide Patti} (M'06)
+Davide Patti received the Laurea degree and the Ph.D. degree in
+computer engineering at University of Catania, in 2003 and 2007,
+respectively. His research focuses on Platform based system design,
+design space exploration, low-power techniques for embedded systems,
+and Network-on-Chip architectures.
+\end{biographynophoto}
+
+\begin{biographynophoto}{Maurizio
+    Palesi} (M'06) received the M.S. and Ph.D. degrees in computer
+  engineering from the Universit\`a di Catania, Catania, Italy, in
+  1999 and 2003, respectively. Since November 2010 he is Assistant
+  Professor at Kore University, Enna, Italy. Dr. Palesi serves on the
+  Editorial Board of VLSI Design journal as an Associate Editor since
+  May 2007. He has served as a Guest Editor for the VLSI Design
+  Journal - Special Issue on Networks-on-Chip in 2008, as a Guest
+  Editor for the International Journal of High Performance Systems
+  Architecture - Special Issue on Power-Efficient, High Performance
+  General Purpose and Application-Specific Computing Architectures in
+  2009, and as Guest Editor for Elsevier MICPRO Journal - Special
+  Issue on Network-on-Chip Architectures and Design Methodologies in
+  2010. He serves as the Technical Program Committee Member for the
+  following IEEE/ACM International Conferences: RTAS, CODES+ISSS,
+  ESTIMedia, SOCC, VLSI, ISC, and SITIS. He was also the Co-organizer
+  of International Workshops on Network-on-Chip Architectures (NoCArc)
+  in 2008, 2009, and 2010.
+\end{biographynophoto}
+
+\begin{biographynophoto}{Fabrizio
+    Fazzino} (M'08) received the M.S. degree in Computer Engineering
+  from the University of Catania in 1997. Until 2001 he was
+  responsible for the functional verification of 32-bit lines of
+  microprocessors at STMicroelectronics. Since 2004 he collaborates
+  with the Department of Computer and Telecommunications
+  Engineering. He is Silicon Engineer at Icera Inc., Bristol (UK).
+\end{biographynophoto}
+
+\begin{biographynophoto}{Vincenzo
+    Catania} received the M.S. degree with Honors in electrical
+  engineering from the Universit\`a di Catania, Catania, Italy, in
+  1982.  Up until 1984, he was responsible for testing microprocessor
+  system at STMicroelectronics, Catania, Italy. Since 1985, he has
+  cooperated in research on advanced computer architectures and
+  computer networks with the Dipartimento di Ingegneria Informatica e
+  delle Telecomunicazioni, Facolt\`a di Ingegneria, Universit\`a di
+  Catania, where he is currently a Full Professor of Computer
+  Science. Since November 2006, he has served as the Director of the
+  Department of Computer Science and Telecommunications Engineering,
+  Universit\`a di Catania. He is the author of more than 200 articles
+  on international journals and conference proceedings and holds two
+  patents. Currently, his research focuses on pervasive embedded
+  systems, network-on-chip architectures, and mobile terminal platform
+  and services.
+\end{biographynophoto}

Modified: paper/ieee-tedu/paper.tex
===================================================================
--- paper/ieee-tedu/paper.tex	2011-06-02 15:21:21 UTC (rev 598)
+++ paper/ieee-tedu/paper.tex	2011-06-03 07:53:55 UTC (rev 599)
@@ -133,4 +133,8 @@
 
 %------------------------------------------------------------------------------
 
+\input{bios.tex}
+
+%------------------------------------------------------------------------------
+
 \end{document}