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From: <sv...@ed...> - 2011-12-13 11:51:59
|
Revision: 665
https://www.edumips.org/changeset/665
Author: dpatti
Date: 2011-12-13 12:51:45 +0100 (Tue, 13 Dec 2011)
Log Message:
-----------
Moved interface.esp to pictures/
Modified Paths:
--------------
paper/ieee-tedu/edumips-description.tex
Added Paths:
-----------
paper/ieee-tedu/pictures/interface.eps
Removed Paths:
-------------
paper/ieee-tedu/interface.eps
Modified: paper/ieee-tedu/edumips-description.tex
===================================================================
--- paper/ieee-tedu/edumips-description.tex 2011-12-13 11:47:32 UTC (rev 664)
+++ paper/ieee-tedu/edumips-description.tex 2011-12-13 11:51:45 UTC (rev 665)
@@ -9,7 +9,7 @@
\begin{figure*}[!htb]
\centering
- \includegraphics[width=.7\textwidth]{interface.eps}
+ \includegraphics[width=.7\textwidth]{pictures/interface.eps}
\caption{Overview of the EduMIPS64 User Interface}
\label{fig:interface}
\end{figure*}
Deleted: paper/ieee-tedu/interface.eps
===================================================================
--- paper/ieee-tedu/interface.eps 2011-12-13 11:47:32 UTC (rev 664)
+++ paper/ieee-tedu/interface.eps 2011-12-13 11:51:45 UTC (rev 665)
@@ -1,57129 +0,0 @@
-%!PS-Adobe-3.0 EPSF-3.0
-%%Creator: (ImageMagick)
-%%Title: (Progetti/edumips64/paper/ieee-tedu/interface2.eps)
-%%CreationDate: (2011-06-03T11:28:39+02:00)
-%%BoundingBox: -0 -0 1038 712
-%%HiResBoundingBox: 0 0 1037.86 712
-%%DocumentData: Clean7Bit
-%%LanguageLevel: 1
-%%Pages: 1
-%%EndComments
-
-%%BeginDefaults
-%%EndDefaults
-
-%%BeginProlog
-%
-% Display a color image. The image is displayed in color on
-% Postscript viewers or printers that support color, otherwise
-% it is displayed as grayscale.
-%
-/DirectClassPacket
-{
- %
- % Get a DirectClass packet.
- %
- % Parameters:
- % red.
- % green.
- % blue.
- % length: number of pixels minus one of this color (optional).
- %
- currentfile color_packet readhexstring pop pop
- compression 0 eq
- {
- /number_pixels 3 def
- }
- {
- currentfile byte readhexstring pop 0 get
- /number_pixels exch 1 add 3 mul def
- } ifelse
- 0 3 number_pixels 1 sub
- {
- pixels exch color_packet putinterval
- } for
- pixels 0 number_pixels getinterval
-} bind def
-
-/DirectClassImage
-{
- %
- % Display a DirectClass image.
- %
- systemdict /colorimage known
- {
- columns rows 8
- [
- columns 0 0
- rows neg 0 rows
- ]
- { DirectClassPacket } false 3 colorimage
- }
- {
- %
- % No colorimage operator; convert to grayscale.
- %
- columns rows 8
- [
- columns 0 0
- rows neg 0 rows
- ]
- { GrayDirectClassPacket } image
- } ifelse
-} bind def
-
-/GrayDirectClassPacket
-{
- %
- % Get a DirectClass packet; convert to grayscale.
- %
- % Parameters:
- % red
- % green
- % blue
- % length: number of pixels minus one of this color (optional).
- %
- currentfile color_packet readhexstring pop pop
- color_packet 0 get 0.299 mul
- color_packet 1 get 0.587 mul add
- color_packet 2 get 0.114 mul add
- cvi
- /gray_packet exch def
- compression 0 eq
- {
- /number_pixels 1 def
- }
- {
- currentfile byte readhexstring pop 0 get
- /number_pixels exch 1 add def
- } ifelse
- 0 1 number_pixels 1 sub
- {
- pixels exch gray_packet put
- } for
- pixels 0 number_pixels getinterval
-} bind def
-
-/GrayPseudoClassPacket
-{
- %
- % Get a PseudoClass packet; convert to grayscale.
- %
- % Parameters:
- % index: index into the colormap.
- % length: number of pixels minus one of this color (optional).
- %
- currentfile byte readhexstring pop 0 get
- /offset exch 3 mul def
- /color_packet colormap offset 3 getinterval def
- color_packet 0 get 0.299 mul
- color_packet 1 get 0.587 mul add
- color_packet 2 get 0.114 mul add
- cvi
- /gray_packet exch def
- compression 0 eq
- {
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- }
- {
- currentfile byte readhexstring pop 0 get
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- } ifelse
- 0 1 number_pixels 1 sub
- {
- pixels exch gray_packet put
- } for
- pixels 0 number_pixels getinterval
-} bind def
-
-/PseudoClassPacket
-{
- %
- % Get a PseudoClass packet.
- %
- % Parameters:
- % index: index into the colormap.
- % length: number of pixels minus one of this color (optional).
- %
- currentfile byte readhexstring pop 0 get
- /offset exch 3 mul def
- /color_packet colormap offset 3 getinterval def
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- {
- /number_pixels 3 def
- }
- {
- currentfile byte readhexstring pop 0 get
- /number_pixels exch 1 add 3 mul def
- } ifelse
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- {
- pixels exch color_packet putinterval
- } for
- pixels 0 number_pixels getinterval
-} bind def
-
-/PseudoClassImage
-{
- %
- % Display a PseudoClass image.
- %
- % Parameters:
- % class: 0-PseudoClass or 1-Grayscale.
- %
- currentfile buffer readline pop
- token pop /class exch def pop
- class 0 gt
- {
- currentfile buffer readline pop
- token pop /depth exch def pop
- /grays columns 8 add depth sub depth mul 8 idiv string def
- columns rows depth
- [
- columns 0 0
- rows neg 0 rows
- ]
- { currentfile grays readhexstring pop } image
- }
- {
- %
- % Parameters:
- % colors: number of colors in the colormap.
- % colormap: red, green, blue color packets.
- %
- currentfile buffer readline pop
- token pop /colors exch def pop
- /colors colors 3 mul def
- /colormap colors string def
- currentfile colormap readhexstring pop pop
- systemdict /colorimage known
- {
- columns rows 8
- [
- columns 0 0
- rows neg 0 rows
- ]
- { PseudoClassPacket } false 3 colorimage
- }
- {
- %
- % No colorimage operator; convert to grayscale.
- %
- columns rows 8
- [
- columns 0 0
- rows neg 0 rows
- ]
- { GrayPseudoClassPacket } image
- } ifelse
- } ifelse
-} bind def
-
-/DisplayImage
-{
- %
- % Display a DirectClass or PseudoClass image.
- %
- % Parameters:
- % x & y translation.
- % x & y scale.
- % label pointsize.
- % image label.
- % image columns & rows.
- % class: 0-DirectClass or 1-PseudoClass.
- % compression: 0-none or 1-RunlengthEncoded.
- % hex color packets.
- %
- gsave
- /buffer 512 string def
- /byte 1 string def
- /color_packet 3 string def
- /pixels 768 string def
-
- currentfile buffer readline pop
- token pop /x exch def
- token pop /y exch def pop
- x y translate
- currentfile buffer readline pop
- token pop /x exch def
- token pop /y exch def pop
- currentfile buffer readline pop
- token pop /pointsize exch def pop
- /Times-Roman findfont pointsize scalefont setfont
- x y scale
- currentfile buffer readline pop
- token pop /columns exch def
- token pop /rows exch def pop
- currentfile buffer readline pop
- token pop /class exch def pop
- currentfile buffer readline pop
- token pop /compression exch def pop
- class 0 gt { PseudoClassImage } { DirectClassImage } ifelse
-} bind def
-%%EndProlog
-%%Page: 1 1
-%%PageBoundingBox: 0 0 1038 712
-userdict begin
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|
From: <sv...@ed...> - 2011-12-13 11:47:46
|
Revision: 664
https://www.edumips.org/changeset/664
Author: dpatti
Date: 2011-12-13 12:47:32 +0100 (Tue, 13 Dec 2011)
Log Message:
-----------
final corrections
Modified Paths:
--------------
paper/ieee-tedu/abstract.tex
paper/ieee-tedu/bibliography.bib
paper/ieee-tedu/bios.tex
paper/ieee-tedu/conclusions.tex
paper/ieee-tedu/introduction.tex
paper/ieee-tedu/paper.tex
paper/ieee-tedu/related-works.tex
paper/ieee-tedu/survey.tex
paper/ieee-tedu/teaching.tex
Modified: paper/ieee-tedu/abstract.tex
===================================================================
--- paper/ieee-tedu/abstract.tex 2011-12-12 19:50:17 UTC (rev 663)
+++ paper/ieee-tedu/abstract.tex 2011-12-13 11:47:32 UTC (rev 664)
@@ -1,8 +1,8 @@
\begin{abstract}
The topics of computer architecture are always taught using an Assembly
-dialect as an example. The most widespread textbooks in this field use the
+dialect as an example. The most commonly-used textbooks in this field use the
MIPS64 Instruction Set Architecture (ISA) to help students in learning the
-fundamentals of Computer Architecture, because of its orthogonality and its
+fundamentals of computer architecture, because of its orthogonality and its
suitability for real-world applications.
%So students and teachers need tools
%that allow an experimental and practical approach to the theoretical knowledge
Modified: paper/ieee-tedu/bibliography.bib
===================================================================
--- paper/ieee-tedu/bibliography.bib 2011-12-12 19:50:17 UTC (rev 663)
+++ paper/ieee-tedu/bibliography.bib 2011-12-13 11:47:32 UTC (rev 664)
@@ -116,7 +116,7 @@
@Article{edumips_wiley_caee,
author = "Andrea Spadaccini and Davide Patti and Maurizio Palesi and Fabrizio Fazzino",
title = "{EduMIPS64, a Visual CPU Simulator for Teaching Computer Architecture}",
- journal = "{under consideration in another Journal}",
+ journal = "{submitted for publication}",
}
@Article{nikolic_tedu09,
@@ -290,7 +290,7 @@
}
@article{Martinez-Mones2005,
-author = {Martinez-Mones, a. and Gomez-Sanchez, E. and Dimitriadis, Y.a. and Jorrin-Abellan, I.M. and Rubia-Avi, B. and Vega-Gorgojo, G.},
+author = {Martinez-Mones, A. and Gomez-Sanchez, E. and Dimitriadis, Y.a. and Jorrin-Abellan, I.M. and Rubia-Avi, B. and Vega-Gorgojo, G.},
file = {::},
issn = {0018-9359},
journal = {IEEE Transactions on Education},
Modified: paper/ieee-tedu/bios.tex
===================================================================
--- paper/ieee-tedu/bios.tex 2011-12-12 19:50:17 UTC (rev 663)
+++ paper/ieee-tedu/bios.tex 2011-12-13 11:47:32 UTC (rev 664)
@@ -1,8 +1,8 @@
\begin{biographynophoto}{Davide Patti} (M'06)
Davide Patti received the Laurea degree and the Ph.D. degree in
-computer engineering at University of Catania, in 2003 and 2007,
-respectively. He is currently research assistant at the same
-university and his research focuses on Platform based system design,
+Computer Engineering at University of Catania, in 2003 and 2007,
+respectively. He is currently a research assistant at the same
+university and his research focuses on platform based system design,
design space exploration, low-power techniques for embedded systems,
and Network-on-Chip architectures.
\end{biographynophoto}
@@ -16,16 +16,16 @@
\end{biographynophoto}
\begin{biographynophoto}{Maurizio
- Palesi} (M'06) received the M.S. and Ph.D. degrees in computer
- engineering from the University of Catania, Italy, in
- 1999 and 2003, respectively. Since November 2010 he is Assistant
+ Palesi} (M'06) received the M.S. and Ph.D. degrees in Computer
+ Engineering from the University of Catania, Italy, in
+ 1999 and 2003, respectively. Since November 2010 he has been Assistant
Professor at Kore University, Enna, Italy.
%Dr. Palesi serves on the
%Editorial Board of VLSI Design journal as an Associate Editor since
%May 2007.
He has served as a Guest Editor for the VLSI Design
Journal, the International Journal of High Performance Systems
- Architecture, Elsevier MICPRO Journal and ACM Transactions on Embedded
+ Architecture, Elsevier MICPRO Journal and the ACM Transactions on Embedded
Computing Systems.
%He serves as the Technical Program Committee Member for the
%following IEEE/ACM International Conferences: RTAS, CODES+ISSS,
@@ -38,9 +38,10 @@
Fazzino} (M'08) received the M.S. degree in Computer Engineering
from the University of Catania, Italy, in 1997. Until 2001 he was
responsible for the functional verification of 32-bit lines of
- microprocessors at STMicroelectronics. Since 2004 he collaborates
+ microprocessors at STMicroelectronics. Since 2004 he has
+ collaborated
with the Department of Computer and Telecommunications
- Engineering. He is Silicon Engineer at NVIDIA Inc, Bristol (UK).
+ Engineering. He is a silicon engineer at NVIDIA Inc, Bristol (UK).
\end{biographynophoto}
\begin{biographynophoto}{Vincenzo
@@ -54,8 +55,7 @@
computer networks with the Department of Computer Science and
Telecommunications Engineering, University of Catania,
where he is currently a Full Professor of Computer
- Science. Since November 2006, he has served as the Director for this
- Department.
+ Science where since November 2006, he has also been the Director.
%He is the author of more than 200 articles
%on international journals and conference proceedings and holds two
%patents.
Modified: paper/ieee-tedu/conclusions.tex
===================================================================
--- paper/ieee-tedu/conclusions.tex 2011-12-12 19:50:17 UTC (rev 663)
+++ paper/ieee-tedu/conclusions.tex 2011-12-13 11:47:32 UTC (rev 664)
@@ -6,7 +6,6 @@
course that adopted as its main educational tool a visual, free and
platform-independent MIPS64 Instruction-Set Simulator called \EM{}, for its
various features and its user-friendly interface.
-
Several assignments and teaching processes based on \EM{} have been described.
The impact of the adoption of the simulator on the teaching process was
Modified: paper/ieee-tedu/introduction.tex
===================================================================
--- paper/ieee-tedu/introduction.tex 2011-12-12 19:50:17 UTC (rev 663)
+++ paper/ieee-tedu/introduction.tex 2011-12-13 11:47:32 UTC (rev 664)
@@ -27,8 +27,8 @@
analyzing the different sub-systems of the computer system separately makes it
difficult for the student to understand how those parts interact, with a
consequent blinding of student to the system-level view. Moreover since most
-ISS do not offer the other capabilities mentioned above, like platform
-independence or distance learning support it is difficult to base
+ISS do not offer the other capabilities mentioned above, such as platform
+independence or distance learning support, it is difficult to base
a solid and compelling computer architecture course on them.
This paper is focused on the description and assessment of a computer
Modified: paper/ieee-tedu/paper.tex
===================================================================
--- paper/ieee-tedu/paper.tex 2011-12-12 19:50:17 UTC (rev 663)
+++ paper/ieee-tedu/paper.tex 2011-12-13 11:47:32 UTC (rev 664)
@@ -88,8 +88,7 @@
%------------------------------------------------------------------------------
\begin{IEEEkeywords}
- Instruction-set Simulator; Teaching Methodology; Assembly Programming;
- Visual Simulation; Distance learning.
+Assembly programming, distance learning, instruction-set simulator, teaching methodology, visual simulation
\end{IEEEkeywords}
%------------------------------------------------------------------------------
Modified: paper/ieee-tedu/related-works.tex
===================================================================
--- paper/ieee-tedu/related-works.tex 2011-12-12 19:50:17 UTC (rev 663)
+++ paper/ieee-tedu/related-works.tex 2011-12-13 11:47:32 UTC (rev 664)
@@ -32,7 +32,7 @@
microprocessor, with the aim of reducing the effort of using many
different simulators to cover the topics of a typical computer
architecture course. \cite{Quislant2008} shows how an
-educational framework was been used in introductory
+educational framework was used in introductory
computer architecture and engineering courses to teach some topics related to
the tuning of cache parameters to optimize performance
and energy consumption. \cite{Sahuquillo2007} presents a
Modified: paper/ieee-tedu/survey.tex
===================================================================
--- paper/ieee-tedu/survey.tex 2011-12-12 19:50:17 UTC (rev 663)
+++ paper/ieee-tedu/survey.tex 2011-12-13 11:47:32 UTC (rev 664)
@@ -15,9 +15,9 @@
\end{itemize}
An online form~\cite{edumips64_survey} was completed by a total
-of 93 students enrolled in undergraduate\footnote{students who are
- going to take the Bachelor degree and familiar with basic computer science
- concepts} computer
+of 93 students enrolled in undergraduate\footnote{Students who are
+ going to take the Bachelor's degree and are familiar with basic computer science
+ concepts.} computer
architecture courses~\cite{course_unict,course_unikore} in the period
2008-2010. The main goal of the questions posed was to capture the
perceived effectiveness of the \EM{} tool and the adopted methodology,
@@ -62,7 +62,7 @@
\begin{figure}
\centering
\includegraphics[width=0.5\textwidth]{pictures/understanding_topics.eps}
- \caption{Results of the assesment survey}
+ \caption{Impact of EduMIPS64 on student understanding of topics}
\label{fig:topics}
\end{figure}
An interesting issue to investigate was the impact of the adopted
@@ -97,5 +97,5 @@
%consequence of the increased motivation and participation to the
%laboratory sessions as discussed above.
Note that the second
-attempt shows a lower result with \EM{}, because an increasing number of the
-students have no need to take the exam for a second time.
+attempt shows a lower result with \EM{}, because an increasing number of
+students have no need to take the exam a second time.
Modified: paper/ieee-tedu/teaching.tex
===================================================================
--- paper/ieee-tedu/teaching.tex 2011-12-12 19:50:17 UTC (rev 663)
+++ paper/ieee-tedu/teaching.tex 2011-12-13 11:47:32 UTC (rev 664)
@@ -39,7 +39,7 @@
I-type and J-type) and even the concept of endianness (ordering of bytes within
words into memory).
-So, a first step with \EM{} should be to show how an assembly source
+So a first step with \EM{} should be to show how an assembly source
file written following a MIPS-like syntax is loaded into memory and
how the resulting binary content, shown as hexadecimal, appears in
the \emph{data} and \emph{code} windows. At this stage of the course
@@ -66,7 +66,7 @@
them.}
\end{itemize}
-\subsection{Understanding the MIPS Instruction set}
+\subsection{Understanding the MIPS Instruction Set}
The behavior of each instruction of the MIPS instruction set, and its effect on
registers, memory and code execution, are certainly some of the most tricky
concepts to deal with, from both the teaching and learning perspectives. In an
@@ -151,14 +151,14 @@
\subsection{Understanding I/O and System Calls}
These concepts are often addressed in the second part of the course,
-depending on the whole course organization. Nevertheless they can be
+depending on the overall course organization. Nevertheless they can be
easily accessed using the \texttt{SYSCALL} instruction of \EM{}. There
are two main classes of assignments that involve the usage of the
\texttt{SYSCALL} instruction:
\begin{itemize}
\item Assignments that test the students' ability to put the inputs of the
\texttt{SYSCALL} in the \texttt{.data} section properly and then get the
- outputs when the \texttt{SYSCALL} has ended
+ outputs when the \texttt{SYSCALL} has ended.
\item Assignments that stress the usage of \texttt{SYSCALL} in combination with
an external routine, called \texttt{input\_unsigned}, provided with \EM{} as
part of sample source code.
@@ -168,7 +168,7 @@
complexity of the algorithms that can be developed. This class
exploits the usage of the \texttt{input\_unsigned} routine
to facilitate the interactive input of unsigned integer values. The students
-must include it in their programs using the \texttt{\#include}
+must include this in their programs using the \texttt{\#include}
directive and then call it when necessary by jumping to the routine
using the \texttt{jal input\_unsigned} instruction. When the routine
execution has ended, the read unsigned integer value can be found on
|
|
From: <sv...@ed...> - 2011-12-12 19:50:23
|
Revision: 663
https://www.edumips.org/changeset/663
Author: lupino3
Date: 2011-12-12 20:50:17 +0100 (Mon, 12 Dec 2011)
Log Message:
-----------
Last fix
Modified Paths:
--------------
paper/ieee-tedu/paper.tex
Modified: paper/ieee-tedu/paper.tex
===================================================================
--- paper/ieee-tedu/paper.tex 2011-12-12 19:48:22 UTC (rev 662)
+++ paper/ieee-tedu/paper.tex 2011-12-12 19:50:17 UTC (rev 663)
@@ -66,7 +66,7 @@
\title{Supporting Undergraduate Computer Architecture Students Using a Visual
MIPS64 CPU Simulator}
-\author{Davide~Patti,~\emph{Member,~IEEE}, Andrea~Spadaccini,~\emph{Graduate~Student~Member,~IEEE},
+\author{Davide~Patti,~\emph{Member,~IEEE}, Andrea~Spadaccini,~\emph{Student~Member,~IEEE},
Maurizio~Palesi,~\emph{Member,~IEEE}, Fabrizio~Fazzino,~\emph{Member,~IEEE}
and Vincenzo~Catania\thanks{D. Patti, A. Spadaccini and V. Catania are with the Dipartimento di
Ingegneria Elettrica, Elettronica ed Informatica, University of
|
|
From: <sv...@ed...> - 2011-12-12 19:48:31
|
Revision: 662
https://www.edumips.org/changeset/662
Author: lupino3
Date: 2011-12-12 20:48:22 +0100 (Mon, 12 Dec 2011)
Log Message:
-----------
Corrections by the editor
Modified Paths:
--------------
paper/ieee-tedu/Makefile
paper/ieee-tedu/abstract.tex
paper/ieee-tedu/conclusions.tex
paper/ieee-tedu/edumips-description.tex
paper/ieee-tedu/introduction.tex
paper/ieee-tedu/paper.tex
paper/ieee-tedu/related-works.tex
paper/ieee-tedu/survey.tex
paper/ieee-tedu/teaching.tex
Modified: paper/ieee-tedu/Makefile
===================================================================
--- paper/ieee-tedu/Makefile 2011-12-09 09:58:55 UTC (rev 661)
+++ paper/ieee-tedu/Makefile 2011-12-12 19:48:22 UTC (rev 662)
@@ -21,7 +21,7 @@
ghostview paper.ps&
showpdf: paper.pdf
- acroread paper.pdf&
+ evince paper.pdf
clean:
rm -f *.pdf *.aux *.bbl *.blg *.log *.dvi *.ps
Modified: paper/ieee-tedu/abstract.tex
===================================================================
--- paper/ieee-tedu/abstract.tex 2011-12-09 09:58:55 UTC (rev 661)
+++ paper/ieee-tedu/abstract.tex 2011-12-12 19:48:22 UTC (rev 662)
@@ -1,7 +1,7 @@
\begin{abstract}
-The topics of Computer Architecture are always taught using an Assembly
-dialect as an example. The most widespread books in this field use the MIPS64
-Instruction Set Architecture (ISA) to help students in learning the
+The topics of computer architecture are always taught using an Assembly
+dialect as an example. The most widespread textbooks in this field use the
+MIPS64 Instruction Set Architecture (ISA) to help students in learning the
fundamentals of Computer Architecture, because of its orthogonality and its
suitability for real-world applications.
%So students and teachers need tools
@@ -12,15 +12,14 @@
This paper shows how to use the \EM{} visual CPU Simulator as a supporting
tool for teaching the standard topics covered by an undergraduate course in
-Computer Architecture. The proposed approach is first compared with other
+computer architecture. The proposed approach is first compared with other
similar works in the field, then, after a short description of the simulator,
the paper focuses on how it can be used for teaching specific topics in an
-undergraduate Computer Architecture course.
+undergraduate computer architecture course.
-This discussion is then followed by a quantitative assessment of the
-suitability of the simulator, by means of a survey compiled by students
-themselves, and the results prove that \EM{} is suitable for the purpose it
-has been built for, that is, supporting the learning process of Computer
-Architecture topics.
+This discussion is then followed by a quantitative assessment of the suitability
+of the simulator, by means of a survey compiled by students themselves; the
+results show that \EM{} is suitable for the purpose for which it was built, that
+is, supporting the learning process of computer architecture topics.
\end{abstract}
Modified: paper/ieee-tedu/conclusions.tex
===================================================================
--- paper/ieee-tedu/conclusions.tex 2011-12-09 09:58:55 UTC (rev 661)
+++ paper/ieee-tedu/conclusions.tex 2011-12-12 19:48:22 UTC (rev 662)
@@ -1,18 +1,17 @@
\section{Conclusions}
\label{sec:conclusions}
-Computer Architecture and Organization is one of the core topics that a solid
-Computer engineer needs to master in order to be successful. This paper
-presented the outline of an undergraduate-level Computer Architecture course
-that adopts as the main educational tool a visual, free and
-platform-independent MIPS64 Instruction-Set Simulator called \EM{}.
+Computer architecture and organization is one of the core topics that a
+well-educated computer engineer needs to master in order to be successful. This
+paper presented the outline of an undergraduate-level computer architecture
+course that adopted as its main educational tool a visual, free and
+platform-independent MIPS64 Instruction-Set Simulator called \EM{}, for its
+various features and its user-friendly interface.
-The features of the simulator and its user-friendly interface allowed for its
-adoption as the main tool of the course, and several assignments and teaching
-processes that revolve around it have been described.
+Several assignments and teaching processes based on \EM{} have been described.
-The evaluation of the impact of the adoption of the simulator on the teaching
-process was carried on by means of a survey compiled by students after the
-completion of the course; this feedback allowed to confirm our hypothesis on the
-suitability of \EM{} for the course, and also contributed to an objective
-analysis of its strengths and weaknesses, that will be useful to plan the future
+The impact of the adoption of the simulator on the teaching process was
+evaluated by means of a survey completed by students after the completion of the
+course; this feedback confirmed the authors' hypothesis on the suitability of
+\EM{} for the course, and also contributed to an objective analysis of the
+simulator's strengths and weaknesses, that will be useful in planning future
development work.
Modified: paper/ieee-tedu/edumips-description.tex
===================================================================
--- paper/ieee-tedu/edumips-description.tex 2011-12-09 09:58:55 UTC (rev 661)
+++ paper/ieee-tedu/edumips-description.tex 2011-12-12 19:48:22 UTC (rev 662)
@@ -1,10 +1,10 @@
\section{Description of the Simulator}
\label{sec:em_description}
-As stated in the previous section, EduMIPS64 is a visual MIPS64 Instruction Set
-Simulator; in the reminder of this section, the main features of the simulator
+As stated above, EduMIPS64 is a visual MIPS64 Instruction Set
+Simulator; in this section, the main features of the simulator
and of its graphical user interface will be briefly described. For more
details on the simulator, please refer to \cite{edumips_wiley_caee}.
-Figure~\ref{fig:interface} shows an overview of the User Interface of the
+Fig.~\ref{fig:interface} shows an overview of the user interface of the
simulator.
\begin{figure*}[!htb]
@@ -36,17 +36,17 @@
% \end{centering}
%\end{table*}
-\subsection{Architectural features}
+\subsection{Architectural Features}
\subsubsection{Pipeline}
\EM{} implements a 5-stages pipeline that allows for instruction-level
parallelism. As each virtual CPU cycle is executed, the user interface updates
-all of its components in order to offer an appealing and insightful
-representation of the current program execution state. The 5 stages of the
+all its components to offer an appealing and informative
+representation of the current program execution state. The five stages of the
pipeline are drawn in one of the sub-windows of the simulator and each stage
of the pipeline contains a representation of the instruction that is being
executed.
-\EM{} implements a rich subset of the MIPS64 ISA, composed by 65 instructions.
+\EM{} implements a rich subset of the MIPS64 ISA, comprising 65 instructions.
\subsubsection{Forwarding}
The simulator provides built-in support for instruction forwarding, so that
students can evaluate the performance of their programs with or without
@@ -56,31 +56,31 @@
\EM{} generates trace files containing the memory accesses that are performed
by the simulated program in a format compatible with the DineroIV
\cite{dinero-web} cache simulator; there is also a built-in interface
-for invoking the command line of DineroIV cache simulator using the
-produced trace file. In this way, the student can test different cache
+for invoking the command line of the DineroIV cache simulator using the
+trace file produced. This allows a student to test different cache
scenarios without having to exit the \EM{} interface.
\subsubsection{Interrupts and System Calls}
-The simulator gives to the student an interface for system calls via the
-\texttt{SYSCALL} instruction, that simulates basic console and file I/O
+Via the \texttt{SYSCALL} instruction the simulator gives to the student an
+interface for system calls, that simulates basic console and file I/O
operations, and provides support for maskable synchronous exceptions.
\subsection{The User Interface}
\label{subsec:gui}
-The user interface of \EM{} is similar to the one provided by WinMIPS64
+The user interface of \EM{} is similar to that provided by WinMIPS64
\cite{winmips-web} and WinDLX \cite{windlx-web}. It adopts the Multiple
Document Interface paradigm, with a main window that contains the individual
frames that represent a given aspect of the simulation. Each stage of the
pipeline is associated with a given (customizable) color, that is used
-throughout the user interface to represent events and data associated with
-that stage, allowing the student to easily correlate different sections of the
-interface that are related to what happens in a given pipeline stage.
+throughout the user interface to represent the events and data associated with
+that stage, allowing the student to easily correlate the various sections of the
+interface with what happens in a given pipeline stage.
-The 7 frames of the simulator interface offer at a glance many details
-about the current and past status of the simulation: the current content of
+The seven frames of the simulator interface give at a glance many details
+of the current and past status of the simulation: the current content of
memory and General Purpose Registers; a graphical representation of the
-pipeline stages and the instructions that are in each of them; the code of the
-program; some statistics on the execution like the number of Cycles Per
+pipeline stages and the instructions in each stage; the program code;
+and some statistics on the execution, such as the number of Cycles Per
Instruction (CPI) and the number and class of stalls.
% The frames are:
% \begin{itemize}
@@ -103,7 +103,7 @@
% when some \texttt{SYSCALL} instructions are executed.
% \end{itemize}
-The user interface offers to the student the ability to execute the program
-step-wise or at once; it can also be chosen whether during multi-step
+The user interface allows the student to execute the program either
+step-wise or at once, and to choose whether during multi-step
execution the interface should display each intermediate step or if it should
-only show the final stage --- useful for the execution of long programs.
+only show the final stage, which is useful for the execution of long programs.
Modified: paper/ieee-tedu/introduction.tex
===================================================================
--- paper/ieee-tedu/introduction.tex 2011-12-09 09:58:55 UTC (rev 661)
+++ paper/ieee-tedu/introduction.tex 2011-12-12 19:48:22 UTC (rev 662)
@@ -1,12 +1,12 @@
\section{Introduction}
\label{sec:intro}
-\PARstart{C}{omputer} Architecture and Organization is one of the key
+\PARstart{C}{omputer} architecture and organization is one of the key
elements which characterizes the curricula of electrical and computer
engineers \cite{ieee-curricula}. One of the most critical aspects on teaching
this discipline is how to support the theoretical concepts of the subjects
-with appropriate practical experiences usually organized as laboratory
-assignments. Such experiences are mainly aimed at performing a quantitative
+with appropriate practical experience, usually organized as laboratory
+assignments. Such experience is mainly aimed at performing a quantitative
analysis on the system parameters related to both the \emph{computer
architecture} (which encompasses the programmer's abstract view of the
machine) and the \emph{computer organization} (which deals with implementation
@@ -17,30 +17,30 @@
part of the course. In this context, visual representation of the concepts
introduced in the course, platform independence, distance learning support,
free availability of the tools and full coverage of the course topics are key
-factors which determine the effectiveness of the teaching armaments.
+factors which determine the effectiveness of the teaching resources.
Unfortunately, some of the available educational ISSs focus on specific
aspects of a computer system, like assembly language~\cite{spim-web},
pipelining~\cite{windlx-web} or memory hierarchy~\cite{dinero-web}; the
heterogeneous nature of the tools used to cover the different topics of the
-course, could lead to a fragmentation of the knowledge. In fact, analyzing
-separately the different sub-systems of the computer system makes it difficult
-for the student to understand how those parts interact with each other, with a
-consequent blinding of the system-level view. Moreover most of them do not
-offer the other qualities mentioned before, like platform independence or
-distance learning support, and this makes it difficult to base on those tools
-a solid and involving Computer Architecture course.
+course, could lead to a fragmentation of the knowledge acquired. In fact,
+analyzing the different sub-systems of the computer system separately makes it
+difficult for the student to understand how those parts interact, with a
+consequent blinding of student to the system-level view. Moreover since most
+ISS do not offer the other capabilities mentioned above, like platform
+independence or distance learning support it is difficult to base
+a solid and compelling computer architecture course on them.
-This paper is focused on the description and assessment of a Computer
-Architecture undergraduate course in which the \EM{} simulator
-\cite{edumips_wiley_caee} has been employed as the primary tool for explaining
+This paper is focused on the description and assessment of a computer
+architecture undergraduate course in which the \EM{} simulator
+\cite{edumips_wiley_caee} was employed as the primary tool for explaining
the topics, for the students' homework and for the final exam. \EM{} is a free
-visual MIPS64 CPU simulator built over the last 5 years at the University of
-Catania.
+visual MIPS64 CPU simulator built over the last five years at the University of
+Catania, Italy.
The rest of the paper is organized as follows. Section~\ref{sec:related-works}
provides a brief overview on available tools and methodologies aimed at
-enhancing the learning process of the topics in an undergraduate course of
+enhancing the learning process of the topics in an undergraduate course on
basic computer architectures. Section~\ref{sec:em_description} presents the
main features of \EM{} used as the reference simulation platform in this
paper. The teaching methodology based on the use of \EM{} is presented in
Modified: paper/ieee-tedu/paper.tex
===================================================================
--- paper/ieee-tedu/paper.tex 2011-12-09 09:58:55 UTC (rev 661)
+++ paper/ieee-tedu/paper.tex 2011-12-12 19:48:22 UTC (rev 662)
@@ -63,7 +63,7 @@
%------------------------------------------------------------------------------
-\title{Supporting Undergraduate Computer Architecture Students using a Visual
+\title{Supporting Undergraduate Computer Architecture Students Using a Visual
MIPS64 CPU Simulator}
\author{Davide~Patti,~\emph{Member,~IEEE}, Andrea~Spadaccini,~\emph{Graduate~Student~Member,~IEEE},
@@ -87,10 +87,10 @@
%------------------------------------------------------------------------------
-\begin{keywords}
+\begin{IEEEkeywords}
Instruction-set Simulator; Teaching Methodology; Assembly Programming;
Visual Simulation; Distance learning.
-\end{keywords}
+\end{IEEEkeywords}
%------------------------------------------------------------------------------
@@ -118,9 +118,9 @@
%------------------------------------------------------------------------------
-\section{Acknowledgments}
+\section*{Acknowledgments}
The authors hereby acknowledge the fundamental contribution of all the developers of
-\EM{}, whose names are listed in the About Us dialog of the simulator itself.
+\EM{}, who are listed in the About Us dialog of the simulator itself.
%------------------------------------------------------------------------------
Modified: paper/ieee-tedu/related-works.tex
===================================================================
--- paper/ieee-tedu/related-works.tex 2011-12-09 09:58:55 UTC (rev 661)
+++ paper/ieee-tedu/related-works.tex 2011-12-12 19:48:22 UTC (rev 662)
@@ -1,60 +1,60 @@
-\section{Related Works}
+\section{Related Work}
\label{sec:related-works}
-Several different tools and methodologies have been adopted
-in order to enhance the learning process of the basic concepts of
-CPU organization usually taught in introductory Computer Architecture courses.
-Some approaches focus on the adopted framework (e.g.
+Various tools and methodologies have been adopted
+to enhance the learning process of the basic concepts of
+CPU organization usually taught in introductory computer architecture courses.
+Some approaches focus on the framework adopted (e.g.
simulators, web-based learning, games), while others try to exploit the positive
effects of collaborative projects in improving students' motivation.
% social/collaborative
-In~\cite{Anguita2007} the authors propose a method and activity
+In~\cite{Anguita2007} the authors propose a method and an activity
designed to improve student motivation in computer architecture
courses by showing them how to successfully optimize the assembly code
produced.
An educational experience of teaching computer architecture topics
using a project-based learning is described and evaluated
-in~\cite{Martinez-Mones2005}. The main idea is using a collaborative approach
-where students are assigned to different subprojects but still have to
-exchange some acquired knowledge in order to complete their tasks.
-Authors of~\cite{Verginis2011} present a web-based environment to
-support the learning process in introductory computer science course
-using a customizable e-learning approach.
+in~\cite{Martinez-Mones2005}. The main idea was that of using a collaborative
+approach where students were assigned to different sub-projects but still had to
+exchange some acquired knowledge in order to complete their tasks.
+~\cite{Verginis2011} presents a Web-based environment to support the learning
+process in an introductory computer science course using a customizable e-learning
+approach.
%tool oriented
As regards tools-based approaches, computer architecture topics are
-addressed at different levels of abstraction and granularity. The
-work~\cite{Djordjevic2005} introduces an educational computer system
+addressed at different levels of abstraction and granularity.
+\cite{Djordjevic2005} introduces an educational computer system
specifically designed to help teach architecture topics from the
designer's perspective. In~\cite{Garcia2009} the authors propose a
-pedagogical and fully configurable simulator of the MC88110 32-bit
-microprocessor, with the aim to reduce the effort of using many
+pedagogical and fully-configurable simulator of the MC88110 32-bit
+microprocessor, with the aim of reducing the effort of using many
different simulators to cover the topics of a typical computer
-architecture course. The work in~\cite{Quislant2008} shows how an
-educational framework has been used in introductory courses on
-Computer Architecture and Engineering to teach some topics related to
-the tuning of cache parameters with the aim of optimizing performance
-and energy consumption. In~\cite{Sahuquillo2007} authors present a
+architecture course. \cite{Quislant2008} shows how an
+educational framework was been used in introductory
+computer architecture and engineering courses to teach some topics related to
+the tuning of cache parameters to optimize performance
+and energy consumption. \cite{Sahuquillo2007} presents a
pedagogical tool for dealing with code-based exercises expressly
focused on cache memory related topics.
% added references
In~\cite{nikolic_tedu09} the authors compare 28 pedagogical tools,
-classifying them in 2 categories: those that allow to design a complete computer
+classifying them in two categories: those that allow the design of a complete computer
environment and those that instead focus on the simulation of a target
-architecture. EduMIPS64 fits in the second category, and while it does not try
+architecture. EduMIPS64 fits in the second category; while it does not try
to implement all the architectural features offered by many of those simulators,
it instead focuses mainly on topics related to the basic concepts of computer
architecture and CPU organization, making it suitable for undergraduates.
-Finally, two simulators in particular that have been a great source of inspiration for the
+Finally, two simulators that in particular have been a great source of inspiration for the
design and development of \EM{} are WinDLX~\cite{windlx-web} and
WinMIPS64~\cite{winmips-web}. \EM{} tries to take the best from those
simulators, adding platform independence and a support for
-DineroIV~\cite{dinero-web} cache simulator.
+the DineroIV~\cite{dinero-web} cache simulator.
The main advantage of EduMIPS64 over these tools is the combination of
features not strictly related to simulation: it is open source,
suitable for web-based distance learning activities and cross
-platform, an unique feature set in the field of didactic CPU
+platform; this constitutes a unique feature set in the field of didactic CPU
simulators.
Modified: paper/ieee-tedu/survey.tex
===================================================================
--- paper/ieee-tedu/survey.tex 2011-12-09 09:58:55 UTC (rev 661)
+++ paper/ieee-tedu/survey.tex 2011-12-12 19:48:22 UTC (rev 662)
@@ -1,50 +1,51 @@
\section{Assessment Survey and Evaluation}
\label{sec:survey}
-A survey was conducted in order to obtain feedback on the effectiveness of the
-adopted methodology from the students, after the completion of the course.
-The survey was designed to investigate the following areas:
+A student survey was conducted at the end of the courses to obtain feedback on the
+effectiveness of the adopted methodology. The survey was designed to
+investigate the following areas:
\begin{itemize}
-\item {\bf Simulation environment:} issues regarding the easiness of use
+\item {\bf Simulation environment:} issues regarding the ease of use
of the adopted tool, i.e. the user interface, the learning curve
-faced when learning the \EM{} simulator, the consistency and
-readability the whole learning environment.
-\item {\bf Impact on learning:} investigate how \EM{} was effective in helping
- them understand the course topics, increasing their motivation to learn.
+faced when learning the \EM{} simulator, and the consistency and
+readability of the whole learning environment.
+\item {\bf Impact on learning:} the extent to which \EM{} was effective in
+ helping students to understand the course topics and increasing their
+ motivation to learn.
\end{itemize}
-An online form~\cite{edumips64_survey} was created, involving a total
-of 93 students belonging to undergraduate\footnote{students who are
+An online form~\cite{edumips64_survey} was completed by a total
+of 93 students enrolled in undergraduate\footnote{students who are
going to take the Bachelor degree and familiar with basic computer science
concepts} computer
architecture courses~\cite{course_unict,course_unikore} in the period
-2008-2010. The main goal of the proposed questions was to capture the
+2008-2010. The main goal of the questions posed was to capture the
perceived effectiveness of the \EM{} tool and the adopted methodology,
the usage frequency, and impact on the learning of several key topics
of computer architecture and organization. The results
collected~\cite{edumips64_survey} have been summarized in the
-subsections~\ref{sec:impact_environment}
+Subsections~\ref{sec:impact_environment}
and~\ref{sec:impact_learning}.
-\subsection{Simulation environment}
+\subsection{Simulation Environment}
\label{sec:impact_environment}
-Usability and easiness of use are one of the main reasons behind the
+Usability and ease of use are the prime reasons behind the
adoption of the \EM{} project as the course's simulation environment.
-A first aspect that was investigated is the general
-speed/responsiveness of the simulator that, because of running on an
-high-level Java virtual machine could suffer some performance/memory
-usage issues. However, $19\%$ of users evaluated as excellent the
-performance of the simulator and $60\%$ of them considered it good,
-while $18\%$ think that it was sufficient and $3\%$ considered it
-poor. The graphical user interface of \EM{} was evaluated as
-excellent by $60\%$ of users, $20\%$ of them found it good while the
-remaining $19\%$ and $1\%$ found it sufficient and poor respectively.
+A first aspect investigated was the general
+speed/responsiveness of the simulator that, since running on an
+high-level Java virtual machine could cause some performance/memory
+use issues. However, $19\%$ of the users rated the
+performance of the simulator as excellent and $60\%$ of them considered it good,
+while $18\%$ thought it was adequate and $3\%$ considered it
+poor. The graphical user interface of \EM{} was rated as
+excellent by $60\%$ of users, $20\%$ of them found it good and the
+remaining $19\%$ and $1\%$ found it adequate and poor respectively.
Summarizing these results, it can definitely be concluded that the
-choice of using Java as a cross-platform technology did not penalize
+choice of using Java as a cross-platform technology did not degrade
the user-experience from both the performance and visual points of
view, since only a negligible fraction of the users rated \EM{} as
-less than sufficient.
+less than adequate.
\subsection{Impact on Learning}
\label{sec:impact_learning}
@@ -53,10 +54,9 @@
%% Only a small percentage of them, less than $8\%$, used \EM{} for less
%% than 10\% of the time period ranging from the beginning of the course
%% to the exam.
-Only a small percentage of them, less than $8\%$, used \EM{} for less
-than 10\% of the study time that they allocated for this course. About
-$20\%$ of them used \EM{} for the $20\%-30\%$ of the time, whereas the
-remaining $70\%$ of them declared to have spent more than $40\%$ of
+Less than $8\%$ of the students used \EM{} for less than 10\% of the study time
+allocated for this course. About $20\%$ of them used \EM{} for $20\%-30\%$ of
+the time, whereas the remaining $70\%$ claimed to have spent more than $40\%$ of
the time on \EM{}.
\begin{figure}
@@ -66,20 +66,18 @@
\label{fig:topics}
\end{figure}
An interesting issue to investigate was the impact of the adopted
-methodology on the understanding of the different topics encountered during the
+methodology on student understanding of the different topics encountered during the
course. Note that some topics that are usually strictly related to the
theoretical
part of a computer architecture course were deliberately included, in order to
-capture more accurately to which extent, even indirectly, the
-adoption of \EM{} can affect the learning process and the students'
-motivation. Figure~\ref{fig:topics} summarizes the result obtained,
-showing that the experience with \EM{} seems to influence (even if with
-different power) all the topics presented in the survey: it can
-be observed an obvious predominance of topics like
-registers and data encoding - due to bit-accurate encoding
-- and the assembly programming and pipelining, positively
-impacted by the visual representation of the CPU during the execution of
-instructions flow.
+capture more accurately to what extent, even indirectly, the
+adoption of \EM{} can affect the learning process and student
+motivation. Fig.~\ref{fig:topics} summarizes the results obtained,
+and shows that the experience with \EM{} seems to influence to a greater or
+lesser extent all the topics presented in the survey; topics particularly
+impacted included registers and data encoding --- due to bit-accurate encoding
+--- and assembly programming and pipelining, because of the visual
+representation of the CPU during the execution flow of the instructions.
\begin{figure}
\centering
@@ -88,17 +86,16 @@
of attempts to pass the final examination}
\label{fig:percentage_of_success}
\end{figure}
-Finally, Figure~\ref{fig:percentage_of_success} shows how the average
+Finally, Fig.~\ref{fig:percentage_of_success} shows how the average
percentage of success is distributed across the number of attempts
required to pass the final examination. As can be observed, although
-the fraction of students requiring three or more attempts is not
+those students requiring three or more attempts were not
particularly affected, the adoption of the methodology since 2008
-seems to increase the number of students that successfully pass the
-first examination (about 22\% improvement on average).
+seems to increase the number of students who pass the
+first examination at the first attempt (about 22\% improvement on average).
%, probably as
%consequence of the increased motivation and participation to the
%laboratory sessions as discussed above.
Note that the second
-attempt shows a lower result with \EM{}, because an increasing part of the
-students that attended the first exam won't need a second try.
-
+attempt shows a lower result with \EM{}, because an increasing number of the
+students have no need to take the exam for a second time.
Modified: paper/ieee-tedu/teaching.tex
===================================================================
--- paper/ieee-tedu/teaching.tex 2011-12-09 09:58:55 UTC (rev 661)
+++ paper/ieee-tedu/teaching.tex 2011-12-12 19:48:22 UTC (rev 662)
@@ -1,7 +1,7 @@
\section{Teaching Methodology}
\label{sec:teaching}
-\EM{} is tailored for use in introductory courses of Computer Architecture
-usually taught in electrical engineering or computer science curricula.
+\EM{} is tailored for use in introductory computer architecture courses,
+usually taught in Electrical Engineering or Computer Science curricula.
%It can be successfully adopted as the main tool to teach the basics of the
%way in which a Central Processing Unit (CPU) and the memory hierarchy work.
These courses usually start with an ``onion view'' of a computer
@@ -9,12 +9,11 @@
system seen as a stack of layers, and where a usual level of abstraction is given
by the bare-metal CPU able to execute assembly sources translated (``assembled'')
into binary machine code.
-\EM{} can be productively used to test and improve the students'
-understanding of the following topics: instructions and data encoding;
-the MIPS instruction set; pipelining; I/O and system calls; the memory
-hierarchy; Amdahl's law. More advanced topics, such as as scoreboard,
-Tomasulo scheduling or virtual memory, are not covered since they
-were not part of the courses chosen in this work.
+\EM{} can be productively used to test and improve student understanding of:
+instructions and data encoding; the MIPS instruction set; pipelining; I/O and
+system calls; the memory hierarchy; and Amdahl's law. More advanced topics, such
+as scoreboard, Tomasulo scheduling or virtual memory, are not covered since
+they were not on the syllabi of the courses at which this work was directed.
%\begin{itemize}
%\item {Instruction/Data encoding}
@@ -26,19 +25,18 @@
%\end{itemize}
In the next sections the teaching methodology adopted for each of the areas
-listed above will briefly be described, followed by some proof-of-concept
+listed above will be briefly described, followed by some proof-of-concept
assignments that show concrete examples of how \EM{} can be exploited to
-assess students' knowledge. They can be used in the end-course final
-examination, but also during frontal lessons and as homework assignments, in
+assess student knowledge. These can be used in the course final
+examination, but also during lectures and as homework assignments, in
order to receive immediate feedback on the learning process.
\subsection{Understanding the Instructions and Data Encoding}
-As regards the computer architecture course addressed in this paper,
-the initial part of the program will not only require the teacher to
-explain the fundamental concepts of instruction-set architectures and
-assembly language, but also hexadecimal number conversions,
-instruction encoding (with the three main types: R-type, I-type and
-J-type) and even the concept of endianness (ordering of bytes within
+The initial part of the syllabus of the computer architecture course addressed
+in this paper requires the teacher to explain not only the fundamental concepts
+of instruction-set architectures and assembly language, but also hexadecimal
+number conversions, instruction encoding (with the three main types: R-type,
+I-type and J-type) and even the concept of endianness (ordering of bytes within
words into memory).
So, a first step with \EM{} should be to show how an assembly source
@@ -52,34 +50,34 @@
Section~\ref{subsec:gui}. Note that the bit-accurate encoding of
instructions of \EM{} allows students to verify how the three
different instruction formats are represented in memory. At this stage
-some of the windows inside \EM{} can be safely ignored (namely Cycles,
+some of the windows inside \EM{} can safely be ignored (namely Cycles,
Pipeline and even Statistics), and the students should focus on
-the remaining (Registers, Data and Code).
+the remaining ones (Registers, Data and Code).
-Example assignments:
+Sample assignments:
\begin{itemize}
-\item \emph{Before loading a given program into memory, try to figure out
+\item \emph{Before loading a given program into memory, try to work out
how some lines of the \texttt{.data} section will appear in the \EM{}
memory window.}
\item \emph{Maximize the memory encoding window and highlight some lines, then
try to find the corresponding snippet of code in the text editor.}
\item \emph{Choose one of the lines in the memory or code window of \EM{}
-and try to explain the meaning of the hexadecimal value associated to
+and try to explain the meaning of the hexadecimal value associated with
them.}
\end{itemize}
-\subsection{Understanding the MIPS instruction set}
-The behavior of each instruction of the MIPS instruction set, its
-effect on registers, memory and code execution are certainly some of the most
-tricky concepts to deal with, both from the teaching and learning
-perspectives. In an introductory Computer Architecture course, showing complex
-algorithms and data structures, even if more representative of the ``real
-world'', is not the most appropriate approach Instead, \EM{} can be used to
-effectively show different implementations of several simple and small
-algorithms in a visual and intuitive way, so that students can capture the
-real meaning of each assembly instruction of the repertoire.
+\subsection{Understanding the MIPS Instruction set}
+The behavior of each instruction of the MIPS instruction set, and its effect on
+registers, memory and code execution, are certainly some of the most tricky
+concepts to deal with, from both the teaching and learning perspectives. In an
+introductory computer architecture course, showing complex algorithms and data
+structures is not the most appropriate approach, despite being more
+representative of the ``real world''. Rather, \EM{} can be used to effectively
+show various implementations of several simple small algorithms, visually and
+intuitively, so that students can capture the real meaning of each assembly
+instruction in the repertoire.
-Example assignments:
+Sample assignments:
\begin{itemize}
\item \emph{Write a MIPS assembly program implementing an
algorithm that loads a set of values previously encoded in the
@@ -87,54 +85,53 @@
memory, according to the following \texttt{<condition>}.}
\end{itemize}
-{\bf Note:} further assignments can be derived from a template like the one
-presented above, depending on the chosen \texttt{condition}, e.g.
-\emph{being even but not multiple of 4, being odd and less than 7, being
+{\bf Note:} further assignments can be derived from a template like that
+presented above, depending on the chosen \texttt{condition}, e.g.,
+\emph{being even but not a multiple of 4, being odd and less than 7, being
divisible by 9} and so on.
\subsection{Understanding the Pipeline}
-The teaching of the pipelining mechanisms and the related
-micro-architectural events involved can take a great benefit from
-the visual representation of the CPU described in
-Subsection~\ref{subsec:gui}. By executing code using \EM{} in the
-cycle-by-cycle mode, the teacher can show how the different elements
-of the pipeline deal with data (e.g. using forwarding, creating
-bubbles), and also which is the current stage of execution of each instruction, which signal
-controls are required \etc
+The teaching of the pipelining mechanisms and the related micro-architectural
+events involved can derive great benefit from the visual representation of the
+CPU described in Subsection~\ref{subsec:gui}. By executing code using \EM{} in
+the cycle-by-cycle mode, the teacher can show how the various elements of the
+pipeline deal with data (e.g. using forwarding, creating bubbles), what the
+current stage of execution is for each instruction, which signal controls are
+required, and so on.
-Example assignments:
+Sample assignments:
\begin{itemize}
\item \emph{Try to enable (disable) the forwarding settings of \EM{}
and identify which instructions of your code are affected by this micro-architectural
feature.}
-\item \emph{When possible, try to rearrange your code so that the amount
+\item \emph{When possible, try to rearrange your code so that the number
of data hazards shown in the statistics window is minimized. If you
think that your code is already optimal, move some instructions in order to
intentionally create data hazards while preserving the execution
semantics.}
-\item \emph{Execute the program cycle-by-cycle, until the n-th clock cycle,
+\item \emph{Execute the program cycle-by-cycle, until the $n^{\text{th}}$ clock cycle,
and describe the nature of the next stall encountered, showing the involved
pipelining elements.}
\end{itemize}
\subsection{Understanding the Memory Hierarchy}
-The possibility to interface \EM{} with the well-known DineroIV cache simulator
+The ability to interface \EM{} with the well-known DineroIV cache simulator
allows both teacher and students to experiment quantitatively with the
impact of different cache configurations on code execution and
performance.
-Example assignments:
+Sample assignments:
\begin{itemize}
\item \emph{Assuming a CPU clock frequency $f=1GHz$, compare the ideal time of
execution $T_{CPU\_ideal}$ of your code against a system with unified,
-single port, direct-mapped 4K data/instruction L1 Cache memory, with block size 16
+single-port, direct-mapped 4K data/instruction L1 Cache memory, with block size 16
byte and miss delay $L1_{delay}=50$ cycles.}
\item \emph{Change the proposed cache configuration so that the number of
-demand misses is increased/decreased, showing the motivation behind
+demand misses is increased/decreased, showing the reasons for
this different behavior.}
\end{itemize}
@@ -145,27 +142,26 @@
$T_{CPU}$ as:
\[T_{CPU} = (N_{cycles}+N_{hazards}+L1_{misses}\times
L1_{penality}) \times T_{clock} \]
-where $T_{clock} = 1/f$ and remembering that when single-port unified cache is
+where $T_{clock} = 1/f$, remembering that when the single-port unified cache is
used each load/store causes a structural hazard.
Further, since DineroIV also supports separate L1 data and instruction
caches, different versions of this assignment can be designed in order
-to check the students' ability to properly deal with separate data and
+to check the students' ability to deal properly with separate data and
instruction cache parameters.
-\subsection{Understanding I/O and system calls}
+\subsection{Understanding I/O and System Calls}
These concepts are often addressed in the second part of the course,
depending on the whole course organization. Nevertheless they can be
-easily assessed using the \texttt{SYSCALL} instruction of \EM{}. There
+easily accessed using the \texttt{SYSCALL} instruction of \EM{}. There
are two main classes of assignments that involve the usage of the
\texttt{SYSCALL} instruction:
\begin{itemize}
-\item Assignments that test the students' ability to put properly the inputs
-of the \texttt{SYSCALL} in the \texttt{.data} section and then get the outputs when
-the \texttt{SYSCALL} has ended
-\item Assignments that stress the usage of \texttt{SYSCALL}
-in combination with an external routine, called
-\texttt{input\_unsigned}, provided with \EM{} as part of example
-source code.
+\item Assignments that test the students' ability to put the inputs of the
+ \texttt{SYSCALL} in the \texttt{.data} section properly and then get the
+ outputs when the \texttt{SYSCALL} has ended
+\item Assignments that stress the usage of \texttt{SYSCALL} in combination with
+ an external routine, called \texttt{input\_unsigned}, provided with \EM{} as
+ part of sample source code.
\end{itemize}
The motivation behind the second class of assignments is to enrich the
@@ -181,24 +177,24 @@
\texttt{input\_unsigned} routine itself, which is a very good example of how
simple system calls work and how they can be used to build an higher
abstraction routine similar to the C-like \texttt{scanf(...)}
-function that students have been using in previous courses.
+function that students will have used in previous courses.
-Example assignments:
+Sample assignments:
\begin{itemize}
\item \emph{Properly setup a \texttt{.data} section so that two bytes
are read from keyboard using the \texttt{SYSCALL 3} and their arithmetic sum is printed on
screen using \texttt{SYSCALL 5}.}
\item \emph{Use the \texttt{input unsigned} routine to read a set of
-10 integers from the keyboard and then print them on screen in reversed order.}
+ten integers from the keyboard and then print them on screen in reverse order.}
\end{itemize}
\subsection{Understanding Amdahl's Law}
When teaching computer architecture from the performance
analysis perspective, Amdahl's law is probably the most important
-principle that students should learn. In short, Amdahl's law is used to
+principle for students to learn. In short, Amdahl's law is used to
find the maximum expected improvement to an overall system when only
-one part of the system is improved, that is:
+one part of that system is improved, that is:
\begin{equation*}
S_{overall} = \frac{1}{1-F_{e}+\frac{1}{S_{e}}}
@@ -208,39 +204,35 @@
total time affected by the enhancement and $S_{e}$ the speedup of the improved
part of the system.
-Using \EM{} in conjunction with DineroIV,
-simple assignments can be designed in order to help students to
-understand how the overall performance of the system is governed by
-the slowest component.
-There are two main categories of assignment that can be proposed to
-students:
+Using \EM{} in conjunction with DineroIV, simple assignments can be designed in
+order to help students understand how the overall performance of the system is
+governed by the slowest component.
+There are two main categories of assignment that can be proposed to students:
\begin{itemize}
-\item Assignments that ask them to compute the
-speedup of the system if a particular component improves its
-performances, in other words, the direct usage of Amdahl's law in order
-to compute $S_{overall}$ from a given $F_e$ and $S_e$.
-\item Assignments that ask students to find which would be
-the required $S_e$ of a particular component in order to achieve a
-global overall system speedup. This is an inverse usage of
-Amdahl's law, that is, finding $S_e$ from a given desired
-$S_{overall}$ and known $F_e$.
+\item Assignments that ask them to compute the speedup of the system if a
+ particular component improves its performance, in other words, the direct
+ usage of Amdahl's law in order to compute $S_{overall}$ from a given $F_e$ and
+ $S_e$.
+\item Assignments that ask students to find which would be the required $S_e$ of
+ a particular component in order to achieve a global overall system speedup.
+ This is an inverse usage of Amdahl's law, that is, finding $S_e$ from a given
+ desired $S_{overall}$ and known $F_e$.
\end{itemize}
-Example assignments:
+Sample assignments:
\begin{itemize}
\item \emph{Starting from the results obtained when executing a given MIPS64 program
code on separated instruction and data caches, compute the overall
speedup that would be achieved if the L1 data cache had only half of the
-previously reported demand misses.}
+previously-reported demand misses.}
\item \emph{Starting from the results obtained when executing your
program code on unified L1 cache memory, find the miss penalty that
would be needed to get an overall system speedup of $30\%$ in
performance.}
\end{itemize}
-Both assignments stress students' ability to compute quantitatively the
-correct $F_e$ from execution statistics. A very interesting feature is
-present in the second category, which can result in a negative value
-for $S_e$; this is useful to make the students understand that
-sometimes a desired speedup cannot be obtained, no matter how much of
-the $S_e$ of the component is improved.
+Both assignments stress students' ability to compute quantitatively the correct
+$F_e$ from execution statistics. A very interesting feature is present in the
+second category, which can result in a negative value for $S_e$; this is useful
+to make the students understand that sometimes a desired speedup cannot be
+obtained, no matter how much the $S_e$ of the component is improved.
|
|
From: <sv...@ed...> - 2011-12-09 09:59:19
|
Revision: 661
https://www.edumips.org/changeset/661
Author: dpatti
Date: 2011-12-09 10:58:55 +0100 (Fri, 09 Dec 2011)
Log Message:
-----------
spellcheck revision
Modified Paths:
--------------
paper/ieee-tedu/related-works.tex
paper/ieee-tedu/survey.tex
paper/ieee-tedu/teaching.tex
Modified: paper/ieee-tedu/related-works.tex
===================================================================
--- paper/ieee-tedu/related-works.tex 2011-11-28 20:07:56 UTC (rev 660)
+++ paper/ieee-tedu/related-works.tex 2011-12-09 09:58:55 UTC (rev 661)
@@ -50,11 +50,11 @@
Finally, two simulators in particular that have been a great source of inspiration for the
design and development of \EM{} are WinDLX~\cite{windlx-web} and
WinMIPS64~\cite{winmips-web}. \EM{} tries to take the best from those
-simulators, adding platform indipendence and a support for
+simulators, adding platform independence and a support for
DineroIV~\cite{dinero-web} cache simulator.
The main advantage of EduMIPS64 over these tools is the combination of
features not strictly related to simulation: it is open source,
suitable for web-based distance learning activities and cross
-platform, an unique feature set in the field of didactical CPU
+platform, an unique feature set in the field of didactic CPU
simulators.
Modified: paper/ieee-tedu/survey.tex
===================================================================
--- paper/ieee-tedu/survey.tex 2011-11-28 20:07:56 UTC (rev 660)
+++ paper/ieee-tedu/survey.tex 2011-12-09 09:58:55 UTC (rev 661)
@@ -21,7 +21,7 @@
2008-2010. The main goal of the proposed questions was to capture the
perceived effectiveness of the \EM{} tool and the adopted methodology,
the usage frequency, and impact on the learning of several key topics
-of computer architecture and organisation. The results
+of computer architecture and organization. The results
collected~\cite{edumips64_survey} have been summarized in the
subsections~\ref{sec:impact_environment}
and~\ref{sec:impact_learning}.
@@ -100,5 +100,5 @@
%laboratory sessions as discussed above.
Note that the second
attempt shows a lower result with \EM{}, because an increasing part of the
-students that attented the first exam won't need a second try.
+students that attended the first exam won't need a second try.
Modified: paper/ieee-tedu/teaching.tex
===================================================================
--- paper/ieee-tedu/teaching.tex 2011-11-28 20:07:56 UTC (rev 660)
+++ paper/ieee-tedu/teaching.tex 2011-12-09 09:58:55 UTC (rev 661)
@@ -69,7 +69,7 @@
\end{itemize}
\subsection{Understanding the MIPS instruction set}
-The behaviour of each instruction of the MIPS instruction set, its
+The behavior of each instruction of the MIPS instruction set, its
effect on registers, memory and code execution are certainly some of the most
tricky concepts to deal with, both from the teaching and learning
perspectives. In an introductory Computer Architecture course, showing complex
@@ -135,7 +135,7 @@
\item \emph{Change the proposed cache configuration so that the number of
demand misses is increased/decreased, showing the motivation behind
-this different behaviour.}
+this different behavior.}
\end{itemize}
{\bf Note:} Students can get both the total CPU cycle count $N_{cyles}$
|
|
From: <sv...@ed...> - 2011-11-28 20:08:03
|
Revision: 660
https://www.edumips.org/changeset/660
Author: lupino3
Date: 2011-11-28 21:07:56 +0100 (Mon, 28 Nov 2011)
Log Message:
-----------
6 pages. Now let's NEVER EVER touch it again :)
Modified Paths:
--------------
paper/ieee-tedu/bibliography.bib
paper/ieee-tedu/bios.tex
Modified: paper/ieee-tedu/bibliography.bib
===================================================================
--- paper/ieee-tedu/bibliography.bib 2011-11-28 20:07:01 UTC (rev 659)
+++ paper/ieee-tedu/bibliography.bib 2011-11-28 20:07:56 UTC (rev 660)
@@ -259,7 +259,6 @@
number = {4},
pages = {373--378},
title = {{Software Optimization for Improving Student Motivation in a Computer Architecture Course}},
-url = {http://ieeexplore.ieee.org/lpdocs/epic03/wrapper.htm?arnumber=4371514},
volume = {50},
year = {2007}
}
@@ -273,7 +272,6 @@
number = {2},
pages = {264--273},
title = {{Flexible Web-Based Educational System for Teaching Computer Architecture and Organization}},
-url = {http://ieeexplore.ieee.org/lpdocs/epic03/wrapper.htm?arnumber=1427876},
volume = {48},
year = {2005}
}
@@ -287,7 +285,6 @@
number = {2},
pages = {248--256},
title = {{p88110: A Graphical Simulator for Computer Architecture and Organization Courses}},
-url = {http://ieeexplore.ieee.org/lpdocs/epic03/wrapper.htm?arnumber=4909478},
volume = {52},
year = {2009}
}
@@ -301,7 +298,6 @@
number = {3},
pages = {482--489},
title = {{Multiple Case Studies to Enhance Project-Based Learning in a Computer Architecture Course}},
-url = {http://ieeexplore.ieee.org/lpdocs/epic03/wrapper.htm?arnumber=1495656},
volume = {48},
year = {2005}
}
@@ -315,7 +311,6 @@
number = {3},
pages = {336--341},
title = {{Teaching the Cache Memory System Using a Reconfigurable Approach}},
-url = {http://ieeexplore.ieee.org/lpdocs/epic03/wrapper.htm?arnumber=4544800},
volume = {51},
year = {2008}
}
@@ -328,7 +323,6 @@
number = {3},
pages = {244--250},
title = {{Spim-Cache: A Pedagogical Tool for Teaching Cache Memories Through Code-Based Exercises}},
-url = {http://ieeexplore.ieee.org/lpdocs/epic03/wrapper.htm?arnumber=4287124},
volume = {50},
year = {2007}
}
@@ -341,7 +335,6 @@
number = {1},
pages = {1--13},
title = {{Enhancing Learning in Introductory Computer Science Courses Through SCALE: An Empirical Study}},
-url = {http://ieeexplore.ieee.org/lpdocs/epic03/wrapper.htm?arnumber=5411930},
volume = {54},
year = {2011}
}
Modified: paper/ieee-tedu/bios.tex
===================================================================
--- paper/ieee-tedu/bios.tex 2011-11-28 20:07:01 UTC (rev 659)
+++ paper/ieee-tedu/bios.tex 2011-11-28 20:07:56 UTC (rev 660)
@@ -17,11 +17,13 @@
\begin{biographynophoto}{Maurizio
Palesi} (M'06) received the M.S. and Ph.D. degrees in computer
- engineering from the Universit\`a di Catania, Catania, Italy, in
+ engineering from the University of Catania, Italy, in
1999 and 2003, respectively. Since November 2010 he is Assistant
- Professor at Kore University, Enna, Italy. Dr. Palesi serves on the
- Editorial Board of VLSI Design journal as an Associate Editor since
- May 2007. He has served as a Guest Editor for the VLSI Design
+ Professor at Kore University, Enna, Italy.
+ %Dr. Palesi serves on the
+ %Editorial Board of VLSI Design journal as an Associate Editor since
+ %May 2007.
+ He has served as a Guest Editor for the VLSI Design
Journal, the International Journal of High Performance Systems
Architecture, Elsevier MICPRO Journal and ACM Transactions on Embedded
Computing Systems.
@@ -34,7 +36,7 @@
\begin{biographynophoto}{Fabrizio
Fazzino} (M'08) received the M.S. degree in Computer Engineering
- from the University of Catania in 1997. Until 2001 he was
+ from the University of Catania, Italy, in 1997. Until 2001 he was
responsible for the functional verification of 32-bit lines of
microprocessors at STMicroelectronics. Since 2004 he collaborates
with the Department of Computer and Telecommunications
@@ -42,19 +44,18 @@
\end{biographynophoto}
\begin{biographynophoto}{Vincenzo
- Catania} received the M.S. degree with Honors in electrical
- engineering from the Universit\`a di Catania, Catania, Italy, in
+ Catania} received the M.S. degree with Honors in Electrical
+ Engineering from the University of Catania, Italy, in
1982.
- Up until 1984, he was responsible for testing microprocessor
- system at STMicroelectronics, Catania, Italy.
+ %Up until 1984, he was responsible for testing microprocessor
+ %system at STMicroelectronics, Catania, Italy.
Since 1985, he has
cooperated in research on advanced computer architectures and
- computer networks with the Dipartimento di Ingegneria Informatica e
- delle Telecomunicazioni, Facolt\`a di Ingegneria, Universit\`a di
- Catania, where he is currently a Full Professor of Computer
- Science. Since November 2006, he has served as the Director of the
- Department of Computer Science and Telecommunications Engineering,
- Universit\`a di Catania.
+ computer networks with the Department of Computer Science and
+ Telecommunications Engineering, University of Catania,
+ where he is currently a Full Professor of Computer
+ Science. Since November 2006, he has served as the Director for this
+ Department.
%He is the author of more than 200 articles
%on international journals and conference proceedings and holds two
%patents.
|
|
From: <sv...@ed...> - 2011-11-28 20:07:09
|
Revision: 659
https://www.edumips.org/changeset/659
Author: lupino3
Date: 2011-11-28 21:07:01 +0100 (Mon, 28 Nov 2011)
Log Message:
-----------
Fixed repetition (as discussed on GDocs) and duplicate package import
Modified Paths:
--------------
paper/ieee-tedu/paper.tex
paper/ieee-tedu/survey.tex
Modified: paper/ieee-tedu/paper.tex
===================================================================
--- paper/ieee-tedu/paper.tex 2011-11-28 09:11:43 UTC (rev 658)
+++ paper/ieee-tedu/paper.tex 2011-11-28 20:07:01 UTC (rev 659)
@@ -25,7 +25,6 @@
\newcommand{\MS}{MIPS64}
\usepackage{listings}
-\usepackage{listings}
\lstset{
language=C,
basicstyle=\small,
Modified: paper/ieee-tedu/survey.tex
===================================================================
--- paper/ieee-tedu/survey.tex 2011-11-28 09:11:43 UTC (rev 658)
+++ paper/ieee-tedu/survey.tex 2011-11-28 20:07:01 UTC (rev 659)
@@ -15,8 +15,8 @@
An online form~\cite{edumips64_survey} was created, involving a total
of 93 students belonging to undergraduate\footnote{students who are
- going to take the Bachelor degree and skilled with basic computer
- science topics like fundamentals of computer science} computer
+ going to take the Bachelor degree and familiar with basic computer science
+ concepts} computer
architecture courses~\cite{course_unict,course_unikore} in the period
2008-2010. The main goal of the proposed questions was to capture the
perceived effectiveness of the \EM{} tool and the adopted methodology,
|
|
From: <sv...@ed...> - 2011-11-28 09:11:54
|
Revision: 658
https://www.edumips.org/changeset/658
Author: dpatti
Date: 2011-11-28 10:11:43 +0100 (Mon, 28 Nov 2011)
Log Message:
-----------
- further fixes for minor revision
Modified Paths:
--------------
paper/ieee-tedu/related-works.tex
paper/ieee-tedu/survey.tex
paper/ieee-tedu/teaching.tex
Modified: paper/ieee-tedu/related-works.tex
===================================================================
--- paper/ieee-tedu/related-works.tex 2011-11-26 21:19:29 UTC (rev 657)
+++ paper/ieee-tedu/related-works.tex 2011-11-28 09:11:43 UTC (rev 658)
@@ -40,14 +40,21 @@
focused on cache memory related topics.
% added references
-Finally, in~\cite{nikolic_tedu09} the authors compare 28 pedagogical tools,
+In~\cite{nikolic_tedu09} the authors compare 28 pedagogical tools,
classifying them in 2 categories: those that allow to design a complete computer
environment and those that instead focus on the simulation of a target
architecture. EduMIPS64 fits in the second category, and while it does not try
to implement all the architectural features offered by many of those simulators,
it instead focuses mainly on topics related to the basic concepts of computer
-architecture and CPU organization, making it suitable for undergraduates. The
-main advantage of EduMIPS64 over these tools is the unique combination of
-features not strictly related to simulation: it is open source, suitable for
-web-based distance learning activities and cross platform, an unique feature set
-in the field of didactical CPU simulators.
+architecture and CPU organization, making it suitable for undergraduates.
+Finally, two simulators in particular that have been a great source of inspiration for the
+design and development of \EM{} are WinDLX~\cite{windlx-web} and
+WinMIPS64~\cite{winmips-web}. \EM{} tries to take the best from those
+simulators, adding platform indipendence and a support for
+DineroIV~\cite{dinero-web} cache simulator.
+
+The main advantage of EduMIPS64 over these tools is the combination of
+features not strictly related to simulation: it is open source,
+suitable for web-based distance learning activities and cross
+platform, an unique feature set in the field of didactical CPU
+simulators.
Modified: paper/ieee-tedu/survey.tex
===================================================================
--- paper/ieee-tedu/survey.tex 2011-11-26 21:19:29 UTC (rev 657)
+++ paper/ieee-tedu/survey.tex 2011-11-28 09:11:43 UTC (rev 658)
@@ -94,7 +94,11 @@
the fraction of students requiring three or more attempts is not
particularly affected, the adoption of the methodology since 2008
seems to increase the number of students that successfully pass the
-first examination (about 22\% improvement on average), probably as
-consequence of the increased motivation and participation to the
-laboratory sessions as discussed above.
+first examination (about 22\% improvement on average).
+%, probably as
+%consequence of the increased motivation and participation to the
+%laboratory sessions as discussed above.
+Note that the second
+attempt shows a lower result with \EM{}, because an increasing part of the
+students that attented the first exam won't need a second try.
Modified: paper/ieee-tedu/teaching.tex
===================================================================
--- paper/ieee-tedu/teaching.tex 2011-11-26 21:19:29 UTC (rev 657)
+++ paper/ieee-tedu/teaching.tex 2011-11-28 09:11:43 UTC (rev 658)
@@ -9,9 +9,13 @@
system seen as a stack of layers, and where a usual level of abstraction is given
by the bare-metal CPU able to execute assembly sources translated (``assembled'')
into binary machine code.
-\EM{} can be productively used to test and improve the students' understanding of
-the following topics: instructions and data encoding; the MIPS instruction set;
-pipelining; I/O and system calls; the memory hierarchy; Amdahl's law.
+\EM{} can be productively used to test and improve the students'
+understanding of the following topics: instructions and data encoding;
+the MIPS instruction set; pipelining; I/O and system calls; the memory
+hierarchy; Amdahl's law. More advanced topics, such as as scoreboard,
+Tomasulo scheduling or virtual memory, are not covered since they
+were not part of the courses chosen in this work.
+
%\begin{itemize}
%\item {Instruction/Data encoding}
%\item {MIPS instruction set}
|
|
From: <sv...@ed...> - 2011-11-26 21:19:36
|
Revision: 657
https://www.edumips.org/changeset/657
Author: mpalesi
Date: 2011-11-26 22:19:29 +0100 (Sat, 26 Nov 2011)
Log Message:
-----------
Added average improvement value in the discussion of the results.
Modified Paths:
--------------
paper/ieee-tedu/survey.tex
Modified: paper/ieee-tedu/survey.tex
===================================================================
--- paper/ieee-tedu/survey.tex 2011-11-26 17:55:43 UTC (rev 656)
+++ paper/ieee-tedu/survey.tex 2011-11-26 21:19:29 UTC (rev 657)
@@ -90,10 +90,11 @@
\end{figure}
Finally, Figure~\ref{fig:percentage_of_success} shows how the average
percentage of success is distributed across the number of attempts
-required to pass the final examination. As can be observed, although the
-fraction of students requiring three or more attempts is not particularly
-affected, the adoption of the methodology since 2008 seems to increase
-the number of students that successfully pass the first examination,
-probably as consequence of the increased motivation and participation
-to the laboratory sessions as discussed above.
+required to pass the final examination. As can be observed, although
+the fraction of students requiring three or more attempts is not
+particularly affected, the adoption of the methodology since 2008
+seems to increase the number of students that successfully pass the
+first examination (about 22\% improvement on average), probably as
+consequence of the increased motivation and participation to the
+laboratory sessions as discussed above.
|
|
From: <sv...@ed...> - 2011-11-26 17:55:50
|
Revision: 656
https://www.edumips.org/changeset/656
Author: mpalesi
Date: 2011-11-26 18:55:43 +0100 (Sat, 26 Nov 2011)
Log Message:
-----------
fixed some typos
Modified Paths:
--------------
paper/ieee-tedu/edumips-description.tex
paper/ieee-tedu/introduction.tex
paper/ieee-tedu/related-works.tex
paper/ieee-tedu/survey.tex
paper/ieee-tedu/teaching.tex
Modified: paper/ieee-tedu/edumips-description.tex
===================================================================
--- paper/ieee-tedu/edumips-description.tex 2011-11-26 16:45:13 UTC (rev 655)
+++ paper/ieee-tedu/edumips-description.tex 2011-11-26 17:55:43 UTC (rev 656)
@@ -76,12 +76,12 @@
that stage, allowing the student to easily correlate different sections of the
interface that are related to what happens in a given pipeline stage.
-The 7 frames of the simulator interface offer at a glance many informations
+The 7 frames of the simulator interface offer at a glance many details
about the current and past status of the simulation: the current content of
memory and General Purpose Registers; a graphical representation of the
pipeline stages and the instructions that are in each of them; the code of the
program; some statistics on the execution like the number of Cycles Per
-Instruction (CPI) or the number and class of stalls.
+Instruction (CPI) and the number and class of stalls.
% The frames are:
% \begin{itemize}
% \item{\textit{Cycles}}, that shows a plot of the status of the program
Modified: paper/ieee-tedu/introduction.tex
===================================================================
--- paper/ieee-tedu/introduction.tex 2011-11-26 16:45:13 UTC (rev 655)
+++ paper/ieee-tedu/introduction.tex 2011-11-26 17:55:43 UTC (rev 656)
@@ -4,7 +4,7 @@
\PARstart{C}{omputer} Architecture and Organization is one of the key
elements which characterizes the curricula of electrical and computer
engineers \cite{ieee-curricula}. One of the most critical aspects on teaching
-such discipline is how to support the theoretical concepts of the subjects
+this discipline is how to support the theoretical concepts of the subjects
with appropriate practical experiences usually organized as laboratory
assignments. Such experiences are mainly aimed at performing a quantitative
analysis on the system parameters related to both the \emph{computer
@@ -14,7 +14,7 @@
Instruction-Set Simulators (ISSs) represent the basic tool used for
supporting teaching of the topics related to the computer architecture
-part of the course. In this context, visual representation of the concept
+part of the course. In this context, visual representation of the concepts
introduced in the course, platform independence, distance learning support,
free availability of the tools and full coverage of the course topics are key
factors which determine the effectiveness of the teaching armaments.
@@ -23,8 +23,8 @@
aspects of a computer system, like assembly language~\cite{spim-web},
pipelining~\cite{windlx-web} or memory hierarchy~\cite{dinero-web}; the
heterogeneous nature of the tools used to cover the different topics of the
-course, could take to a fragmentation of the knowledge. In fact, analyzing
-separately the different sub-systems of the computer system, make it difficult
+course, could lead to a fragmentation of the knowledge. In fact, analyzing
+separately the different sub-systems of the computer system makes it difficult
for the student to understand how those parts interact with each other, with a
consequent blinding of the system-level view. Moreover most of them do not
offer the other qualities mentioned before, like platform independence or
Modified: paper/ieee-tedu/related-works.tex
===================================================================
--- paper/ieee-tedu/related-works.tex 2011-11-26 16:45:13 UTC (rev 655)
+++ paper/ieee-tedu/related-works.tex 2011-11-26 17:55:43 UTC (rev 656)
@@ -6,7 +6,7 @@
CPU organization usually taught in introductory Computer Architecture courses.
Some approaches focus on the adopted framework (e.g.
simulators, web-based learning, games), while others try to exploit the positive
-effect of collaborative projects in improving students' motivation.
+effects of collaborative projects in improving students' motivation.
% social/collaborative
In~\cite{Anguita2007} the authors propose a method and activity
@@ -26,18 +26,18 @@
As regards tools-based approaches, computer architecture topics are
addressed at different levels of abstraction and granularity. The
work~\cite{Djordjevic2005} introduces an educational computer system
-specifically designed to help teaching architecture topics from the
+specifically designed to help teach architecture topics from the
designer's perspective. In~\cite{Garcia2009} the authors propose a
pedagogical and fully configurable simulator of the MC88110 32-bit
microprocessor, with the aim to reduce the effort of using many
different simulators to cover the topics of a typical computer
-architecture course. The work in~\cite{Quislant2008} shows how an
+architecture course. The work in~\cite{Quislant2008} shows how an
educational framework has been used in introductory courses on
-Computer Architecture and Engineering to teach some topics related to
-the tuning of cache parameters with the aim of optimizing performance and energy
-consumption. In~\cite{Sahuquillo2007} authors present a pedagogical
-tool for dealing with code-based exercises expressly focused on cache
-memory related topics.
+Computer Architecture and Engineering to teach some topics related to
+the tuning of cache parameters with the aim of optimizing performance
+and energy consumption. In~\cite{Sahuquillo2007} authors present a
+pedagogical tool for dealing with code-based exercises expressly
+focused on cache memory related topics.
% added references
Finally, in~\cite{nikolic_tedu09} the authors compare 28 pedagogical tools,
Modified: paper/ieee-tedu/survey.tex
===================================================================
--- paper/ieee-tedu/survey.tex 2011-11-26 16:45:13 UTC (rev 655)
+++ paper/ieee-tedu/survey.tex 2011-11-26 17:55:43 UTC (rev 656)
@@ -33,18 +33,18 @@
adoption of the \EM{} project as the course's simulation environment.
A first aspect that was investigated is the general
speed/responsiveness of the simulator that, because of running on an
-high-level Java virtual machine could suffer of some
-performance/memory usage issues. However, $19\%$ of users evaluated as
-excellent the performance of the simulator and $60\%$ of them
-considered it good, while $18\%$ think that it was sufficient and
-$3\%$ considered it poor. The graphical user interface of \EM{} was
-evaluated as excellent by $60\%$ of users, $20\%$ of them found it
-good while the remaining $19\%$ and $1\%$ found it sufficient and poor
-respectively. Summarizing these results, it can definitely be
-concluded that the choice of using Java as a cross-platform technology
-did not penalize the user-experience from both the performance and
-visual points of view, since only a negligible fraction of the users
-rated \EM{} as less than sufficient.
+high-level Java virtual machine could suffer some performance/memory
+usage issues. However, $19\%$ of users evaluated as excellent the
+performance of the simulator and $60\%$ of them considered it good,
+while $18\%$ think that it was sufficient and $3\%$ considered it
+poor. The graphical user interface of \EM{} was evaluated as
+excellent by $60\%$ of users, $20\%$ of them found it good while the
+remaining $19\%$ and $1\%$ found it sufficient and poor respectively.
+Summarizing these results, it can definitely be concluded that the
+choice of using Java as a cross-platform technology did not penalize
+the user-experience from both the performance and visual points of
+view, since only a negligible fraction of the users rated \EM{} as
+less than sufficient.
\subsection{Impact on Learning}
\label{sec:impact_learning}
Modified: paper/ieee-tedu/teaching.tex
===================================================================
--- paper/ieee-tedu/teaching.tex 2011-11-26 16:45:13 UTC (rev 655)
+++ paper/ieee-tedu/teaching.tex 2011-11-26 17:55:43 UTC (rev 656)
@@ -29,11 +29,13 @@
order to receive immediate feedback on the learning process.
\subsection{Understanding the Instructions and Data Encoding}
-As regards the computer architecture course addressed in this paper, the initial part of the program
-will not only require the teacher to explain the fundamental concepts of
-instruction-set architectures and assembly language, but also hexadecimal number conversions,
-instruction encoding (with the three main types: R-type, I-type and J-type)
-and even the concept of endianness (ordering of byte in words into memory).
+As regards the computer architecture course addressed in this paper,
+the initial part of the program will not only require the teacher to
+explain the fundamental concepts of instruction-set architectures and
+assembly language, but also hexadecimal number conversions,
+instruction encoding (with the three main types: R-type, I-type and
+J-type) and even the concept of endianness (ordering of bytes within
+words into memory).
So, a first step with \EM{} should be to show how an assembly source
file written following a MIPS-like syntax is loaded into memory and
@@ -45,7 +47,7 @@
corresponding \EM{} \emph{memory} and \emph{code} windows described in
Section~\ref{subsec:gui}. Note that the bit-accurate encoding of
instructions of \EM{} allows students to verify how the three
-different instruction formats are represented in memory. In this case
+different instruction formats are represented in memory. At this stage
some of the windows inside \EM{} can be safely ignored (namely Cycles,
Pipeline and even Statistics), and the students should focus on
the remaining (Registers, Data and Code).
@@ -81,7 +83,7 @@
memory, according to the following \texttt{<condition>}.}
\end{itemize}
-{\bf Note:} further assignments can be derived from template like the one
+{\bf Note:} further assignments can be derived from a template like the one
presented above, depending on the chosen \texttt{condition}, e.g.
\emph{being even but not multiple of 4, being odd and less than 7, being
divisible by 9} and so on.
@@ -90,7 +92,7 @@
\subsection{Understanding the Pipeline}
The teaching of the pipelining mechanisms and the related
micro-architectural events involved can take a great benefit from
-the visual representation of CPU described in
+the visual representation of the CPU described in
Subsection~\ref{subsec:gui}. By executing code using \EM{} in the
cycle-by-cycle mode, the teacher can show how the different elements
of the pipeline deal with data (e.g. using forwarding, creating
@@ -99,7 +101,7 @@
Example assignments:
\begin{itemize}
-\item \emph{Try to enable (resp. disable) the forwarding settings of \EM{}
+\item \emph{Try to enable (disable) the forwarding settings of \EM{}
and identify which instructions of your code are affected by this micro-architectural
feature.}
\item \emph{When possible, try to rearrange your code so that the amount
@@ -148,16 +150,16 @@
\subsection{Understanding I/O and system calls}
These concepts are often addressed in the second part of the course,
-depending on the whole course organization, nevertheless they can be
-easily assessed using the \texttt{SYSCALL} instruction of
-\EM{}. There are two main classes of assignments that involve the usage of the
+depending on the whole course organization. Nevertheless they can be
+easily assessed using the \texttt{SYSCALL} instruction of \EM{}. There
+are two main classes of assignments that involve the usage of the
\texttt{SYSCALL} instruction:
\begin{itemize}
\item Assignments that test the students' ability to put properly the inputs
of the \texttt{SYSCALL} in the \texttt{.data} section and then get the outputs when
the \texttt{SYSCALL} has ended
\item Assignments that stress the usage of \texttt{SYSCALL}
-in combination to an external routine, called
+in combination with an external routine, called
\texttt{input\_unsigned}, provided with \EM{} as part of example
source code.
\end{itemize}
@@ -223,17 +225,18 @@
Example assignments:
\begin{itemize}
\item \emph{Starting from the results obtained when executing a given MIPS64 program
-code on separated instruction and data caches, compute which overall
-speedup would be achieved if the L1 data cache had only half of the
+code on separated instruction and data caches, compute the overall
+speedup that would be achieved if the L1 data cache had only half of the
previously reported demand misses.}
-\item \emph{Starting from the results obtained when executing your program
-code on unified L1 cache memory, find which miss penalty would be
-needed to get and overall system speedup of $30\%$ in performance.}
+\item \emph{Starting from the results obtained when executing your
+ program code on unified L1 cache memory, find the miss penalty that
+ would be needed to get an overall system speedup of $30\%$ in
+ performance.}
\end{itemize}
Both assignments stress students' ability to compute quantitatively the
correct $F_e$ from execution statistics. A very interesting feature is
present in the second category, which can result in a negative value
for $S_e$; this is useful to make the students understand that
-sometimes a desired speedup cannot be obtained, no matter how big is the
-$S_e$ of the component improved.
+sometimes a desired speedup cannot be obtained, no matter how much of
+the $S_e$ of the component is improved.
|
|
From: <sv...@ed...> - 2011-11-26 16:45:21
|
Revision: 655
https://www.edumips.org/changeset/655
Author: mpalesi
Date: 2011-11-26 17:45:13 +0100 (Sat, 26 Nov 2011)
Log Message:
-----------
replaced sentence about time spent by students on EduMIPS64...
Modified Paths:
--------------
paper/ieee-tedu/survey.tex
Modified: paper/ieee-tedu/survey.tex
===================================================================
--- paper/ieee-tedu/survey.tex 2011-11-26 16:20:36 UTC (rev 654)
+++ paper/ieee-tedu/survey.tex 2011-11-26 16:45:13 UTC (rev 655)
@@ -49,9 +49,12 @@
\subsection{Impact on Learning}
\label{sec:impact_learning}
The percent of the time spent by the students on \EM{} is an indicator
-of the role played by the laboratory-based methodology in the course. Only a small percentage of
-them, less than $8\%$, used \EM{} for less than 10\% of the time
-period ranging from the beginning of the course to the exam. About
+of the role played by the laboratory-based methodology in the course.
+%% Only a small percentage of them, less than $8\%$, used \EM{} for less
+%% than 10\% of the time period ranging from the beginning of the course
+%% to the exam.
+Only a small percentage of them, less than $8\%$, used \EM{} for less
+than 10\% of the study time that they allocated for this course. About
$20\%$ of them used \EM{} for the $20\%-30\%$ of the time, whereas the
remaining $70\%$ of them declared to have spent more than $40\%$ of
the time on \EM{}.
|
|
From: <sv...@ed...> - 2011-11-26 16:20:46
|
Revision: 654
https://www.edumips.org/changeset/654
Author: mpalesi
Date: 2011-11-26 17:20:36 +0100 (Sat, 26 Nov 2011)
Log Message:
-----------
Updated hp reference with fifth edition of the textbook
Modified Paths:
--------------
paper/ieee-tedu/bibliography.bib
Modified: paper/ieee-tedu/bibliography.bib
===================================================================
--- paper/ieee-tedu/bibliography.bib 2011-11-26 16:01:01 UTC (rev 653)
+++ paper/ieee-tedu/bibliography.bib 2011-11-26 16:20:36 UTC (rev 654)
@@ -21,11 +21,11 @@
}
@INBOOK{hp,
- author = "John L. Hennessy and David A. Patterson",
- title = "Computer Architecture",
+ author = "John L. Hennessy and David A. Patterson",
+ title = "Computer Architecture: A Quantitative Approach",
publisher = "Morgan Kaufmann",
- year = 2002,
- edition = "Third"
+ year = 2011,
+ edition = "Fifth"
}
@INBOOK{posix,
|
|
From: <sv...@ed...> - 2011-11-26 16:01:10
|
Revision: 653
https://www.edumips.org/changeset/653
Author: mpalesi
Date: 2011-11-26 17:01:01 +0100 (Sat, 26 Nov 2011)
Log Message:
-----------
Added a sentence explaining the meaning of the term "undergraduate"
Modified Paths:
--------------
paper/ieee-tedu/survey.tex
Modified: paper/ieee-tedu/survey.tex
===================================================================
--- paper/ieee-tedu/survey.tex 2011-11-25 09:19:31 UTC (rev 652)
+++ paper/ieee-tedu/survey.tex 2011-11-26 16:01:01 UTC (rev 653)
@@ -14,14 +14,17 @@
\end{itemize}
An online form~\cite{edumips64_survey} was created, involving a total
-of 93 students belonging to undergraduate computer architecture
-courses~\cite{course_unict,course_unikore} in the period 2008-2010.
-The main goal of the proposed questions was to capture the perceived
-effectiveness of the \EM{} tool and the adopted methodology, the usage
-frequency, and impact on the learning of several key topics of
-computer architecture and organisation. The results
+of 93 students belonging to undergraduate\footnote{students who are
+ going to take the Bachelor degree and skilled with basic computer
+ science topics like fundamentals of computer science} computer
+architecture courses~\cite{course_unict,course_unikore} in the period
+2008-2010. The main goal of the proposed questions was to capture the
+perceived effectiveness of the \EM{} tool and the adopted methodology,
+the usage frequency, and impact on the learning of several key topics
+of computer architecture and organisation. The results
collected~\cite{edumips64_survey} have been summarized in the
-subsections~\ref{sec:impact_environment} and~\ref{sec:impact_learning}.
+subsections~\ref{sec:impact_environment}
+and~\ref{sec:impact_learning}.
\subsection{Simulation environment}
\label{sec:impact_environment}
|
|
From: <sv...@ed...> - 2011-11-25 09:38:59
|
Revision: 652
https://www.edumips.org/changeset/652
Author: dpatti
Date: 2011-11-25 10:19:31 +0100 (Fri, 25 Nov 2011)
Log Message:
-----------
- addings for reviewers' minox revision
Modified Paths:
--------------
paper/ieee-tedu/edumips-description.tex
paper/ieee-tedu/teaching.tex
Modified: paper/ieee-tedu/edumips-description.tex
===================================================================
--- paper/ieee-tedu/edumips-description.tex 2011-10-12 11:18:41 UTC (rev 651)
+++ paper/ieee-tedu/edumips-description.tex 2011-11-25 09:19:31 UTC (rev 652)
@@ -55,9 +55,10 @@
\subsubsection{Cache simulation}
\EM{} generates trace files containing the memory accesses that are performed
by the simulated program in a format compatible with the DineroIV
-\cite{dinero-web} cache simulator; there is also a built-in interface for the
-DineroIV cache simulator, so that the student can simulate different cache
-scenarios using it without having to exit the \EM{} interface.
+\cite{dinero-web} cache simulator; there is also a built-in interface
+for invoking the command line of DineroIV cache simulator using the
+produced trace file. In this way, the student can test different cache
+scenarios without having to exit the \EM{} interface.
\subsubsection{Interrupts and System Calls}
The simulator gives to the student an interface for system calls via the
Modified: paper/ieee-tedu/teaching.tex
===================================================================
--- paper/ieee-tedu/teaching.tex 2011-10-12 11:18:41 UTC (rev 651)
+++ paper/ieee-tedu/teaching.tex 2011-11-25 09:19:31 UTC (rev 652)
@@ -29,7 +29,7 @@
order to receive immediate feedback on the learning process.
\subsection{Understanding the Instructions and Data Encoding}
-In a typical computer architecture course, the initial part of the program
+As regards the computer architecture course addressed in this paper, the initial part of the program
will not only require the teacher to explain the fundamental concepts of
instruction-set architectures and assembly language, but also hexadecimal number conversions,
instruction encoding (with the three main types: R-type, I-type and J-type)
|
|
From: <sv...@ed...> - 2011-10-12 11:18:48
|
Revision: 651
https://www.edumips.org/changeset/651
Author: dpatti
Date: 2011-10-12 13:18:41 +0200 (Wed, 12 Oct 2011)
Log Message:
-----------
- uppercased 'n' of nNVIDIA
Modified Paths:
--------------
paper/ieee-tedu/bios.tex
paper/ieee-tedu/paper.tex
Modified: paper/ieee-tedu/bios.tex
===================================================================
--- paper/ieee-tedu/bios.tex 2011-10-12 11:16:29 UTC (rev 650)
+++ paper/ieee-tedu/bios.tex 2011-10-12 11:18:41 UTC (rev 651)
@@ -38,7 +38,7 @@
responsible for the functional verification of 32-bit lines of
microprocessors at STMicroelectronics. Since 2004 he collaborates
with the Department of Computer and Telecommunications
- Engineering. He is Silicon Engineer at nVIDIA Inc, Bristol (UK).
+ Engineering. He is Silicon Engineer at NVIDIA Inc, Bristol (UK).
\end{biographynophoto}
\begin{biographynophoto}{Vincenzo
Modified: paper/ieee-tedu/paper.tex
===================================================================
--- paper/ieee-tedu/paper.tex 2011-10-12 11:16:29 UTC (rev 650)
+++ paper/ieee-tedu/paper.tex 2011-10-12 11:18:41 UTC (rev 651)
@@ -77,7 +77,7 @@
M. Palesi is with the Kore University, Enna, Italy (email:
mau...@un...).
- F. Fazzino is with nVIDIA Inc., Bristol, United Kingdom (email:
+ F. Fazzino is with NVIDIA Inc., Bristol, United Kingdom (email:
ffa...@nv...).}}
\maketitle
|
|
From: <sv...@ed...> - 2011-10-12 11:16:37
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Revision: 650
https://www.edumips.org/changeset/650
Author: dpatti
Date: 2011-10-12 13:16:29 +0200 (Wed, 12 Oct 2011)
Log Message:
-----------
- updated fazzino's bio
Modified Paths:
--------------
paper/ieee-tedu/bios.tex
paper/ieee-tedu/paper.tex
Modified: paper/ieee-tedu/bios.tex
===================================================================
--- paper/ieee-tedu/bios.tex 2011-10-12 09:25:52 UTC (rev 649)
+++ paper/ieee-tedu/bios.tex 2011-10-12 11:16:29 UTC (rev 650)
@@ -38,7 +38,7 @@
responsible for the functional verification of 32-bit lines of
microprocessors at STMicroelectronics. Since 2004 he collaborates
with the Department of Computer and Telecommunications
- Engineering. He is Silicon Engineer at Icera Inc, Bristol (UK).
+ Engineering. He is Silicon Engineer at nVIDIA Inc, Bristol (UK).
\end{biographynophoto}
\begin{biographynophoto}{Vincenzo
Modified: paper/ieee-tedu/paper.tex
===================================================================
--- paper/ieee-tedu/paper.tex 2011-10-12 09:25:52 UTC (rev 649)
+++ paper/ieee-tedu/paper.tex 2011-10-12 11:16:29 UTC (rev 650)
@@ -78,7 +78,7 @@
mau...@un...).
F. Fazzino is with nVIDIA Inc., Bristol, United Kingdom (email:
- fa...@nv...).}}
+ ffa...@nv...).}}
\maketitle
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From: <sv...@ed...> - 2011-10-12 09:26:02
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Revision: 649
https://www.edumips.org/changeset/649
Author: dpatti
Date: 2011-10-12 11:25:52 +0200 (Wed, 12 Oct 2011)
Log Message:
-----------
- Updated fazzino's workplace
Modified Paths:
--------------
paper/ieee-tedu/paper.tex
Modified: paper/ieee-tedu/paper.tex
===================================================================
--- paper/ieee-tedu/paper.tex 2011-10-12 09:22:53 UTC (rev 648)
+++ paper/ieee-tedu/paper.tex 2011-10-12 09:25:52 UTC (rev 649)
@@ -77,8 +77,8 @@
M. Palesi is with the Kore University, Enna, Italy (email:
mau...@un...).
- F. Fazzino is with Icera Inc., Bristol, United Kingdom (email:
- fa...@ic...).}}
+ F. Fazzino is with nVIDIA Inc., Bristol, United Kingdom (email:
+ fa...@nv...).}}
\maketitle
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From: <sv...@ed...> - 2011-10-12 09:23:00
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Revision: 648
https://www.edumips.org/changeset/648
Author: lupino3
Date: 2011-10-12 11:22:53 +0200 (Wed, 12 Oct 2011)
Log Message:
-----------
Fixed URL of survey (removed tilde, as it was not copiable)
Modified Paths:
--------------
paper/ieee-tedu/bibliography.bib
Modified: paper/ieee-tedu/bibliography.bib
===================================================================
--- paper/ieee-tedu/bibliography.bib 2011-10-12 08:40:20 UTC (rev 647)
+++ paper/ieee-tedu/bibliography.bib 2011-10-12 09:22:53 UTC (rev 648)
@@ -104,7 +104,7 @@
@online{edumips64_survey,
title = "{EduMIPS64 survey - Questions and Results}",
- note = {\url{http://www.diit.unict.it/~spadaccini/edumips64-survey.html}},
+ note = {\url{http://www.diit.unict.it/users/spadaccini/edumips64-survey.html}},
}
@online{course_unikore,
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From: <sv...@ed...> - 2011-10-12 08:40:30
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Revision: 647
https://www.edumips.org/changeset/647
Author: dpatti
Date: 2011-10-12 10:40:20 +0200 (Wed, 12 Oct 2011)
Log Message:
-----------
- Updated emmepalesi site link
Modified Paths:
--------------
paper/ieee-tedu/bibliography.bib
Modified: paper/ieee-tedu/bibliography.bib
===================================================================
--- paper/ieee-tedu/bibliography.bib 2011-10-12 08:36:11 UTC (rev 646)
+++ paper/ieee-tedu/bibliography.bib 2011-10-12 08:40:20 UTC (rev 647)
@@ -109,7 +109,7 @@
@online{course_unikore,
title = "{Calcolatori Elettronici - Kore University of Enna}",
- url = "http://www.unikore.it/index.php?option=com_content&task=view&id=14703&Itemid=3179#teaching"
+ url = "http://www.unikore.it/mpalesi"
}
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From: <sv...@ed...> - 2011-10-12 08:36:22
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Revision: 646
https://www.edumips.org/changeset/646
Author: dpatti
Date: 2011-10-12 10:36:11 +0200 (Wed, 12 Oct 2011)
Log Message:
-----------
- Removed dots (Palesi docet)
Modified Paths:
--------------
paper/ieee-tedu/teaching.tex
Modified: paper/ieee-tedu/teaching.tex
===================================================================
--- paper/ieee-tedu/teaching.tex 2011-10-12 08:34:58 UTC (rev 645)
+++ paper/ieee-tedu/teaching.tex 2011-10-12 08:36:11 UTC (rev 646)
@@ -95,7 +95,7 @@
cycle-by-cycle mode, the teacher can show how the different elements
of the pipeline deal with data (e.g. using forwarding, creating
bubbles), and also which is the current stage of execution of each instruction, which signal
-controls are required \etc\ldots
+controls are required \etc
Example assignments:
\begin{itemize}
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From: <sv...@ed...> - 2011-10-12 08:35:06
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Revision: 645
https://www.edumips.org/changeset/645
Author: dpatti
Date: 2011-10-12 10:34:58 +0200 (Wed, 12 Oct 2011)
Log Message:
-----------
- Added reference when first citing the form
Modified Paths:
--------------
paper/ieee-tedu/survey.tex
Modified: paper/ieee-tedu/survey.tex
===================================================================
--- paper/ieee-tedu/survey.tex 2011-10-11 22:15:50 UTC (rev 644)
+++ paper/ieee-tedu/survey.tex 2011-10-12 08:34:58 UTC (rev 645)
@@ -13,7 +13,7 @@
them understand the course topics, increasing their motivation to learn.
\end{itemize}
-An online form was created, involving a total
+An online form~\cite{edumips64_survey} was created, involving a total
of 93 students belonging to undergraduate computer architecture
courses~\cite{course_unict,course_unikore} in the period 2008-2010.
The main goal of the proposed questions was to capture the perceived
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From: <sv...@ed...> - 2011-10-11 22:15:58
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Revision: 644
https://www.edumips.org/changeset/644
Author: lupino3
Date: 2011-10-12 00:15:50 +0200 (Wed, 12 Oct 2011)
Log Message:
-----------
Added the survey web page and removed old refs.
Modified Paths:
--------------
paper/ieee-tedu/bibliography.bib
paper/ieee-tedu/paper.tex
paper/ieee-tedu/survey.tex
Modified: paper/ieee-tedu/bibliography.bib
===================================================================
--- paper/ieee-tedu/bibliography.bib 2011-10-11 07:48:48 UTC (rev 643)
+++ paper/ieee-tedu/bibliography.bib 2011-10-11 22:15:50 UTC (rev 644)
@@ -37,14 +37,14 @@
@MANUAL{mips-1,
author = "{MIPS} Technologies Inc.",
- title = "{MIPS64} Architecture For Programmers Volume I: Introduction to {MIPS64} Architecture",
+ title = "{MIPS64} Architecture For Programmers Volume I: Introduction to {MIPS64} Architecture",
month = jul,
year = 2005
}
@MANUAL{mips-2,
author = "{MIPS} Technologies Inc.",
- title = "{MIPS64} Architecture For Programmers Volume II: The {MIPS64} Instruction Set",
+ title = "{MIPS64} Architecture For Programmers Volume II: The {MIPS64} Instruction Set",
month = jul,
year = 2005
}
@@ -97,35 +97,22 @@
url = "http://www.uml.org"
}
-
-@online{edumips64_form,
- title = "EduMIPS64 Questionnaire",
- url = "https://docs.google.com/spreadsheet/viewform?hl=en_US&formkey=dDY5WHhMdm9KY0FZdjl4U0Z2cXJMUXc6MQ#gid=0"
-}
-@online{edumips64_form_results,
- url = "https://docs.google.com/spreadsheet/ccc?key=0AmuW243S9cfddDY5WHhMdm9KY0FZdjl4U0Z2cXJMUXc&hl=en_US#gid=0"
-}
-
@online{course_unict,
- title = "Laboratorio di Calcolatori - Università of Catania",
+ title = "{Laboratorio di Calcolatori - Università of Catania}",
url = "http://hal9000.diit.unict.it/dokuwiki/doku.php?id=labce"
}
+@online{edumips64_survey,
+ title = "{EduMIPS64 survey - Questions and Results}",
+ note = {\url{http://www.diit.unict.it/~spadaccini/edumips64-survey.html}},
+}
+
@online{course_unikore,
- title = "Calcolatori Elettronici - Kore University of Enna",
+ title = "{Calcolatori Elettronici - Kore University of Enna}",
url = "http://www.unikore.it/index.php?option=com_content&task=view&id=14703&Itemid=3179#teaching"
}
-@online{course_ferrara,
- title = "Laboratorio di Architettura degli Elaboratori - University of Ferrara",
- url = "http://www.fe.infn.it/archel1/lab/20090612_eduMips.pdf"
-}
-@online{course_mcgill,
- title = "Computer Architecture Laboratory - McGill University",
- url = "http://www.simonfoucher.com/McGill/ECSE487%20COMP%20ARC%20LAB/COMPARC_Ass2/Asst2.pdf"
-}
-
@Article{edumips_wiley_caee,
author = "Andrea Spadaccini and Davide Patti and Maurizio Palesi and Fabrizio Fazzino",
title = "{EduMIPS64, a Visual CPU Simulator for Teaching Computer Architecture}",
Modified: paper/ieee-tedu/paper.tex
===================================================================
--- paper/ieee-tedu/paper.tex 2011-10-11 07:48:48 UTC (rev 643)
+++ paper/ieee-tedu/paper.tex 2011-10-11 22:15:50 UTC (rev 644)
@@ -67,7 +67,7 @@
\title{Supporting Undergraduate Computer Architecture Students using a Visual
MIPS64 CPU Simulator}
-\author{Davide~Patti,~\emph{Member,~IEEE}, Andrea~Spadaccini,~\emph{Graduate~Student~Member,~IEEE},
+\author{Davide~Patti,~\emph{Member,~IEEE}, Andrea~Spadaccini,~\emph{Graduate~Student~Member,~IEEE},
Maurizio~Palesi,~\emph{Member,~IEEE}, Fabrizio~Fazzino,~\emph{Member,~IEEE}
and Vincenzo~Catania\thanks{D. Patti, A. Spadaccini and V. Catania are with the Dipartimento di
Ingegneria Elettrica, Elettronica ed Informatica, University of
@@ -120,7 +120,7 @@
%------------------------------------------------------------------------------
\section{Acknowledgments}
-The authors hereby acknowledge the fundamental contribution of all the developers of
+The authors hereby acknowledge the fundamental contribution of all the developers of
\EM{}, whose names are listed in the About Us dialog of the simulator itself.
%------------------------------------------------------------------------------
Modified: paper/ieee-tedu/survey.tex
===================================================================
--- paper/ieee-tedu/survey.tex 2011-10-11 07:48:48 UTC (rev 643)
+++ paper/ieee-tedu/survey.tex 2011-10-11 22:15:50 UTC (rev 644)
@@ -13,14 +13,14 @@
them understand the course topics, increasing their motivation to learn.
\end{itemize}
-An online form was created~\cite{edumips64_form} , involving a total
-of 93 students belonging to undergraduate computer architecture
+An online form was created, involving a total
+of 93 students belonging to undergraduate computer architecture
courses~\cite{course_unict,course_unikore} in the period 2008-2010.
The main goal of the proposed questions was to capture the perceived
effectiveness of the \EM{} tool and the adopted methodology, the usage
frequency, and impact on the learning of several key topics of
computer architecture and organisation. The results
-collected~\cite{edumips64_form_results} have been summarized in the
+collected~\cite{edumips64_survey} have been summarized in the
subsections~\ref{sec:impact_environment} and~\ref{sec:impact_learning}.
\subsection{Simulation environment}
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From: <sv...@ed...> - 2011-10-11 07:48:55
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Revision: 643
https://www.edumips.org/changeset/643
Author: dpatti
Date: 2011-10-11 09:48:48 +0200 (Tue, 11 Oct 2011)
Log Message:
-----------
- Added the period 2008-2010 clarification when citing the students
involved in the survey
Modified Paths:
--------------
paper/ieee-tedu/survey.tex
Modified: paper/ieee-tedu/survey.tex
===================================================================
--- paper/ieee-tedu/survey.tex 2011-10-11 07:40:10 UTC (rev 642)
+++ paper/ieee-tedu/survey.tex 2011-10-11 07:48:48 UTC (rev 643)
@@ -14,7 +14,8 @@
\end{itemize}
An online form was created~\cite{edumips64_form} , involving a total
-of 93 students belonging to undergraduate computer architecture courses~\cite{course_unict,course_unikore}.
+of 93 students belonging to undergraduate computer architecture
+courses~\cite{course_unict,course_unikore} in the period 2008-2010.
The main goal of the proposed questions was to capture the perceived
effectiveness of the \EM{} tool and the adopted methodology, the usage
frequency, and impact on the learning of several key topics of
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From: <sv...@ed...> - 2011-10-11 07:40:23
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Revision: 642
https://www.edumips.org/changeset/642
Author: dpatti
Date: 2011-10-11 09:40:10 +0200 (Tue, 11 Oct 2011)
Log Message:
-----------
- Removed two courses reference
- Removed clarification about data used for Fig.3 (is useless now)
Modified Paths:
--------------
paper/ieee-tedu/survey.tex
Modified: paper/ieee-tedu/survey.tex
===================================================================
--- paper/ieee-tedu/survey.tex 2011-10-10 18:51:53 UTC (rev 641)
+++ paper/ieee-tedu/survey.tex 2011-10-11 07:40:10 UTC (rev 642)
@@ -14,8 +14,7 @@
\end{itemize}
An online form was created~\cite{edumips64_form} , involving a total
-of 93 students belonging to 4 different
-courses~\cite{course_unict,course_unikore,course_ferrara,course_mcgill}.
+of 93 students belonging to undergraduate computer architecture courses~\cite{course_unict,course_unikore}.
The main goal of the proposed questions was to capture the perceived
effectiveness of the \EM{} tool and the adopted methodology, the usage
frequency, and impact on the learning of several key topics of
@@ -84,9 +83,7 @@
\end{figure}
Finally, Figure~\ref{fig:percentage_of_success} shows how the average
percentage of success is distributed across the number of attempts
-required to pass the final examination. Note that this data were
-only available for the course~\cite{course_unict}, where the tool
-\EM{} was initially developed. As can be observed, although the
+required to pass the final examination. As can be observed, although the
fraction of students requiring three or more attempts is not particularly
affected, the adoption of the methodology since 2008 seems to increase
the number of students that successfully pass the first examination,
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From: <sv...@ed...> - 2011-10-10 18:51:59
|
Revision: 641
https://www.edumips.org/changeset/641
Author: lupino3
Date: 2011-10-10 20:51:53 +0200 (Mon, 10 Oct 2011)
Log Message:
-----------
Attempts to squeeze the paper in 6 pages (it is still 7 pages)
Modified Paths:
--------------
paper/ieee-tedu/abstract.tex
paper/ieee-tedu/edumips-description.tex
paper/ieee-tedu/teaching.tex
Modified: paper/ieee-tedu/abstract.tex
===================================================================
--- paper/ieee-tedu/abstract.tex 2011-10-10 18:39:20 UTC (rev 640)
+++ paper/ieee-tedu/abstract.tex 2011-10-10 18:51:53 UTC (rev 641)
@@ -3,11 +3,12 @@
dialect as an example. The most widespread books in this field use the MIPS64
Instruction Set Architecture (ISA) to help students in learning the
fundamentals of Computer Architecture, because of its orthogonality and its
-suitability for real-world applications. So students and teachers need tools
-that allow an experimental and practical approach to the theoretical knowledge
-acquired about the MIPS64 instruction set, with lots of debugging and
-educational aids, like the ability of executing step-by-step the program,
-having a detailed view of the pipeline, setting breakpoints, \etc.
+suitability for real-world applications.
+%So students and teachers need tools
+%that allow an experimental and practical approach to the theoretical knowledge
+%acquired about the MIPS64 instruction set, with lots of debugging and
+%educational aids, like the ability of executing step-by-step the program,
+%having a detailed view of the pipeline, setting breakpoints, \etc.
This paper shows how to use the \EM{} visual CPU Simulator as a supporting
tool for teaching the standard topics covered by an undergraduate course in
Modified: paper/ieee-tedu/edumips-description.tex
===================================================================
--- paper/ieee-tedu/edumips-description.tex 2011-10-10 18:39:20 UTC (rev 640)
+++ paper/ieee-tedu/edumips-description.tex 2011-10-10 18:51:53 UTC (rev 641)
@@ -74,26 +74,34 @@
throughout the user interface to represent events and data associated with
that stage, allowing the student to easily correlate different sections of the
interface that are related to what happens in a given pipeline stage.
-The frames are:
-\begin{itemize}
- \item{\textit{Cycles}}, that shows a plot of the status of the program
- execution over time;
- \item{\textit{Registers}}, that shows the status of the General Purpose
- Registers;
- \item{\textit{Statistics}}, that shows some statistics about the program
- execution, like the current number of Cycles Per Instructions (CPI), the
- stalls encountered so far and the code size;
- \item{\textit{Pipeline}}, that shows a graphical representation of the
- pipeline as a series of connected functional blocks with the current
- instruction drawn inside the block itself;
- \item{\textit{Memory}}, that shows the current status of the memory,
- both represented as a sequence of bits and as the student specified it
- in the source code;
- \item{\textit{Code}}, that shows the instructions entered by the student in
- the source code of the program;
- \item{\textit{Input/Output}}, that offers a way to interact with the user
- when some \texttt{SYSCALL} instructions are executed.
-\end{itemize}
+
+The 7 frames of the simulator interface offer at a glance many informations
+about the current and past status of the simulation: the current content of
+memory and General Purpose Registers; a graphical representation of the
+pipeline stages and the instructions that are in each of them; the code of the
+program; some statistics on the execution like the number of Cycles Per
+Instruction (CPI) or the number and class of stalls.
+% The frames are:
+% \begin{itemize}
+% \item{\textit{Cycles}}, that shows a plot of the status of the program
+% execution over time;
+% \item{\textit{Registers}}, that shows the status of the General Purpose
+% Registers;
+% \item{\textit{Statistics}}, that shows some statistics about the program
+% execution, like the current number of Cycles Per Instructions (CPI), the
+% stalls encountered so far and the code size;
+% \item{\textit{Pipeline}}, that shows a graphical representation of the
+% pipeline as a series of connected functional blocks with the current
+% instruction drawn inside the block itself;
+% \item{\textit{Memory}}, that shows the current status of the memory,
+% both represented as a sequence of bits and as the student specified it
+% in the source code;
+% \item{\textit{Code}}, that shows the instructions entered by the student in
+% the source code of the program;
+% \item{\textit{Input/Output}}, that offers a way to interact with the user
+% when some \texttt{SYSCALL} instructions are executed.
+% \end{itemize}
+
The user interface offers to the student the ability to execute the program
step-wise or at once; it can also be chosen whether during multi-step
execution the interface should display each intermediate step or if it should
Modified: paper/ieee-tedu/teaching.tex
===================================================================
--- paper/ieee-tedu/teaching.tex 2011-10-10 18:39:20 UTC (rev 640)
+++ paper/ieee-tedu/teaching.tex 2011-10-10 18:51:53 UTC (rev 641)
@@ -10,15 +10,16 @@
by the bare-metal CPU able to execute assembly sources translated (``assembled'')
into binary machine code.
\EM{} can be productively used to test and improve the students' understanding of
-the following topics:
-\begin{itemize}
-\item {Instruction/Data encoding}
-\item {MIPS instruction set}
-\item {Pipeline}
-\item {I/O and system calls}
-\item {Memory hierarchy}
-\item {Amdahl's Law}
-\end{itemize}
+the following topics: instructions and data encoding; the MIPS instruction set;
+pipelining; I/O and system calls; the memory hierarchy; Amdahl's law.
+%\begin{itemize}
+%\item {Instruction/Data encoding}
+%\item {MIPS instruction set}
+%\item {Pipeline}
+%\item {I/O and system calls}
+%\item {Memory hierarchy}
+%\item {Amdahl's Law}
+%\end{itemize}
In the next sections the teaching methodology adopted for each of the areas
listed above will briefly be described, followed by some proof-of-concept
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