[Edumips64-commit] SF.net SVN: edumips64:[652] paper/ieee-tedu

[<sv...@ed...>]

Revision: 652
          https://www.edumips.org/changeset/652
Author:   dpatti
Date:     2011-11-25 10:19:31 +0100 (Fri, 25 Nov 2011)
Log Message:
-----------
- addings for reviewers' minox revision

Modified Paths:
--------------
    paper/ieee-tedu/edumips-description.tex
    paper/ieee-tedu/teaching.tex

Modified: paper/ieee-tedu/edumips-description.tex
===================================================================
--- paper/ieee-tedu/edumips-description.tex	2011-10-12 11:18:41 UTC (rev 651)
+++ paper/ieee-tedu/edumips-description.tex	2011-11-25 09:19:31 UTC (rev 652)
@@ -55,9 +55,10 @@
 \subsubsection{Cache simulation}
 \EM{} generates trace files containing the memory accesses that are performed
 by the simulated program in a format compatible with the DineroIV
-\cite{dinero-web} cache simulator; there is also a built-in interface for the
-DineroIV cache simulator, so that the student can simulate different cache
-scenarios using it without having to exit the \EM{} interface.
+\cite{dinero-web} cache simulator; there is also a built-in interface
+for invoking the command line of DineroIV cache simulator using the
+produced trace file. In this way, the student can test different cache 
+scenarios without having to exit the \EM{} interface.
 
 \subsubsection{Interrupts and System Calls}
 The simulator gives to the student an interface for system calls via the

Modified: paper/ieee-tedu/teaching.tex
===================================================================
--- paper/ieee-tedu/teaching.tex	2011-10-12 11:18:41 UTC (rev 651)
+++ paper/ieee-tedu/teaching.tex	2011-11-25 09:19:31 UTC (rev 652)
@@ -29,7 +29,7 @@
 order to receive immediate feedback on the learning process.
 
 \subsection{Understanding the Instructions and Data Encoding}
-In a typical computer architecture course, the initial part of the program
+As regards the computer architecture course addressed in this paper, the initial part of the program
 will not only require the teacher to explain the fundamental concepts of
 instruction-set architectures and assembly language, but also hexadecimal number conversions,
 instruction encoding (with the three main types: R-type, I-type and J-type)