[Edumips64-commit] SF.net SVN: edumips64:[660] paper/ieee-tedu
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From: <sv...@ed...> - 2011-11-28 20:08:03
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Revision: 660
https://www.edumips.org/changeset/660
Author: lupino3
Date: 2011-11-28 21:07:56 +0100 (Mon, 28 Nov 2011)
Log Message:
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6 pages. Now let's NEVER EVER touch it again :)
Modified Paths:
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paper/ieee-tedu/bibliography.bib
paper/ieee-tedu/bios.tex
Modified: paper/ieee-tedu/bibliography.bib
===================================================================
--- paper/ieee-tedu/bibliography.bib 2011-11-28 20:07:01 UTC (rev 659)
+++ paper/ieee-tedu/bibliography.bib 2011-11-28 20:07:56 UTC (rev 660)
@@ -259,7 +259,6 @@
number = {4},
pages = {373--378},
title = {{Software Optimization for Improving Student Motivation in a Computer Architecture Course}},
-url = {http://ieeexplore.ieee.org/lpdocs/epic03/wrapper.htm?arnumber=4371514},
volume = {50},
year = {2007}
}
@@ -273,7 +272,6 @@
number = {2},
pages = {264--273},
title = {{Flexible Web-Based Educational System for Teaching Computer Architecture and Organization}},
-url = {http://ieeexplore.ieee.org/lpdocs/epic03/wrapper.htm?arnumber=1427876},
volume = {48},
year = {2005}
}
@@ -287,7 +285,6 @@
number = {2},
pages = {248--256},
title = {{p88110: A Graphical Simulator for Computer Architecture and Organization Courses}},
-url = {http://ieeexplore.ieee.org/lpdocs/epic03/wrapper.htm?arnumber=4909478},
volume = {52},
year = {2009}
}
@@ -301,7 +298,6 @@
number = {3},
pages = {482--489},
title = {{Multiple Case Studies to Enhance Project-Based Learning in a Computer Architecture Course}},
-url = {http://ieeexplore.ieee.org/lpdocs/epic03/wrapper.htm?arnumber=1495656},
volume = {48},
year = {2005}
}
@@ -315,7 +311,6 @@
number = {3},
pages = {336--341},
title = {{Teaching the Cache Memory System Using a Reconfigurable Approach}},
-url = {http://ieeexplore.ieee.org/lpdocs/epic03/wrapper.htm?arnumber=4544800},
volume = {51},
year = {2008}
}
@@ -328,7 +323,6 @@
number = {3},
pages = {244--250},
title = {{Spim-Cache: A Pedagogical Tool for Teaching Cache Memories Through Code-Based Exercises}},
-url = {http://ieeexplore.ieee.org/lpdocs/epic03/wrapper.htm?arnumber=4287124},
volume = {50},
year = {2007}
}
@@ -341,7 +335,6 @@
number = {1},
pages = {1--13},
title = {{Enhancing Learning in Introductory Computer Science Courses Through SCALE: An Empirical Study}},
-url = {http://ieeexplore.ieee.org/lpdocs/epic03/wrapper.htm?arnumber=5411930},
volume = {54},
year = {2011}
}
Modified: paper/ieee-tedu/bios.tex
===================================================================
--- paper/ieee-tedu/bios.tex 2011-11-28 20:07:01 UTC (rev 659)
+++ paper/ieee-tedu/bios.tex 2011-11-28 20:07:56 UTC (rev 660)
@@ -17,11 +17,13 @@
\begin{biographynophoto}{Maurizio
Palesi} (M'06) received the M.S. and Ph.D. degrees in computer
- engineering from the Universit\`a di Catania, Catania, Italy, in
+ engineering from the University of Catania, Italy, in
1999 and 2003, respectively. Since November 2010 he is Assistant
- Professor at Kore University, Enna, Italy. Dr. Palesi serves on the
- Editorial Board of VLSI Design journal as an Associate Editor since
- May 2007. He has served as a Guest Editor for the VLSI Design
+ Professor at Kore University, Enna, Italy.
+ %Dr. Palesi serves on the
+ %Editorial Board of VLSI Design journal as an Associate Editor since
+ %May 2007.
+ He has served as a Guest Editor for the VLSI Design
Journal, the International Journal of High Performance Systems
Architecture, Elsevier MICPRO Journal and ACM Transactions on Embedded
Computing Systems.
@@ -34,7 +36,7 @@
\begin{biographynophoto}{Fabrizio
Fazzino} (M'08) received the M.S. degree in Computer Engineering
- from the University of Catania in 1997. Until 2001 he was
+ from the University of Catania, Italy, in 1997. Until 2001 he was
responsible for the functional verification of 32-bit lines of
microprocessors at STMicroelectronics. Since 2004 he collaborates
with the Department of Computer and Telecommunications
@@ -42,19 +44,18 @@
\end{biographynophoto}
\begin{biographynophoto}{Vincenzo
- Catania} received the M.S. degree with Honors in electrical
- engineering from the Universit\`a di Catania, Catania, Italy, in
+ Catania} received the M.S. degree with Honors in Electrical
+ Engineering from the University of Catania, Italy, in
1982.
- Up until 1984, he was responsible for testing microprocessor
- system at STMicroelectronics, Catania, Italy.
+ %Up until 1984, he was responsible for testing microprocessor
+ %system at STMicroelectronics, Catania, Italy.
Since 1985, he has
cooperated in research on advanced computer architectures and
- computer networks with the Dipartimento di Ingegneria Informatica e
- delle Telecomunicazioni, Facolt\`a di Ingegneria, Universit\`a di
- Catania, where he is currently a Full Professor of Computer
- Science. Since November 2006, he has served as the Director of the
- Department of Computer Science and Telecommunications Engineering,
- Universit\`a di Catania.
+ computer networks with the Department of Computer Science and
+ Telecommunications Engineering, University of Catania,
+ where he is currently a Full Professor of Computer
+ Science. Since November 2006, he has served as the Director for this
+ Department.
%He is the author of more than 200 articles
%on international journals and conference proceedings and holds two
%patents.
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