[Edumips64-commit] SF.net SVN: edumips64:[656] paper/ieee-tedu
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From: <sv...@ed...> - 2011-11-26 17:55:50
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Revision: 656
https://www.edumips.org/changeset/656
Author: mpalesi
Date: 2011-11-26 18:55:43 +0100 (Sat, 26 Nov 2011)
Log Message:
-----------
fixed some typos
Modified Paths:
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paper/ieee-tedu/edumips-description.tex
paper/ieee-tedu/introduction.tex
paper/ieee-tedu/related-works.tex
paper/ieee-tedu/survey.tex
paper/ieee-tedu/teaching.tex
Modified: paper/ieee-tedu/edumips-description.tex
===================================================================
--- paper/ieee-tedu/edumips-description.tex 2011-11-26 16:45:13 UTC (rev 655)
+++ paper/ieee-tedu/edumips-description.tex 2011-11-26 17:55:43 UTC (rev 656)
@@ -76,12 +76,12 @@
that stage, allowing the student to easily correlate different sections of the
interface that are related to what happens in a given pipeline stage.
-The 7 frames of the simulator interface offer at a glance many informations
+The 7 frames of the simulator interface offer at a glance many details
about the current and past status of the simulation: the current content of
memory and General Purpose Registers; a graphical representation of the
pipeline stages and the instructions that are in each of them; the code of the
program; some statistics on the execution like the number of Cycles Per
-Instruction (CPI) or the number and class of stalls.
+Instruction (CPI) and the number and class of stalls.
% The frames are:
% \begin{itemize}
% \item{\textit{Cycles}}, that shows a plot of the status of the program
Modified: paper/ieee-tedu/introduction.tex
===================================================================
--- paper/ieee-tedu/introduction.tex 2011-11-26 16:45:13 UTC (rev 655)
+++ paper/ieee-tedu/introduction.tex 2011-11-26 17:55:43 UTC (rev 656)
@@ -4,7 +4,7 @@
\PARstart{C}{omputer} Architecture and Organization is one of the key
elements which characterizes the curricula of electrical and computer
engineers \cite{ieee-curricula}. One of the most critical aspects on teaching
-such discipline is how to support the theoretical concepts of the subjects
+this discipline is how to support the theoretical concepts of the subjects
with appropriate practical experiences usually organized as laboratory
assignments. Such experiences are mainly aimed at performing a quantitative
analysis on the system parameters related to both the \emph{computer
@@ -14,7 +14,7 @@
Instruction-Set Simulators (ISSs) represent the basic tool used for
supporting teaching of the topics related to the computer architecture
-part of the course. In this context, visual representation of the concept
+part of the course. In this context, visual representation of the concepts
introduced in the course, platform independence, distance learning support,
free availability of the tools and full coverage of the course topics are key
factors which determine the effectiveness of the teaching armaments.
@@ -23,8 +23,8 @@
aspects of a computer system, like assembly language~\cite{spim-web},
pipelining~\cite{windlx-web} or memory hierarchy~\cite{dinero-web}; the
heterogeneous nature of the tools used to cover the different topics of the
-course, could take to a fragmentation of the knowledge. In fact, analyzing
-separately the different sub-systems of the computer system, make it difficult
+course, could lead to a fragmentation of the knowledge. In fact, analyzing
+separately the different sub-systems of the computer system makes it difficult
for the student to understand how those parts interact with each other, with a
consequent blinding of the system-level view. Moreover most of them do not
offer the other qualities mentioned before, like platform independence or
Modified: paper/ieee-tedu/related-works.tex
===================================================================
--- paper/ieee-tedu/related-works.tex 2011-11-26 16:45:13 UTC (rev 655)
+++ paper/ieee-tedu/related-works.tex 2011-11-26 17:55:43 UTC (rev 656)
@@ -6,7 +6,7 @@
CPU organization usually taught in introductory Computer Architecture courses.
Some approaches focus on the adopted framework (e.g.
simulators, web-based learning, games), while others try to exploit the positive
-effect of collaborative projects in improving students' motivation.
+effects of collaborative projects in improving students' motivation.
% social/collaborative
In~\cite{Anguita2007} the authors propose a method and activity
@@ -26,18 +26,18 @@
As regards tools-based approaches, computer architecture topics are
addressed at different levels of abstraction and granularity. The
work~\cite{Djordjevic2005} introduces an educational computer system
-specifically designed to help teaching architecture topics from the
+specifically designed to help teach architecture topics from the
designer's perspective. In~\cite{Garcia2009} the authors propose a
pedagogical and fully configurable simulator of the MC88110 32-bit
microprocessor, with the aim to reduce the effort of using many
different simulators to cover the topics of a typical computer
-architecture course. The work in~\cite{Quislant2008} shows how an
+architecture course. The work in~\cite{Quislant2008} shows how an
educational framework has been used in introductory courses on
-Computer Architecture and Engineering to teach some topics related to
-the tuning of cache parameters with the aim of optimizing performance and energy
-consumption. In~\cite{Sahuquillo2007} authors present a pedagogical
-tool for dealing with code-based exercises expressly focused on cache
-memory related topics.
+Computer Architecture and Engineering to teach some topics related to
+the tuning of cache parameters with the aim of optimizing performance
+and energy consumption. In~\cite{Sahuquillo2007} authors present a
+pedagogical tool for dealing with code-based exercises expressly
+focused on cache memory related topics.
% added references
Finally, in~\cite{nikolic_tedu09} the authors compare 28 pedagogical tools,
Modified: paper/ieee-tedu/survey.tex
===================================================================
--- paper/ieee-tedu/survey.tex 2011-11-26 16:45:13 UTC (rev 655)
+++ paper/ieee-tedu/survey.tex 2011-11-26 17:55:43 UTC (rev 656)
@@ -33,18 +33,18 @@
adoption of the \EM{} project as the course's simulation environment.
A first aspect that was investigated is the general
speed/responsiveness of the simulator that, because of running on an
-high-level Java virtual machine could suffer of some
-performance/memory usage issues. However, $19\%$ of users evaluated as
-excellent the performance of the simulator and $60\%$ of them
-considered it good, while $18\%$ think that it was sufficient and
-$3\%$ considered it poor. The graphical user interface of \EM{} was
-evaluated as excellent by $60\%$ of users, $20\%$ of them found it
-good while the remaining $19\%$ and $1\%$ found it sufficient and poor
-respectively. Summarizing these results, it can definitely be
-concluded that the choice of using Java as a cross-platform technology
-did not penalize the user-experience from both the performance and
-visual points of view, since only a negligible fraction of the users
-rated \EM{} as less than sufficient.
+high-level Java virtual machine could suffer some performance/memory
+usage issues. However, $19\%$ of users evaluated as excellent the
+performance of the simulator and $60\%$ of them considered it good,
+while $18\%$ think that it was sufficient and $3\%$ considered it
+poor. The graphical user interface of \EM{} was evaluated as
+excellent by $60\%$ of users, $20\%$ of them found it good while the
+remaining $19\%$ and $1\%$ found it sufficient and poor respectively.
+Summarizing these results, it can definitely be concluded that the
+choice of using Java as a cross-platform technology did not penalize
+the user-experience from both the performance and visual points of
+view, since only a negligible fraction of the users rated \EM{} as
+less than sufficient.
\subsection{Impact on Learning}
\label{sec:impact_learning}
Modified: paper/ieee-tedu/teaching.tex
===================================================================
--- paper/ieee-tedu/teaching.tex 2011-11-26 16:45:13 UTC (rev 655)
+++ paper/ieee-tedu/teaching.tex 2011-11-26 17:55:43 UTC (rev 656)
@@ -29,11 +29,13 @@
order to receive immediate feedback on the learning process.
\subsection{Understanding the Instructions and Data Encoding}
-As regards the computer architecture course addressed in this paper, the initial part of the program
-will not only require the teacher to explain the fundamental concepts of
-instruction-set architectures and assembly language, but also hexadecimal number conversions,
-instruction encoding (with the three main types: R-type, I-type and J-type)
-and even the concept of endianness (ordering of byte in words into memory).
+As regards the computer architecture course addressed in this paper,
+the initial part of the program will not only require the teacher to
+explain the fundamental concepts of instruction-set architectures and
+assembly language, but also hexadecimal number conversions,
+instruction encoding (with the three main types: R-type, I-type and
+J-type) and even the concept of endianness (ordering of bytes within
+words into memory).
So, a first step with \EM{} should be to show how an assembly source
file written following a MIPS-like syntax is loaded into memory and
@@ -45,7 +47,7 @@
corresponding \EM{} \emph{memory} and \emph{code} windows described in
Section~\ref{subsec:gui}. Note that the bit-accurate encoding of
instructions of \EM{} allows students to verify how the three
-different instruction formats are represented in memory. In this case
+different instruction formats are represented in memory. At this stage
some of the windows inside \EM{} can be safely ignored (namely Cycles,
Pipeline and even Statistics), and the students should focus on
the remaining (Registers, Data and Code).
@@ -81,7 +83,7 @@
memory, according to the following \texttt{<condition>}.}
\end{itemize}
-{\bf Note:} further assignments can be derived from template like the one
+{\bf Note:} further assignments can be derived from a template like the one
presented above, depending on the chosen \texttt{condition}, e.g.
\emph{being even but not multiple of 4, being odd and less than 7, being
divisible by 9} and so on.
@@ -90,7 +92,7 @@
\subsection{Understanding the Pipeline}
The teaching of the pipelining mechanisms and the related
micro-architectural events involved can take a great benefit from
-the visual representation of CPU described in
+the visual representation of the CPU described in
Subsection~\ref{subsec:gui}. By executing code using \EM{} in the
cycle-by-cycle mode, the teacher can show how the different elements
of the pipeline deal with data (e.g. using forwarding, creating
@@ -99,7 +101,7 @@
Example assignments:
\begin{itemize}
-\item \emph{Try to enable (resp. disable) the forwarding settings of \EM{}
+\item \emph{Try to enable (disable) the forwarding settings of \EM{}
and identify which instructions of your code are affected by this micro-architectural
feature.}
\item \emph{When possible, try to rearrange your code so that the amount
@@ -148,16 +150,16 @@
\subsection{Understanding I/O and system calls}
These concepts are often addressed in the second part of the course,
-depending on the whole course organization, nevertheless they can be
-easily assessed using the \texttt{SYSCALL} instruction of
-\EM{}. There are two main classes of assignments that involve the usage of the
+depending on the whole course organization. Nevertheless they can be
+easily assessed using the \texttt{SYSCALL} instruction of \EM{}. There
+are two main classes of assignments that involve the usage of the
\texttt{SYSCALL} instruction:
\begin{itemize}
\item Assignments that test the students' ability to put properly the inputs
of the \texttt{SYSCALL} in the \texttt{.data} section and then get the outputs when
the \texttt{SYSCALL} has ended
\item Assignments that stress the usage of \texttt{SYSCALL}
-in combination to an external routine, called
+in combination with an external routine, called
\texttt{input\_unsigned}, provided with \EM{} as part of example
source code.
\end{itemize}
@@ -223,17 +225,18 @@
Example assignments:
\begin{itemize}
\item \emph{Starting from the results obtained when executing a given MIPS64 program
-code on separated instruction and data caches, compute which overall
-speedup would be achieved if the L1 data cache had only half of the
+code on separated instruction and data caches, compute the overall
+speedup that would be achieved if the L1 data cache had only half of the
previously reported demand misses.}
-\item \emph{Starting from the results obtained when executing your program
-code on unified L1 cache memory, find which miss penalty would be
-needed to get and overall system speedup of $30\%$ in performance.}
+\item \emph{Starting from the results obtained when executing your
+ program code on unified L1 cache memory, find the miss penalty that
+ would be needed to get an overall system speedup of $30\%$ in
+ performance.}
\end{itemize}
Both assignments stress students' ability to compute quantitatively the
correct $F_e$ from execution statistics. A very interesting feature is
present in the second category, which can result in a negative value
for $S_e$; this is useful to make the students understand that
-sometimes a desired speedup cannot be obtained, no matter how big is the
-$S_e$ of the component improved.
+sometimes a desired speedup cannot be obtained, no matter how much of
+the $S_e$ of the component is improved.
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