[Edumips64-commit] SF.net SVN: edumips64:[641] paper/ieee-tedu
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From: <sv...@ed...> - 2011-10-10 18:51:59
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Revision: 641
https://www.edumips.org/changeset/641
Author: lupino3
Date: 2011-10-10 20:51:53 +0200 (Mon, 10 Oct 2011)
Log Message:
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Attempts to squeeze the paper in 6 pages (it is still 7 pages)
Modified Paths:
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paper/ieee-tedu/abstract.tex
paper/ieee-tedu/edumips-description.tex
paper/ieee-tedu/teaching.tex
Modified: paper/ieee-tedu/abstract.tex
===================================================================
--- paper/ieee-tedu/abstract.tex 2011-10-10 18:39:20 UTC (rev 640)
+++ paper/ieee-tedu/abstract.tex 2011-10-10 18:51:53 UTC (rev 641)
@@ -3,11 +3,12 @@
dialect as an example. The most widespread books in this field use the MIPS64
Instruction Set Architecture (ISA) to help students in learning the
fundamentals of Computer Architecture, because of its orthogonality and its
-suitability for real-world applications. So students and teachers need tools
-that allow an experimental and practical approach to the theoretical knowledge
-acquired about the MIPS64 instruction set, with lots of debugging and
-educational aids, like the ability of executing step-by-step the program,
-having a detailed view of the pipeline, setting breakpoints, \etc.
+suitability for real-world applications.
+%So students and teachers need tools
+%that allow an experimental and practical approach to the theoretical knowledge
+%acquired about the MIPS64 instruction set, with lots of debugging and
+%educational aids, like the ability of executing step-by-step the program,
+%having a detailed view of the pipeline, setting breakpoints, \etc.
This paper shows how to use the \EM{} visual CPU Simulator as a supporting
tool for teaching the standard topics covered by an undergraduate course in
Modified: paper/ieee-tedu/edumips-description.tex
===================================================================
--- paper/ieee-tedu/edumips-description.tex 2011-10-10 18:39:20 UTC (rev 640)
+++ paper/ieee-tedu/edumips-description.tex 2011-10-10 18:51:53 UTC (rev 641)
@@ -74,26 +74,34 @@
throughout the user interface to represent events and data associated with
that stage, allowing the student to easily correlate different sections of the
interface that are related to what happens in a given pipeline stage.
-The frames are:
-\begin{itemize}
- \item{\textit{Cycles}}, that shows a plot of the status of the program
- execution over time;
- \item{\textit{Registers}}, that shows the status of the General Purpose
- Registers;
- \item{\textit{Statistics}}, that shows some statistics about the program
- execution, like the current number of Cycles Per Instructions (CPI), the
- stalls encountered so far and the code size;
- \item{\textit{Pipeline}}, that shows a graphical representation of the
- pipeline as a series of connected functional blocks with the current
- instruction drawn inside the block itself;
- \item{\textit{Memory}}, that shows the current status of the memory,
- both represented as a sequence of bits and as the student specified it
- in the source code;
- \item{\textit{Code}}, that shows the instructions entered by the student in
- the source code of the program;
- \item{\textit{Input/Output}}, that offers a way to interact with the user
- when some \texttt{SYSCALL} instructions are executed.
-\end{itemize}
+
+The 7 frames of the simulator interface offer at a glance many informations
+about the current and past status of the simulation: the current content of
+memory and General Purpose Registers; a graphical representation of the
+pipeline stages and the instructions that are in each of them; the code of the
+program; some statistics on the execution like the number of Cycles Per
+Instruction (CPI) or the number and class of stalls.
+% The frames are:
+% \begin{itemize}
+% \item{\textit{Cycles}}, that shows a plot of the status of the program
+% execution over time;
+% \item{\textit{Registers}}, that shows the status of the General Purpose
+% Registers;
+% \item{\textit{Statistics}}, that shows some statistics about the program
+% execution, like the current number of Cycles Per Instructions (CPI), the
+% stalls encountered so far and the code size;
+% \item{\textit{Pipeline}}, that shows a graphical representation of the
+% pipeline as a series of connected functional blocks with the current
+% instruction drawn inside the block itself;
+% \item{\textit{Memory}}, that shows the current status of the memory,
+% both represented as a sequence of bits and as the student specified it
+% in the source code;
+% \item{\textit{Code}}, that shows the instructions entered by the student in
+% the source code of the program;
+% \item{\textit{Input/Output}}, that offers a way to interact with the user
+% when some \texttt{SYSCALL} instructions are executed.
+% \end{itemize}
+
The user interface offers to the student the ability to execute the program
step-wise or at once; it can also be chosen whether during multi-step
execution the interface should display each intermediate step or if it should
Modified: paper/ieee-tedu/teaching.tex
===================================================================
--- paper/ieee-tedu/teaching.tex 2011-10-10 18:39:20 UTC (rev 640)
+++ paper/ieee-tedu/teaching.tex 2011-10-10 18:51:53 UTC (rev 641)
@@ -10,15 +10,16 @@
by the bare-metal CPU able to execute assembly sources translated (``assembled'')
into binary machine code.
\EM{} can be productively used to test and improve the students' understanding of
-the following topics:
-\begin{itemize}
-\item {Instruction/Data encoding}
-\item {MIPS instruction set}
-\item {Pipeline}
-\item {I/O and system calls}
-\item {Memory hierarchy}
-\item {Amdahl's Law}
-\end{itemize}
+the following topics: instructions and data encoding; the MIPS instruction set;
+pipelining; I/O and system calls; the memory hierarchy; Amdahl's law.
+%\begin{itemize}
+%\item {Instruction/Data encoding}
+%\item {MIPS instruction set}
+%\item {Pipeline}
+%\item {I/O and system calls}
+%\item {Memory hierarchy}
+%\item {Amdahl's Law}
+%\end{itemize}
In the next sections the teaching methodology adopted for each of the areas
listed above will briefly be described, followed by some proof-of-concept
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