DownloadlibLCS is a hardware description library in C++ aiming to be as powerfull and easy as the Verilog HDL. It currently supports logic gates, flipflops, clock, and facilitates delays, continuous assignments and variable value dumping into VCD files.
License
GNU Library or Lesser General Public License version 2.0 (LGPLv2), GNU General Public License version 2.0 (GPLv2)Follow Logic Circuit Simulation in C++
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