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[OpenOCD-commit] Main OpenOCD repository branch, master, updated. v0.10.0-1178-gef6eb5691

From: OpenOCD-Gerrit <ope...@us...> - 2020-04-13 16:52:48

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- Log -----------------------------------------------------------------
commit ef6eb5691aaaa3b13dccfff4a180b745803ae10b
Author: Tarek BOCHKATI <tar...@gm...>
Date:   Mon Apr 6 13:49:17 2020 +0100

    server/gdb_server: set gdb_connection::ctrl_c type to bool
    
    Change-Id: I828b83b181f7a222ee2e6cb67eb337c6cd8712ac
    Signed-off-by: Tarek BOCHKATI <tar...@gm...>
    Reviewed-on: http://openocd.zylin.com/5566
    Tested-by: jenkins
    Reviewed-by: Marc Schink <de...@za...>

diff --git a/src/server/gdb_server.c b/src/server/gdb_server.c
index 3f2632b03..857cffd9c 100644
--- a/src/server/gdb_server.c
+++ b/src/server/gdb_server.c
@@ -71,7 +71,7 @@ struct gdb_connection {
 	char buffer[GDB_BUFFER_SIZE + 1]; /* Extra byte for nul-termination */
 	char *buf_p;
 	int buf_cnt;
-	int ctrl_c;
+	bool ctrl_c;
 	enum target_state frontend_state;
 	struct image *vflash_image;
 	bool closed;
@@ -444,7 +444,7 @@ static int gdb_put_packet_inner(struct connection *connection,
 			log_remove_callback(gdb_log_callback, connection);
 			LOG_WARNING("negative reply, retrying");
 		} else if (reply == 0x3) {
-			gdb_con->ctrl_c = 1;
+			gdb_con->ctrl_c = true;
 			retval = gdb_get_char(connection, &reply);
 			if (retval != ERROR_OK)
 				return retval;
@@ -649,7 +649,7 @@ static int gdb_get_packet_inner(struct connection *connection,
 					LOG_WARNING("negative acknowledgment, but no packet pending");
 					break;
 				case 0x3:
-					gdb_con->ctrl_c = 1;
+					gdb_con->ctrl_c = true;
 					*len = 0;
 					return ERROR_OK;
 				default:
@@ -785,7 +785,7 @@ static void gdb_signal_reply(struct target *target, struct connection *connectio
 		sig_reply_len = snprintf(sig_reply, sizeof(sig_reply), "T%2.2x%s%s",
 				signal_var, stop_reason, current_thread);
 
-		gdb_connection->ctrl_c = 0;
+		gdb_connection->ctrl_c = false;
 	}
 
 	gdb_put_packet(connection, sig_reply, sig_reply_len);
@@ -942,7 +942,7 @@ static int gdb_new_connection(struct connection *connection)
 	/* initialize gdb connection information */
 	gdb_connection->buf_p = gdb_connection->buffer;
 	gdb_connection->buf_cnt = 0;
-	gdb_connection->ctrl_c = 0;
+	gdb_connection->ctrl_c = false;
 	gdb_connection->frontend_state = TARGET_HALTED;
 	gdb_connection->vflash_image = NULL;
 	gdb_connection->closed = false;
@@ -3453,7 +3453,7 @@ static int gdb_input_inner(struct connection *connection)
 					retval = target_poll(t);
 				if (retval != ERROR_OK)
 					target_call_event_callbacks(target, TARGET_EVENT_GDB_HALT);
-				gdb_con->ctrl_c = 0;
+				gdb_con->ctrl_c = false;
 			} else {
 				LOG_INFO("The target is not running when halt was requested, stopping GDB.");
 				target_call_event_callbacks(target, TARGET_EVENT_GDB_HALT);

-----------------------------------------------------------------------

Summary of changes:
 src/server/gdb_server.c | 12 ++++++------
 1 file changed, 6 insertions(+), 6 deletions(-)


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[OpenOCD-commit] Main OpenOCD repository branch, master, updated. v0.10.0-1177-gb9a30e089

From: OpenOCD-Gerrit <ope...@us...> - 2020-04-12 21:07:22

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- Log -----------------------------------------------------------------
commit b9a30e089227db441afd300989b0befce21b7da3
Author: Ake Rehnman <ake...@gm...>
Date:   Sun Mar 29 12:13:18 2020 +0200

    Entering SWIM mode on ST-LINK does not update swim status word.
    
    As a consequence of a previous failed SWIM command any
    subsequent attempts to enter SWIM mode fails. Change
    stlink_usb_mode_enter to use stlink_usb_xfer_noerrcheck
    instead.
    
    Change-Id: I5c6a1a8e68d3dc77ec37264880383366fa6a75d9
    Signed-off-by: Ake Rehnman <ake...@gm...>
    Reviewed-on: http://openocd.zylin.com/5547
    Tested-by: jenkins
    Reviewed-by: Antonio Borneo <bor...@gm...>

diff --git a/src/jtag/drivers/stlink_usb.c b/src/jtag/drivers/stlink_usb.c
index 45bb5019f..a905576c8 100644
--- a/src/jtag/drivers/stlink_usb.c
+++ b/src/jtag/drivers/stlink_usb.c
@@ -1230,9 +1230,8 @@ static int stlink_usb_mode_enter(void *handle, enum stlink_mode type)
 		case STLINK_MODE_DEBUG_SWIM:
 			h->cmdbuf[h->cmdidx++] = STLINK_SWIM_COMMAND;
 			h->cmdbuf[h->cmdidx++] = STLINK_SWIM_ENTER;
-			/* no answer for this function... */
-			rx_size = 0;
-			break;
+			/* swim enter does not return any response or status */
+			return stlink_usb_xfer_noerrcheck(handle, h->databuf, 0);
 		case STLINK_MODE_DFU:
 		case STLINK_MODE_MASS:
 		default:

commit 68e200c660aefe960e351452748f299c4a334474
Author: Tarek BOCHKATI <tar...@gm...>
Date:   Mon Mar 30 13:06:18 2020 +0200

    stlink: always use a valid endpoint
    
    In order to extend the driver to support stlink-server over TCP,
    we should always use a valid endpoint, as stlink-server is not permissive
    and do not accept the invalid STLINK_NULL_EP.
    
    STLINK_NULL_EP value was used for commands without an expected reply,
    this value could be replaced with a valid endpoint without any impact
    when the size is set to zero.
    
    Change-Id: I003ad364e03d3a10bc036772db86310d996cbe81
    Signed-off-by: Tarek BOCHKATI <tar...@gm...>
    Reviewed-on: http://openocd.zylin.com/5455
    Tested-by: jenkins
    Reviewed-by: Antonio Borneo <bor...@gm...>

diff --git a/src/jtag/drivers/stlink_usb.c b/src/jtag/drivers/stlink_usb.c
index f4992daa6..45bb5019f 100644
--- a/src/jtag/drivers/stlink_usb.c
+++ b/src/jtag/drivers/stlink_usb.c
@@ -55,7 +55,6 @@
 #define STLINK_WRITE_TIMEOUT 1000
 #define STLINK_READ_TIMEOUT 1000
 
-#define STLINK_NULL_EP        0
 #define STLINK_RX_EP          (1|ENDPOINT_IN)
 #define STLINK_TX_EP          (2|ENDPOINT_OUT)
 #define STLINK_TRACE_EP       (3|ENDPOINT_IN)
@@ -1251,7 +1250,8 @@ static int stlink_usb_mode_leave(void *handle, enum stlink_mode type)
 
 	assert(handle != NULL);
 
-	stlink_usb_init_buffer(handle, STLINK_NULL_EP, 0);
+	/* command with no reply, use a valid endpoint but zero size */
+	stlink_usb_init_buffer(handle, h->rx_ep, 0);
 
 	switch (type) {
 		case STLINK_MODE_DEBUG_JTAG:
@@ -1272,7 +1272,7 @@ static int stlink_usb_mode_leave(void *handle, enum stlink_mode type)
 			return ERROR_FAIL;
 	}
 
-	res = stlink_usb_xfer_noerrcheck(handle, 0, 0);
+	res = stlink_usb_xfer_noerrcheck(handle, h->databuf, 0);
 
 	if (res != ERROR_OK)
 		return res;

-----------------------------------------------------------------------

Summary of changes:
 src/jtag/drivers/stlink_usb.c | 11 +++++------
 1 file changed, 5 insertions(+), 6 deletions(-)


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[OpenOCD-commit] Main OpenOCD repository branch, master, updated. v0.10.0-1175-g263296e54

From: OpenOCD-Gerrit <ope...@us...> - 2020-04-12 21:06:50

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The branch, master has been updated
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- Log -----------------------------------------------------------------
commit 263296e549455afa1484cf9dec75fc3014a83954
Author: Antonio Borneo <bor...@gm...>
Date:   Mon Feb 3 10:02:54 2020 +0100

    jtag: flush queue after reset for drivers using old reset model
    
    Not all the jtag drivers have been migrated to the new reset model
    and for those only we need to flush the jtag queue to make the
    reset working with command 'adapter [de]assert ...'.
    
    Add a queue flush and a FIXME comment to remove both when all the
    drivers would be migrated.
    
    Change-Id: Ib6667f987b1be2bce492841040302e742dd1cad1
    Signed-off-by: Antonio Borneo <bor...@gm...>
    Reviewed-on: http://openocd.zylin.com/5430
    Tested-by: jenkins

diff --git a/src/jtag/core.c b/src/jtag/core.c
index 001523365..2d0c84205 100644
--- a/src/jtag/core.c
+++ b/src/jtag/core.c
@@ -2020,6 +2020,11 @@ int adapter_resets(int trst, int srst)
 
 		/* adapters without trst signal will eventually use tlr sequence */
 		jtag_add_reset(trst, srst);
+		/*
+		 * The jtag queue is still used for reset by some adapter. Flush it!
+		 * FIXME: To be removed when all adapter drivers will be updated!
+		 */
+		jtag_execute_queue();
 		return ERROR_OK;
 	} else if (transport_is_swd() || transport_is_hla() ||
 			   transport_is_dapdirect_swd() || transport_is_dapdirect_jtag()) {

-----------------------------------------------------------------------

Summary of changes:
 src/jtag/core.c | 5 +++++
 1 file changed, 5 insertions(+)


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[OpenOCD-commit] Main OpenOCD repository branch, master, updated. v0.10.0-1174-g16706256e

From: OpenOCD-Gerrit <ope...@us...> - 2020-04-12 21:04:57

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- Log -----------------------------------------------------------------
commit 16706256e43cfdf6eb6b66e98f12f7a77f142edb
Author: Antonio Borneo <bor...@gm...>
Date:   Mon Mar 16 14:53:18 2020 +0100

    gdb_server: print the target associated to the gdb port
    
    While running OpenOCD on multi-target SoC, it's not immediate to
    detect which target is associated to each GDB port. The log only
    reports:
            Info : Listening on port 3333 for gdb connections
    and a verbose debug log is required to get such info.
    
    Promote to LOG_INFO() the existing debug message that already
    reports the association, obtaining for each port:
            Info : starting gdb server for stm32mp15x.cpu0 on 3333
            Info : Listening on port 3333 for gdb connections
    
    Change-Id: I1bd75655a3449222c959e6e82f5e0f8f5acd908a
    Signed-off-by: Antonio Borneo <bor...@gm...>
    Reviewed-on: http://openocd.zylin.com/5525
    Tested-by: jenkins
    Reviewed-by: Jan Matyas <ma...@co...>
    Reviewed-by: Tarek BOCHKATI <tar...@gm...>

diff --git a/src/server/gdb_server.c b/src/server/gdb_server.c
index 0ca4fa4ee..3f2632b03 100644
--- a/src/server/gdb_server.c
+++ b/src/server/gdb_server.c
@@ -3489,7 +3489,7 @@ static int gdb_target_start(struct target *target, const char *port)
 	if (NULL == gdb_service)
 		return -ENOMEM;
 
-	LOG_DEBUG("starting gdb server for %s on %s", target_name(target), port);
+	LOG_INFO("starting gdb server for %s on %s", target_name(target), port);
 
 	gdb_service->target = target;
 	gdb_service->core[0] = -1;

-----------------------------------------------------------------------

Summary of changes:
 src/server/gdb_server.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)


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[OpenOCD-commit] Main OpenOCD repository branch, master, updated. v0.10.0-1173-g17ac52360

From: OpenOCD-Gerrit <ope...@us...> - 2020-04-12 21:04:28

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commit 17ac52360fc27eed9f58506a102a32b653d4d48c
Author: Antonio Borneo <bor...@gm...>
Date:   Tue Mar 10 23:07:42 2020 +0100

    cortex_m: remove deprecation for soft_reset_halt
    
    The command "soft_reset_halt" is deprecated since mid 2013 with
    the commit 146dfe32956d ("cortex_m: deprecate soft_reset_halt").
    Nevertheless it is still extremely useful with multicore chips
    where it allows to reset only one of the cores, option not
    available through asserting the chip-wide srst.
    It also get useful to handle the reset on some problematic chip,
    as in http://openocd.zylin.com/5489
    
    Replace the warning about deprecation with a more light debug
    message.
    
    Change-Id: I52de6359475ba31014ae77e596a87fe88b252177
    Signed-off-by: Antonio Borneo <bor...@gm...>
    Reviewed-on: http://openocd.zylin.com/5514
    Tested-by: jenkins
    Reviewed-by: Edward Fewell <ef...@ti...>
    Reviewed-by: Tarek BOCHKATI <tar...@gm...>

diff --git a/src/target/cortex_m.c b/src/target/cortex_m.c
index 9a1f2b16f..af245dfc0 100644
--- a/src/target/cortex_m.c
+++ b/src/target/cortex_m.c
@@ -710,11 +710,11 @@ static int cortex_m_soft_reset_halt(struct target *target)
 	uint32_t dcb_dhcsr = 0;
 	int retval, timeout = 0;
 
-	/* soft_reset_halt is deprecated on cortex_m as the same functionality
-	 * can be obtained by using 'reset halt' and 'cortex_m reset_config vectreset'
-	 * As this reset only used VC_CORERESET it would only ever reset the cortex_m
+	/* on single cortex_m MCU soft_reset_halt should be avoided as same functionality
+	 * can be obtained by using 'reset halt' and 'cortex_m reset_config vectreset'.
+	 * As this reset only uses VC_CORERESET it would only ever reset the cortex_m
 	 * core, not the peripherals */
-	LOG_WARNING("soft_reset_halt is deprecated, please use 'reset halt' instead.");
+	LOG_DEBUG("soft_reset_halt is discouraged, please use 'reset halt' instead.");
 
 	/* Set C_DEBUGEN */
 	retval = cortex_m_write_debug_halt_mask(target, 0, C_STEP | C_MASKINTS);

-----------------------------------------------------------------------

Summary of changes:
 src/target/cortex_m.c | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)


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[OpenOCD-commit] Main OpenOCD repository branch, master, updated. v0.10.0-1172-g4873503ae

From: OpenOCD-Gerrit <ope...@us...> - 2020-04-12 21:03:44

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- Log -----------------------------------------------------------------
commit 4873503ae44ff16dde170e3337945e99ad05e408
Author: Antonio Borneo <bor...@gm...>
Date:   Wed Feb 12 22:26:51 2020 +0100

    cortex_a: don't wait for target halted in deassert_reset()
    
    The tcl script src/target/startup.tcl has already the proper
    centralized support to wait for all targets to halt after the
    command "reset halt". The extra wait in cortex_a_deassert_reset()
    is not required.
    This extra wait is also an issue for multi-core support, because
    waiting for one core to halt can delay the halt request to the
    other cores.
    
    Replace the indirect call to cortex_a_halt(), that embeds the wait
    for halt, with a low-level halt sequence.
    
    The on-going work on the reset framework is compatible with this
    change; in fact it keeps in startup.tcl the wait for targets to
    halt, even if current code proposal for cortex_a simply removes
    the function cortex_a_deassert_reset().
    
    Change-Id: Ic661c3791a29ba7d520e31f85a61f939a646feb5
    Signed-off-by: Antonio Borneo <bor...@gm...>
    Reviewed-on: http://openocd.zylin.com/5472
    Tested-by: jenkins
    Reviewed-by: Tarek BOCHKATI <tar...@gm...>

diff --git a/src/target/cortex_a.c b/src/target/cortex_a.c
index 729a173eb..f71b15524 100644
--- a/src/target/cortex_a.c
+++ b/src/target/cortex_a.c
@@ -1703,6 +1703,7 @@ static int cortex_a_assert_reset(struct target *target)
 
 static int cortex_a_deassert_reset(struct target *target)
 {
+	struct armv7a_common *armv7a = target_to_armv7a(target);
 	int retval;
 
 	LOG_DEBUG(" ");
@@ -1721,7 +1722,8 @@ static int cortex_a_deassert_reset(struct target *target)
 			LOG_WARNING("%s: ran after reset and before halt ...",
 				target_name(target));
 			if (target_was_examined(target)) {
-				retval = target_halt(target);
+				retval = mem_ap_write_atomic_u32(armv7a->debug_ap,
+						armv7a->debug_base + CPUDBG_DRCR, DRCR_HALT);
 				if (retval != ERROR_OK)
 					return retval;
 			} else

-----------------------------------------------------------------------

Summary of changes:
 src/target/cortex_a.c | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)


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commit cbbc56f7f7bef9e0e1cb8711576449c62fe31654
Author: Antonio Borneo <bor...@gm...>
Date:   Thu Mar 26 15:16:52 2020 +0100

    stlink: remove only instance of useconds_t
    
    The usleep() function, and its associated useconds_t type
    specifier, has been obsoleted by POSIX.1-2008.
    
    OpenOCD has 28 call to usleep(), that should be migrated to the
    replacement nanosleep(), but due to the different prototype
            int nanosleep(const struct timespec *req, struct timespec *rem);
    this can take some effort.
    
    The type useconds_t is used in only one case, where it's used both
    as parameter of usleep() and as value passed to LOG_DEBUG(). Due
    to different implementation of useconds_t, there are cases that
    trigger a compile warning in LOG_DEBUG() when useconds_t is more
    than 32 bit.
    E.g. with unistd.h in MinGW 4.x, useconds_t is defined as unsigned
    long, thus being 32 or 64 bits depending on the target.
    
    Replace the only instance of useconds_t.
    
    Change-Id: I21724f8b06780abdb003a57222ff1d6840ff5419
    Signed-off-by: Antonio Borneo <bor...@gm...>
    Reviewed-on: http://openocd.zylin.com/5544
    Tested-by: jenkins
    Reviewed-by: Ake Rehnman <ake...@gm...>

diff --git a/src/jtag/drivers/stlink_usb.c b/src/jtag/drivers/stlink_usb.c
index 3f9ce37a9..f4992daa6 100644
--- a/src/jtag/drivers/stlink_usb.c
+++ b/src/jtag/drivers/stlink_usb.c
@@ -834,7 +834,7 @@ static int stlink_cmd_allow_retry(void *handle, const uint8_t *buf, int size)
 
 		res = stlink_usb_error_check(handle);
 		if (res == ERROR_WAIT && retries < MAX_WAIT_RETRIES) {
-			useconds_t delay_us = (1<<retries++) * 1000;
+			unsigned int delay_us = (1<<retries++) * 1000;
 			LOG_DEBUG("stlink_cmd_allow_retry ERROR_WAIT, retry %d, delaying %u microseconds", retries, delay_us);
 			usleep(delay_us);
 			continue;

-----------------------------------------------------------------------

Summary of changes:
 src/jtag/drivers/stlink_usb.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)


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From: OpenOCD-Gerrit <ope...@us...> - 2020-04-12 21:02:46

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- Log -----------------------------------------------------------------
commit 02903916dd004f03290bdf766e02ce73151f7d71
Author: Antonio Borneo <bor...@gm...>
Date:   Thu Mar 26 23:35:08 2020 +0100

    flash/nor/nrf5: pass unsigned char to isalnum()
    
    In newlib, the argument of isalnum() and the similar functions in
    ctype.h is checked to be either an int or an unsigned char.
    Using a normal (signed) char triggers a compile time warning
            warning: array subscript has type âcharâ [-Wchar-subscripts]
    
    Rewrite the function to separate the internal unsigned char
    operations from the (signed) char parameter.
    
    Change-Id: I5f19115f0b2de2b5b35dc07ef4b58a96161268ee
    Signed-off-by: Antonio Borneo <bor...@gm...>
    Reported-by: Ãke Rehnman <ake...@gm...>
    Fixes: 5da746fa09 ("flash/nor/nrf5: detect newer devices without HWID table")
    Reviewed-on: http://openocd.zylin.com/5545
    Tested-by: jenkins
    Reviewed-by: Ake Rehnman <ake...@gm...>

diff --git a/src/flash/nor/nrf5.c b/src/flash/nor/nrf5.c
index 8422589b8..5bef8487c 100644
--- a/src/flash/nor/nrf5.c
+++ b/src/flash/nor/nrf5.c
@@ -570,10 +570,14 @@ static int nrf5_protect(struct flash_bank *bank, int set, int first, int last)
 
 static bool nrf5_info_variant_to_str(uint32_t variant, char *bf)
 {
-	h_u32_to_be((uint8_t *)bf, variant);
-	bf[4] = '\0';
-	if (isalnum(bf[0]) && isalnum(bf[1]) && isalnum(bf[2]) && isalnum(bf[3]))
+	uint8_t b[4];
+
+	h_u32_to_be(b, variant);
+	if (isalnum(b[0]) && isalnum(b[1]) && isalnum(b[2]) && isalnum(b[3])) {
+		memcpy(bf, b, 4);
+		bf[4] = 0;
 		return true;
+	}
 
 	strcpy(bf, "xxxx");
 	return false;

-----------------------------------------------------------------------

Summary of changes:
 src/flash/nor/nrf5.c | 10 +++++++---
 1 file changed, 7 insertions(+), 3 deletions(-)


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From: OpenOCD-Gerrit <ope...@us...> - 2020-04-12 21:02:06

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commit 27d04d42842b31a3eb83de965ba7f3dc0fac3142
Author: Antonio Borneo <bor...@gm...>
Date:   Sun Mar 29 23:19:29 2020 +0200

    sysfsgpio: minor fix for bool types
    
    Return bool value in functions that return bool.
    Change return type to bool to function is_gpio_valid().
    
    Change-Id: Ic2e62be737772b22e69881c034956549f659370b
    Signed-off-by: Antonio Borneo <bor...@gm...>
    Reviewed-on: http://openocd.zylin.com/5552
    Tested-by: jenkins
    Reviewed-by: Marc Schink <de...@za...>

diff --git a/src/jtag/drivers/sysfsgpio.c b/src/jtag/drivers/sysfsgpio.c
index bf33767c8..c398d5384 100644
--- a/src/jtag/drivers/sysfsgpio.c
+++ b/src/jtag/drivers/sysfsgpio.c
@@ -61,7 +61,7 @@
  *
  * Assume here that there will be less than 10000 gpios on a system
  */
-static int is_gpio_valid(int gpio)
+static bool is_gpio_valid(int gpio)
 {
 	return gpio >= 0 && gpio < 10000;
 }
@@ -603,23 +603,23 @@ static void cleanup_all_fds(void)
 static bool sysfsgpio_jtag_mode_possible(void)
 {
 	if (!is_gpio_valid(tck_gpio))
-		return 0;
+		return false;
 	if (!is_gpio_valid(tms_gpio))
-		return 0;
+		return false;
 	if (!is_gpio_valid(tdi_gpio))
-		return 0;
+		return false;
 	if (!is_gpio_valid(tdo_gpio))
-		return 0;
-	return 1;
+		return false;
+	return true;
 }
 
 static bool sysfsgpio_swd_mode_possible(void)
 {
 	if (!is_gpio_valid(swclk_gpio))
-		return 0;
+		return false;
 	if (!is_gpio_valid(swdio_gpio))
-		return 0;
-	return 1;
+		return false;
+	return true;
 }
 
 static int sysfsgpio_init(void)

-----------------------------------------------------------------------

Summary of changes:
 src/jtag/drivers/sysfsgpio.c | 18 +++++++++---------
 1 file changed, 9 insertions(+), 9 deletions(-)


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From: OpenOCD-Gerrit <ope...@us...> - 2020-04-10 12:58:59

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commit 21b9a0e1e33f371026d6497ab3ce81ed9ea73db4
Author: Marek Vasut <mar...@gm...>
Date:   Fri Jan 10 02:06:45 2020 +0100

    travis: Add .travis.yml
    
    Add basic Travis-CI .travis.yml, to let Travis CI run automated build tests.
    
    Change-Id: Iceae442c13f30b57842b300c0920108b614c75f7
    Signed-off-by: Marek Vasut <mar...@gm...>
    Reviewed-on: http://openocd.zylin.com/5414
    Tested-by: jenkins
    Reviewed-by: Oleksij Rempel <li...@re...>

diff --git a/.travis.yml b/.travis.yml
new file mode 100644
index 000000000..da6b94c3f
--- /dev/null
+++ b/.travis.yml
@@ -0,0 +1,91 @@
+# SPDX-License-Identifier: GPL-2.0+
+# Copyright Marek Vasut <ma...@de...>
+
+# OpenOCD on Travis CI - https://travis-ci.org/
+
+sudo: required
+dist: bionic
+
+arch:
+  - amd64
+  - arm64
+  - ppc64le
+  - s390x
+
+addons:
+  apt:
+    sources:
+      - sourceline: 'ppa:ubuntu-toolchain-r/test'
+      - sourceline: 'deb https://apt.llvm.org/bionic/ llvm-toolchain-bionic-9 main'
+        key_url: 'https://apt.llvm.org/llvm-snapshot.gpg.key'
+    packages:
+      - libftdi-dev
+      - libhidapi-dev
+      - libjaylink-dev
+
+env:
+  - CC=gcc-9
+  - CC=clang-9
+
+language: c
+
+git:
+  depth: 1
+  autocrlf: input
+
+script:
+  - $mingw64 ${CC} --version
+  - $mingw64 env
+  - $mingw64 ./bootstrap
+  - $mingw64 ./configure
+  - $mingw64 make
+
+before_install:
+  - |-
+    case $TRAVIS_OS_NAME in
+      linux)
+        sudo apt install ${CC} libusb-1.0-0-dev
+        ;;
+      osx)
+        brew install libtool automake libusb libusb-compat hidapi libftdi
+        ;;
+      windows)
+        [[ ! -f C:/tools/msys64/msys2_shell.cmd ]] && rm -rf C:/tools/msys64
+        choco uninstall -y mingw
+        choco upgrade --no-progress -y msys2
+        export msys2='cmd //C RefreshEnv.cmd '
+        export msys2+='& set MSYS=winsymlinks:nativestrict '
+        export msys2+='& C:\\tools\\msys64\\msys2_shell.cmd -defterm -no-start'
+        export mingw64="$msys2 -mingw64 -full-path -here -c \$\* --"
+        export msys2+=" -msys2 -c \$\* --"
+        $msys2 pacman --sync --noconfirm --needed mingw-w64-x86_64-toolchain autoconf autoconf-archive automake automake-wrapper binutils gcc gettext git libtool m4 make pkg-config tcl texinfo mingw-w64-x86_64-libusb mingw-w64-x86_64-libusb-compat-git mingw-w64-x86_64-libjaylink-git mingw-w64-x86_64-libftdi mingw-w64-x86_64-hidapi mingw-w64-x86_64-clang
+        ## FIXME: Also build for i686?
+        ## Install more MSYS2 packages from https://packages.msys2.org/base here
+        taskkill //IM gpg-agent.exe //F  # https://travis-ci.community/t/4967
+        export PATH=/C/tools/msys64/mingw64/bin:$PATH
+        export MAKE=mingw32-make  # so that Autotools can find it
+        ;;
+    esac
+
+before_cache:
+- |-
+    case $TRAVIS_OS_NAME in
+      windows)
+        # https://unix.stackexchange.com/a/137322/107554
+        $msys2 pacman --sync --clean --noconfirm
+        ;;
+    esac
+
+cache:
+    directories:
+    - $HOME/AppData/Local/Temp/chocolatey
+    - /C/tools/msys64
+
+matrix:
+  include:
+    - os: osx
+      env:
+        - CC=clang
+    - os: windows
+      env:
+        - CC=gcc

-----------------------------------------------------------------------

Summary of changes:
 .travis.yml | 91 +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
 1 file changed, 91 insertions(+)
 create mode 100644 .travis.yml


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[OpenOCD-commit] Main OpenOCD repository branch, master, updated. v0.10.0-1167-g25efc1506

From: OpenOCD-Gerrit <ope...@us...> - 2020-04-09 10:07:31

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- Log -----------------------------------------------------------------
commit 25efc150694042b349b8df1ff7c41f16955c5288
Author: Jan Matyas <ma...@co...>
Date:   Wed Apr 1 11:58:20 2020 +0200

    target: added events TARGET_EVENT_STEP_START and _END
    
    Events TARGET_EVENT_STEP_START and TARGET_EVENT_STEP_END
    have been added - analogous to already existing events
    TARGET_EVENT_RESUME_*.
    
    This is an example of a concrete use case where having
    these events is important:
    
    In RISC-V processors without Debug Program Buffer, OpenOCD
    cannot execute fence/fence.i when resuming or single-
    stepping. With these events implemented, the user can
    instead provide custom operations to achieve that same
    effect prior to resuming the processor.
    
    Change-Id: I786348ff08940759d99b0f24e9e0ed5a44581094
    Signed-off-by: Jan Matyas <ma...@co...>
    Reviewed-on: http://openocd.zylin.com/5551
    Tested-by: jenkins
    Reviewed-by: Tim Newsome <ti...@si...>

diff --git a/doc/openocd.texi b/doc/openocd.texi
index 250db326f..0c58a682c 100644
--- a/doc/openocd.texi
+++ b/doc/openocd.texi
@@ -4924,6 +4924,10 @@ when reset disables PLLs needed to use a fast clock.
 @* After all targets have resumed
 @item @b{resumed}
 @* Target has resumed
+@item @b{step-start}
+@* Before a target is single-stepped
+@item @b{step-end}
+@* After single-step has completed
 @item @b{trace-config}
 @* After target hardware trace configuration was changed
 @end itemize
diff --git a/src/target/target.c b/src/target/target.c
index 50dd1488f..24fa416f8 100644
--- a/src/target/target.c
+++ b/src/target/target.c
@@ -205,6 +205,8 @@ static const Jim_Nvp nvp_target_event[] = {
 	{ .value = TARGET_EVENT_RESUMED, .name = "resumed" },
 	{ .value = TARGET_EVENT_RESUME_START, .name = "resume-start" },
 	{ .value = TARGET_EVENT_RESUME_END, .name = "resume-end" },
+	{ .value = TARGET_EVENT_STEP_START, .name = "step-start" },
+	{ .value = TARGET_EVENT_STEP_END, .name = "step-end" },
 
 	{ .name = "gdb-start", .value = TARGET_EVENT_GDB_START },
 	{ .name = "gdb-end", .value = TARGET_EVENT_GDB_END },
@@ -1256,7 +1258,17 @@ bool target_supports_gdb_connection(struct target *target)
 int target_step(struct target *target,
 		int current, target_addr_t address, int handle_breakpoints)
 {
-	return target->type->step(target, current, address, handle_breakpoints);
+	int retval;
+
+	target_call_event_callbacks(target, TARGET_EVENT_STEP_START);
+
+	retval = target->type->step(target, current, address, handle_breakpoints);
+	if (retval != ERROR_OK)
+		return retval;
+
+	target_call_event_callbacks(target, TARGET_EVENT_STEP_END);
+
+	return retval;
 }
 
 int target_get_gdb_fileio_info(struct target *target, struct gdb_fileio_info *fileio_info)
@@ -3145,7 +3157,7 @@ COMMAND_HANDLER(handle_step_command)
 
 	struct target *target = get_current_target(CMD_CTX);
 
-	return target->type->step(target, current_pc, addr, 1);
+	return target_step(target, current_pc, addr, 1);
 }
 
 void target_handle_md_output(struct command_invocation *cmd,
diff --git a/src/target/target.h b/src/target/target.h
index b954ec22d..ddeb00b57 100644
--- a/src/target/target.h
+++ b/src/target/target.h
@@ -258,6 +258,8 @@ enum target_event {
 	TARGET_EVENT_RESUMED,		/* target resumed to normal execution */
 	TARGET_EVENT_RESUME_START,
 	TARGET_EVENT_RESUME_END,
+	TARGET_EVENT_STEP_START,
+	TARGET_EVENT_STEP_END,
 
 	TARGET_EVENT_GDB_START, /* debugger started execution (step/run) */
 	TARGET_EVENT_GDB_END, /* debugger stopped execution (step/run) */

-----------------------------------------------------------------------

Summary of changes:
 doc/openocd.texi    |  4 ++++
 src/target/target.c | 16 ++++++++++++++--
 src/target/target.h |  2 ++
 3 files changed, 20 insertions(+), 2 deletions(-)


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[OpenOCD-commit] Main OpenOCD repository branch, master, updated. v0.10.0-1160-g1c16d76c0

From: OpenOCD-Gerrit <ope...@us...> - 2020-04-05 14:16:20

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- Log -----------------------------------------------------------------
commit 1c16d76c00cd48ac99daeae41cb59fa7d078fa48
Author: Tarek BOCHKATI <tar...@gm...>
Date:   Fri Feb 7 20:13:10 2020 +0100

    flash/stm32f1x: fix maximum flash size for some devices
    
    For STM32F0xxx, according to RM0360 Rev 4 and RM0091 Rev 9,
    the accurate flash sizes are in RM0360, Table 4 and 5
    
      DEV_ID=0x440 => F030x8 => 64K (64 * 1K)
                      F05xxx => idem
      DEV_ID=0x442 => F030xC => 256K (128 * 2K)
                      F09xxx => idem
      DEV_ID=0x444 => F030x4 => 16K (16 * 1K)
                      F030x6 => 32K (32 * 1K)
      DEV_ID=0x445 => F070x6 => 32K (32 * 1K)
                      F04xxx => idem
      DEV_ID=0x448 => F070xB => 128K (64 * 2K)
    
    For STM32 F100xx HD VL (0x428), max_flash_size_kb is 512 (was 128)
      refer to RM0041 Rev5: Table 5. Flash module organization (high-density
      value line devices) => (256 page of 2 Kbytes each)
    
    Change-Id: I4ead13093f8f4b8ec900482ee049a6fc83dcc664
    Signed-off-by: Tarek BOCHKATI <tar...@gm...>
    Reviewed-on: http://openocd.zylin.com/5444
    Tested-by: jenkins
    Reviewed-by: Antonio Borneo <bor...@gm...>

diff --git a/src/flash/nor/stm32f1x.c b/src/flash/nor/stm32f1x.c
index 7d5a8f0a2..37dcafd87 100644
--- a/src/flash/nor/stm32f1x.c
+++ b/src/flash/nor/stm32f1x.c
@@ -714,17 +714,33 @@ static int stm32x_probe(struct flash_bank *bank)
 	/* set page size, protection granularity and max flash size depending on family */
 	switch (device_id & 0xfff) {
 	case 0x440: /* stm32f05x */
+		page_size = 1024;
+		stm32x_info->ppage_size = 4;
+		max_flash_size_in_kb = 64;
+		stm32x_info->user_data_offset = 16;
+		stm32x_info->option_offset = 6;
+		stm32x_info->default_rdp = 0xAA;
+		stm32x_info->can_load_options = true;
+		break;
 	case 0x444: /* stm32f03x */
 	case 0x445: /* stm32f04x */
 		page_size = 1024;
 		stm32x_info->ppage_size = 4;
-		max_flash_size_in_kb = 64;
+		max_flash_size_in_kb = 32;
 		stm32x_info->user_data_offset = 16;
 		stm32x_info->option_offset = 6;
 		stm32x_info->default_rdp = 0xAA;
 		stm32x_info->can_load_options = true;
 		break;
 	case 0x448: /* stm32f07x */
+		page_size = 2048;
+		stm32x_info->ppage_size = 4;
+		max_flash_size_in_kb = 128;
+		stm32x_info->user_data_offset = 16;
+		stm32x_info->option_offset = 6;
+		stm32x_info->default_rdp = 0xAA;
+		stm32x_info->can_load_options = true;
+		break;
 	case 0x442: /* stm32f09x */
 		page_size = 2048;
 		stm32x_info->ppage_size = 4;
@@ -768,7 +784,7 @@ static int stm32x_probe(struct flash_bank *bank)
 	case 0x428: /* stm32f100xx high-density value line */
 		page_size = 2048;
 		stm32x_info->ppage_size = 4;
-		max_flash_size_in_kb = 128;
+		max_flash_size_in_kb = 512;
 		break;
 	case 0x422: /* stm32f302/3xb/c */
 		page_size = 2048;

-----------------------------------------------------------------------

Summary of changes:
 src/flash/nor/stm32f1x.c | 20 ++++++++++++++++++--
 1 file changed, 18 insertions(+), 2 deletions(-)


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From: OpenOCD-Gerrit <ope...@us...> - 2020-04-05 14:16:15

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The branch, master has been updated
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- Log -----------------------------------------------------------------
commit eb427864e8b7f12fffe85327b03b9b9cdf397c1d
Author: Edward Fewell <ef...@ti...>
Date:   Tue Mar 10 15:11:43 2020 -0500

    tcl/target: Use vectreset for CC13xx/CC26xx targets.
    
    nSRST and sysreqreset are both broken for these targets. Upon a
    hard reset, the target disables the TDO/TDI pins and the
    ICEPick router will remove the target's TAP from the scan
    chain. The scripts to do these tasks are run, but then
    OpenOCD throws the reset again breaking the debug connection.
    
    Until that issue can be resolved, vectreset is the only
    reset that works without breaking the debug connection.
    
    Update: original patch didn't have the correct reset command.
    
    Change-Id: If7c985b703c87399a13364609d370d6222f4a66c
    Signed-off-by: Edward Fewell <ef...@ti...>
    Reviewed-on: http://openocd.zylin.com/5511
    Tested-by: jenkins
    Reviewed-by: Tomas Vanek <va...@fb...>

diff --git a/tcl/target/ti_cc26x0.cfg b/tcl/target/ti_cc26x0.cfg
index 8d8a0df4e..f95d7b2fc 100644
--- a/tcl/target/ti_cc26x0.cfg
+++ b/tcl/target/ti_cc26x0.cfg
@@ -52,5 +52,4 @@ $_TARGETNAME configure -work-area-phys 0x20000000 -work-area-size $_WORKAREASIZE
 set _FLASHNAME $_CHIPNAME.flash
 flash bank $_FLASHNAME cc26xx 0 0 0 0 $_TARGETNAME
 
-reset_config srst_only
-adapter srst delay 100
+cortex_m reset_config vectreset

-----------------------------------------------------------------------

Summary of changes:
 tcl/target/ti_cc26x0.cfg | 3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)


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From: OpenOCD-Gerrit <ope...@us...> - 2020-04-05 13:29:03

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- Log -----------------------------------------------------------------
commit 0a804222da63c5f849efa23b019a59e2dea76842
Author: Sasha Kozaruk <alk...@gm...>
Date:   Thu Mar 19 18:53:24 2020 -0700

    flash/stm32h7x: Use proper flash regs base for bank 1
    
    On stm32h747 writing/erasing bank 1 didn't work. It was because the
    flash register base was always set for bank 0.
    Tested on STM32H747I-DISCO board.
    
    Change-Id: I7e8c43ecdda9dc70b114905f5ec6a6753ca29d82
    Signed-off-by: Sasha Kozaruk <alk...@gm...>
    Reviewed-on: http://openocd.zylin.com/5534
    Reviewed-by: Christopher Head <ch...@za...>
    Tested-by: jenkins

diff --git a/src/flash/nor/stm32h7x.c b/src/flash/nor/stm32h7x.c
index 1e2b35159..7b6fdb39c 100644
--- a/src/flash/nor/stm32h7x.c
+++ b/src/flash/nor/stm32h7x.c
@@ -118,7 +118,6 @@ struct stm32h7x_part_info {
 	uint16_t max_flash_size_kb;
 	bool has_dual_bank;
 	uint16_t max_bank_size_kb;  /* Used when has_dual_bank is true */
-	uint32_t flash_regs_base;   /* Flash controller registers location */
 	uint32_t fsize_addr;        /* Location of FSIZE register */
 	uint32_t wps_group_size;    /* write protection group sectors' count */
 	uint32_t wps_mask;
@@ -175,7 +174,6 @@ static const struct stm32h7x_part_info stm32h7x_parts[] = {
 	.max_flash_size_kb	= 2048,
 	.max_bank_size_kb	= 1024,
 	.has_dual_bank		= true,
-	.flash_regs_base	= FLASH_REG_BASE_B0,
 	.fsize_addr			= 0x1FF1E880,
 	.wps_group_size		= 1,
 	.wps_mask			= 0xFF,
@@ -191,7 +189,6 @@ static const struct stm32h7x_part_info stm32h7x_parts[] = {
 	.max_flash_size_kb	= 2048,
 	.max_bank_size_kb	= 1024,
 	.has_dual_bank		= true,
-	.flash_regs_base	= FLASH_REG_BASE_B0,
 	.fsize_addr			= 0x08FFF80C,
 	.wps_group_size		= 4,
 	.wps_mask			= 0xFFFFFFFF,
@@ -763,8 +760,16 @@ static int stm32x_probe(struct flash_bank *bank)
 		LOG_INFO("Device: %s", stm32x_info->part_info->device_str);
 	}
 
-	/* update the address of controller from data base */
-	stm32x_info->flash_regs_base = stm32x_info->part_info->flash_regs_base;
+	/* update the address of controller */
+	if (bank->base == FLASH_BANK0_ADDRESS)
+		stm32x_info->flash_regs_base = FLASH_REG_BASE_B0;
+	else if (bank->base == FLASH_BANK1_ADDRESS)
+		stm32x_info->flash_regs_base = FLASH_REG_BASE_B1;
+	else {
+		LOG_WARNING("Flash register base not defined for bank %d", bank->bank_number);
+		return ERROR_FAIL;
+	}
+	LOG_DEBUG("flash_regs_base: 0x%" PRIx32, stm32x_info->flash_regs_base);
 
 	/* get flash size from target */
 	retval = target_read_u16(target, stm32x_info->part_info->fsize_addr, &flash_size_in_kb);

-----------------------------------------------------------------------

Summary of changes:
 src/flash/nor/stm32h7x.c | 15 ++++++++++-----
 1 file changed, 10 insertions(+), 5 deletions(-)


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[OpenOCD-commit] Main OpenOCD repository branch, master, updated. v0.10.0-1158-g0690361ab

From: OpenOCD-Gerrit <ope...@us...> - 2020-04-05 13:28:57

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- Log -----------------------------------------------------------------
commit 0690361abc3ae91171e83f34bddcf92bf78e02d3
Author: Edward Fewell <ef...@ti...>
Date:   Tue Mar 24 16:46:59 2020 -0500

    flash/nor: Change missing protect_check message from WARN to Info.
    
    Change the current message when a flash driver does not implement
    the protect_check function to LOG_INFO() from LOG_WARNING(). The
    user is still notified that the procedure isn't available, but
    changes the tone to indicate this is expected with this flash
    driver and not something that necessarily is a problem to fix.
    
    Change-Id: If8a2e86a23c852d562346ca36734e5d02df4a851
    Signed-off-by: Edward Fewell <ef...@ti...>
    Reviewed-on: http://openocd.zylin.com/5539
    Reviewed-by: Antonio Borneo <bor...@gm...>
    Tested-by: jenkins
    Reviewed-by: Tomas Vanek <va...@fb...>

diff --git a/src/flash/nor/tcl.c b/src/flash/nor/tcl.c
index 40105b43f..30c5d4c80 100644
--- a/src/flash/nor/tcl.c
+++ b/src/flash/nor/tcl.c
@@ -109,7 +109,7 @@ COMMAND_HANDLER(handle_flash_info_command)
 				return retval;
 		}
 		if (retval == ERROR_FLASH_OPER_UNSUPPORTED)
-			LOG_WARNING("Flash protection check is not implemented.");
+			LOG_INFO("Flash protection check is not implemented.");
 
 		command_print(CMD,
 			"#%d : %s at " TARGET_ADDR_FMT ", size 0x%8.8" PRIx32

-----------------------------------------------------------------------

Summary of changes:
 src/flash/nor/tcl.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)


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[OpenOCD-commit] Main OpenOCD repository branch, master, updated. v0.10.0-1164-gd14eac569

From: OpenOCD-Gerrit <ope...@us...> - 2020-04-05 13:13:08

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- Log -----------------------------------------------------------------
commit d14eac569c761b3026d32b4977edb371fa6b8fbe
Author: Laurent LEMELE <lau...@st...>
Date:   Fri Feb 14 17:01:04 2020 +0100

    stlink: remove 18 MHz jtag freq for stlink v2
    
    While stlink v2 allows setting the jtag clock frequency till a max
    of 18 MHz, the firmware seams unstable and not properly working.
    
    Remove the entry for 18 MHz, at least until a fix get available.
    
    Change-Id: I503e1b6a5709b5fbf1f1147fd3b5f34a0c5ee98c
    Signed-off-by: Laurent LEMELE <lau...@st...>
    Signed-off-by: Antonio Borneo <bor...@gm...>
    Reviewed-on: http://openocd.zylin.com/5465
    Tested-by: jenkins
    Reviewed-by: Tarek BOCHKATI <tar...@gm...>

diff --git a/src/jtag/drivers/stlink_usb.c b/src/jtag/drivers/stlink_usb.c
index d630c1962..3f9ce37a9 100644
--- a/src/jtag/drivers/stlink_usb.c
+++ b/src/jtag/drivers/stlink_usb.c
@@ -347,7 +347,6 @@ static const struct speed_map stlink_khz_to_speed_map_swd[] = {
 
 /* JTAG clock speed */
 static const struct speed_map stlink_khz_to_speed_map_jtag[] = {
-	{18000, 2},
 	{9000,  4},
 	{4500,  8},
 	{2250, 16},

commit 56ff1ecddb4302ba53b6eed3581b0ca2a4e23d78
Author: Laurent LEMELE <lau...@st...>
Date:   Wed Feb 12 22:22:54 2020 +0100

    stlink: fix speed setting in dap mode
    
    stlink accepts a set of values for "adapter speed".
    Fix the api khz() to return one of the allowed speed values.
    
    Change-Id: Iac640b6f76935891ca25ac168cab3809707f19d9
    Signed-off-by: Laurent LEMELE <lau...@st...>
    Signed-off-by: Antonio Borneo <bor...@gm...>
    Reviewed-on: http://openocd.zylin.com/5464
    Tested-by: jenkins
    Reviewed-by: Tarek BOCHKATI <tar...@gm...>

diff --git a/src/jtag/drivers/stlink_usb.c b/src/jtag/drivers/stlink_usb.c
index 6ab979f1c..d630c1962 100644
--- a/src/jtag/drivers/stlink_usb.c
+++ b/src/jtag/drivers/stlink_usb.c
@@ -3705,7 +3705,12 @@ static int stlink_dap_speed(int speed)
 /** */
 static int stlink_dap_khz(int khz, int *jtag_speed)
 {
-	*jtag_speed = khz;
+	if (khz == 0) {
+		LOG_ERROR("RCLK not supported");
+		return ERROR_FAIL;
+	}
+
+	*jtag_speed = stlink_speed(stlink_dap_handle, khz, true);
 	return ERROR_OK;
 }
 

-----------------------------------------------------------------------

Summary of changes:
 src/jtag/drivers/stlink_usb.c | 8 ++++++--
 1 file changed, 6 insertions(+), 2 deletions(-)


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From: OpenOCD-Gerrit <ope...@us...> - 2020-04-05 13:12:32

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- Log -----------------------------------------------------------------
commit 4ce4aa752b638d8eb39864d1ad498bde139f5233
Author: Tarek BOCHKATI <tar...@gm...>
Date:   Fri Mar 13 11:49:25 2020 +0100

    armv8: log the register name which we failed to read or write
    
    when openocd fails to read armv8 register, the user is not informed
    which register has caused the error.
    
    for example, in AArch32 state ESR_EL3 read/write is not supported,
    thus armv8_dpm_read_current_registers is always failing without mentioning
    which register has caused the error.
    
    Change-Id: I24c5abbda9fac24fb77a01777ed15261aeaaf800
    Signed-off-by: Tarek BOCHKATI <tar...@gm...>
    Reviewed-on: http://openocd.zylin.com/5516
    Tested-by: jenkins
    Reviewed-by: Antonio Borneo <bor...@gm...>

diff --git a/src/target/armv8_dpm.c b/src/target/armv8_dpm.c
index 081eed21b..5be52726c 100644
--- a/src/target/armv8_dpm.c
+++ b/src/target/armv8_dpm.c
@@ -681,6 +681,10 @@ static int dpmv8_read_reg(struct arm_dpm *dpm, struct reg *r, unsigned regnum)
 			LOG_DEBUG("READ: %s, hvalue=%16.8llx", r->name, (unsigned long long) hvalue);
 		}
 	}
+
+	if (retval != ERROR_OK)
+		LOG_ERROR("Failed to read %s register", r->name);
+
 	return retval;
 }
 
@@ -720,6 +724,9 @@ static int dpmv8_write_reg(struct arm_dpm *dpm, struct reg *r, unsigned regnum)
 		}
 	}
 
+	if (retval != ERROR_OK)
+		LOG_ERROR("Failed to write %s register", r->name);
+
 	return retval;
 }
 

-----------------------------------------------------------------------

Summary of changes:
 src/target/armv8_dpm.c | 7 +++++++
 1 file changed, 7 insertions(+)


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From: OpenOCD-Gerrit <ope...@us...> - 2020-04-05 13:12:05

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- Log -----------------------------------------------------------------
commit af82b97834cfba60144894b79244cf421ff88359
Author: Marc Schink <de...@za...>
Date:   Fri Feb 21 15:26:10 2020 +0100

    flash/nor/cfi: Minor code cleanups
    
    Change-Id: I2d45fcc5b9d232db66218aab5fef3add5830bcd7
    Signed-off-by: Marc Schink <de...@za...>
    Reviewed-on: http://openocd.zylin.com/5463
    Tested-by: jenkins
    Reviewed-by: Antonio Borneo <bor...@gm...>

diff --git a/src/flash/nor/cfi.c b/src/flash/nor/cfi.c
index 224f1749a..80a0a33ee 100644
--- a/src/flash/nor/cfi.c
+++ b/src/flash/nor/cfi.c
@@ -100,9 +100,8 @@ static const struct cfi_fixup cfi_0001_fixups[] = {
 static void cfi_fixup(struct flash_bank *bank, const struct cfi_fixup *fixups)
 {
 	struct cfi_flash_bank *cfi_info = bank->driver_priv;
-	const struct cfi_fixup *f;
 
-	for (f = fixups; f->fixup; f++) {
+	for (const struct cfi_fixup *f = fixups; f->fixup; f++) {
 		if (((f->mfr == CFI_MFR_ANY) || (f->mfr == cfi_info->manufacturer)) &&
 				((f->id  == CFI_ID_ANY)  || (f->id  == cfi_info->device_id)))
 			f->fixup(bank, f->param);
@@ -154,20 +153,19 @@ int cfi_target_read_memory(struct flash_bank *bank, target_addr_t addr,
 
 static void cfi_command(struct flash_bank *bank, uint8_t cmd, uint8_t *cmd_buf)
 {
-	int i;
 	struct cfi_flash_bank *cfi_info = bank->driver_priv;
 
 	/* clear whole buffer, to ensure bits that exceed the bus_width
 	 * are set to zero
 	 */
-	for (i = 0; i < CFI_MAX_BUS_WIDTH; i++)
+	for (size_t i = 0; i < CFI_MAX_BUS_WIDTH; i++)
 		cmd_buf[i] = 0;
 
 	if (cfi_info->endianness == TARGET_LITTLE_ENDIAN) {
-		for (i = bank->bus_width; i > 0; i--)
+		for (int i = bank->bus_width; i > 0; i--)
 			*cmd_buf++ = (i & (bank->chip_width - 1)) ? 0x0 : cmd;
 	} else {
-		for (i = 1; i <= bank->bus_width; i++)
+		for (int i = 1; i <= bank->bus_width; i++)
 			*cmd_buf++ = (i & (bank->chip_width - 1)) ? 0x0 : cmd;
 	}
 }
@@ -211,7 +209,6 @@ static int cfi_get_u8(struct flash_bank *bank, int sector, uint32_t offset, uint
 {
 	struct cfi_flash_bank *cfi_info = bank->driver_priv;
 	uint8_t data[CFI_MAX_BUS_WIDTH];
-	int i;
 
 	int retval;
 	retval = cfi_target_read_memory(bank, cfi_flash_address(bank, sector, offset),
@@ -220,13 +217,13 @@ static int cfi_get_u8(struct flash_bank *bank, int sector, uint32_t offset, uint
 		return retval;
 
 	if (cfi_info->endianness == TARGET_LITTLE_ENDIAN) {
-		for (i = 0; i < bank->bus_width / bank->chip_width; i++)
+		for (int i = 0; i < bank->bus_width / bank->chip_width; i++)
 			data[0] |= data[i];
 
 		*val = data[0];
 	} else {
 		uint8_t value = 0;
-		for (i = 0; i < bank->bus_width / bank->chip_width; i++)
+		for (int i = 0; i < bank->bus_width / bank->chip_width; i++)
 			value |= data[bank->bus_width - 1 - i];
 
 		*val = value;
@@ -241,8 +238,7 @@ static int cfi_query_u16(struct flash_bank *bank, int sector, uint32_t offset, u
 	int retval;
 
 	if (cfi_info->x16_as_x8) {
-		uint8_t i;
-		for (i = 0; i < 2; i++) {
+		for (uint8_t i = 0; i < 2; i++) {
 			retval = cfi_target_read_memory(bank, cfi_flash_address(bank, sector, offset + i),
 							1, &data[i * bank->bus_width]);
 			if (retval != ERROR_OK)
@@ -270,8 +266,7 @@ static int cfi_query_u32(struct flash_bank *bank, int sector, uint32_t offset, u
 	int retval;
 
 	if (cfi_info->x16_as_x8) {
-		uint8_t i;
-		for (i = 0; i < 4; i++) {
+		for (uint8_t i = 0; i < 4; i++) {
 			retval = cfi_target_read_memory(bank, cfi_flash_address(bank, sector, offset + i),
 							1, &data[i * bank->bus_width]);
 			if (retval != ERROR_OK)
@@ -841,7 +836,7 @@ int cfi_flash_bank_cmd(struct flash_bank *bank, unsigned int argc, const char **
 	}
 
 	cfi_info = malloc(sizeof(struct cfi_flash_bank));
-	cfi_info->probed = 0;
+	cfi_info->probed = false;
 	cfi_info->erase_region_info = NULL;
 	cfi_info->pri_ext = NULL;
 	bank->driver_priv = cfi_info;
@@ -886,11 +881,10 @@ static int cfi_intel_erase(struct flash_bank *bank, int first, int last)
 {
 	int retval;
 	struct cfi_flash_bank *cfi_info = bank->driver_priv;
-	int i;
 
 	cfi_intel_clear_status_register(bank);
 
-	for (i = first; i <= last; i++) {
+	for (int i = first; i <= last; i++) {
 		retval = cfi_send_command(bank, 0x20, cfi_flash_address(bank, i, 0x0));
 		if (retval != ERROR_OK)
 			return retval;
@@ -942,9 +936,8 @@ static int cfi_spansion_erase(struct flash_bank *bank, int first, int last)
 	int retval;
 	struct cfi_flash_bank *cfi_info = bank->driver_priv;
 	struct cfi_spansion_pri_ext *pri_ext = cfi_info->pri_ext;
-	int i;
 
-	for (i = first; i <= last; i++) {
+	for (int i = first; i <= last; i++) {
 		retval = cfi_spansion_unlock_seq(bank);
 		if (retval != ERROR_OK)
 			return retval;
@@ -1014,7 +1007,6 @@ static int cfi_intel_protect(struct flash_bank *bank, int set, int first, int la
 	struct cfi_flash_bank *cfi_info = bank->driver_priv;
 	struct cfi_intel_pri_ext *pri_ext = cfi_info->pri_ext;
 	int retry = 0;
-	int i;
 
 	/* if the device supports neither legacy lock/unlock (bit 3) nor
 	 * instant individual block locking (bit 5).
@@ -1026,7 +1018,7 @@ static int cfi_intel_protect(struct flash_bank *bank, int set, int first, int la
 
 	cfi_intel_clear_status_register(bank);
 
-	for (i = first; i <= last; i++) {
+	for (int i = first; i <= last; i++) {
 		retval = cfi_send_command(bank, 0x60, cfi_flash_address(bank, i, 0x0));
 		if (retval != ERROR_OK)
 			return retval;
@@ -1097,7 +1089,7 @@ static int cfi_intel_protect(struct flash_bank *bank, int set, int first, int la
 		 * 3. re-protect what should be protected.
 		 *
 		 */
-		for (i = 0; i < bank->num_sectors; i++) {
+		for (int i = 0; i < bank->num_sectors; i++) {
 			if (bank->sectors[i].is_protected == 1) {
 				cfi_intel_clear_status_register(bank);
 
@@ -2276,7 +2268,6 @@ static int cfi_read(struct flash_bank *bank, uint8_t *buffer, uint32_t offset, u
 	uint32_t read_p;
 	int align;	/* number of unaligned bytes */
 	uint8_t current_word[CFI_MAX_BUS_WIDTH];
-	int i;
 	int retval;
 
 	LOG_DEBUG("reading buffer of %i byte at 0x%8.8x",
@@ -2305,7 +2296,7 @@ static int cfi_read(struct flash_bank *bank, uint8_t *buffer, uint32_t offset, u
 			return retval;
 
 		/* take only bytes we need */
-		for (i = align; (i < bank->bus_width) && (count > 0); i++, count--)
+		for (int i = align; (i < bank->bus_width) && (count > 0); i++, count--)
 			*buffer++ = current_word[i];
 
 		read_p += bank->bus_width;
@@ -2331,7 +2322,7 @@ static int cfi_read(struct flash_bank *bank, uint8_t *buffer, uint32_t offset, u
 			return retval;
 
 		/* take only bytes we need */
-		for (i = 0; (i < bank->bus_width) && (count > 0); i++, count--)
+		for (int i = 0; (i < bank->bus_width) && (count > 0); i++, count--)
 			*buffer++ = current_word[i];
 	}
 
@@ -2349,7 +2340,6 @@ static int cfi_write(struct flash_bank *bank, const uint8_t *buffer, uint32_t of
 							 *programmed */
 	uint8_t *swapped_buffer = NULL;
 	const uint8_t *real_buffer = NULL;
-	int i;
 	int retval;
 
 	if (bank->target->state != TARGET_HALTED) {
@@ -2375,7 +2365,7 @@ static int cfi_write(struct flash_bank *bank, const uint8_t *buffer, uint32_t of
 			return retval;
 
 		/* replace only bytes that must be written */
-		for (i = align;
+		for (int i = align;
 		     (i < bank->bus_width) && (count > 0);
 		     i++, count--)
 			if (cfi_info->data_swap)
@@ -2441,12 +2431,12 @@ static int cfi_write(struct flash_bank *bank, const uint8_t *buffer, uint32_t of
 
 			/* fall back to memory writes */
 			while (count >= (uint32_t)bank->bus_width) {
-				int fallback;
+				bool fallback;
 				if ((write_p & 0xff) == 0) {
 					LOG_INFO("Programming at 0x%08" PRIx32 ", count 0x%08"
 						PRIx32 " bytes remaining", write_p, count);
 				}
-				fallback = 1;
+				fallback = true;
 				if ((bufferwsize > 0) && (count >= buffersize) &&
 						!(write_p & buffermask)) {
 					retval = cfi_write_words(bank, buffer, bufferwsize, write_p);
@@ -2454,13 +2444,13 @@ static int cfi_write(struct flash_bank *bank, const uint8_t *buffer, uint32_t of
 						buffer += buffersize;
 						write_p += buffersize;
 						count -= buffersize;
-						fallback = 0;
+						fallback = false;
 					} else if (retval != ERROR_FLASH_OPER_UNSUPPORTED)
 						return retval;
 				}
 				/* try the slow way? */
 				if (fallback) {
-					for (i = 0; i < bank->bus_width; i++)
+					for (int i = 0; i < bank->bus_width; i++)
 						current_word[i] = *buffer++;
 
 					retval = cfi_write_word(bank, current_word, write_p);
@@ -2495,7 +2485,7 @@ static int cfi_write(struct flash_bank *bank, const uint8_t *buffer, uint32_t of
 			return retval;
 
 		/* replace only bytes that must be written */
-		for (i = 0; (i < bank->bus_width) && (count > 0); i++, count--)
+		for (int i = 0; (i < bank->bus_width) && (count > 0); i++, count--)
 			if (cfi_info->data_swap)
 				/* data bytes are swapped (reverse endianness) */
 				current_word[bank->bus_width - i] = *buffer++;
@@ -2522,7 +2512,6 @@ static void cfi_fixup_reversed_erase_regions(struct flash_bank *bank, const void
 
 static void cfi_fixup_0002_erase_regions(struct flash_bank *bank, const void *param)
 {
-	int i;
 	struct cfi_flash_bank *cfi_info = bank->driver_priv;
 	struct cfi_spansion_pri_ext *pri_ext = cfi_info->pri_ext;
 	(void) param;
@@ -2530,7 +2519,7 @@ static void cfi_fixup_0002_erase_regions(struct flash_bank *bank, const void *pa
 	if ((pri_ext->_reversed_geometry) || (pri_ext->TopBottom == 3)) {
 		LOG_DEBUG("swapping reversed erase region information on cmdset 0002 device");
 
-		for (i = 0; i < cfi_info->num_erase_regions / 2; i++) {
+		for (unsigned int i = 0; i < cfi_info->num_erase_regions / 2; i++) {
 			int j = (cfi_info->num_erase_regions - 1) - i;
 			uint32_t swap;
 
@@ -2598,7 +2587,6 @@ int cfi_probe(struct flash_bank *bank)
 	struct cfi_flash_bank *cfi_info = bank->driver_priv;
 	struct target *target = bank->target;
 	int num_sectors = 0;
-	int i;
 	int sector = 0;
 	uint32_t unlock1 = 0x555;
 	uint32_t unlock2 = 0x2aa;
@@ -2610,7 +2598,7 @@ int cfi_probe(struct flash_bank *bank)
 		return ERROR_TARGET_NOT_HALTED;
 	}
 
-	cfi_info->probed = 0;
+	cfi_info->probed = false;
 	cfi_info->num_erase_regions = 0;
 	if (bank->sectors) {
 		free(bank->sectors);
@@ -2782,7 +2770,7 @@ int cfi_probe(struct flash_bank *bank)
 		if (cfi_info->num_erase_regions) {
 			cfi_info->erase_region_info = malloc(sizeof(*cfi_info->erase_region_info)
 					* cfi_info->num_erase_regions);
-			for (i = 0; i < cfi_info->num_erase_regions; i++) {
+			for (unsigned int i = 0; i < cfi_info->num_erase_regions; i++) {
 				retval = cfi_query_u32(bank,
 						0,
 						0x2d + (4 * i),
@@ -2897,15 +2885,14 @@ int cfi_probe(struct flash_bank *bank)
 	} else {
 		uint32_t offset = 0;
 
-		for (i = 0; i < cfi_info->num_erase_regions; i++)
+		for (unsigned int i = 0; i < cfi_info->num_erase_regions; i++)
 			num_sectors += (cfi_info->erase_region_info[i] & 0xffff) + 1;
 
 		bank->num_sectors = num_sectors;
 		bank->sectors = malloc(sizeof(struct flash_sector) * num_sectors);
 
-		for (i = 0; i < cfi_info->num_erase_regions; i++) {
-			uint32_t j;
-			for (j = 0; j < (cfi_info->erase_region_info[i] & 0xffff) + 1; j++) {
+		for (unsigned int i = 0; i < cfi_info->num_erase_regions; i++) {
+			for (uint32_t j = 0; j < (cfi_info->erase_region_info[i] & 0xffff) + 1; j++) {
 				bank->sectors[sector].offset = offset;
 				bank->sectors[sector].size =
 					((cfi_info->erase_region_info[i] >> 16) * 256)
@@ -2924,7 +2911,7 @@ int cfi_probe(struct flash_bank *bank)
 		}
 	}
 
-	cfi_info->probed = 1;
+	cfi_info->probed = true;
 
 	return ERROR_OK;
 }
@@ -2942,7 +2929,6 @@ static int cfi_intel_protect_check(struct flash_bank *bank)
 	int retval;
 	struct cfi_flash_bank *cfi_info = bank->driver_priv;
 	struct cfi_intel_pri_ext *pri_ext = cfi_info->pri_ext;
-	int i;
 
 	/* check if block lock bits are supported on this device */
 	if (!(pri_ext->blk_status_reg_mask & 0x1))
@@ -2952,7 +2938,7 @@ static int cfi_intel_protect_check(struct flash_bank *bank)
 	if (retval != ERROR_OK)
 		return retval;
 
-	for (i = 0; i < bank->num_sectors; i++) {
+	for (int i = 0; i < bank->num_sectors; i++) {
 		uint8_t block_status;
 		retval = cfi_get_u8(bank, i, 0x2, &block_status);
 		if (retval != ERROR_OK)
@@ -2972,7 +2958,6 @@ static int cfi_spansion_protect_check(struct flash_bank *bank)
 	int retval;
 	struct cfi_flash_bank *cfi_info = bank->driver_priv;
 	struct cfi_spansion_pri_ext *pri_ext = cfi_info->pri_ext;
-	int i;
 
 	retval = cfi_spansion_unlock_seq(bank);
 	if (retval != ERROR_OK)
@@ -2982,7 +2967,7 @@ static int cfi_spansion_protect_check(struct flash_bank *bank)
 	if (retval != ERROR_OK)
 		return retval;
 
-	for (i = 0; i < bank->num_sectors; i++) {
+	for (int i = 0; i < bank->num_sectors; i++) {
 		uint8_t block_status;
 		retval = cfi_get_u8(bank, i, 0x2, &block_status);
 		if (retval != ERROR_OK)

-----------------------------------------------------------------------

Summary of changes:
 src/flash/nor/cfi.c | 75 +++++++++++++++++++++--------------------------------
 1 file changed, 30 insertions(+), 45 deletions(-)


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commit fa329f2852cf13584d38c6f8eb6250c5c976907f
Author: Roman Elshin <ro...@li...>
Date:   Sun Mar 22 12:37:00 2020 +0300

    cmsis_dap_usb: Light up the leds while connected
    
    Tested with Keil ULINK2 CMSIS-DAP.
    
    Change-Id: I331224d23412bed8b2dea25abacbf9096ddd18b1
    Signed-off-by: Roman Elshin <ro...@li...>
    Reviewed-on: http://openocd.zylin.com/5385
    Tested-by: jenkins
    Reviewed-by: Antonio Borneo <bor...@gm...>

diff --git a/src/jtag/drivers/cmsis_dap_usb.c b/src/jtag/drivers/cmsis_dap_usb.c
index 3d2693c0a..289737754 100644
--- a/src/jtag/drivers/cmsis_dap_usb.c
+++ b/src/jtag/drivers/cmsis_dap_usb.c
@@ -509,15 +509,15 @@ static int cmsis_dap_cmd_DAP_Info(uint8_t info, uint8_t **data)
 	return ERROR_OK;
 }
 
-static int cmsis_dap_cmd_DAP_LED(uint8_t leds)
+static int cmsis_dap_cmd_DAP_LED(uint8_t led, uint8_t state)
 {
 	int retval;
 	uint8_t *buffer = cmsis_dap_handle->packet_buffer;
 
 	buffer[0] = 0;	/* report number */
 	buffer[1] = CMD_DAP_LED;
-	buffer[2] = 0x00;
-	buffer[3] = leds;
+	buffer[2] = led;
+	buffer[3] = state;
 	retval = cmsis_dap_usb_xfer(cmsis_dap_handle, 4);
 
 	if (retval != ERROR_OK || buffer[1] != 0x00) {
@@ -1086,8 +1086,12 @@ static int cmsis_dap_init(void)
 		if (retval != ERROR_OK)
 			return ERROR_FAIL;
 	}
+	/* Both LEDs on */
+	retval = cmsis_dap_cmd_DAP_LED(LED_ID_CONNECT, LED_ON);
+	if (retval != ERROR_OK)
+		return ERROR_FAIL;
 
-	retval = cmsis_dap_cmd_DAP_LED(0x03);		/* Both LEDs on */
+	retval = cmsis_dap_cmd_DAP_LED(LED_ID_RUN, LED_ON);
 	if (retval != ERROR_OK)
 		return ERROR_FAIL;
 
@@ -1102,9 +1106,6 @@ static int cmsis_dap_init(void)
 			LOG_INFO("Connecting under reset");
 		}
 	}
-
-	cmsis_dap_cmd_DAP_LED(0x00);			/* Both LEDs off */
-
 	LOG_INFO("CMSIS-DAP: Interface ready");
 
 	return ERROR_OK;
@@ -1119,7 +1120,9 @@ static int cmsis_dap_swd_init(void)
 static int cmsis_dap_quit(void)
 {
 	cmsis_dap_cmd_DAP_Disconnect();
-	cmsis_dap_cmd_DAP_LED(0x00);		/* Both LEDs off */
+	/* Both LEDs off */
+	cmsis_dap_cmd_DAP_LED(LED_ID_RUN, LED_OFF);
+	cmsis_dap_cmd_DAP_LED(LED_ID_CONNECT, LED_OFF);
 
 	cmsis_dap_usb_close(cmsis_dap_handle);
 

-----------------------------------------------------------------------

Summary of changes:
 src/jtag/drivers/cmsis_dap_usb.c | 19 +++++++++++--------
 1 file changed, 11 insertions(+), 8 deletions(-)


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commit d6541a811dc32beafbb388a01289366f1f31fc00
Author: Tarek BOCHKATI <tar...@gm...>
Date:   Mon Mar 2 15:28:04 2020 +0100

    doc: add missing target types
    
    missing target types are arm946e, avr32_ap7k, cortex_r4, dsp5680xx,
    hla_target, mips_mips64, nds32_v2, nds32_v3, nds32_v3m, quark_d20xx,
    quark_x10xx, riscv, stm8 and testee
    
    Change-Id: I38f6ed78ee88c09add4b779cd409ebb1e219304f
    Signed-off-by: Tarek BOCHKATI <tar...@gm...>
    Reviewed-on: http://openocd.zylin.com/5487
    Reviewed-by: Antonio Borneo <bor...@gm...>
    Tested-by: jenkins
    Reviewed-by: Tim Newsome <ti...@ca...>
    Reviewed-by: Oleksij Rempel <li...@re...>

diff --git a/doc/openocd.texi b/doc/openocd.texi
index 55df358f0..250db326f 100644
--- a/doc/openocd.texi
+++ b/doc/openocd.texi
@@ -4410,30 +4410,39 @@ Lists all supported target types.
 At this writing, the supported CPU types are:
 
 @itemize @bullet
-@item @code{aarch64} -- this is an ARMv8-A core with an MMU
-@item @code{arm11} -- this is a generation of ARMv6 cores
-@item @code{arm720t} -- this is an ARMv4 core with an MMU
-@item @code{arm7tdmi} -- this is an ARMv4 core
-@item @code{arm920t} -- this is an ARMv4 core with an MMU
-@item @code{arm926ejs} -- this is an ARMv5 core with an MMU
-@item @code{arm966e} -- this is an ARMv5 core
-@item @code{arm9tdmi} -- this is an ARMv4 core
+@item @code{aarch64} -- this is an ARMv8-A core with an MMU.
+@item @code{arm11} -- this is a generation of ARMv6 cores.
+@item @code{arm720t} -- this is an ARMv4 core with an MMU.
+@item @code{arm7tdmi} -- this is an ARMv4 core.
+@item @code{arm920t} -- this is an ARMv4 core with an MMU.
+@item @code{arm926ejs} -- this is an ARMv5 core with an MMU.
+@item @code{arm946e} -- this is an ARMv5 core with an MMU.
+@item @code{arm966e} -- this is an ARMv5 core.
+@item @code{arm9tdmi} -- this is an ARMv4 core.
 @item @code{avr} -- implements Atmel's 8-bit AVR instruction set.
 (Support for this is preliminary and incomplete.)
-@item @code{cortex_a} -- this is an ARMv7-A core with an MMU
+@item @code{avr32_ap7k} -- this an AVR32 core.
+@item @code{cortex_a} -- this is an ARMv7-A core with an MMU.
 @item @code{cortex_m} -- this is an ARMv7-M core, supporting only the
 compact Thumb2 instruction set. Supports also ARMv6-M and ARMv8-M cores
-@item @code{dragonite} -- resembles arm966e
+@item @code{cortex_r4} -- this is an ARMv7-R core.
+@item @code{dragonite} -- resembles arm966e.
 @item @code{dsp563xx} -- implements Freescale's 24-bit DSP.
 (Support for this is still incomplete.)
+@item @code{dsp5680xx} -- implements Freescale's 5680x DSP.
 @item @code{esirisc} -- this is an EnSilica eSi-RISC core.
 The current implementation supports eSi-32xx cores.
-@item @code{fa526} -- resembles arm920 (w/o Thumb)
-@item @code{feroceon} -- resembles arm926
+@item @code{fa526} -- resembles arm920 (w/o Thumb).
+@item @code{feroceon} -- resembles arm926.
+@item @code{hla_target} -- a Cortex-M alternative to work with HL adapters like ST-Link.
 @item @code{ls1_sap} -- this is the SAP on NXP LS102x CPUs,
 allowing access to physical memory addresses independently of CPU cores.
 @item @code{mem_ap} -- this is an ARM debug infrastructure Access Port without a CPU, through which bus read and write cycles can be generated; it may be useful for working with non-CPU hardware behind an AP or during development of support for new CPUs.
-@item @code{mips_m4k} -- a MIPS core
+@item @code{mips_m4k} -- a MIPS core.
+@item @code{mips_mips64} -- a MIPS64 core.
+@item @code{nds32_v2} -- this is an Andes NDS32 v2 core.
+@item @code{nds32_v3} -- this is an Andes NDS32 v3 core.
+@item @code{nds32_v3m} -- this is an Andes NDS32 v3m core.
 @item @code{or1k} -- this is an OpenRISC 1000 core.
 The current implementation supports three JTAG TAP cores:
 @itemize @minus
@@ -4446,6 +4455,11 @@ And two debug interfaces cores:
 @item @code{Advanced debug interface} (See: @url{http://opencores.org/project@comma{}adv_debug_sys})
 @item @code{SoC Debug Interface} (See: @url{http://opencores.org/project@comma{}dbg_interface})
 @end itemize
+@item @code{quark_d20xx} -- an Intel Quark D20xx core.
+@item @code{quark_x10xx} -- an Intel Quark X10xx core.
+@item @code{riscv} -- a RISC-V core.
+@item @code{stm8} -- implements an STM8 core.
+@item @code{testee} -- a dummy target for cases without a real CPU, e.g. CPLD.
 @item @code{xscale} -- this is actually an architecture,
 not a CPU type. It is based on the ARMv5 architecture.
 @end itemize

-----------------------------------------------------------------------

Summary of changes:
 doc/openocd.texi | 40 +++++++++++++++++++++++++++-------------
 1 file changed, 27 insertions(+), 13 deletions(-)


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commit 8f221f32bc7f55b25641f527e4a05a5f0ced89bf
Author: Tarek BOCHKATI <tar...@gm...>
Date:   Mon Mar 2 14:20:27 2020 +0100

    doc: enhance target types description
    
    target types are sorted alphabetically
    minor changes for some precision:
     - cortex_a : it's an ARMv7-A core
     - cortex_m : besides the ARMv7-M it support the v6-M and v8-M cores
    
    Change-Id: I37ade2392fe3948fba4156a2831bbd8739fa9993
    Signed-off-by: Tarek BOCHKATI <tar...@gm...>
    Reviewed-on: http://openocd.zylin.com/5486
    Tested-by: jenkins
    Reviewed-by: Antonio Borneo <bor...@gm...>
    Reviewed-by: Oleksij Rempel <li...@re...>

diff --git a/doc/openocd.texi b/doc/openocd.texi
index b5692e653..55df358f0 100644
--- a/doc/openocd.texi
+++ b/doc/openocd.texi
@@ -4410,6 +4410,7 @@ Lists all supported target types.
 At this writing, the supported CPU types are:
 
 @itemize @bullet
+@item @code{aarch64} -- this is an ARMv8-A core with an MMU
 @item @code{arm11} -- this is a generation of ARMv6 cores
 @item @code{arm720t} -- this is an ARMv4 core with an MMU
 @item @code{arm7tdmi} -- this is an ARMv4 core
@@ -4419,10 +4420,9 @@ At this writing, the supported CPU types are:
 @item @code{arm9tdmi} -- this is an ARMv4 core
 @item @code{avr} -- implements Atmel's 8-bit AVR instruction set.
 (Support for this is preliminary and incomplete.)
-@item @code{cortex_a} -- this is an ARMv7 core with an MMU
-@item @code{cortex_m} -- this is an ARMv7 core, supporting only the
-compact Thumb2 instruction set.
-@item @code{aarch64} -- this is an ARMv8-A core with an MMU
+@item @code{cortex_a} -- this is an ARMv7-A core with an MMU
+@item @code{cortex_m} -- this is an ARMv7-M core, supporting only the
+compact Thumb2 instruction set. Supports also ARMv6-M and ARMv8-M cores
 @item @code{dragonite} -- resembles arm966e
 @item @code{dsp563xx} -- implements Freescale's 24-bit DSP.
 (Support for this is still incomplete.)
@@ -4430,12 +4430,10 @@ compact Thumb2 instruction set.
 The current implementation supports eSi-32xx cores.
 @item @code{fa526} -- resembles arm920 (w/o Thumb)
 @item @code{feroceon} -- resembles arm926
-@item @code{mem_ap} -- this is an ARM debug infrastructure Access Port without a CPU, through which bus read and write cycles can be generated; it may be useful for working with non-CPU hardware behind an AP or during development of support for new CPUs.
-@item @code{mips_m4k} -- a MIPS core
-@item @code{xscale} -- this is actually an architecture,
-not a CPU type. It is based on the ARMv5 architecture.
 @item @code{ls1_sap} -- this is the SAP on NXP LS102x CPUs,
 allowing access to physical memory addresses independently of CPU cores.
+@item @code{mem_ap} -- this is an ARM debug infrastructure Access Port without a CPU, through which bus read and write cycles can be generated; it may be useful for working with non-CPU hardware behind an AP or during development of support for new CPUs.
+@item @code{mips_m4k} -- a MIPS core
 @item @code{or1k} -- this is an OpenRISC 1000 core.
 The current implementation supports three JTAG TAP cores:
 @itemize @minus
@@ -4448,6 +4446,8 @@ And two debug interfaces cores:
 @item @code{Advanced debug interface} (See: @url{http://opencores.org/project@comma{}adv_debug_sys})
 @item @code{SoC Debug Interface} (See: @url{http://opencores.org/project@comma{}dbg_interface})
 @end itemize
+@item @code{xscale} -- this is actually an architecture,
+not a CPU type. It is based on the ARMv5 architecture.
 @end itemize
 @end deffn
 

-----------------------------------------------------------------------

Summary of changes:
 doc/openocd.texi | 16 ++++++++--------
 1 file changed, 8 insertions(+), 8 deletions(-)


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- Log -----------------------------------------------------------------
commit af69f5ad0bb0cd38ad3163a8a3f3602d751c5d6d
Author: Tarek BOCHKATI <tar...@gm...>
Date:   Mon Mar 2 13:58:07 2020 +0100

    doc: fix OpenRISC target documentation
    
    OpenRISC correct target name is 'or1k' not 'openrisc'
    http://openocd.zylin.com/3096 introduced a conflict between 'openrisc'
    and 'ls1_sap' documentations
    
    Change-Id: Iedebbf9809300e1272334c5b63d0b31a41062282
    Signed-off-by: Tarek BOCHKATI <tar...@gm...>
    Reviewed-on: http://openocd.zylin.com/5485
    Tested-by: jenkins
    Reviewed-by: Esben Haabendal <esb...@gm...>
    Reviewed-by: Oleksij Rempel <li...@re...>

diff --git a/doc/openocd.texi b/doc/openocd.texi
index e60d26939..b5692e653 100644
--- a/doc/openocd.texi
+++ b/doc/openocd.texi
@@ -4434,10 +4434,10 @@ The current implementation supports eSi-32xx cores.
 @item @code{mips_m4k} -- a MIPS core
 @item @code{xscale} -- this is actually an architecture,
 not a CPU type. It is based on the ARMv5 architecture.
-@item @code{openrisc} -- this is an OpenRISC 1000 core.
-The current implementation supports three JTAG TAP cores:
 @item @code{ls1_sap} -- this is the SAP on NXP LS102x CPUs,
 allowing access to physical memory addresses independently of CPU cores.
+@item @code{or1k} -- this is an OpenRISC 1000 core.
+The current implementation supports three JTAG TAP cores:
 @itemize @minus
 @item @code{OpenCores TAP} (See: @url{http://opencores.org/project@comma{}jtag})
 @item @code{Altera Virtual JTAG TAP} (See: @url{http://www.altera.com/literature/ug/ug_virtualjtag.pdf})

-----------------------------------------------------------------------

Summary of changes:
 doc/openocd.texi | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)


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[OpenOCD-commit] Main OpenOCD repository branch, master, updated. v0.10.0-1154-gf00070eda

From: OpenOCD-Gerrit <ope...@us...> - 2020-03-27 07:10:31

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- Log -----------------------------------------------------------------
commit f00070edaf8fbe7e49c44845c440086d55288f28
Author: Evgeniy Didin <di...@sy...>
Date:   Thu Mar 12 19:05:37 2020 +0300

    target/arc_cmd: Improve argument checks for commands
    
    Add more argument check for "add-reg" command.
    
    Changes since first revision:
    -Removed arguments limitation(50 maximum) for "arc_set_reg_exists".
    
    Changes:
    25.03:
    Removed inconsistency in "add-reg" function. Actually
    "-type" option is optional and if it is not set,
    register type is "int".
    
    Change-Id: Ia21e6baf4fbda162f7811cd0fe305fc86ddafcfd
    Signed-off-by: Evgeniy Didin <di...@sy...>
    Reviewed-on: http://openocd.zylin.com/5523
    Tested-by: jenkins
    Reviewed-by: Antonio Borneo <bor...@gm...>
    Reviewed-by: Oleksij Rempel <li...@re...>

diff --git a/src/target/arc_cmd.c b/src/target/arc_cmd.c
index 3475762f4..a8c3bb43a 100644
--- a/src/target/arc_cmd.c
+++ b/src/target/arc_cmd.c
@@ -678,13 +678,15 @@ static int jim_arc_add_reg(Jim_Interp *interp, int argc, Jim_Obj * const *argv)
 	int type_name_len = strlen(type_name);
 	int e = ERROR_OK;
 
-	/* At least we need to specify 4 parameters: name, number, type and gdb_feature,
-	 * which means there should be 8 arguments */
-	if (goi.argc < 8) {
+	/* At least we need to specify 4 parameters: name, number and gdb_feature,
+	 * which means there should be 6 arguments. Also there can be additional paramters
+	 * "-type <type>", "-g" and  "-core" or "-bcr" which makes maximum 10 parameters. */
+	if (goi.argc < 6 || goi.argc > 10) {
 		free_reg_desc(reg);
 		Jim_SetResultFormatted(goi.interp,
-			"Should be at least 8 argnuments: -name <name> "
-			"-num <num> -type <type> -feature <gdb_feature>.");
+			"Should be at least 6 argnuments and not greater than 10: "
+			" -name <name> -num <num> -feature <gdb_feature> "
+			" [-type <type_name>] [-core|-bcr] [-g].");
 		return JIM_ERR;
 	}
 

-----------------------------------------------------------------------

Summary of changes:
 src/target/arc_cmd.c | 12 +++++++-----
 1 file changed, 7 insertions(+), 5 deletions(-)


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[OpenOCD-commit] Main OpenOCD repository branch, master, updated. v0.10.0-1153-g5ceae0eef

From: OpenOCD-Gerrit <ope...@us...> - 2020-03-26 19:31:46

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- Log -----------------------------------------------------------------
commit 5ceae0eef4c4cdcb1c54807a93144b2700593d44
Author: Marc Schink <ope...@ma...>
Date:   Thu Feb 14 16:12:22 2019 +0100

    target: Add possibility to remove all breakpoints
    
    Change-Id: I46acd57956846d66bef974e0538452462b197cd0
    Signed-off-by: Marc Schink <ope...@ma...>
    Reviewed-on: http://openocd.zylin.com/4916
    Tested-by: jenkins
    Reviewed-by: Antonio Borneo <bor...@gm...>
    Reviewed-by: Tomas Vanek <va...@fb...>

diff --git a/doc/openocd.texi b/doc/openocd.texi
index 4665092d1..e60d26939 100644
--- a/doc/openocd.texi
+++ b/doc/openocd.texi
@@ -8173,8 +8173,8 @@ in which case it will be a hardware breakpoint.
 for similar mechanisms that do not consume hardware breakpoints.)
 @end deffn
 
-@deffn Command {rbp} address
-Remove the breakpoint at @var{address}.
+@deffn Command {rbp} @option{all} | address
+Remove the breakpoint at @var{address} or all breakpoints.
 @end deffn
 
 @deffn Command {rwp} address
diff --git a/src/target/target.c b/src/target/target.c
index b77400c1f..50dd1488f 100644
--- a/src/target/target.c
+++ b/src/target/target.c
@@ -3829,11 +3829,16 @@ COMMAND_HANDLER(handle_rbp_command)
 	if (CMD_ARGC != 1)
 		return ERROR_COMMAND_SYNTAX_ERROR;
 
-	target_addr_t addr;
-	COMMAND_PARSE_ADDRESS(CMD_ARGV[0], addr);
-
 	struct target *target = get_current_target(CMD_CTX);
-	breakpoint_remove(target, addr);
+
+	if (!strcmp(CMD_ARGV[0], "all")) {
+		breakpoint_remove_all(target);
+	} else {
+		target_addr_t addr;
+		COMMAND_PARSE_ADDRESS(CMD_ARGV[0], addr);
+
+		breakpoint_remove(target, addr);
+	}
 
 	return ERROR_OK;
 }
@@ -6318,7 +6323,7 @@ static const struct command_registration target_exec_command_handlers[] = {
 		.handler = handle_rbp_command,
 		.mode = COMMAND_EXEC,
 		.help = "remove breakpoint",
-		.usage = "address",
+		.usage = "'all' | address",
 	},
 	{
 		.name = "wp",

commit 9960e805b389b3ff46801b336772ab31d35a31a6
Author: Marc Schink <ope...@ma...>
Date:   Thu Feb 14 16:11:44 2019 +0100

    target: Add function to remove all breakpoints
    
    Change-Id: I4718926844a2c8bcfd78d7a8792f6ded293548ef
    Signed-off-by: Marc Schink <ope...@ma...>
    Reviewed-on: http://openocd.zylin.com/4915
    Tested-by: jenkins
    Reviewed-by: Antonio Borneo <bor...@gm...>
    Reviewed-by: Tomas Vanek <va...@fb...>

diff --git a/src/target/breakpoints.c b/src/target/breakpoints.c
index 7ad194256..c060c7cde 100644
--- a/src/target/breakpoints.c
+++ b/src/target/breakpoints.c
@@ -332,6 +332,18 @@ static int breakpoint_remove_internal(struct target *target, target_addr_t addre
 		return 0;
 	}
 }
+
+static void breakpoint_remove_all_internal(struct target *target)
+{
+	struct breakpoint *breakpoint = target->breakpoints;
+
+	while (breakpoint) {
+		struct breakpoint *tmp = breakpoint;
+		breakpoint = breakpoint->next;
+		breakpoint_free(target, tmp);
+	}
+}
+
 void breakpoint_remove(struct target *target, target_addr_t address)
 {
 	int found = 0;
@@ -350,7 +362,23 @@ void breakpoint_remove(struct target *target, target_addr_t address)
 		breakpoint_remove_internal(target, address);
 }
 
-void breakpoint_clear_target_internal(struct target *target)
+void breakpoint_remove_all(struct target *target)
+{
+	if (target->smp) {
+		struct target_list *head;
+		struct target *curr;
+		head = target->head;
+		while (head != (struct target_list *)NULL) {
+			curr = head->target;
+			breakpoint_remove_all_internal(curr);
+			head = head->next;
+		}
+	} else {
+		breakpoint_remove_all_internal(target);
+	}
+}
+
+static void breakpoint_clear_target_internal(struct target *target)
 {
 	LOG_DEBUG("Delete all breakpoints for target: %s",
 		target_name(target));
diff --git a/src/target/breakpoints.h b/src/target/breakpoints.h
index 51bd05abd..20faf4e6c 100644
--- a/src/target/breakpoints.h
+++ b/src/target/breakpoints.h
@@ -63,6 +63,7 @@ int context_breakpoint_add(struct target *target,
 int hybrid_breakpoint_add(struct target *target,
 		target_addr_t address, uint32_t asid, uint32_t length, enum breakpoint_type type);
 void breakpoint_remove(struct target *target, target_addr_t address);
+void breakpoint_remove_all(struct target *target);
 
 struct breakpoint *breakpoint_find(struct target *target, target_addr_t address);
 

-----------------------------------------------------------------------

Summary of changes:
 doc/openocd.texi         |  4 ++--
 src/target/breakpoints.c | 30 +++++++++++++++++++++++++++++-
 src/target/breakpoints.h |  1 +
 src/target/target.c      | 15 ++++++++++-----
 4 files changed, 42 insertions(+), 8 deletions(-)


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[OpenOCD-commit] Main OpenOCD repository branch, master, updated. v0.10.0-1151-gd9ffe75e2

From: OpenOCD-Gerrit <ope...@us...> - 2020-03-24 21:35:36

This is an automated email from the git hooks/post-receive script. It was
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       via  d9ffe75e257aa4005dd34603860e45c57b1765b6 (commit)
      from  a708b6d25ec72c6de57ff42bdc6c0b4d52a69388 (commit)

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- Log -----------------------------------------------------------------
commit d9ffe75e257aa4005dd34603860e45c57b1765b6
Author: Lars Poeschel <poe...@ma...>
Date:   Tue Nov 5 16:39:48 2019 +0100

    avrf.c: Add ATmega256RFR2 to known flash list
    
    This adds the ATmega256RFR2 to the list of know devices for flashing.
    
    Change-Id: Ib24a508762aaa84ba08ba37409db2ae674b46288
    Signed-off-by: Lars PÃ¶schel <poe...@ma...>
    Reviewed-on: http://openocd.zylin.com/5504
    Tested-by: jenkins
    Reviewed-by: Tomas Vanek <va...@fb...>

diff --git a/src/flash/nor/avrf.c b/src/flash/nor/avrf.c
index aa8645909..de8c563c6 100644
--- a/src/flash/nor/avrf.c
+++ b/src/flash/nor/avrf.c
@@ -67,6 +67,7 @@ static const struct avrf_type avft_chips_info[] = {
  */
 	{"atmega128", 0x9702, 256, 512, 8, 512},
 	{"atmega128rfa1", 0xa701, 128, 512, 8, 512},
+	{"atmega256rfr2", 0xa802, 256, 1024, 8, 1024},
 	{"at90can128", 0x9781, 256, 512, 8, 512},
 	{"at90usb128", 0x9782, 256, 512, 8, 512},
 	{"atmega164p", 0x940a, 128, 128, 4, 128},

-----------------------------------------------------------------------

Summary of changes:
 src/flash/nor/avrf.c | 1 +
 1 file changed, 1 insertion(+)


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