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From: OpenOCD-Gerrit <ope...@us...> - 2020-05-24 20:28:22
|
This is an automated email from the git hooks/post-receive script. It was generated because a ref change was pushed to the repository containing the project "Main OpenOCD repository". The branch, master has been updated via 94dfa68647062ce71322f293a468bf5cdccf82be (commit) from 17789d3762aff931bc4bffd2c129100d952ccc84 (commit) Those revisions listed above that are new to this repository have not appeared on any other notification email; so we list those revisions in full, below. - Log ----------------------------------------------------------------- commit 94dfa68647062ce71322f293a468bf5cdccf82be Author: Antonio Borneo <bor...@gm...> Date: Wed Mar 18 22:35:26 2020 +0100 stlink: reduce use of hla specific enum hl_transports In the driver's code it's widely used the enum hl_transports for any check concerning the current transport, even for the non-hla transport dapdirect. The driver already provides a stlink specific enum stlink_mode that can be used in place of the hla one. Replace the hla enum with the stlink one allover the code. Introduce a hla specific wrapper stlink_usb_hl_open() to cope with the only API that requires the hla specific enum. The overall behaviour is not changed, with exception for a debug message in stlink_usb_open() than now prints the numeric value of stlink enum in place of the numeric value of the corresponding hla one. This change prepares the road for moving SWIM transport out of hla by removing any reference to the macro HL_TRANSPORT_SWIM from the stlink driver. Change-Id: Ieeea34f312245a94bfc1333087afdb8eb9f77139 Signed-off-by: Antonio Borneo <bor...@gm...> Reviewed-on: http://openocd.zylin.com/5526 Tested-by: jenkins diff --git a/src/jtag/drivers/stlink_usb.c b/src/jtag/drivers/stlink_usb.c index 03d3da7bb..aef02c563 100644 --- a/src/jtag/drivers/stlink_usb.c +++ b/src/jtag/drivers/stlink_usb.c @@ -95,6 +95,15 @@ enum stlink_jtag_api_version { STLINK_JTAG_API_V3, }; +enum stlink_mode { + STLINK_MODE_UNKNOWN = 0, + STLINK_MODE_DFU, + STLINK_MODE_MASS, + STLINK_MODE_DEBUG_JTAG, + STLINK_MODE_DEBUG_SWD, + STLINK_MODE_DEBUG_SWIM +}; + /** */ struct stlink_usb_version { /** */ @@ -132,7 +141,7 @@ struct stlink_usb_handle_s { /** */ uint32_t max_mem_packet; /** */ - enum hl_transports transport; + enum stlink_mode st_mode; /** */ struct stlink_usb_version version; /** */ @@ -292,16 +301,6 @@ struct stlink_usb_handle_s { #define STLINK_V3_MAX_FREQ_NB 10 -/** */ -enum stlink_mode { - STLINK_MODE_UNKNOWN = 0, - STLINK_MODE_DFU, - STLINK_MODE_MASS, - STLINK_MODE_DEBUG_JTAG, - STLINK_MODE_DEBUG_SWD, - STLINK_MODE_DEBUG_SWIM -}; - #define REQUEST_SENSE 0x03 #define REQUEST_SENSE_LENGTH 18 @@ -710,7 +709,7 @@ static int stlink_usb_error_check(void *handle) assert(handle != NULL); - if (h->transport == HL_TRANSPORT_SWIM) { + if (h->st_mode == STLINK_MODE_DEBUG_SWIM) { switch (h->databuf[0]) { case STLINK_SWIM_ERR_OK: return ERROR_OK; @@ -819,13 +818,13 @@ static int stlink_cmd_allow_retry(void *handle, const uint8_t *buf, int size) struct stlink_usb_handle_s *h = handle; while (1) { - if ((h->transport != HL_TRANSPORT_SWIM) || !retries) { + if ((h->st_mode != STLINK_MODE_DEBUG_SWIM) || !retries) { res = stlink_usb_xfer_noerrcheck(handle, buf, size); if (res != ERROR_OK) return res; } - if (h->transport == HL_TRANSPORT_SWIM) { + if (h->st_mode == STLINK_MODE_DEBUG_SWIM) { res = stlink_swim_status(handle); if (res != ERROR_OK) return res; @@ -1368,7 +1367,7 @@ static int stlink_usb_init_mode(void *handle, bool connect_under_reset, int init LOG_DEBUG("MODE: 0x%02X", mode); /* set selected mode */ - emode = stlink_get_mode(h->transport); + emode = h->st_mode; if (emode == STLINK_MODE_UNKNOWN) { LOG_ERROR("selected mode (transport) not supported"); @@ -1376,12 +1375,12 @@ static int stlink_usb_init_mode(void *handle, bool connect_under_reset, int init } /* set the speed before entering the mode, as the chip discovery phase should be done at this speed too */ - if (h->transport == HL_TRANSPORT_JTAG) { + if (emode == STLINK_MODE_DEBUG_JTAG) { if (h->version.flags & STLINK_F_HAS_JTAG_SET_FREQ) { stlink_dump_speed_map(stlink_khz_to_speed_map_jtag, ARRAY_SIZE(stlink_khz_to_speed_map_jtag)); stlink_speed(h, initial_interface_speed, false); } - } else if (h->transport == HL_TRANSPORT_SWD) { + } else if (emode == STLINK_MODE_DEBUG_SWD) { if (h->version.flags & STLINK_F_HAS_SWD_SET_FREQ) { stlink_dump_speed_map(stlink_khz_to_speed_map_swd, ARRAY_SIZE(stlink_khz_to_speed_map_swd)); stlink_speed(h, initial_interface_speed, false); @@ -1391,7 +1390,7 @@ static int stlink_usb_init_mode(void *handle, bool connect_under_reset, int init if (h->version.jtag_api == STLINK_JTAG_API_V3) { struct speed_map map[STLINK_V3_MAX_FREQ_NB]; - stlink_get_com_freq(h, (h->transport == HL_TRANSPORT_JTAG), map); + stlink_get_com_freq(h, (emode == STLINK_MODE_DEBUG_JTAG), map); stlink_dump_speed_map(map, ARRAY_SIZE(map)); stlink_speed(h, initial_interface_speed, false); } @@ -1632,7 +1631,7 @@ static int stlink_usb_idcode(void *handle, uint32_t *idcode) assert(handle != NULL); /* there is no swim read core id cmd */ - if (h->transport == HL_TRANSPORT_SWIM) { + if (h->st_mode == STLINK_MODE_DEBUG_SWIM) { *idcode = 0; return ERROR_OK; } @@ -1763,8 +1762,8 @@ static enum target_state stlink_usb_state(void *handle) assert(handle != NULL); - if (h->transport == HL_TRANSPORT_SWIM) { - res = stlink_usb_mode_enter(handle, stlink_get_mode(h->transport)); + if (h->st_mode == STLINK_MODE_DEBUG_SWIM) { + res = stlink_usb_mode_enter(handle, h->st_mode); if (res != ERROR_OK) return TARGET_UNKNOWN; @@ -1777,8 +1776,7 @@ static enum target_state stlink_usb_state(void *handle) if (h->reconnect_pending) { LOG_INFO("Previous state query failed, trying to reconnect"); - res = stlink_usb_mode_enter(handle, stlink_get_mode(h->transport)); - + res = stlink_usb_mode_enter(handle, h->st_mode); if (res != ERROR_OK) return TARGET_UNKNOWN; @@ -1818,7 +1816,7 @@ static int stlink_usb_assert_srst(void *handle, int srst) assert(handle != NULL); - if (h->transport == HL_TRANSPORT_SWIM) + if (h->st_mode == STLINK_MODE_DEBUG_SWIM) return stlink_swim_assert_reset(handle, srst); if (h->version.stlink == 1) @@ -1895,7 +1893,7 @@ static int stlink_usb_reset(void *handle) assert(handle != NULL); - if (h->transport == HL_TRANSPORT_SWIM) + if (h->st_mode == STLINK_MODE_DEBUG_SWIM) return stlink_swim_generate_rst(handle); stlink_usb_init_buffer(handle, h->rx_ep, 2); @@ -2325,7 +2323,7 @@ static int stlink_usb_read_mem(void *handle, uint32_t addr, uint32_t size, if (count < bytes_remaining) bytes_remaining = count; - if (h->transport == HL_TRANSPORT_SWIM) { + if (h->st_mode == STLINK_MODE_DEBUG_SWIM) { retval = stlink_swim_readbytes(handle, addr, bytes_remaining, buffer); if (retval != ERROR_OK) return retval; @@ -2410,7 +2408,7 @@ static int stlink_usb_write_mem(void *handle, uint32_t addr, uint32_t size, if (count < bytes_remaining) bytes_remaining = count; - if (h->transport == HL_TRANSPORT_SWIM) { + if (h->st_mode == STLINK_MODE_DEBUG_SWIM) { retval = stlink_swim_writebytes(handle, addr, bytes_remaining, buffer); if (retval != ERROR_OK) return retval; @@ -2674,16 +2672,16 @@ static int stlink_speed(void *handle, int khz, bool query) if (!handle) return khz; - switch (h->transport) { - case HL_TRANSPORT_SWIM: + switch (h->st_mode) { + case STLINK_MODE_DEBUG_SWIM: return stlink_speed_swim(handle, khz, query); - case HL_TRANSPORT_SWD: + case STLINK_MODE_DEBUG_SWD: if (h->version.jtag_api == STLINK_JTAG_API_V3) return stlink_speed_v3(handle, false, khz, query); else return stlink_speed_swd(handle, khz, query); break; - case HL_TRANSPORT_JTAG: + case STLINK_MODE_DEBUG_JTAG: if (h->version.jtag_api == STLINK_JTAG_API_V3) return stlink_speed_v3(handle, true, khz, query); else @@ -2824,7 +2822,7 @@ char *stlink_usb_get_alternate_serial(libusb_device_handle *device, } /** */ -static int stlink_usb_open(struct hl_interface_param_s *param, void **fd) +static int stlink_usb_open(struct hl_interface_param_s *param, enum stlink_mode mode, void **fd) { int err, retry_count = 1; struct stlink_usb_handle_s *h; @@ -2838,11 +2836,11 @@ static int stlink_usb_open(struct hl_interface_param_s *param, void **fd) return ERROR_FAIL; } - h->transport = param->transport; + h->st_mode = mode; for (unsigned i = 0; param->vid[i]; i++) { LOG_DEBUG("transport: %d vid: 0x%04x pid: 0x%04x serial: %s", - param->transport, param->vid[i], param->pid[i], + h->st_mode, param->vid[i], param->pid[i], param->serial ? param->serial : ""); } @@ -2942,16 +2940,16 @@ static int stlink_usb_open(struct hl_interface_param_s *param, void **fd) /* check if mode is supported */ err = ERROR_OK; - switch (h->transport) { - case HL_TRANSPORT_SWD: + switch (h->st_mode) { + case STLINK_MODE_DEBUG_SWD: if (h->version.jtag_api == STLINK_JTAG_API_V1) err = ERROR_FAIL; /* fall-through */ - case HL_TRANSPORT_JTAG: + case STLINK_MODE_DEBUG_JTAG: if (h->version.jtag == 0) err = ERROR_FAIL; break; - case HL_TRANSPORT_SWIM: + case STLINK_MODE_DEBUG_SWIM: if (h->version.swim == 0) err = ERROR_FAIL; break; @@ -2973,7 +2971,7 @@ static int stlink_usb_open(struct hl_interface_param_s *param, void **fd) goto error_open; } - if (h->transport == HL_TRANSPORT_SWIM) { + if (h->st_mode == STLINK_MODE_DEBUG_SWIM) { err = stlink_swim_enter(h); if (err != ERROR_OK) { LOG_ERROR("stlink_swim_enter_failed (unable to connect to the target)"); @@ -3011,6 +3009,11 @@ error_open: return ERROR_FAIL; } +static int stlink_usb_hl_open(struct hl_interface_param_s *param, void **fd) +{ + return stlink_usb_open(param, stlink_get_mode(param->transport), fd); +} + int stlink_config_trace(void *handle, bool enabled, enum tpiu_pin_protocol pin_protocol, uint32_t port_size, unsigned int *trace_freq, unsigned int traceclkin_freq, @@ -3144,7 +3147,7 @@ static int stlink_write_dap_register(void *handle, unsigned short dap_port, /** */ struct hl_layout_api_s stlink_usb_layout_api = { /** */ - .open = stlink_usb_open, + .open = stlink_usb_hl_open, /** */ .close = stlink_usb_close, /** */ @@ -3259,7 +3262,6 @@ static int stlink_dap_closeall_ap(void) static int stlink_dap_reinit_interface(void) { int retval; - enum stlink_mode mode; /* * On JTAG only, it should be enough to call stlink_usb_reset(). But on @@ -3269,13 +3271,12 @@ static int stlink_dap_reinit_interface(void) * select the mode again. */ - mode = stlink_get_mode(stlink_dap_param.transport); if (!stlink_dap_handle->reconnect_pending) { stlink_dap_handle->reconnect_pending = true; - stlink_usb_mode_leave(stlink_dap_handle, mode); + stlink_usb_mode_leave(stlink_dap_handle, stlink_dap_handle->st_mode); } - retval = stlink_usb_mode_enter(stlink_dap_handle, mode); + retval = stlink_usb_mode_enter(stlink_dap_handle, stlink_dap_handle->st_mode); if (retval != ERROR_OK) return retval; @@ -3322,7 +3323,7 @@ static int stlink_dap_op_connect(struct adiv5_dap *dap) retval = stlink_usb_idcode(stlink_dap_handle, &idcode); if (retval == ERROR_OK) LOG_INFO("%s %#8.8" PRIx32, - (stlink_dap_handle->transport == HL_TRANSPORT_JTAG) ? "JTAG IDCODE" : "SWD DPIDR", + (stlink_dap_handle->st_mode == STLINK_MODE_DEBUG_JTAG) ? "JTAG IDCODE" : "SWD DPIDR", idcode); else dap->do_reconnect = true; @@ -3371,7 +3372,7 @@ static int stlink_dap_op_queue_dp_read(struct adiv5_dap *dap, unsigned reg, data = data ? : &dummy; if (stlink_dap_handle->version.flags & STLINK_F_QUIRK_JTAG_DP_READ - && stlink_dap_handle->transport == HL_TRANSPORT_JTAG) { + && stlink_dap_handle->st_mode == STLINK_MODE_DEBUG_JTAG) { /* Quirk required in JTAG. Read RDBUFF to get the data */ retval = stlink_read_dap_register(stlink_dap_handle, STLINK_DEBUG_PORT_ACCESS, reg, &dummy); @@ -3507,7 +3508,7 @@ static int stlink_dap_op_run(struct adiv5_dap *dap) } if (ctrlstat & SSTICKYERR) { - if (stlink_dap_param.transport == HL_TRANSPORT_JTAG) + if (stlink_dap_handle->st_mode == STLINK_MODE_DEBUG_JTAG) retval = stlink_dap_op_queue_dp_write(dap, DP_CTRL_STAT, ctrlstat & (dap->dp_ctrl_stat | SSTICKYERR)); else @@ -3635,6 +3636,7 @@ static const struct command_registration stlink_dap_command_handlers[] = { static int stlink_dap_init(void) { enum reset_types jtag_reset_config = jtag_get_reset_config(); + enum stlink_mode mode; int retval; LOG_DEBUG("stlink_dap_init()"); @@ -3647,15 +3649,15 @@ static int stlink_dap_init(void) } if (transport_is_dapdirect_swd()) - stlink_dap_param.transport = HL_TRANSPORT_SWD; + mode = STLINK_MODE_DEBUG_SWD; else if (transport_is_dapdirect_jtag()) - stlink_dap_param.transport = HL_TRANSPORT_JTAG; + mode = STLINK_MODE_DEBUG_JTAG; else { LOG_ERROR("Unsupported transport"); return ERROR_FAIL; } - retval = stlink_usb_open(&stlink_dap_param, (void **)&stlink_dap_handle); + retval = stlink_usb_open(&stlink_dap_param, mode, (void **)&stlink_dap_handle); if (retval != ERROR_OK) return retval; ----------------------------------------------------------------------- Summary of changes: src/jtag/drivers/stlink_usb.c | 102 +++++++++++++++++++++--------------------- 1 file changed, 52 insertions(+), 50 deletions(-) hooks/post-receive -- Main OpenOCD repository |
From: OpenOCD-Gerrit <ope...@us...> - 2020-05-24 20:27:38
|
This is an automated email from the git hooks/post-receive script. It was generated because a ref change was pushed to the repository containing the project "Main OpenOCD repository". The branch, master has been updated via 17789d3762aff931bc4bffd2c129100d952ccc84 (commit) via ac870d80a9232fda1588c2784f157e6f8863f4b7 (commit) from 763f2549ad4f9d3d59c472f79b4f9b37abb276ae (commit) Those revisions listed above that are new to this repository have not appeared on any other notification email; so we list those revisions in full, below. - Log ----------------------------------------------------------------- commit 17789d3762aff931bc4bffd2c129100d952ccc84 Author: Marc Schink <de...@za...> Date: Mon May 4 16:56:14 2020 +0200 flash/nor/sh_qspi: Fix dead assignment Change-Id: I6a99076fea30062535e615244895698e51107441 Signed-off-by: Marc Schink <de...@za...> Reviewed-on: http://openocd.zylin.com/5645 Tested-by: jenkins Reviewed-by: Antonio Borneo <bor...@gm...> diff --git a/src/flash/nor/sh_qspi.c b/src/flash/nor/sh_qspi.c index 931b0b176..862e43aae 100644 --- a/src/flash/nor/sh_qspi.c +++ b/src/flash/nor/sh_qspi.c @@ -654,7 +654,7 @@ static int sh_qspi_read(struct flash_bank *bank, uint8_t *buffer, destroy_reg_param(®_params[2]); destroy_reg_param(®_params[3]); - return ERROR_OK; + return ret; } /* Return ID of flash device */ commit ac870d80a9232fda1588c2784f157e6f8863f4b7 Author: Tarek BOCHKATI <tar...@gm...> Date: Tue May 12 21:00:18 2020 +0100 arm_disassembler: fix typo 'ARM_UNKNOWN_INSTUCTION' to '.._INSTRUCTION' Change-Id: I3a3d566fe96fb1497cf8337389e993e0f728a64b Signed-off-by: Laurent LEMELE <lau...@st...> Signed-off-by: Tarek BOCHKATI <tar...@gm...> Reviewed-on: http://openocd.zylin.com/5657 Tested-by: jenkins Reviewed-by: Antonio Borneo <bor...@gm...> diff --git a/src/target/arm_disassembler.c b/src/target/arm_disassembler.c index 55aaddd0a..da8aee28b 100644 --- a/src/target/arm_disassembler.c +++ b/src/target/arm_disassembler.c @@ -2086,7 +2086,7 @@ static int evaluate_b_bl_blx_thumb(uint16_t opcode, break; /* BL/BLX prefix */ case 2: - instruction->type = ARM_UNKNOWN_INSTUCTION; + instruction->type = ARM_UNKNOWN_INSTRUCTION; mnemonic = "prefix"; target_address = offset << 12; break; diff --git a/src/target/arm_disassembler.h b/src/target/arm_disassembler.h index e9f4d44cb..486e903e3 100644 --- a/src/target/arm_disassembler.h +++ b/src/target/arm_disassembler.h @@ -20,7 +20,7 @@ #define OPENOCD_TARGET_ARM_DISASSEMBLER_H enum arm_instruction_type { - ARM_UNKNOWN_INSTUCTION, + ARM_UNKNOWN_INSTRUCTION, /* Branch instructions */ ARM_B, ----------------------------------------------------------------------- Summary of changes: src/flash/nor/sh_qspi.c | 2 +- src/target/arm_disassembler.c | 2 +- src/target/arm_disassembler.h | 2 +- 3 files changed, 3 insertions(+), 3 deletions(-) hooks/post-receive -- Main OpenOCD repository |
From: OpenOCD-Gerrit <ope...@us...> - 2020-05-24 20:27:08
|
This is an automated email from the git hooks/post-receive script. It was generated because a ref change was pushed to the repository containing the project "Main OpenOCD repository". The branch, master has been updated via 763f2549ad4f9d3d59c472f79b4f9b37abb276ae (commit) from 9a5af06f821e2c61adbf2b5cac720ba8d608a014 (commit) Those revisions listed above that are new to this repository have not appeared on any other notification email; so we list those revisions in full, below. - Log ----------------------------------------------------------------- commit 763f2549ad4f9d3d59c472f79b4f9b37abb276ae Author: Edward Fewell <ef...@ti...> Date: Thu May 14 15:49:15 2020 -0500 nor/flash: Add keep_alive() during flash write handler Added keep_alive() call inside main flash write loop. Large files where causing a gdb timeout warning. Change-Id: I525dad2d644e248dd9ecf678e4d8e33c22eefdf2 Signed-off-by: Edward Fewell <ef...@ti...> Reviewed-on: http://openocd.zylin.com/5682 Reviewed-by: Antonio Borneo <bor...@gm...> Tested-by: jenkins Reviewed-by: Tarek BOCHKATI <tar...@gm...> Reviewed-by: Tomas Vanek <va...@fb...> diff --git a/src/flash/nor/cc3220sf.c b/src/flash/nor/cc3220sf.c index afdb7f491..c8de7d002 100644 --- a/src/flash/nor/cc3220sf.c +++ b/src/flash/nor/cc3220sf.c @@ -363,6 +363,8 @@ static int cc3220sf_write(struct flash_bank *bank, const uint8_t *buffer, LOG_ERROR("cc3220sf: Flash operation failed"); break; } + + keep_alive(); } /* Do one word write for any final bytes less than a full word */ ----------------------------------------------------------------------- Summary of changes: src/flash/nor/cc3220sf.c | 2 ++ 1 file changed, 2 insertions(+) hooks/post-receive -- Main OpenOCD repository |
From: OpenOCD-Gerrit <ope...@us...> - 2020-05-24 20:26:42
|
This is an automated email from the git hooks/post-receive script. It was generated because a ref change was pushed to the repository containing the project "Main OpenOCD repository". The branch, master has been updated via 9a5af06f821e2c61adbf2b5cac720ba8d608a014 (commit) from ec30634c13e9a311d597b8860a4671d91cfb34a6 (commit) Those revisions listed above that are new to this repository have not appeared on any other notification email; so we list those revisions in full, below. - Log ----------------------------------------------------------------- commit 9a5af06f821e2c61adbf2b5cac720ba8d608a014 Author: Tomas Vanek <va...@fb...> Date: Sun May 17 08:17:25 2020 +0200 flash/nor/jtagspi: propagate error from jtag_execute_queue() Change-Id: Ib985bdf3d60345a1e701f9cc98f89a47ff74d3e2 Signed-off-by: Tomas Vanek <va...@fb...> Reviewed-on: http://openocd.zylin.com/5684 Tested-by: jenkins Reviewed-by: Tarek BOCHKATI <tar...@gm...> Reviewed-by: Antonio Borneo <bor...@gm...> diff --git a/src/flash/nor/jtagspi.c b/src/flash/nor/jtagspi.c index 73b1c7a26..d841579ff 100644 --- a/src/flash/nor/jtagspi.c +++ b/src/flash/nor/jtagspi.c @@ -153,12 +153,12 @@ static int jtagspi_cmd(struct flash_bank *bank, uint8_t cmd, jtagspi_set_ir(bank); /* passing from an IR scan to SHIFT-DR clears BYPASS registers */ jtag_add_dr_scan(info->tap, n, fields, TAP_IDLE); - jtag_execute_queue(); + int retval = jtag_execute_queue(); if (is_read) flip_u8(data_buf, data, lenb); free(data_buf); - return ERROR_OK; + return retval; } static int jtagspi_probe(struct flash_bank *bank) ----------------------------------------------------------------------- Summary of changes: src/flash/nor/jtagspi.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) hooks/post-receive -- Main OpenOCD repository |
From: OpenOCD-Gerrit <ope...@us...> - 2020-05-24 20:26:15
|
This is an automated email from the git hooks/post-receive script. It was generated because a ref change was pushed to the repository containing the project "Main OpenOCD repository". The branch, master has been updated via ec30634c13e9a311d597b8860a4671d91cfb34a6 (commit) from 0637047c6549e1e30f38e4084e516a4e6d67a167 (commit) Those revisions listed above that are new to this repository have not appeared on any other notification email; so we list those revisions in full, below. - Log ----------------------------------------------------------------- commit ec30634c13e9a311d597b8860a4671d91cfb34a6 Author: Marc Schink <ope...@ma...> Date: Wed Mar 6 12:16:53 2019 +0100 rtos/ChibiOS: Fix some coding styles Change-Id: I2648479df1a2dd95f8a57868c4ed4259e0fbbe11 Signed-off-by: Marc Schink <ope...@ma...> Reviewed-on: http://openocd.zylin.com/4989 Tested-by: jenkins Reviewed-by: Antonio Borneo <bor...@gm...> diff --git a/src/rtos/Makefile.am b/src/rtos/Makefile.am index 38adb6e92..6a2fc1223 100644 --- a/src/rtos/Makefile.am +++ b/src/rtos/Makefile.am @@ -11,7 +11,7 @@ noinst_LTLIBRARIES += %D%/librtos.la %D%/ThreadX.c \ %D%/eCos.c \ %D%/linux.c \ - %D%/ChibiOS.c \ + %D%/chibios.c \ %D%/chromium-ec.c \ %D%/embKernel.c \ %D%/mqx.c \ diff --git a/src/rtos/ChibiOS.c b/src/rtos/chibios.c similarity index 83% rename from src/rtos/ChibiOS.c rename to src/rtos/chibios.c index 08b234fa9..4d2b1b2d7 100644 --- a/src/rtos/ChibiOS.c +++ b/src/rtos/chibios.c @@ -39,7 +39,7 @@ * * @details Definition copied from os/kernel/include/chregistry.h of ChibiOS/RT. */ -struct ChibiOS_chdebug { +struct chibios_chdebug { char ch_identifier[4]; /**< @brief Always set to "main". */ uint8_t ch_zero; /**< @brief Must be zero. */ uint8_t ch_size; /**< @brief Size of this structure. */ @@ -69,26 +69,26 @@ struct ChibiOS_chdebug { /** * @brief ChibiOS thread states. */ -static const char * const ChibiOS_thread_states[] = { "READY", "CURRENT", +static const char * const chibios_thread_states[] = { "READY", "CURRENT", "WTSTART", "SUSPENDED", "QUEUED", "WTSEM", "WTMTX", "WTCOND", "SLEEPING", "WTEXIT", "WTOREVT", "WTANDEVT", "SNDMSGQ", "SNDMSG", "WTMSG", "FINAL" }; -#define CHIBIOS_NUM_STATES (sizeof(ChibiOS_thread_states)/sizeof(char *)) +#define CHIBIOS_NUM_STATES (sizeof(chibios_thread_states)/sizeof(char *)) /* Maximum ChibiOS thread name. There is no real limit set by ChibiOS but 64 * chars ought to be enough. */ #define CHIBIOS_THREAD_NAME_STR_SIZE (64) -struct ChibiOS_params { +struct chibios_params { const char *target_name; - struct ChibiOS_chdebug *signature; + struct chibios_chdebug *signature; const struct rtos_register_stacking *stacking_info; }; -static struct ChibiOS_params ChibiOS_params_list[] = { +static struct chibios_params chibios_params_list[] = { { "cortex_m", /* target_name */ 0, @@ -100,23 +100,23 @@ static struct ChibiOS_params ChibiOS_params_list[] = { NULL, /* stacking_info */ } }; -#define CHIBIOS_NUM_PARAMS ((int)(sizeof(ChibiOS_params_list)/sizeof(struct ChibiOS_params))) +#define CHIBIOS_NUM_PARAMS ((int)(sizeof(chibios_params_list)/sizeof(struct chibios_params))) -static bool ChibiOS_detect_rtos(struct target *target); -static int ChibiOS_create(struct target *target); -static int ChibiOS_update_threads(struct rtos *rtos); -static int ChibiOS_get_thread_reg_list(struct rtos *rtos, int64_t thread_id, +static bool chibios_detect_rtos(struct target *target); +static int chibios_create(struct target *target); +static int chibios_update_threads(struct rtos *rtos); +static int chibios_get_thread_reg_list(struct rtos *rtos, int64_t thread_id, struct rtos_reg **reg_list, int *num_regs); -static int ChibiOS_get_symbol_list_to_lookup(symbol_table_elem_t *symbol_list[]); +static int chibios_get_symbol_list_to_lookup(symbol_table_elem_t *symbol_list[]); -struct rtos_type ChibiOS_rtos = { - .name = "ChibiOS", +struct rtos_type chibios_rtos = { + .name = "chibios", - .detect_rtos = ChibiOS_detect_rtos, - .create = ChibiOS_create, - .update_threads = ChibiOS_update_threads, - .get_thread_reg_list = ChibiOS_get_thread_reg_list, - .get_symbol_list_to_lookup = ChibiOS_get_symbol_list_to_lookup, + .detect_rtos = chibios_detect_rtos, + .create = chibios_create, + .update_threads = chibios_update_threads, + .get_thread_reg_list = chibios_get_thread_reg_list, + .get_symbol_list_to_lookup = chibios_get_symbol_list_to_lookup, }; @@ -125,13 +125,13 @@ struct rtos_type ChibiOS_rtos = { * use whatever is available. */ -enum ChibiOS_symbol_values { - ChibiOS_VAL_rlist = 0, - ChibiOS_VAL_ch = 1, - ChibiOS_VAL_ch_debug = 2 +enum chibios_symbol_values { + CHIBIOS_VAL_RLIST = 0, + CHIBIOS_VAL_CH = 1, + CHIBIOS_VAL_CH_DEBUG = 2 }; -static symbol_table_elem_t ChibiOS_symbol_list[] = { +static symbol_table_elem_t chibios_symbol_list[] = { { "rlist", 0, true}, /* Thread ready list */ { "ch", 0, true}, /* System data structure */ { "ch_debug", 0, false}, /* Memory Signature containing offsets of fields in rlist */ @@ -141,13 +141,13 @@ static symbol_table_elem_t ChibiOS_symbol_list[] = { /* Offset of the rlist structure within the system data structure (ch) */ #define CH_RLIST_OFFSET 0x00 -static int ChibiOS_update_memory_signature(struct rtos *rtos) +static int chibios_update_memory_signature(struct rtos *rtos) { int retval; - struct ChibiOS_params *param; - struct ChibiOS_chdebug *signature; + struct chibios_params *param; + struct chibios_chdebug *signature; - param = (struct ChibiOS_params *) rtos->rtos_specific_params; + param = (struct chibios_params *) rtos->rtos_specific_params; /* Free existing memory description.*/ if (param->signature) { @@ -162,7 +162,7 @@ static int ChibiOS_update_memory_signature(struct rtos *rtos) } retval = target_read_buffer(rtos->target, - rtos->symbols[ChibiOS_VAL_ch_debug].address, + rtos->symbols[CHIBIOS_VAL_CH_DEBUG].address, sizeof(*signature), (uint8_t *) signature); if (retval != ERROR_OK) { @@ -217,7 +217,7 @@ errfree: } -static int ChibiOS_update_stacking(struct rtos *rtos) +static int chibios_update_stacking(struct rtos *rtos) { /* Sometimes the stacking can not be determined only by looking at the * target name but only a runtime. @@ -234,15 +234,15 @@ static int ChibiOS_update_stacking(struct rtos *rtos) * - Since no threads are running during startup, the problem is solved * by delaying stacking detection until there are more threads * available than the current execution. In which case - * ChibiOS_get_thread_reg_list is called. + * chibios_get_thread_reg_list is called. */ int retval; if (!rtos->rtos_specific_params) return -1; - struct ChibiOS_params *param; - param = (struct ChibiOS_params *) rtos->rtos_specific_params; + struct chibios_params *param; + param = (struct chibios_params *) rtos->rtos_specific_params; /* Check for armv7m with *enabled* FPU, i.e. a Cortex-M4 */ struct armv7m_common *armv7m_target = target_to_armv7m(rtos->target); @@ -274,10 +274,10 @@ static int ChibiOS_update_stacking(struct rtos *rtos) return -1; } -static int ChibiOS_update_threads(struct rtos *rtos) +static int chibios_update_threads(struct rtos *rtos) { int retval; - const struct ChibiOS_params *param; + const struct chibios_params *param; int tasks_found = 0; int rtos_valid = -1; @@ -289,10 +289,10 @@ static int ChibiOS_update_threads(struct rtos *rtos) return -3; } - param = (const struct ChibiOS_params *) rtos->rtos_specific_params; + param = (const struct chibios_params *) rtos->rtos_specific_params; /* Update the memory signature saved in the target memory */ if (!param->signature) { - retval = ChibiOS_update_memory_signature(rtos); + retval = chibios_update_memory_signature(rtos); if (retval != ERROR_OK) { LOG_ERROR("Reading the memory signature of ChibiOS/RT failed"); return retval; @@ -305,10 +305,10 @@ static int ChibiOS_update_threads(struct rtos *rtos) /* ChibiOS does not save the current thread count. We have to first * parse the double linked thread list to check for errors and the number of * threads. */ - const uint32_t rlist = rtos->symbols[ChibiOS_VAL_rlist].address ? - rtos->symbols[ChibiOS_VAL_rlist].address : - rtos->symbols[ChibiOS_VAL_ch].address + CH_RLIST_OFFSET /* ChibiOS3 */; - const struct ChibiOS_chdebug *signature = param->signature; + const uint32_t rlist = rtos->symbols[CHIBIOS_VAL_RLIST].address ? + rtos->symbols[CHIBIOS_VAL_RLIST].address : + rtos->symbols[CHIBIOS_VAL_CH].address + CH_RLIST_OFFSET /* ChibiOS3 */; + const struct chibios_chdebug *signature = param->signature; uint32_t current; uint32_t previous; uint32_t older; @@ -426,19 +426,19 @@ static int ChibiOS_update_threads(struct rtos *rtos) strcpy(curr_thrd_details->thread_name_str, tmp_str); /* State info */ - uint8_t threadState; + uint8_t thread_state; const char *state_desc; retval = target_read_u8(rtos->target, - current + signature->cf_off_state, &threadState); + current + signature->cf_off_state, &thread_state); if (retval != ERROR_OK) { LOG_ERROR("Error reading thread state from ChibiOS target"); return retval; } - if (threadState < CHIBIOS_NUM_STATES) - state_desc = ChibiOS_thread_states[threadState]; + if (thread_state < CHIBIOS_NUM_STATES) + state_desc = chibios_thread_states[thread_state]; else state_desc = "Unknown"; @@ -465,25 +465,25 @@ static int ChibiOS_update_threads(struct rtos *rtos) return 0; } -static int ChibiOS_get_thread_reg_list(struct rtos *rtos, int64_t thread_id, +static int chibios_get_thread_reg_list(struct rtos *rtos, int64_t thread_id, struct rtos_reg **reg_list, int *num_regs) { int retval; - const struct ChibiOS_params *param; + const struct chibios_params *param; uint32_t stack_ptr = 0; if ((rtos == NULL) || (thread_id == 0) || (rtos->rtos_specific_params == NULL)) return -1; - param = (const struct ChibiOS_params *) rtos->rtos_specific_params; + param = (const struct chibios_params *) rtos->rtos_specific_params; if (!param->signature) return -1; /* Update stacking if it can only be determined from runtime information */ if ((param->stacking_info == 0) && - (ChibiOS_update_stacking(rtos) != ERROR_OK)) { + (chibios_update_stacking(rtos) != ERROR_OK)) { LOG_ERROR("Failed to determine exact stacking for the target type %s", rtos->target->type->name); return -1; } @@ -499,24 +499,24 @@ static int ChibiOS_get_thread_reg_list(struct rtos *rtos, int64_t thread_id, return rtos_generic_stack_read(rtos->target, param->stacking_info, stack_ptr, reg_list, num_regs); } -static int ChibiOS_get_symbol_list_to_lookup(symbol_table_elem_t *symbol_list[]) +static int chibios_get_symbol_list_to_lookup(symbol_table_elem_t *symbol_list[]) { - *symbol_list = malloc(sizeof(ChibiOS_symbol_list)); + *symbol_list = malloc(sizeof(chibios_symbol_list)); if (*symbol_list == NULL) return ERROR_FAIL; - memcpy(*symbol_list, ChibiOS_symbol_list, sizeof(ChibiOS_symbol_list)); + memcpy(*symbol_list, chibios_symbol_list, sizeof(chibios_symbol_list)); return 0; } -static bool ChibiOS_detect_rtos(struct target *target) +static bool chibios_detect_rtos(struct target *target) { if ((target->rtos->symbols != NULL) && - ((target->rtos->symbols[ChibiOS_VAL_rlist].address != 0) || - (target->rtos->symbols[ChibiOS_VAL_ch].address != 0))) { + ((target->rtos->symbols[CHIBIOS_VAL_RLIST].address != 0) || + (target->rtos->symbols[CHIBIOS_VAL_CH].address != 0))) { - if (target->rtos->symbols[ChibiOS_VAL_ch_debug].address == 0) { + if (target->rtos->symbols[CHIBIOS_VAL_CH_DEBUG].address == 0) { LOG_INFO("It looks like the target may be running ChibiOS " "without ch_debug."); return false; @@ -529,11 +529,11 @@ static bool ChibiOS_detect_rtos(struct target *target) return false; } -static int ChibiOS_create(struct target *target) +static int chibios_create(struct target *target) { int i = 0; while ((i < CHIBIOS_NUM_PARAMS) && - (0 != strcmp(ChibiOS_params_list[i].target_name, target->type->name))) { + (0 != strcmp(chibios_params_list[i].target_name, target->type->name))) { i++; } if (i >= CHIBIOS_NUM_PARAMS) { @@ -542,6 +542,6 @@ static int ChibiOS_create(struct target *target) return -1; } - target->rtos->rtos_specific_params = (void *) &ChibiOS_params_list[i]; + target->rtos->rtos_specific_params = (void *) &chibios_params_list[i]; return 0; } diff --git a/src/rtos/rtos.c b/src/rtos/rtos.c index 549833f41..221234828 100644 --- a/src/rtos/rtos.c +++ b/src/rtos/rtos.c @@ -31,7 +31,7 @@ extern struct rtos_type FreeRTOS_rtos; extern struct rtos_type ThreadX_rtos; extern struct rtos_type eCos_rtos; extern struct rtos_type Linux_os; -extern struct rtos_type ChibiOS_rtos; +extern struct rtos_type chibios_rtos; extern struct rtos_type chromium_ec_rtos; extern struct rtos_type embKernel_rtos; extern struct rtos_type mqx_rtos; @@ -44,7 +44,7 @@ static struct rtos_type *rtos_types[] = { &FreeRTOS_rtos, &eCos_rtos, &Linux_os, - &ChibiOS_rtos, + &chibios_rtos, &chromium_ec_rtos, &embKernel_rtos, &mqx_rtos, ----------------------------------------------------------------------- Summary of changes: src/rtos/Makefile.am | 2 +- src/rtos/{ChibiOS.c => chibios.c} | 118 +++++++++++++++++++------------------- src/rtos/rtos.c | 4 +- 3 files changed, 62 insertions(+), 62 deletions(-) rename src/rtos/{ChibiOS.c => chibios.c} (83%) hooks/post-receive -- Main OpenOCD repository |
From: OpenOCD-Gerrit <ope...@us...> - 2020-05-24 20:25:44
|
This is an automated email from the git hooks/post-receive script. It was generated because a ref change was pushed to the repository containing the project "Main OpenOCD repository". The branch, master has been updated via 0637047c6549e1e30f38e4084e516a4e6d67a167 (commit) from e41c0f4906e46d1076ce62a0da5518aa1ca280b8 (commit) Those revisions listed above that are new to this repository have not appeared on any other notification email; so we list those revisions in full, below. - Log ----------------------------------------------------------------- commit 0637047c6549e1e30f38e4084e516a4e6d67a167 Author: Alistair Francis <ali...@wd...> Date: Wed May 13 15:03:14 2020 -0700 contrib: Add HiFive1 to udev rules Change-Id: I4ba9219e1c673d650931f8f9426d554de8322abf Signed-off-by: Alistair Francis <ali...@wd...> Reviewed-on: http://openocd.zylin.com/5678 Tested-by: jenkins Reviewed-by: Antonio Borneo <bor...@gm...> diff --git a/contrib/60-openocd.rules b/contrib/60-openocd.rules index 990412752..617346d1c 100644 --- a/contrib/60-openocd.rules +++ b/contrib/60-openocd.rules @@ -109,6 +109,8 @@ ATTRS{idVendor}=="1366", ATTRS{idProduct}=="1015", MODE="660", GROUP="plugdev", ATTRS{idVendor}=="1366", ATTRS{idProduct}=="1016", MODE="660", GROUP="plugdev", TAG+="uaccess" ATTRS{idVendor}=="1366", ATTRS{idProduct}=="1017", MODE="660", GROUP="plugdev", TAG+="uaccess" ATTRS{idVendor}=="1366", ATTRS{idProduct}=="1018", MODE="660", GROUP="plugdev", TAG+="uaccess" +ATTRS{idVendor}=="1366", ATTRS{idProduct}=="1051", MODE="660", GROUP="plugdev", TAG+="uaccess" +ATTRS{idVendor}=="1366", ATTRS{idProduct}=="1061", MODE="660", GROUP="plugdev", TAG+="uaccess" # Raisonance RLink ATTRS{idVendor}=="138e", ATTRS{idProduct}=="9000", MODE="660", GROUP="plugdev", TAG+="uaccess" ----------------------------------------------------------------------- Summary of changes: contrib/60-openocd.rules | 2 ++ 1 file changed, 2 insertions(+) hooks/post-receive -- Main OpenOCD repository |
From: OpenOCD-Gerrit <ope...@us...> - 2020-05-14 19:29:29
|
This is an automated email from the git hooks/post-receive script. It was generated because a ref change was pushed to the repository containing the project "Main OpenOCD repository". The branch, master has been updated via 11c5efd2ecd8df002567e272b874f2e6b821d9cd (commit) from dadf46f618b9cb3baea8679a4f6364df66092aac (commit) Those revisions listed above that are new to this repository have not appeared on any other notification email; so we list those revisions in full, below. - Log ----------------------------------------------------------------- commit 11c5efd2ecd8df002567e272b874f2e6b821d9cd Author: Antonio Borneo <bor...@gm...> Date: Tue May 12 16:21:13 2020 +0200 target/arc: fix build with clang Commit da41bce3aee9 ("target/arc: introduce breakpoint functionality") introduces a mismatch between the format string and one int constant. Change the format string to match the int constant. Change-Id: I0d59552205551b90e165c0a2e3fef247ad0c7701 Signed-off-by: Antonio Borneo <bor...@gm...> Fixes: da41bce3aee9 ("target/arc: introduce breakpoint functionality") Reviewed-on: http://openocd.zylin.com/5655 Tested-by: jenkins Reviewed-by: Evgeniy Didin <di...@sy...> Reviewed-by: Tarek BOCHKATI <tar...@gm...> diff --git a/src/target/arc.c b/src/target/arc.c index bf744962a..6cf0ec7af 100644 --- a/src/target/arc.c +++ b/src/target/arc.c @@ -1445,7 +1445,7 @@ static int arc_unset_breakpoint(struct target *target, } else { LOG_WARNING("Software breakpoint @0x%" TARGET_PRIxADDR " has been overwritten outside of debugger. " - "Expected: 0x%04" PRIx16 ", got: 0x%04" PRIx16, + "Expected: 0x%04x, got: 0x%04" PRIx16, breakpoint->address, ARC_SDBBP_16, current_instr); } } else { ----------------------------------------------------------------------- Summary of changes: src/target/arc.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) hooks/post-receive -- Main OpenOCD repository |
From: OpenOCD-Gerrit <ope...@us...> - 2020-05-12 05:06:36
|
This is an automated email from the git hooks/post-receive script. It was generated because a ref change was pushed to the repository containing the project "Main OpenOCD repository". The branch, master has been updated via dadf46f618b9cb3baea8679a4f6364df66092aac (commit) from b604bc6c4ccaf81d61cd1c8a5e5c9f1b722e252e (commit) Those revisions listed above that are new to this repository have not appeared on any other notification email; so we list those revisions in full, below. - Log ----------------------------------------------------------------- commit dadf46f618b9cb3baea8679a4f6364df66092aac Author: iosabi <io...@pr...> Date: Thu Apr 9 16:23:34 2020 +0000 cortex_m: make bit fields in cortex_m unsigned. Expression like (0xffff << 16) evaluate to type int, which is not able to hold that value, producing a warning when compiling with -fsanitize=undefined. This patch makes most of the cortex_m constants unsigned using the BIT() macro or appending "ul" when possible to fix the undefined behavior warning. Signed-off-by: iosabi <io...@pr...> Change-Id: I7af194305ef612d7a32e74eaf9f11dd85fa87f32 Reviewed-on: http://openocd.zylin.com/5583 Tested-by: jenkins Reviewed-by: Antonio Borneo <bor...@gm...> Reviewed-by: Christopher Head <ch...@za...> Reviewed-by: Tomas Vanek <va...@fb...> diff --git a/src/target/cortex_m.c b/src/target/cortex_m.c index bb14bc846..e540f8507 100644 --- a/src/target/cortex_m.c +++ b/src/target/cortex_m.c @@ -129,7 +129,7 @@ static int cortex_m_write_debug_halt_mask(struct target *target, struct armv7m_common *armv7m = &cortex_m->armv7m; /* mask off status bits */ - cortex_m->dcb_dhcsr &= ~((0xFFFF << 16) | mask_off); + cortex_m->dcb_dhcsr &= ~((0xFFFFul << 16) | mask_off); /* create new register mask */ cortex_m->dcb_dhcsr |= DBGKEY | C_DEBUGEN | mask_on; diff --git a/src/target/cortex_m.h b/src/target/cortex_m.h index 505a09b68..a767f93c5 100644 --- a/src/target/cortex_m.h +++ b/src/target/cortex_m.h @@ -26,6 +26,7 @@ #define OPENOCD_TARGET_CORTEX_M_H #include "armv7m.h" +#include "helper/bits.h" #define CORTEX_M_COMMON_MAGIC 0x1A451A45 @@ -50,7 +51,7 @@ #define DCB_DCRDR 0xE000EDF8 #define DCB_DEMCR 0xE000EDFC -#define DCRSR_WnR (1 << 16) +#define DCRSR_WnR BIT(16) #define DWT_CTRL 0xE0001000 #define DWT_CYCCNT 0xE0001004 @@ -90,28 +91,28 @@ #define TPIU_ACPR_MAX_SWOSCALER 0x1fff /* DCB_DHCSR bit and field definitions */ -#define DBGKEY (0xA05F << 16) -#define C_DEBUGEN (1 << 0) -#define C_HALT (1 << 1) -#define C_STEP (1 << 2) -#define C_MASKINTS (1 << 3) -#define S_REGRDY (1 << 16) -#define S_HALT (1 << 17) -#define S_SLEEP (1 << 18) -#define S_LOCKUP (1 << 19) -#define S_RETIRE_ST (1 << 24) -#define S_RESET_ST (1 << 25) +#define DBGKEY (0xA05Ful << 16) +#define C_DEBUGEN BIT(0) +#define C_HALT BIT(1) +#define C_STEP BIT(2) +#define C_MASKINTS BIT(3) +#define S_REGRDY BIT(16) +#define S_HALT BIT(17) +#define S_SLEEP BIT(18) +#define S_LOCKUP BIT(19) +#define S_RETIRE_ST BIT(24) +#define S_RESET_ST BIT(25) /* DCB_DEMCR bit and field definitions */ -#define TRCENA (1 << 24) -#define VC_HARDERR (1 << 10) -#define VC_INTERR (1 << 9) -#define VC_BUSERR (1 << 8) -#define VC_STATERR (1 << 7) -#define VC_CHKERR (1 << 6) -#define VC_NOCPERR (1 << 5) -#define VC_MMERR (1 << 4) -#define VC_CORERESET (1 << 0) +#define TRCENA BIT(24) +#define VC_HARDERR BIT(10) +#define VC_INTERR BIT(9) +#define VC_BUSERR BIT(8) +#define VC_STATERR BIT(7) +#define VC_CHKERR BIT(6) +#define VC_NOCPERR BIT(5) +#define VC_MMERR BIT(4) +#define VC_CORERESET BIT(0) #define NVIC_ICTR 0xE000E004 #define NVIC_ISE0 0xE000E100 @@ -128,12 +129,12 @@ #define NVIC_BFAR 0xE000ED38 /* NVIC_AIRCR bits */ -#define AIRCR_VECTKEY (0x5FA << 16) -#define AIRCR_SYSRESETREQ (1 << 2) -#define AIRCR_VECTCLRACTIVE (1 << 1) -#define AIRCR_VECTRESET (1 << 0) +#define AIRCR_VECTKEY (0x5FAul << 16) +#define AIRCR_SYSRESETREQ BIT(2) +#define AIRCR_VECTCLRACTIVE BIT(1) +#define AIRCR_VECTRESET BIT(0) /* NVIC_SHCSR bits */ -#define SHCSR_BUSFAULTENA (1 << 17) +#define SHCSR_BUSFAULTENA BIT(17) /* NVIC_DFSR bits */ #define DFSR_HALTED 1 #define DFSR_BKPT 2 @@ -143,10 +144,10 @@ #define FPCR_CODE 0 #define FPCR_LITERAL 1 -#define FPCR_REPLACE_REMAP (0 << 30) -#define FPCR_REPLACE_BKPT_LOW (1 << 30) -#define FPCR_REPLACE_BKPT_HIGH (2 << 30) -#define FPCR_REPLACE_BKPT_BOTH (3 << 30) +#define FPCR_REPLACE_REMAP (0ul << 30) +#define FPCR_REPLACE_BKPT_LOW (1ul << 30) +#define FPCR_REPLACE_BKPT_HIGH (2ul << 30) +#define FPCR_REPLACE_BKPT_BOTH (3ul << 30) struct cortex_m_fp_comparator { bool used; ----------------------------------------------------------------------- Summary of changes: src/target/cortex_m.c | 2 +- src/target/cortex_m.h | 61 ++++++++++++++++++++++++++------------------------- 2 files changed, 32 insertions(+), 31 deletions(-) hooks/post-receive -- Main OpenOCD repository |
From: OpenOCD-Gerrit <ope...@us...> - 2020-05-12 05:04:47
|
This is an automated email from the git hooks/post-receive script. It was generated because a ref change was pushed to the repository containing the project "Main OpenOCD repository". The branch, master has been updated via b604bc6c4ccaf81d61cd1c8a5e5c9f1b722e252e (commit) from 59cc1f6629a8d8008cd5af69792e63adecd56b7c (commit) Those revisions listed above that are new to this repository have not appeared on any other notification email; so we list those revisions in full, below. - Log ----------------------------------------------------------------- commit b604bc6c4ccaf81d61cd1c8a5e5c9f1b722e252e Author: Marc Schink <de...@za...> Date: Thu Feb 20 21:55:53 2020 +0100 flash/nor/bluenrg-x: Minor code cleanups Change-Id: I7844eb30d58b0a23ca5bcc94181066cca6fa0861 Signed-off-by: Marc Schink <de...@za...> Reviewed-on: http://openocd.zylin.com/5462 Tested-by: jenkins Reviewed-by: Tomas Vanek <va...@fb...> diff --git a/src/flash/nor/bluenrg-x.c b/src/flash/nor/bluenrg-x.c index f7f5e6370..fbce20d55 100644 --- a/src/flash/nor/bluenrg-x.c +++ b/src/flash/nor/bluenrg-x.c @@ -74,7 +74,7 @@ const struct flash_ctrl_priv_data flash_priv_data_lp = { }; struct bluenrgx_flash_bank { - int probed; + bool probed; uint32_t die_id; const struct flash_ctrl_priv_data *flash_ptr; }; @@ -99,7 +99,7 @@ FLASH_BANK_COMMAND_HANDLER(bluenrgx_flash_bank_command) bank->driver_priv = bluenrgx_info; - bluenrgx_info->probed = 0; + bluenrgx_info->probed = false; if (CMD_ARGC < 6) return ERROR_COMMAND_SYNTAX_ERROR; @@ -133,7 +133,7 @@ static int bluenrgx_erase(struct flash_bank *bank, int first, int last) uint32_t address, command; /* check preconditions */ - if (bluenrgx_info->probed == 0) + if (!bluenrgx_info->probed) return ERROR_FLASH_BANK_NOT_PROBED; if (bank->target->state != TARGET_HALTED) { @@ -165,7 +165,7 @@ static int bluenrgx_erase(struct flash_bank *bank, int first, int last) return ERROR_FAIL; } - for (int i = 0; i < 100; i++) { + for (unsigned int i = 0; i < 100; i++) { uint32_t value; if (bluenrgx_read_flash_reg(bank, FLASH_REG_IRQRAW, &value)) { LOG_ERROR("Register write failed"); @@ -201,7 +201,7 @@ static int bluenrgx_erase(struct flash_bank *bank, int first, int last) return ERROR_FAIL; } - for (int j = 0; j < 100; j++) { + for (unsigned int j = 0; j < 100; j++) { uint32_t value; if (bluenrgx_read_flash_reg(bank, FLASH_REG_IRQRAW, &value)) { LOG_ERROR("Register write failed"); @@ -244,7 +244,7 @@ static int bluenrgx_write(struct flash_bank *bank, const uint8_t *buffer, }; /* check preconditions */ - if (bluenrgx_info->probed == 0) + if (!bluenrgx_info->probed) return ERROR_FLASH_BANK_NOT_PROBED; if ((offset + count) > bank->size) { @@ -365,7 +365,6 @@ static int bluenrgx_probe(struct flash_bank *bank) { struct bluenrgx_flash_bank *bluenrgx_info = bank->driver_priv; uint32_t idcode, size_info, die_id; - int i; int retval = target_read_u32(bank->target, BLUENRGLP_JTAG_REG, &idcode); if (retval != ERROR_OK) @@ -381,7 +380,7 @@ static int bluenrgx_probe(struct flash_bank *bank) bluenrgx_info->flash_ptr = &flash_priv_data_1; bank->base = flash_priv_data_1.flash_base; - for (i = 0; i < (int)(sizeof(flash_ctrl)/sizeof(*flash_ctrl)); i++) { + for (size_t i = 0; i < ARRAY_SIZE(flash_ctrl); i++) { if (idcode == (*flash_ctrl[i]).jtag_idcode) { bluenrgx_info->flash_ptr = flash_ctrl[i]; bank->base = (*flash_ctrl[i]).flash_base; @@ -400,14 +399,14 @@ static int bluenrgx_probe(struct flash_bank *bank) bank->num_sectors = bank->size/FLASH_PAGE_SIZE(bluenrgx_info); bank->sectors = realloc(bank->sectors, sizeof(struct flash_sector) * bank->num_sectors); - for (i = 0; i < bank->num_sectors; i++) { + for (int i = 0; i < bank->num_sectors; i++) { bank->sectors[i].offset = i * FLASH_PAGE_SIZE(bluenrgx_info); bank->sectors[i].size = FLASH_PAGE_SIZE(bluenrgx_info); bank->sectors[i].is_erased = -1; bank->sectors[i].is_protected = 0; } - bluenrgx_info->probed = 1; + bluenrgx_info->probed = true; bluenrgx_info->die_id = die_id; return ERROR_OK; ----------------------------------------------------------------------- Summary of changes: src/flash/nor/bluenrg-x.c | 19 +++++++++---------- 1 file changed, 9 insertions(+), 10 deletions(-) hooks/post-receive -- Main OpenOCD repository |
From: OpenOCD-Gerrit <ope...@us...> - 2020-05-09 13:42:24
|
This is an automated email from the git hooks/post-receive script. It was generated because a ref change was pushed to the repository containing the project "Main OpenOCD repository". The branch, master has been updated via 59cc1f6629a8d8008cd5af69792e63adecd56b7c (commit) from e41c3f78d13b9450c5c96d7188d8ec775df8f4ad (commit) Those revisions listed above that are new to this repository have not appeared on any other notification email; so we list those revisions in full, below. - Log ----------------------------------------------------------------- commit 59cc1f6629a8d8008cd5af69792e63adecd56b7c Author: Antonio Borneo <bor...@gm...> Date: Mon May 6 18:32:02 2019 +0200 coding style: open function's brace at beginning of new line Issue identified by checkpatch script from Linux kernel v5.1 using the command find src/ -type f -exec ./tools/scripts/checkpatch.pl \ -q --types OPEN_BRACE -f {} \; Change-Id: I6d1356ed11e2699525f384efb7556bc2efdc299f Signed-off-by: Antonio Borneo <bor...@gm...> Reviewed-on: http://openocd.zylin.com/5628 Tested-by: jenkins Reviewed-by: Marc Schink <de...@za...> diff --git a/src/target/openrisc/or1k.c b/src/target/openrisc/or1k.c index 1e5db8c61..44825d002 100644 --- a/src/target/openrisc/or1k.c +++ b/src/target/openrisc/or1k.c @@ -1207,8 +1207,8 @@ int or1k_get_gdb_fileio_info(struct target *target, struct gdb_fileio_info *file } static int or1k_checksum_memory(struct target *target, target_addr_t address, - uint32_t count, uint32_t *checksum) { - + uint32_t count, uint32_t *checksum) +{ return ERROR_FAIL; } diff --git a/src/target/riscv/riscv.c b/src/target/riscv/riscv.c index b5fd22b48..afd0cc815 100644 --- a/src/target/riscv/riscv.c +++ b/src/target/riscv/riscv.c @@ -772,12 +772,9 @@ static int oldriscv_step(struct target *target, int current, uint32_t address, return tt->step(target, current, address, handle_breakpoints); } -static int old_or_new_riscv_step( - struct target *target, - int current, - target_addr_t address, - int handle_breakpoints -){ +static int old_or_new_riscv_step(struct target *target, int current, + target_addr_t address, int handle_breakpoints) +{ RISCV_INFO(r); LOG_DEBUG("handle_breakpoints=%d", handle_breakpoints); if (r->is_halted == NULL) @@ -862,13 +859,9 @@ static int oldriscv_resume(struct target *target, int current, uint32_t address, debug_execution); } -static int old_or_new_riscv_resume( - struct target *target, - int current, - target_addr_t address, - int handle_breakpoints, - int debug_execution -){ +static int old_or_new_riscv_resume(struct target *target, int current, + target_addr_t address, int handle_breakpoints, int debug_execution) +{ LOG_DEBUG("handle_breakpoints=%d", handle_breakpoints); if (target->smp) { struct target_list *targets = target->head; @@ -1413,12 +1406,9 @@ int riscv_openocd_resume( return out; } -int riscv_openocd_step( - struct target *target, - int current, - target_addr_t address, - int handle_breakpoints -) { +int riscv_openocd_step(struct target *target, int current, + target_addr_t address, int handle_breakpoints) +{ LOG_DEBUG("stepping rtos hart"); if (!current) ----------------------------------------------------------------------- Summary of changes: src/target/openrisc/or1k.c | 4 ++-- src/target/riscv/riscv.c | 28 +++++++++------------------- 2 files changed, 11 insertions(+), 21 deletions(-) hooks/post-receive -- Main OpenOCD repository |
From: OpenOCD-Gerrit <ope...@us...> - 2020-05-09 13:41:24
|
This is an automated email from the git hooks/post-receive script. It was generated because a ref change was pushed to the repository containing the project "Main OpenOCD repository". The branch, master has been updated via e41c3f78d13b9450c5c96d7188d8ec775df8f4ad (commit) via 4625257007b520c739a9e9437b97c7c7c7d60158 (commit) via 1946b50dba6c9d5bd5fda2b396eeae649b47762a (commit) via 3883e769f43fe85d1d499c8ac7ae2ed781bf137d (commit) from 3474aa223a712ac848a8a8e58633106477db0641 (commit) Those revisions listed above that are new to this repository have not appeared on any other notification email; so we list those revisions in full, below. - Log ----------------------------------------------------------------- commit e41c3f78d13b9450c5c96d7188d8ec775df8f4ad Author: Antonio Borneo <bor...@gm...> Date: Mon May 6 15:07:19 2019 +0200 coding style: wrap lines longer than 120 chars The coding style is quite permissive allowing 120 chars per line, but abuses are still present. Fix them, wrapping the lines. Change-Id: I94d66b651d759a60ec35f7ba115c43933e70ed69 Signed-off-by: Antonio Borneo <bor...@gm...> Reviewed-on: http://openocd.zylin.com/5626 Tested-by: jenkins Reviewed-by: Tomas Vanek <va...@fb...> diff --git a/src/target/dsp563xx_once.c b/src/target/dsp563xx_once.c index 65ef7070b..624474d1b 100644 --- a/src/target/dsp563xx_once.c +++ b/src/target/dsp563xx_once.c @@ -66,7 +66,8 @@ static inline int dsp563xx_write_dr_u32(struct jtag_tap *tap, uint32_t *dr_in, u } /** single word instruction */ -static inline int dsp563xx_once_ir_exec(struct jtag_tap *tap, int flush, uint8_t instr, uint8_t rw, uint8_t go, uint8_t ex) +static inline int dsp563xx_once_ir_exec(struct jtag_tap *tap, int flush, uint8_t instr, + uint8_t rw, uint8_t go, uint8_t ex) { int err; diff --git a/src/target/dsp5680xx.c b/src/target/dsp5680xx.c index a50f2cd47..c74a41846 100644 --- a/src/target/dsp5680xx.c +++ b/src/target/dsp5680xx.c @@ -1731,7 +1731,12 @@ static int dsp5680xx_f_ex(struct target *t, uint16_t c, uint32_t a, uint32_t d, } /** - * Prior to the execution of any Flash module command, the Flash module Clock Divider (CLKDIV) register must be initialized. The values of this register determine the speed of the internal Flash Clock (FCLK). FCLK must be in the range of 150kHz ⤠FCLK ⤠200kHz for proper operation of the Flash module. (Running FCLK too slowly wears out the module, while running it too fast under programs Flash leading to bit errors.) + * Prior to the execution of any Flash module command, the Flash module Clock + * Divider (CLKDIV) register must be initialized. The values of this register + * determine the speed of the internal Flash Clock (FCLK). FCLK must be in the + * range of 150kHz ⤠FCLK ⤠200kHz for proper operation of the Flash module. + * (Running FCLK too slowly wears out the module, while running it too fast + * under programs Flash leading to bit errors.) * * @param target * @@ -1787,7 +1792,11 @@ static int set_fm_ck_div(struct target *target) } /** - * Executes the FM calculate signature command. The FM will calculate over the data from @address to @address + @words -1. The result is written to a register, then read out by this function and returned in @signature. The value @signature may be compared to the the one returned by perl_crc to verify the flash was written correctly. + * Executes the FM calculate signature command. The FM will calculate over the + * data from @address to @address + @words -1. The result is written to a + * register, then read out by this function and returned in @signature. The + * value @signature may be compared to the the one returned by perl_crc to + * verify the flash was written correctly. * * @param target * @param address Start of flash array where the signature should be calculated. commit 4625257007b520c739a9e9437b97c7c7c7d60158 Author: Antonio Borneo <bor...@gm...> Date: Mon May 6 14:37:19 2019 +0200 coding style: join consecutive string fragments The re is no need to split a long string, apart for fitting the predefined line width. Join the consecutive string fragments. Issue identified by checkpatch script from Linux kernel v5.1 using the command find src/ -type f -exec ./tools/scripts/checkpatch.pl \ -q --types STRING_FRAGMENTS -f {} \; Change-Id: I8de52d572b0e3d4788c1d4d2b0cf8f94c7f08409 Signed-off-by: Antonio Borneo <bor...@gm...> Reviewed-on: http://openocd.zylin.com/5625 Tested-by: jenkins Reviewed-by: Tomas Vanek <va...@fb...> diff --git a/src/jtag/core.c b/src/jtag/core.c index 884a74365..d83f19503 100644 --- a/src/jtag/core.c +++ b/src/jtag/core.c @@ -1406,7 +1406,7 @@ static int jtag_validate_ircapture(void) && tap->ir_length < JTAG_IRLEN_MAX) { tap->ir_length++; } - LOG_WARNING("AUTO %s - use \"jtag newtap " "%s %s -irlen %d " + LOG_WARNING("AUTO %s - use \"jtag newtap %s %s -irlen %d " "-expected-id 0x%08" PRIx32 "\"", tap->dotted_name, tap->chip, tap->tapname, tap->ir_length, tap->idcode); } commit 1946b50dba6c9d5bd5fda2b396eeae649b47762a Author: Antonio Borneo <bor...@gm...> Date: Mon May 6 12:56:38 2019 +0200 coding style: let "else" follow the close brace The statement "else" should not be on a new line when follows a close brace '}'. Fix it! Issue identified by checkpatch script from Linux kernel v5.1 using the command find src/ -type f -exec ./tools/scripts/checkpatch.pl \ -q --types ELSE_AFTER_BRACE -f {} \; Change-Id: I8af247ec3f75a69713d7cb1e73881254d16c189e Signed-off-by: Antonio Borneo <bor...@gm...> Reviewed-on: http://openocd.zylin.com/5623 Reviewed-by: Andreas Fritiofson <and...@gm...> Tested-by: jenkins diff --git a/src/flash/nor/stm32f1x.c b/src/flash/nor/stm32f1x.c index 37dcafd87..990b48aeb 100644 --- a/src/flash/nor/stm32f1x.c +++ b/src/flash/nor/stm32f1x.c @@ -1369,8 +1369,7 @@ COMMAND_HANDLER(stm32x_handle_options_write_command) COMMAND_PARSE_NUMBER(u16, CMD_ARGV[1], useropt); CMD_ARGC--; CMD_ARGV++; - } - else if (stm32x_info->has_dual_banks) { + } else if (stm32x_info->has_dual_banks) { if (strcmp("BOOT0", CMD_ARGV[0]) == 0) optionbyte |= (1 << 3); else if (strcmp("BOOT1", CMD_ARGV[0]) == 0) diff --git a/src/target/cortex_m.c b/src/target/cortex_m.c index 27febd3d7..bb14bc846 100644 --- a/src/target/cortex_m.c +++ b/src/target/cortex_m.c @@ -966,8 +966,7 @@ static int cortex_m_step(struct target *target, int current, /* Re-enable interrupts if appropriate */ cortex_m_write_debug_halt_mask(target, C_HALT, 0); cortex_m_set_maskints_for_halt(target); - } - else { + } else { /* Set a temporary break point */ if (breakpoint) { commit 3883e769f43fe85d1d499c8ac7ae2ed781bf137d Author: Antonio Borneo <bor...@gm...> Date: Mon May 6 12:41:22 2019 +0200 coding style: remove useless return statement from void functions For void functions, a return as last statement is useless. Remove it. Issue identified by checkpatch script from Linux kernel v5.1 using the command find src/ -type f -exec ./tools/scripts/checkpatch.pl \ -q --types RETURN_VOID -f {} \; Change-Id: Ie0616fe98623f30d2d7b04ac9517d669774092de Signed-off-by: Antonio Borneo <bor...@gm...> Reviewed-on: http://openocd.zylin.com/5622 Reviewed-by: Andreas Fritiofson <and...@gm...> Tested-by: jenkins diff --git a/src/jtag/drivers/cmsis_dap_usb.c b/src/jtag/drivers/cmsis_dap_usb.c index 289737754..ee1cb533c 100644 --- a/src/jtag/drivers/cmsis_dap_usb.c +++ b/src/jtag/drivers/cmsis_dap_usb.c @@ -364,8 +364,6 @@ static void cmsis_dap_usb_close(struct cmsis_dap *dap) free(pending_fifo[i].transfers); pending_fifo[i].transfers = NULL; } - - return; } static int cmsis_dap_usb_write(struct cmsis_dap *dap, int txlen) diff --git a/src/jtag/drivers/sysfsgpio.c b/src/jtag/drivers/sysfsgpio.c index e4a15237b..a4d7ad9ec 100644 --- a/src/jtag/drivers/sysfsgpio.c +++ b/src/jtag/drivers/sysfsgpio.c @@ -98,8 +98,6 @@ static void unexport_sysfs_gpio(int gpio) snprintf(gpiostr, sizeof(gpiostr), "%d", gpio); if (open_write_close("/sys/class/gpio/unexport", gpiostr) < 0) LOG_ERROR("Couldn't unexport gpio %d", gpio); - - return; } /* diff --git a/src/jtag/drivers/xds110.c b/src/jtag/drivers/xds110.c index 8a832adf0..5e4df93c2 100644 --- a/src/jtag/drivers/xds110.c +++ b/src/jtag/drivers/xds110.c @@ -1683,14 +1683,11 @@ static int xds110_reset(int trst, int srst) static void xds110_execute_sleep(struct jtag_command *cmd) { jtag_sleep(cmd->cmd.sleep->us); - return; } static void xds110_execute_tlr_reset(struct jtag_command *cmd) { (void)xds_goto_state(XDS_JTAG_STATE_RESET); - - return; } static void xds110_execute_pathmove(struct jtag_command *cmd) @@ -1726,8 +1723,6 @@ static void xds110_execute_pathmove(struct jtag_command *cmd) } free((void *)path); - - return; } static void xds110_queue_scan(struct jtag_command *cmd) @@ -1799,8 +1794,6 @@ static void xds110_queue_scan(struct jtag_command *cmd) } xds110.txn_request_size += total_bytes; xds110.txn_result_size += total_bytes; - - return; } static void xds110_queue_runtest(struct jtag_command *cmd) @@ -1820,8 +1813,6 @@ static void xds110_queue_runtest(struct jtag_command *cmd) xds110.txn_requests[xds110.txn_request_size++] = (clocks >> 16) & 0xff; xds110.txn_requests[xds110.txn_request_size++] = (clocks >> 24) & 0xff; xds110.txn_requests[xds110.txn_request_size++] = end_state; - - return; } static void xds110_queue_stableclocks(struct jtag_command *cmd) @@ -1838,8 +1829,6 @@ static void xds110_queue_stableclocks(struct jtag_command *cmd) xds110.txn_requests[xds110.txn_request_size++] = (clocks >> 8) & 0xff; xds110.txn_requests[xds110.txn_request_size++] = (clocks >> 16) & 0xff; xds110.txn_requests[xds110.txn_request_size++] = (clocks >> 24) & 0xff; - - return; } static void xds110_execute_command(struct jtag_command *cmd) ----------------------------------------------------------------------- Summary of changes: src/flash/nor/stm32f1x.c | 3 +-- src/jtag/core.c | 2 +- src/jtag/drivers/cmsis_dap_usb.c | 2 -- src/jtag/drivers/sysfsgpio.c | 2 -- src/jtag/drivers/xds110.c | 11 ----------- src/target/cortex_m.c | 3 +-- src/target/dsp563xx_once.c | 3 ++- src/target/dsp5680xx.c | 13 +++++++++++-- 8 files changed, 16 insertions(+), 23 deletions(-) hooks/post-receive -- Main OpenOCD repository |
From: OpenOCD-Gerrit <ope...@us...> - 2020-05-09 13:40:46
|
This is an automated email from the git hooks/post-receive script. It was generated because a ref change was pushed to the repository containing the project "Main OpenOCD repository". The branch, master has been updated via 3474aa223a712ac848a8a8e58633106477db0641 (commit) via 185834ef8aa663faf6761e5c3d7c4a049c88eeab (commit) from 4f459660a9dab3877f6f27127e565dd2b49b4ec7 (commit) Those revisions listed above that are new to this repository have not appeared on any other notification email; so we list those revisions in full, below. - Log ----------------------------------------------------------------- commit 3474aa223a712ac848a8a8e58633106477db0641 Author: Antonio Borneo <bor...@gm...> Date: Mon May 6 12:31:57 2019 +0200 coding style: prototype of functions with no parameters Functions that have no parameters should use "void" as parameter in the function declaration. Issue identified and fixed by script checkpatch from Linux kernel v5.1 using the command find src/ -type f -exec ./tools/scripts/checkpatch.pl \ -q --types FUNCTION_WITHOUT_ARGS --fix-inplace -f {} \; Change-Id: If104ac75b44e939ec86155ff7b5720f2e33c6b39 Signed-off-by: Antonio Borneo <bor...@gm...> Reviewed-on: http://openocd.zylin.com/5621 Reviewed-by: Andreas Fritiofson <and...@gm...> Tested-by: jenkins diff --git a/src/helper/log.c b/src/helper/log.c index ae26df5a1..380f548f4 100644 --- a/src/helper/log.c +++ b/src/helper/log.c @@ -401,7 +401,7 @@ char *alloc_printf(const char *format, ...) * fast when invoked more often than every 500ms. * */ -void keep_alive() +void keep_alive(void) { current_time = timeval_ms(); if (current_time-last_time > 1000) { @@ -436,7 +436,7 @@ void keep_alive() } /* reset keep alive timer without sending message */ -void kept_alive() +void kept_alive(void) { current_time = timeval_ms(); last_time = current_time; diff --git a/src/jtag/core.c b/src/jtag/core.c index f12ab5924..884a74365 100644 --- a/src/jtag/core.c +++ b/src/jtag/core.c @@ -1872,7 +1872,7 @@ void jtag_set_verify(bool enable) jtag_verify = enable; } -bool jtag_will_verify() +bool jtag_will_verify(void) { return jtag_verify; } @@ -1882,7 +1882,7 @@ void jtag_set_verify_capture_ir(bool enable) jtag_verify_capture_ir = enable; } -bool jtag_will_verify_capture_ir() +bool jtag_will_verify_capture_ir(void) { return jtag_verify_capture_ir; } diff --git a/src/jtag/drivers/arm-jtag-ew.c b/src/jtag/drivers/arm-jtag-ew.c index d35e15128..405278b9a 100644 --- a/src/jtag/drivers/arm-jtag-ew.c +++ b/src/jtag/drivers/arm-jtag-ew.c @@ -683,7 +683,7 @@ static int armjtagew_tap_execute(void) /**************************************************************************** * JLink USB low-level functions */ -static struct armjtagew *armjtagew_usb_open() +static struct armjtagew *armjtagew_usb_open(void) { usb_init(); diff --git a/src/jtag/interface.c b/src/jtag/interface.c index de132bbe8..56bbf6e51 100644 --- a/src/jtag/interface.c +++ b/src/jtag/interface.c @@ -45,7 +45,7 @@ void tap_set_state_impl(tap_state_t new_state) state_follower = new_state; } -tap_state_t tap_get_state() +tap_state_t tap_get_state(void) { return state_follower; } @@ -64,7 +64,7 @@ void tap_set_end_state(tap_state_t new_end_state) end_state_follower = new_end_state; } -tap_state_t tap_get_end_state() +tap_state_t tap_get_end_state(void) { return end_state_follower; } diff --git a/src/jtag/minidummy/minidummy.c b/src/jtag/minidummy/minidummy.c index 7d5e6a98a..7ee206732 100644 --- a/src/jtag/minidummy/minidummy.c +++ b/src/jtag/minidummy/minidummy.c @@ -83,7 +83,7 @@ int interface_jtag_add_plain_dr_scan(int num_bits, const uint8_t *out_bits, return ERROR_OK; } -int interface_jtag_add_tlr() +int interface_jtag_add_tlr(void) { /* synchronously do the operation here */ diff --git a/src/jtag/zy1000/zy1000.c b/src/jtag/zy1000/zy1000.c index 48a3d4d03..37af2f7ae 100644 --- a/src/jtag/zy1000/zy1000.c +++ b/src/jtag/zy1000/zy1000.c @@ -486,7 +486,7 @@ int interface_jtag_add_plain_dr_scan(int num_bits, return ERROR_OK; } -int interface_jtag_add_tlr() +int interface_jtag_add_tlr(void) { setCurrentState(TAP_RESET); return ERROR_OK; commit 185834ef8aa663faf6761e5c3d7c4a049c88eeab Author: Antonio Borneo <bor...@gm...> Date: Mon May 6 12:18:30 2019 +0200 coding style: add missing space when split strings Long strings are split across few lines; usually split occurs at the white space between two words. Check that the space between the two words is still present. While there, adjust the amount of space between words. Issue identified by checkpatch script from Linux kernel v5.1 using the command find src/ -type f -exec ./tools/scripts/checkpatch.pl \ -q --types MISSING_SPACE -f {} \; Change-Id: I28b9a65564195ba967051add53d1c848c7b8fb30 Signed-off-by: Antonio Borneo <bor...@gm...> Reviewed-on: http://openocd.zylin.com/5620 Reviewed-by: Andreas Fritiofson <and...@gm...> Tested-by: jenkins diff --git a/src/flash/nor/at91sam3.c b/src/flash/nor/at91sam3.c index b51e0972a..c9ffa653b 100644 --- a/src/flash/nor/at91sam3.c +++ b/src/flash/nor/at91sam3.c @@ -3726,7 +3726,7 @@ static const struct command_registration at91sam3_exec_command_handlers[] = { .name = "info", .handler = sam3_handle_info_command, .mode = COMMAND_EXEC, - .help = "Print information about the current at91sam3 chip" + .help = "Print information about the current at91sam3 chip " "and its flash configuration.", .usage = "", }, diff --git a/src/flash/nor/at91sam4.c b/src/flash/nor/at91sam4.c index 135fc99bf..5b56c4241 100644 --- a/src/flash/nor/at91sam4.c +++ b/src/flash/nor/at91sam4.c @@ -3206,7 +3206,7 @@ static const struct command_registration at91sam4_exec_command_handlers[] = { .name = "info", .handler = sam4_handle_info_command, .mode = COMMAND_EXEC, - .help = "Print information about the current at91sam4 chip" + .help = "Print information about the current at91sam4 chip " "and its flash configuration.", .usage = "", }, diff --git a/src/helper/command.c b/src/helper/command.c index 0882ecd58..4422b4abe 100644 --- a/src/helper/command.c +++ b/src/helper/command.c @@ -1219,9 +1219,9 @@ static const struct command_registration command_subcommand_handlers[] = { .mode = COMMAND_ANY, .jim_handler = jim_command_mode, .usage = "[command_name ...]", - .help = "Returns the command modes allowed by a command:" - "'any', 'config', or 'exec'. If no command is" - "specified, returns the current command mode. " + .help = "Returns the command modes allowed by a command: " + "'any', 'config', or 'exec'. If no command is " + "specified, returns the current command mode. " "Returns 'unknown' if an unknown command is given. " "Command can be multiple tokens.", }, diff --git a/src/rtos/ChibiOS.c b/src/rtos/ChibiOS.c index 8839acc9a..08b234fa9 100644 --- a/src/rtos/ChibiOS.c +++ b/src/rtos/ChibiOS.c @@ -200,7 +200,7 @@ static int ChibiOS_update_memory_signature(struct rtos *rtos) /* Currently, we have the inherent assumption that all address pointers * are 32 bit wide. */ if (signature->ch_ptrsize != sizeof(uint32_t)) { - LOG_ERROR("ChibiOS/RT target memory signature claims an address" + LOG_ERROR("ChibiOS/RT target memory signature claims an address " "width unequal to 32 bits!"); free(signature); return -1; diff --git a/src/rtos/linux.c b/src/rtos/linux.c index 0f18d171c..e85a3bdf8 100644 --- a/src/rtos/linux.c +++ b/src/rtos/linux.c @@ -1379,8 +1379,8 @@ static int linux_thread_packet(struct connection *connection, char const *packet target->rtos-> current_threadid) && (target->rtos->current_threadid != -1)) - LOG_WARNING("WARNING! current GDB thread do not match" - "current thread running." + LOG_WARNING("WARNING! current GDB thread do not match " + "current thread running. " "Switch thread in GDB to threadid %d", (int)ct->threadid); diff --git a/src/target/nds32_cmd.c b/src/target/nds32_cmd.c index 7bf7e60c7..d7d040e4b 100644 --- a/src/target/nds32_cmd.c +++ b/src/target/nds32_cmd.c @@ -1007,7 +1007,7 @@ static const struct command_registration nds32_exec_command_handlers[] = { .handler = handle_nds32_global_stop_command, .mode = COMMAND_ANY, .usage = "['on'|'off']", - .help = "turn on/off global stop. After turning on, every load/store" + .help = "turn on/off global stop. After turning on, every load/store " "instructions will be stopped to check memory access.", }, { diff --git a/src/target/riscv/riscv.c b/src/target/riscv/riscv.c index 7ad1ccde9..b5fd22b48 100644 --- a/src/target/riscv/riscv.c +++ b/src/target/riscv/riscv.c @@ -1858,13 +1858,13 @@ static const struct command_registration riscv_exec_command_handlers[] = { .name = "test_sba_config_reg", .handler = riscv_test_sba_config_reg, .mode = COMMAND_ANY, - .usage = "riscv test_sba_config_reg legal_address num_words" + .usage = "riscv test_sba_config_reg legal_address num_words " "illegal_address run_sbbusyerror_test[on/off]", - .help = "Perform a series of tests on the SBCS register." - "Inputs are a legal, 128-byte aligned address and a number of words to" - "read/write starting at that address (i.e., address range [legal address," - "legal_address+word_size*num_words) must be legally readable/writable)" - ", an illegal, 128-byte aligned address for error flag/handling cases," + .help = "Perform a series of tests on the SBCS register. " + "Inputs are a legal, 128-byte aligned address and a number of words to " + "read/write starting at that address (i.e., address range [legal address, " + "legal_address+word_size*num_words) must be legally readable/writable), " + "an illegal, 128-byte aligned address for error flag/handling cases, " "and whether sbbusyerror test should be run." }, { diff --git a/src/target/target.c b/src/target/target.c index 538831b5b..b0deadb0b 100644 --- a/src/target/target.c +++ b/src/target/target.c @@ -6232,7 +6232,7 @@ static const struct command_registration target_exec_command_handlers[] = { .name = "halt", .handler = handle_halt_command, .mode = COMMAND_EXEC, - .help = "request target to halt, then wait up to the specified" + .help = "request target to halt, then wait up to the specified " "number of milliseconds (default 5000) for it to complete", .usage = "[milliseconds]", }, @@ -6248,7 +6248,7 @@ static const struct command_registration target_exec_command_handlers[] = { .handler = handle_reset_command, .mode = COMMAND_EXEC, .usage = "[run|halt|init]", - .help = "Reset all targets into the specified mode." + .help = "Reset all targets into the specified mode. " "Default reset mode is run, if not given.", }, { ----------------------------------------------------------------------- Summary of changes: src/flash/nor/at91sam3.c | 2 +- src/flash/nor/at91sam4.c | 2 +- src/helper/command.c | 6 +++--- src/helper/log.c | 4 ++-- src/jtag/core.c | 4 ++-- src/jtag/drivers/arm-jtag-ew.c | 2 +- src/jtag/interface.c | 4 ++-- src/jtag/minidummy/minidummy.c | 2 +- src/jtag/zy1000/zy1000.c | 2 +- src/rtos/ChibiOS.c | 2 +- src/rtos/linux.c | 4 ++-- src/target/nds32_cmd.c | 2 +- src/target/riscv/riscv.c | 12 ++++++------ src/target/target.c | 4 ++-- 14 files changed, 26 insertions(+), 26 deletions(-) hooks/post-receive -- Main OpenOCD repository |
From: OpenOCD-Gerrit <ope...@us...> - 2020-05-09 13:40:01
|
This is an automated email from the git hooks/post-receive script. It was generated because a ref change was pushed to the repository containing the project "Main OpenOCD repository". The branch, master has been updated via 4f459660a9dab3877f6f27127e565dd2b49b4ec7 (commit) via e66bb9d3121eef35c312997aacb401847249a5cb (commit) via 9b29cb58acbd14ed831d68fce4d6e6a1728f8caf (commit) from 5df5e89cf3caf02dc6f49a5d3c8aa8b1349a1dbf (commit) Those revisions listed above that are new to this repository have not appeared on any other notification email; so we list those revisions in full, below. - Log ----------------------------------------------------------------- commit 4f459660a9dab3877f6f27127e565dd2b49b4ec7 Author: Antonio Borneo <bor...@gm...> Date: Mon May 6 01:03:52 2019 +0200 coding style: avoid unnecessary line continuations Line continuation, adding a backslash as last char of the line, is requested in multi-line macro definition, but is not necessary in the rest of C code. Remove it where present. Identified by checkpatch script from Linux kernel v5.1 using the command find src/ -type f -exec ./tools/scripts/checkpatch.pl \ -q --types LINE_CONTINUATIONS -f {} \; Change-Id: Id0c69e93456731717a7b290b16580e9f8ae741bc Signed-off-by: Antonio Borneo <bor...@gm...> Reviewed-on: http://openocd.zylin.com/5619 Reviewed-by: Andreas Fritiofson <and...@gm...> Tested-by: jenkins diff --git a/src/flash/nor/cfi.c b/src/flash/nor/cfi.c index 73884b786..50ab207c1 100644 --- a/src/flash/nor/cfi.c +++ b/src/flash/nor/cfi.c @@ -2895,7 +2895,7 @@ int cfi_probe(struct flash_bank *bank) } if (offset != (cfi_info->dev_size * bank->bus_width / bank->chip_width)) { LOG_WARNING( - "CFI size is 0x%" PRIx32 ", but total sector size is 0x%" PRIx32 "", \ + "CFI size is 0x%" PRIx32 ", but total sector size is 0x%" PRIx32 "", (cfi_info->dev_size * bank->bus_width / bank->chip_width), offset); } diff --git a/src/flash/nor/fespi.c b/src/flash/nor/fespi.c index 5d8f810ad..90242b1ad 100644 --- a/src/flash/nor/fespi.c +++ b/src/flash/nor/fespi.c @@ -182,7 +182,7 @@ static int fespi_read_reg(struct flash_bank *bank, uint32_t *value, target_addr_ } static int fespi_write_reg(struct flash_bank *bank, target_addr_t address, uint32_t value) -{ \ +{ struct target *target = bank->target; struct fespi_flash_bank *fespi_info = bank->driver_priv; diff --git a/src/flash/nor/kinetis_ke.c b/src/flash/nor/kinetis_ke.c index 27b6d3a83..cfc04928b 100644 --- a/src/flash/nor/kinetis_ke.c +++ b/src/flash/nor/kinetis_ke.c @@ -814,7 +814,7 @@ static int kinetis_ke_protect_check(struct flash_bank *bank) kinfo->protection_size = 0; } else { - LOG_WARNING("Flash protected. FPOPEN=%i FPLDIS=%i FPHDIS=%i FPLS=%i FPHS=%i", \ + LOG_WARNING("Flash protected. FPOPEN=%i FPLDIS=%i FPHDIS=%i FPLS=%i FPHS=%i", fpopen ? 1 : 0, fpldis ? 1 : 0, fphdis ? 1 : 0, fpls, fphs); /* Retrieve which region is protected and how much */ diff --git a/src/flash/nor/lpcspifi.c b/src/flash/nor/lpcspifi.c index 19d754b0f..04ac3bb4d 100644 --- a/src/flash/nor/lpcspifi.c +++ b/src/flash/nor/lpcspifi.c @@ -177,8 +177,8 @@ static int lpcspifi_set_hw_mode(struct flash_bank *bank) retval = target_alloc_working_area(target, sizeof(spifi_init_code) + SPIFI_INIT_STACK_SIZE, &spifi_init_algorithm); if (retval != ERROR_OK) { - LOG_ERROR("Insufficient working area to initialize SPIFI "\ - "module. You must allocate at least %zdB of working "\ + LOG_ERROR("Insufficient working area to initialize SPIFI " + "module. You must allocate at least %zdB of working " "area in order to use this driver.", sizeof(spifi_init_code) + SPIFI_INIT_STACK_SIZE ); @@ -452,7 +452,7 @@ static int lpcspifi_erase(struct flash_bank *bank, int first, int last) * it, use a bulk erase instead of going sector-by-sector. */ if (first == 0 && last == (bank->num_sectors - 1) && lpcspifi_info->dev->chip_erase_cmd != lpcspifi_info->dev->erase_cmd) { - LOG_DEBUG("Chip supports the bulk erase command."\ + LOG_DEBUG("Chip supports the bulk erase command." " Will use bulk erase instead of sector-by-sector erase."); retval = lpcspifi_bulk_erase(bank); @@ -525,7 +525,7 @@ static int lpcspifi_erase(struct flash_bank *bank, int first, int last) retval = target_alloc_working_area(target, sizeof(lpcspifi_flash_erase_code), &erase_algorithm); if (retval != ERROR_OK) { - LOG_ERROR("Insufficient working area. You must configure a working"\ + LOG_ERROR("Insufficient working area. You must configure a working" " area of at least %zdB in order to erase SPIFI flash.", sizeof(lpcspifi_flash_erase_code)); return retval; @@ -685,7 +685,7 @@ static int lpcspifi_write(struct flash_bank *bank, const uint8_t *buffer, if (target_alloc_working_area(target, sizeof(lpcspifi_flash_write_code), &write_algorithm) != ERROR_OK) { - LOG_ERROR("Insufficient working area. You must configure"\ + LOG_ERROR("Insufficient working area. You must configure" " a working area > %zdB in order to write to SPIFI flash.", sizeof(lpcspifi_flash_write_code)); return ERROR_TARGET_RESOURCE_NOT_AVAILABLE; @@ -707,15 +707,15 @@ static int lpcspifi_write(struct flash_bank *bank, const uint8_t *buffer, * space, free the algorithm */ target_free_working_area(target, write_algorithm); - LOG_ERROR("Insufficient working area. Please allocate at least"\ + LOG_ERROR("Insufficient working area. Please allocate at least" " %zdB of working area to enable flash writes.", sizeof(lpcspifi_flash_write_code) + 1 ); return ERROR_TARGET_RESOURCE_NOT_AVAILABLE; } else if (fifo_size < page_size) - LOG_WARNING("Working area size is limited; flash writes may be"\ - " slow. Increase working area size to at least %zdB"\ + LOG_WARNING("Working area size is limited; flash writes may be" + " slow. Increase working area size to at least %zdB" " to reduce write times.", (size_t)(sizeof(lpcspifi_flash_write_code) + page_size) ); diff --git a/src/flash/nor/mrvlqspi.c b/src/flash/nor/mrvlqspi.c index 803e84a91..7a06b3d09 100644 --- a/src/flash/nor/mrvlqspi.c +++ b/src/flash/nor/mrvlqspi.c @@ -563,7 +563,7 @@ static int mrvlqspi_flash_erase(struct flash_bank *bank, int first, int last) if (first == 0 && last == (bank->num_sectors - 1) && mrvlqspi_info->dev->chip_erase_cmd != mrvlqspi_info->dev->erase_cmd) { - LOG_DEBUG("Chip supports the bulk erase command."\ + LOG_DEBUG("Chip supports the bulk erase command." " Will use bulk erase instead of sector-by-sector erase."); retval = mrvlqspi_bulk_erase(bank); if (retval == ERROR_OK) { @@ -681,7 +681,7 @@ static int mrvlqspi_flash_write(struct flash_bank *bank, const uint8_t *buffer, if (target_alloc_working_area(target, sizeof(mrvlqspi_flash_write_code), &write_algorithm) != ERROR_OK) { - LOG_ERROR("Insufficient working area. You must configure"\ + LOG_ERROR("Insufficient working area. You must configure" " a working area > %zdB in order to write to SPIFI flash.", sizeof(mrvlqspi_flash_write_code)); return ERROR_TARGET_RESOURCE_NOT_AVAILABLE; @@ -703,15 +703,15 @@ static int mrvlqspi_flash_write(struct flash_bank *bank, const uint8_t *buffer, * space, free the algorithm */ target_free_working_area(target, write_algorithm); - LOG_ERROR("Insufficient working area. Please allocate at least"\ + LOG_ERROR("Insufficient working area. Please allocate at least" " %zdB of working area to enable flash writes.", sizeof(mrvlqspi_flash_write_code) + 1 ); return ERROR_TARGET_RESOURCE_NOT_AVAILABLE; } else if (fifo_size < page_size) - LOG_WARNING("Working area size is limited; flash writes may be"\ - " slow. Increase working area size to at least %zdB"\ + LOG_WARNING("Working area size is limited; flash writes may be" + " slow. Increase working area size to at least %zdB" " to reduce write times.", (size_t)(sizeof(mrvlqspi_flash_write_code) + page_size) ); diff --git a/src/flash/nor/tcl.c b/src/flash/nor/tcl.c index 00bfeb18e..fb2053b89 100644 --- a/src/flash/nor/tcl.c +++ b/src/flash/nor/tcl.c @@ -1028,7 +1028,7 @@ COMMAND_HANDLER(handle_flash_padded_value_command) COMMAND_PARSE_NUMBER(u8, CMD_ARGV[1], p->default_padded_value); - command_print(CMD, "Default padded value set to 0x%" PRIx8 " for flash bank %u", \ + command_print(CMD, "Default padded value set to 0x%" PRIx8 " for flash bank %u", p->default_padded_value, p->bank_number); return retval; diff --git a/src/jtag/drivers/arm-jtag-ew.c b/src/jtag/drivers/arm-jtag-ew.c index c81f8043b..d35e15128 100644 --- a/src/jtag/drivers/arm-jtag-ew.c +++ b/src/jtag/drivers/arm-jtag-ew.c @@ -107,7 +107,7 @@ static int armjtagew_execute_queue(void) switch (cmd->type) { case JTAG_RUNTEST: LOG_DEBUG_IO("runtest %i cycles, end in %i", - cmd->cmd.runtest->num_cycles, \ + cmd->cmd.runtest->num_cycles, cmd->cmd.runtest->end_state); armjtagew_end_state(cmd->cmd.runtest->end_state); @@ -122,8 +122,8 @@ static int armjtagew_execute_queue(void) break; case JTAG_PATHMOVE: - LOG_DEBUG_IO("pathmove: %i states, end in %i", \ - cmd->cmd.pathmove->num_states, \ + LOG_DEBUG_IO("pathmove: %i states, end in %i", + cmd->cmd.pathmove->num_states, cmd->cmd.pathmove->path[cmd->cmd.pathmove->num_states - 1]); armjtagew_path_move(cmd->cmd.pathmove->num_states, @@ -459,10 +459,10 @@ static int armjtagew_get_version_info(void) auxinfo[256] = '\0'; LOG_INFO( - "ARM-JTAG-EW firmware version %d.%d, hardware revision %c, SN=%s, Additional info: %s", \ + "ARM-JTAG-EW firmware version %d.%d, hardware revision %c, SN=%s, Additional info: %s", usb_in_buffer[1], - usb_in_buffer[0], \ - isgraph(usb_in_buffer[2]) ? usb_in_buffer[2] : 'X', \ + usb_in_buffer[0], + isgraph(usb_in_buffer[2]) ? usb_in_buffer[2] : 'X', sn, auxinfo); @@ -750,7 +750,7 @@ static int armjtagew_usb_write(struct armjtagew *armjtagew, int out_length) return -1; } - result = usb_bulk_write(armjtagew->usb_handle, ARMJTAGEW_EPT_BULK_OUT, \ + result = usb_bulk_write(armjtagew->usb_handle, ARMJTAGEW_EPT_BULK_OUT, (char *)usb_out_buffer, out_length, ARMJTAGEW_USB_TIMEOUT); LOG_DEBUG_IO("armjtagew_usb_write, out_length = %d, result = %d", out_length, result); @@ -764,7 +764,7 @@ static int armjtagew_usb_write(struct armjtagew *armjtagew, int out_length) /* Read data from USB into in_buffer. */ static int armjtagew_usb_read(struct armjtagew *armjtagew, int exp_in_length) { - int result = usb_bulk_read(armjtagew->usb_handle, ARMJTAGEW_EPT_BULK_IN, \ + int result = usb_bulk_read(armjtagew->usb_handle, ARMJTAGEW_EPT_BULK_IN, (char *)usb_in_buffer, exp_in_length, ARMJTAGEW_USB_TIMEOUT); LOG_DEBUG_IO("armjtagew_usb_read, result = %d", result); diff --git a/src/jtag/drivers/jlink.c b/src/jtag/drivers/jlink.c index 3dcadc813..80202ed29 100644 --- a/src/jtag/drivers/jlink.c +++ b/src/jtag/drivers/jlink.c @@ -1525,7 +1525,7 @@ COMMAND_HANDLER(jlink_handle_config_mac_address_command) } else if (CMD_ARGC == 1) { str = CMD_ARGV[0]; - if ((strlen(str) != 17) || (str[2] != ':' || str[5] != ':' || \ + if ((strlen(str) != 17) || (str[2] != ':' || str[5] != ':' || str[8] != ':' || str[11] != ':' || str[14] != ':')) { command_print(CMD, "Invalid MAC address format."); return ERROR_COMMAND_SYNTAX_ERROR; diff --git a/src/jtag/drivers/opendous.c b/src/jtag/drivers/opendous.c index 6812ef649..bb223f417 100644 --- a/src/jtag/drivers/opendous.c +++ b/src/jtag/drivers/opendous.c @@ -259,7 +259,7 @@ static int opendous_execute_queue(void) while (cmd != NULL) { switch (cmd->type) { case JTAG_RUNTEST: - LOG_DEBUG_IO("runtest %i cycles, end in %i", cmd->cmd.runtest->num_cycles, \ + LOG_DEBUG_IO("runtest %i cycles, end in %i", cmd->cmd.runtest->num_cycles, cmd->cmd.runtest->end_state); if (cmd->cmd.runtest->end_state != -1) @@ -276,8 +276,8 @@ static int opendous_execute_queue(void) break; case JTAG_PATHMOVE: - LOG_DEBUG_IO("pathmove: %i states, end in %i", \ - cmd->cmd.pathmove->num_states, \ + LOG_DEBUG_IO("pathmove: %i states, end in %i", + cmd->cmd.pathmove->num_states, cmd->cmd.pathmove->path[cmd->cmd.pathmove->num_states - 1]); opendous_path_move(cmd->cmd.pathmove->num_states, cmd->cmd.pathmove->path); @@ -770,7 +770,7 @@ int opendous_usb_write(struct opendous_jtag *opendous_jtag, int out_length) LIBUSB_REQUEST_TYPE_VENDOR | LIBUSB_RECIPIENT_DEVICE | LIBUSB_ENDPOINT_OUT, FUNC_WRITE_DATA, 0, 0, (char *) usb_out_buffer, out_length, OPENDOUS_USB_TIMEOUT); } else { - jtag_libusb_bulk_write(opendous_jtag->usb_handle, OPENDOUS_WRITE_ENDPOINT, \ + jtag_libusb_bulk_write(opendous_jtag->usb_handle, OPENDOUS_WRITE_ENDPOINT, (char *)usb_out_buffer, out_length, OPENDOUS_USB_TIMEOUT, &result); } #ifdef _DEBUG_USB_COMMS_ diff --git a/src/jtag/drivers/stlink_usb.c b/src/jtag/drivers/stlink_usb.c index 14bac2a2f..03d3da7bb 100644 --- a/src/jtag/drivers/stlink_usb.c +++ b/src/jtag/drivers/stlink_usb.c @@ -2319,7 +2319,7 @@ static int stlink_usb_read_mem(void *handle, uint32_t addr, uint32_t size, while (count) { - bytes_remaining = (size != 1) ? \ + bytes_remaining = (size != 1) ? stlink_max_block_size(h->max_mem_packet, addr) : stlink_usb_block(h); if (count < bytes_remaining) @@ -2404,7 +2404,7 @@ static int stlink_usb_write_mem(void *handle, uint32_t addr, uint32_t size, while (count) { - bytes_remaining = (size != 1) ? \ + bytes_remaining = (size != 1) ? stlink_max_block_size(h->max_mem_packet, addr) : stlink_usb_block(h); if (count < bytes_remaining) @@ -2528,7 +2528,7 @@ static int stlink_match_speed_map(const struct speed_map *map, unsigned int map_ match = false; if (!match && query) { - LOG_INFO("Unable to match requested speed %d kHz, using %d kHz", \ + LOG_INFO("Unable to match requested speed %d kHz, using %d kHz", khz, map[speed_index].speed); } diff --git a/src/jtag/drivers/usb_blaster/ublast2_access_libusb.c b/src/jtag/drivers/usb_blaster/ublast2_access_libusb.c index b406c0321..e2556cec0 100644 --- a/src/jtag/drivers/usb_blaster/ublast2_access_libusb.c +++ b/src/jtag/drivers/usb_blaster/ublast2_access_libusb.c @@ -45,7 +45,7 @@ static int ublast2_libusb_read(struct ublast_lowlevel *low, uint8_t *buf, int ret, tmp = 0; ret = jtag_libusb_bulk_read(low->libusb_dev, - USBBLASTER_EPIN | \ + USBBLASTER_EPIN | LIBUSB_ENDPOINT_IN, (char *)buf, size, @@ -61,7 +61,7 @@ static int ublast2_libusb_write(struct ublast_lowlevel *low, uint8_t *buf, int ret, tmp = 0; ret = jtag_libusb_bulk_write(low->libusb_dev, - USBBLASTER_EPOUT | \ + USBBLASTER_EPOUT | LIBUSB_ENDPOINT_OUT, (char *)buf, size, @@ -106,7 +106,7 @@ static int ublast2_write_firmware_section(struct libusb_device_handle *libusb_de chunk_size = bytes_remaining; jtag_libusb_control_transfer(libusb_dev, - LIBUSB_REQUEST_TYPE_VENDOR | \ + LIBUSB_REQUEST_TYPE_VENDOR | LIBUSB_ENDPOINT_OUT, USBBLASTER_CTRL_LOAD_FIRM, addr, @@ -152,7 +152,7 @@ static int load_usb_blaster_firmware(struct libusb_device_handle *libusb_dev, char value = CPU_RESET; jtag_libusb_control_transfer(libusb_dev, - LIBUSB_REQUEST_TYPE_VENDOR | \ + LIBUSB_REQUEST_TYPE_VENDOR | LIBUSB_ENDPOINT_OUT, USBBLASTER_CTRL_LOAD_FIRM, EZUSB_CPUCS, @@ -173,7 +173,7 @@ static int load_usb_blaster_firmware(struct libusb_device_handle *libusb_dev, value = !CPU_RESET; jtag_libusb_control_transfer(libusb_dev, - LIBUSB_REQUEST_TYPE_VENDOR | \ + LIBUSB_REQUEST_TYPE_VENDOR | LIBUSB_ENDPOINT_OUT, USBBLASTER_CTRL_LOAD_FIRM, EZUSB_CPUCS, @@ -230,7 +230,7 @@ static int ublast2_libusb_init(struct ublast_lowlevel *low) char buffer[5]; jtag_libusb_control_transfer(low->libusb_dev, - LIBUSB_REQUEST_TYPE_VENDOR | \ + LIBUSB_REQUEST_TYPE_VENDOR | LIBUSB_ENDPOINT_IN, USBBLASTER_CTRL_READ_REV, 0, diff --git a/src/jtag/drivers/usb_blaster/usb_blaster.c b/src/jtag/drivers/usb_blaster/usb_blaster.c index fcb594f30..d30483b63 100644 --- a/src/jtag/drivers/usb_blaster/usb_blaster.c +++ b/src/jtag/drivers/usb_blaster/usb_blaster.c @@ -1042,8 +1042,8 @@ static const struct command_registration ublast_command_handlers[] = { .name = "usb_blaster_vid_pid", .handler = ublast_handle_vid_pid_command, .mode = COMMAND_CONFIG, - .help = "the vendor ID and product ID of the USB-Blaster and " \ - "vendor ID and product ID of the uninitialized device " \ + .help = "the vendor ID and product ID of the USB-Blaster and " + "vendor ID and product ID of the uninitialized device " "for USB-Blaster II", .usage = "vid pid vid_uninit pid_uninit", }, diff --git a/src/jtag/drivers/usbprog.c b/src/jtag/drivers/usbprog.c index 6517ce4ad..7b27eaff2 100644 --- a/src/jtag/drivers/usbprog.c +++ b/src/jtag/drivers/usbprog.c @@ -381,7 +381,7 @@ static void usbprog_jtag_close(struct usbprog_jtag *usbprog_jtag) static unsigned char usbprog_jtag_message(struct usbprog_jtag *usbprog_jtag, char *msg, int msglen) { int res = usb_bulk_write(usbprog_jtag->usb_handle, 3, msg, msglen, 100); - if ((msg[0] == 2) || (msg[0] == 1) || (msg[0] == 4) || (msg[0] == 0) || \ + if ((msg[0] == 2) || (msg[0] == 1) || (msg[0] == 4) || (msg[0] == 0) || (msg[0] == 6) || (msg[0] == 0x0A) || (msg[0] == 9)) return 1; if (res == msglen) { diff --git a/src/jtag/drivers/versaloon/versaloon_internal.h b/src/jtag/drivers/versaloon/versaloon_internal.h index 497b6b9ce..8372970b1 100644 --- a/src/jtag/drivers/versaloon/versaloon_internal.h +++ b/src/jtag/drivers/versaloon/versaloon_internal.h @@ -91,7 +91,7 @@ struct versaloon_pending_t { void *extra_data; versaloon_callback_t callback; }; -extern struct versaloon_pending_t \ +extern struct versaloon_pending_t versaloon_pending[VERSALOON_MAX_PENDING_NUMBER]; extern uint16_t versaloon_pending_idx; void versaloon_set_pending_id(uint32_t id); diff --git a/src/jtag/drivers/vsllink.c b/src/jtag/drivers/vsllink.c index eb4370233..5fb9bcdcc 100644 --- a/src/jtag/drivers/vsllink.c +++ b/src/jtag/drivers/vsllink.c @@ -292,7 +292,7 @@ static int vsllink_interface_init(void) libusb_init(&vsllink_handle->libusb_ctx); if (ERROR_OK != vsllink_usb_open(vsllink_handle)) { - LOG_ERROR("Can't find USB JTAG Interface!" \ + LOG_ERROR("Can't find USB JTAG Interface!" "Please check connection and permissions."); return ERROR_JTAG_INIT_FAILED; } diff --git a/src/jtag/minidummy/minidummy.c b/src/jtag/minidummy/minidummy.c index 1fce317f0..7d5e6a98a 100644 --- a/src/jtag/minidummy/minidummy.c +++ b/src/jtag/minidummy/minidummy.c @@ -170,7 +170,7 @@ void embeddedice_write_dcc(struct jtag_tap *tap, int reg_addr, const uint8_t *bu int arm11_run_instr_data_to_core_noack_inner(struct jtag_tap *tap, uint32_t opcode, uint32_t *data, size_t count) { - int arm11_run_instr_data_to_core_noack_inner_default(struct jtag_tap *tap, \ + int arm11_run_instr_data_to_core_noack_inner_default(struct jtag_tap *tap, uint32_t opcode, uint32_t *data, size_t count); return arm11_run_instr_data_to_core_noack_inner_default(tap, opcode, data, count); } diff --git a/src/rtos/linux.c b/src/rtos/linux.c index 9e59c41a5..0f18d171c 100644 --- a/src/rtos/linux.c +++ b/src/rtos/linux.c @@ -1379,8 +1379,8 @@ static int linux_thread_packet(struct connection *connection, char const *packet target->rtos-> current_threadid) && (target->rtos->current_threadid != -1)) - LOG_WARNING("WARNING! current GDB thread do not match" \ - "current thread running." \ + LOG_WARNING("WARNING! current GDB thread do not match" + "current thread running." "Switch thread in GDB to threadid %d", (int)ct->threadid); diff --git a/src/server/gdb_server.c b/src/server/gdb_server.c index f9fe4c293..6a9e261cd 100644 --- a/src/server/gdb_server.c +++ b/src/server/gdb_server.c @@ -1004,7 +1004,7 @@ static int gdb_new_connection(struct connection *connection) continue; retval = get_flash_bank_by_num(i, &p); if (retval != ERROR_OK) { - LOG_ERROR("Connect failed. Consider setting up a gdb-attach event for the target " \ + LOG_ERROR("Connect failed. Consider setting up a gdb-attach event for the target " "to prepare target for GDB connect, or use 'gdb_memory_map disable'."); return retval; } @@ -2857,7 +2857,7 @@ static bool gdb_handle_vcont_packet(struct connection *connection, const char *p if (gdb_connection->sync) { gdb_connection->sync = false; if (ct->state == TARGET_HALTED) { - LOG_DEBUG("stepi ignored. GDB will now fetch the register state " \ + LOG_DEBUG("stepi ignored. GDB will now fetch the register state " "from the target."); gdb_sig_halted(connection); log_remove_callback(gdb_log_callback, connection); @@ -3330,7 +3330,7 @@ static int gdb_input_inner(struct connection *connection) "Waiting for target to halt."); already_running = true; } else if (target->state != TARGET_HALTED) { - LOG_WARNING("The target is not in the halted nor running stated, " \ + LOG_WARNING("The target is not in the halted nor running stated, " "stepi/continue ignored."); nostep = true; } else if ((packet[0] == 's') && gdb_con->sync) { @@ -3339,7 +3339,7 @@ static int gdb_input_inner(struct connection *connection) * make only the single stepping have the sync feature... */ nostep = true; - LOG_DEBUG("stepi ignored. GDB will now fetch the register state " \ + LOG_DEBUG("stepi ignored. GDB will now fetch the register state " "from the target."); } gdb_con->sync = false; diff --git a/src/svf/svf.c b/src/svf/svf.c index 54fc7d139..fd27417e0 100644 --- a/src/svf/svf.c +++ b/src/svf/svf.c @@ -1540,8 +1540,8 @@ XXR_common: if (debug_level >= LOG_LVL_DEBUG) { /* for convenient debugging, execute tap if possible */ - if ((svf_buffer_index > 0) && \ - (((command != STATE) && (command != RUNTEST)) || \ + if ((svf_buffer_index > 0) && + (((command != STATE) && (command != RUNTEST)) || ((command == STATE) && (num_of_argu == 2)))) { if (ERROR_OK != svf_execute_tap()) return ERROR_FAIL; @@ -1555,8 +1555,8 @@ XXR_common: /* for fast executing, execute tap if necessary */ /* half of the buffer is for the next command */ if (((svf_buffer_index >= SVF_MAX_BUFFER_SIZE_TO_COMMIT) || - (svf_check_tdo_para_index >= SVF_CHECK_TDO_PARA_SIZE / 2)) && \ - (((command != STATE) && (command != RUNTEST)) || \ + (svf_check_tdo_para_index >= SVF_CHECK_TDO_PARA_SIZE / 2)) && + (((command != STATE) && (command != RUNTEST)) || ((command == STATE) && (num_of_argu == 2)))) return svf_execute_tap(); } diff --git a/src/target/arc_cmd.c b/src/target/arc_cmd.c index a8c3bb43a..fad8ca947 100644 --- a/src/target/arc_cmd.c +++ b/src/target/arc_cmd.c @@ -383,7 +383,7 @@ static int jim_arc_get_core_reg(Jim_Interp *interp, int argc, Jim_Obj * const *a /* Register number */ JIM_CHECK_RETVAL(arc_cmd_jim_get_uint32(&goi, ®num)); if (regnum > CORE_REG_MAX_NUMBER || regnum == CORE_R61_NUM || regnum == CORE_R62_NUM) { - Jim_SetResultFormatted(goi.interp, "Core register number %i " \ + Jim_SetResultFormatted(goi.interp, "Core register number %i " "is invalid. Must less then 64 and not 61 and 62.", regnum); return JIM_ERR; } @@ -426,7 +426,7 @@ static int jim_arc_set_core_reg(Jim_Interp *interp, int argc, Jim_Obj * const *a /* Register number */ JIM_CHECK_RETVAL(arc_cmd_jim_get_uint32(&goi, ®num)); if (regnum > CORE_REG_MAX_NUMBER || regnum == CORE_R61_NUM || regnum == CORE_R62_NUM) { - Jim_SetResultFormatted(goi.interp, "Core register number %i " \ + Jim_SetResultFormatted(goi.interp, "Core register number %i " "is invalid. Must less then 64 and not 61 and 62.", regnum); return JIM_ERR; } @@ -447,9 +447,9 @@ static const struct command_registration arc_jtag_command_group[] = { .name = "get-aux-reg", .jim_handler = jim_arc_get_aux_reg, .mode = COMMAND_EXEC, - .help = "Get AUX register by number. This command does a " \ - "raw JTAG request that bypasses OpenOCD register cache "\ - "and thus is unsafe and can have unexpected consequences. "\ + .help = "Get AUX register by number. This command does a " + "raw JTAG request that bypasses OpenOCD register cache " + "and thus is unsafe and can have unexpected consequences. " "Use at your own risk.", .usage = "arc jtag get-aux-reg <regnum>" }, @@ -457,9 +457,9 @@ static const struct command_registration arc_jtag_command_group[] = { .name = "set-aux-reg", .jim_handler = jim_arc_set_aux_reg, .mode = COMMAND_EXEC, - .help = "Set AUX register by number. This command does a " \ - "raw JTAG request that bypasses OpenOCD register cache "\ - "and thus is unsafe and can have unexpected consequences. "\ + .help = "Set AUX register by number. This command does a " + "raw JTAG request that bypasses OpenOCD register cache " + "and thus is unsafe and can have unexpected consequences. " "Use at your own risk.", .usage = "arc jtag set-aux-reg <regnum> <value>" }, @@ -467,9 +467,9 @@ static const struct command_registration arc_jtag_command_group[] = { .name = "get-core-reg", .jim_handler = jim_arc_get_core_reg, .mode = COMMAND_EXEC, - .help = "Get/Set core register by number. This command does a " \ - "raw JTAG request that bypasses OpenOCD register cache "\ - "and thus is unsafe and can have unexpected consequences. "\ + .help = "Get/Set core register by number. This command does a " + "raw JTAG request that bypasses OpenOCD register cache " + "and thus is unsafe and can have unexpected consequences. " "Use at your own risk.", .usage = "arc jtag get-core-reg <regnum> [<value>]" }, @@ -477,9 +477,9 @@ static const struct command_registration arc_jtag_command_group[] = { .name = "set-core-reg", .jim_handler = jim_arc_set_core_reg, .mode = COMMAND_EXEC, - .help = "Get/Set core register by number. This command does a " \ - "raw JTAG request that bypasses OpenOCD register cache "\ - "and thus is unsafe and can have unexpected consequences. "\ + .help = "Get/Set core register by number. This command does a " + "raw JTAG request that bypasses OpenOCD register cache " + "and thus is unsafe and can have unexpected consequences. " "Use at your own risk.", .usage = "arc jtag set-core-reg <regnum> [<value>]" }, diff --git a/src/target/nds32_cmd.c b/src/target/nds32_cmd.c index 88d8b4512..7bf7e60c7 100644 --- a/src/target/nds32_cmd.c +++ b/src/target/nds32_cmd.c @@ -1007,7 +1007,7 @@ static const struct command_registration nds32_exec_command_handlers[] = { .handler = handle_nds32_global_stop_command, .mode = COMMAND_ANY, .usage = "['on'|'off']", - .help = "turn on/off global stop. After turning on, every load/store" \ + .help = "turn on/off global stop. After turning on, every load/store" "instructions will be stopped to check memory access.", }, { @@ -1015,7 +1015,7 @@ static const struct command_registration nds32_exec_command_handlers[] = { .handler = handle_nds32_soft_reset_halt_command, .mode = COMMAND_ANY, .usage = "['on'|'off']", - .help = "as issuing rest-halt, to use soft-reset-halt or not." \ + .help = "as issuing rest-halt, to use soft-reset-halt or not." "the feature is for backward-compatible.", }, { diff --git a/src/target/nds32_disassembler.c b/src/target/nds32_disassembler.c index f27aba2cc..0cfd197d2 100644 --- a/src/target/nds32_disassembler.c +++ b/src/target/nds32_disassembler.c @@ -493,7 +493,7 @@ static int nds32_parse_mem(struct nds32 *nds32, uint32_t opcode, uint32_t addres switch (sub_opcode & 0x7) { case 0: /* LB */ nds32_parse_type_3(opcode, &(instruction->info.rt), - &(instruction->info.ra), \ + &(instruction->info.ra), &(instruction->info.rb), &(instruction->info.imm)); instruction->type = NDS32_INSN_LOAD_STORE; nds32_get_mapped_reg(nds32, instruction->info.ra, &val_ra); diff --git a/src/target/riscv/riscv-013.c b/src/target/riscv/riscv-013.c index e30294114..4a323e4ee 100644 --- a/src/target/riscv/riscv-013.c +++ b/src/target/riscv/riscv-013.c @@ -3712,13 +3712,13 @@ int riscv013_test_compliance(struct target *target) But at any rate, this is not legal and should cause an error. */ COMPLIANCE_WRITE(target, DMI_COMMAND, 0xAAAAAAAA); COMPLIANCE_READ(target, &testvar_read, DMI_ABSTRACTCS); - COMPLIANCE_TEST(get_field(testvar_read, DMI_ABSTRACTCS_CMDERR) == CMDERR_NOT_SUPPORTED, \ + COMPLIANCE_TEST(get_field(testvar_read, DMI_ABSTRACTCS_CMDERR) == CMDERR_NOT_SUPPORTED, "Illegal COMMAND should result in UNSUPPORTED"); COMPLIANCE_WRITE(target, DMI_ABSTRACTCS, DMI_ABSTRACTCS_CMDERR); COMPLIANCE_WRITE(target, DMI_COMMAND, 0x55555555); COMPLIANCE_READ(target, &testvar_read, DMI_ABSTRACTCS); - COMPLIANCE_TEST(get_field(testvar_read, DMI_ABSTRACTCS_CMDERR) == CMDERR_NOT_SUPPORTED, \ + COMPLIANCE_TEST(get_field(testvar_read, DMI_ABSTRACTCS_CMDERR) == CMDERR_NOT_SUPPORTED, "Illegal COMMAND should result in UNSUPPORTED"); COMPLIANCE_WRITE(target, DMI_ABSTRACTCS, DMI_ABSTRACTCS_CMDERR); commit e66bb9d3121eef35c312997aacb401847249a5cb Author: Antonio Borneo <bor...@gm...> Date: Mon May 6 00:35:52 2019 +0200 coding style: add parenthesis around the argument of sizeof The script checkpatch available in new Linux kernel offers an experimental feature for automatically fix the code in place. While still experimental, the feature works quite well for simple fixes, like parenthesis. This patch has been created automatically with the script under review for inclusion in OpenOCD, using the command: find src/ -type f -exec ./tools/scripts/checkpatch.pl \ -q --types SIZEOF_PARENTHESIS --fix-inplace -f {} \; Change-Id: I8adb325bdb0e13211f8bae8b4770ec1979c176bf Signed-off-by: Antonio Borneo <bor...@gm...> Reviewed-on: http://openocd.zylin.com/5618 Reviewed-by: Andreas Fritiofson <and...@gm...> Tested-by: jenkins diff --git a/src/flash/nand/davinci.c b/src/flash/nand/davinci.c index 17e6f680d..167b40150 100644 --- a/src/flash/nand/davinci.c +++ b/src/flash/nand/davinci.c @@ -730,7 +730,7 @@ NAND_DEVICE_COMMAND_HANDLER(davinci_nand_device_command) goto fail; } - info = calloc(1, sizeof *info); + info = calloc(1, sizeof(*info)); if (info == NULL) goto fail; diff --git a/src/jtag/aice/aice_transport.c b/src/jtag/aice/aice_transport.c index d0f7a49c0..ea710ad25 100644 --- a/src/jtag/aice/aice_transport.c +++ b/src/jtag/aice/aice_transport.c @@ -174,7 +174,7 @@ COMMAND_HANDLER(handle_scan_chain_command) while (tap) { uint32_t expected, expected_mask, ii; - snprintf(expected_id, sizeof expected_id, "0x%08x", + snprintf(expected_id, sizeof(expected_id), "0x%08x", (unsigned)((tap->expected_ids_cnt > 0) ? tap->expected_ids[0] : 0)); @@ -196,7 +196,7 @@ COMMAND_HANDLER(handle_scan_chain_command) (unsigned int)(expected_mask)); for (ii = 1; ii < tap->expected_ids_cnt; ii++) { - snprintf(expected_id, sizeof expected_id, "0x%08x", + snprintf(expected_id, sizeof(expected_id), "0x%08x", (unsigned) tap->expected_ids[ii]); if (tap->ignore_version) expected_id[2] = '*'; diff --git a/src/jtag/core.c b/src/jtag/core.c index 2d0c84205..f12ab5924 100644 --- a/src/jtag/core.c +++ b/src/jtag/core.c @@ -1269,7 +1269,7 @@ static int jtag_examine_chain(void) * REVISIT create a jtag_alloc(chip, tap) routine, and * share it with jim_newtap_cmd(). */ - tap = calloc(1, sizeof *tap); + tap = calloc(1, sizeof(*tap)); if (!tap) { retval = ERROR_FAIL; goto out; diff --git a/src/jtag/drivers/amt_jtagaccel.c b/src/jtag/drivers/amt_jtagaccel.c index db106bb05..f5918a055 100644 --- a/src/jtag/drivers/amt_jtagaccel.c +++ b/src/jtag/drivers/amt_jtagaccel.c @@ -393,7 +393,7 @@ int amt_jtagaccel_get_giveio_access(void) HANDLE h; OSVERSIONINFO version; - version.dwOSVersionInfoSize = sizeof version; + version.dwOSVersionInfoSize = sizeof(version); if (!GetVersionEx(&version)) { errno = EINVAL; return -1; diff --git a/src/jtag/drivers/gw16012.c b/src/jtag/drivers/gw16012.c index 2e8dad896..d1699ef01 100644 --- a/src/jtag/drivers/gw16012.c +++ b/src/jtag/drivers/gw16012.c @@ -350,7 +350,7 @@ static int gw16012_get_giveio_access(void) HANDLE h; OSVERSIONINFO version; - version.dwOSVersionInfoSize = sizeof version; + version.dwOSVersionInfoSize = sizeof(version); if (!GetVersionEx(&version)) { errno = EINVAL; return -1; diff --git a/src/jtag/drivers/kitprog.c b/src/jtag/drivers/kitprog.c index 28ed7ac61..efb8da2cd 100644 --- a/src/jtag/drivers/kitprog.c +++ b/src/jtag/drivers/kitprog.c @@ -358,7 +358,7 @@ static int kitprog_get_version(void) unsigned char command[3] = {HID_TYPE_START | HID_TYPE_WRITE, 0x00, HID_COMMAND_VERSION}; unsigned char data[64]; - ret = kitprog_hid_command(command, sizeof command, data, sizeof data); + ret = kitprog_hid_command(command, sizeof(command), data, sizeof(data)); if (ret != ERROR_OK) return ret; @@ -376,7 +376,7 @@ static int kitprog_get_millivolts(void) unsigned char command[3] = {HID_TYPE_START | HID_TYPE_READ, 0x00, HID_COMMAND_POWER}; unsigned char data[64]; - ret = kitprog_hid_command(command, sizeof command, data, sizeof data); + ret = kitprog_hid_command(command, sizeof(command), data, sizeof(data)); if (ret != ERROR_OK) return ret; @@ -603,7 +603,7 @@ static int kitprog_generic_acquire(void) * will take the Cortex-M3 out of reset and enable debugging. */ for (int i = 0; i < 2; i++) { - for (uint8_t j = 0; j < sizeof devices && acquire_count == i; j++) { + for (uint8_t j = 0; j < sizeof(devices) && acquire_count == i; j++) { retval = kitprog_acquire_psoc(devices[j], ACQUIRE_MODE_RESET, 3); if (retval != ERROR_OK) { LOG_DEBUG("Aquisition function failed for device 0x%02x.", devices[j]); diff --git a/src/jtag/drivers/parport.c b/src/jtag/drivers/parport.c index 6d15203ae..b3abd1205 100644 --- a/src/jtag/drivers/parport.c +++ b/src/jtag/drivers/parport.c @@ -237,7 +237,7 @@ static int parport_get_giveio_access(void) HANDLE h; OSVERSIONINFO version; - version.dwOSVersionInfoSize = sizeof version; + version.dwOSVersionInfoSize = sizeof(version); if (!GetVersionEx(&version)) { errno = EINVAL; return -1; diff --git a/src/jtag/tcl.c b/src/jtag/tcl.c index 734b9c1cb..f52cbd606 100644 --- a/src/jtag/tcl.c +++ b/src/jtag/tcl.c @@ -965,7 +965,7 @@ COMMAND_HANDLER(handle_scan_chain_command) while (tap) { uint32_t expected, expected_mask, ii; - snprintf(expected_id, sizeof expected_id, "0x%08x", + snprintf(expected_id, sizeof(expected_id), "0x%08x", (unsigned)((tap->expected_ids_cnt > 0) ? tap->expected_ids[0] : 0)); @@ -987,7 +987,7 @@ COMMAND_HANDLER(handle_scan_chain_command) (unsigned int)(expected_mask)); for (ii = 1; ii < tap->expected_ids_cnt; ii++) { - snprintf(expected_id, sizeof expected_id, "0x%08x", + snprintf(expected_id, sizeof(expected_id), "0x%08x", (unsigned) tap->expected_ids[ii]); if (tap->ignore_version) expected_id[2] = '*'; diff --git a/src/target/arm11.c b/src/target/arm11.c index 51f2a337a..10a1d6de5 100644 --- a/src/target/arm11.c +++ b/src/target/arm11.c @@ -1105,7 +1105,7 @@ static int arm11_target_create(struct target *target, Jim_Interp *interp) return ERROR_COMMAND_SYNTAX_ERROR; } - arm11 = calloc(1, sizeof *arm11); + arm11 = calloc(1, sizeof(*arm11)); if (!arm11) return ERROR_FAIL; diff --git a/src/target/arm11_dbgtap.c b/src/target/arm11_dbgtap.c index 2232b3ef6..a758db58f 100644 --- a/src/target/arm11_dbgtap.c +++ b/src/target/arm11_dbgtap.c @@ -1183,7 +1183,7 @@ int arm11_dpm_init(struct arm11_common *arm11, uint32_t didr) /* alloc enough to enable all breakpoints and watchpoints at once */ arm11->bpwp_actions = calloc(2 * (dpm->nbp + dpm->nwp), - sizeof *arm11->bpwp_actions); + sizeof(*arm11->bpwp_actions)); if (!arm11->bpwp_actions) return ERROR_FAIL; diff --git a/src/target/arm_disassembler.c b/src/target/arm_disassembler.c index 04c392296..55aaddd0a 100644 --- a/src/target/arm_disassembler.c +++ b/src/target/arm_disassembler.c @@ -2672,7 +2672,7 @@ static int evaluate_load_store_multiple_thumb(uint16_t opcode, instruction->type = ARM_STM; mnemonic = "STM"; } - snprintf(ptr_name, sizeof ptr_name, "r%i%s, ", Rn, wback); + snprintf(ptr_name, sizeof(ptr_name), "r%i%s, ", Rn, wback); } else {/* push/pop */ Rn = 13;/* SP */ if (L) { diff --git a/src/target/arm_dpm.c b/src/target/arm_dpm.c index a01339c1f..495d63ec2 100644 --- a/src/target/arm_dpm.c +++ b/src/target/arm_dpm.c @@ -1096,8 +1096,8 @@ int arm_dpm_setup(struct arm_dpm *dpm) dpm->nbp = 1 + ((dpm->didr >> 24) & 0xf); dpm->nwp = 1 + ((dpm->didr >> 28) & 0xf); - dpm->dbp = calloc(dpm->nbp, sizeof *dpm->dbp); - dpm->dwp = calloc(dpm->nwp, sizeof *dpm->dwp); + dpm->dbp = calloc(dpm->nbp, sizeof(*dpm->dbp)); + dpm->dwp = calloc(dpm->nwp, sizeof(*dpm->dwp)); if (!dpm->dbp || !dpm->dwp) { free(dpm->dbp); diff --git a/src/target/armv8_dpm.c b/src/target/armv8_dpm.c index 5be52726c..a3edb7f47 100644 --- a/src/target/armv8_dpm.c +++ b/src/target/armv8_dpm.c @@ -1471,10 +1471,10 @@ int armv8_dpm_setup(struct arm_dpm *dpm) /* FIXME add vector catch support */ dpm->nbp = 1 + ((dpm->didr >> 12) & 0xf); - dpm->dbp = calloc(dpm->nbp, sizeof *dpm->dbp); + dpm->dbp = calloc(dpm->nbp, sizeof(*dpm->dbp)); dpm->nwp = 1 + ((dpm->didr >> 20) & 0xf); - dpm->dwp = calloc(dpm->nwp, sizeof *dpm->dwp); + dpm->dwp = calloc(dpm->nwp, sizeof(*dpm->dwp)); if (!dpm->dbp || !dpm->dwp) { free(dpm->dbp); diff --git a/src/target/cortex_m.c b/src/target/cortex_m.c index af245dfc0..27febd3d7 100644 --- a/src/target/cortex_m.c +++ b/src/target/cortex_m.c @@ -1980,7 +1980,7 @@ static void cortex_m_dwt_addreg(struct target *t, struct reg *r, const struct dw { struct dwt_reg_state *state; - state = calloc(1, sizeof *state); + state = calloc(1, sizeof(*state)); if (!state) return; state->addr = d->addr; @@ -2021,7 +2021,7 @@ fail0: return; } - cache = calloc(1, sizeof *cache); + cache = calloc(1, sizeof(*cache)); if (!cache) { fail1: free(cm->dwt_comparator_list); @@ -2029,7 +2029,7 @@ fail1: } cache->name = "Cortex-M DWT registers"; cache->num_regs = 2 + cm->dwt_num_comp * 3; - cache->reg_list = calloc(cache->num_regs, sizeof *cache->reg_list); + cache->reg_list = calloc(cache->num_regs, sizeof(*cache->reg_list)); if (!cache->reg_list) { free(cache); goto fail1; diff --git a/src/target/xscale.c b/src/target/xscale.c index f879a9cc9..edab4f9fc 100644 --- a/src/target/xscale.c +++ b/src/target/xscale.c @@ -156,7 +156,7 @@ static int xscale_jtag_set_instr(struct jtag_tap *tap, uint32_t new_instr, tap_s struct scan_field field; uint8_t scratch[4] = { 0 }; - memset(&field, 0, sizeof field); + memset(&field, 0, sizeof(field)); field.num_bits = tap->ir_length; field.out_value = scratch; buf_set_u32(scratch, 0, field.num_bits, new_instr); @@ -186,7 +186,7 @@ static int xscale_read_dcsr(struct target *target) buf_set_u32(&field0, 1, 1, xscale->hold_rst); buf_set_u32(&field0, 2, 1, xscale->external_debug_break); - memset(&fields, 0, sizeof fields); + memset(&fields, 0, sizeof(fields)); fields[0].num_bits = 3; fields[0].out_value = &field0; @@ -259,7 +259,7 @@ static int xscale_receive(struct target *target, uint32_t *buffer, int num_words path[1] = TAP_DRCAPTURE; path[2] = TAP_DRSHIFT; - memset(&fields, 0, sizeof fields); + memset(&fields, 0, sizeof(fields)); fields[0].num_bits = 3; uint8_t tmp; @@ -367,7 +367,7 @@ static int xscale_read_tx(struct target *target, int consume) noconsume_path[4] = TAP_DREXIT2; noconsume_path[5] = TAP_DRSHIFT; - memset(&fields, 0, sizeof fields); + memset(&fields, 0, sizeof(fields)); fields[0].num_bits = 3; fields[0].in_value = &field0_in; @@ -442,7 +442,7 @@ static int xscale_write_rx(struct target *target) XSCALE_DBGRX << xscale->xscale_variant, TAP_IDLE); - memset(&fields, 0, sizeof fields); + memset(&fields, 0, sizeof(fields)); fields[0].num_bits = 3; fields[0].out_value = &field0_out; @@ -598,7 +598,7 @@ static int xscale_write_dcsr(struct target *target, int hold_rst, int ext_dbg_br buf_set_u32(&field0, 1, 1, xscale->hold_rst); buf_set_u32(&field0, 2, 1, xscale->external_debug_break); - memset(&fields, 0, sizeof fields); + memset(&fields, 0, sizeof(fields)); fields[0].num_bits = 3; fields[0].out_value = &field0; @@ -666,7 +666,7 @@ static int xscale_load_ic(struct target *target, uint32_t va, uint32_t buffer[8] /* virtual address of desired cache line */ buf_set_u32(packet, 0, 27, va >> 5); - memset(&fields, 0, sizeof fields); + memset(&fields, 0, sizeof(fields)); fields[0].num_bits = 6; fields[0].out_value = &cmd; @@ -713,7 +713,7 @@ static int xscale_invalidate_ic_line(struct target *target, uint32_t va) /* virtual address of desired cache line */ buf_set_u32(packet, 0, 27, va >> 5); - memset(&fields, 0, sizeof fields); + memset(&fields, 0, sizeof(fields)); fields[0].num_bits = 6; fields[0].out_value = &cmd; @@ -1551,7 +1551,7 @@ static int xscale_deassert_reset(struct target *target) * coprocessors, trace data, etc. */ address = xscale->handler_address; - for (unsigned binary_size = sizeof xscale_debug_handler; + for (unsigned binary_size = sizeof(xscale_debug_handler); binary_size > 0; binary_size -= buf_cnt, buffer += buf_cnt) { uint32_t cache_line[8]; @@ -3004,7 +3004,7 @@ static int xscale_target_create(struct target *target, Jim_Interp *interp) { struct xscale_common *xscale; - if (sizeof xscale_debug_handler > 0x800) { + if (sizeof(xscale_debug_handler) > 0x800) { LOG_ERROR("debug_handler.bin: larger than 2kb"); return ERROR_FAIL; } commit 9b29cb58acbd14ed831d68fce4d6e6a1728f8caf Author: Antonio Borneo <bor...@gm...> Date: Mon May 6 00:03:03 2019 +0200 coding style: remove useless break after a goto or return In a switch/case statement, a break placed after a goto or return is never executed. The script checkpatch available in Linux kernel v5.1 issues a warning for such unused break statements. In the process of reviewing the new checkpatch for its inclusion in OpenOCD, let's get rid of these warnings. The script checkpatch is unable to fixup automatically this case. Thanks to having "break" command using a single code line, this patch has been generated using the script below: find src/ -type f -exec ./tools/scripts/checkpatch.pl -q \ --types UNNECESSARY_BREAK -f {} \; \ | sed -n '/^#/{s/^.*FILE: //;s/:$//;s/:/ /;p}' \ | awk 'function P() {print "sed -i '\''"b"'\'' "a}; { if ($1!=a) { if (a) {P()}; a=$1; b=$2"{d}"; } else { b=b";"$2"{d}" } }; END {P()}' Change-Id: I56ca098faa5fe8d1e3f712dc0a029a3f10559d99 Signed-off-by: Antonio Borneo <bor...@gm...> Reviewed-on: http://openocd.zylin.com/5617 Reviewed-by: Andreas Fritiofson <and...@gm...> Tested-by: jenkins diff --git a/src/flash/nand/mx3.c b/src/flash/nand/mx3.c index 5fdc92305..da141b742 100644 --- a/src/flash/nand/mx3.c +++ b/src/flash/nand/mx3.c @@ -685,7 +685,6 @@ static int do_data_output(struct nand_device *nand) case 2 << 2: LOG_DEBUG("main area readed with more than 1 (incorrectable) error"); return ERROR_NAND_OPERATION_FAILED; - break; } switch (ecc_status & 0x0003) { case 1: @@ -694,7 +693,6 @@ static int do_data_output(struct nand_device *nand) case 2: LOG_DEBUG("main area readed with more than 1 (incorrectable) error"); return ERROR_NAND_OPERATION_FAILED; - break; } } break; diff --git a/src/flash/nand/mxc.c b/src/flash/nand/mxc.c index b54115731..ee093c056 100644 --- a/src/flash/nand/mxc.c +++ b/src/flash/nand/mxc.c @@ -874,7 +874,6 @@ int ecc_status_v1(struct nand_device *nand) case 2 << 2: LOG_INFO("main area read with more than 1 (incorrectable) error"); return ERROR_NAND_OPERATION_FAILED; - break; } switch (ecc_status & 0x0003) { case 1: @@ -883,7 +882,6 @@ int ecc_status_v1(struct nand_device *nand) case 2: LOG_INFO("main area read with more than 1 (incorrectable) error"); return ERROR_NAND_OPERATION_FAILED; - break; } return ERROR_OK; } diff --git a/src/flash/nor/aducm360.c b/src/flash/nor/aducm360.c index f468c89a5..7c5596d48 100644 --- a/src/flash/nor/aducm360.c +++ b/src/flash/nor/aducm360.c @@ -434,10 +434,8 @@ static int aducm360_write_block(struct flash_bank *bank, switch (choice) { case 0: return aducm360_write_block_sync(bank, buffer, offset, count); - break; case 1: return aducm360_write_block_async(bank, buffer, offset, count); - break; default: LOG_ERROR("aducm360_write_block was cancelled (no writing method was chosen)!"); return ERROR_TARGET_RESOURCE_NOT_AVAILABLE; diff --git a/src/flash/nor/at91sam3.c b/src/flash/nor/at91sam3.c index af0b50b49..b51e0972a 100644 --- a/src/flash/nor/at91sam3.c +++ b/src/flash/nor/at91sam3.c @@ -3068,7 +3068,6 @@ FLASH_BANK_COMMAND_HANDLER(sam3_flash_bank_command) ((unsigned int)(FLASH_BANK1_BASE_256K_AX)), ((unsigned int)(FLASH_BANK1_BASE_512K_AX))); return ERROR_FAIL; - break; /* at91sam3s and at91sam3n series only has bank 0*/ /* at91sam3u and at91sam3ax series has the same address for bank 0*/ @@ -3621,10 +3620,8 @@ COMMAND_HANDLER(sam3_handle_gpnvm_command) switch (CMD_ARGC) { default: return ERROR_COMMAND_SYNTAX_ERROR; - break; case 0: goto showall; - break; case 1: who = -1; break; @@ -3708,7 +3705,6 @@ COMMAND_HANDLER(sam3_handle_slowclk_command) /* error */ command_print(CMD, "Too many parameters"); return ERROR_COMMAND_SYNTAX_ERROR; - break; } command_print(CMD, "Slowclk freq: %d.%03dkhz", (int)(pChip->cfg.slow_freq / 1000), diff --git a/src/flash/nor/at91sam4.c b/src/flash/nor/at91sam4.c index 621754c90..135fc99bf 100644 --- a/src/flash/nor/at91sam4.c +++ b/src/flash/nor/at91sam4.c @@ -2482,7 +2482,6 @@ FLASH_BANK_COMMAND_HANDLER(sam4_flash_bank_command) ((unsigned int)(bank->base)), ((unsigned int)(FLASH_BANK_BASE_S))); return ERROR_FAIL; - break; /* at91sam4s series only has bank 0*/ /* at91sam4sd series has the same address for bank 0 (FLASH_BANK0_BASE_SD)*/ @@ -3101,10 +3100,8 @@ COMMAND_HANDLER(sam4_handle_gpnvm_command) switch (CMD_ARGC) { default: return ERROR_COMMAND_SYNTAX_ERROR; - break; case 0: goto showall; - break; case 1: who = -1; break; @@ -3188,7 +3185,6 @@ COMMAND_HANDLER(sam4_handle_slowclk_command) /* error */ command_print(CMD, "Too many parameters"); return ERROR_COMMAND_SYNTAX_ERROR; - break; } command_print(CMD, "Slowclk freq: %d.%03dkhz", (int)(pChip->cfg.slow_freq / 1000), diff --git a/src/flash/nor/atsamv.c b/src/flash/nor/atsamv.c index d6f1a0a48..9a53369a7 100644 --- a/src/flash/nor/atsamv.c +++ b/src/flash/nor/atsamv.c @@ -375,7 +375,6 @@ static int samv_probe(struct flash_bank *bank) default: LOG_ERROR("unrecognized flash size code: %d", nvm_size_code); return ERROR_FAIL; - break; } struct samv_flash_bank *samv_info = bank->driver_priv; @@ -645,7 +644,6 @@ COMMAND_HANDLER(samv_handle_gpnvm_command) switch (CMD_ARGC) { case 0: goto showall; - break; case 1: who = -1; break; @@ -660,7 +658,6 @@ COMMAND_HANDLER(samv_handle_gpnvm_command) break; default: return ERROR_COMMAND_SYNTAX_ERROR; - break; } uint32_t v; diff --git a/src/flash/nor/cfi.c b/src/flash/nor/cfi.c index 80a0a33ee..73884b786 100644 --- a/src/flash/nor/cfi.c +++ b/src/flash/nor/cfi.c @@ -989,10 +989,8 @@ int cfi_erase(struct flash_bank *bank, int first, int last) case 1: case 3: return cfi_intel_erase(bank, first, last); - break; case 2: return cfi_spansion_erase(bank, first, last); - break; default: LOG_ERROR("cfi primary command set %i unsupported", cfi_info->pri_id); break; @@ -1128,7 +1126,6 @@ int cfi_protect(struct flash_bank *bank, int set, int first, int last) case 1: case 3: return cfi_intel_protect(bank, set, first, last); - break; default: LOG_WARNING("protect: cfi primary command set %i unsupported", cfi_info->pri_id); return ERROR_OK; @@ -1144,13 +1141,10 @@ static uint32_t cfi_command_val(struct flash_bank *bank, uint8_t cmd) switch (bank->bus_width) { case 1: return buf[0]; - break; case 2: return target_buffer_get_u16(target, buf); - break; case 4: return target_buffer_get_u32(target, buf); - break; default: LOG_ERROR("Unsupported bank buswidth %d, can't do block memory writes", bank->bus_width); @@ -2222,10 +2216,8 @@ int cfi_write_word(struct flash_bank *bank, uint8_t *word, uint32_t address) case 1: case 3: return cfi_intel_write_word(bank, word, address); - break; case 2: return cfi_spansion_write_word(bank, word, address); - break; default: LOG_ERROR("cfi primary command set %i unsupported", cfi_info->pri_id); break; @@ -2249,10 +2241,8 @@ static int cfi_write_words(struct flash_bank *bank, const uint8_t *word, case 1: case 3: return cfi_intel_write_words(bank, word, wordcount, address); - break; case 2: return cfi_spansion_write_words(bank, word, wordcount, address); - break; default: LOG_ERROR("cfi primary command set %i unsupported", cfi_info->pri_id); break; @@ -2998,10 +2988,8 @@ int cfi_protect_check(struct flash_bank *bank) case 1: case 3: return cfi_intel_protect_check(bank); - break; case 2: return cfi_spansion_protect_check(bank); - break; default: LOG_ERROR("cfi primary command set %i unsupported", cfi_info->pri_id); break; diff --git a/src/flash/nor/psoc6.c b/src/flash/nor/psoc6.c index 3cdfcc424..a8f8d3f08 100644 --- a/src/flash/nor/psoc6.c +++ b/src/flash/nor/psoc6.c @@ -481,20 +481,15 @@ static const char *protection_to_str(uint8_t protection) switch (protection) { case PROTECTION_VIRGIN: return "VIRGIN"; - break; case PROTECTION_NORMAL: return "NORMAL"; - break; case PROTECTION_SECURE: return "SECURE"; - break; case PROTECTION_DEAD: return "DEAD"; - break; case PROTECTION_UNKNOWN: default: return "UNKNOWN"; - break; } } diff --git a/src/flash/nor/xcf.c b/src/flash/nor/xcf.c index a0c35c5e5..ba35c2c10 100644 --- a/src/flash/nor/xcf.c +++ b/src/flash/nor/xcf.c @@ -625,7 +625,6 @@ static int xcf_probe(struct flash_bank *bank) default: LOG_ERROR("Unknown flash device ID 0x%X", id); return ERROR_FAIL; - break; } bank->sectors = malloc(bank->num_sectors * sizeof(struct flash_sector)); diff --git a/src/jtag/drivers/stlink_usb.c b/src/jtag/drivers/stlink_usb.c index a905576c8..14bac2a2f 100644 --- a/src/jtag/drivers/stlink_usb.c +++ b/src/jtag/drivers/stlink_usb.c @@ -2677,7 +2677,6 @@ static int stlink_speed(void *handle, int khz, bool query) switch (h->transport) { case HL_TRANSPORT_SWIM: return stlink_speed_swim(handle, khz, query); - break; case HL_TRANSPORT_SWD: if (h->version.jtag_api == STLINK_JTAG_API_V3) return stlink_speed_v3(handle, false, khz, query); diff --git a/src/jtag/drivers/ulink.c b/src/jtag/drivers/ulink.c index c6683abda..242c04fe3 100644 --- a/src/jtag/drivers/ulink.c +++ b/src/jtag/drivers/ulink.c @@ -765,58 +765,40 @@ static const char *ulink_cmd_id_string(uint8_t id) switch (id) { case CMD_SCAN_IN: return "CMD_SCAN_IN"; - break; case CMD_SLOW_SCAN_IN: return "CMD_SLOW_SCAN_IN"; - break; case CMD_SCAN_OUT: return "CMD_SCAN_OUT"; - break; case CMD_SLOW_SCAN_OUT: return "CMD_SLOW_SCAN_OUT"; - break; case CMD_SCAN_IO: return "CMD_SCAN_IO"; - break; case CMD_SLOW_SCAN_IO: return "CMD_SLOW_SCAN_IO"; - break; case CMD_CLOCK_TMS: return "CMD_CLOCK_TMS"; - break; case CMD_SLOW_CLOCK_TMS: return "CMD_SLOW_CLOCK_TMS"; - break; case CMD_CLOCK_TCK: return "CMD_CLOCK_TCK"; - break; case CMD_SLOW_CLOCK_TCK: return "CMD_SLOW_CLOCK_TCK"; - break; case CMD_SLEEP_US: return "CMD_SLEEP_US"; - break; case CMD_SLEEP_MS: return "CMD_SLEEP_MS"; - break; case CMD_GET_SIGNALS: return "CMD_GET_SIGNALS"; - break; case CMD_SET_SIGNALS: return "CMD_SET_SIGNALS"; - break; case CMD_CONFIGURE_TCK_FREQ: return "CMD_CONFIGURE_TCK_FREQ"; - break; case CMD_SET_LEDS: return "CMD_SET_LEDS"; - break; case CMD_TEST: return "CMD_TEST"; - break; default: return "CMD_UNKNOWN"; - break; } } diff --git a/src/svf/svf.c b/src/svf/svf.c index 5d87c8944..54fc7d139 100644 --- a/src/svf/svf.c +++ b/src/svf/svf.c @@ -1310,7 +1310,6 @@ XXR_common: case PIOMAP: LOG_ERROR("PIO and PIOMAP are not supported"); return ERROR_FAIL; - break; case RUNTEST: /* RUNTEST [run_state] run_count run_clk [min_time SEC [MAXIMUM max_time * SEC]] [ENDSTATE end_state] */ @@ -1532,7 +1531,6 @@ XXR_common: default: LOG_ERROR("invalid svf command: %s", argus[0]); return ERROR_FAIL; - break; } if (!svf_quiet) { diff --git a/src/target/arm_disassembler.c b/src/target/arm_disassembler.c index 8eb819446..04c392296 100644 --- a/src/target/arm_disassembler.c +++ b/src/target/arm_disassembler.c @@ -2309,7 +2309,6 @@ static int evaluate_data_proc_thumb(uint16_t opcode, address, opcode); } return ERROR_OK; - break; } } else { switch (op) { diff --git a/src/target/arm_dpm.c b/src/target/arm_dpm.c index f5dd22d8b..a01339c1f 100644 --- a/src/target/arm_dpm.c +++ b/src/target/arm_dpm.c @@ -212,7 +212,6 @@ int arm_dpm_read_reg(struct arm_dpm *dpm, struct reg *r, unsigned regnum) break; case ARM_VFP_V3_D0 ... ARM_VFP_V3_D31: return dpm_read_reg_u64(dpm, r, regnum); - break; case ARM_VFP_V3_FPSCR: /* "VMRS r0, FPSCR"; then return via DCC */ retval = dpm->instr_read_data_r0(dpm, @@ -294,7 +293,6 @@ static int dpm_write_reg(struct arm_dpm *dpm, struct reg *r, unsigned regnum) break; case ARM_VFP_V3_D0 ... ARM_VFP_V3_D31: return dpm_write_reg_u64(dpm, r, regnum); - break; case ARM_VFP_V3_FPSCR: /* move to r0 from DCC, then "VMSR FPSCR, r0" */ retval = dpm->instr_write_data_r0(dpm, diff --git a/src/target/armv4_5.c b/src/target/armv4_5.c index a0983cd54..b4581d5f1 100644 --- a/src/target/armv4_5.c +++ b/src/target/armv4_5.c @@ -1223,7 +1223,6 @@ int arm_get_gdb_reg_list(struct target *target, (*reg_list)[25] = arm->cpsr; return ERROR_OK; - break; case REG_CLASS_ALL: switch (arm->core_type) { @@ -1273,12 +1272,10 @@ int arm_get_gdb_reg_list(struct target *target, } return ERROR_OK; - break; default: LOG_ERROR("not a valid register class type in query."); return ERROR_FAIL; - break; } } diff --git a/src/target/avr32_ap7k.c b/src/target/avr32_ap7k.c index cf08e3ab9..622105913 100644 --- a/src/target/avr32_ap7k.c +++ b/src/target/avr32_ap7k.c @@ -464,7 +464,6 @@ static int avr32_ap7k_read_memory(struct target *target, target_addr_t address, break; case 1: return avr32_jtag_read_memory8(&ap7k->jtag, address, count, buffer); - break; default: break; } @@ -505,7 +504,6 @@ static int avr32_ap7k_write_memory(struct target *target, target_addr_t address, break; case 1: return avr32_jtag_write_memory8(&ap7k->jtag, address, count, buffer); - break; default: break; } diff --git a/src/target/riscv/riscv-013.c b/src/target/riscv/riscv-013.c index 8307b0224..e30294114 100644 --- a/src/target/riscv/riscv-013.c +++ b/src/target/riscv/riscv-013.c @@ -666,10 +666,8 @@ uint32_t abstract_register_size(unsigned width) return set_field(0, AC_ACCESS_REGISTER_SIZE, 2); case 64: return set_field(0, AC_ACCESS_REGISTER_SIZE, 3); - break; case 128: return set_field(0, AC_ACCESS_REGISTER_SIZE, 4); - break; default: LOG_ERROR("Unsupported register width: %d", width); return 0; diff --git a/src/transport/transport.c b/src/transport/transport.c index 77db9e210..010ea7c44 100644 --- a/src/transport/transport.c +++ b/src/transport/transport.c @@ -290,7 +290,6 @@ static int jim_transport_select(Jim_Interp *interp, int argc, Jim_Obj * const *a } Jim_SetResultString(interp, session->name, -1); return JIM_OK; - break; case 2: /* assign */ if (session) { if (!strcmp(session->name, argv[1]->bytes)) { @@ -327,7 +326,6 @@ static int jim_transport_select(Jim_Interp *interp, int argc, Jim_Obj * const *a LOG_ERROR("Debug adapter doesn't support '%s' transport", argv[1]->bytes); return JIM_ERR; - break; default: Jim_WrongNumArgs(interp, 1, argv, "[too many parameters]"); return JIM_ERR; ----------------------------------------------------------------------- Summary of changes: src/flash/nand/davinci.c | 2 +- src/flash/nand/mx3.c | 2 -- src/flash/nand/mxc.c | 2 -- src/flash/nor/aducm360.c | 2 -- src/flash/nor/at91sam3.c | 4 ---- src/flash/nor/at91sam4.c | 4 ---- src/flash/nor/atsamv.c | 3 --- src/flash/nor/cfi.c | 14 +---------- src/flash/nor/fespi.c | 2 +- src/flash/nor/kinetis_ke.c | 2 +- src/flash/nor/lpcspifi.c | 16 ++++++------- src/flash/nor/mrvlqspi.c | 10 ++++---- src/flash/nor/psoc6.c | 5 ---- src/flash/nor/tcl.c | 2 +- src/flash/nor/xcf.c | 1 - src/jtag/aice/aice_transport.c | 4 ++-- src/jtag/core.c | 2 +- src/jtag/drivers/amt_jtagaccel.c | 2 +- src/jtag/drivers/arm-jtag-ew.c | 16 ++++++------- src/jtag/drivers/gw16012.c | 2 +- src/jtag/drivers/jlink.c | 2 +- src/jtag/drivers/kitprog.c | 6 ++--- src/jtag/drivers/opendous.c | 8 +++---- src/jtag/drivers/parport.c | 2 +- src/jtag/drivers/stlink_usb.c | 7 +++--- src/jtag/drivers/ulink.c | 18 -------------- .../drivers/usb_blaster/ublast2_access_libusb.c | 12 +++++----- src/jtag/drivers/usb_blaster/usb_blaster.c | 4 ++-- src/jtag/drivers/usbprog.c | 2 +- src/jtag/drivers/versaloon/versaloon_internal.h | 2 +- src/jtag/drivers/vsllink.c | 2 +- src/jtag/minidummy/minidummy.c | 2 +- src/jtag/tcl.c | 4 ++-- src/rtos/linux.c | 4 ++-- src/server/gdb_server.c | 8 +++---- src/svf/svf.c | 10 ++++---- src/target/arc_cmd.c | 28 +++++++++++----------- src/target/arm11.c | 2 +- src/target/arm11_dbgtap.c | 2 +- src/target/arm_disassembler.c | 3 +-- src/target/arm_dpm.c | 6 ++--- src/target/armv4_5.c | 3 --- src/target/armv8_dpm.c | 4 ++-- src/target/avr32_ap7k.c ... [truncated message content] |
From: OpenOCD-Gerrit <ope...@us...> - 2020-05-09 13:39:30
|
This is an automated email from the git hooks/post-receive script. It was generated because a ref change was pushed to the repository containing the project "Main OpenOCD repository". The branch, master has been updated via 5df5e89cf3caf02dc6f49a5d3c8aa8b1349a1dbf (commit) from 6d3cb807aaa60c4a4cd8ed49ae7860097bc1b3ce (commit) Those revisions listed above that are new to this repository have not appeared on any other notification email; so we list those revisions in full, below. - Log ----------------------------------------------------------------- commit 5df5e89cf3caf02dc6f49a5d3c8aa8b1349a1dbf Author: Antonio Borneo <bor...@gm...> Date: Sun Apr 26 01:07:27 2020 +0200 tcl: remove trailing whitespace The script checkpatch available in new Linux kernel offers an experimental feature for automatically fix the code in place. While still experimental, the feature works quite well for simple fixes, like spacing. This patch has been created automatically with the script under review for inclusion in OpenOCD, using the command: find tcl/ -type f -exec ./tools/scripts/checkpatch.pl \ -q --types TRAILING_WHITESPACE --fix-inplace -f {} \; The patch only changes amount and position of whitespace, thus the following commands show empty diff git diff -w git log -w -p git log -w --stat Change-Id: Ie7e3a236f4db9c70019e3b3c7e851edbd3a9dd84 Signed-off-by: Antonio Borneo <bor...@gm...> Reviewed-on: http://openocd.zylin.com/5616 Reviewed-by: Andreas Fritiofson <and...@gm...> Tested-by: jenkins diff --git a/tcl/board/at91cap7a-stk-sdram.cfg b/tcl/board/at91cap7a-stk-sdram.cfg index df91a6b0b..8395ba33b 100644 --- a/tcl/board/at91cap7a-stk-sdram.cfg +++ b/tcl/board/at91cap7a-stk-sdram.cfg @@ -43,13 +43,13 @@ proc wait_state {expression} { return } } - return -code 1 "Timed out" + return -code 1 "Timed out" } # Use a global variable here to be able to tinker interactively with # post reset jtag frequency. global post_reset_khz -# Danger!!!! Even 16MHz kinda works with this target, but +# Danger!!!! Even 16MHz kinda works with this target, but # it needs to be as low as 2000kHz to be stable. set post_reset_khz 2000 @@ -61,25 +61,25 @@ $_TARGETNAME configure -event reset-init { mww 0xfffffd08 0xa5000001 # Enable main oscillator mww 0xFFFFFc20 0x00000f01 - wait_state {expr {([peek32 0xFFFFFC68] & 0x1) == 0}} + wait_state {expr {([peek32 0xFFFFFC68] & 0x1) == 0}} # Set PLLA to 96MHz mww 0xFFFFFc28 0x20072801 - wait_state {expr {([peek32 0xFFFFFC68] & 0x2) == 0}} + wait_state {expr {([peek32 0xFFFFFC68] & 0x2) == 0}} # Select prescaler mww 0xFFFFFC30 0x00000004 - wait_state {expr {([peek32 0xFFFFFC68] & 0x8) == 0}} + wait_state {expr {([peek32 0xFFFFFC68] & 0x8) == 0}} # Select master clock to 48MHz mww 0xFFFFFC30 0x00000006 - wait_state {expr {([peek32 0xFFFFFC68] & 0x8) == 0}} + wait_state {expr {([peek32 0xFFFFFC68] & 0x8) == 0}} echo "Master clock ok." - + # Now that we're up and running, crank up speed! global post_reset_khz ; adapter speed $post_reset_khz - + echo "Configuring the SDRAM controller..." # Configure EBI Chip select for SDRAM @@ -95,7 +95,7 @@ $_TARGETNAME configure -event reset-init { # Configure SDRAMC CR mww 0xFFFFEA08 0xA63392F9 - + # NOP command mww 0xFFFFEA00 0x1 mww 0x20000000 0 @@ -151,7 +151,7 @@ $_TARGETNAME configure -event reset-init { #remap internal memory at address 0x0 mww 0xffffef00 0x3 - + echo "SDRAM configuration ok." } diff --git a/tcl/board/at91sam9g20-ek.cfg b/tcl/board/at91sam9g20-ek.cfg index 9e0413a19..03296c50e 100644 --- a/tcl/board/at91sam9g20-ek.cfg +++ b/tcl/board/at91sam9g20-ek.cfg @@ -139,13 +139,13 @@ proc at91sam9g20_reset_init { } { # (MT29F2G08AACWP) can be established by setting four registers in order: SMC_SETUP3, # SMC_PULSE3, SMC_CYCLE3, and SMC_MODE3. Computing the exact values of these registers # is a little tedious to do here. If you have questions about how to do this, Atmel has - # a decent application note #6255B that covers this process. + # a decent application note #6255B that covers this process. mww 0xffffec30 0x00020002 ;# SMC_SETUP3 : 2 clock cycle setup for NRD and NWE mww 0xffffec34 0x04040404 ;# SMC_PULSE3 : 4 clock cycle pulse for all signals mww 0xffffec38 0x00070006 ;# SMC_CYCLE3 : 7 clock cycle NRD and 6 NWE cycle - mww 0xffffec3C 0x00020003 ;# SMC_MODE3 : NRD and NWE control, no NWAIT, 8-bit DBW, - + mww 0xffffec3C 0x00020003 ;# SMC_MODE3 : NRD and NWE control, no NWAIT, 8-bit DBW, + mww 0xffffe800 0x00000001 ;# ECC_CR : reset the ECC parity registers mww 0xffffe804 0x00000002 ;# ECC_MR : page size is 2112 words (word is 8 bits) diff --git a/tcl/board/hilscher_nxdb500sys.cfg b/tcl/board/hilscher_nxdb500sys.cfg index d71c4453b..20fa3ea03 100644 --- a/tcl/board/hilscher_nxdb500sys.cfg +++ b/tcl/board/hilscher_nxdb500sys.cfg @@ -17,7 +17,7 @@ $_TARGETNAME configure -event reset-init { arm7_9 dcc_downloads enable sdram_fix - + puts "Configuring SDRAM controller for paired K4S561632C (64MB) " mww 0x00100140 0 mww 0x00100144 0x03C13261 diff --git a/tcl/board/hilscher_nxeb500hmi.cfg b/tcl/board/hilscher_nxeb500hmi.cfg index aa3d58701..a51fa03bc 100644 --- a/tcl/board/hilscher_nxeb500hmi.cfg +++ b/tcl/board/hilscher_nxeb500hmi.cfg @@ -17,7 +17,7 @@ $_TARGETNAME configure -event reset-init { arm7_9 dcc_downloads disable sdram_fix - + puts "Configuring SDRAM controller for MT48LC8M32 (32MB) " mww 0x00100140 0 mww 0x00100144 0x03C23251 diff --git a/tcl/board/hilscher_nxsb100.cfg b/tcl/board/hilscher_nxsb100.cfg index 807e29200..c332beec0 100644 --- a/tcl/board/hilscher_nxsb100.cfg +++ b/tcl/board/hilscher_nxsb100.cfg @@ -17,7 +17,7 @@ $_TARGETNAME configure -event reset-init { arm7_9 dcc_downloads enable sdram_fix - + puts "Configuring SDRAM controller for MT48LC2M32 (8MB) " mww 0x00100140 0 mww 0x00100144 0x03C23251 diff --git a/tcl/board/imx31pdk.cfg b/tcl/board/imx31pdk.cfg index 502d40774..2dce157db 100644 --- a/tcl/board/imx31pdk.cfg +++ b/tcl/board/imx31pdk.cfg @@ -28,36 +28,36 @@ proc imx31pdk_init { } { mww 0x53FC0000 0x040 mww 0x53F80000 0x074B0B7D - + # 399MHz - 26MHz input, PD=1,MFI=7, MFN=27, MFD=40 #mww 0x53F80004 0xFF871D50 #mww 0x53F80010 0x00271C1B - + # Start 16 bit NorFlash Initialization on CS0 mww 0xb8002000 0x0000CC03 mww 0xb8002004 0xa0330D01 mww 0xb8002008 0x00220800 - + # Configure CPLD on CS4 mww 0xb8002040 0x0000DCF6 mww 0xb8002044 0x444A4541 mww 0xb8002048 0x44443302 - + # SDCLK mww 0x43FAC26C 0 - + # CAS mww 0x43FAC270 0 - + # RAS mww 0x43FAC274 0 - + # CS2 (CSD0) mww 0x43FAC27C 0x1000 - + # DQM3 mww 0x43FAC284 0 - + # DQM2, DQM1, DQM0, SD31-SD0, A25-A0, MA10 (0x288..0x2DC) mww 0x43FAC288 0 mww 0x43FAC28C 0 @@ -81,7 +81,7 @@ proc imx31pdk_init { } { mww 0x43FAC2D4 0 mww 0x43FAC2D8 0 mww 0x43FAC2DC 0 - + # Initialization script for 32 bit DDR on MX31 ADS mww 0xB8001010 0x00000004 mww 0xB8001004 0x006ac73a diff --git a/tcl/board/imx35pdk.cfg b/tcl/board/imx35pdk.cfg index b81c0b01c..2a7efaba7 100644 --- a/tcl/board/imx35pdk.cfg +++ b/tcl/board/imx35pdk.cfg @@ -8,9 +8,9 @@ $_TARGETNAME configure -event reset-init { imx35pdk_init } jtag_rclk 10 proc imx35pdk_init { } { - + imx3x_reset - + mww 0x43f00040 0x00000000 mww 0x43f00044 0x00000000 mww 0x43f00048 0x00000000 @@ -25,11 +25,11 @@ proc imx35pdk_init { } { mww 0x53f00050 0x00000000 mww 0x53f00000 0x77777777 mww 0x53f00004 0x77777777 - + # clock setup mww 0x53F80004 0x00821000 ;# first need to set IPU_HND_BYP mww 0x53F80004 0x00821000 ;#arm clock is 399Mhz and ahb clock is 133Mhz. - + #================================================= # WEIM config #================================================= @@ -45,14 +45,14 @@ proc imx35pdk_init { } { mww 0xB8002054 0x444a4541 # CS5A mww 0xB8002058 0x44443302 - + # IO SW PAD Control registers - setting of 0x0002 is high drive, mDDR mww 0x43FAC368 0x00000006 mww 0x43FAC36C 0x00000006 mww 0x43FAC370 0x00000006 mww 0x43FAC374 0x00000006 mww 0x43FAC378 0x00000006 - mww 0x43FAC37C 0x00000006 + mww 0x43FAC37C 0x00000006 mww 0x43FAC380 0x00000006 mww 0x43FAC384 0x00000006 mww 0x43FAC388 0x00000006 @@ -76,7 +76,7 @@ proc imx35pdk_init { } { mww 0x43FAC3D0 0x00000006 mww 0x43FAC3D4 0x00000006 mww 0x43FAC3D8 0x00000006 - + # DDR data bus SD 0 through 31 mww 0x43FAC3DC 0x00000082 mww 0x43FAC3E0 0x00000082 @@ -110,13 +110,13 @@ proc imx35pdk_init { } { mww 0x43FAC450 0x00000082 mww 0x43FAC454 0x00000082 mww 0x43FAC458 0x00000082 - + # DQM setup mww 0x43FAC45c 0x00000082 mww 0x43FAC460 0x00000082 mww 0x43FAC464 0x00000082 mww 0x43FAC468 0x00000082 - + mww 0x43FAC46c 0x00000006 mww 0x43FAC470 0x00000006 mww 0x43FAC474 0x00000006 @@ -130,30 +130,30 @@ proc imx35pdk_init { } { mww 0x43FAC494 0x00000006 mww 0x43FAC498 0x00000006 mww 0x43FAC49c 0x00000006 - mww 0x43FAC4A0 0x00000006 + mww 0x43FAC4A0 0x00000006 mww 0x43FAC4A4 0x00000006 ;# RAS mww 0x43FAC4A8 0x00000006 ;# CAS mww 0x43FAC4Ac 0x00000006 ;# SDWE mww 0x43FAC4B0 0x00000006 ;# SDCKE0 mww 0x43FAC4B4 0x00000006 ;# SDCKE1 mww 0x43FAC4B8 0x00000002 ;# SDCLK - + # SDQS0 through SDQS3 mww 0x43FAC4Bc 0x00000082 mww 0x43FAC4C0 0x00000082 mww 0x43FAC4C4 0x00000082 mww 0x43FAC4C8 0x00000082 - - + + # *================================================== # Initialization script for 32 bit DDR2 on RINGO 3DS # *================================================== - + #-------------------------------------------- # Init CCM #-------------------------------------------- mww 0x53F80028 0x7D000028 - + #-------------------------------------------- # Init IOMUX for JTAG #-------------------------------------------- @@ -164,24 +164,24 @@ proc imx35pdk_init { } { mww 0x43FAC5FC 0x000000F3 mww 0x43FAC600 0x000000F3 mww 0x43FAC604 0x000000F3 - - + + # ESD_MISC : enable DDR2 mww 0xB8001010 0x00000304 - + #-------------------------------------------- # Init 32-bit DDR2 memory on CSD0 # COL=10-bit, ROW=13-bit, BA[1:0]=Addr[26:25] #-------------------------------------------- - + # ESD_ESDCFG0 : set timing parameters - mww 0xB8001004 0x007ffC2f - + mww 0xB8001004 0x007ffC2f + # ESD_ESDCTL0 : select Prechare-All mode mww 0xB8001000 0x92220000 # DDR2 : Prechare-All mww 0x80000400 0x12345678 - + # ESD_ESDCTL0 : select Load-Mode-Register mode mww 0xB8001000 0xB2220000 # DDR2 : Load reg EMR2 @@ -192,18 +192,18 @@ proc imx35pdk_init { } { mwb 0x82000400 0xda # DDR2 : Load reg MR -- reset DLL mwb 0x80000333 0xda - + # ESD_ESDCTL0 : select Prechare-All mode mww 0xB8001000 0x92220000 # DDR2 : Prechare-All mwb 0x80000400 0x12345678 - + # ESD_ESDCTL0 : select Manual-Refresh mode mww 0xB8001000 0xA2220000 # DDR2 : Manual-Refresh 2 times mww 0x80000000 0x87654321 mww 0x80000000 0x87654321 - + # ESD_ESDCTL0 : select Load-Mode-Register mode mww 0xB8001000 0xB2220000 # DDR2 : Load reg MR -- CL=3, BL=8, end DLL reset @@ -212,19 +212,19 @@ proc imx35pdk_init { } { mwb 0x82000780 0xda # DDR2 : Load reg EMR1 -- OCD exit mwb 0x82000400 0xda ;# ODT disabled - + # ESD_ESDCTL0 : select normal-operation mode # DSIZ=32-bit, BL=8, COL=10-bit, ROW=13-bit # disable PWT & PRCT # disable Auto-Refresh mww 0xB8001000 0x82220080 - + ## ESD_ESDCTL0 : enable Auto-Refresh mww 0xB8001000 0x82228080 ## ESD_ESDCTL1 : enable Auto-Refresh mww 0xB8001008 0x00002000 - - + + #*********************************************** # Adjust the ESDCDLY5 register #*********************************************** @@ -233,20 +233,20 @@ proc imx35pdk_init { } { mww 0xB8001024 0x00F48000 ;# this is the default value mww 0xB8001028 0x00F48000 ;# this is the default value mww 0xB800102c 0x00F48000 ;# this is the default value - - + + #Then you can make force measure with the dedicated bit (Bit 7 at ESDMISC) mww 0xB8001010 0x00000384 # wait a while sleep 1000 # now clear the force measurement bit mww 0xB8001010 0x00000304 - + # dummy write to DDR memory to set DQS low mww 0x80000000 0x00000000 - + mww 0x30000100 0x0 mww 0x30000104 0x31024 - - + + } diff --git a/tcl/board/mcb1700.cfg b/tcl/board/mcb1700.cfg index 4954dab0a..01080a0b1 100644 --- a/tcl/board/mcb1700.cfg +++ b/tcl/board/mcb1700.cfg @@ -1,5 +1,5 @@ # Keil MCB1700 PCB with 1768 -# +# # Reset init script sets it to 100MHz set CCLK 100000 @@ -53,7 +53,7 @@ $_TARGETNAME configure -event reset-init { # Dividing CPU clock by 8 should be pretty conservative # - # + # global MCB1700_CCLK adapter speed [expr $MCB1700_CCLK / 8] diff --git a/tcl/board/olimex_sam9_l9260.cfg b/tcl/board/olimex_sam9_l9260.cfg index ad2f850a1..72dce87b1 100644 --- a/tcl/board/olimex_sam9_l9260.cfg +++ b/tcl/board/olimex_sam9_l9260.cfg @@ -23,15 +23,15 @@ $_TARGETNAME configure -event reset-start { # RCLK is not supported. jtag_rclk 5 halt - - # RSTC_MR : enable user reset, reset length is 64 slow clock cycles. MMU may + + # RSTC_MR : enable user reset, reset length is 64 slow clock cycles. MMU may # be enabled... use physical address. mww phys 0xfffffd08 0xa5000501 } $_TARGETNAME configure -event reset-init { mww 0xfffffd44 0x00008000 ;# WDT_MR : disable watchdog - + ## # Clock configuration for 99.328 MHz main clock. ## @@ -45,23 +45,23 @@ $_TARGETNAME configure -event reset-init { mww 0xfffffc30 0x00000101 ;# PMC_MCKR : no scale on proc clock, master is proc / 2 sleep 10 ;# wait 10 ms mww 0xfffffc30 0x00000102 ;# PMC_MCKR : switch to PLLA (99.328 MHz) - + # Increase JTAG speed to 6 MHz if RCLK is not supported. jtag_rclk 6000 - + arm7_9 dcc_downloads enable ;# Enable faster DCC downloads. - + ## # SDRAM configuration for 2 x Samsung K4S561632J-UC75, 4M x 16Bit x 4 Banks. ## echo "Configuring SDRAM" mww 0xfffff870 0xffff0000 ;# PIOC_ASR : select peripheral function for D15..D31 mww 0xfffff804 0xffff0000 ;# PIOC_PDR : disable PIO function for D15..D31 - + mww 0xffffef1c 0x00010002 ;# EBI_CSA : assign EBI CS1 to SDRAM, VDDIOMSEL set for +3V3 memory - + mww 0xffffea08 0x85237259 ;# SDRAMC_CR : configure SDRAM for Samsung chips - + mww 0xffffea00 0x1 ;# SDRAMC_MR : issue NOP command mww 0x20000000 0 mww 0xffffea00 0x2 ;# SDRAMC_MR : issue an 'All Banks Precharge' command @@ -86,7 +86,7 @@ $_TARGETNAME configure -event reset-init { mww 0x20000000 0 mww 0xffffea00 0x0 ;# SDRAMC_MR : normal mode mww 0x20000000 0 - + mww 0xffffea04 0x2b6 ;# SDRAMC_TR : set refresh timer count to 7 us ## @@ -99,37 +99,37 @@ $_TARGETNAME configure -event reset-init { mww 0xfffff814 0x00002000 ;# PIOC_ODR : disable output on 13 mww 0xfffff830 0x00004000 ;# PIOC_SODR : set 14 to disable NAND mww 0xfffff864 0x00002000 ;# PIOC_PUER : enable pull-up on 13 - + mww 0xffffef1c 0x0001000A ;# EBI_CSA : assign EBI CS3 to NAND, same settings as before - + mww 0xffffec30 0x00010001 ;# SMC_SETUP3 : 1 clock cycle setup for NRD and NWE mww 0xffffec34 0x03030303 ;# SMC_PULSE3 : 3 clock cycle pulse for all signals mww 0xffffec38 0x00050005 ;# SMC_CYCLE3 : 5 clock cycle NRD and NWE cycle - mww 0xffffec3C 0x00020003 ;# SMC_MODE3 : NRD and NWE control, no NWAIT, 8-bit DBW, + mww 0xffffec3C 0x00020003 ;# SMC_MODE3 : NRD and NWE control, no NWAIT, 8-bit DBW, # 3 TDF cycles, no optimization - + mww 0xffffe800 0x00000001 ;# ECC_CR : reset the ECC parity registers mww 0xffffe804 0x00000002 ;# ECC_MR : page size is 2112 words (word is 8 bits) - + nand probe at91sam9260.flash - + ## # Dataflash configuration for 1 x Atmel AT45DB161D, 16Mbit ## echo "Setting up dataflash" - mww 0xfffff404 0x00000807 ;# PIOA_PDR : disable PIO function for 0(SPI0_MISO), 1(SPI0_MOSI), + mww 0xfffff404 0x00000807 ;# PIOA_PDR : disable PIO function for 0(SPI0_MISO), 1(SPI0_MOSI), # 2(SPI0_SPCK), and 11(SPI0_NPCS1) mww 0xfffff470 0x00000007 ;# PIOA_ASR : select peripheral A function for 0, 1, and 2 mww 0xfffff474 0x00000800 ;# PIOA_BSR : select peripheral B function for 11 mww 0xfffffc10 0x00001000 ;# PMC_PCER : enable SPI0 clock - + mww 0xfffc8000 0x00000080 ;# SPI0_CR : software reset SPI0 mww 0xfffc8000 0x00000080 ;# SPI0_CR : again to be sure mww 0xfffc8004 0x000F0011 ;# SPI0_MR : master mode with nothing selected - - mww 0xfffc8034 0x011a0302 ;# SPI0_CSR1 : capture on leading edge, 8-bits/tx. 33MHz baud, + + mww 0xfffc8034 0x011a0302 ;# SPI0_CSR1 : capture on leading edge, 8-bits/tx. 33MHz baud, # 250ns delay before SPCK, 250ns b/n tx - + mww 0xfffc8004 0x000D0011 ;# SPI0_MR : same config, select NPCS1 mww 0xfffc8000 0x00000001 ;# SPI0_CR : enable SPI0 } diff --git a/tcl/board/phytec_lpc3250.cfg b/tcl/board/phytec_lpc3250.cfg index 1c48f5df7..cee28cdd2 100644 --- a/tcl/board/phytec_lpc3250.cfg +++ b/tcl/board/phytec_lpc3250.cfg @@ -23,12 +23,12 @@ $_TARGETNAME configure -event reset-init { phytec_lpc3250_init } # Bare-bones initialization of core clocks and SDRAM proc phytec_lpc3250_init { } { - # Set clock dividers + # Set clock dividers # ARMCLK = 266.5 MHz # HCLK = 133.25 MHz # PERIPHCLK = 13.325 MHz mww 0x400040BC 0 - mww 0x40004050 0x140 + mww 0x40004050 0x140 mww 0x40004040 0x4D mww 0x40004058 0x16250 @@ -37,7 +37,7 @@ proc phytec_lpc3250_init { } { sleep 1 busy mww 0x40004044 0x106 sleep 1 busy - mww 0x40004044 0x006 + mww 0x40004044 0x006 sleep 1 busy mww 0x40004048 0x2 @@ -49,7 +49,7 @@ proc phytec_lpc3250_init { } { mww 0x31080008 0 mww 0x40004068 0x1C000 mww 0x31080028 0x11 - + mww 0x31080400 0 mww 0x31080440 0 mww 0x31080460 0 @@ -66,7 +66,7 @@ proc phytec_lpc3250_init { } { mww 0x31080054 1 mww 0x31080058 1 mww 0x3108005C 0 - + mww 0x31080100 0x5680 mww 0x31080104 0x302 diff --git a/tcl/board/rsc-w910.cfg b/tcl/board/rsc-w910.cfg index cb1733b27..574de0c07 100644 --- a/tcl/board/rsc-w910.cfg +++ b/tcl/board/rsc-w910.cfg @@ -33,7 +33,7 @@ $_TARGETNAME configure -event reset-start {adapter speed 1000} $_TARGETNAME configure -event reset-init { # switch on PLL for 200MHz operation # running from 15MHz input clock - + mww 0xB0000200 0x00000030 ;# CLKEN mww 0xB0000204 0x00000f3c ;# CLKSEL mww 0xB0000208 0x05007000 ;# CLKDIV @@ -41,17 +41,17 @@ $_TARGETNAME configure -event reset-init { mww 0xB0000210 0x00002b63 ;# PLLCON1 mww 0xB000000C 0x08817fa6 ;# MFSEL sleep 10 - + # we are now running @ 200MHz # enable all openocd speed tweaks - + arm7_9 dcc_downloads enable arm7_9 fast_memory_access enable adapter speed 15000 - + # map nor flash to 0x20000000 # map sdram to 0x00000000 - + mww 0xb0001000 0x000530c1 ;# EBICON mww 0xb0001004 0x40030084 ;# ROMCON mww 0xb0001008 0x000010ee ;# SDCONF0 diff --git a/tcl/board/stm3210e_eval.cfg b/tcl/board/stm3210e_eval.cfg index 91807ce30..f30253c11 100644 --- a/tcl/board/stm3210e_eval.cfg +++ b/tcl/board/stm3210e_eval.cfg @@ -17,11 +17,11 @@ flash bank $_FLASHNAME cfi 0x64000000 0x01000000 2 2 $_TARGETNAME proc stm32_enable_fsmc {} { echo "Enabling FSMC Bank 1 (NOR/PSRAM Bank 2)" - + # enable gpio (defg) clocks for fsmc # RCC_APB2ENR mww 0x40021018 0x000001E0 - + # enable fsmc clock # RCC_AHBENR mww 0x40021014 0x00000114 @@ -31,29 +31,29 @@ proc stm32_enable_fsmc {} { mww 0x40011400 0x44BB44BB # GPIOD_CRH mww 0x40011404 0xBBBBBBBB - + # GPIOE_CRL mww 0x40011800 0xBBBBB444 # GPIOE_CRH mww 0x40011804 0xBBBBBBBB - + # GPIOF_CRL mww 0x40011C00 0x44BBBBBB # GPIOF_CRH mww 0x40011C04 0xBBBB4444 - + # GPIOG_CRL mww 0x40012000 0x44BBBBBB # GPIOG_CRH mww 0x40012004 0x444444B4 - + # setup fsmc timings # FSMC_BCR1 mww 0xA0000008 0x00001058 - + # FSMC_BTR1 mww 0xA000000C 0x10000502 - + # FSMC_BCR1 - enable fsmc mww 0xA0000008 0x00001059 } diff --git a/tcl/board/uptech_2410.cfg b/tcl/board/uptech_2410.cfg index 680cfd7d6..227cf42f6 100644 --- a/tcl/board/uptech_2410.cfg +++ b/tcl/board/uptech_2410.cfg @@ -11,28 +11,28 @@ proc init_pll_sdram { } { #echo "---------- Initializing PLL and SDRAM ---------" #watchdog timer disable mww phys 0x53000000 0x00000000 - + #disable all interrupts mww phys 0x4a000008 0xffffffff - + #disable all sub-interrupts mww phys 0x4a00001c 0x000007ff - + #clear all source pending bits mww phys 0x4a000000 0xffffffff - + #clear all sub-source pending bits mww phys 0x4a000018 0x000007ff - + #clear interrupt pending bit mww phys 0x4a000010 0xffffffff - + #PLL locktime counter mww phys 0x4c000000 0x00ffffff - + #Fin=12MHz Fout=202.8MHz #mww phys 0x4c000004 0x000a1031 - + #FCLK:HCLK:PCLK = 1:2:4 mww phys 0x4c000014 0x00000003 diff --git a/tcl/target/dsp56321.cfg b/tcl/target/dsp56321.cfg index 0ac0ce87c..78ecb3bd2 100644 --- a/tcl/target/dsp56321.cfg +++ b/tcl/target/dsp56321.cfg @@ -1,13 +1,13 @@ # Script for freescale DSP56321 # -if { [info exists CHIPNAME] } { +if { [info exists CHIPNAME] } { set _CHIPNAME $CHIPNAME } else { set _CHIPNAME dsp56321 } -if { [info exists ENDIAN] } { +if { [info exists ENDIAN] } { set _ENDIAN $ENDIAN } else { # this defaults to a big endian diff --git a/tcl/target/dsp568013.cfg b/tcl/target/dsp568013.cfg index 40fa3c2b0..67d44192e 100644 --- a/tcl/target/dsp568013.cfg +++ b/tcl/target/dsp568013.cfg @@ -1,12 +1,12 @@ # Script for freescale DSP568013 -if { [info exists CHIPNAME] } { +if { [info exists CHIPNAME] } { set _CHIPNAME $CHIPNAME } else { set _CHIPNAME dsp568013 } -if { [info exists ENDIAN] } { +if { [info exists ENDIAN] } { set _ENDIAN $ENDIAN } else { # this defaults to a big endian diff --git a/tcl/target/fm3.cfg b/tcl/target/fm3.cfg index 376320e83..544cff9d6 100644 --- a/tcl/target/fm3.cfg +++ b/tcl/target/fm3.cfg @@ -36,10 +36,10 @@ dap create $_CHIPNAME.dap -chain-position $_CHIPNAME.cpu set _TARGETNAME $_CHIPNAME.cpu target create $_TARGETNAME cortex_m -endian $_ENDIAN -dap $_CHIPNAME.dap -# MB9BF506 has 64kB of SRAM on its main system bus +# MB9BF506 has 64kB of SRAM on its main system bus $_TARGETNAME configure -work-area-phys 0x1FFF8000 -work-area-size 0x10000 -work-area-backup 0 -# MB9BF506 has 512kB internal FLASH +# MB9BF506 has 512kB internal FLASH set _FLASHNAME $_CHIPNAME.flash flash bank $_FLASHNAME fm3 0 0 0 0 $_TARGETNAME diff --git a/tcl/target/imx.cfg b/tcl/target/imx.cfg index 9eea53eef..ccfddb6f7 100644 --- a/tcl/target/imx.cfg +++ b/tcl/target/imx.cfg @@ -6,7 +6,7 @@ set TARGETNAME $_TARGETNAME # rewrite commands of the form below to arm11 mcr... # Data.Set c15:0x042f %long 0x40000015 proc setc15 {regs value} { - global TARGETNAME + global TARGETNAME echo [format "set p15 0x%04x, 0x%08x" $regs $value] diff --git a/tcl/target/ixp42x.cfg b/tcl/target/ixp42x.cfg index 3f86e357b..624fe29da 100644 --- a/tcl/target/ixp42x.cfg +++ b/tcl/target/ixp42x.cfg @@ -66,8 +66,8 @@ set IXP42x_SDRAM_256MB_32Mx16_2BANK 0x0015 # helper function to init SDRAM on IXP42x. # SDRAM_CFG: one of IXP42X_SDRAM_xxx -# REFRESH: refresh counter reload value (integer) -# CASLAT: 2 or 3 +# REFRESH: refresh counter reload value (integer) +# CASLAT: 2 or 3 proc ixp42x_init_sdram { SDRAM_CFG REFRESH CASLAT } { switch $CASLAT { diff --git a/tcl/target/lpc2103.cfg b/tcl/target/lpc2103.cfg index f55777f56..131b9ef89 100644 --- a/tcl/target/lpc2103.cfg +++ b/tcl/target/lpc2103.cfg @@ -15,7 +15,7 @@ proc setup_lpc2103 {core_freq_khz adapter_freq_khz} { proc init_targets {} { # default to core clocked with 12MHz crystal echo "Warning - assuming default core clock 12MHz! Flashing may fail if actual core clock is different." - + # setup_lpc2103 <core_freq_khz> <adapter_freq_khz> setup_lpc2103 12000 1500 } diff --git a/tcl/target/lpc2124.cfg b/tcl/target/lpc2124.cfg index 02517381a..ddbde22a5 100644 --- a/tcl/target/lpc2124.cfg +++ b/tcl/target/lpc2124.cfg @@ -15,7 +15,7 @@ proc setup_lpc2124 {core_freq_khz adapter_freq_khz} { proc init_targets {} { # default to core clocked with 12MHz crystal echo "Warning - assuming default core clock 12MHz! Flashing may fail if actual core clock is different." - + # setup_lpc2124 <core_freq_khz> <adapter_freq_khz> setup_lpc2124 12000 1500 } diff --git a/tcl/target/lpc2129.cfg b/tcl/target/lpc2129.cfg index 2c33cde31..a1c3fe7bb 100644 --- a/tcl/target/lpc2129.cfg +++ b/tcl/target/lpc2129.cfg @@ -15,7 +15,7 @@ proc setup_lpc2129 {core_freq_khz adapter_freq_khz} { proc init_targets {} { # default to core clocked with 12MHz crystal echo "Warning - assuming default core clock 12MHz! Flashing may fail if actual core clock is different." - + # setup_lpc2129 <core_freq_khz> <adapter_freq_khz> setup_lpc2129 12000 1500 } diff --git a/tcl/target/lpc2148.cfg b/tcl/target/lpc2148.cfg index f3a2011a8..503a68264 100644 --- a/tcl/target/lpc2148.cfg +++ b/tcl/target/lpc2148.cfg @@ -15,7 +15,7 @@ proc setup_lpc2148 {core_freq_khz adapter_freq_khz} { proc init_targets {} { # default to core clocked with 12MHz crystal echo "Warning - assuming default core clock 12MHz! Flashing may fail if actual core clock is different." - + # setup_lpc2148 <core_freq_khz> <adapter_freq_khz> setup_lpc2148 12000 1500 } diff --git a/tcl/target/lpc2294.cfg b/tcl/target/lpc2294.cfg index 83d595deb..1320cda3e 100644 --- a/tcl/target/lpc2294.cfg +++ b/tcl/target/lpc2294.cfg @@ -9,7 +9,7 @@ source [find target/lpc2xxx.cfg] proc setup_lpc2294 {core_freq_khz adapter_freq_khz} { # 256kB flash and 16kB SRAM # setup_lpc2xxx <chip_name> <cputapid> <flash_size> <flash_variant> <workarea_size> <core_freq_khz> <adapter_freq_khz> - + # !! TAPID unknown !! setup_lpc2xxx lpc2294 0xffffffff 0x40000 lpc2000_v1 0x4000 $core_freq_khz $adapter_freq_khz } @@ -17,7 +17,7 @@ proc setup_lpc2294 {core_freq_khz adapter_freq_khz} { proc init_targets {} { # default to core clocked with 12MHz crystal echo "Warning - assuming default core clock 12MHz! Flashing may fail if actual core clock is different." - + # setup_lpc2294 <core_freq_khz> <adapter_freq_khz> setup_lpc2294 12000 1500 } diff --git a/tcl/target/lpc2378.cfg b/tcl/target/lpc2378.cfg index 0b66b8255..235456a07 100644 --- a/tcl/target/lpc2378.cfg +++ b/tcl/target/lpc2378.cfg @@ -15,7 +15,7 @@ proc setup_lpc2378 {core_freq_khz adapter_freq_khz} { proc init_targets {} { # default to core clocked with 4MHz internal oscillator echo "Warning - assuming default core clock 4MHz! Flashing may fail if actual core clock is different." - + # setup_lpc2378 <core_freq_khz> <adapter_freq_khz> setup_lpc2378 4000 500 } diff --git a/tcl/target/lpc2460.cfg b/tcl/target/lpc2460.cfg index 69fdc4aaf..c229f6dd6 100644 --- a/tcl/target/lpc2460.cfg +++ b/tcl/target/lpc2460.cfg @@ -15,7 +15,7 @@ proc setup_lpc2460 {core_freq_khz adapter_freq_khz} { proc init_targets {} { # default to core clocked with 4MHz internal oscillator echo "Warning - assuming default core clock 4MHz! Flashing may fail if actual core clock is different." - + # setup_lpc2460 <core_freq_khz> <adapter_freq_khz> setup_lpc2460 4000 500 } diff --git a/tcl/target/lpc2478.cfg b/tcl/target/lpc2478.cfg index 48e5bdf3f..36b5c4693 100644 --- a/tcl/target/lpc2478.cfg +++ b/tcl/target/lpc2478.cfg @@ -15,7 +15,7 @@ proc setup_lpc2478 {core_freq_khz adapter_freq_khz} { proc init_targets {} { # default to core clocked with 4MHz internal oscillator echo "Warning - assuming default core clock 4MHz! Flashing may fail if actual core clock is different." - + # setup_lpc2478 <core_freq_khz> <adapter_freq_khz> setup_lpc2478 4000 500 } diff --git a/tcl/target/lpc2xxx.cfg b/tcl/target/lpc2xxx.cfg index 4c3394c95..f947c1b05 100644 --- a/tcl/target/lpc2xxx.cfg +++ b/tcl/target/lpc2xxx.cfg @@ -40,5 +40,5 @@ proc setup_lpc2xxx {chip_name cputapids flash_size flash_variant workarea_size c proc init_targets {} { # FIX!!! read out CPUTAPID here and choose right setup. In addition to the # CPUTAPID some querying of the target would be required. - return -error "This is a generic LPC2xxx configuration file, use a specific target file." + return -error "This is a generic LPC2xxx configuration file, use a specific target file." } diff --git a/tcl/target/lpc3131.cfg b/tcl/target/lpc3131.cfg index d6f2cdbda..89bbf0265 100644 --- a/tcl/target/lpc3131.cfg +++ b/tcl/target/lpc3131.cfg @@ -56,7 +56,7 @@ adapter srst delay 1000 jtag_ntrst_delay 0 set _TARGETNAME $_CHIPNAME.cpu -target create $_TARGETNAME arm926ejs -endian $_ENDIAN -chain-position $_TARGETNAME +target create $_TARGETNAME arm926ejs -endian $_ENDIAN -chain-position $_TARGETNAME $_TARGETNAME invoke-event halted diff --git a/tcl/target/u8500.cfg b/tcl/target/u8500.cfg index baef9c81f..36e0db71d 100644 --- a/tcl/target/u8500.cfg +++ b/tcl/target/u8500.cfg @@ -1,6 +1,6 @@ # Copyright (C) ST-Ericsson SA 2011 # Author : mic...@st... -# U8500 target +# U8500 target proc mmu_off {} { set cp [arm mrc 15 0 1 0 0] @@ -31,7 +31,7 @@ proc ocd_gdb_restart {target_id} { proc smp_reg {} { global _TARGETNAME_1 global _TARGETNAME_2 - targets $_TARGETNAME_1 + targets $_TARGETNAME_1 echo "$_TARGETNAME_1" set pc1 [reg pc] set stck1 [reg sp_svc] @@ -68,7 +68,7 @@ proc pwrsts { } { 8 { echo "A9 100% DVFS" } - c { + c { echo "A9 50% DVFS" } } @@ -144,7 +144,7 @@ tcl_port 5555 telnet_port 4444 gdb_port 3333 -if { [info exists CHIPNAME] } { +if { [info exists CHIPNAME] } { global _CHIPNAME set _CHIPNAME $CHIPNAME } else { @@ -194,12 +194,12 @@ set _TARGETNAME_1 $TARGETNAME_1 if { [info exists DAP_DBG1] } { set _DAP_DBG1 $DAP_DBG1 } else { - set _DAP_DBG1 0x801A8000 + set _DAP_DBG1 0x801A8000 } if { [info exists DAP_DBG2] } { set _DAP_DBG2 $DAP_DBG2 } else { - set _DAP_DBG2 0x801AA000 + set _DAP_DBG2 0x801AA000 } dap create $_CHIPNAME.dap -chain-position $_CHIPNAME.cpu @@ -226,7 +226,7 @@ global _SMP set _SMP $SMP } global SMP -if { $_SMP == 1} { +if { $_SMP == 1} { target smp $_CHIPNAME.cpu2 $_CHIPNAME.cpu1 } @@ -264,7 +264,7 @@ proc att { } { } else { echo "target secured" } - + } @@ -310,10 +310,10 @@ if {![info exists MAXSPEED]} { global _MAXSPEED set _MAXSPEED 15000 } else { -global _MAXSPEED +global _MAXSPEED set _MAXSPEED $MAXSPEED } -global _MAXSPEED +global _MAXSPEED adapter speed $_MAXSPEED ----------------------------------------------------------------------- Summary of changes: tcl/board/at91cap7a-stk-sdram.cfg | 20 +++++------ tcl/board/at91sam9g20-ek.cfg | 6 ++-- tcl/board/hilscher_nxdb500sys.cfg | 2 +- tcl/board/hilscher_nxeb500hmi.cfg | 2 +- tcl/board/hilscher_nxsb100.cfg | 2 +- tcl/board/imx31pdk.cfg | 20 +++++------ tcl/board/imx35pdk.cfg | 70 +++++++++++++++++++-------------------- tcl/board/mcb1700.cfg | 4 +-- tcl/board/olimex_sam9_l9260.cfg | 42 +++++++++++------------ tcl/board/phytec_lpc3250.cfg | 10 +++--- tcl/board/rsc-w910.cfg | 10 +++--- tcl/board/stm3210e_eval.cfg | 16 ++++----- tcl/board/uptech_2410.cfg | 16 ++++----- tcl/target/dsp56321.cfg | 4 +-- tcl/target/dsp568013.cfg | 4 +-- tcl/target/fm3.cfg | 4 +-- tcl/target/imx.cfg | 2 +- tcl/target/ixp42x.cfg | 4 +-- tcl/target/lpc2103.cfg | 2 +- tcl/target/lpc2124.cfg | 2 +- tcl/target/lpc2129.cfg | 2 +- tcl/target/lpc2148.cfg | 2 +- tcl/target/lpc2294.cfg | 4 +-- tcl/target/lpc2378.cfg | 2 +- tcl/target/lpc2460.cfg | 2 +- tcl/target/lpc2478.cfg | 2 +- tcl/target/lpc2xxx.cfg | 2 +- tcl/target/lpc3131.cfg | 2 +- tcl/target/u8500.cfg | 20 +++++------ 29 files changed, 140 insertions(+), 140 deletions(-) hooks/post-receive -- Main OpenOCD repository |
From: OpenOCD-Gerrit <ope...@us...> - 2020-05-09 13:38:43
|
This is an automated email from the git hooks/post-receive script. It was generated because a ref change was pushed to the repository containing the project "Main OpenOCD repository". The branch, master has been updated via 6d3cb807aaa60c4a4cd8ed49ae7860097bc1b3ce (commit) from 3a28cdc7cb790e388f0e142510858bee0b642597 (commit) Those revisions listed above that are new to this repository have not appeared on any other notification email; so we list those revisions in full, below. - Log ----------------------------------------------------------------- commit 6d3cb807aaa60c4a4cd8ed49ae7860097bc1b3ce Author: Antonio Borneo <bor...@gm...> Date: Sun Apr 26 01:25:32 2020 +0200 tcl: fix typo and spelling Identified by checkpatch script from Linux kernel v5.7-rc1 using the command find tcl/ -type f -exec ./tools/scripts/checkpatch.pl \ -q --types TYPO_SPELLING --strict -f {} \; Change-Id: I7b523f0ab5ec047ff167742a44c29984ac672cf4 Signed-off-by: Antonio Borneo <bor...@gm...> Reviewed-on: http://openocd.zylin.com/5615 Reviewed-by: Andreas Fritiofson <and...@gm...> Tested-by: jenkins diff --git a/tcl/board/alphascale_asm9260_ek.cfg b/tcl/board/alphascale_asm9260_ek.cfg index 46e8a5b5b..1c126827f 100644 --- a/tcl/board/alphascale_asm9260_ek.cfg +++ b/tcl/board/alphascale_asm9260_ek.cfg @@ -23,7 +23,7 @@ $_TARGETNAME configure -event reset-init { # select PLL as main source mww 0x80040120 0x1 - # disable and enble main clk to update changes? + # disable and enable main clk to update changes? mww 0x80040124 0x0 mww 0x80040124 0x1 diff --git a/tcl/board/at91sam9g20-ek.cfg b/tcl/board/at91sam9g20-ek.cfg index e8018766a..9e0413a19 100644 --- a/tcl/board/at91sam9g20-ek.cfg +++ b/tcl/board/at91sam9g20-ek.cfg @@ -169,7 +169,7 @@ proc at91sam9g20_reset_init { } { # TRC = 9 cycles # TWR = 2 cycles # 9 column, 13 row, 4 banks - # refresh equal to or less then 7.8 us for commerical/industrial rated devices + # refresh equal to or less then 7.8 us for commercial/industrial rated devices # # Thus SDRAM_CR = 0xa6339279 diff --git a/tcl/board/icnova_imx53_sodimm.cfg b/tcl/board/icnova_imx53_sodimm.cfg index 2345ef120..dce9c470e 100644 --- a/tcl/board/icnova_imx53_sodimm.cfg +++ b/tcl/board/icnova_imx53_sodimm.cfg @@ -22,7 +22,7 @@ jtag_rclk 1000 $_TARGETNAME configure -event "reset-start" { jtag_rclk 1000 } $_TARGETNAME configure -event "reset-assert" { - echo "Reseting ...." + echo "Resetting ...." #cortex_a dbginit } diff --git a/tcl/board/imx35pdk.cfg b/tcl/board/imx35pdk.cfg index b5aa752fa..b81c0b01c 100644 --- a/tcl/board/imx35pdk.cfg +++ b/tcl/board/imx35pdk.cfg @@ -170,11 +170,11 @@ proc imx35pdk_init { } { mww 0xB8001010 0x00000304 #-------------------------------------------- - # Init 32-bit DDR2 memeory on CSD0 + # Init 32-bit DDR2 memory on CSD0 # COL=10-bit, ROW=13-bit, BA[1:0]=Addr[26:25] #-------------------------------------------- - # ESD_ESDCFG0 : set timing paramters + # ESD_ESDCFG0 : set timing parameters mww 0xB8001004 0x007ffC2f # ESD_ESDCTL0 : select Prechare-All mode diff --git a/tcl/board/imx53-m53evk.cfg b/tcl/board/imx53-m53evk.cfg index d18afc73a..baeb3cd9d 100644 --- a/tcl/board/imx53-m53evk.cfg +++ b/tcl/board/imx53-m53evk.cfg @@ -21,7 +21,7 @@ reset_config trst_and_srst separate trst_open_drain srst_open_drain adapter speed 6000 $_TARGETNAME configure -event "reset-assert" { - echo "Reseting ...." + echo "Resetting ...." #cortex_a dbginit } diff --git a/tcl/board/imx53loco.cfg b/tcl/board/imx53loco.cfg index 57473ead2..18caca574 100644 --- a/tcl/board/imx53loco.cfg +++ b/tcl/board/imx53loco.cfg @@ -23,7 +23,7 @@ $_TARGETNAME configure -event "reset-start" { jtag_rclk 1000 } #jtag_ntrst_delay 200 $_TARGETNAME configure -event "reset-assert" { - echo "Reseting ...." + echo "Resetting ...." #cortex_a dbginit } diff --git a/tcl/board/kindle2.cfg b/tcl/board/kindle2.cfg index fbb1022fd..a39f15c67 100644 --- a/tcl/board/kindle2.cfg +++ b/tcl/board/kindle2.cfg @@ -162,7 +162,7 @@ proc kindle2_sdram_init {} { # LPDDR1 Initialization script mww 0xb8001010 0x00000002 mww 0xb8001010 0x00000004 - # ESDCFG0: set timing paramters + # ESDCFG0: set timing parameters mww 0xb8001004 0x007fff7f # ESDCTL0: select Prechare-All mode mww 0xb8001000 0x92100000 diff --git a/tcl/board/phone_se_j100i.cfg b/tcl/board/phone_se_j100i.cfg index 632659027..ec61425ac 100644 --- a/tcl/board/phone_se_j100i.cfg +++ b/tcl/board/phone_se_j100i.cfg @@ -1,7 +1,7 @@ # # Sony Ericsson J100I Phone # -# more informations can be found on +# more information can be found on # http://bb.osmocom.org/trac/wiki/SonyEricssonJ100i # source [find target/ti_calypso.cfg] diff --git a/tcl/board/snps_em_sk.cfg b/tcl/board/snps_em_sk.cfg index 63c39a4d4..3d9340735 100644 --- a/tcl/board/snps_em_sk.cfg +++ b/tcl/board/snps_em_sk.cfg @@ -9,7 +9,7 @@ # # Configure JTAG cable -# EM Starter Kit has built-in FT2232 chip, which is similiar to Digilent HS-1. +# EM Starter Kit has built-in FT2232 chip, which is similar to Digilent HS-1. source [find interface/ftdi/digilent-hs1.cfg] # 5MHz seems to work good with all cores that might happen in 2.x diff --git a/tcl/board/snps_em_sk_v1.cfg b/tcl/board/snps_em_sk_v1.cfg index 2e9d6025e..0c1539ee5 100644 --- a/tcl/board/snps_em_sk_v1.cfg +++ b/tcl/board/snps_em_sk_v1.cfg @@ -9,7 +9,7 @@ # # Configure JTAG cable -# EM Starter Kit has built-in FT2232 chip, which is similiar to Digilent HS-1. +# EM Starter Kit has built-in FT2232 chip, which is similar to Digilent HS-1. source [find interface/ftdi/digilent-hs1.cfg] adapter speed 10000 diff --git a/tcl/board/snps_em_sk_v2.1.cfg b/tcl/board/snps_em_sk_v2.1.cfg index 5df8de571..c1fb232d5 100644 --- a/tcl/board/snps_em_sk_v2.1.cfg +++ b/tcl/board/snps_em_sk_v2.1.cfg @@ -9,7 +9,7 @@ # # Configure JTAG cable -# EM Starter Kit has built-in FT2232 chip, which is similiar to Digilent HS-1. +# EM Starter Kit has built-in FT2232 chip, which is similar to Digilent HS-1. source [find interface/ftdi/digilent-hs1.cfg] # JTAG 10MHz is too fast for EM7D FPU in EM SK 2.1 which has core frequency diff --git a/tcl/board/snps_em_sk_v2.2.cfg b/tcl/board/snps_em_sk_v2.2.cfg index 7f3708e5c..674d9f65c 100644 --- a/tcl/board/snps_em_sk_v2.2.cfg +++ b/tcl/board/snps_em_sk_v2.2.cfg @@ -9,7 +9,7 @@ # # Configure JTAG cable -# EM Starter Kit has built-in FT2232 chip, which is similiar to Digilent HS-1. +# EM Starter Kit has built-in FT2232 chip, which is similar to Digilent HS-1. source [find interface/ftdi/digilent-hs1.cfg] # EM11D reportedly requires 5 MHz. Other cores and board can work faster. diff --git a/tcl/board/steval_pcc010.cfg b/tcl/board/steval_pcc010.cfg index ddfdbb36f..94108d1ca 100644 --- a/tcl/board/steval_pcc010.cfg +++ b/tcl/board/steval_pcc010.cfg @@ -1,5 +1,5 @@ # Use for the STM207VG plug-in board (1 MiB Flash and 112+16 KiB Ram -# comming with the STEVAL-PCC010 board +# coming with the STEVAL-PCC010 board # http://www.st.com/internet/evalboard/product/251530.jsp # or any other board with only a STM32F2x in the JTAG chain diff --git a/tcl/board/telo.cfg b/tcl/board/telo.cfg index 05644f658..2c98ca3bd 100644 --- a/tcl/board/telo.cfg +++ b/tcl/board/telo.cfg @@ -1,5 +1,5 @@ source [find target/c100.cfg] -# basic register defintion for C100 +# basic register definition for C100 source [find target/c100regs.tcl] # board-config info source [find target/c100config.tcl] diff --git a/tcl/board/topas910.cfg b/tcl/board/topas910.cfg index 77084a96d..9f994c8ea 100644 --- a/tcl/board/topas910.cfg +++ b/tcl/board/topas910.cfg @@ -30,7 +30,7 @@ proc topas910_init { } { # Init SDRAM # _PMCDRV = 0x00000071; # // -# // Initialize SDRAM timing paramater +# // Initialize SDRAM timing parameter # // # _DMC_CAS_LATENCY = 0x00000006; # _DMC_T_DQSS = 0x00000000; diff --git a/tcl/board/topasa900.cfg b/tcl/board/topasa900.cfg index 5bd0e5e02..4fa63831b 100644 --- a/tcl/board/topasa900.cfg +++ b/tcl/board/topasa900.cfg @@ -37,7 +37,7 @@ proc topasa900_init { } { # Init SDRAM # _PMCDRV = 0x00000071; # // -# // Initialize SDRAM timing paramater +# // Initialize SDRAM timing parameter # // # _DMC_CAS_LATENCY = 0x00000006; # _DMC_T_DQSS = 0x00000000; diff --git a/tcl/board/twr-k60f120m.cfg b/tcl/board/twr-k60f120m.cfg index e96d04526..c4d87db26 100644 --- a/tcl/board/twr-k60f120m.cfg +++ b/tcl/board/twr-k60f120m.cfg @@ -5,7 +5,7 @@ source [find target/k60.cfg] $_TARGETNAME configure -event reset-init { - puts "-event reset-init occured" + puts "-event reset-init occurred" } # diff --git a/tcl/board/twr-k60n512.cfg b/tcl/board/twr-k60n512.cfg index d2312cf14..5babeb8c1 100644 --- a/tcl/board/twr-k60n512.cfg +++ b/tcl/board/twr-k60n512.cfg @@ -5,7 +5,7 @@ source [find target/k60.cfg] $_TARGETNAME configure -event reset-init { - puts "-event reset-init occured" + puts "-event reset-init occurred" } # diff --git a/tcl/fpga/xilinx-xadc.cfg b/tcl/fpga/xilinx-xadc.cfg index 38691045c..d4be4f541 100644 --- a/tcl/fpga/xilinx-xadc.cfg +++ b/tcl/fpga/xilinx-xadc.cfg @@ -5,7 +5,7 @@ # voltages. The XADC is available both from fabric as well as through the # JTAG TAP. # -# This code implements access throught the JTAG TAP. +# This code implements access through the JTAG TAP. # # https://www.xilinx.com/support/documentation/user_guides/ug480_7Series_XADC.pdf diff --git a/tcl/interface/ftdi/ft232h-module-swd.cfg b/tcl/interface/ftdi/ft232h-module-swd.cfg index e85640bc6..98a8c844f 100644 --- a/tcl/interface/ftdi/ft232h-module-swd.cfg +++ b/tcl/interface/ftdi/ft232h-module-swd.cfg @@ -15,7 +15,7 @@ ftdi_vid_pid 0x0403 0x6014 ftdi_layout_init 0x0030 0x003b # 0xfff8 0xfffb # Those signal are only required on some platforms or may required to be -# enabled explicitely (e.g. nrf5x chips). +# enabled explicitly (e.g. nrf5x chips). ftdi_layout_signal nSRST -data 0x0010 -oe 0x0010 ftdi_layout_signal nTRST -data 0x0020 -oe 0x0020 diff --git a/tcl/mmr_helpers.tcl b/tcl/mmr_helpers.tcl index ce116e459..e6b1c6704 100644 --- a/tcl/mmr_helpers.tcl +++ b/tcl/mmr_helpers.tcl @@ -28,7 +28,7 @@ proc show_mmr32_reg { NAME } { } -# Give: NAMES - an array of names accessable +# Give: NAMES - an array of names accessible # in the callers symbol-scope. # VAL - the bits to display. diff --git a/tcl/target/aducm360.cfg b/tcl/target/aducm360.cfg index caee9654e..b381728f1 100644 --- a/tcl/target/aducm360.cfg +++ b/tcl/target/aducm360.cfg @@ -10,7 +10,7 @@ if { [info exists CHIPNAME] } { set _CHIPNAME aducm360 } -# Endianess +# Endianness if { [info exists ENDIAN] } { set _ENDIAN $ENDIAN } else { diff --git a/tcl/target/at91rm9200.cfg b/tcl/target/at91rm9200.cfg index 2e8c1e091..3d9a8d9b5 100644 --- a/tcl/target/at91rm9200.cfg +++ b/tcl/target/at91rm9200.cfg @@ -28,7 +28,7 @@ if { $_CPUTAPID == 0x15b0203f } { echo "- ERROR: -" echo "- ERROR: In one position (0x05b0203f) it selects the -" echo "- ERROR: ARM CPU, in the other position (0x1b0203f) -" - echo "- ERROR: it selects boundry-scan not the ARM -" + echo "- ERROR: it selects boundary-scan not the ARM -" echo "- ERROR: -" echo "-------------------------------------------------------" } diff --git a/tcl/target/c100config.tcl b/tcl/target/c100config.tcl index a72a2fa84..53b2c5d48 100644 --- a/tcl/target/c100config.tcl +++ b/tcl/target/c100config.tcl @@ -1,5 +1,5 @@ -# board(-config) specfic parameters file. +# board(-config) specific parameters file. # set CFG_REFCLKFREQ [configC100 CFG_REFCLKFREQ] proc config {label} { diff --git a/tcl/target/c100helper.tcl b/tcl/target/c100helper.tcl index 9da3730b4..725ba709c 100644 --- a/tcl/target/c100helper.tcl +++ b/tcl/target/c100helper.tcl @@ -15,7 +15,7 @@ proc helpC100 {} { echo "12) ooma_board_detect: will show which version of Telo you have" echo "13) setupDDR2: will configure DDR2 controller, you must have PLLs configureg" echo "14) showDDR2: will show DDR2 config registers" - echo "15) showWatchdog: will show current regster config for watchdog" + echo "15) showWatchdog: will show current register config for watchdog" echo "16) reboot: will trigger watchdog and reboot Telo (hw reset)" echo "17) bootNOR: will boot Telo from NOR" echo "18) setupUART0: will configure UART0 for 115200 8N1, PLLs have to be confiured" @@ -176,7 +176,7 @@ proc setupAmbaClk {} { mmw $CLKCORE_AHB_CLK_CNTRL 0x0 0xFFFFFF mmw $CLKCORE_AHB_CLK_CNTRL [expr (($x << 16) + ($w << 8) + $y)] 0x0 # wait for PLL to lock - echo "Wating for Amba PLL to lock" + echo "Waiting for Amba PLL to lock" while {[expr [mrw $CLKCORE_PLL_STATUS] & $AHBCLK_PLL_LOCK] == 0} { sleep 1 } # remove the internal PLL bypass mmw $CLKCORE_AHB_CLK_CNTRL 0x0 $AHB_PLL_BY_CTRL @@ -250,7 +250,7 @@ proc setupArmClk {} { mmw $CLKCORE_ARM_CLK_CNTRL 0x0 0xFFFFFF mmw $CLKCORE_ARM_CLK_CNTRL [expr (($x << 16) + ($w << 8) + $y)] 0x0 # wait for PLL to lock - echo "Wating for Amba PLL to lock" + echo "Waiting for Amba PLL to lock" while {[expr [mrw $CLKCORE_PLL_STATUS] & $FCLK_PLL_LOCK] == 0} { sleep 1 } # remove the internal PLL bypass mmw $CLKCORE_ARM_CLK_CNTRL 0x0 $ARM_PLL_BY_CTRL @@ -300,7 +300,7 @@ proc setupDDR2 {} { # Memory setup register mww $MEMORY_MAX_ADDR [expr ($ddr_size - 1) + $MEMORY_BASE_ADDR] - # disbale ROM remap + # disable ROM remap mww $MEMORY_CR 0x0 # Take DDR controller out of reset mmw $BLOCK_RESET_REG $DDR_RST 0x0 @@ -486,7 +486,7 @@ proc reboot {} { set TIMER_WDT_CURRENT_COUNT [regs TIMER_WDT_CURRENT_COUNT] # allow the counter to count to high value before triggering - # this is because regsiter writes are slow over JTAG and + # this is because register writes are slow over JTAG and # I don't want to miss the high_bound==curr_count condition mww $TIMER_WDT_HIGH_BOUND 0xffffff mww $TIMER_WDT_CURRENT_COUNT 0x0 @@ -494,7 +494,7 @@ proc reboot {} { adapter speed 100 mww $TIMER_WDT_CONTROL 0x1 # wait until the reset - echo -n "Wating for watchdog to trigger..." + echo -n "Waiting for watchdog to trigger..." #while {[mrw $TIMER_WDT_CONTROL] == 1} { # echo [format "TIMER_WDT_CURRENT_COUNT (0x%x): 0x%x" $TIMER_WDT_CURRENT_COUNT [mrw $TIMER_WDT_CURRENT_COUNT]] # sleep 1 diff --git a/tcl/target/dsp568013.cfg b/tcl/target/dsp568013.cfg index c0c1df2bc..40fa3c2b0 100644 --- a/tcl/target/dsp568013.cfg +++ b/tcl/target/dsp568013.cfg @@ -35,7 +35,7 @@ set _TARGETNAME $_CHIPNAME.cpu target create $_TARGETNAME dsp5680xx -endian $_ENDIAN -chain-position $_TARGETNAME # Setup the interesting tap -# Disable polling to be able to get idcode from core tap. If re enabled, can be re enabled, but it should be disabled to correctly unlock flash (operations requiere certain instruction to be in the IR register during reset, and polling would change this) +# Disable polling to be able to get idcode from core tap. If re enabled, can be re enabled, but it should be disabled to correctly unlock flash (operations require certain instruction to be in the IR register during reset, and polling would change this) jtag configure $_CHIPNAME.chp -event setup " jtag tapenable $_TARGETNAME poll off diff --git a/tcl/target/lpc2900.cfg b/tcl/target/lpc2900.cfg index 53677873a..523bc211f 100644 --- a/tcl/target/lpc2900.cfg +++ b/tcl/target/lpc2900.cfg @@ -14,7 +14,7 @@ if { [info exists CPUTAPID] } { if { [info exists HAS_ETB] } { } else { # Set default (no ETB). - # Show a warning, because this should have been configured explicitely. + # Show a warning, because this should have been configured explicitly. set HAS_ETB 0 # TODO: warning? } diff --git a/tcl/target/lpc3131.cfg b/tcl/target/lpc3131.cfg index 185c0aad8..d6f2cdbda 100644 --- a/tcl/target/lpc3131.cfg +++ b/tcl/target/lpc3131.cfg @@ -22,7 +22,7 @@ if { [info exists CPUTAPID] } { } # Scan Tap -# Wired to seperate STDO pin on the lpc3131, externally muxed to TDO on ea3131 module +# Wired to separate STDO pin on the lpc3131, externally muxed to TDO on ea3131 module # JTAGSEL pin must be 0 to activate, which reassigns arm tdo to a pass through. if { [info exists SJCTAPID] } { set _SJCTAPID $SJCTAPID diff --git a/tcl/target/stellaris.cfg b/tcl/target/stellaris.cfg index fb591c2bf..3cab4d140 100644 --- a/tcl/target/stellaris.cfg +++ b/tcl/target/stellaris.cfg @@ -164,7 +164,7 @@ $_TARGETNAME configure -event reset-start { } else { if {![using_hla]} { # Tempest and Firestorm default to using NVIC VECTRESET - # peripherals will need reseting manually, see proc reset_peripherals + # peripherals will need resetting manually, see proc reset_peripherals cortex_m reset_config vectreset } # reset peripherals, based on code in diff --git a/tcl/target/ti_cc3220sf.cfg b/tcl/target/ti_cc3220sf.cfg index 3e758e6ab..74269aa66 100644 --- a/tcl/target/ti_cc3220sf.cfg +++ b/tcl/target/ti_cc3220sf.cfg @@ -25,7 +25,7 @@ proc ocd_process_reset_inner { MODE } { soft_reset_halt - # Intialize MSP, PSP, and PC from vector table at flash 0x01000800 + # Initialize MSP, PSP, and PC from vector table at flash 0x01000800 mem2array boot 32 0x01000800 2 reg msp $boot(0) diff --git a/tcl/tools/firmware-recovery.tcl b/tcl/tools/firmware-recovery.tcl index 8b28656aa..9d7e0fce8 100644 --- a/tcl/tools/firmware-recovery.tcl +++ b/tcl/tools/firmware-recovery.tcl @@ -38,7 +38,7 @@ openocd -f interface/ftdi/tumpa.cfg -f tools/firmware-recovery.tcl \\ shutdown } -# set default, can be overriden later +# set default, can be overridden later adapter speed 1000 proc get_partition { name } { ----------------------------------------------------------------------- Summary of changes: tcl/board/alphascale_asm9260_ek.cfg | 2 +- tcl/board/at91sam9g20-ek.cfg | 2 +- tcl/board/icnova_imx53_sodimm.cfg | 2 +- tcl/board/imx35pdk.cfg | 4 ++-- tcl/board/imx53-m53evk.cfg | 2 +- tcl/board/imx53loco.cfg | 2 +- tcl/board/kindle2.cfg | 2 +- tcl/board/phone_se_j100i.cfg | 2 +- tcl/board/snps_em_sk.cfg | 2 +- tcl/board/snps_em_sk_v1.cfg | 2 +- tcl/board/snps_em_sk_v2.1.cfg | 2 +- tcl/board/snps_em_sk_v2.2.cfg | 2 +- tcl/board/steval_pcc010.cfg | 2 +- tcl/board/telo.cfg | 2 +- tcl/board/topas910.cfg | 2 +- tcl/board/topasa900.cfg | 2 +- tcl/board/twr-k60f120m.cfg | 2 +- tcl/board/twr-k60n512.cfg | 2 +- tcl/fpga/xilinx-xadc.cfg | 2 +- tcl/interface/ftdi/ft232h-module-swd.cfg | 2 +- tcl/mmr_helpers.tcl | 2 +- tcl/target/aducm360.cfg | 2 +- tcl/target/at91rm9200.cfg | 2 +- tcl/target/c100config.tcl | 2 +- tcl/target/c100helper.tcl | 12 ++++++------ tcl/target/dsp568013.cfg | 2 +- tcl/target/lpc2900.cfg | 2 +- tcl/target/lpc3131.cfg | 2 +- tcl/target/stellaris.cfg | 2 +- tcl/target/ti_cc3220sf.cfg | 2 +- tcl/tools/firmware-recovery.tcl | 2 +- 31 files changed, 37 insertions(+), 37 deletions(-) hooks/post-receive -- Main OpenOCD repository |
From: OpenOCD-Gerrit <ope...@us...> - 2020-05-09 13:38:07
|
This is an automated email from the git hooks/post-receive script. It was generated because a ref change was pushed to the repository containing the project "Main OpenOCD repository". The branch, master has been updated via 3a28cdc7cb790e388f0e142510858bee0b642597 (commit) via 307ee6db473b3e92597ee69863f5428a37a8a941 (commit) from 4738a55da416176542efa1b554020de275a5b4e5 (commit) Those revisions listed above that are new to this repository have not appeared on any other notification email; so we list those revisions in full, below. - Log ----------------------------------------------------------------- commit 3a28cdc7cb790e388f0e142510858bee0b642597 Author: Antonio Borneo <bor...@gm...> Date: Sun Apr 26 01:39:16 2020 +0200 doc: fix typo and spelling Identified by checkpatch script from Linux kernel v5.7-rc1 using the command find doc/ -type f -exec ./tools/scripts/checkpatch.pl \ -q --types TYPO_SPELLING --strict -f {} \; Change-Id: I1269ac966027439e16eb6e63179e43925bec37fa Signed-off-by: Antonio Borneo <bor...@gm...> Reviewed-on: http://openocd.zylin.com/5614 Reviewed-by: Andreas Fritiofson <and...@gm...> Tested-by: jenkins diff --git a/doc/manual/target/mips.txt b/doc/manual/target/mips.txt index 5121d1276..25978a3d5 100644 --- a/doc/manual/target/mips.txt +++ b/doc/manual/target/mips.txt @@ -395,7 +395,7 @@ for (i = 0; i < count; i++) Each time when OpenOCD fills data to CPU (via dongle, via dmseg), CPU takes it and proceeds in executing the handler. However, since handler is in a assembly loop, CPU comes to next instruction which also fetches data from FASTDATA area. So it stalls. -Then OpenOCD fills the data again, from it's (OpenOCD's) loop. And this game continues untill all the data has been filled. +Then OpenOCD fills the data again, from it's (OpenOCD's) loop. And this game continues until all the data has been filled. After the last data has been given to CPU it sees that it reached the end address, so it proceeds with next instruction. However, this instruction do not point into dmseg, so CPU executes bunch of handler instructions (all prologue) and in the end jumps to MIPS32_PRACC_TEXT address. diff --git a/doc/openocd.texi b/doc/openocd.texi index f3f963ecd..ef77993ec 100644 --- a/doc/openocd.texi +++ b/doc/openocd.texi @@ -1474,7 +1474,7 @@ While the default is normally provided by the chip manufacturer, board files may need to distinguish between instances of a chip. @item @code{ENDIAN} ... By default @option{little} - although chips may hard-wire @option{big}. -Chips that can't change endianess don't need to use this variable. +Chips that can't change endianness don't need to use this variable. @item @code{CPUTAPID} ... When OpenOCD examines the JTAG chain, it can be told verify the chips against the JTAG IDCODE register. @@ -6459,7 +6459,7 @@ code. @end deffn @deffn Command {nrf5 info} -Decodes and shows informations from FICR and UICR registers. +Decodes and shows information from FICR and UICR registers. @end deffn @end deffn @@ -9774,7 +9774,7 @@ or a custom types described with @command{arc add-reg-type-[flags|struct]}. @item @code{-g} @* If specified then this is a "general" register. General registers are always read by OpenOCD on context save (when core has just been halted) and is always -transfered to GDB client in a response to g-packet. Contrary to this, +transferred to GDB client in a response to g-packet. Contrary to this, non-general registers are read and sent to GDB client on-demand. In general it is not recommended to apply this option to custom registers. @@ -9815,7 +9815,7 @@ therefore it is unsafe to use if that register can be operated by other means. @end deffn @deffn {Command} {arc jtag set-core-reg} regnum value -This command is similiar to @command{arc jtag set-aux-reg} but is for core +This command is similar to @command{arc jtag set-aux-reg} but is for core registers. @end deffn @@ -9827,7 +9827,7 @@ therefore it is unsafe to use if that register can be operated by other means. @end deffn @deffn {Command} {arc jtag get-core-reg} regnum -This command is similiar to @command{arc jtag get-aux-reg} but is for core +This command is similar to @command{arc jtag get-aux-reg} but is for core registers. @end deffn commit 307ee6db473b3e92597ee69863f5428a37a8a941 Author: Antonio Borneo <bor...@gm...> Date: Mon Apr 27 16:52:31 2020 +0200 doc: fix texinfo warning on @deffn not at the line beginning Commit 87a4158acf56 ("drivers: xds110: Clean up command syntax and documentation") does not follow the documentation structure that lists the adapters in cpt 2 "Debug Adapter Hardware" then lists the adapter commands in cpt 8.2 "Interface Drivers"; it puts all in cpt 2. While doing that, uses an incorrect texinfo syntax that causes the following warnings at compile time: doc/openocd.texi:543: warning: @deffn should only appear at the beginning of a line doc/openocd.texi:547: warning: @deffn should only appear at the beginning of a line doc/openocd.texi:552: warning: @deffn should only appear at the beginning of a line Move the documentation of xds110 commands in the proper chapter and fix the texinfo syntax. Change-Id: I0b3f0fe0c687f194bb02e2d81aca86fcd4fdd718 Signed-off-by: Antonio Borneo <bor...@gm...> Fixes: 87a4158acf56 ("drivers: xds110: Clean up command syntax and documentation") Reviewed-on: http://openocd.zylin.com/5613 Tested-by: jenkins Reviewed-by: Andreas Fritiofson <and...@gm...> Reviewed-by: Edward Fewell <ef...@ti...> diff --git a/doc/openocd.texi b/doc/openocd.texi index 2dbe770ad..f3f963ecd 100644 --- a/doc/openocd.texi +++ b/doc/openocd.texi @@ -536,24 +536,6 @@ debuggers to ARM Cortex based targets @url{http://www.keil.com/support/man/docs/ @* Link: @url{http://www.keil.com/ulink1/} @item @b{TI XDS110 Debug Probe} -@* The XDS110 is included as the embedded debug probe on many Texas Instruments -LaunchPad evaluation boards. The XDS110 is also available as a stand-alone USB -debug probe with the added capability to supply power to the target board. The -following commands are supported by the XDS110 driver: -@*@deffn {Config Command} {xds110 serial} serial_string -Specifies the serial number of which XDS110 probe to use. Otherwise, the first -XDS110 found will be used. -@end deffn -@*@deffn {Config Command} {xds110 supply} voltage_in_millivolts -Available only on the XDS110 stand-alone probe. Sets the voltage level of the -XDS110 power supply. A value of 0 leaves the supply off. Otherwise, the supply -can be set to any value in the range 1800 to 3600 millivolts. -@end deffn -@*@deffn {Command} {xds110 info} -Displays information about the connected XDS110 debug probe (e.g. firmware -version). -@end deffn -@* Further information can be found at the following sites: @* Link: @url{https://software-dl.ti.com/ccs/esd/documents/xdsdebugprobes/emu_xds110.html} @* Link: @url{https://software-dl.ti.com/ccs/esd/documents/xdsdebugprobes/emu_xds_software_package_download.html#xds110-support-utilities} @end itemize @@ -3141,6 +3123,29 @@ opendous-jtag is a freely programmable USB adapter. This is the Keil ULINK v1 JTAG debugger. @end deffn +@deffn {Interface Driver} {xds110} +The XDS110 is included as the embedded debug probe on many Texas Instruments +LaunchPad evaluation boards. The XDS110 is also available as a stand-alone USB +debug probe with the added capability to supply power to the target board. The +following commands are supported by the XDS110 driver: + +@deffn {Config Command} {xds110 serial} serial_string +Specifies the serial number of which XDS110 probe to use. Otherwise, the first +XDS110 found will be used. +@end deffn + +@deffn {Config Command} {xds110 supply} voltage_in_millivolts +Available only on the XDS110 stand-alone probe. Sets the voltage level of the +XDS110 power supply. A value of 0 leaves the supply off. Otherwise, the supply +can be set to any value in the range 1800 to 3600 millivolts. +@end deffn + +@deffn {Command} {xds110 info} +Displays information about the connected XDS110 debug probe (e.g. firmware +version). +@end deffn +@end deffn + @deffn {Interface Driver} {xlnx_pcie_xvc} This driver supports the Xilinx Virtual Cable (XVC) over PCI Express. It is commonly found in Xilinx based PCI Express designs. It allows debugging ----------------------------------------------------------------------- Summary of changes: doc/manual/target/mips.txt | 2 +- doc/openocd.texi | 51 +++++++++++++++++++++++++--------------------- 2 files changed, 29 insertions(+), 24 deletions(-) hooks/post-receive -- Main OpenOCD repository |
From: OpenOCD-Gerrit <ope...@us...> - 2020-05-09 13:37:35
|
This is an automated email from the git hooks/post-receive script. It was generated because a ref change was pushed to the repository containing the project "Main OpenOCD repository". The branch, master has been updated via 4738a55da416176542efa1b554020de275a5b4e5 (commit) via 8807a5937e5fe5d09828c3e535beafb48e171621 (commit) via 2a8303b0bd1ea10b1a60891cbff24d717a985f6f (commit) from fdad56ecb02e072245bbcf86d9a6b506149c6a25 (commit) Those revisions listed above that are new to this repository have not appeared on any other notification email; so we list those revisions in full, below. - Log ----------------------------------------------------------------- commit 4738a55da416176542efa1b554020de275a5b4e5 Author: Antonio Borneo <bor...@gm...> Date: Mon Apr 27 23:19:14 2020 +0200 helper/ioutil: silence gcc-8 on strncpy Starting from version 8, gcc issues a warning if strncpy could be able to truncate a string (so without adding the zero-termination char in destination) by copying exactly "size" char from a source string not shorter than "size". Such truncation from strncpy could actually be the desired code behaviour, but the way to silent gcc only locally (without global disabling with -Wno-stringop-truncation) through pragma has other side effects on portability. In current code, the source string is always "eth0", because has been checked right above. So this is a false positive from gcc, being always strlen("eth0") < 16, the sizeof(ifreq.ifr_name). Silent gcc by decrementing the "size" and remove: error: âstrncpyâ specified bound 16 equals destination size [-Werror=stringop-truncation] This file is only optionally compiled together with ZY1000 driver with --enable-zy1000 --enable-ioutil. This combination is not checked in jenkins, so the error passed unnoticed. Plus, the configure flags above are both deprecated! Change-Id: I229e66227cfd3513139feeaffa47a6e1ec00767b Signed-off-by: Antonio Borneo <bor...@gm...> Reviewed-on: http://openocd.zylin.com/5631 Tested-by: jenkins Reviewed-by: Andreas Fritiofson <and...@gm...> diff --git a/src/helper/ioutil.c b/src/helper/ioutil.c index d4f39e242..c103ce173 100644 --- a/src/helper/ioutil.c +++ b/src/helper/ioutil.c @@ -403,7 +403,7 @@ static int ioutil_Jim_Command_mac(Jim_Interp *interp, int argc, { if (strcmp("eth0", ifr->ifr_name) != 0) continue; - strncpy(ifreq.ifr_name, ifr->ifr_name, sizeof(ifreq.ifr_name)); + strncpy(ifreq.ifr_name, ifr->ifr_name, sizeof(ifreq.ifr_name) - 1); if (ioctl(SockFD, SIOCGIFHWADDR, &ifreq) < 0) { close(SockFD); return JIM_ERR; commit 8807a5937e5fe5d09828c3e535beafb48e171621 Author: Antonio Borneo <bor...@gm...> Date: Fri May 1 18:30:00 2020 +0200 helper/command: register all commands through register_commands() The commands "ocd_find" and "capture" are registered directly through the jim API, instead of the common way to describe them in a struct command_registration that is then passed to the helper register_commands(). This cause the two commands above to not have either "help" nor "usage" string nor a properly identified "mode". Since the following line registers the commands listed in struct command_builtin_handlers, simply add the two commands above in the same struct. Change-Id: Id6ee11dac3b18364deeed65ee8e18ad80152750a Signed-off-by: Antonio Borneo <bor...@gm...> Reviewed-on: http://openocd.zylin.com/5644 Tested-by: jenkins Reviewed-by: Tomas Vanek <va...@fb...> diff --git a/src/helper/command.c b/src/helper/command.c index ec07a5fef..0882ecd58 100644 --- a/src/helper/command.c +++ b/src/helper/command.c @@ -1229,6 +1229,21 @@ static const struct command_registration command_subcommand_handlers[] = { }; static const struct command_registration command_builtin_handlers[] = { + { + .name = "ocd_find", + .mode = COMMAND_ANY, + .jim_handler = jim_find, + .help = "find full path to file", + .usage = "file", + }, + { + .name = "capture", + .mode = COMMAND_ANY, + .jim_handler = jim_capture, + .help = "Capture progress output and return as tcl return value. If the " + "progress output was empty, return tcl return value.", + .usage = "command", + }, { .name = "echo", .handler = jim_echo, @@ -1339,9 +1354,6 @@ struct command_context *command_init(const char *startup_tcl, Jim_Interp *interp Jim_SetGlobalVariableStr(interp, "ocd_HOSTOS", Jim_NewStringObj(interp, HostOs, strlen(HostOs))); - Jim_CreateCommand(interp, "ocd_find", jim_find, NULL, NULL); - Jim_CreateCommand(interp, "capture", jim_capture, NULL, NULL); - register_commands(context, NULL, command_builtin_handlers); Jim_SetAssocData(interp, "context", NULL, context); commit 2a8303b0bd1ea10b1a60891cbff24d717a985f6f Author: Antonio Borneo <bor...@gm...> Date: Tue May 5 18:11:47 2020 +0200 tcl: stm32mp15x: fix "reset halt" on CM4 in engineering boot The state machine of cortex-m have to pass through a set of state before it get in "halted". Add one more "arp_poll" to achieve the proper state during a "reset halt" command in engineering boot. Change-Id: I90828bf20ef75bd4018f8b911f727ae69c4d6e8f Signed-off-by: Antonio Borneo <bor...@gm...> Reviewed-on: http://openocd.zylin.com/5649 Tested-by: jenkins Reviewed-by: Richard Braun <rb...@sc...> diff --git a/tcl/target/stm32mp15x.cfg b/tcl/target/stm32mp15x.cfg index a11f6665e..f2ba94eec 100644 --- a/tcl/target/stm32mp15x.cfg +++ b/tcl/target/stm32mp15x.cfg @@ -114,7 +114,7 @@ $_CHIPNAME.ap2 configure -event reset-deassert-pre {dbgmcu_enable_debug} $_CHIPNAME.cpu0 configure -event reset-deassert-pre {$::_CHIPNAME.cpu0 arp_examine} $_CHIPNAME.cpu1 configure -event reset-deassert-pre {$::_CHIPNAME.cpu1 arp_examine allow-defer} $_CHIPNAME.cpu0 configure -event reset-deassert-post {toggle_cpu0_dbg_claim0} -$_CHIPNAME.cm4 configure -event reset-deassert-post {$::_CHIPNAME.cm4 arp_examine;if {[$::_CHIPNAME.ap2 curstate] == "halted"} {$::_CHIPNAME.cm4 arp_poll;$::_CHIPNAME.cm4 arp_halt}} +$_CHIPNAME.cm4 configure -event reset-deassert-post {$::_CHIPNAME.cm4 arp_examine;if {[$::_CHIPNAME.ap2 curstate] == "halted"} {$::_CHIPNAME.cm4 arp_poll;$::_CHIPNAME.cm4 arp_poll;$::_CHIPNAME.cm4 arp_halt}} $_CHIPNAME.ap1 configure -event examine-start {dap init} $_CHIPNAME.ap2 configure -event examine-start {dbgmcu_enable_debug} $_CHIPNAME.cpu0 configure -event examine-end {detect_cpu1} ----------------------------------------------------------------------- Summary of changes: src/helper/command.c | 18 +++++++++++++++--- src/helper/ioutil.c | 2 +- tcl/target/stm32mp15x.cfg | 2 +- 3 files changed, 17 insertions(+), 5 deletions(-) hooks/post-receive -- Main OpenOCD repository |
From: OpenOCD-Gerrit <ope...@us...> - 2020-05-09 13:37:02
|
This is an automated email from the git hooks/post-receive script. It was generated because a ref change was pushed to the repository containing the project "Main OpenOCD repository". The branch, master has been updated via fdad56ecb02e072245bbcf86d9a6b506149c6a25 (commit) from 82f71aa274fbb45cd3e86bce08e01c7015b05a59 (commit) Those revisions listed above that are new to this repository have not appeared on any other notification email; so we list those revisions in full, below. - Log ----------------------------------------------------------------- commit fdad56ecb02e072245bbcf86d9a6b506149c6a25 Author: Marc Schink <de...@za...> Date: Tue Jan 28 21:40:37 2020 +0100 flash/nor/efm32: Some small code cleanups Change-Id: I547970ce31435f75bae01d6d2cc96ebc9c15588c Signed-off-by: Marc Schink <de...@za...> Reviewed-on: http://openocd.zylin.com/5420 Tested-by: jenkins Reviewed-by: Antonio Borneo <bor...@gm...> diff --git a/src/flash/nor/efm32.c b/src/flash/nor/efm32.c index 9cdc32573..fe4ddd47e 100644 --- a/src/flash/nor/efm32.c +++ b/src/flash/nor/efm32.c @@ -99,7 +99,7 @@ struct efm32_family_data { }; struct efm32x_flash_bank { - int probed; + bool probed; uint32_t lb_page[LOCKBITS_PAGE_SZ/4]; uint32_t reg_base; uint32_t reg_lock; @@ -351,7 +351,7 @@ FLASH_BANK_COMMAND_HANDLER(efm32x_flash_bank_command) efm32x_info = malloc(sizeof(struct efm32x_flash_bank)); bank->driver_priv = efm32x_info; - efm32x_info->probed = 0; + efm32x_info->probed = false; memset(efm32x_info->lb_page, 0xff, LOCKBITS_PAGE_SZ); return ERROR_OK; @@ -470,7 +470,6 @@ static int efm32x_erase_page(struct flash_bank *bank, uint32_t addr) static int efm32x_erase(struct flash_bank *bank, int first, int last) { struct target *target = bank->target; - int i = 0; int ret = 0; if (TARGET_HALTED != target->state) { @@ -485,7 +484,7 @@ static int efm32x_erase(struct flash_bank *bank, int first, int last) return ret; } - for (i = first; i <= last; i++) { + for (int i = first; i <= last; i++) { ret = efm32x_erase_page(bank, bank->sectors[i].offset); if (ERROR_OK != ret) LOG_ERROR("Failed to erase page %d", i); @@ -501,7 +500,6 @@ static int efm32x_read_lock_data(struct flash_bank *bank) { struct efm32x_flash_bank *efm32x_info = bank->driver_priv; struct target *target = bank->target; - int i = 0; int data_size = 0; uint32_t *ptr = NULL; int ret = 0; @@ -513,7 +511,7 @@ static int efm32x_read_lock_data(struct flash_bank *bank) ptr = efm32x_info->lb_page; - for (i = 0; i < data_size; i++, ptr++) { + for (int i = 0; i < data_size; i++, ptr++) { ret = target_read_u32(target, EFM32_MSC_LOCK_BITS+i*4, ptr); if (ERROR_OK != ret) { LOG_ERROR("Failed to read PLW %d", i); @@ -619,7 +617,6 @@ static int efm32x_set_page_lock(struct flash_bank *bank, size_t page, int set) static int efm32x_protect(struct flash_bank *bank, int set, int first, int last) { struct target *target = bank->target; - int i = 0; int ret = 0; if (!set) { @@ -632,7 +629,7 @@ static int efm32x_protect(struct flash_bank *bank, int set, int first, int last) return ERROR_TARGET_NOT_HALTED; } - for (i = first; i <= last; i++) { + for (int i = first; i <= last; i++) { ret = efm32x_set_page_lock(bank, i, set); if (ERROR_OK != ret) { LOG_ERROR("Failed to set lock on page %d", i); @@ -963,11 +960,10 @@ static int efm32x_probe(struct flash_bank *bank) struct efm32x_flash_bank *efm32x_info = bank->driver_priv; struct efm32_info efm32_mcu_info; int ret; - int i; uint32_t base_address = 0x00000000; char buf[256]; - efm32x_info->probed = 0; + efm32x_info->probed = false; memset(efm32x_info->lb_page, 0xff, LOCKBITS_PAGE_SZ); ret = efm32x_read_info(bank, &efm32_mcu_info); @@ -1006,14 +1002,14 @@ static int efm32x_probe(struct flash_bank *bank) bank->sectors = malloc(sizeof(struct flash_sector) * num_pages); - for (i = 0; i < num_pages; i++) { + for (int i = 0; i < num_pages; i++) { bank->sectors[i].offset = i * efm32_mcu_info.page_size; bank->sectors[i].size = efm32_mcu_info.page_size; bank->sectors[i].is_erased = -1; bank->sectors[i].is_protected = 1; } - efm32x_info->probed = 1; + efm32x_info->probed = true; return ERROR_OK; } @@ -1030,7 +1026,6 @@ static int efm32x_protect_check(struct flash_bank *bank) { struct target *target = bank->target; int ret = 0; - int i = 0; if (target->state != TARGET_HALTED) { LOG_ERROR("Target not halted"); @@ -1045,7 +1040,7 @@ static int efm32x_protect_check(struct flash_bank *bank) assert(NULL != bank->sectors); - for (i = 0; i < bank->num_sectors; i++) + for (int i = 0; i < bank->num_sectors; i++) bank->sectors[i].is_protected = efm32x_get_page_lock(bank, i); return ERROR_OK; ----------------------------------------------------------------------- Summary of changes: src/flash/nor/efm32.c | 23 +++++++++-------------- 1 file changed, 9 insertions(+), 14 deletions(-) hooks/post-receive -- Main OpenOCD repository |
From: OpenOCD-Gerrit <ope...@us...> - 2020-05-09 13:36:26
|
This is an automated email from the git hooks/post-receive script. It was generated because a ref change was pushed to the repository containing the project "Main OpenOCD repository". The branch, master has been updated via 82f71aa274fbb45cd3e86bce08e01c7015b05a59 (commit) from 6f91aae1592c5ca8707b22a7cf0b54979f579cae (commit) Those revisions listed above that are new to this repository have not appeared on any other notification email; so we list those revisions in full, below. - Log ----------------------------------------------------------------- commit 82f71aa274fbb45cd3e86bce08e01c7015b05a59 Author: Marc Schink <ope...@ma...> Date: Wed Apr 13 13:36:26 2016 +0200 server/telnet: Fix history output Restore the prompt after the "history" command is invoked. Change-Id: I3d0744abbc58e82b039e06f21675efa180e8e1b0 Signed-off-by: Marc Schink <ope...@ma...> Reviewed-on: http://openocd.zylin.com/3414 Tested-by: jenkins Reviewed-by: Marc Schink <de...@za...> Reviewed-by: Antonio Borneo <bor...@gm...> diff --git a/src/server/telnet_server.c b/src/server/telnet_server.c index bfabae833..d0583a9b3 100644 --- a/src/server/telnet_server.c +++ b/src/server/telnet_server.c @@ -312,6 +312,36 @@ static void telnet_history_down(struct connection *connection) telnet_history_go(connection, next_history); } +static int telnet_history_print(struct connection *connection) +{ + struct telnet_connection *tc; + + tc = connection->priv; + + for (size_t i = 1; i < TELNET_LINE_HISTORY_SIZE; i++) { + char *line; + + /* + * The tc->next_history line contains empty string (unless NULL), thus + * it is not printed. + */ + line = tc->history[(tc->next_history + i) % TELNET_LINE_HISTORY_SIZE]; + + if (line) { + telnet_write(connection, line, strlen(line)); + telnet_write(connection, "\r\n\x00", 3); + } + } + + tc->line_size = 0; + tc->line_cursor = 0; + + /* The prompt is always placed at the line beginning. */ + telnet_write(connection, "\r", 1); + + return telnet_prompt(connection); +} + static void telnet_move_cursor(struct connection *connection, size_t pos) { struct telnet_connection *tc; @@ -407,21 +437,11 @@ static int telnet_input(struct connection *connection) telnet_write(connection, "\r\n\x00", 3); if (strcmp(t_con->line, "history") == 0) { - size_t i; - for (i = 1; i < TELNET_LINE_HISTORY_SIZE; i++) { - /* the t_con->next_history line contains empty string - * (unless NULL), thus it is not printed */ - char *history_line = t_con->history[(t_con-> - next_history + i) % - TELNET_LINE_HISTORY_SIZE]; - if (history_line) { - telnet_write(connection, history_line, - strlen(history_line)); - telnet_write(connection, "\r\n\x00", 3); - } - } - t_con->line_size = 0; - t_con->line_cursor = 0; + retval = telnet_history_print(connection); + + if (retval != ERROR_OK) + return retval; + continue; } ----------------------------------------------------------------------- Summary of changes: src/server/telnet_server.c | 50 ++++++++++++++++++++++++++++++++-------------- 1 file changed, 35 insertions(+), 15 deletions(-) hooks/post-receive -- Main OpenOCD repository |
From: OpenOCD-Gerrit <ope...@us...> - 2020-05-09 13:35:37
|
This is an automated email from the git hooks/post-receive script. It was generated because a ref change was pushed to the repository containing the project "Main OpenOCD repository". The branch, master has been updated via 6f91aae1592c5ca8707b22a7cf0b54979f579cae (commit) via 22797616aca1eaf378760fd255a0b84da979cf3a (commit) from ed8d4a2e3b5ac5d5ac9ef7933a1d81b32d32ab7f (commit) Those revisions listed above that are new to this repository have not appeared on any other notification email; so we list those revisions in full, below. - Log ----------------------------------------------------------------- commit 6f91aae1592c5ca8707b22a7cf0b54979f579cae Author: Tarek BOCHKATI <tar...@gm...> Date: Sun Apr 26 20:21:16 2020 +0100 hla: remove unused hl_interface_param_s.api Change-Id: I90a23293c7e3a6067d56e56d186f9f452af7c15e Signed-off-by: Tarek BOCHKATI <tar...@gm...> Reviewed-on: http://openocd.zylin.com/5611 Reviewed-by: Antonio Borneo <bor...@gm...> Tested-by: jenkins diff --git a/src/jtag/hla/hla_interface.c b/src/jtag/hla/hla_interface.c index 95233c0d7..6d5cdc5e7 100644 --- a/src/jtag/hla/hla_interface.c +++ b/src/jtag/hla/hla_interface.c @@ -35,7 +35,7 @@ #include <target/target.h> -static struct hl_interface_s hl_if = { {0, 0, { 0 }, { 0 }, 0, HL_TRANSPORT_UNKNOWN, false, -1}, 0, 0 }; +static struct hl_interface_s hl_if = { {0, 0, { 0 }, { 0 }, HL_TRANSPORT_UNKNOWN, false, -1}, 0, 0 }; int hl_interface_open(enum hl_transports tr) { diff --git a/src/jtag/hla/hla_interface.h b/src/jtag/hla/hla_interface.h index 262025e98..b6e4a8b92 100644 --- a/src/jtag/hla/hla_interface.h +++ b/src/jtag/hla/hla_interface.h @@ -41,8 +41,6 @@ struct hl_interface_param_s { /** List of recognised PIDs */ uint16_t pid[HLA_MAX_USB_IDS + 1]; /** */ - unsigned api; - /** */ enum hl_transports transport; /** */ bool connect_under_reset; commit 22797616aca1eaf378760fd255a0b84da979cf3a Author: Marc Schink <de...@za...> Date: Thu Feb 20 21:54:18 2020 +0100 flash/nor/avrf: Minor code cleanups Change-Id: I64aa8e41f336584b524445e0ee7f986a0032852a Signed-off-by: Marc Schink <de...@za...> Reviewed-on: http://openocd.zylin.com/5461 Tested-by: jenkins Reviewed-by: Lars Poeschel <poe...@ma...> Reviewed-by: Antonio Borneo <bor...@gm...> diff --git a/src/flash/nor/avrf.c b/src/flash/nor/avrf.c index de8c563c6..93f6872bd 100644 --- a/src/flash/nor/avrf.c +++ b/src/flash/nor/avrf.c @@ -58,7 +58,7 @@ struct avrf_type { struct avrf_flash_bank { int ppage_size; - int probed; + bool probed; }; static const struct avrf_type avft_chips_info[] = { @@ -149,7 +149,7 @@ static int avr_jtagprg_writeflashpage(struct avr_common *avr, uint32_t addr, uint32_t page_size) { - uint32_t i, poll_value; + uint32_t poll_value; avr_jtag_sendinstr(avr->jtag_info.tap, NULL, AVR_JTAG_INS_PROG_COMMANDS); avr_jtag_senddat(avr->jtag_info.tap, NULL, 0x2310, AVR_JTAG_REG_ProgrammingCommand_Len); @@ -175,7 +175,7 @@ static int avr_jtagprg_writeflashpage(struct avr_common *avr, avr_jtag_sendinstr(avr->jtag_info.tap, NULL, AVR_JTAG_INS_PROG_PAGELOAD); - for (i = 0; i < page_size; i++) { + for (uint32_t i = 0; i < page_size; i++) { if (i < buf_size) avr_jtag_senddat(avr->jtag_info.tap, NULL, page_buf[i], 8); else @@ -213,7 +213,7 @@ FLASH_BANK_COMMAND_HANDLER(avrf_flash_bank_command) avrf_info = malloc(sizeof(struct avrf_flash_bank)); bank->driver_priv = avrf_info; - avrf_info->probed = 0; + avrf_info->probed = false; return ERROR_OK; } @@ -304,7 +304,6 @@ static int avrf_probe(struct flash_bank *bank) struct avrf_flash_bank *avrf_info = bank->driver_priv; struct avr_common *avr = target->arch_info; const struct avrf_type *avr_info = NULL; - int i; uint32_t device_id; if (bank->target->state != TARGET_HALTED) { @@ -312,7 +311,7 @@ static int avrf_probe(struct flash_bank *bank) return ERROR_TARGET_NOT_HALTED; } - avrf_info->probed = 0; + avrf_info->probed = false; avr_jtag_read_jtagid(avr, &device_id); if (ERROR_OK != mcu_execute_queue()) @@ -324,7 +323,7 @@ static int avrf_probe(struct flash_bank *bank) EXTRACT_MFG(device_id), 0x1F); - for (i = 0; i < (int)ARRAY_SIZE(avft_chips_info); i++) { + for (size_t i = 0; i < ARRAY_SIZE(avft_chips_info); i++) { if (avft_chips_info[i].chip_id == EXTRACT_PART(device_id)) { avr_info = &avft_chips_info[i]; LOG_INFO("target device is %s", avr_info->name); @@ -344,20 +343,20 @@ static int avrf_probe(struct flash_bank *bank) bank->num_sectors = avr_info->flash_page_num; bank->sectors = malloc(sizeof(struct flash_sector) * avr_info->flash_page_num); - for (i = 0; i < avr_info->flash_page_num; i++) { + for (int i = 0; i < avr_info->flash_page_num; i++) { bank->sectors[i].offset = i * avr_info->flash_page_size; bank->sectors[i].size = avr_info->flash_page_size; bank->sectors[i].is_erased = -1; bank->sectors[i].is_protected = -1; } - avrf_info->probed = 1; + avrf_info->probed = true; return ERROR_OK; } else { /* chip not supported */ LOG_ERROR("0x%" PRIx32 " is not support for avr", EXTRACT_PART(device_id)); - avrf_info->probed = 1; + avrf_info->probed = true; return ERROR_FAIL; } } @@ -375,7 +374,6 @@ static int avrf_info(struct flash_bank *bank, char *buf, int buf_size) struct target *target = bank->target; struct avr_common *avr = target->arch_info; const struct avrf_type *avr_info = NULL; - int i; uint32_t device_id; if (bank->target->state != TARGET_HALTED) { @@ -393,7 +391,7 @@ static int avrf_info(struct flash_bank *bank, char *buf, int buf_size) EXTRACT_MFG(device_id), 0x1F); - for (i = 0; i < (int)ARRAY_SIZE(avft_chips_info); i++) { + for (size_t i = 0; i < ARRAY_SIZE(avft_chips_info); i++) { if (avft_chips_info[i].chip_id == EXTRACT_PART(device_id)) { avr_info = &avft_chips_info[i]; LOG_INFO("target device is %s", avr_info->name); @@ -434,8 +432,6 @@ static int avrf_mass_erase(struct flash_bank *bank) COMMAND_HANDLER(avrf_handle_mass_erase_command) { - int i; - if (CMD_ARGC < 1) return ERROR_COMMAND_SYNTAX_ERROR; @@ -446,7 +442,7 @@ COMMAND_HANDLER(avrf_handle_mass_erase_command) if (avrf_mass_erase(bank) == ERROR_OK) { /* set all sectors as erased */ - for (i = 0; i < bank->num_sectors; i++) + for (int i = 0; i < bank->num_sectors; i++) bank->sectors[i].is_erased = 1; command_print(CMD, "avr mass erase complete"); ----------------------------------------------------------------------- Summary of changes: src/flash/nor/avrf.c | 26 +++++++++++--------------- src/jtag/hla/hla_interface.c | 2 +- src/jtag/hla/hla_interface.h | 2 -- 3 files changed, 12 insertions(+), 18 deletions(-) hooks/post-receive -- Main OpenOCD repository |
From: OpenOCD-Gerrit <ope...@us...> - 2020-05-09 13:35:06
|
This is an automated email from the git hooks/post-receive script. It was generated because a ref change was pushed to the repository containing the project "Main OpenOCD repository". The branch, master has been updated via ed8d4a2e3b5ac5d5ac9ef7933a1d81b32d32ab7f (commit) from da41bce3aee99f1fd2c661f874c90d20b4fefa04 (commit) Those revisions listed above that are new to this repository have not appeared on any other notification email; so we list those revisions in full, below. - Log ----------------------------------------------------------------- commit ed8d4a2e3b5ac5d5ac9ef7933a1d81b32d32ab7f Author: Marc Schink <de...@za...> Date: Thu Feb 20 21:49:17 2020 +0100 flash/nor/kinetis: Minor code cleanups Change-Id: Id74cb6c238b803d1a1566fc615e22ea478f2e15e Signed-off-by: Marc Schink <de...@za...> Reviewed-on: http://openocd.zylin.com/5459 Tested-by: jenkins Reviewed-by: Lars Poeschel <poe...@ma...> Reviewed-by: Antonio Borneo <bor...@gm...> diff --git a/src/flash/nor/kinetis.c b/src/flash/nor/kinetis.c index 1d6335282..bceaf8474 100644 --- a/src/flash/nor/kinetis.c +++ b/src/flash/nor/kinetis.c @@ -787,9 +787,8 @@ COMMAND_HANDLER(kinetis_check_flash_security_status) if ((val & (MDM_STAT_SYSSEC | MDM_STAT_FREADY)) != MDM_STAT_FREADY) { uint32_t stats[32]; - int i; - for (i = 0; i < 32; i++) { + for (unsigned int i = 0; i < 32; i++) { stats[i] = MDM_STAT_FREADY; dap_queue_ap_read(dap_ap(dap, MDM_AP), MDM_REG_STAT, &stats[i]); } @@ -798,7 +797,7 @@ COMMAND_HANDLER(kinetis_check_flash_security_status) LOG_DEBUG("MDM: dap_run failed when validating secured state"); return ERROR_OK; } - for (i = 0; i < 32; i++) { + for (unsigned int i = 0; i < 32; i++) { if (stats[i] & MDM_STAT_SYSSEC) secured_score++; if (!(stats[i] & MDM_STAT_FREADY)) @@ -860,8 +859,7 @@ static struct kinetis_chip *kinetis_get_chip(struct target *target) static int kinetis_chip_options(struct kinetis_chip *k_chip, int argc, const char *argv[]) { - int i; - for (i = 0; i < argc; i++) { + for (int i = 0; i < argc; i++) { if (strcmp(argv[i], "-sim-base") == 0) { if (i + 1 < argc) k_chip->sim_base = strtoul(argv[++i], NULL, 0); @@ -933,7 +931,6 @@ static void kinetis_free_driver_priv(struct flash_bank *bank) static int kinetis_create_missing_banks(struct kinetis_chip *k_chip) { - unsigned bank_idx; unsigned num_blocks; struct kinetis_flash_bank *k_bank; struct flash_bank *bank; @@ -968,7 +965,7 @@ static int kinetis_create_missing_banks(struct kinetis_chip *k_chip) *p = '\0'; } - for (bank_idx = 1; bank_idx < num_blocks; bank_idx++) { + for (unsigned int bank_idx = 1; bank_idx < num_blocks; bank_idx++) { k_bank = &(k_chip->banks[bank_idx]); bank = k_bank->bank; @@ -1219,11 +1216,11 @@ static int kinetis_ftfx_clear_error(struct target *target) static int kinetis_ftfx_prepare(struct target *target) { - int result, i; + int result; uint8_t fstat; /* wait until busy */ - for (i = 0; i < 50; i++) { + for (unsigned int i = 0; i < 50; i++) { result = target_read_u8(target, FTFx_FSTAT, &fstat); if (result != ERROR_OK) return result; @@ -1343,8 +1340,6 @@ static int kinetis_write_block(struct flash_bank *bank, const uint8_t *buffer, static int kinetis_protect(struct flash_bank *bank, int set, int first, int last) { - int i; - if (allow_fcf_writes) { LOG_ERROR("Protection setting is possible with 'kinetis fcf_source protection' only!"); return ERROR_FAIL; @@ -1355,7 +1350,7 @@ static int kinetis_protect(struct flash_bank *bank, int set, int first, int last return ERROR_FLASH_BANK_INVALID; } - for (i = first; i < bank->num_prot_blocks && i <= last; i++) + for (int i = first; i < bank->num_prot_blocks && i <= last; i++) bank->prot_blocks[i].is_protected = set; LOG_INFO("Protection bits will be written at the next FCF sector erase or write."); @@ -1369,7 +1364,7 @@ static int kinetis_protect_check(struct flash_bank *bank) { struct kinetis_flash_bank *k_bank = bank->driver_priv; int result; - int i, b; + int b; uint32_t fprot; if (k_bank->flash_class == FC_PFLASH) { @@ -1397,7 +1392,7 @@ static int kinetis_protect_check(struct flash_bank *bank) } b = k_bank->protection_block; - for (i = 0; i < bank->num_prot_blocks; i++) { + for (int i = 0; i < bank->num_prot_blocks; i++) { if ((fprot >> b) & 1) bank->prot_blocks[i].is_protected = 0; else @@ -1415,8 +1410,6 @@ static int kinetis_fill_fcf(struct flash_bank *bank, uint8_t *fcf) uint32_t fprot = 0xffffffff; uint8_t fsec = 0xfe; /* set MCU unsecure */ uint8_t fdprot = 0xff; - int i; - unsigned bank_idx; unsigned num_blocks; uint32_t pflash_bit; uint8_t dflash_bit; @@ -1432,7 +1425,7 @@ static int kinetis_fill_fcf(struct flash_bank *bank, uint8_t *fcf) /* iterate over all kinetis banks */ /* current bank is bank 0, it contains FCF */ num_blocks = k_chip->num_pflash_blocks + k_chip->num_nvm_blocks; - for (bank_idx = 0; bank_idx < num_blocks; bank_idx++) { + for (unsigned int bank_idx = 0; bank_idx < num_blocks; bank_idx++) { k_bank = &(k_chip->banks[bank_idx]); bank_iter = k_bank->bank; @@ -1446,7 +1439,7 @@ static int kinetis_fill_fcf(struct flash_bank *bank, uint8_t *fcf) assert(bank_iter->prot_blocks); if (k_bank->flash_class == FC_PFLASH) { - for (i = 0; i < bank_iter->num_prot_blocks; i++) { + for (int i = 0; i < bank_iter->num_prot_blocks; i++) { if (bank_iter->prot_blocks[i].is_protected == 1) fprot &= ~pflash_bit; @@ -1454,7 +1447,7 @@ static int kinetis_fill_fcf(struct flash_bank *bank, uint8_t *fcf) } } else if (k_bank->flash_class == FC_FLEX_NVM) { - for (i = 0; i < bank_iter->num_prot_blocks; i++) { + for (int i = 0; i < bank_iter->num_prot_blocks; i++) { if (bank_iter->prot_blocks[i].is_protected == 1) fdprot &= ~dflash_bit; @@ -1542,7 +1535,7 @@ static int kinetis_read_pmstat(struct kinetis_chip *k_chip, uint8_t *pmstat) static int kinetis_check_run_mode(struct kinetis_chip *k_chip) { - int result, i; + int result; uint8_t pmstat; struct target *target; @@ -1580,7 +1573,7 @@ static int kinetis_check_run_mode(struct kinetis_chip *k_chip) if (result != ERROR_OK) return result; - for (i = 100; i; i--) { + for (unsigned int i = 100; i > 0; i--) { result = kinetis_read_pmstat(k_chip, &pmstat); if (result != ERROR_OK) return result; @@ -1625,7 +1618,7 @@ static void kinetis_invalidate_flash_cache(struct kinetis_chip *k_chip) static int kinetis_erase(struct flash_bank *bank, int first, int last) { - int result, i; + int result; struct kinetis_flash_bank *k_bank = bank->driver_priv; struct kinetis_chip *k_chip = k_bank->k_chip; @@ -1646,7 +1639,7 @@ static int kinetis_erase(struct flash_bank *bank, int first, int last) * requested erase is PFlash or NVM and encompasses the entire * block. Should be quicker. */ - for (i = first; i <= last; i++) { + for (int i = first; i <= last; i++) { /* set command and sector address */ result = kinetis_ftfx_command(bank->target, FTFx_CMD_SECTERASE, k_bank->prog_base + bank->sectors[i].offset, 0, 0, 0, 0, 0, 0, 0, 0, NULL); @@ -1810,25 +1803,26 @@ static int kinetis_write_sections(struct flash_bank *bank, const uint8_t *buffer static int kinetis_write_inner(struct flash_bank *bank, const uint8_t *buffer, uint32_t offset, uint32_t count) { - int result, fallback = 0; + int result; + bool fallback = false; struct kinetis_flash_bank *k_bank = bank->driver_priv; struct kinetis_chip *k_chip = k_bank->k_chip; if (!(k_chip->flash_support & FS_PROGRAM_SECTOR)) { /* fallback to longword write */ - fallback = 1; + fallback = true; LOG_INFO("This device supports Program Longword execution only."); } else { result = kinetis_make_ram_ready(bank->target); if (result != ERROR_OK) { - fallback = 1; + fallback = true; LOG_WARNING("FlexRAM not ready, fallback to slow longword write."); } } LOG_DEBUG("flash write @ " TARGET_ADDR_FMT, bank->base + offset); - if (fallback == 0) { + if (!fallback) { /* program section command */ kinetis_write_sections(bank, buffer, offset, count); } else if (k_chip->flash_support & FS_PROGRAM_LONGWORD) { @@ -2020,7 +2014,6 @@ static int kinetis_probe_chip(struct kinetis_chip *k_chip) unsigned familyid = 0, subfamid = 0; unsigned cpu_mhz = 120; - unsigned idx; bool use_nvm_marking = false; char flash_marking[12], nvm_marking[2]; char name[40]; @@ -2115,7 +2108,7 @@ static int kinetis_probe_chip(struct kinetis_chip *k_chip) LOG_ERROR("Unsupported K-family FAMID"); } - for (idx = 0; idx < ARRAY_SIZE(kinetis_types_old); idx++) { + for (size_t idx = 0; idx < ARRAY_SIZE(kinetis_types_old); idx++) { if (kinetis_types_old[idx].sdid == mcu_type) { strcpy(name, kinetis_types_old[idx].name); use_nvm_marking = true; @@ -2621,7 +2614,7 @@ static int kinetis_probe_chip(struct kinetis_chip *k_chip) static int kinetis_probe(struct flash_bank *bank) { - int result, i; + int result; uint8_t fcfg2_maxaddr0, fcfg2_pflsh, fcfg2_maxaddr1; unsigned num_blocks, first_nvm_bank; uint32_t size_k; @@ -2673,6 +2666,7 @@ static int kinetis_probe(struct flash_bank *bank) if (k_chip->dflash_size == 0) { k_bank->protection_size = 0; } else { + int i; for (i = k_chip->dflash_size; ~i & 1; i >>= 1) ; if (i == 1) @@ -2829,8 +2823,7 @@ static int kinetis_blank_check(struct flash_bank *bank) if (block_dirty) { /* the whole bank is not erased, check sector-by-sector */ - int i; - for (i = 0; i < bank->num_sectors; i++) { + for (int i = 0; i < bank->num_sectors; i++) { /* normal margin */ result = kinetis_ftfx_command(bank->target, FTFx_CMD_SECTSTAT, k_bank->prog_base + bank->sectors[i].offset, @@ -2846,8 +2839,7 @@ static int kinetis_blank_check(struct flash_bank *bank) } } else { /* the whole bank is erased, update all sectors */ - int i; - for (i = 0; i < bank->num_sectors; i++) + for (int i = 0; i < bank->num_sectors; i++) bank->sectors[i].is_erased = 1; } } else { ----------------------------------------------------------------------- Summary of changes: src/flash/nor/kinetis.c | 60 +++++++++++++++++++++---------------------------- 1 file changed, 26 insertions(+), 34 deletions(-) hooks/post-receive -- Main OpenOCD repository |
From: OpenOCD-Gerrit <ope...@us...> - 2020-05-08 20:23:50
|
This is an automated email from the git hooks/post-receive script. It was generated because a ref change was pushed to the repository containing the project "Main OpenOCD repository". The branch, master has been updated via da41bce3aee99f1fd2c661f874c90d20b4fefa04 (commit) from c693508f7717d3e5cf118da38d4a5411c59cef1a (commit) Those revisions listed above that are new to this repository have not appeared on any other notification email; so we list those revisions in full, below. - Log ----------------------------------------------------------------- commit da41bce3aee99f1fd2c661f874c90d20b4fefa04 Author: Evgeniy Didin <di...@sy...> Date: Mon Mar 16 20:38:00 2020 +0300 target/arc: introduce breakpoint functionality With this patch we introduce set/unset breakpoints routines and add/remove bp handlers. Currently soft breakpoints are only supported. Changes since v1: * Change if-statement in arc_remove_breakpoint * Squash changes from http://openocd.zylin.com/#/c/5641/ in this commit to fix build. Change-Id: Ib10ccdb02fd1606e4f407f012b1bee106a8ffccd Signed-off-by: Evgeniy Didin <di...@sy...> Reviewed-on: http://openocd.zylin.com/5641 Tested-by: jenkins Reviewed-by: Oleksij Rempel <li...@re...> diff --git a/src/target/arc.c b/src/target/arc.c index 5bc6134d0..bf744962a 100644 --- a/src/target/arc.c +++ b/src/target/arc.c @@ -1342,6 +1342,158 @@ int arc_read_instruction_u32(struct target *target, uint32_t address, return ERROR_OK; } +static int arc_set_breakpoint(struct target *target, + struct breakpoint *breakpoint) +{ + + if (breakpoint->set) { + LOG_WARNING("breakpoint already set"); + return ERROR_OK; + } + + if (breakpoint->type == BKPT_SOFT) { + LOG_DEBUG("bpid: %" PRIu32, breakpoint->unique_id); + + if (breakpoint->length == 4) { + uint32_t verify = 0xffffffff; + + CHECK_RETVAL(target_read_buffer(target, breakpoint->address, breakpoint->length, + breakpoint->orig_instr)); + + CHECK_RETVAL(arc_write_instruction_u32(target, breakpoint->address, + ARC_SDBBP_32)); + + CHECK_RETVAL(arc_read_instruction_u32(target, breakpoint->address, &verify)); + + if (verify != ARC_SDBBP_32) { + LOG_ERROR("Unable to set 32bit breakpoint at address @0x%" TARGET_PRIxADDR + " - check that memory is read/writable", breakpoint->address); + return ERROR_FAIL; + } + } else if (breakpoint->length == 2) { + uint16_t verify = 0xffff; + + CHECK_RETVAL(target_read_buffer(target, breakpoint->address, breakpoint->length, + breakpoint->orig_instr)); + CHECK_RETVAL(target_write_u16(target, breakpoint->address, ARC_SDBBP_16)); + + CHECK_RETVAL(target_read_u16(target, breakpoint->address, &verify)); + if (verify != ARC_SDBBP_16) { + LOG_ERROR("Unable to set 16bit breakpoint at address @0x%" TARGET_PRIxADDR + " - check that memory is read/writable", breakpoint->address); + return ERROR_FAIL; + } + } else { + LOG_ERROR("Invalid breakpoint length: target supports only 2 or 4"); + return ERROR_COMMAND_ARGUMENT_INVALID; + } + + breakpoint->set = 64; /* Any nice value but 0 */ + } else if (breakpoint->type == BKPT_HARD) { + LOG_DEBUG("Hardware breakpoints are not supported yet!"); + return ERROR_FAIL; + } else { + LOG_DEBUG("ERROR: setting unknown breakpoint type"); + return ERROR_FAIL; + } + /* core instruction cache is now invalid, + * TODO: add cache invalidation function here (when implemented). */ + + return ERROR_OK; +} + +static int arc_unset_breakpoint(struct target *target, + struct breakpoint *breakpoint) +{ + int retval = ERROR_OK; + + if (!breakpoint->set) { + LOG_WARNING("breakpoint not set"); + return ERROR_OK; + } + + if (breakpoint->type == BKPT_SOFT) { + /* restore original instruction (kept in target endianness) */ + LOG_DEBUG("bpid: %" PRIu32, breakpoint->unique_id); + if (breakpoint->length == 4) { + uint32_t current_instr; + + /* check that user program has not modified breakpoint instruction */ + CHECK_RETVAL(arc_read_instruction_u32(target, breakpoint->address, ¤t_instr)); + + if (current_instr == ARC_SDBBP_32) { + retval = target_write_buffer(target, breakpoint->address, + breakpoint->length, breakpoint->orig_instr); + if (retval != ERROR_OK) + return retval; + } else { + LOG_WARNING("Software breakpoint @0x%" TARGET_PRIxADDR + " has been overwritten outside of debugger." + "Expected: @0x%" PRIx32 ", got: @0x%" PRIx32, + breakpoint->address, ARC_SDBBP_32, current_instr); + } + } else if (breakpoint->length == 2) { + uint16_t current_instr; + + /* check that user program has not modified breakpoint instruction */ + CHECK_RETVAL(target_read_u16(target, breakpoint->address, ¤t_instr)); + if (current_instr == ARC_SDBBP_16) { + retval = target_write_buffer(target, breakpoint->address, + breakpoint->length, breakpoint->orig_instr); + if (retval != ERROR_OK) + return retval; + } else { + LOG_WARNING("Software breakpoint @0x%" TARGET_PRIxADDR + " has been overwritten outside of debugger. " + "Expected: 0x%04" PRIx16 ", got: 0x%04" PRIx16, + breakpoint->address, ARC_SDBBP_16, current_instr); + } + } else { + LOG_ERROR("Invalid breakpoint length: target supports only 2 or 4"); + return ERROR_COMMAND_ARGUMENT_INVALID; + } + breakpoint->set = 0; + + } else if (breakpoint->type == BKPT_HARD) { + LOG_WARNING("Hardware breakpoints are not supported yet!"); + return ERROR_FAIL; + } else { + LOG_DEBUG("ERROR: unsetting unknown breakpoint type"); + return ERROR_FAIL; + } + + /* core instruction cache is now invalid. + * TODO: Add cache invalidation function */ + + return retval; +} + + +static int arc_add_breakpoint(struct target *target, struct breakpoint *breakpoint) +{ + if (target->state == TARGET_HALTED) { + return arc_set_breakpoint(target, breakpoint); + + } else { + LOG_WARNING(" > core was not halted, please try again."); + return ERROR_TARGET_NOT_HALTED; + } +} + +static int arc_remove_breakpoint(struct target *target, + struct breakpoint *breakpoint) +{ + if (target->state == TARGET_HALTED) { + if (breakpoint->set) + CHECK_RETVAL(arc_unset_breakpoint(target, breakpoint)); + } else { + LOG_WARNING("target not halted"); + return ERROR_TARGET_NOT_HALTED; + } + + return ERROR_OK; +} + /* Helper function which swiches core to single_step mode by * doing aux r/w operations. */ int arc_config_step(struct target *target, int enable_step) @@ -1443,6 +1595,8 @@ int arc_step(struct target *target, int current, target_addr_t address, return ERROR_OK; } + + /* ARC v2 target */ struct target_type arcv2_target = { .name = "arcv2", @@ -1472,10 +1626,10 @@ struct target_type arcv2_target = { .checksum_memory = NULL, .blank_check_memory = NULL, - .add_breakpoint = NULL, + .add_breakpoint = arc_add_breakpoint, .add_context_breakpoint = NULL, .add_hybrid_breakpoint = NULL, - .remove_breakpoint = NULL, + .remove_breakpoint = arc_remove_breakpoint, .add_watchpoint = NULL, .remove_watchpoint = NULL, .hit_watchpoint = NULL, diff --git a/src/target/arc.h b/src/target/arc.h index 55a1ead21..defa3fa97 100644 --- a/src/target/arc.h +++ b/src/target/arc.h @@ -54,6 +54,12 @@ /* Limit reg_type/reg_type_field name to 20 symbols */ #define REG_TYPE_MAX_NAME_LENGTH 20 +/* ARC 32bits opcodes */ +#define ARC_SDBBP_32 0x256F003F /* BRK */ + +/* ARC 16bits opcodes */ +#define ARC_SDBBP_16 0x7FFF /* BRK_S */ + struct arc_reg_bitfield { struct reg_data_type_bitfield bitfield; char name[REG_TYPE_MAX_NAME_LENGTH]; ----------------------------------------------------------------------- Summary of changes: src/target/arc.c | 158 ++++++++++++++++++++++++++++++++++++++++++++++++++++++- src/target/arc.h | 6 +++ 2 files changed, 162 insertions(+), 2 deletions(-) hooks/post-receive -- Main OpenOCD repository |
From: OpenOCD-Gerrit <ope...@us...> - 2020-05-08 14:10:38
|
This is an automated email from the git hooks/post-receive script. It was generated because a ref change was pushed to the repository containing the project "Main OpenOCD repository". The branch, master has been updated via c693508f7717d3e5cf118da38d4a5411c59cef1a (commit) from 0af37282c742dfc3492348f44f66215939148fb0 (commit) Those revisions listed above that are new to this repository have not appeared on any other notification email; so we list those revisions in full, below. - Log ----------------------------------------------------------------- commit c693508f7717d3e5cf118da38d4a5411c59cef1a Author: Evgeniy Didin <di...@sy...> Date: Mon Mar 16 15:00:16 2020 +0300 target/arc: introduce arc_read/write_instruction functions This commit introduces helper instruction read/write functions for further bp functionality. Change-Id: I619fbe2870ef6365c29ed1618bb83b6f7eb84690 Signed-off-by: Evgeniy Didin <di...@sy...> Reviewed-on: http://openocd.zylin.com/5640 Tested-by: jenkins Reviewed-by: Oleksij Rempel <li...@re...> diff --git a/src/target/arc.c b/src/target/arc.c index 396bf8a47..5bc6134d0 100644 --- a/src/target/arc.c +++ b/src/target/arc.c @@ -1285,6 +1285,62 @@ static int arc_target_create(struct target *target, Jim_Interp *interp) return ERROR_OK; } +/** + * Write 4-byte instruction to memory. This is like target_write_u32, however + * in case of little endian ARC instructions are in middle endian format, not + * little endian, so different type of conversion should be done. + * Middle endinan: instruction "aabbccdd", stored as "bbaaddcc" + */ +int arc_write_instruction_u32(struct target *target, uint32_t address, + uint32_t instr) +{ + uint8_t value_buf[4]; + if (!target_was_examined(target)) { + LOG_ERROR("Target not examined yet"); + return ERROR_FAIL; + } + + LOG_DEBUG("Address: 0x%08" PRIx32 ", value: 0x%08" PRIx32, address, + instr); + + if (target->endianness == TARGET_LITTLE_ENDIAN) + arc_h_u32_to_me(value_buf, instr); + else + h_u32_to_be(value_buf, instr); + + CHECK_RETVAL(target_write_buffer(target, address, 4, value_buf)); + + return ERROR_OK; +} + +/** + * Read 32-bit instruction from memory. It is like target_read_u32, however in + * case of little endian ARC instructions are in middle endian format, so + * different type of conversion should be done. + */ +int arc_read_instruction_u32(struct target *target, uint32_t address, + uint32_t *value) +{ + uint8_t value_buf[4]; + + if (!target_was_examined(target)) { + LOG_ERROR("Target not examined yet"); + return ERROR_FAIL; + } + + *value = 0; + CHECK_RETVAL(target_read_buffer(target, address, 4, value_buf)); + + if (target->endianness == TARGET_LITTLE_ENDIAN) + *value = arc_me_to_h_u32(value_buf); + else + *value = be_to_h_u32(value_buf); + + LOG_DEBUG("Address: 0x%08" PRIx32 ", value: 0x%08" PRIx32, address, + *value); + + return ERROR_OK; +} /* Helper function which swiches core to single_step mode by * doing aux r/w operations. */ diff --git a/src/target/arc.h b/src/target/arc.h index c02787e33..55a1ead21 100644 --- a/src/target/arc.h +++ b/src/target/arc.h @@ -160,6 +160,29 @@ static inline struct arc_common *target_to_arc(struct target *target) return target->arch_info; } +/* ----- Inlined functions ------------------------------------------------- */ + +/** + * Convert data in host endianness to the middle endian. This is required to + * write 4-byte instructions. + */ +static inline void arc_h_u32_to_me(uint8_t *buf, int val) +{ + buf[1] = (uint8_t) (val >> 24); + buf[0] = (uint8_t) (val >> 16); + buf[3] = (uint8_t) (val >> 8); + buf[2] = (uint8_t) (val >> 0); +} + +/** + * Convert data in middle endian to host endian. This is required to read 32-bit + * instruction from little endian ARCs. + */ +static inline uint32_t arc_me_to_h_u32(const uint8_t *buf) +{ + return (uint32_t)(buf[2] | buf[3] << 8 | buf[0] << 16 | buf[1] << 24); +} + /* ARC Register description */ struct arc_reg_desc { ----------------------------------------------------------------------- Summary of changes: src/target/arc.c | 56 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++ src/target/arc.h | 23 +++++++++++++++++++++++ 2 files changed, 79 insertions(+) hooks/post-receive -- Main OpenOCD repository |
From: OpenOCD-Gerrit <ope...@us...> - 2020-05-08 04:57:58
|
This is an automated email from the git hooks/post-receive script. It was generated because a ref change was pushed to the repository containing the project "Main OpenOCD repository". The branch, master has been updated via 0af37282c742dfc3492348f44f66215939148fb0 (commit) from 05eb9a357cd2794a83f8176827cb3a59db375683 (commit) Those revisions listed above that are new to this repository have not appeared on any other notification email; so we list those revisions in full, below. - Log ----------------------------------------------------------------- commit 0af37282c742dfc3492348f44f66215939148fb0 Author: Evgeniy Didin <di...@sy...> Date: Wed Mar 18 16:12:04 2020 +0300 target/arc: Add initial stepping functions Change-Id: I84845f2ec6f1cff975990f0a495165a02de33227 Signed-off-by: Evgeniy Didin <di...@sy...> Reviewed-on: http://openocd.zylin.com/5643 Tested-by: jenkins Reviewed-by: Oleksij Rempel <li...@re...> diff --git a/src/target/arc.c b/src/target/arc.c index 823b9ed70..396bf8a47 100644 --- a/src/target/arc.c +++ b/src/target/arc.c @@ -1286,6 +1286,107 @@ static int arc_target_create(struct target *target, Jim_Interp *interp) } +/* Helper function which swiches core to single_step mode by + * doing aux r/w operations. */ +int arc_config_step(struct target *target, int enable_step) +{ + uint32_t value; + + struct arc_common *arc = target_to_arc(target); + + /* enable core debug step mode */ + if (enable_step) { + CHECK_RETVAL(arc_jtag_read_aux_reg_one(&arc->jtag_info, AUX_STATUS32_REG, + &value)); + value &= ~SET_CORE_AE_BIT; /* clear the AE bit */ + CHECK_RETVAL(arc_jtag_write_aux_reg_one(&arc->jtag_info, AUX_STATUS32_REG, + value)); + LOG_DEBUG(" [status32:0x%08" PRIx32 "]", value); + + /* Doing read-modify-write, because DEBUG might contain manually set + * bits like UB or ED, which should be preserved. */ + CHECK_RETVAL(arc_jtag_read_aux_reg_one(&arc->jtag_info, + AUX_DEBUG_REG, &value)); + value |= SET_CORE_SINGLE_INSTR_STEP; /* set the IS bit */ + CHECK_RETVAL(arc_jtag_write_aux_reg_one(&arc->jtag_info, AUX_DEBUG_REG, + value)); + LOG_DEBUG("core debug step mode enabled [debug-reg:0x%08" PRIx32 "]", value); + + } else { /* disable core debug step mode */ + CHECK_RETVAL(arc_jtag_read_aux_reg_one(&arc->jtag_info, AUX_DEBUG_REG, + &value)); + value &= ~SET_CORE_SINGLE_INSTR_STEP; /* clear the IS bit */ + CHECK_RETVAL(arc_jtag_write_aux_reg_one(&arc->jtag_info, AUX_DEBUG_REG, + value)); + LOG_DEBUG("core debug step mode disabled"); + } + + return ERROR_OK; +} + +int arc_step(struct target *target, int current, target_addr_t address, + int handle_breakpoints) +{ + /* get pointers to arch-specific information */ + struct arc_common *arc = target_to_arc(target); + struct breakpoint *breakpoint = NULL; + struct reg *pc = &(arc->core_and_aux_cache->reg_list[arc->pc_index_in_cache]); + + if (target->state != TARGET_HALTED) { + LOG_WARNING("target not halted"); + return ERROR_TARGET_NOT_HALTED; + } + + /* current = 1: continue on current pc, otherwise continue at <address> */ + if (!current) { + buf_set_u32(pc->value, 0, 32, address); + pc->dirty = 1; + pc->valid = 1; + } + + LOG_DEBUG("Target steps one instruction from PC=0x%" PRIx32, + buf_get_u32(pc->value, 0, 32)); + + /* the front-end may request us not to handle breakpoints */ + if (handle_breakpoints) { + breakpoint = breakpoint_find(target, buf_get_u32(pc->value, 0, 32)); + if (breakpoint) + CHECK_RETVAL(arc_unset_breakpoint(target, breakpoint)); + } + + /* restore context */ + CHECK_RETVAL(arc_restore_context(target)); + + target->debug_reason = DBG_REASON_SINGLESTEP; + + CHECK_RETVAL(target_call_event_callbacks(target, TARGET_EVENT_RESUMED)); + + /* disable interrupts while stepping */ + CHECK_RETVAL(arc_enable_interrupts(target, 0)); + + /* do a single step */ + CHECK_RETVAL(arc_config_step(target, 1)); + + /* make sure we done our step */ + alive_sleep(1); + + /* registers are now invalid */ + register_cache_invalidate(arc->core_and_aux_cache); + + if (breakpoint) + CHECK_RETVAL(arc_set_breakpoint(target, breakpoint)); + + LOG_DEBUG("target stepped "); + + target->state = TARGET_HALTED; + + /* Saving context */ + CHECK_RETVAL(arc_debug_entry(target)); + CHECK_RETVAL(target_call_event_callbacks(target, TARGET_EVENT_HALTED)); + + return ERROR_OK; +} + /* ARC v2 target */ struct target_type arcv2_target = { .name = "arcv2", @@ -1300,7 +1401,7 @@ struct target_type arcv2_target = { .halt = arc_halt, .resume = arc_resume, - .step = NULL, + .step = arc_step, .assert_reset = arc_assert_reset, .deassert_reset = arc_deassert_reset, diff --git a/src/target/arc.h b/src/target/arc.h index af4149f97..c02787e33 100644 --- a/src/target/arc.h +++ b/src/target/arc.h @@ -33,9 +33,14 @@ #define AUX_PC_REG 0x6 #define AUX_STATUS32_REG 0xA + #define SET_CORE_FORCE_HALT BIT(1) #define SET_CORE_HALT_BIT BIT(0) /* STATUS32[0] = H field */ -#define SET_CORE_ENABLE_INTERRUPTS BIT(31) +#define SET_CORE_ENABLE_INTERRUPTS BIT(31) +/* STATUS32[5] or AE bit indicates if the processor is in exception state */ +#define SET_CORE_AE_BIT BIT(5) +/* Single instruction step bit in Debug register */ +#define SET_CORE_SINGLE_INSTR_STEP BIT(11) #define AUX_STATUS32_REG_HALT_BIT BIT(0) #define AUX_STATUS32_REG_IE_BIT BIT(31) /* STATUS32[31] = IE field */ ----------------------------------------------------------------------- Summary of changes: src/target/arc.c | 103 ++++++++++++++++++++++++++++++++++++++++++++++++++++++- src/target/arc.h | 7 +++- 2 files changed, 108 insertions(+), 2 deletions(-) hooks/post-receive -- Main OpenOCD repository |
From: OpenOCD-Gerrit <ope...@us...> - 2020-05-07 20:33:15
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This is an automated email from the git hooks/post-receive script. It was generated because a ref change was pushed to the repository containing the project "Main OpenOCD repository". The branch, master has been updated via 05eb9a357cd2794a83f8176827cb3a59db375683 (commit) from 968d3851e742ffa74b7f817d54f23db1d85929ef (commit) Those revisions listed above that are new to this repository have not appeared on any other notification email; so we list those revisions in full, below. - Log ----------------------------------------------------------------- commit 05eb9a357cd2794a83f8176827cb3a59db375683 Author: Tim Newsome <ti...@si...> Date: Thu Oct 17 15:12:55 2019 -0700 Add get_thread_reg() and set_reg() for hwthread get_thread_reg() allows gdb to request the register value of a specific "thread." set_reg() allows register writes without getting a giant list of registers first. Signed-off-by: Tim Newsome <ti...@si...> Change-Id: I87faa1c8793916b9ee476dd696f0695a07ca2b41 Reviewed-on: http://openocd.zylin.com/5324 Tested-by: jenkins diff --git a/src/rtos/hwthread.c b/src/rtos/hwthread.c index 2d9e42fa6..38e42a041 100644 --- a/src/rtos/hwthread.c +++ b/src/rtos/hwthread.c @@ -31,10 +31,13 @@ static bool hwthread_detect_rtos(struct target *target); static int hwthread_create(struct target *target); static int hwthread_update_threads(struct rtos *rtos); +static int hwthread_get_thread_reg(struct rtos *rtos, int64_t thread_id, + uint32_t reg_num, struct rtos_reg *rtos_reg); static int hwthread_get_thread_reg_list(struct rtos *rtos, int64_t thread_id, - struct rtos_reg **reg_list, int *num_regs); + struct rtos_reg **reg_list, int *num_regs); static int hwthread_get_symbol_list_to_lookup(symbol_table_elem_t *symbol_list[]); static int hwthread_smp_init(struct target *target); +int hwthread_set_reg(struct rtos *rtos, uint32_t reg_num, uint8_t *reg_value); #define HW_THREAD_NAME_STR_SIZE (32) @@ -51,8 +54,10 @@ const struct rtos_type hwthread_rtos = { .create = hwthread_create, .update_threads = hwthread_update_threads, .get_thread_reg_list = hwthread_get_thread_reg_list, + .get_thread_reg = hwthread_get_thread_reg, .get_symbol_list_to_lookup = hwthread_get_symbol_list_to_lookup, .smp_init = hwthread_smp_init, + .set_reg = hwthread_set_reg, }; struct hwthread_params { @@ -201,64 +206,114 @@ static int hwthread_smp_init(struct target *target) return hwthread_update_threads(target->rtos); } -static int hwthread_get_thread_reg_list(struct rtos *rtos, int64_t thread_id, - struct rtos_reg **rtos_reg_list, int *num_regs) +static struct target *hwthread_find_thread(struct target *target, int64_t thread_id) { - struct target_list *head; - struct target *target; - struct target *curr; - struct reg **reg_list; - int retval; - - if (rtos == NULL) - return ERROR_FAIL; - - target = rtos->target; - /* Find the thread with that thread_id */ + if (target == NULL) + return NULL; if (target->smp) { - curr = NULL; - for (head = target->head; head != NULL; head = head->next) { - curr = head->target; - - if (thread_id == threadid_from_target(curr)) - break; + for (struct target_list *head = target->head; head != NULL; head = head->next) { + if (thread_id == threadid_from_target(head->target)) + return head->target; } + } else if (thread_id == threadid_from_target(target)) { + return target; + } + return NULL; +} - if (head == NULL) - return ERROR_FAIL; - } else { - curr = target; - if (thread_id != threadid_from_target(curr)) - return ERROR_FAIL; +static int hwthread_get_thread_reg_list(struct rtos *rtos, int64_t thread_id, + struct rtos_reg **rtos_reg_list, int *rtos_reg_list_size) +{ + if (rtos == NULL) + return ERROR_FAIL; - } + struct target *target = rtos->target; + + struct target *curr = hwthread_find_thread(target, thread_id); + if (curr == NULL) + return ERROR_FAIL; if (!target_was_examined(curr)) return ERROR_FAIL; - retval = target_get_gdb_reg_list(curr, ®_list, num_regs, + struct reg **reg_list; + int retval = target_get_gdb_reg_list(curr, ®_list, rtos_reg_list_size, REG_CLASS_GENERAL); if (retval != ERROR_OK) return retval; - *rtos_reg_list = calloc(*num_regs, sizeof(struct rtos_reg)); + *rtos_reg_list = calloc(*rtos_reg_list_size, sizeof(struct rtos_reg)); if (*rtos_reg_list == NULL) { free(reg_list); return ERROR_FAIL; } - for (int i = 0; i < *num_regs; i++) { + for (int i = 0; i < *rtos_reg_list_size; i++) { (*rtos_reg_list)[i].number = (*reg_list)[i].number; (*rtos_reg_list)[i].size = (*reg_list)[i].size; memcpy((*rtos_reg_list)[i].value, (*reg_list)[i].value, - ((*reg_list)[i].size + 7) / 8); + ((*reg_list)[i].size + 7) / 8); } - free(reg_list); return ERROR_OK; +} + +static int hwthread_get_thread_reg(struct rtos *rtos, int64_t thread_id, + uint32_t reg_num, struct rtos_reg *rtos_reg) +{ + if (rtos == NULL) + return ERROR_FAIL; + + struct target *target = rtos->target; + struct target *curr = hwthread_find_thread(target, thread_id); + if (curr == NULL) { + LOG_ERROR("Couldn't find RTOS thread for id %" PRId64 ".", thread_id); + return ERROR_FAIL; + } + + if (!target_was_examined(curr)) { + LOG_ERROR("Target %d hasn't been examined yet.", curr->coreid); + return ERROR_FAIL; + } + + struct reg *reg = register_get_by_number(curr->reg_cache, reg_num, true); + if (!reg) { + LOG_ERROR("Couldn't find register %d in thread %" PRId64 ".", reg_num, + thread_id); + return ERROR_FAIL; + } + + if (reg->type->get(reg) != ERROR_OK) + return ERROR_FAIL; + + rtos_reg->number = reg->number; + rtos_reg->size = reg->size; + unsigned bytes = (reg->size + 7) / 8; + assert(bytes <= sizeof(rtos_reg->value)); + memcpy(rtos_reg->value, reg->value, bytes); + + return ERROR_OK; +} + +int hwthread_set_reg(struct rtos *rtos, uint32_t reg_num, uint8_t *reg_value) +{ + if (rtos == NULL) + return ERROR_FAIL; + + struct target *target = rtos->target; + + struct target *curr = hwthread_find_thread(target, rtos->current_thread); + if (curr == NULL) + return ERROR_FAIL; + + struct reg *reg = register_get_by_number(curr->reg_cache, reg_num, true); + if (!reg) + return ERROR_FAIL; + + return reg->type->set(reg, reg_value); } static int hwthread_get_symbol_list_to_lookup(symbol_table_elem_t *symbol_list[]) @@ -272,26 +327,10 @@ static int hwthread_get_symbol_list_to_lookup(symbol_table_elem_t *symbol_list[] static int hwthread_target_for_threadid(struct connection *connection, int64_t thread_id, struct target **p_target) { struct target *target = get_target_from_connection(connection); - struct target_list *head; - struct target *curr; - - if (target->smp) { - /* Find the thread with that thread_id */ - curr = NULL; - for (head = target->head; head != NULL; head = head->next) { - curr = head->target; - - if (thread_id == threadid_from_target(curr)) - break; - } - if (head == NULL) - return ERROR_FAIL; - } else { - curr = target; - if (thread_id != threadid_from_target(curr)) - return ERROR_FAIL; - } + struct target *curr = hwthread_find_thread(target, thread_id); + if (curr == NULL) + return ERROR_FAIL; *p_target = curr; ----------------------------------------------------------------------- Summary of changes: src/rtos/hwthread.c | 141 +++++++++++++++++++++++++++++++++------------------- 1 file changed, 90 insertions(+), 51 deletions(-) hooks/post-receive -- Main OpenOCD repository |