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[OpenOCD-commit] Main OpenOCD repository branch, master, updated. v0.12.0-1612-gda3920b0a

From: openocd-gerrit <ope...@us...> - 2026-07-28 19:06:29

This is an automated email from the git hooks/post-receive script. It was
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The branch, master has been updated
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- Log -----------------------------------------------------------------
commit da3920b0a52dc2d394afb222c688dac7e57acc1b
Author: Zane Leung <zhe...@sp...>
Date:   Wed Jun 24 18:26:01 2026 +0800

    target/riscv: add hart index bounds checking
    
    dm013_select_hart() writes to dmcontrol.hartsel which is WARL.
    Prevent attempting to access a hart that don't exist on the
    debug module. Add coreid validation against actual hart count.
    
    Change-Id: If3638eb9fd3ff8f60018c070b3c024d1c5579787
    Signed-off-by: Zane Leung <zhe...@sp...>
    Reviewed-on: https://review.openocd.org/c/openocd/+/9755
    Tested-by: jenkins
    Reviewed-by: Tomas Vanek <va...@fb...>
    Reviewed-by: Evgeniy Naydanov <eu...@gm...>

diff --git a/src/target/riscv/riscv-013.c b/src/target/riscv/riscv-013.c
index 34df26696..c730b68e4 100644
--- a/src/target/riscv/riscv-013.c
+++ b/src/target/riscv/riscv-013.c
@@ -1972,9 +1972,8 @@ static int examine_dm(struct target *target)
 		get_field(dmcontrol, DM_DMCONTROL_HARTSELLO);
 
 	/* Before doing anything else we must first enumerate the harts. */
-	const int max_hart_count = MIN(RISCV_MAX_HARTS, hartsel + 1);
 	if (dm->hart_count < 0) {
-		for (int i = 0; i < max_hart_count; ++i) {
+		for (uint32_t i = 0; i <= hartsel; ++i) {
 			/* TODO: This is extremely similar to
 			 * riscv013_get_hart_state().
 			 * It would be best to reuse the code.
@@ -2087,6 +2086,14 @@ static int examine(struct target *target)
 	if (result != ERROR_OK)
 		return result;
 
+	dm013_info_t *dm = get_dm(target);
+	if (target->coreid >= dm->hart_count) {
+		LOG_TARGET_ERROR(target, "Hart index %d is too large. The maximum"
+			" index for this Debug Module is %d",
+			target->coreid, dm->hart_count - 1);
+		return ERROR_FAIL;
+	}
+
 	result = dm013_select_target(target);
 	if (result != ERROR_OK)
 		return result;
diff --git a/src/target/riscv/riscv.h b/src/target/riscv/riscv.h
index 2a0a9b95f..ff584e140 100644
--- a/src/target/riscv/riscv.h
+++ b/src/target/riscv/riscv.h
@@ -17,7 +17,6 @@ struct riscv_program;
 
 #define RISCV_COMMON_MAGIC	0x52495356U
 
-#define RISCV_MAX_HARTS  ((int)BIT(20))
 #define RISCV_MAX_TRIGGERS 32
 #define RISCV_MAX_HWBPS 16
 #define RISCV_MAX_DMS 100

-----------------------------------------------------------------------

Summary of changes:
 src/target/riscv/riscv-013.c | 11 +++++++++--
 src/target/riscv/riscv.h     |  1 -
 2 files changed, 9 insertions(+), 3 deletions(-)


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Main OpenOCD repository

[OpenOCD-commit] Main OpenOCD repository branch, master, updated. v0.12.0-1611-g4b97bf858

From: openocd-gerrit <ope...@us...> - 2026-07-28 14:52:27

This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".

The branch, master has been updated
       via  4b97bf85807ad5242b14a87fcd2bc77b7b0624f0 (commit)
      from  43441cd83b229c106ab505cda047da116d454023 (commit)

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- Log -----------------------------------------------------------------
commit 4b97bf85807ad5242b14a87fcd2bc77b7b0624f0
Author: Zane Leung <zhe...@sp...>
Date:   Fri Jul 24 15:43:33 2026 +0800

    target/riscv: drop type 'target_list_t'
    
    Replace the type 'target_list_t' with struct 'target_list'.
    
    Change-Id: I13bbd38d49fcc756bfde1ccf492cf0b6de75fc87
    Signed-off-by: Zane Leung <zhe...@sp...>
    Reviewed-on: https://review.openocd.org/c/openocd/+/9798
    Reviewed-by: Evgeniy Naydanov <eu...@gm...>
    Reviewed-by: Tomas Vanek <va...@fb...>
    Reviewed-by: Antonio Borneo <bor...@gm...>
    Tested-by: jenkins

diff --git a/src/target/riscv/riscv-013.c b/src/target/riscv/riscv-013.c
index b4664d2a7..34df26696 100644
--- a/src/target/riscv/riscv-013.c
+++ b/src/target/riscv/riscv-013.c
@@ -139,11 +139,6 @@ typedef struct {
 	bool abstract_cmd_maybe_busy;
 } dm013_info_t;
 
-typedef struct {
-	struct list_head list;
-	struct target *target;
-} target_list_t;
-
 struct ac_cache {
 	uint32_t *commands;
 	size_t size;
@@ -309,8 +304,8 @@ static dm013_info_t *get_dm(struct target *target)
 	}
 
 	info->dm = dm;
-	target_list_t *target_entry;
-	list_for_each_entry(target_entry, &dm->target_list, list) {
+	struct target_list *target_entry;
+	list_for_each_entry(target_entry, &dm->target_list, lh) {
 		if (target_entry->target == target)
 			return dm;
 	}
@@ -320,7 +315,7 @@ static dm013_info_t *get_dm(struct target *target)
 		return NULL;
 	}
 	target_entry->target = target;
-	list_add(&target_entry->list, &dm->target_list);
+	list_add(&target_entry->lh, &dm->target_list);
 
 	return dm;
 }
@@ -332,10 +327,10 @@ static void riscv013_dm_free(struct target *target)
 	if (!dm)
 		return;
 
-	target_list_t *target_entry;
-	list_for_each_entry(target_entry, &dm->target_list, list) {
+	struct target_list *target_entry;
+	list_for_each_entry(target_entry, &dm->target_list, lh) {
 		if (target_entry->target == target) {
-			list_del(&target_entry->list);
+			list_del(&target_entry->lh);
 			free(target_entry);
 			break;
 		}
@@ -2245,8 +2240,8 @@ static int riscv013_authdata_write(struct target *target, uint32_t value, unsign
 		dm013_info_t *dm = get_dm(target);
 		if (!dm)
 			return ERROR_FAIL;
-		target_list_t *entry;
-		list_for_each_entry(entry, &dm->target_list, list) {
+		struct target_list *entry;
+		list_for_each_entry(entry, &dm->target_list, lh) {
 			if (target_examine_one(entry->target) != ERROR_OK)
 				result = ERROR_FAIL;
 		}
@@ -5221,10 +5216,10 @@ static int select_prepped_harts(struct target *target)
 	if (!hawindow)
 		return ERROR_FAIL;
 
-	target_list_t *entry;
+	struct target_list *entry;
 	unsigned int total_selected = 0;
 	unsigned int selected_index = 0;
-	list_for_each_entry(entry, &dm->target_list, list) {
+	list_for_each_entry(entry, &dm->target_list, lh) {
 		struct target *t = entry->target;
 		struct riscv_info *info = riscv_info(t);
 		riscv013_info_t *info_013 = get_info(t);
@@ -5319,8 +5314,8 @@ static int riscv013_halt_go(struct target *target)
 	dm_write(target, DM_DMCONTROL, dmcontrol);
 
 	if (dm->current_hartid == HART_INDEX_MULTIPLE) {
-		target_list_t *entry;
-		list_for_each_entry(entry, &dm->target_list, list) {
+		struct target_list *entry;
+		list_for_each_entry(entry, &dm->target_list, lh) {
 			struct target *t = entry->target;
 			uint32_t t_dmstatus;
 			if (get_field(dmstatus, DM_DMSTATUS_ALLHALTED) ||

-----------------------------------------------------------------------

Summary of changes:
 src/target/riscv/riscv-013.c | 29 ++++++++++++-----------------
 1 file changed, 12 insertions(+), 17 deletions(-)


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Main OpenOCD repository

[OpenOCD-commit] Main OpenOCD repository branch, master, updated. v0.12.0-1610-g43441cd83

From: openocd-gerrit <ope...@us...> - 2026-07-25 10:47:42

This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".

The branch, master has been updated
       via  43441cd83b229c106ab505cda047da116d454023 (commit)
      from  c064a1999f55c66cf85df9f9e4e1e0744e052fe0 (commit)

Those revisions listed above that are new to this repository have
not appeared on any other notification email; so we list those
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- Log -----------------------------------------------------------------
commit 43441cd83b229c106ab505cda047da116d454023
Author: Tim Hutt <td...@gm...>
Date:   Mon Jul 13 08:42:15 2026 +0100

    server: add 'services' command to list service information
    
    This addes a 'services' command which outputs a TCL list
    where each entry is a TCL dict containing information about
    the service.
    
    This allows obtaining the actual TCP port used when the
    requested port is 0. Tested with the following script:
    
    adapter driver dummy
    gdb port 0
    jtag newtap tap cpu -irlen 5
    target create tap.cpu riscv -chain-position tap.cpu
    init
    echo [services]
    shutdown
    
    Output is:
    
    ...
    Info : [tap.cpu] starting gdb server on 0
    Info : Listening on port 53811 for gdb connections
    {
        name gdb
        port 53811
        target tap.cpu
    }
    
    Change-Id: I29bc2d352c0058f8b6a1c4296345f9ece4fbe03f
    Signed-off-by: Tim Hutt <td...@gm...>
    Reviewed-on: https://review.openocd.org/c/openocd/+/9535
    Tested-by: jenkins
    Reviewed-by: Evgeniy Naydanov <eu...@gm...>
    Reviewed-by: Antonio Borneo <bor...@gm...>

diff --git a/src/server/gdb_server.c b/src/server/gdb_server.c
index 7c8bfee8e..40fda1e4e 100644
--- a/src/server/gdb_server.c
+++ b/src/server/gdb_server.c
@@ -27,6 +27,7 @@
 #include "config.h"
 #endif
 
+#include <helper/tcl-common.h>
 #include <target/breakpoints.h>
 #include <target/target_request.h>
 #include <target/register.h>
@@ -3913,6 +3914,20 @@ static void gdb_keep_client_alive(struct connection *connection)
 	}
 }
 
+static COMMAND_HELPER(gdb_service_info, const struct service *service)
+{
+	struct gdb_service *gdb_service = service->priv;
+
+	char *cmd_name = tcl_escape_alloc(CMD_CTX->interp, gdb_service->target->cmd_name);
+	if (!cmd_name) {
+		LOG_ERROR("Unable to escape Tcl string");
+		return ERROR_FAIL;
+	}
+	command_print(cmd, "    target %s", cmd_name);
+	free(cmd_name);
+	return ERROR_OK;
+}
+
 static const struct service_driver gdb_service_driver = {
 	.name = "gdb",
 	.new_connection_during_keep_alive_handler = NULL,
@@ -3920,6 +3935,7 @@ static const struct service_driver gdb_service_driver = {
 	.input_handler = gdb_input,
 	.connection_closed_handler = gdb_connection_closed,
 	.keep_client_alive_handler = gdb_keep_client_alive,
+	.service_info_handler = gdb_service_info,
 };
 
 static int gdb_target_start(struct target *target, const char *port)
diff --git a/src/server/server.c b/src/server/server.c
index dce626201..cee1028c4 100644
--- a/src/server/server.c
+++ b/src/server/server.c
@@ -16,6 +16,7 @@
 #endif
 
 #include "server.h"
+#include <helper/tcl-common.h>
 #include <helper/time_support.h>
 #include <target/target.h>
 #include <target/target_request.h>
@@ -231,6 +232,7 @@ int add_service(const struct service_driver *driver, const char *port,
 	c->connection_closed = driver->connection_closed_handler;
 	c->keep_client_alive = driver->keep_client_alive_handler;
 	c->service_dtor = driver->service_dtor_handler;
+	c->service_info = driver->service_info_handler;
 	c->priv = priv;
 	c->next = NULL;
 
@@ -873,6 +875,51 @@ COMMAND_HANDLER(handle_bindto_command)
 	return ERROR_OK;
 }
 
+COMMAND_HANDLER(handle_services_command)
+{
+	if (CMD_ARGC != 0)
+		return ERROR_COMMAND_SYNTAX_ERROR;
+
+	for (const struct service *s = services; s; s = s->next) {
+		command_print(CMD, "{");
+
+		/* Escape the name in case it contains special characters. */
+		char *escaped_name = tcl_escape_alloc(CMD_CTX->interp, s->name);
+		if (!escaped_name) {
+			command_print(CMD, "Unable to escape Tcl string");
+			return ERROR_FAIL;
+		}
+		command_print(CMD, "    name %s", escaped_name);
+		free(escaped_name);
+
+		struct sockaddr_in addr_in;
+		addr_in.sin_port = 0;
+		socklen_t addr_in_size = sizeof(addr_in);
+		/* If it's a TCP connection and they specified port 0 try to get the real port. */
+		if (s->type == CONNECTION_TCP &&
+			s->portnumber == 0 &&
+			getsockname(s->fd, (struct sockaddr *)&addr_in, &addr_in_size) == 0) {
+			command_print(CMD, "    port %hu", ntohs(addr_in.sin_port));
+		} else {
+			/* Need to escape port because it could be a FIFO path which is
+			 * allowed to contain basically any character. */
+			char *escaped_port = tcl_escape_alloc(CMD_CTX->interp, s->port);
+			if (!escaped_port) {
+				command_print(CMD, "Unable to escape Tcl string");
+				return ERROR_FAIL;
+			}
+			command_print(CMD, "    port %s", escaped_port);
+			free(escaped_port);
+		}
+
+		if (s->service_info)
+			CALL_COMMAND_HANDLER(s->service_info, s);
+
+		command_print(CMD, "}");
+	}
+	return ERROR_OK;
+}
+
 static const struct command_registration server_command_handlers[] = {
 	{
 		.name = "shutdown",
@@ -903,6 +950,13 @@ static const struct command_registration server_command_handlers[] = {
 		.help = "Specify address by name on which to listen for "
 			"incoming TCP/IP connections",
 	},
+	{
+		.name = "services",
+		.handler = &handle_services_command,
+		.mode = COMMAND_ANY,
+		.usage = "",
+		.help = "return information about running services"
+	},
 	COMMAND_REGISTRATION_DONE
 };
 
diff --git a/src/server/server.h b/src/server/server.h
index bf3758274..063a1fa34 100644
--- a/src/server/server.h
+++ b/src/server/server.h
@@ -59,6 +59,8 @@ struct service_driver {
 	/** callback to handle incoming data */
 	int (*input_handler)(struct connection *connection);
 	void (*service_dtor_handler)(struct service *service);
+	/** Callback to provide more details for the `services` command. */
+	COMMAND_HELPER((*service_info_handler), const struct service *service);
 	/** callback to tear down the connection */
 	int (*connection_closed_handler)(struct connection *connection);
 	/** called periodically to send keep-alive messages on the connection */
@@ -68,7 +70,12 @@ struct service_driver {
 struct service {
 	char *name;
 	enum connection_type type;
+	/**
+	 * The 'port', which can be an integer for TCP, or 'disabled',
+	 * 'pipe' (stdin/out) or a FIFO path.
+	 */
 	char *port;
+	/** If port is an integer it is parsed and saved here. */
 	unsigned short portnumber;
 	int fd;
 	struct sockaddr_in sin;
@@ -78,6 +85,7 @@ struct service {
 	int (*new_connection)(struct connection *connection);
 	int (*input)(struct connection *connection);
 	void (*service_dtor)(struct service *service);
+	COMMAND_HELPER((*service_info), const struct service *service);
 	int (*connection_closed)(struct connection *connection);
 	void (*keep_client_alive)(struct connection *connection);
 	void *priv;

-----------------------------------------------------------------------

Summary of changes:
 src/server/gdb_server.c | 16 +++++++++++++++
 src/server/server.c     | 54 +++++++++++++++++++++++++++++++++++++++++++++++++
 src/server/server.h     |  8 ++++++++
 3 files changed, 78 insertions(+)


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Main OpenOCD repository

[OpenOCD-commit] Main OpenOCD repository branch, master, updated. v0.12.0-1609-gc064a1999

From: openocd-gerrit <ope...@us...> - 2026-07-25 10:47:20

This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".

The branch, master has been updated
       via  c064a1999f55c66cf85df9f9e4e1e0744e052fe0 (commit)
       via  2968660888fcd248932e2b6561951bf26f2e3916 (commit)
      from  2285b2bca63f39a3db0a01fb2bbec66df2006aaa (commit)

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- Log -----------------------------------------------------------------
commit c064a1999f55c66cf85df9f9e4e1e0744e052fe0
Author: Antonio Borneo <bor...@gm...>
Date:   Sun Jul 12 11:31:47 2026 +0200

    helper: tcl-common: add tcl_escape_alloc()
    
    OpenOCD commands can produce a Tcl output ready to be parsed in
    Tcl scripts.
    When a string has to be converted in a single Tcl element, the
    OpenOCD command has to guarantee that he string does not contains
    character that can confuse the Tcl parsing. A typical example is
    the presence of whitespace that can split the element in two,
    square brackets that can be expanded executing the content.
    
    Rely on Jim Tcl API Jim_NewListObj() to handle all such corner
    cases.
    
    The string returned by tcl_escape_alloc() has to be free() by the
    caller.
    
    Change-Id: I898c314a02d455946e35223a43f7a65ed4c92833
    Signed-off-by: Antonio Borneo <bor...@gm...>
    Reviewed-on: https://review.openocd.org/c/openocd/+/9782
    Reviewed-by: Tim Hutt <td...@gm...>
    Tested-by: jenkins

diff --git a/src/helper/tcl-common.h b/src/helper/tcl-common.h
index 959c39972..4e0e81502 100644
--- a/src/helper/tcl-common.h
+++ b/src/helper/tcl-common.h
@@ -5,4 +5,13 @@
 
 #include <jim.h>
 
+/**
+ * Convert a C string to a string that can be used for Tcl list.
+ * The returned string has to be deallocated through free().
+ * @param interp: the Tcl interpreter
+ * @param s: the C string to convert
+ * @returns converted string or NULL on error
+ */
+char *tcl_escape_alloc(Jim_Interp *interp, const char *s);
+
 #endif /* OPENOCD_HELPER_TCL_COMMON_H */
diff --git a/src/helper/tcl-libjim.c b/src/helper/tcl-libjim.c
index bd19bc445..e36c6335f 100644
--- a/src/helper/tcl-libjim.c
+++ b/src/helper/tcl-libjim.c
@@ -17,4 +17,22 @@
 #include "config.h"
 #endif
 
+#include <assert.h>
+#include <string.h>
+
 #include <helper/tcl-common.h>
+
+char *tcl_escape_alloc(Jim_Interp *interp, const char *s)
+{
+	assert(s);
+
+	Jim_Obj *o1 = Jim_NewStringObj(interp, s, -1);
+	Jim_Obj *o2 = Jim_NewListObj(interp, &o1, 1);
+	Jim_IncrRefCount(o2);
+
+	char *out = strdup(Jim_String(o2));
+
+	Jim_DecrRefCount(interp, o2);
+
+	return out;
+}

commit 2968660888fcd248932e2b6561951bf26f2e3916
Author: Antonio Borneo <bor...@gm...>
Date:   Fri May 9 17:54:23 2025 +0200

    helper: add tcl-common
    
    Add a new helper file to start moving there the code specific to
    Jim Tcl.
    Coding with Jim Tcl require knowledge and dedicated review effort
    to properly handle its garbage collection.
    
    Having such specific helper will let us focus in a single place:
    - the knowledge of Jim Tcl garbage collection;
    - the use of Jim Tcl error codes JIM_OK and JIM_ERR;
    - the use of CamelCase symbols of Jim Tcl.
    
    Confining Jim Tcl code in a single file could also make easier the
    switch to a different Tcl library, in the remote case we need to
    address it.
    
    Change-Id: Idd89adb57e5a782f141f02d9ccdd1911f3aa9bee
    Signed-off-by: Antonio Borneo <bor...@gm...>
    Reviewed-on: https://review.openocd.org/c/openocd/+/9781
    Tested-by: jenkins

diff --git a/src/helper/Makefile.am b/src/helper/Makefile.am
index 1a61f7871..fab10c29e 100644
--- a/src/helper/Makefile.am
+++ b/src/helper/Makefile.am
@@ -18,6 +18,7 @@ noinst_LTLIBRARIES += %D%/libhelper.la
 	%D%/jep106.c \
 	%D%/jim-nvp.c \
 	%D%/nvp.c \
+	%D%/tcl-libjim.c \
 	%D%/align.h \
 	%D%/base64.h \
 	%D%/binarybuffer.h \
@@ -39,6 +40,7 @@ noinst_LTLIBRARIES += %D%/libhelper.la
 	%D%/jep106.inc \
 	%D%/jim-nvp.h \
 	%D%/nvp.h \
+	%D%/tcl-common.h \
 	%D%/compiler.h
 
 STARTUP_TCL_SRCS += %D%/startup.tcl
diff --git a/src/helper/tcl-common.h b/src/helper/tcl-common.h
new file mode 100644
index 000000000..959c39972
--- /dev/null
+++ b/src/helper/tcl-common.h
@@ -0,0 +1,8 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
+#ifndef OPENOCD_HELPER_TCL_COMMON_H
+#define OPENOCD_HELPER_TCL_COMMON_H
+
+#include <jim.h>
+
+#endif /* OPENOCD_HELPER_TCL_COMMON_H */
diff --git a/src/helper/tcl-libjim.c b/src/helper/tcl-libjim.c
new file mode 100644
index 000000000..bd19bc445
--- /dev/null
+++ b/src/helper/tcl-libjim.c
@@ -0,0 +1,20 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
+/*
+ * This file collects all the functions to interact with Jim Tcl library.
+ *
+ * The purposes are:
+ * - to decouple the jimtcl error codes (JIM_OK, JIM_ERR, ...) from the error
+ *   codes of OpenOCD;
+ * - to decouple the internal Jim_Obj and its garbage collection;
+ * - to concentrate the Jim Tcl CamelCase symbols, now spread in OpenOCD code.
+ *
+ * The Jim Tcl CamelCase symbols used in this file should be reported in the
+ * file 'tools/scripts/camelcase.txt' to prevent errors from checkpatch.
+ */
+
+#ifdef HAVE_CONFIG_H
+#include "config.h"
+#endif
+
+#include <helper/tcl-common.h>

-----------------------------------------------------------------------

Summary of changes:
 src/helper/Makefile.am  |  2 ++
 src/helper/tcl-common.h | 17 +++++++++++++++++
 src/helper/tcl-libjim.c | 38 ++++++++++++++++++++++++++++++++++++++
 3 files changed, 57 insertions(+)
 create mode 100644 src/helper/tcl-common.h
 create mode 100644 src/helper/tcl-libjim.c


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From: openocd-gerrit <ope...@us...> - 2026-07-25 10:46:00

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- Log -----------------------------------------------------------------
commit 2285b2bca63f39a3db0a01fb2bbec66df2006aaa
Author: Antonio Borneo <bor...@gm...>
Date:   Sun Jul 12 23:49:22 2026 +0200

    checkpatch: add list of OpenOCD attributes
    
    The script checkpatch gets confused by function attributes that it
    does not understand, e.g.:
            tools/scripts/checkpatch.pl --types SPACING \
            -f src/jtag/drivers/OpenULINK/src/main.c
    produces
            ERROR:SPACING: No space is necessary after a cast
            #14: FILE: src/jtag/drivers/OpenULINK/src/main.c:14:
            +extern void sudav_isr(void)    __interrupt(SUDAV_ISR);
    
    because it interprets '(void)' as a cast for the rest of the line.
    
    Add the attribute '__interrupt' in the list of known attributes.
    
    Change-Id: I70f1ebe21e14922d13323a22b970034d406b6fbf
    Signed-off-by: Antonio Borneo <bor...@gm...>
    Reviewed-on: https://review.openocd.org/c/openocd/+/9783
    Tested-by: jenkins

diff --git a/tools/scripts/checkpatch.pl b/tools/scripts/checkpatch.pl
index f77f364d1..010b7f43d 100755
--- a/tools/scripts/checkpatch.pl
+++ b/tools/scripts/checkpatch.pl
@@ -512,9 +512,14 @@ our $InitAttributeConst = qr{$InitAttributePrefix(?:initconst\b)};
 our $InitAttributeInit = qr{$InitAttributePrefix(?:init\b)};
 our $InitAttribute = qr{$InitAttributeData|$InitAttributeConst|$InitAttributeInit};
 
+# OpenOCD specific: Begin: list of attributes
+our $OpenOCD_Attribute = qr{__interrupt};
+# OpenOCD specific: End
+
 # Notes to $Attribute:
 # We need \b after 'init' otherwise 'initconst' will cause a false positive in a check
 our $Attribute	= qr{
+			$OpenOCD_Attribute|
 			const|
 			volatile|
 			__percpu|

commit 5466b23015c9e334a7f68454782a11735c8e765c
Author: Charles Mirabile <cmi...@re...>
Date:   Thu Mar 12 21:05:22 2026 -0400

    OpenULINK firmware: fix build with sdcc versions >= 4.2.3
    
    Since sdcc 4.2.3 the numeric parameter to `__interrupt` must be between
    parentheses.
    
    Check patch does not recognize the interrupt keyword as a function
    attribute, it thinks that they are casts and gets confused, hence:
    Checkpatch-ignore: SPACING
    
    Change-Id: I57a84f8cc2ef0bcc6def7e673bb52236d4725dda
    Signed-off-by: Charles Mirabile <cmi...@re...>
    Reviewed-on: https://review.openocd.org/c/openocd/+/9514
    Reviewed-by: Antonio Borneo <bor...@gm...>
    Reviewed-by: Adrien Charruel <adr...@gm...>
    Tested-by: jenkins
    Reviewed-by: zapb <de...@za...>

diff --git a/src/jtag/drivers/OpenULINK/src/main.c b/src/jtag/drivers/OpenULINK/src/main.c
index 51d3a3b94..032f41c0c 100644
--- a/src/jtag/drivers/OpenULINK/src/main.c
+++ b/src/jtag/drivers/OpenULINK/src/main.c
@@ -11,7 +11,7 @@
 #include "usb.h"
 #include "protocol.h"
 
-extern void sudav_isr(void)    __interrupt SUDAV_ISR;
+extern void sudav_isr(void)    __interrupt(SUDAV_ISR);
 extern void sof_isr(void)      __interrupt;
 extern void sutok_isr(void)    __interrupt;
 extern void suspend_isr(void)  __interrupt;
diff --git a/src/jtag/drivers/OpenULINK/src/usb.c b/src/jtag/drivers/OpenULINK/src/usb.c
index 408e21217..39d166ef2 100644
--- a/src/jtag/drivers/OpenULINK/src/usb.c
+++ b/src/jtag/drivers/OpenULINK/src/usb.c
@@ -118,7 +118,7 @@ __code struct usb_string_descriptor *__code en_string_descriptors[4] = {
 	&strConfigDescr
 };
 
-void sudav_isr(void) __interrupt SUDAV_ISR
+void sudav_isr(void) __interrupt(SUDAV_ISR)
 {
 	CLEAR_IRQ();
 
@@ -128,39 +128,39 @@ void sudav_isr(void) __interrupt SUDAV_ISR
 	EP0CS |= HSNAK;
 }
 
-void sof_isr(void)      __interrupt SOF_ISR
+void sof_isr(void)      __interrupt(SOF_ISR)
 {
 }
-void sutok_isr(void)    __interrupt SUTOK_ISR
+void sutok_isr(void)    __interrupt(SUTOK_ISR)
 {
 }
-void suspend_isr(void)  __interrupt SUSPEND_ISR
+void suspend_isr(void)  __interrupt(SUSPEND_ISR)
 {
 }
-void usbreset_isr(void) __interrupt USBRESET_ISR
+void usbreset_isr(void) __interrupt(USBRESET_ISR)
 {
 }
-void ibn_isr(void)      __interrupt IBN_ISR
+void ibn_isr(void)      __interrupt(IBN_ISR)
 {
 }
 
-void ep0in_isr(void)    __interrupt EP0IN_ISR
+void ep0in_isr(void)    __interrupt(EP0IN_ISR)
 {
 }
-void ep0out_isr(void)   __interrupt EP0OUT_ISR
+void ep0out_isr(void)   __interrupt(EP0OUT_ISR)
 {
 }
-void ep1in_isr(void)    __interrupt EP1IN_ISR
+void ep1in_isr(void)    __interrupt(EP1IN_ISR)
 {
 }
-void ep1out_isr(void)   __interrupt EP1OUT_ISR
+void ep1out_isr(void)   __interrupt(EP1OUT_ISR)
 {
 }
 
 /**
  * EP2 IN: called after the transfer from uC->Host has finished: we sent data
  */
-void ep2in_isr(void)    __interrupt EP2IN_ISR
+void ep2in_isr(void)    __interrupt(EP2IN_ISR)
 {
 	EP2_in = 1;
 
@@ -171,7 +171,7 @@ void ep2in_isr(void)    __interrupt EP2IN_ISR
 /**
  * EP2 OUT: called after the transfer from Host->uC has finished: we got data
  */
-void ep2out_isr(void)   __interrupt EP2OUT_ISR
+void ep2out_isr(void)   __interrupt(EP2OUT_ISR)
 {
 	EP2_out = 1;
 
@@ -179,34 +179,34 @@ void ep2out_isr(void)   __interrupt EP2OUT_ISR
 	OUT07IRQ = OUT2IR;	/* Clear OUT2 IRQ */
 }
 
-void ep3in_isr(void)    __interrupt EP3IN_ISR
+void ep3in_isr(void)    __interrupt(EP3IN_ISR)
 {
 }
-void ep3out_isr(void)   __interrupt EP3OUT_ISR
+void ep3out_isr(void)   __interrupt(EP3OUT_ISR)
 {
 }
-void ep4in_isr(void)    __interrupt EP4IN_ISR
+void ep4in_isr(void)    __interrupt(EP4IN_ISR)
 {
 }
-void ep4out_isr(void)   __interrupt EP4OUT_ISR
+void ep4out_isr(void)   __interrupt(EP4OUT_ISR)
 {
 }
-void ep5in_isr(void)    __interrupt EP5IN_ISR
+void ep5in_isr(void)    __interrupt(EP5IN_ISR)
 {
 }
-void ep5out_isr(void)   __interrupt EP5OUT_ISR
+void ep5out_isr(void)   __interrupt(EP5OUT_ISR)
 {
 }
-void ep6in_isr(void)    __interrupt EP6IN_ISR
+void ep6in_isr(void)    __interrupt(EP6IN_ISR)
 {
 }
-void ep6out_isr(void)   __interrupt EP6OUT_ISR
+void ep6out_isr(void)   __interrupt(EP6OUT_ISR)
 {
 }
-void ep7in_isr(void)    __interrupt EP7IN_ISR
+void ep7in_isr(void)    __interrupt(EP7IN_ISR)
 {
 }
-void ep7out_isr(void)   __interrupt EP7OUT_ISR
+void ep7out_isr(void)   __interrupt(EP7OUT_ISR)
 {
 }
 

-----------------------------------------------------------------------

Summary of changes:
 src/jtag/drivers/OpenULINK/src/main.c |  2 +-
 src/jtag/drivers/OpenULINK/src/usb.c  | 44 +++++++++++++++++------------------
 tools/scripts/checkpatch.pl           |  5 ++++
 3 files changed, 28 insertions(+), 23 deletions(-)


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From: openocd-gerrit <ope...@us...> - 2026-07-25 10:45:46

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- Log -----------------------------------------------------------------
commit 13d93bf6d1ef5542cc5e742f8010529c814b4aaa
Author: Felipe Moura Oliveira <mou...@gm...>
Date:   Mon May 18 17:35:04 2026 -0300

    tcl: add Holtek HT32F4 (Artery AT32F423-compatible) configs
    
    The Holtek HT32F4 series uses a flash memory controller that is
    register-compatible with the Artery AT32F423. Its device IDs are
    already present in the artery flash driver, so these parts are
    programmed and debugged by the existing driver without code changes.
    
    Add manufacturer config files under the holtek/ subdirectories:
     - interface/holtek/e-link32.cfg  (e-Link32 Pro/Lite adapter)
     - target/holtek/ht32f4x.cfg      (HT32F4 series target)
     - board/holtek/esk32-31401.cfg   (ESK32-31401 starter kit)
    Add the e-Link32 USB IDs to contrib/60-openocd.rules and a note to
    the artery driver documentation.
    
    Verified on a Holtek HT32F49163 (100LQFP, DID 0x700a3240) on an
    ESK32-31401 board with an e-Link32 Pro: flash probe, sector erase,
    program, verify and SWD debug via the in-tree artery driver.
    
    Signed-off-by: Felipe Moura Oliveira <mou...@gm...>
    Change-Id: Ica51123f555e97765d6ea444c7ea1389da8d0abe
    Reviewed-on: https://review.openocd.org/c/openocd/+/9662
    Tested-by: jenkins
    Reviewed-by: Antonio Borneo <bor...@gm...>

diff --git a/contrib/60-openocd.rules b/contrib/60-openocd.rules
index 775a25f24..247ec71e9 100644
--- a/contrib/60-openocd.rules
+++ b/contrib/60-openocd.rules
@@ -132,6 +132,10 @@ ATTRS{idVendor}=="04b4", ATTRS{idProduct}=="f139", MODE="660", GROUP="plugdev",
 # Cypress KitProg in CMSIS-DAP mode
 ATTRS{idVendor}=="04b4", ATTRS{idProduct}=="f138", MODE="660", GROUP="plugdev", TAG+="uaccess"
 
+# Holtek e-Link32 Pro/Lite
+ATTRS{idVendor}=="04d9", ATTRS{idProduct}=="802f", MODE="660", GROUP="plugdev", TAG+="uaccess"
+ATTRS{idVendor}=="04d9", ATTRS{idProduct}=="8052", MODE="660", GROUP="plugdev", TAG+="uaccess"
+
 # Infineon DAP miniWiggler v3
 ATTRS{idVendor}=="058b", ATTRS{idProduct}=="0043", MODE="660", GROUP="plugdev", TAG+="uaccess"
 
diff --git a/doc/openocd.texi b/doc/openocd.texi
index df0e18d78..a4ffafa10 100644
--- a/doc/openocd.texi
+++ b/doc/openocd.texi
@@ -6803,6 +6803,10 @@ This driver supports Artery Technology devices from the following series:
 @item AT32WB415
 @end itemize
 
+Some Holtek HT32F4 devices (e.g. the HT32F49153 and HT32F49163) use a
+flash memory controller that is register-compatible with the Artery AT32F423
+and are therefore programmed by this driver.
+
 Devices with dual-bank flash memory are currently not supported.
 Also, access to user data in the user system data (USD) area is not supported.
 
diff --git a/tcl/board/holtek/esk32-31401.cfg b/tcl/board/holtek/esk32-31401.cfg
new file mode 100644
index 000000000..2519e841b
--- /dev/null
+++ b/tcl/board/holtek/esk32-31401.cfg
@@ -0,0 +1,17 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
+# Holtek ESK32-31401 starter kit
+#
+# HT32F49163 (100LQFP) with an on-board Holtek e-Link32 debugger.
+
+source [find interface/holtek/e-link32.cfg]
+
+# The on-board e-Link32 debugger is wired to the SWD pins of the target.
+transport select swd
+
+source [find target/holtek/ht32f4x.cfg]
+
+# Connection-related settings (depend on the board wiring between the
+# adapter and the chip):
+adapter speed 1000
+reset_config srst_only
diff --git a/tcl/interface/holtek/e-link32.cfg b/tcl/interface/holtek/e-link32.cfg
new file mode 100644
index 000000000..2ea687ad9
--- /dev/null
+++ b/tcl/interface/holtek/e-link32.cfg
@@ -0,0 +1,10 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
+# Holtek e-Link32 Pro/Lite in-circuit debugger/programmer
+#
+# CMSIS-DAP class adapter. Known USB VID:PID pairs:
+#   0x04d9:0x802f  e-Link32 Pro
+#   0x04d9:0x8052  e-Link32 Lite
+
+source [find interface/cmsis-dap.cfg]
+adapter usb vid_pid 0x04d9 0x802f 0x04d9 0x8052
diff --git a/tcl/target/holtek/ht32f4x.cfg b/tcl/target/holtek/ht32f4x.cfg
new file mode 100644
index 000000000..4a1cd2102
--- /dev/null
+++ b/tcl/target/holtek/ht32f4x.cfg
@@ -0,0 +1,45 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
+# Holtek HT32F4 series (Cortex-M4)
+#
+# The HT32F4 flash memory controller is register-compatible with the Artery
+# AT32 flash memory controller, so the in-tree "artery" flash driver handles
+# these parts. The Holtek device IDs (read from DBG_IDCODE 0xE0042000) are
+# shared with the Artery AT32F423 / AT32F425 series.
+
+source [find target/swj-dp.tcl]
+
+if { [info exists CHIPNAME] } {
+	set _CHIPNAME $CHIPNAME
+} else {
+	set _CHIPNAME ht32f4x
+}
+
+if { [info exists CPUTAPID] } {
+	set _CPUTAPID $CPUTAPID
+} else {
+	set _CPUTAPID 0x2ba01477
+}
+
+if { [info exists WORKAREASIZE] } {
+	set _WORKAREASIZE $WORKAREASIZE
+} else {
+	set _WORKAREASIZE 0x2000
+}
+
+swj_newdap $_CHIPNAME cpu -irlen 4 -expected-id $_CPUTAPID
+dap create $_CHIPNAME.dap -chain-position $_CHIPNAME.cpu
+
+set _TARGETNAME $_CHIPNAME.cpu
+target create $_TARGETNAME cortex_m -dap $_CHIPNAME.dap
+
+$_TARGETNAME configure -work-area-phys 0x20000000 \
+	-work-area-size $_WORKAREASIZE -work-area-backup 0
+
+# Flash size is auto-detected from the device ID by the artery driver.
+flash bank $_CHIPNAME.flash artery 0x08000000 0 0 0 $_TARGETNAME
+
+# The SRST line does not gate the debug logic on these parts. This is the
+# cortex_m default; the rest of the reset configuration (e.g. srst_only)
+# depends on the board wiring and is set by the board file.
+reset_config srst_nogate

-----------------------------------------------------------------------

Summary of changes:
 contrib/60-openocd.rules          |  4 ++++
 doc/openocd.texi                  |  4 ++++
 tcl/board/holtek/esk32-31401.cfg  | 17 +++++++++++++++
 tcl/interface/holtek/e-link32.cfg | 10 +++++++++
 tcl/target/holtek/ht32f4x.cfg     | 45 +++++++++++++++++++++++++++++++++++++++
 5 files changed, 80 insertions(+)
 create mode 100644 tcl/board/holtek/esk32-31401.cfg
 create mode 100644 tcl/interface/holtek/e-link32.cfg
 create mode 100644 tcl/target/holtek/ht32f4x.cfg


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- Log -----------------------------------------------------------------
commit b158f02a24ca3214343afc4050c19ca0f234a99f
Author: Zane Leung <zhe...@sp...>
Date:   Wed Jun 24 11:10:20 2026 +0800

    tcl/target: Add SpacemiT keystone k3 config
    
    Add basic connection details with keystone k3
    
    Change-Id: I0f7b743ae9da99deca72e8a09f7eb69c02bafc60
    Signed-off-by: Zane Leung <zhe...@sp...>
    Reviewed-on: https://review.openocd.org/c/openocd/+/9753
    Tested-by: jenkins
    Reviewed-by: Antonio Borneo <bor...@gm...>

diff --git a/tcl/target/spacemit-k3.cfg b/tcl/target/spacemit-k3.cfg
new file mode 100644
index 000000000..53d1f66e0
--- /dev/null
+++ b/tcl/target/spacemit-k3.cfg
@@ -0,0 +1,135 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
+#
+# SpacemiT Key Stone K3 target
+#
+# https://www.spacemit.com/products/keystone/k3
+#
+
+transport select jtag
+adapter speed 2000
+
+if { [info exists SPEED] } {
+    set _SPEED $SPEED
+} else {
+    set _SPEED 8000
+}
+
+if { [info exists CHIPNAME] } {
+    set _CHIPNAME $CHIPNAME
+} else {
+    set _CHIPNAME k3
+}
+
+# Set TARGET to "rcpu" to enable JTAG for RCPU
+if { [info exists TARGET] } {
+    set _TARGET $TARGET
+} else {
+    set _TARGET acpu
+}
+
+if { $_TARGET == "rcpu" } {
+    set _CPUTAPID 0x10308A6D
+    set _DRVAL 0xe
+} else {
+    set _CPUTAPID 0x10000E21
+    set _DRVAL 0xa
+}
+
+if { [info exists CLUSTERS] } {
+    set _CLUSTERS $CLUSTERS
+} else {
+    set _CLUSTERS {0 1 2 3}
+}
+
+for {set i 0} {$i < 4} {incr i} {
+    if { [info exists CLUSTER${i}_COREIDS] } {
+        set _CLUSTER${i}_COREIDS [set CLUSTER${i}_COREIDS]
+    } else {
+        set _CLUSTER${i}_COREIDS {0 1 2 3}
+    }
+}
+
+if { [info exists SECJTAG] } {
+    set _SECJTAG $SECJTAG
+} else {
+    set _SECJTAG 0
+}
+
+if { $_SECJTAG == 1 } {
+    jtag newtap $_CHIPNAME cpu -irlen 5 -expected-id $_CPUTAPID
+} else {
+    jtag newtap pre unknown -irlen 1 -expected-id 0x00000000 -disable
+    jtag configure pre.unknown -event tap-enable ""
+
+    jtag newtap $_CHIPNAME cpu -irlen 5 -expected-id $_CPUTAPID -disable
+    jtag configure $_CHIPNAME.cpu -event tap-enable ""
+
+    jtag newtap post unknown -irlen 9 -expected-id 0x08502C0D -ignore-version
+
+    jtag configure post.unknown -event setup {
+        global _CHIPNAME _DRVAL
+
+        irscan post.unknown 0x98
+        drscan post.unknown 16 $_DRVAL
+
+        jtag tapenable pre.unknown
+        jtag tapenable $_CHIPNAME.cpu
+    }
+}
+
+set _smp_command "target smp"
+
+if { $_TARGET == "rcpu" } {
+    set _TARGETNAME $_CHIPNAME.$_TARGET
+    foreach coreid $_CLUSTER0_COREIDS {
+        if { $coreid >= 2 } {
+            echo [format "Warning: rcpu index %u is out of range (0..1), it will be ignored" $coreid]
+            continue
+        }
+        target create $_TARGETNAME.$coreid riscv -chain-position $_CHIPNAME.cpu \
+            -coreid $coreid
+
+        if { $coreid == 0 } {
+            $_TARGETNAME.$coreid configure -rtos hwthread
+        }
+
+        set _smp_command "$_smp_command $_TARGETNAME.$coreid"
+    }
+} else {
+    foreach cluster $_CLUSTERS {
+        if { $cluster < 2 } {
+            set _TARGETNAME $_CHIPNAME.x100
+        } elseif { $cluster < 4 } {
+            set _TARGETNAME $_CHIPNAME.a100
+        } else {
+            echo [format "Warning: acpu cluster %u is out of range (0..3), it will be ignored" $cluster]
+            continue
+        }
+
+        set dbgbase [expr {$cluster * 0x400}]
+        foreach coreid [set _CLUSTER${cluster}_COREIDS] {
+            if { $coreid >= 4 } {
+                echo [format "Warning: acpu index %u is out of range (0..3), it will be ignored" $coreid]
+                continue
+            }
+            set hartid [expr {$cluster * 4 + $coreid}]
+            target create $_TARGETNAME.$hartid riscv -chain-position $_CHIPNAME.cpu \
+                -coreid $coreid -dbgbase $dbgbase
+
+            if { $hartid == 0 } {
+                $_TARGETNAME.$hartid configure -rtos hwthread
+            }
+
+            set _smp_command "$_smp_command $_TARGETNAME.$hartid"
+        }
+    }
+}
+
+eval $_smp_command
+
+[target current] configure -event examine-end {
+    adapter speed $_SPEED
+    puts [ adapter speed ]
+    puts [ targets ]
+}

-----------------------------------------------------------------------

Summary of changes:
 tcl/target/{spacemit-k1.cfg => spacemit-k3.cfg} | 47 +++++++++++++++++--------
 1 file changed, 33 insertions(+), 14 deletions(-)
 copy tcl/target/{spacemit-k1.cfg => spacemit-k3.cfg} (64%)


hooks/post-receive
-- 
Main OpenOCD repository

[OpenOCD-commit] Main OpenOCD repository branch, master, updated. v0.12.0-1603-gb1da42b16

From: openocd-gerrit <ope...@us...> - 2026-07-25 10:44:22

This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".

The branch, master has been updated
       via  b1da42b16c713b2e940bc378133316639a101067 (commit)
      from  ca1a5e98f00573956a584c7315d2f67e4c38d227 (commit)

Those revisions listed above that are new to this repository have
not appeared on any other notification email; so we list those
revisions in full, below.

- Log -----------------------------------------------------------------
commit b1da42b16c713b2e940bc378133316639a101067
Author: Zane Leung <zhe...@sp...>
Date:   Wed Jun 24 11:31:56 2026 +0800

    tcl/target: Refactor SpacemiT keystone k1 config
    
    Refactor spacemit-k1.cfg to support flexible multi-core configurations
    
    Change-Id: I65cdcabb66718bf6f13cb8b09d21a741ad0bc3b3
    Signed-off-by: Zane Leung <zhe...@sp...>
    Reviewed-on: https://review.openocd.org/c/openocd/+/9754
    Reviewed-by: Antonio Borneo <bor...@gm...>
    Tested-by: jenkins

diff --git a/tcl/target/spacemit-k1.cfg b/tcl/target/spacemit-k1.cfg
index e57d1adbc..d66b559be 100644
--- a/tcl/target/spacemit-k1.cfg
+++ b/tcl/target/spacemit-k1.cfg
@@ -3,13 +3,24 @@
 #
 # SpacemiT Key Stone K1 target
 #
-# https://www.spacemit.com/key-stone-k1
+# https://www.spacemit.com/products/keystone/k1
 #
 
 transport select jtag
-
 adapter speed 2000
 
+if { [info exists SPEED] } {
+    set _SPEED $SPEED
+} else {
+    set _SPEED 8000
+}
+
+if { [info exists CHIPNAME] } {
+    set _CHIPNAME $CHIPNAME
+} else {
+    set _CHIPNAME k1
+}
+
 # Set TARGET to "rcpu" to enable JTAG for RCPU
 if { [info exists TARGET] } {
     set _TARGET $TARGET
@@ -18,77 +29,88 @@ if { [info exists TARGET] } {
 }
 
 if { $_TARGET == "rcpu" } {
-    set CPUTAPID 0x10308A6D
-    set DRVAL 0xe
+    set _CPUTAPID 0x10308A6D
+    set _DRVAL 0xe
 } else {
-    set CPUTAPID 0x10000E21
-    set DRVAL 0xa
+    set _CPUTAPID 0x10000E21
+    set _DRVAL 0xa
 }
 
-if { [info exists CHIPNAME] } {
-    set _CHIPNAME $CHIPNAME
+if { [info exists CLUSTERS] } {
+    set _CLUSTERS $CLUSTERS
 } else {
-    set _CHIPNAME k1
+    set _CLUSTERS {0 1}
 }
 
-if { [info exists CORES] } {
-    set _cores $CORES
-} else {
-    set _cores 1
+for {set i 0} {$i < 2} {incr i} {
+    if { [info exists CLUSTER${i}_COREIDS] } {
+        set _CLUSTER${i}_COREIDS [set CLUSTER${i}_COREIDS]
+    } else {
+        set _CLUSTER${i}_COREIDS {0 1 2 3}
+    }
 }
 
 if { [info exists SECJTAG] } {
-    jtag newtap $_CHIPNAME cpu -irlen 5 -expected-id $CPUTAPID
+    set _SECJTAG $SECJTAG
+} else {
+    set _SECJTAG 0
+}
+
+if { $_SECJTAG == 1 } {
+    jtag newtap $_CHIPNAME cpu -irlen 5 -expected-id $_CPUTAPID
 } else {
     jtag newtap pre unknown -irlen 1 -expected-id 0x00000000 -disable
     jtag configure pre.unknown -event tap-enable ""
 
-    jtag newtap $_CHIPNAME cpu -irlen 5 -expected-id $CPUTAPID -disable
+    jtag newtap $_CHIPNAME cpu -irlen 5 -expected-id $_CPUTAPID -disable
     jtag configure $_CHIPNAME.cpu -event tap-enable ""
 
     jtag newtap post unknown -irlen 9 -expected-id 0x08501C0D -ignore-version
 
     jtag configure post.unknown -event setup {
-        global _CHIPNAME DRVAL
+        global _CHIPNAME _DRVAL
 
         irscan post.unknown 0x98
-        drscan post.unknown 16 $DRVAL
+        drscan post.unknown 16 $_DRVAL
 
         jtag tapenable pre.unknown
         jtag tapenable $_CHIPNAME.cpu
     }
 }
 
-set _TARGETNAME $_CHIPNAME.cpu_$_TARGET
-
+set _TARGETNAME $_CHIPNAME.$_TARGET
 if { $_TARGET == "rcpu" } {
-    target create $_TARGETNAME.0 riscv -chain-position $_CHIPNAME.cpu
+    target create $_TARGETNAME riscv -chain-position $_CHIPNAME.cpu
 } else {
-    set DBGBASE {0x0 0x400}
     set _smp_command "target smp"
-
-    for { set _core 0 } { $_core < $_cores } { incr _core } {
-        target create $_TARGETNAME.$_core riscv -chain-position $_CHIPNAME.cpu \
-            -coreid [expr {$_core % 4}] -dbgbase [lindex $DBGBASE [expr {$_core / 4}]]
-
-        if { [expr {$_core % 4}] == 0 } {
-            $_TARGETNAME.$_core configure -rtos hwthread
+    foreach cluster $_CLUSTERS {
+        if { $cluster > 2 } {
+            echo [format "Warning: x60 cluster %u is out of range (0..1), it will be ignored" $cluster]
+            continue
         }
 
-        set _smp_command "$_smp_command $_TARGETNAME.$_core"
+        set dbgbase [expr {$cluster * 0x400}]
+        foreach coreid [set _CLUSTER${cluster}_COREIDS] {
+            if { $coreid >= 4 } {
+                echo [format "Warning: x60 cpu index %u is out of range (0..3), it will be ignored" $coreid]
+                continue
+            }
+            set hartid [expr {$cluster * 4 + $coreid}]
+            target create $_TARGETNAME.$hartid riscv -chain-position $_CHIPNAME.cpu \
+                -coreid $coreid -dbgbase $dbgbase
+
+            if { $hartid == 0 } {
+                $_TARGETNAME.$hartid configure -rtos hwthread
+            }
+
+            set _smp_command "$_smp_command $_TARGETNAME.$hartid"
+        }
     }
-
     eval $_smp_command
 }
 
-set _SPEED 8000
-
-$_TARGETNAME.0 configure -event examine-start {
+[target current] configure -event examine-end {
     adapter speed $_SPEED
     puts [ adapter speed ]
-}
-
-foreach t [target names] {
-    # $t riscv set_mem_access sysbus progbuf
-    $t riscv set_mem_access progbuf
+    puts [ targets ]
 }

-----------------------------------------------------------------------

Summary of changes:
 tcl/target/spacemit-k1.cfg | 98 ++++++++++++++++++++++++++++------------------
 1 file changed, 60 insertions(+), 38 deletions(-)


hooks/post-receive
-- 
Main OpenOCD repository

[OpenOCD-commit] Main OpenOCD repository branch, master, updated. v0.12.0-1602-gca1a5e98f

From: openocd-gerrit <ope...@us...> - 2026-07-25 10:40:02

This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".

The branch, master has been updated
       via  ca1a5e98f00573956a584c7315d2f67e4c38d227 (commit)
      from  51eade7c4abc00a48688a153ea36016c6bfb9356 (commit)

Those revisions listed above that are new to this repository have
not appeared on any other notification email; so we list those
revisions in full, below.

- Log -----------------------------------------------------------------
commit ca1a5e98f00573956a584c7315d2f67e4c38d227
Author: Jan Matyas <jan...@co...>
Date:   Mon Jan 5 07:27:20 2026 +0100

    server: Allow OpenOCD to shut down with user-specified code
    
    Improve the "shutdown" command so that the user can optionally
    specify a concrete exit code for OpenOCD.
    
    The change is backward-compatible:
    
    shutdown          ;# same as: shutdown 0
    shutdown error    ;# same as: shutdown 1
    shutdown 5        ;# new capability: concrete exit code
    
    This feature is useful when different errors can occur in a given Tcl
    script, and the parent process (that launched OpenOCD) needs to
    distinguish between these errors.
    
    Concrete use case (example): When testing OpenOCD in an automated
    way, some tests may need to be skipped because they are not applicable
    for the given situation (e.g. for the target under test). In that case,
    the Tcl script can now exit with a specific code, which the parent
    process will then interpret as a skipped test, not as a test failure.
    
    While making the change, the code related to the shutdown reason
    was cleaned up.
    
    Documentation was updated accordingly.
    
    Change-Id: I4279b80853db55b1f0c7f930883fcd7f16cae00c
    Signed-off-by: Jan Matyas <jan...@co...>
    Reviewed-on: https://review.openocd.org/c/openocd/+/9381
    Tested-by: jenkins
    Reviewed-by: Antonio Borneo <bor...@gm...>

diff --git a/doc/openocd.texi b/doc/openocd.texi
index 89900b06a..df0e18d78 100644
--- a/doc/openocd.texi
+++ b/doc/openocd.texi
@@ -9585,16 +9585,28 @@ Useful in connection with script files
 (@command{script} command and @command{target_name} configuration).
 @end deffn
 
-@deffn {Command} {shutdown} [@option{error}]
-Close the OpenOCD server, disconnecting all clients (GDB, telnet,
-other). If option @option{error} is used, OpenOCD will return a
-non-zero exit code to the parent process.
+@deffn {Command} {shutdown} [@option{error} | exit_status_code]
+Close the OpenOCD server, disconnecting all clients (GDB, telnet and
+others). Then the OpenOCD process quits.
+
+The optional argument to @command{shutdown} allows to specify a concrete
+exit status for the OpenOCD process. If omitted, exit status zero
+will be used (denoting successful execution).
+
+Command @command{shutdown error} is a synonym for @command{shutdown 1}
+for backward compatibility with older OpenOCD versions.
+
+"Exit status" (also referred to as "exit code" or "exit value") is an integer
+number in the range 0 - 255 which denotes whether a process exited successfully
+or whether an error occurred. Zero exit status means success whereas non-zero
+value denotes an error. The exit status can be obtained and inspected by
+the parent process (for instance via @command{$?} in a shell command line).
 
 If user types CTRL-C or kills OpenOCD, the command @command{shutdown}
-will be automatically executed to cause OpenOCD to exit.
+will also be automatically executed to cause OpenOCD to exit.
 
-It is possible to specify, in the Tcl list @var{pre_shutdown_commands} , a
-set of commands to be automatically executed before @command{shutdown} , e.g.:
+It is possible to specify, in the Tcl list @var{pre_shutdown_commands}, a
+set of commands to be automatically executed before @command{shutdown}, e.g.:
 @example
 lappend pre_shutdown_commands @{echo "Goodbye, my friend ..."@}
 lappend pre_shutdown_commands @{echo "see you soon !"@}
diff --git a/src/openocd.c b/src/openocd.c
index f3e1bee48..efbbf006b 100644
--- a/src/openocd.c
+++ b/src/openocd.c
@@ -275,7 +275,8 @@ static struct command_context *setup_command_handler(Jim_Interp *interp)
 	return cmd_ctx;
 }
 
-/** OpenOCD runtime meat that can become single-thread in future. It parse
+/**
+ * OpenOCD runtime meat that can become single-thread in future. It parses
  * commandline, reads configuration, sets up the target and starts server loop.
  * Commandline arguments are passed into this function from openocd_main().
  */
@@ -291,6 +292,8 @@ static int openocd_thread(int argc, char *argv[], struct command_context *cmd_ct
 
 	ret = parse_config_file(cmd_ctx);
 	if (ret == ERROR_COMMAND_CLOSE_CONNECTION) {
+		/* Shutdown command encountered while processing the initial
+		 * commands/scripts. */
 		server_quit(); /* gdb server may be initialized by -c init */
 		return ERROR_OK;
 	} else if (ret != ERROR_OK) {
@@ -310,14 +313,10 @@ static int openocd_thread(int argc, char *argv[], struct command_context *cmd_ct
 		}
 	}
 
-	ret = server_loop(cmd_ctx);
+	server_loop(cmd_ctx);
 
-	int last_signal = server_quit();
-	if (last_signal != ERROR_OK)
-		return last_signal;
+	server_quit();
 
-	if (ret != ERROR_OK)
-		return ERROR_FAIL;
 	return ERROR_OK;
 }
 
@@ -326,8 +325,6 @@ static int openocd_thread(int argc, char *argv[], struct command_context *cmd_ct
  * application will have it's own implementation of main(). */
 int openocd_main(int argc, char *argv[])
 {
-	int ret;
-
 	/* initialize commandline interface */
 	struct command_context *cmd_ctx;
 
@@ -349,7 +346,7 @@ int openocd_main(int argc, char *argv[])
 	server_host_os_entry();
 
 	/* Start the executable meat that can evolve into thread in future. */
-	ret = openocd_thread(argc, argv, cmd_ctx);
+	int ret = openocd_thread(argc, argv, cmd_ctx);
 
 	flash_free_all_banks();
 	gdb_service_free();
@@ -382,10 +379,17 @@ int openocd_main(int argc, char *argv[])
 	__gcov_dump();
 #endif
 
-	if (ret == ERROR_FAIL)
+	if (ret != ERROR_OK) {
+		/* An error occurred before the server could be fully started.
+		 * For example during the processing of initial commands/scripts. */
 		return EXIT_FAILURE;
-	else if (ret != ERROR_OK)
-		exit_on_signal(ret);
+	}
+
+	// Otherwise check the shutdown reason of the server
+	if (server_terminated_by_signal())
+		// Server terminated by a signal.
+		return exit_on_signal(server_get_last_signal_number());
 
-	return ret;
+	// Server terminated by shutdown command.
+	return server_get_exit_status_code();
 }
diff --git a/src/server/server.c b/src/server/server.c
index 9e40d4d00..dce626201 100644
--- a/src/server/server.c
+++ b/src/server/server.c
@@ -35,8 +35,6 @@
 #include <netinet/tcp.h>
 #endif
 
-static struct service *services;
-
 enum shutdown_reason {
 	CONTINUE_MAIN_LOOP,			/* stay in main event loop */
 	SHUTDOWN_REQUESTED,			/* set by shutdown command; exit the event loop and quit the debugger */
@@ -44,9 +42,15 @@ enum shutdown_reason {
 	SHUTDOWN_WITH_SIGNAL_CODE	/* set by sig_handler; exec shutdown then exit with signal as return code */
 };
 
+static struct service *services;
+
 static volatile sig_atomic_t shutdown_openocd = CONTINUE_MAIN_LOOP;
-/* store received signal to exit application by killing ourselves */
+/* Received signal number, later used to kill ourselves.
+ * Only relevant for SHUTDOWN_WITH_SIGNAL_CODE. */
 static volatile sig_atomic_t last_signal;
+/* Exit status to use. Only relevant for SHUTDOWN_REQUESTED
+ * or SHUTDOWN_WITH_ERROR_CODE. */
+static uint8_t openocd_exit_status_code;
 
 /* set the polling period to 100ms */
 static int polling_period = 100;
@@ -428,7 +432,7 @@ void server_keep_clients_alive(void)
 				s->keep_client_alive(c);
 }
 
-int server_loop(struct command_context *command_context)
+void server_loop(struct command_context *command_context)
 {
 	struct service *service;
 
@@ -503,7 +507,9 @@ int server_loop(struct command_context *command_context)
 				FD_ZERO(&read_fds);
 			else {
 				LOG_ERROR("error during select: %s", strerror(errno));
-				return ERROR_FAIL;
+				shutdown_openocd = SHUTDOWN_WITH_ERROR_CODE;
+				openocd_exit_status_code = EXIT_FAILURE;
+				return;
 			}
 #else
 
@@ -511,7 +517,9 @@ int server_loop(struct command_context *command_context)
 				FD_ZERO(&read_fds);
 			else {
 				LOG_ERROR("error during select: %s", strerror(errno));
-				return ERROR_FAIL;
+				shutdown_openocd = SHUTDOWN_WITH_ERROR_CODE;
+				openocd_exit_status_code = EXIT_FAILURE;
+				return;
 			}
 #endif
 		}
@@ -601,11 +609,33 @@ int server_loop(struct command_context *command_context)
 #endif
 	}
 
+	assert(shutdown_openocd == SHUTDOWN_REQUESTED ||
+		shutdown_openocd == SHUTDOWN_WITH_ERROR_CODE ||
+		shutdown_openocd == SHUTDOWN_WITH_SIGNAL_CODE);
+
 	/* when quit for signal or CTRL-C, run (eventually user implemented) "shutdown" */
 	if (shutdown_openocd == SHUTDOWN_WITH_SIGNAL_CODE)
 		command_run_line(command_context, "shutdown");
+}
+
+bool server_terminated_by_signal(void)
+{
+	return shutdown_openocd == SHUTDOWN_WITH_SIGNAL_CODE;
+}
+
+int server_get_last_signal_number(void)
+{
+	/* This value is only meaningful if the shutdown reason is signal.
+	 * The caller should check the shutdown reason first. */
+	assert(server_terminated_by_signal());
+
+	return last_signal;
+}
 
-	return shutdown_openocd == SHUTDOWN_WITH_ERROR_CODE ? ERROR_FAIL : ERROR_OK;
+uint8_t server_get_exit_status_code(void)
+{
+	assert(!server_terminated_by_signal());
+	return openocd_exit_status_code;
 }
 
 static void sig_handler(int sig)
@@ -704,19 +734,14 @@ int server_init(struct command_context *cmd_ctx)
 	return ERROR_OK;
 }
 
-int server_quit(void)
+void server_quit(void)
 {
 	remove_services();
 	target_quit();
 
 #ifdef _WIN32
 	SetConsoleCtrlHandler(control_handler, FALSE);
-
-	return ERROR_OK;
 #endif
-
-	/* return signal number so we can kill ourselves */
-	return last_signal;
 }
 
 void server_free(void)
@@ -729,12 +754,16 @@ void server_free(void)
 	free(bindto_name);
 }
 
-void exit_on_signal(int sig)
+int exit_on_signal(int sig)
 {
 #ifndef _WIN32
-	/* bring back default system handler and kill yourself */
+	// *nix: Bring back the default system handler and kill self
 	signal(sig, SIG_DFL);
-	kill(getpid(), sig);
+	kill(getpid(), sig); /* does not return */
+	__builtin_unreachable();
+#else
+	// On Windows, simply use the signal number as the exit code
+	return sig;
 #endif
 }
 
@@ -766,19 +795,36 @@ bool openocd_is_shutdown_pending(void)
 /* tell the server we want to shut down */
 COMMAND_HANDLER(handle_shutdown_command)
 {
-	LOG_USER("shutdown command invoked");
-
-	shutdown_openocd = SHUTDOWN_REQUESTED;
+	if (CMD_ARGC > 1)
+		return ERROR_COMMAND_SYNTAX_ERROR;
 
-	command_run_line(CMD_CTX, "_run_pre_shutdown_commands");
+	LOG_USER("shutdown command invoked");
 
-	if (CMD_ARGC == 1) {
-		if (!strcmp(CMD_ARGV[0], "error")) {
-			shutdown_openocd = SHUTDOWN_WITH_ERROR_CODE;
-			return ERROR_FAIL;
+	if (CMD_ARGC == 0) {
+		/* When "shutdown" (without parameters) is auto-executed
+		 * as a result of a signal, keep the alredy-set shutdown reason
+		 * unchanged. */
+		if (shutdown_openocd != SHUTDOWN_WITH_SIGNAL_CODE) {
+			// Default exit code is zero (success)
+			shutdown_openocd = SHUTDOWN_REQUESTED;
+			openocd_exit_status_code = 0;
+		}
+	} else {
+		uint8_t code;
+		if (strcmp(CMD_ARGV[0], "error") == 0) {
+			/* "shutdown error" is a synonym of "shutdown 1"
+			 * for backward compatibility. */
+			code = 1;
+		} else {
+			COMMAND_PARSE_NUMBER(u8, CMD_ARGV[0], code);
 		}
+
+		shutdown_openocd = (code == 0) ? SHUTDOWN_REQUESTED : SHUTDOWN_WITH_ERROR_CODE;
+		openocd_exit_status_code = code;
 	}
 
+	command_run_line(CMD_CTX, "_run_pre_shutdown_commands");
+
 	return ERROR_COMMAND_CLOSE_CONNECTION;
 }
 
@@ -832,8 +878,8 @@ static const struct command_registration server_command_handlers[] = {
 		.name = "shutdown",
 		.handler = &handle_shutdown_command,
 		.mode = COMMAND_ANY,
-		.usage = "",
-		.help = "shut the server down",
+		.usage = "['error'|exit_code]",
+		.help = "shut down OpenOCD process",
 	},
 	{
 		.name = "exit",
diff --git a/src/server/server.h b/src/server/server.h
index 393dba769..bf3758274 100644
--- a/src/server/server.h
+++ b/src/server/server.h
@@ -93,13 +93,16 @@ int server_host_os_close(void);
 
 int server_preinit(void);
 int server_init(struct command_context *cmd_ctx);
-int server_quit(void);
+void server_quit(void);
 void server_free(void);
-void exit_on_signal(int sig);
+int exit_on_signal(int sig);
 
 void server_keep_clients_alive(void);
 
-int server_loop(struct command_context *command_context);
+void server_loop(struct command_context *command_context);
+bool server_terminated_by_signal(void);
+int server_get_last_signal_number(void);
+uint8_t server_get_exit_status_code(void);
 
 int server_register_commands(struct command_context *context);
 

-----------------------------------------------------------------------

Summary of changes:
 doc/openocd.texi    | 26 ++++++++++----
 src/openocd.c       | 32 +++++++++--------
 src/server/server.c | 98 +++++++++++++++++++++++++++++++++++++++--------------
 src/server/server.h |  9 +++--
 4 files changed, 115 insertions(+), 50 deletions(-)


hooks/post-receive
-- 
Main OpenOCD repository

[OpenOCD-commit] Main OpenOCD repository branch, master, updated. v0.12.0-1601-g51eade7c4

From: openocd-gerrit <ope...@us...> - 2026-07-25 10:38:20

This is an automated email from the git hooks/post-receive script. It was
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commit 51eade7c4abc00a48688a153ea36016c6bfb9356
Author: Craig Haywood <ad...@br...>
Date:   Thu Jul 9 12:27:36 2026 +1000

    tcl/board/brisbanesilicon: Add board definition for EPM11
    
    The EPM11 is a combination MCU-FPGA development board
    from BrisbaneSilicon (https://brisbanesilicon.com.au/epm11/)
    that is built around a RP2350 and a GoWIN GW1NR9.
    
    It includes 2 x Pushbuttons, 2 x LEDs, 24 x GPIO, 4 x ADC,
    4 MB QSPI Flash and USB-C connectivity.
    
    Change-Id: I08f049e544e36bac9dc71470173ba98158e92ffd
    Signed-off-by: Craig Haywood <ad...@br...>
    Reviewed-on: https://review.openocd.org/c/openocd/+/9780
    Tested-by: jenkins
    Reviewed-by: zapb <de...@za...>
    Reviewed-by: Antonio Borneo <bor...@gm...>

diff --git a/tcl/board/brisbanesilicon/epm11.cfg b/tcl/board/brisbanesilicon/epm11.cfg
new file mode 100644
index 000000000..2d4f5326a
--- /dev/null
+++ b/tcl/board/brisbanesilicon/epm11.cfg
@@ -0,0 +1,16 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
+# EPM11
+# https://brisbanesilicon.com.au/epm11/
+
+# Tested with the EPM11 board from BrisbaneSilicon.
+
+adapter driver ftdi
+adapter usb vid_pid 0x0403 0x6010
+
+transport select jtag
+adapter speed 5000
+
+set CHIPNAME GW1NR-9C
+
+source [find fpga/gowin_gw1n.cfg]

commit 3dfb05bf85e7a323c555239aecca99efac96139e
Author: Craig Haywood <ad...@br...>
Date:   Thu Jul 9 12:22:57 2026 +1000

    tcl/board/brisbanesilicon: Add board definition for BRS-100-GW1NR9
    
    The BRS-100-GW1NR9 is a small form factor FPGA development board
    from BrisbaneSilicon (https://brisbanesilicon.com.au/brs-100-gw1nr9/)
    that is built around a GoWIN GW1NR9.
    
    It includes 2 x Pushbuttons, 6 x LEDs, 32 x GPIO, 8 MB QSPI Flash
    and USB-C connectivity.
    
    Change-Id: Ief82fb034470c33a1f4f6125297433f879967c5e
    Signed-off-by: Craig Haywood <ad...@br...>
    Reviewed-on: https://review.openocd.org/c/openocd/+/9778
    Reviewed-by: zapb <de...@za...>
    Tested-by: jenkins
    Reviewed-by: Antonio Borneo <bor...@gm...>

diff --git a/tcl/board/brisbanesilicon/brs-100-gw1nr9.cfg b/tcl/board/brisbanesilicon/brs-100-gw1nr9.cfg
new file mode 100644
index 000000000..295b99e27
--- /dev/null
+++ b/tcl/board/brisbanesilicon/brs-100-gw1nr9.cfg
@@ -0,0 +1,16 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
+# BRS-100-GW1NR9
+# https://brisbanesilicon.com.au/brs-100-gw1nr9/
+
+# Tested with the BRS-100-GW1NR9 board from BrisbaneSilicon.
+
+adapter driver ftdi
+adapter usb vid_pid 0x0403 0x6010
+
+transport select jtag
+adapter speed 5000
+
+set CHIPNAME GW1NR-9C
+
+source [find fpga/gowin_gw1n.cfg]

-----------------------------------------------------------------------

Summary of changes:
 tcl/board/brisbanesilicon/brs-100-gw1nr9.cfg | 16 ++++++++++++++++
 tcl/board/brisbanesilicon/epm11.cfg          | 16 ++++++++++++++++
 2 files changed, 32 insertions(+)
 create mode 100644 tcl/board/brisbanesilicon/brs-100-gw1nr9.cfg
 create mode 100644 tcl/board/brisbanesilicon/epm11.cfg


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commit fc566d74005a4aefbe125b9b2f777d9514c60c87
Author: Marc Schink <de...@za...>
Date:   Wed Jun 17 14:33:17 2026 +0000

    tcl/board/st: Add NUCLEO-U575ZI-Q config
    
    Tested on NUCLEO-U575ZI-Q development board.
    
    Change-Id: I5870c44b3a7e5e48dc3d0a166734f116c32bfca3
    Signed-off-by: Marc Schink <de...@za...>
    Reviewed-on: https://review.openocd.org/c/openocd/+/9749
    Reviewed-by: Antonio Borneo <bor...@gm...>
    Tested-by: jenkins

diff --git a/tcl/board/st/nucleo-u575zi-q.cfg b/tcl/board/st/nucleo-u575zi-q.cfg
new file mode 100644
index 000000000..acc548a2a
--- /dev/null
+++ b/tcl/board/st/nucleo-u575zi-q.cfg
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
+# NUCLEO-U575ZI-Q
+# https://www.st.com/en/evaluation-tools/nucleo-u575zi-q.html
+
+source [find interface/stlink.cfg]
+
+transport select swd
+
+source [find target/stm32u5x.cfg]
+
+reset_config srst_only

-----------------------------------------------------------------------

Summary of changes:
 tcl/board/st/{nucleo-u3c5zi-q.cfg => nucleo-u575zi-q.cfg} | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)
 copy tcl/board/st/{nucleo-u3c5zi-q.cfg => nucleo-u575zi-q.cfg} (52%)


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commit b56339c316f9f46df9fcfb07dfdce18ccb5fa21d
Author: Frederic Boyer <fre...@mi...>
Date:   Wed Apr 15 11:58:01 2026 +0200

    tcl: add SAMA7D6 target and SAMA7D65 Curiosity board configuration
    
    Add target configuration for the Microchip SAMA7D6 series
    (Cortex-A7 based MPU). Supports both JTAG and SWD interfaces.
    
    Add board configuration for the SAMA7D65 Curiosity board.
    
    Link: https://www.microchip.com/en-us/product/sama7d65
    Link: https://www.microchip.com/en-us/development-tool/EV63J76A
    
    Change-Id: Ieda7658167e87c6f011b4c267d2598b80754e067
    Signed-off-by: Frederic Boyer <fre...@mi...>
    Reviewed-on: https://review.openocd.org/c/openocd/+/9523
    Tested-by: jenkins
    Reviewed-by: Antonio Borneo <bor...@gm...>
    Reviewed-by: zapb <de...@za...>

diff --git a/tcl/board/microchip/sama7d65-curiosity.cfg b/tcl/board/microchip/sama7d65-curiosity.cfg
new file mode 100644
index 000000000..2f32daf15
--- /dev/null
+++ b/tcl/board/microchip/sama7d65-curiosity.cfg
@@ -0,0 +1,22 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+#
+# Microchip SAMA7D65 Curiosity Board (EV63J76A)
+# https://www.microchip.com/en-us/development-tool/EV63J76A
+#
+# SAMA7D65 Cortex-A7, DDR SDRAM, 128 KB SRAM
+#
+# External JTAG/SWD probe connects to J38.
+#
+# JTAG is disabled by ROM code during boot.
+# On blank boards, ROM enters SAM-BA Monitor which enables JTAG.
+# Remove JP9, JP10 and SD card to force SAM-BA entry.
+#
+# Two-stage boot for debug:
+#   1. Load AT91Bootstrap to SRAM (0x00100000) - initializes DDR
+#   2. Load application to DDR (0x60000000)
+#
+
+source [find target/microchip/sama7d6.cfg]
+
+# Conservative initial speed - increases after reset-init
+adapter speed 1000
diff --git a/tcl/target/microchip/sama7d6.cfg b/tcl/target/microchip/sama7d6.cfg
new file mode 100644
index 000000000..750634055
--- /dev/null
+++ b/tcl/target/microchip/sama7d6.cfg
@@ -0,0 +1,71 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+#
+# Microchip SAMA7D6 series: SAMA7D65
+# Cortex-A7 MPU, JTAG and SWD
+#
+# https://www.microchip.com/en-us/product/sama7d65
+# DS60001851
+#
+# JTAG-DP IDCODE: 0x6BA00477
+# SW-DP DPIDR:    0x6BA02477
+#
+# JTAG access is disabled by ROM code during boot.
+# It is enabled after AT91Bootstrap runs or SAM-BA Monitor entry.
+# Transient DAP errors before bootstrap are caused by the watchdog.
+#
+
+source [find target/swj-dp.tcl]
+source [find mem_helper.tcl]
+
+if { [info exists CHIPNAME] } {
+    set _CHIPNAME $CHIPNAME
+} else {
+    set _CHIPNAME sama7d6
+}
+
+if { [info exists ENDIAN] } {
+    set _ENDIAN $ENDIAN
+} else {
+    set _ENDIAN little
+}
+
+if { [info exists CPUTAPID] } {
+    set _CPUTAPID $CPUTAPID
+} else {
+    set _CPUTAPID 0x6ba00477
+}
+
+if { [info exists DAP_TAPID] } {
+    set _DAP_TAPID $DAP_TAPID
+} else {
+    set _DAP_TAPID 0x6ba02477
+}
+
+swj_newdap $_CHIPNAME cpu -expected-id $_CPUTAPID -expected-id $_DAP_TAPID -irlen 4
+
+dap create $_CHIPNAME.dap -chain-position $_CHIPNAME.cpu
+
+set _TARGETNAME $_CHIPNAME.cpu.0
+target create $_TARGETNAME cortex_a -dap $_CHIPNAME.dap -endian $_ENDIAN -ap-num 0 -dbgbase 0x80030000
+
+# SRAM 128KB - shared with ROM code and AT91Bootstrap
+$_TARGETNAME configure -work-area-phys 0x00100000 -work-area-size 0x20000 -work-area-backup 0
+
+$_TARGETNAME configure -event examine-start {
+    adapter speed 1000
+}
+
+$_TARGETNAME configure -event examine-end {
+    if { [catch { $_TARGETNAME arp_halt }] } {
+        echo "Warning: Could not halt target - JTAG may not be enabled yet"
+    }
+    catch { $_TARGETNAME arp_waitstate halted 1000 }
+}
+
+$_TARGETNAME configure -event reset-start {
+    adapter speed 1000
+}
+
+$_TARGETNAME configure -event reset-init {
+    adapter speed 4000
+}

commit af75d7f6c4ccd7a4444d79ea4b064de6831c88eb
Author: Frederic Boyer <fre...@mi...>
Date:   Wed Apr 15 11:57:54 2026 +0200

    tcl: add SAMA7G5 target and SAMA7G54-EK board configuration
    
    Add target configuration for the Microchip SAMA7G5 series
    (Cortex-A7 based MPU). Supports both JTAG and SWD interfaces.
    
    Add board configuration for the SAMA7G54-EK evaluation kit.
    
    Link: https://www.microchip.com/en-us/product/sama7g54
    Link: https://www.microchip.com/en-us/development-tool/EV21H18A
    
    Change-Id: I94085babaf1b2f4ce92a44ed900128fc6093f397
    Signed-off-by: Frederic Boyer <fre...@mi...>
    Reviewed-on: https://review.openocd.org/c/openocd/+/9524
    Tested-by: jenkins
    Reviewed-by: zapb <de...@za...>
    Reviewed-by: Antonio Borneo <bor...@gm...>

diff --git a/tcl/board/microchip/sama7g54-ek.cfg b/tcl/board/microchip/sama7g54-ek.cfg
new file mode 100644
index 000000000..e6e07b9fe
--- /dev/null
+++ b/tcl/board/microchip/sama7g54-ek.cfg
@@ -0,0 +1,35 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+#
+# Microchip SAMA7G54-EK evaluation kit (EV21H18A)
+# https://www.microchip.com/en-us/development-tool/EV21H18A
+#
+# SAMA7G54 Cortex-A7 @ 1 GHz, 512 MB DDR3L, 128 KB SRAM
+#
+# Debug interface selection:
+#   By default, uses on-board J-Link-OB (USB J24, J26 must be open).
+#   Could specify external adapter by:
+#     openocd -f interface/jlink.cfg -c "transport select jtag" \
+#             -f board/microchip/sama7g54-ek.cfg
+#   otherwise use on-board J-Link-OB by default.
+#
+# JTAG is disabled by ROM code during boot.
+# On blank boards, ROM enters SAM-BA Monitor which enables JTAG.
+# Press SW4 or close J22 to force SAM-BA entry.
+#
+# Two-stage boot for debug:
+#   1. Load AT91Bootstrap to SRAM (0x00100000) - initializes DDR
+#   2. Load application to DDR (0x60000000)
+#
+if { [adapter name] eq "undefined" } {
+    # Use on-board J-Link-OB adapter (JTAG)
+    echo "Info : use on-board J-Link-OB adapter"
+    source [find interface/jlink.cfg]
+    transport select jtag
+} else {
+    # External adapter specified on command line
+    # User must select transport via: -c "transport select jtag" or "swd"
+    echo "Info : use external [adapter name] adapter"
+}
+source [find target/microchip/sama7g5.cfg]
+# Conservative initial speed - increases after reset-init
+adapter speed 1000
diff --git a/tcl/target/microchip/sama7g5.cfg b/tcl/target/microchip/sama7g5.cfg
new file mode 100644
index 000000000..ec4cedaf3
--- /dev/null
+++ b/tcl/target/microchip/sama7g5.cfg
@@ -0,0 +1,71 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+#
+# Microchip SAMA7G5 series: SAMA7G54
+# Cortex-A7 MPU, JTAG and SWD
+#
+# https://www.microchip.com/en-us/product/sama7g54
+# DS60001765
+#
+# JTAG-DP IDCODE: 0x6BA00477
+# SW-DP DPIDR:    0x6BA02477
+#
+# JTAG access is disabled by ROM code during boot.
+# It is enabled after AT91Bootstrap runs or SAM-BA Monitor entry.
+# Transient DAP errors before bootstrap are caused by the watchdog.
+#
+
+source [find target/swj-dp.tcl]
+source [find mem_helper.tcl]
+
+if { [info exists CHIPNAME] } {
+    set _CHIPNAME $CHIPNAME
+} else {
+    set _CHIPNAME sama7g5
+}
+
+if { [info exists ENDIAN] } {
+    set _ENDIAN $ENDIAN
+} else {
+    set _ENDIAN little
+}
+
+if { [info exists CPUTAPID] } {
+    set _CPUTAPID $CPUTAPID
+} else {
+    set _CPUTAPID 0x6ba00477
+}
+
+if { [info exists DAP_TAPID] } {
+    set _DAP_TAPID $DAP_TAPID
+} else {
+    set _DAP_TAPID 0x6ba02477
+}
+
+swj_newdap $_CHIPNAME cpu -expected-id $_CPUTAPID -expected-id $_DAP_TAPID -irlen 4
+
+dap create $_CHIPNAME.dap -chain-position $_CHIPNAME.cpu
+
+set _TARGETNAME $_CHIPNAME.cpu.0
+target create $_TARGETNAME cortex_a -dap $_CHIPNAME.dap -endian $_ENDIAN -ap-num 0 -dbgbase 0x80030000
+
+# SRAM 128KB - shared with ROM code and AT91Bootstrap
+$_TARGETNAME configure -work-area-phys 0x00100000 -work-area-size 0x20000 -work-area-backup 0
+
+$_TARGETNAME configure -event examine-start {
+    adapter speed 1000
+}
+
+$_TARGETNAME configure -event examine-end {
+    if { [catch { $_TARGETNAME arp_halt }] } {
+        echo "Warning: Could not halt target - JTAG may not be enabled yet"
+    }
+    catch { $_TARGETNAME arp_waitstate halted 1000 }
+}
+
+$_TARGETNAME configure -event reset-start {
+    adapter speed 1000
+}
+
+$_TARGETNAME configure -event reset-init {
+    adapter speed 4000
+}

-----------------------------------------------------------------------

Summary of changes:
 tcl/board/microchip/sama7d65-curiosity.cfg | 22 +++++++++
 tcl/board/microchip/sama7g54-ek.cfg        | 35 +++++++++++++++
 tcl/target/microchip/sama7d6.cfg           | 71 ++++++++++++++++++++++++++++++
 tcl/target/microchip/sama7g5.cfg           | 71 ++++++++++++++++++++++++++++++
 4 files changed, 199 insertions(+)
 create mode 100644 tcl/board/microchip/sama7d65-curiosity.cfg
 create mode 100644 tcl/board/microchip/sama7g54-ek.cfg
 create mode 100644 tcl/target/microchip/sama7d6.cfg
 create mode 100644 tcl/target/microchip/sama7g5.cfg


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[OpenOCD-commit] Main OpenOCD repository branch, master, updated. v0.12.0-1596-gb63fc374f

From: openocd-gerrit <ope...@us...> - 2026-07-17 08:33:04

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- Log -----------------------------------------------------------------
commit b63fc374f038a474fd0cbca2728138512d4f640e
Author: Anatoly Parshintsev <kup...@gm...>
Date:   Sun Feb 1 13:30:19 2026 +0300

    target/riscv: do not cache access to vxrm, vxsat and vcsr
    
    vxrm and vxsat registers are mirrored in vcsr, so we can't cache any of
    them.
    
    Change-Id: I09760de5b76c330797caa99d2ef0ef151546e956
    Signed-off-by: Anatoly Parshintsev <kup...@gm...>
    Reviewed-on: https://review.openocd.org/c/openocd/+/9422
    Reviewed-by: Tomas Vanek <va...@fb...>
    Tested-by: jenkins

diff --git a/src/target/riscv/riscv_reg_impl.h b/src/target/riscv/riscv_reg_impl.h
index f45af047d..d38d4146e 100644
--- a/src/target/riscv/riscv_reg_impl.h
+++ b/src/target/riscv/riscv_reg_impl.h
@@ -195,8 +195,6 @@ static inline bool riscv_reg_impl_gdb_regno_cacheable(enum gdb_regno regno,
 	 * CSRs. */
 	switch (regno) {
 	case GDB_REGNO_DPC:
-	case GDB_REGNO_VXSAT:
-	case GDB_REGNO_VXRM:
 	case GDB_REGNO_VLENB:
 	case GDB_REGNO_MISA:
 	case GDB_REGNO_DCSR:
@@ -216,6 +214,9 @@ static inline bool riscv_reg_impl_gdb_regno_cacheable(enum gdb_regno regno,
 	case GDB_REGNO_VSTART: /* Changes value when vtype is changed. */
 	case GDB_REGNO_VL: /* Changes value when vtype is changed. */
 	case GDB_REGNO_VTYPE: /* Writes to vtype have side effects, so we don't cache it. */
+	case GDB_REGNO_VXSAT: /* Changes value when vcsr is changed. */
+	case GDB_REGNO_VXRM: /* Changes value when vcsr is changed. */
+	case GDB_REGNO_VCSR: /* Changes when vxrm or vxsat are changed. */
 	default:
 		return false;
 	}

commit 7bb208c309203c70c43e5ad21a806b17894763c1
Author: Anatoly Parshintsev <kup...@gm...>
Date:   Thu Jan 29 21:34:27 2026 +0300

    target/riscv: do not cache access to vtype
    
    Writes to the vtype register are expected to have the side effect of
    resetting vl and vstart. However, the current implementation caches the
    vtype state on read, which prevents subsequent writes with
    already-cached values from being issued.
    
    Change-Id: I28beea6e2145bca52c5b37023399d6ae0937dfe0
    Signed-off-by: Anatoly Parshintsev <kup...@gm...>
    Reviewed-on: https://review.openocd.org/c/openocd/+/9416
    Tested-by: jenkins
    Reviewed-by: Tomas Vanek <va...@fb...>

diff --git a/src/target/riscv/riscv_reg_impl.h b/src/target/riscv/riscv_reg_impl.h
index 2948ef401..f45af047d 100644
--- a/src/target/riscv/riscv_reg_impl.h
+++ b/src/target/riscv/riscv_reg_impl.h
@@ -198,7 +198,6 @@ static inline bool riscv_reg_impl_gdb_regno_cacheable(enum gdb_regno regno,
 	case GDB_REGNO_VXSAT:
 	case GDB_REGNO_VXRM:
 	case GDB_REGNO_VLENB:
-	case GDB_REGNO_VTYPE:
 	case GDB_REGNO_MISA:
 	case GDB_REGNO_DCSR:
 	case GDB_REGNO_MEPC:
@@ -216,6 +215,7 @@ static inline bool riscv_reg_impl_gdb_regno_cacheable(enum gdb_regno regno,
 	case GDB_REGNO_DSCRATCH1:
 	case GDB_REGNO_VSTART: /* Changes value when vtype is changed. */
 	case GDB_REGNO_VL: /* Changes value when vtype is changed. */
+	case GDB_REGNO_VTYPE: /* Writes to vtype have side effects, so we don't cache it. */
 	default:
 		return false;
 	}

-----------------------------------------------------------------------

Summary of changes:
 src/target/riscv/riscv_reg_impl.h | 7 ++++---
 1 file changed, 4 insertions(+), 3 deletions(-)


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- Log -----------------------------------------------------------------
commit da6c65041fb9e299fe8f1cc9eb825c119c454c5c
Author: Anatoly Parshintsev <kup...@gm...>
Date:   Thu Jan 29 21:32:32 2026 +0300

    target/riscv: disable cache-on-read for VL and VSTART
    
    When VTYPE is updated:
    
    - VL is set to some appropriate value
    - VSTART is set to zero
    
    Change-Id: If67d0e4a1058d35f47b42c67abc2183836f34f22
    Signed-off-by: Anatoly Parshintsev <kup...@gm...>
    Reviewed-on: https://review.openocd.org/c/openocd/+/9414
    Tested-by: jenkins
    Reviewed-by: Tomas Vanek <va...@fb...>

diff --git a/src/target/riscv/riscv_reg_impl.h b/src/target/riscv/riscv_reg_impl.h
index 2cf4e6ad5..2948ef401 100644
--- a/src/target/riscv/riscv_reg_impl.h
+++ b/src/target/riscv/riscv_reg_impl.h
@@ -195,11 +195,9 @@ static inline bool riscv_reg_impl_gdb_regno_cacheable(enum gdb_regno regno,
 	 * CSRs. */
 	switch (regno) {
 	case GDB_REGNO_DPC:
-	case GDB_REGNO_VSTART:
 	case GDB_REGNO_VXSAT:
 	case GDB_REGNO_VXRM:
 	case GDB_REGNO_VLENB:
-	case GDB_REGNO_VL:
 	case GDB_REGNO_VTYPE:
 	case GDB_REGNO_MISA:
 	case GDB_REGNO_DCSR:
@@ -216,6 +214,8 @@ static inline bool riscv_reg_impl_gdb_regno_cacheable(enum gdb_regno regno,
 	case GDB_REGNO_TDATA2:  /* Changes value when tselect is changed. */
 	case GDB_REGNO_DSCRATCH0: /* Dscratch* need not retain value between abstract commands. */
 	case GDB_REGNO_DSCRATCH1:
+	case GDB_REGNO_VSTART: /* Changes value when vtype is changed. */
+	case GDB_REGNO_VL: /* Changes value when vtype is changed. */
 	default:
 		return false;
 	}

-----------------------------------------------------------------------

Summary of changes:
 src/target/riscv/riscv_reg_impl.h | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)


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- Log -----------------------------------------------------------------
commit cb52502e88832386610add9781030f5380344063
Author: Marc Schink <de...@za...>
Date:   Mon Jul 6 16:43:53 2026 +0200

    contrib/firmware/angie: Add PREFIX to makebin command
    
    Add the prefix to makebin to match other commands. This fixes building,
    for example, on Fedora, which uses the 'sdcc' prefix for all SDCC commands.
    
    Change-Id: I93705062c58d2b7821e37bf9fa1b46aaf8648d1c
    Signed-off-by: Marc Schink <de...@za...>
    Reviewed-on: https://review.openocd.org/c/openocd/+/9777
    Reviewed-by: Adrien Charruel <adr...@gm...>
    Reviewed-by: Antonio Borneo <bor...@gm...>
    Tested-by: jenkins

diff --git a/contrib/firmware/angie/c/Makefile b/contrib/firmware/angie/c/Makefile
index 21873da6b..a8817daa1 100644
--- a/contrib/firmware/angie/c/Makefile
+++ b/contrib/firmware/angie/c/Makefile
@@ -22,6 +22,8 @@ AS = $(PREFIX)sdas8051
 # the OpenOCD driver, but the resulting file is smaller.
 PACKIHX = $(PREFIX)packihx
 
+MAKEBIN = $(PREFIX)makebin
+
 # GNU binutils size. Used to print the size of the IHX file generated by SDCC.
 SIZE = size
 
@@ -71,7 +73,7 @@ clean:
 	rm -f *.asm *.lst *.rel *.rst *.sym *.ihx *.lk *.map *.mem
 
 bin: angie_firmware.ihx
-	makebin -p angie_firmware.ihx angie_firmware.bin
+	$(MAKEBIN) -p angie_firmware.ihx angie_firmware.bin
 
 hex: angie_firmware.ihx
 	$(PACKIHX) angie_firmware.ihx > fx2.hex

commit a81a448bb9198fb4cc1cb88d674bb87ba0d6bf47
Author: Marc Schink <de...@za...>
Date:   Mon Jul 6 16:43:29 2026 +0200

    contrib/firmware/angie: Add parentheses for __at
    
    Add parentheses to match the __interrupt change in the previous commit.
    This is a cosmetic change and not technically required.
    
    Change-Id: I26fe61aa9ae56be37488b0cfe9f176ed93408e44
    Signed-off-by: Marc Schink <de...@za...>
    Reviewed-on: https://review.openocd.org/c/openocd/+/9776
    Reviewed-by: Adrien Charruel <adr...@gm...>
    Reviewed-by: Antonio Borneo <bor...@gm...>
    Tested-by: jenkins

diff --git a/contrib/firmware/angie/c/include/usb.h b/contrib/firmware/angie/c/include/usb.h
index dbf41fe8e..fb4067d62 100644
--- a/contrib/firmware/angie/c/include/usb.h
+++ b/contrib/firmware/angie/c/include/usb.h
@@ -125,7 +125,7 @@ struct setup_data {
 	uint16_t wlength;		/**< Number of bytes to transfer in data stage. */
 };
 
-extern volatile __xdata __at 0xE6B8 struct setup_data setup_data;
+extern volatile __xdata __at(0xE6B8) struct setup_data setup_data;
 
 /*
  * USB Request Types (bmRequestType): See USB 2.0 Spec
diff --git a/contrib/firmware/angie/c/src/usb.c b/contrib/firmware/angie/c/src/usb.c
index 8a448d903..4b3db0a60 100644
--- a/contrib/firmware/angie/c/src/usb.c
+++ b/contrib/firmware/angie/c/src/usb.c
@@ -23,7 +23,7 @@
 
 // #define PRINTF_DEBUG
 
-volatile __xdata __at 0xE6B8 struct setup_data setup_data;
+volatile __xdata __at(0xE6B8) struct setup_data setup_data;
 
 /* Define number of endpoints (except Control Endpoint 0) in a central place.
  * Be sure to include the necessary endpoint descriptors!

commit 6b36b0cbe35c17d8fbe1e30b8f1977ca08fe478e
Author: Marc Schink <de...@za...>
Date:   Mon Jul 6 16:36:51 2026 +0200

    contrib/firmware/angie: Use parentheses for __interrupt
    
    Since SDCC 4.2.3, non-parenthesized __interrupt arguments are no longer
    supported (see section 1.5 in the SDCC manual [1]).
    
    Add parentheses to fix the build on newer SDCC versions. Parentheses are
    supported in SDCC 3.0.0 (released in 2010) and later.
    
    [1] https://sdcc.sourceforge.net/doc/sdccman.pdf
    
    Change-Id: I488628631f26b05c3f0ee80cda6da84b4aecfeaf
    Signed-off-by: Marc Schink <de...@za...>
    Reviewed-on: https://review.openocd.org/c/openocd/+/9775
    Tested-by: jenkins
    Reviewed-by: Adrien Charruel <adr...@gm...>
    Reviewed-by: Antonio Borneo <bor...@gm...>

diff --git a/contrib/firmware/angie/c/src/main.c b/contrib/firmware/angie/c/src/main.c
index 657694b6c..8729b3ecb 100644
--- a/contrib/firmware/angie/c/src/main.c
+++ b/contrib/firmware/angie/c/src/main.c
@@ -16,7 +16,7 @@
 #include "reg_ezusb.h"
 #include <stdio.h>
 
-extern void sudav_isr(void)__interrupt	SUDAV_ISR;
+extern void sudav_isr(void)__interrupt(SUDAV_ISR);
 extern void sof_isr(void)__interrupt;
 extern void sutok_isr(void)__interrupt;
 extern void suspend_isr(void)__interrupt;
diff --git a/contrib/firmware/angie/c/src/usb.c b/contrib/firmware/angie/c/src/usb.c
index 6a07cc5d3..8a448d903 100644
--- a/contrib/firmware/angie/c/src/usb.c
+++ b/contrib/firmware/angie/c/src/usb.c
@@ -141,140 +141,140 @@ __code struct usb_string_descriptor *__code en_string_descriptors[3] = {
 	&strproduct,
 	&strserialnumber
 };
-void sudav_isr(void)__interrupt SUDAV_ISR
+void sudav_isr(void)__interrupt(SUDAV_ISR)
 {
 	EXIF &= ~0x10;  /* Clear USBINT: Main global interrupt */
 	USBIRQ = SUDAVI;
 	EP0CS |= HSNAK;
 	usb_handle_setup_data();
 }
-void sof_isr(void)__interrupt	SOF_ISR
+void sof_isr(void)__interrupt(SOF_ISR)
 {
 }
-void sutok_isr(void)__interrupt	SUTOK_ISR
+void sutok_isr(void)__interrupt(SUTOK_ISR)
 {
 }
-void suspend_isr(void)__interrupt	SUSPEND_ISR
+void suspend_isr(void)__interrupt(SUSPEND_ISR)
 {
 }
-void usbreset_isr(void)__interrupt	USBRESET_ISR
+void usbreset_isr(void)__interrupt(USBRESET_ISR)
 {
 }
-void highspeed_isr(void)__interrupt	HIGHSPEED_ISR
+void highspeed_isr(void)__interrupt(HIGHSPEED_ISR)
 {
 }
-void ep0ack_isr(void)__interrupt	EP0ACK_ISR
+void ep0ack_isr(void)__interrupt(EP0ACK_ISR)
 {
 }
-void stub_isr(void)__interrupt	STUB_ISR
+void stub_isr(void)__interrupt(STUB_ISR)
 {
 }
-void ep0in_isr(void)__interrupt	EP0IN_ISR
+void ep0in_isr(void)__interrupt(EP0IN_ISR)
 {
 }
-void ep0out_isr(void)__interrupt	EP0OUT_ISR
+void ep0out_isr(void)__interrupt(EP0OUT_ISR)
 {
 }
-void ep1in_isr(void)__interrupt	EP1IN_ISR
+void ep1in_isr(void)__interrupt(EP1IN_ISR)
 {
 }
-void ep1out_isr(void)__interrupt	EP1OUT_ISR
+void ep1out_isr(void)__interrupt(EP1OUT_ISR)
 {
 }
-void ep2_isr(void)__interrupt	EP2_ISR
+void ep2_isr(void)__interrupt(EP2_ISR)
 {
 }
-void ep4_isr(void)__interrupt	EP4_ISR
+void ep4_isr(void)__interrupt(EP4_ISR)
 {
 }
-void ep6_isr(void)__interrupt	EP6_ISR
+void ep6_isr(void)__interrupt(EP6_ISR)
 {
 	REVCTL = 0;     /* REVCTL.0 and REVCTL.1 set to 0 */
 	i2c_recieve();  /* Execute I2C communication */
 	EXIF &= ~0x10;  /* Clear USBINT: Main global interrupt */
 	EPIRQ = 0x40;	/* Clear individual EP6OUT IRQ */
 }
-void ep8_isr(void)__interrupt	EP8_ISR
+void ep8_isr(void)__interrupt(EP8_ISR)
 {
 	EXIF &= ~0x10;		/* Clear USBINT: Main global interrupt */
 	EPIRQ = 0x80;		/* Clear individual EP8IN IRQ */
 }
-void ibn_isr(void)__interrupt	IBN_ISR
+void ibn_isr(void)__interrupt(IBN_ISR)
 {
 }
-void ep0pingnak_isr(void)__interrupt	EP0PINGNAK_ISR
+void ep0pingnak_isr(void)__interrupt(EP0PINGNAK_ISR)
 {
 }
-void ep1pingnak_isr(void)__interrupt	EP1PINGNAK_ISR
+void ep1pingnak_isr(void)__interrupt(EP1PINGNAK_ISR)
 {
 }
-void ep2pingnak_isr(void)__interrupt	EP2PINGNAK_ISR
+void ep2pingnak_isr(void)__interrupt(EP2PINGNAK_ISR)
 {
 }
-void ep4pingnak_isr(void)__interrupt	EP4PINGNAK_ISR
+void ep4pingnak_isr(void)__interrupt(EP4PINGNAK_ISR)
 {
 }
-void ep6pingnak_isr(void)__interrupt	EP6PINGNAK_ISR
+void ep6pingnak_isr(void)__interrupt(EP6PINGNAK_ISR)
 {
 }
-void ep8pingnak_isr(void)__interrupt	EP8PINGNAK_ISR
+void ep8pingnak_isr(void)__interrupt(EP8PINGNAK_ISR)
 {
 }
-void errorlimit_isr(void)__interrupt	ERRORLIMIT_ISR
+void errorlimit_isr(void)__interrupt(ERRORLIMIT_ISR)
 {
 }
-void ep2piderror_isr(void)__interrupt	EP2PIDERROR_ISR
+void ep2piderror_isr(void)__interrupt(EP2PIDERROR_ISR)
 {
 }
-void ep4piderror_isr(void)__interrupt	EP4PIDERROR_ISR
+void ep4piderror_isr(void)__interrupt(EP4PIDERROR_ISR)
 {
 }
-void ep6piderror_isr(void)__interrupt	EP6PIDERROR_ISR
+void ep6piderror_isr(void)__interrupt(EP6PIDERROR_ISR)
 {
 }
-void ep8piderror_isr(void)__interrupt	EP8PIDERROR_ISR
+void ep8piderror_isr(void)__interrupt(EP8PIDERROR_ISR)
 {
 }
-void ep2pflag_isr(void)__interrupt	EP2PFLAG_ISR
+void ep2pflag_isr(void)__interrupt(EP2PFLAG_ISR)
 {
 }
-void ep4pflag_isr(void)__interrupt	EP4PFLAG_ISR
+void ep4pflag_isr(void)__interrupt(EP4PFLAG_ISR)
 {
 }
-void ep6pflag_isr(void)__interrupt	EP6PFLAG_ISR
+void ep6pflag_isr(void)__interrupt(EP6PFLAG_ISR)
 {
 }
-void ep8pflag_isr(void)__interrupt	EP8PFLAG_ISR
+void ep8pflag_isr(void)__interrupt(EP8PFLAG_ISR)
 {
 }
-void ep2eflag_isr(void)__interrupt	EP2EFLAG_ISR
+void ep2eflag_isr(void)__interrupt(EP2EFLAG_ISR)
 {
 }
-void ep4eflag_isr(void)__interrupt	EP4EFLAG_ISR
+void ep4eflag_isr(void)__interrupt(EP4EFLAG_ISR)
 {
 }
-void ep6eflag_isr(void)__interrupt	EP6EFLAG_ISR
+void ep6eflag_isr(void)__interrupt(EP6EFLAG_ISR)
 {
 }
-void ep8eflag_isr(void)__interrupt	EP8EFLAG_ISR
+void ep8eflag_isr(void)__interrupt(EP8EFLAG_ISR)
 {
 }
-void ep2fflag_isr(void)__interrupt	EP2FFLAG_ISR
+void ep2fflag_isr(void)__interrupt(EP2FFLAG_ISR)
 {
 }
-void ep4fflag_isr(void)__interrupt	EP4FFLAG_ISR
+void ep4fflag_isr(void)__interrupt(EP4FFLAG_ISR)
 {
 }
-void ep6fflag_isr(void)__interrupt	EP6FFLAG_ISR
+void ep6fflag_isr(void)__interrupt(EP6FFLAG_ISR)
 {
 }
-void ep8fflag_isr(void)__interrupt	EP8FFLAG_ISR
+void ep8fflag_isr(void)__interrupt(EP8FFLAG_ISR)
 {
 }
-void gpifcomplete_isr(void)__interrupt	GPIFCOMPLETE_ISR
+void gpifcomplete_isr(void)__interrupt(GPIFCOMPLETE_ISR)
 {
 }
-void gpifwaveform_isr(void)__interrupt	GPIFWAVEFORM_ISR
+void gpifwaveform_isr(void)__interrupt(GPIFWAVEFORM_ISR)
 {
 }
 

-----------------------------------------------------------------------

Summary of changes:
 contrib/firmware/angie/c/Makefile      |  4 +-
 contrib/firmware/angie/c/include/usb.h |  2 +-
 contrib/firmware/angie/c/src/main.c    |  2 +-
 contrib/firmware/angie/c/src/usb.c     | 86 +++++++++++++++++-----------------
 4 files changed, 48 insertions(+), 46 deletions(-)


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[OpenOCD-commit] Main OpenOCD repository branch, master, updated. v0.12.0-1590-g02df329b8

From: openocd-gerrit <ope...@us...> - 2026-07-11 09:13:51

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- Log -----------------------------------------------------------------
commit 02df329b8b8803fffefa5ee0261189e02c5a7d4e
Author: Antonio Borneo <bor...@gm...>
Date:   Mon Jul 6 16:17:28 2026 +0200

    checkpatch: recognize the type FILE
    
    Let checkpatch recognize the type FILE so it will not complain
    that the "multiplication":
            FILE *my_file;
    requires space around the "multiplication operator".
    
    Change-Id: If17d4739d05e552a38380f1d6dfe5c41eb959cfa
    Signed-off-by: Antonio Borneo <bor...@gm...>
    Reviewed-on: https://review.openocd.org/c/openocd/+/9770
    Tested-by: jenkins

diff --git a/tools/scripts/typedefs.txt b/tools/scripts/typedefs.txt
index 97f330d9d..57da94056 100644
--- a/tools/scripts/typedefs.txt
+++ b/tools/scripts/typedefs.txt
@@ -1,6 +1,7 @@
 # SPDX-License-Identifier: GPL-2.0-or-later
 
 fd_set
+FILE
 Jim_Cmd
 Jim_CmdProc
 Jim_DelCmdProc

-----------------------------------------------------------------------

Summary of changes:
 tools/scripts/typedefs.txt | 1 +
 1 file changed, 1 insertion(+)


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[OpenOCD-commit] Main OpenOCD repository branch, master, updated. v0.12.0-1589-g7b70be04c

From: openocd-gerrit <ope...@us...> - 2026-07-11 09:06:05

This is an automated email from the git hooks/post-receive script. It was
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The branch, master has been updated
       via  7b70be04cc6a6fd7f1a1b1a8d7c521c09d7fb688 (commit)
      from  065edc1e2e5ea3a4719bb2cdfb766d7d825fd6a9 (commit)

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- Log -----------------------------------------------------------------
commit 7b70be04cc6a6fd7f1a1b1a8d7c521c09d7fb688
Author: HAOUES Ahmed <ahm...@st...>
Date:   Fri May 8 11:54:05 2026 +0100

    tcl/stm32wba6x: fix clock config used at 'reset init'
    
    Use HSI 16 MHz
    
    Change-Id: I298772f8e1e39cedc8cc11ed62db3515aaddab77
    Signed-off-by: HAOUES Ahmed <ahm...@st...>
    Reviewed-on: https://review.openocd.org/c/openocd/+/9615
    Reviewed-by: Antonio Borneo <bor...@gm...>
    Tested-by: jenkins

diff --git a/tcl/target/stm32wba6x.cfg b/tcl/target/stm32wba6x.cfg
index 470af0f27..4f29ca941 100644
--- a/tcl/target/stm32wba6x.cfg
+++ b/tcl/target/stm32wba6x.cfg
@@ -76,7 +76,7 @@ $_TARGETNAME configure -event reset-init {
     # 1 WS compliant with VOS == 2 and 16 MHz.
     mmw 0x40022000 0x00000001 0x0000000E	;# FLASH_ACR: Latency = 1
     mmw 0x56020C00 0x00000100 0x00000000	;# RCC_CR |= HSION
-    mmw 0x56020C1C 0x00000000 0x00000002	;# RCC_CFGR1: SW=HSI16
+    mmw 0x56020C1C 0x00000000 0x00000003	;# RCC_CFGR1: SW=HSI16
     # Boost JTAG frequency
     adapter speed 4000
 }

-----------------------------------------------------------------------

Summary of changes:
 tcl/target/stm32wba6x.cfg | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)


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From: openocd-gerrit <ope...@us...> - 2026-07-11 09:05:28

This is an automated email from the git hooks/post-receive script. It was
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The branch, master has been updated
       via  065edc1e2e5ea3a4719bb2cdfb766d7d825fd6a9 (commit)
       via  3a16d2a9b7b451bee1f1fc7adf8f1da97f4ac666 (commit)
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- Log -----------------------------------------------------------------
commit 065edc1e2e5ea3a4719bb2cdfb766d7d825fd6a9
Author: HAOUES Ahmed <ahm...@st...>
Date:   Wed May 6 17:04:51 2026 +0100

    tcl/stm32wba5x: fix clock config used at 'reset init'
    
    Use HSI 16 MHz
    
    Change-Id: Ie23043274de1c6aae90763ba6e5ff5b6dd0410d2
    Signed-off-by: HAOUES Ahmed <ahm...@st...>
    Reviewed-on: https://review.openocd.org/c/openocd/+/9614
    Reviewed-by: Antonio Borneo <bor...@gm...>
    Tested-by: jenkins

diff --git a/tcl/target/stm32wba5x.cfg b/tcl/target/stm32wba5x.cfg
index 704174db4..9eadd2403 100644
--- a/tcl/target/stm32wba5x.cfg
+++ b/tcl/target/stm32wba5x.cfg
@@ -76,7 +76,7 @@ $_TARGETNAME configure -event reset-init {
     # 1 WS compliant with VOS == 2 and 16 MHz.
     mmw 0x40022000 0x00000001 0x0000000E	;# FLASH_ACR: Latency = 1
     mmw 0x56020C00 0x00000100 0x00000000	;# RCC_CR |= HSION
-    mmw 0x56020C1C 0x00000000 0x00000002	;# RCC_CFGR1: SW=HSI16
+    mmw 0x56020C1C 0x00000000 0x00000003	;# RCC_CFGR1: SW=HSI16
     # Boost JTAG frequency
     adapter speed 4000
 }

commit 3a16d2a9b7b451bee1f1fc7adf8f1da97f4ac666
Author: HAOUES Ahmed <ahm...@st...>
Date:   Tue Jul 15 11:12:06 2025 +0100

    flash/stm32l4x: Support STM32WBA2x devices
    
    This device is similar to STM32WBA5x devices but with flash size
    equal to 512Kb and with default programming word size (double-word)
    
    Change-Id: I3c4023f58df7de980ccbd56c71f9c41d380a208f
    Signed-off-by: HAOUES Ahmed <ahm...@st...>
    Reviewed-on: https://review.openocd.org/c/openocd/+/9613
    Tested-by: jenkins
    Reviewed-by: Antonio Borneo <bor...@gm...>

diff --git a/src/flash/nor/stm32l4x.c b/src/flash/nor/stm32l4x.c
index 20d7842ee..34676659b 100644
--- a/src/flash/nor/stm32l4x.c
+++ b/src/flash/nor/stm32l4x.c
@@ -408,6 +408,10 @@ static const struct stm32l4_rev stm32wba6x_revs[] = {
 	{ 0x1000, "A" }, { 0x1001, "Z" },
 };
 
+static const struct stm32l4_rev stm32wba2x_revs[] = {
+	{ 0x1000, "A" },
+};
+
 static const struct stm32l4_rev stm32wb1xx_revs[] = {
 	{ 0x1000, "A" }, { 0x2000, "B" },
 };
@@ -791,6 +795,18 @@ static const struct stm32l4_part_info stm32l4_parts[] = {
 	  .otp_base              = 0x0BFA0000,
 	  .otp_size              = 512,
 	},
+	{
+	  .id                    = DEVID_STM32WBA2X,
+	  .revs                  = stm32wba2x_revs,
+	  .num_revs              = ARRAY_SIZE(stm32wba2x_revs),
+	  .device_str            = "STM32WBA2x",
+	  .max_flash_size_kb     = 512,
+	  .flags                 = F_HAS_TZ | F_HAS_L5_FLASH_REGS | F_WRP_HAS_LOCK,
+	  .flash_regs_base       = 0x40022000,
+	  .fsize_addr            = 0x0BF8D7A0,
+	  .otp_base              = 0x0BF8D000,
+	  .otp_size              = 512,
+	},
 	{
 	  .id                    = DEVID_STM32WB1XX,
 	  .revs                  = stm32wb1xx_revs,
@@ -2262,6 +2278,7 @@ static int stm32l4_probe(struct flash_bank *bank)
 		break;
 	case DEVID_STM32WB5XX:
 	case DEVID_STM32WB3XX:
+	case DEVID_STM32WBA2X:
 		/* single bank flash */
 		page_size_kb = 4;
 		num_pages = flash_size_kb / page_size_kb;
diff --git a/src/flash/nor/stm32l4x.h b/src/flash/nor/stm32l4x.h
index 990504336..7ee62d663 100644
--- a/src/flash/nor/stm32l4x.h
+++ b/src/flash/nor/stm32l4x.h
@@ -121,7 +121,8 @@
 #define DEVID_STM32WB5XX		0x495
 #define DEVID_STM32WB3XX		0x496
 #define DEVID_STM32WLE_WL5XX	0x497
-#define DEVID_STM32WBA6X		0x4B0
+#define DEVID_STM32WBA6X        0x4B0
+#define DEVID_STM32WBA2X        0x4B2
 
 /* known Flash base addresses */
 #define STM32_FLASH_BANK_BASE	0x08000000
diff --git a/tcl/target/stm32wba2x.cfg b/tcl/target/stm32wba2x.cfg
new file mode 100644
index 000000000..88349bafb
--- /dev/null
+++ b/tcl/target/stm32wba2x.cfg
@@ -0,0 +1,106 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
+# script for stm32wba2x family
+
+#
+# stm32wba2x devices support both JTAG and SWD transports.
+#
+source [find target/swj-dp.tcl]
+source [find mem_helper.tcl]
+
+if { [info exists CHIPNAME] } {
+    set _CHIPNAME $CHIPNAME
+} else {
+    set _CHIPNAME stm32wba2x
+}
+
+# Work-area is a space in RAM used for flash programming
+# By default use 64kB
+if { [info exists WORKAREASIZE] } {
+    set _WORKAREASIZE $WORKAREASIZE
+} else {
+    set _WORKAREASIZE 0x10000
+}
+
+# jtag scan chain
+if { [info exists CPUTAPID] } {
+    set _CPUTAPID $CPUTAPID
+} else {
+    if { [using_jtag] } {
+        set _CPUTAPID 0x0be11477
+    } else {
+        # SWD IDCODE (single drop, arm)
+        set _CPUTAPID 0x0be12477
+    }
+}
+
+swj_newdap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
+dap create $_CHIPNAME.dap -chain-position $_CHIPNAME.cpu
+
+if {[using_jtag]} {
+    jtag newtap $_CHIPNAME bs -irlen 5
+}
+
+set _TARGETNAME $_CHIPNAME.cpu
+target create $_TARGETNAME cortex_m -endian little -dap $_CHIPNAME.dap -ap-num 1
+
+$_TARGETNAME configure -work-area-phys 0x20000000 -work-area-size $_WORKAREASIZE -work-area-backup 0
+
+flash bank $_CHIPNAME.flash stm32l4x 0x08000000 0 0 0 $_TARGETNAME
+flash bank $_CHIPNAME.otp   stm32l4x 0x0bf8d000 0 0 0 $_TARGETNAME
+
+# Common knowledges tells JTAG speed should be <= F_CPU/6.
+# F_CPU after reset is MSI 4MHz, so use F_JTAG = 500 kHz to stay on
+# the safe side.
+#
+# Note that there is a pretty wide band where things are
+# more or less stable, see http://openocd.zylin.com/#/c/3366/
+adapter speed 500
+
+adapter srst delay 100
+if {[using_jtag]} {
+    jtag_ntrst_delay 100
+}
+
+reset_config srst_nogate
+
+if {![using_hla]} {
+    # if srst is not fitted use SYSRESETREQ to
+    # perform a soft reset
+    cortex_m reset_config sysresetreq
+}
+
+$_TARGETNAME configure -event reset-init {
+    # CPU comes out of reset with HSION | HSIRDY.
+    # Use HSI 16 MHz clock, compliant even with VOS == 2.
+    # 1 WS compliant with VOS == 2 and 16 MHz.
+    mmw 0x40022000 0x00000001 0x0000000E	;# FLASH_ACR: Latency = 1
+    mmw 0x46020C00 0x00000100 0x00000000	;# RCC_CR |= HSION
+    mmw 0x46020C1C 0x00000000 0x00000003	;# RCC_CFGR1: SW=HSI16
+    # Boost JTAG frequency
+    adapter speed 4000
+}
+
+$_TARGETNAME configure -event reset-start {
+    # Reset clock is HSI (16 MHz)
+    adapter speed 2000
+}
+
+$_TARGETNAME configure -event examine-end {
+    # Enable debug during low power modes (uses more power)
+    # DBGMCU_SCR |= DBG_STANDBY | DBG_STOP | DBG_SLEEP
+    mmw 0xE0044004 0x00000007 0
+
+    # Stop watchdog counters during halt
+    # DBGMCU_APB1LFZR |= DBG_IWDG_STOP
+    mmw 0xE0044008 0x00001000 0
+}
+
+tpiu create $_CHIPNAME.tpiu -dap $_CHIPNAME.dap -ap-num 0 -baseaddr 0xE0040000
+
+lappend _telnet_autocomplete_skip _proc_pre_enable_$_CHIPNAME.tpiu
+proc _proc_pre_enable_$_CHIPNAME.tpiu {_targetname} {
+    targets $_targetname
+}
+
+$_CHIPNAME.tpiu configure -event pre-enable "_proc_pre_enable_$_CHIPNAME.tpiu $_TARGETNAME"

-----------------------------------------------------------------------

Summary of changes:
 src/flash/nor/stm32l4x.c                      | 17 +++++++++++++++++
 src/flash/nor/stm32l4x.h                      |  3 ++-
 tcl/target/{stm32wba5x.cfg => stm32wba2x.cfg} | 24 ++++++++++++------------
 tcl/target/stm32wba5x.cfg                     |  2 +-
 4 files changed, 32 insertions(+), 14 deletions(-)
 copy tcl/target/{stm32wba5x.cfg => stm32wba2x.cfg} (82%)


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commit 2ae1981ab5077c30ad617c35cfaacb63e048ba30
Author: HAOUES Ahmed <ahm...@st...>
Date:   Wed May 6 09:34:43 2026 +0100

    flash/stm32l4x: Reorder DBGMCU_IDCODE registers
    
    To avoid read errors on some targets (for example STM32WBA5 and STM32WBA6),
    read the possible IDCODE registers in the specified order.
    
    Change-Id: I0ae4290dbf5899f03accaf81fa90eb165b5745e6
    Signed-off-by: HAOUES Ahmed <ahm...@st...>
    Reviewed-on: https://review.openocd.org/c/openocd/+/9612
    Tested-by: jenkins
    Reviewed-by: Tomas Vanek <va...@fb...>

diff --git a/src/flash/nor/stm32l4x.c b/src/flash/nor/stm32l4x.c
index d46bfbeb5..20d7842ee 100644
--- a/src/flash/nor/stm32l4x.c
+++ b/src/flash/nor/stm32l4x.c
@@ -1884,7 +1884,7 @@ static int stm32l4_read_idcode(struct flash_bank *bank, uint32_t *id)
 	struct target *target = bank->target;
 
 	/* try reading possible IDCODE registers, in the following order */
-	uint32_t dbgmcu_idcode[] = {DBGMCU_IDCODE_L4_G4, DBGMCU_IDCODE_G0, DBGMCU_IDCODE_L5};
+	uint32_t dbgmcu_idcode[] = {DBGMCU_IDCODE_L4_G4, DBGMCU_IDCODE_L5, DBGMCU_IDCODE_G0};
 
 	for (unsigned int i = 0; i < ARRAY_SIZE(dbgmcu_idcode); i++) {
 		retval = target_read_u32(target, dbgmcu_idcode[i], id);

commit 73b102deabf0f04220d1c2b46c81c36b9a995b64
Author: HAOUES Ahmed <ahm...@st...>
Date:   Thu Jul 17 09:12:41 2025 +0100

    flash/bluenrg-x: support SPIRIT3R
    
    The SPIRIT3R is similar to the SPIRIT3, with 16KB of SRAM
    
    Change-Id: Id74104265b3f438f2c2e604e3c773edf657e13b9
    Signed-off-by: HAOUES Ahmed <ahm...@st...>
    Reviewed-on: https://review.openocd.org/c/openocd/+/9531
    Tested-by: jenkins
    Reviewed-by: Antonio Borneo <bor...@gm...>

diff --git a/src/flash/nor/bluenrg-x.c b/src/flash/nor/bluenrg-x.c
index 651daa98d..7bc8ce35c 100644
--- a/src/flash/nor/bluenrg-x.c
+++ b/src/flash/nor/bluenrg-x.c
@@ -95,7 +95,7 @@ static const struct flash_ctrl_priv_data flash_priv_data_spirit3 = {
 	.flash_regs_base = 0x40001000,
 	.flash_page_size = 2048,
 	.jtag_idcode = 0x02027041,
-	.part_name = "STM32WL33 (SPIRIT3)",
+	.part_name = "STM32WL33/WL3R (SPIRIT3/3R)",
 };
 
 struct bluenrgx_flash_bank {
diff --git a/tcl/target/bluenrg-x.cfg b/tcl/target/bluenrg-x.cfg
index afa1b513b..ad6f1c43f 100644
--- a/tcl/target/bluenrg-x.cfg
+++ b/tcl/target/bluenrg-x.cfg
@@ -20,7 +20,7 @@ set _ENDIAN little
 if { [info exists WORKAREASIZE] } {
    set _WORKAREASIZE $WORKAREASIZE
 } else {
-   set _WORKAREASIZE 0x5F00
+   set _WORKAREASIZE 0x3C00
 }
 
 adapter speed 4000

-----------------------------------------------------------------------

Summary of changes:
 src/flash/nor/bluenrg-x.c | 2 +-
 src/flash/nor/stm32l4x.c  | 2 +-
 tcl/target/bluenrg-x.cfg  | 2 +-
 3 files changed, 3 insertions(+), 3 deletions(-)


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- Log -----------------------------------------------------------------
commit eff5f00e518438fdb767fd3edc0b9be1fda8723d
Author: HAOUES Ahmed <ahm...@st...>
Date:   Thu Jul 17 09:00:26 2025 +0100

    flash/bluenrg-x: fix working area buffer size calculation
    
    Adjust buffer_size to use available working area minus 128 bytes
    reserved for write_algorithm_stack and 8 bytes reserved for read
    and write pointers.
    
    Ensure buffer_size is aligned to FLASH_DATA_WIDTH boundary.
    
    Add checks to handle insufficient working area (<256 bytes) with
    a warning and resource cleanup.
    
    Cap buffer_size at 16384 + 8 bytes to avoid diminishing returns on
    larger buffers.
    
    Change-Id: I428a5de1bb6b1c3af0cba41e9a50278c45a1c54c
    Signed-off-by: HAOUES Ahmed <ahm...@st...>
    Reviewed-on: https://review.openocd.org/c/openocd/+/9530
    Reviewed-by: Tomas Vanek <va...@fb...>
    Tested-by: jenkins
    Reviewed-by: Antonio Borneo <bor...@gm...>

diff --git a/src/flash/nor/bluenrg-x.c b/src/flash/nor/bluenrg-x.c
index caf659eff..651daa98d 100644
--- a/src/flash/nor/bluenrg-x.c
+++ b/src/flash/nor/bluenrg-x.c
@@ -11,6 +11,7 @@
 
 #include <helper/binarybuffer.h>
 #include "helper/types.h"
+#include "helper/align.h"
 #include <target/algorithm.h>
 #include <target/armv7m.h>
 #include <target/cortex_m.h>
@@ -273,7 +274,7 @@ static int bluenrgx_write_with_loader(struct flash_bank *bank, const uint8_t *bu
 {
 	struct bluenrgx_flash_bank *bluenrgx_info = bank->driver_priv;
 	struct target *target = bank->target;
-	uint32_t buffer_size = 16384 + 8;
+	uint32_t max_buffer_size = 16384 + 8;
 	struct working_area *write_algorithm;
 	struct working_area *write_algorithm_stack;
 	struct working_area *source;
@@ -302,6 +303,23 @@ static int bluenrgx_write_with_loader(struct flash_bank *bank, const uint8_t *bu
 	if (retval != ERROR_OK)
 		return retval;
 
+	/* Compute usable buffer size by excluding 128 bytes for write_algorithm_stack
+	 * and 8 bytes for read and write pointers.
+	 */
+	uint32_t buffer_size = target_get_working_area_avail(target) - 128 - 8;
+	/* buffer size should be multiple of FLASH_DATA_WIDTH*/
+	buffer_size = ALIGN_DOWN(buffer_size, FLASH_DATA_WIDTH);
+	buffer_size += 8;
+
+	if (buffer_size < 256) {
+		LOG_WARNING("large enough working area not available, can't do block memory writes");
+		target_free_working_area(target, write_algorithm);
+		return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
+	} else if (buffer_size > max_buffer_size) {
+		/* probably won't benefit from more than 16k ... */
+		buffer_size = max_buffer_size;
+	}
+
 	/* memory buffer */
 	if (target_alloc_working_area(target, buffer_size, &source)) {
 		LOG_WARNING("no large enough working area available");

-----------------------------------------------------------------------

Summary of changes:
 src/flash/nor/bluenrg-x.c | 20 +++++++++++++++++++-
 1 file changed, 19 insertions(+), 1 deletion(-)


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commit 16b9eae804f394e72a1ba6eccba9bcb461a0230a
Author: Tomas Vanek <va...@fb...>
Date:   Wed Jul 9 09:38:37 2025 +0200

    tcl/target/stm32u3x: fix voltage scale before flashing from gdb
    
    The config files of Cortex-M33 based devices (L5, U5, U3) intentionally
    dropped 'reset init' from the 'gdb-flash-erase-start' event to allow
    programming of unsecure part of flash in 0.5 RDP level.
    
    STM32U3 needs to set voltage range 1 before flash programming,
    which was issued in the 'reset-init' event only before this patch.
    
    If the application ran in voltage range 2 and gdb command 'load'
    was issued, the flash operation failed due to voltage range 2.
    
    Refactor 'gdb-flash-erase-start' event to use Tcl proc
    'stm32x5x_gdb_flash_erase_start'
    Add voltage range 1 setting (call 'config_voltage_range') to
    'gdb-flash-erase-start' event of STM32U3
    
    Change-Id: Ie910fef11d6737e34158cbb616721a1add72acd1
    Signed-off-by: Tomas Vanek <va...@fb...>
    Reviewed-on: https://review.openocd.org/c/openocd/+/9062
    Reviewed-by: Ahmed Haoues <ahm...@st...>
    Tested-by: jenkins

diff --git a/tcl/target/stm32u3x.cfg b/tcl/target/stm32u3x.cfg
index 449c04217..47c68935e 100644
--- a/tcl/target/stm32u3x.cfg
+++ b/tcl/target/stm32u3x.cfg
@@ -43,3 +43,8 @@ proc config_voltage_range {} {
 $_TARGETNAME configure -event reset-init {
 	config_voltage_range
 }
+
+$_TARGETNAME configure -event gdb-flash-erase-start {
+	stm32x5x_gdb_flash_erase_start
+	config_voltage_range
+}
diff --git a/tcl/target/stm32x5x_common.cfg b/tcl/target/stm32x5x_common.cfg
index b6370e493..61ef35d6d 100644
--- a/tcl/target/stm32x5x_common.cfg
+++ b/tcl/target/stm32x5x_common.cfg
@@ -88,6 +88,38 @@ proc stm32x5x_ahb_ap_secure_access {} {
 	}
 }
 
+proc stm32x5x_gdb_flash_erase_start {} {
+	set use_secure_workarea 0
+	# check if FLASH_OPTR.TZEN is enabled
+	set FLASH_OPTR [mrw 0x40022040]
+	if {[expr {$FLASH_OPTR & 0x80000000}] == 0} {
+		echo "TZEN option bit disabled"
+		stm32x5x_ahb_ap_non_secure_access
+	} else {
+		stm32x5x_ahb_ap_secure_access
+		echo "TZEN option bit enabled"
+
+		# check if FLASH_OPTR.RDP is not Level 0.5
+		if {[expr {$FLASH_OPTR & 0xFF}] != 0x55} {
+			set use_secure_workarea 1
+		}
+	}
+
+	set _TARGETNAME [target current]
+	set workarea_addr [$_TARGETNAME cget -work-area-phys]
+	echo "workarea_addr $workarea_addr"
+
+	if {$use_secure_workarea} {
+		set workarea_addr [expr {$workarea_addr | 0x10000000}]
+	} else {
+		set workarea_addr [expr {$workarea_addr & ~0x10000000}]
+	}
+
+	$_TARGETNAME configure -work-area-phys $workarea_addr
+}
+
+$_TARGETNAME configure -event gdb-flash-erase-start stm32x5x_gdb_flash_erase_start
+
 $_TARGETNAME configure -event reset-start {
 	# Reset clock is MSI (4 MHz)
 	adapter speed 480
@@ -124,36 +156,6 @@ $_TARGETNAME configure -event halted {
 	}
 }
 
-$_TARGETNAME configure -event gdb-flash-erase-start {
-	set use_secure_workarea 0
-	# check if FLASH_OPTR.TZEN is enabled
-	set FLASH_OPTR [mrw 0x40022040]
-	if {[expr {$FLASH_OPTR & 0x80000000}] == 0} {
-		echo "TZEN option bit disabled"
-		stm32x5x_ahb_ap_non_secure_access
-	} else {
-		stm32x5x_ahb_ap_secure_access
-		echo "TZEN option bit enabled"
-
-		# check if FLASH_OPTR.RDP is not Level 0.5
-		if {[expr {$FLASH_OPTR & 0xFF}] != 0x55} {
-			set use_secure_workarea 1
-		}
-	}
-
-	set _TARGETNAME [target current]
-	set workarea_addr [$_TARGETNAME cget -work-area-phys]
-	echo "workarea_addr $workarea_addr"
-
-	if {$use_secure_workarea} {
-		set workarea_addr [expr {$workarea_addr | 0x10000000}]
-	} else {
-		set workarea_addr [expr {$workarea_addr & ~0x10000000}]
-	}
-
-	$_TARGETNAME configure -work-area-phys $workarea_addr
-}
-
 tpiu create $_CHIPNAME.tpiu -dap $_CHIPNAME.dap -ap-num 0 -baseaddr 0xE0040000
 
 lappend _telnet_autocomplete_skip _proc_pre_enable_$_CHIPNAME.tpiu

-----------------------------------------------------------------------

Summary of changes:
 tcl/target/stm32u3x.cfg        |  5 ++++
 tcl/target/stm32x5x_common.cfg | 62 ++++++++++++++++++++++--------------------
 2 files changed, 37 insertions(+), 30 deletions(-)


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From: openocd-gerrit <ope...@us...> - 2026-07-07 17:01:43

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- Log -----------------------------------------------------------------
commit 2ed9f231a47300c39c2573f3a98266aceebc7dd0
Author: Tomas Vanek <va...@fb...>
Date:   Sat Nov 29 09:37:58 2025 +0100

    gdb_server: preserve gdb monitor command output from Tcl events
    
    target_call_timer_callbacks_now() in gdb_query_packet() may result
    in Tcl event execution. The event output replaces the desired command
    output.
    
    Call target_call_timer_callbacks_now() as late as Tcl return message
    of monitor command is gathered.
    
    Change-Id: Id1c2304fc9b218ceade02e9ae8eff5bd814baa38
    Signed-off-by: Tomas Vanek <va...@fb...>
    Reviewed-on: https://review.openocd.org/c/openocd/+/9272
    Tested-by: jenkins
    Reviewed-by: zapb <de...@za...>

diff --git a/src/server/gdb_server.c b/src/server/gdb_server.c
index 6c28a715d..7c8bfee8e 100644
--- a/src/server/gdb_server.c
+++ b/src/server/gdb_server.c
@@ -2850,7 +2850,6 @@ static int gdb_query_packet(struct connection *connection,
 			cmd_ctx->current_target_override = saved_target_override;
 
 			current_gdb_connection = NULL;
-			target_call_timer_callbacks_now();
 			gdb_connection->output_flag = GDB_OUTPUT_NO;
 			free(cmd);
 			if (retval == JIM_RETURN)
@@ -2864,6 +2863,9 @@ static int gdb_query_packet(struct connection *connection,
 			} else {
 				retmsg = strdup(cretmsg);
 			}
+
+			target_call_timer_callbacks_now();
+
 			if (!retmsg)
 				return ERROR_GDB_BUFFER_TOO_SMALL;
 

-----------------------------------------------------------------------

Summary of changes:
 src/server/gdb_server.c | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)


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commit 472edee1297e65dfc24a171358fe836e4de41c7d
Author: Mark O'Donovan <sh...@po...>
Date:   Wed Jun 24 23:04:38 2026 +0100

    tcl/target: Add max32655.cfg
    
    Config file added and tested on MAX32655FTHR EV kit
    
    Change-Id: I373b79b6184f8b5c90f266cc693643cf2752bd45
    Signed-off-by: Mark O'Donovan <sh...@po...>
    Reviewed-on: https://review.openocd.org/c/openocd/+/9756
    Reviewed-by: Henrik Mau <hen...@an...>
    Reviewed-by: Antonio Borneo <bor...@gm...>
    Tested-by: jenkins

diff --git a/tcl/target/max32655.cfg b/tcl/target/max32655.cfg
new file mode 100644
index 000000000..4151fe19d
--- /dev/null
+++ b/tcl/target/max32655.cfg
@@ -0,0 +1,20 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+# Maxim Integrated MAX32655 - Arm Cortex-M4F @ 100MHz
+
+# Set flash parameters
+set FLASH_BASE 0x10000000
+set FLASH_SIZE 0x80000
+set FLC_BASE 0x40029000
+set FLASH_SECTOR 0x2000
+set FLASH_CLK 100
+set FLASH_OPTIONS 0x01
+
+# Use Serial Wire Debug
+transport select swd
+
+source [find target/max32xxx_common.cfg]
+
+if {![using_hla]} {
+    # The chip supports standard ARM/Cortex-M4 SYSRESETREQ signal
+    cortex_m reset_config sysresetreq
+}

-----------------------------------------------------------------------

Summary of changes:
 tcl/target/{max32650.cfg => max32655.cfg} | 7 ++++---
 1 file changed, 4 insertions(+), 3 deletions(-)
 copy tcl/target/{max32650.cfg => max32655.cfg} (75%)


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From: openocd-gerrit <ope...@us...> - 2026-07-04 17:56:20

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- Log -----------------------------------------------------------------
commit bbb9f4ffe7d6bc1cd27ea919c141927e45c4d26b
Author: Samuel Obuch <sam...@es...>
Date:   Wed Jun 24 17:23:49 2026 +0200

    target/espressif: add insn_set functions
    
    Adds default instruction set so that users do not have to select
    one manually when using the 'disassemble' command.
    
    Change-Id: Ic100fa82588cd567d3531502eceb88a3231df266
    Signed-off-by: Samuel Obuch <sam...@es...>
    Reviewed-on: https://review.openocd.org/c/openocd/+/9758
    Tested-by: jenkins
    Reviewed-by: Antonio Borneo <bor...@gm...>

diff --git a/src/target/espressif/esp32.c b/src/target/espressif/esp32.c
index 4ea1c8a33..fd6565d6b 100644
--- a/src/target/espressif/esp32.c
+++ b/src/target/espressif/esp32.c
@@ -457,6 +457,13 @@ static const struct command_registration esp32_command_handlers[] = {
 	COMMAND_REGISTRATION_DONE
 };
 
+static int esp32_insn_set(struct command_invocation *cmd,
+	struct target *target, const char **insn_set)
+{
+	*insn_set = "xtensa";
+	return ERROR_OK;
+}
+
 /** Holds methods for Xtensa targets. */
 struct target_type esp32_target = {
 	.name = "esp32",
@@ -502,4 +509,5 @@ struct target_type esp32_target = {
 
 	.commands = esp32_command_handlers,
 	.profiling = esp_xtensa_profiling,
+	.insn_set = esp32_insn_set,
 };
diff --git a/src/target/espressif/esp32s2.c b/src/target/espressif/esp32s2.c
index eb3ad71f2..4a5bcb047 100644
--- a/src/target/espressif/esp32s2.c
+++ b/src/target/espressif/esp32s2.c
@@ -494,6 +494,13 @@ static const struct command_registration esp32s2_command_handlers[] = {
 	COMMAND_REGISTRATION_DONE
 };
 
+static int esp32s2_insn_set(struct command_invocation *cmd,
+	struct target *target, const char **insn_set)
+{
+	*insn_set = "xtensa_s2";
+	return ERROR_OK;
+}
+
 /* Holds methods for Xtensa targets. */
 struct target_type esp32s2_target = {
 	.name = "esp32s2",
@@ -539,4 +546,5 @@ struct target_type esp32s2_target = {
 
 	.commands = esp32s2_command_handlers,
 	.profiling = esp_xtensa_profiling,
+	.insn_set = esp32s2_insn_set,
 };
diff --git a/src/target/espressif/esp32s3.c b/src/target/espressif/esp32s3.c
index 14f7a7bb6..a8e3fff68 100644
--- a/src/target/espressif/esp32s3.c
+++ b/src/target/espressif/esp32s3.c
@@ -378,6 +378,13 @@ static const struct command_registration esp32s3_command_handlers[] = {
 	COMMAND_REGISTRATION_DONE
 };
 
+static int esp32s3_insn_set(struct command_invocation *cmd,
+	struct target *target, const char **insn_set)
+{
+	*insn_set = "xtensa_s2";
+	return ERROR_OK;
+}
+
 /** Holds methods for Xtensa targets. */
 struct target_type esp32s3_target = {
 	.name = "esp32s3",
@@ -423,4 +430,5 @@ struct target_type esp32s3_target = {
 
 	.commands = esp32s3_command_handlers,
 	.profiling = esp_xtensa_profiling,
+	.insn_set = esp32s3_insn_set,
 };

-----------------------------------------------------------------------

Summary of changes:
 src/target/espressif/esp32.c   | 8 ++++++++
 src/target/espressif/esp32s2.c | 8 ++++++++
 src/target/espressif/esp32s3.c | 8 ++++++++
 3 files changed, 24 insertions(+)


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- Log -----------------------------------------------------------------
commit 4ee667c15de2f9ba13a8f738c12ecf2a894b921c
Author: Lazar Aleksic <kri...@pr...>
Date:   Tue Jun 23 01:04:31 2026 +0200

    target/oocd_capstone: add Xtensa and ARC support for capstone v6
    
    Capstone v6 adds support for Xtensa and ARC architectures. Add
    entries to the all_archs[] table under the CS_API_MAJOR >= 6 block
    so they are available when building against capstone v6.
    
    Xtensa entries cover ESP32, ESP32-S2, and ESP8266 variants.
    ARC uses little-endian mode as default.
    
    Change-Id: I631070ffde337b4113af59050183a6210639764e
    Signed-off-by: Lazar Aleksic <kri...@pr...>
    Reviewed-on: https://review.openocd.org/c/openocd/+/9751
    Tested-by: jenkins
    Reviewed-by: Samuel Obuch <sam...@es...>
    Reviewed-by: Antonio Borneo <bor...@gm...>

diff --git a/src/target/oocd_capstone.c b/src/target/oocd_capstone.c
index b2175565e..8135fc77f 100644
--- a/src/target/oocd_capstone.c
+++ b/src/target/oocd_capstone.c
@@ -46,6 +46,10 @@ static struct {
 	{ "arm64be", CS_ARCH_AARCH64, CS_MODE_BIG_ENDIAN },
 	{ "riscv32", CS_ARCH_RISCV, CS_MODE_RISCV32 | CS_MODE_RISCV_C },
 	{ "riscv64", CS_ARCH_RISCV, CS_MODE_RISCV64 | CS_MODE_RISCV_C },
+	{ "xtensa", CS_ARCH_XTENSA, CS_MODE_XTENSA_ESP32 },
+	{ "xtensa_s2", CS_ARCH_XTENSA, CS_MODE_XTENSA_ESP32S2 },
+	{ "xtensa_8266", CS_ARCH_XTENSA, CS_MODE_XTENSA_ESP8266 },
+	{ "arc", CS_ARCH_ARC, CS_MODE_LITTLE_ENDIAN },
 #endif /* CS_API_MAJOR >= 6 */
 };
 

-----------------------------------------------------------------------

Summary of changes:
 src/target/oocd_capstone.c | 4 ++++
 1 file changed, 4 insertions(+)


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