Menu
▾
▴
openocd-commit — OpenOCD commit maling list - read only
You can subscribe to this list here.
| 2008 |
Jan
|
Feb
|
Mar
|
Apr
|
May
|
Jun
|
Jul
|
Aug
|
Sep
|
Oct
|
Nov
|
Dec
(75) |
|---|---|---|---|---|---|---|---|---|---|---|---|---|
| 2009 |
Jan
(70) |
Feb
(20) |
Mar
(52) |
Apr
(149) |
May
(387) |
Jun
(466) |
Jul
(133) |
Aug
(87) |
Sep
(122) |
Oct
(140) |
Nov
(185) |
Dec
(105) |
| 2010 |
Jan
(85) |
Feb
(45) |
Mar
(75) |
Apr
(17) |
May
(41) |
Jun
(52) |
Jul
(33) |
Aug
(29) |
Sep
(36) |
Oct
(15) |
Nov
(26) |
Dec
(34) |
| 2011 |
Jan
(26) |
Feb
(25) |
Mar
(26) |
Apr
(29) |
May
(20) |
Jun
(27) |
Jul
(15) |
Aug
(32) |
Sep
(13) |
Oct
(64) |
Nov
(60) |
Dec
(10) |
| 2012 |
Jan
(64) |
Feb
(63) |
Mar
(39) |
Apr
(43) |
May
(54) |
Jun
(11) |
Jul
(30) |
Aug
(45) |
Sep
(11) |
Oct
(70) |
Nov
(24) |
Dec
(23) |
| 2013 |
Jan
(17) |
Feb
(8) |
Mar
(35) |
Apr
(40) |
May
(20) |
Jun
(24) |
Jul
(36) |
Aug
(25) |
Sep
(42) |
Oct
(40) |
Nov
(9) |
Dec
(21) |
| 2014 |
Jan
(29) |
Feb
(24) |
Mar
(60) |
Apr
(22) |
May
(22) |
Jun
(46) |
Jul
(11) |
Aug
(23) |
Sep
(26) |
Oct
(10) |
Nov
(14) |
Dec
(2) |
| 2015 |
Jan
(28) |
Feb
(47) |
Mar
(33) |
Apr
(58) |
May
(5) |
Jun
(1) |
Jul
|
Aug
(8) |
Sep
(12) |
Oct
(25) |
Nov
(58) |
Dec
(21) |
| 2016 |
Jan
(12) |
Feb
(40) |
Mar
(2) |
Apr
(1) |
May
(67) |
Jun
(2) |
Jul
(5) |
Aug
(36) |
Sep
|
Oct
(24) |
Nov
(17) |
Dec
(50) |
| 2017 |
Jan
(14) |
Feb
(16) |
Mar
(2) |
Apr
(35) |
May
(14) |
Jun
(16) |
Jul
(3) |
Aug
(3) |
Sep
|
Oct
(19) |
Nov
|
Dec
(16) |
| 2018 |
Jan
(55) |
Feb
(11) |
Mar
(34) |
Apr
(14) |
May
(4) |
Jun
(20) |
Jul
(39) |
Aug
(16) |
Sep
(17) |
Oct
(16) |
Nov
(20) |
Dec
(30) |
| 2019 |
Jan
(29) |
Feb
(24) |
Mar
(37) |
Apr
(26) |
May
(19) |
Jun
(21) |
Jul
(2) |
Aug
(3) |
Sep
(9) |
Oct
(12) |
Nov
(12) |
Dec
(12) |
| 2020 |
Jan
(47) |
Feb
(36) |
Mar
(54) |
Apr
(44) |
May
(37) |
Jun
(19) |
Jul
(32) |
Aug
(13) |
Sep
(16) |
Oct
(24) |
Nov
(32) |
Dec
(11) |
| 2021 |
Jan
(14) |
Feb
(5) |
Mar
(40) |
Apr
(32) |
May
(42) |
Jun
(31) |
Jul
(29) |
Aug
(47) |
Sep
(38) |
Oct
(17) |
Nov
(74) |
Dec
(33) |
| 2022 |
Jan
(11) |
Feb
(15) |
Mar
(40) |
Apr
(21) |
May
(39) |
Jun
(44) |
Jul
(19) |
Aug
(46) |
Sep
(79) |
Oct
(35) |
Nov
(21) |
Dec
(15) |
| 2023 |
Jan
(56) |
Feb
(13) |
Mar
(43) |
Apr
(28) |
May
(60) |
Jun
(15) |
Jul
(29) |
Aug
(28) |
Sep
(32) |
Oct
(21) |
Nov
(42) |
Dec
(39) |
| 2024 |
Jan
(35) |
Feb
(17) |
Mar
(28) |
Apr
(7) |
May
(14) |
Jun
(35) |
Jul
(30) |
Aug
(35) |
Sep
(30) |
Oct
(28) |
Nov
(38) |
Dec
(18) |
| 2025 |
Jan
(21) |
Feb
(28) |
Mar
(36) |
Apr
(35) |
May
(34) |
Jun
(58) |
Jul
(9) |
Aug
(54) |
Sep
(47) |
Oct
(15) |
Nov
(68) |
Dec
(18) |
| 2026 |
Jan
(30) |
Feb
(31) |
Mar
(9) |
Apr
(44) |
May
(51) |
Jun
(20) |
Jul
(27) |
Aug
|
Sep
|
Oct
|
Nov
|
Dec
|
|
From: openocd-gerrit <ope...@us...> - 2026-07-18 14:09:36
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".
The branch, master has been updated
via fc566d74005a4aefbe125b9b2f777d9514c60c87 (commit)
from b56339c316f9f46df9fcfb07dfdce18ccb5fa21d (commit)
Those revisions listed above that are new to this repository have
not appeared on any other notification email; so we list those
revisions in full, below.
- Log -----------------------------------------------------------------
commit fc566d74005a4aefbe125b9b2f777d9514c60c87
Author: Marc Schink <de...@za...>
Date: Wed Jun 17 14:33:17 2026 +0000
tcl/board/st: Add NUCLEO-U575ZI-Q config
Tested on NUCLEO-U575ZI-Q development board.
Change-Id: I5870c44b3a7e5e48dc3d0a166734f116c32bfca3
Signed-off-by: Marc Schink <de...@za...>
Reviewed-on: https://review.openocd.org/c/openocd/+/9749
Reviewed-by: Antonio Borneo <bor...@gm...>
Tested-by: jenkins
diff --git a/tcl/board/st/nucleo-u575zi-q.cfg b/tcl/board/st/nucleo-u575zi-q.cfg
new file mode 100644
index 000000000..acc548a2a
--- /dev/null
+++ b/tcl/board/st/nucleo-u575zi-q.cfg
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
+# NUCLEO-U575ZI-Q
+# https://www.st.com/en/evaluation-tools/nucleo-u575zi-q.html
+
+source [find interface/stlink.cfg]
+
+transport select swd
+
+source [find target/stm32u5x.cfg]
+
+reset_config srst_only
-----------------------------------------------------------------------
Summary of changes:
tcl/board/st/{nucleo-u3c5zi-q.cfg => nucleo-u575zi-q.cfg} | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
copy tcl/board/st/{nucleo-u3c5zi-q.cfg => nucleo-u575zi-q.cfg} (52%)
hooks/post-receive
--
Main OpenOCD repository
|
|
From: openocd-gerrit <ope...@us...> - 2026-07-18 14:06:42
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".
The branch, master has been updated
via b56339c316f9f46df9fcfb07dfdce18ccb5fa21d (commit)
via af75d7f6c4ccd7a4444d79ea4b064de6831c88eb (commit)
from b63fc374f038a474fd0cbca2728138512d4f640e (commit)
Those revisions listed above that are new to this repository have
not appeared on any other notification email; so we list those
revisions in full, below.
- Log -----------------------------------------------------------------
commit b56339c316f9f46df9fcfb07dfdce18ccb5fa21d
Author: Frederic Boyer <fre...@mi...>
Date: Wed Apr 15 11:58:01 2026 +0200
tcl: add SAMA7D6 target and SAMA7D65 Curiosity board configuration
Add target configuration for the Microchip SAMA7D6 series
(Cortex-A7 based MPU). Supports both JTAG and SWD interfaces.
Add board configuration for the SAMA7D65 Curiosity board.
Link: https://www.microchip.com/en-us/product/sama7d65
Link: https://www.microchip.com/en-us/development-tool/EV63J76A
Change-Id: Ieda7658167e87c6f011b4c267d2598b80754e067
Signed-off-by: Frederic Boyer <fre...@mi...>
Reviewed-on: https://review.openocd.org/c/openocd/+/9523
Tested-by: jenkins
Reviewed-by: Antonio Borneo <bor...@gm...>
Reviewed-by: zapb <de...@za...>
diff --git a/tcl/board/microchip/sama7d65-curiosity.cfg b/tcl/board/microchip/sama7d65-curiosity.cfg
new file mode 100644
index 000000000..2f32daf15
--- /dev/null
+++ b/tcl/board/microchip/sama7d65-curiosity.cfg
@@ -0,0 +1,22 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+#
+# Microchip SAMA7D65 Curiosity Board (EV63J76A)
+# https://www.microchip.com/en-us/development-tool/EV63J76A
+#
+# SAMA7D65 Cortex-A7, DDR SDRAM, 128 KB SRAM
+#
+# External JTAG/SWD probe connects to J38.
+#
+# JTAG is disabled by ROM code during boot.
+# On blank boards, ROM enters SAM-BA Monitor which enables JTAG.
+# Remove JP9, JP10 and SD card to force SAM-BA entry.
+#
+# Two-stage boot for debug:
+# 1. Load AT91Bootstrap to SRAM (0x00100000) - initializes DDR
+# 2. Load application to DDR (0x60000000)
+#
+
+source [find target/microchip/sama7d6.cfg]
+
+# Conservative initial speed - increases after reset-init
+adapter speed 1000
diff --git a/tcl/target/microchip/sama7d6.cfg b/tcl/target/microchip/sama7d6.cfg
new file mode 100644
index 000000000..750634055
--- /dev/null
+++ b/tcl/target/microchip/sama7d6.cfg
@@ -0,0 +1,71 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+#
+# Microchip SAMA7D6 series: SAMA7D65
+# Cortex-A7 MPU, JTAG and SWD
+#
+# https://www.microchip.com/en-us/product/sama7d65
+# DS60001851
+#
+# JTAG-DP IDCODE: 0x6BA00477
+# SW-DP DPIDR: 0x6BA02477
+#
+# JTAG access is disabled by ROM code during boot.
+# It is enabled after AT91Bootstrap runs or SAM-BA Monitor entry.
+# Transient DAP errors before bootstrap are caused by the watchdog.
+#
+
+source [find target/swj-dp.tcl]
+source [find mem_helper.tcl]
+
+if { [info exists CHIPNAME] } {
+ set _CHIPNAME $CHIPNAME
+} else {
+ set _CHIPNAME sama7d6
+}
+
+if { [info exists ENDIAN] } {
+ set _ENDIAN $ENDIAN
+} else {
+ set _ENDIAN little
+}
+
+if { [info exists CPUTAPID] } {
+ set _CPUTAPID $CPUTAPID
+} else {
+ set _CPUTAPID 0x6ba00477
+}
+
+if { [info exists DAP_TAPID] } {
+ set _DAP_TAPID $DAP_TAPID
+} else {
+ set _DAP_TAPID 0x6ba02477
+}
+
+swj_newdap $_CHIPNAME cpu -expected-id $_CPUTAPID -expected-id $_DAP_TAPID -irlen 4
+
+dap create $_CHIPNAME.dap -chain-position $_CHIPNAME.cpu
+
+set _TARGETNAME $_CHIPNAME.cpu.0
+target create $_TARGETNAME cortex_a -dap $_CHIPNAME.dap -endian $_ENDIAN -ap-num 0 -dbgbase 0x80030000
+
+# SRAM 128KB - shared with ROM code and AT91Bootstrap
+$_TARGETNAME configure -work-area-phys 0x00100000 -work-area-size 0x20000 -work-area-backup 0
+
+$_TARGETNAME configure -event examine-start {
+ adapter speed 1000
+}
+
+$_TARGETNAME configure -event examine-end {
+ if { [catch { $_TARGETNAME arp_halt }] } {
+ echo "Warning: Could not halt target - JTAG may not be enabled yet"
+ }
+ catch { $_TARGETNAME arp_waitstate halted 1000 }
+}
+
+$_TARGETNAME configure -event reset-start {
+ adapter speed 1000
+}
+
+$_TARGETNAME configure -event reset-init {
+ adapter speed 4000
+}
commit af75d7f6c4ccd7a4444d79ea4b064de6831c88eb
Author: Frederic Boyer <fre...@mi...>
Date: Wed Apr 15 11:57:54 2026 +0200
tcl: add SAMA7G5 target and SAMA7G54-EK board configuration
Add target configuration for the Microchip SAMA7G5 series
(Cortex-A7 based MPU). Supports both JTAG and SWD interfaces.
Add board configuration for the SAMA7G54-EK evaluation kit.
Link: https://www.microchip.com/en-us/product/sama7g54
Link: https://www.microchip.com/en-us/development-tool/EV21H18A
Change-Id: I94085babaf1b2f4ce92a44ed900128fc6093f397
Signed-off-by: Frederic Boyer <fre...@mi...>
Reviewed-on: https://review.openocd.org/c/openocd/+/9524
Tested-by: jenkins
Reviewed-by: zapb <de...@za...>
Reviewed-by: Antonio Borneo <bor...@gm...>
diff --git a/tcl/board/microchip/sama7g54-ek.cfg b/tcl/board/microchip/sama7g54-ek.cfg
new file mode 100644
index 000000000..e6e07b9fe
--- /dev/null
+++ b/tcl/board/microchip/sama7g54-ek.cfg
@@ -0,0 +1,35 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+#
+# Microchip SAMA7G54-EK evaluation kit (EV21H18A)
+# https://www.microchip.com/en-us/development-tool/EV21H18A
+#
+# SAMA7G54 Cortex-A7 @ 1 GHz, 512 MB DDR3L, 128 KB SRAM
+#
+# Debug interface selection:
+# By default, uses on-board J-Link-OB (USB J24, J26 must be open).
+# Could specify external adapter by:
+# openocd -f interface/jlink.cfg -c "transport select jtag" \
+# -f board/microchip/sama7g54-ek.cfg
+# otherwise use on-board J-Link-OB by default.
+#
+# JTAG is disabled by ROM code during boot.
+# On blank boards, ROM enters SAM-BA Monitor which enables JTAG.
+# Press SW4 or close J22 to force SAM-BA entry.
+#
+# Two-stage boot for debug:
+# 1. Load AT91Bootstrap to SRAM (0x00100000) - initializes DDR
+# 2. Load application to DDR (0x60000000)
+#
+if { [adapter name] eq "undefined" } {
+ # Use on-board J-Link-OB adapter (JTAG)
+ echo "Info : use on-board J-Link-OB adapter"
+ source [find interface/jlink.cfg]
+ transport select jtag
+} else {
+ # External adapter specified on command line
+ # User must select transport via: -c "transport select jtag" or "swd"
+ echo "Info : use external [adapter name] adapter"
+}
+source [find target/microchip/sama7g5.cfg]
+# Conservative initial speed - increases after reset-init
+adapter speed 1000
diff --git a/tcl/target/microchip/sama7g5.cfg b/tcl/target/microchip/sama7g5.cfg
new file mode 100644
index 000000000..ec4cedaf3
--- /dev/null
+++ b/tcl/target/microchip/sama7g5.cfg
@@ -0,0 +1,71 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+#
+# Microchip SAMA7G5 series: SAMA7G54
+# Cortex-A7 MPU, JTAG and SWD
+#
+# https://www.microchip.com/en-us/product/sama7g54
+# DS60001765
+#
+# JTAG-DP IDCODE: 0x6BA00477
+# SW-DP DPIDR: 0x6BA02477
+#
+# JTAG access is disabled by ROM code during boot.
+# It is enabled after AT91Bootstrap runs or SAM-BA Monitor entry.
+# Transient DAP errors before bootstrap are caused by the watchdog.
+#
+
+source [find target/swj-dp.tcl]
+source [find mem_helper.tcl]
+
+if { [info exists CHIPNAME] } {
+ set _CHIPNAME $CHIPNAME
+} else {
+ set _CHIPNAME sama7g5
+}
+
+if { [info exists ENDIAN] } {
+ set _ENDIAN $ENDIAN
+} else {
+ set _ENDIAN little
+}
+
+if { [info exists CPUTAPID] } {
+ set _CPUTAPID $CPUTAPID
+} else {
+ set _CPUTAPID 0x6ba00477
+}
+
+if { [info exists DAP_TAPID] } {
+ set _DAP_TAPID $DAP_TAPID
+} else {
+ set _DAP_TAPID 0x6ba02477
+}
+
+swj_newdap $_CHIPNAME cpu -expected-id $_CPUTAPID -expected-id $_DAP_TAPID -irlen 4
+
+dap create $_CHIPNAME.dap -chain-position $_CHIPNAME.cpu
+
+set _TARGETNAME $_CHIPNAME.cpu.0
+target create $_TARGETNAME cortex_a -dap $_CHIPNAME.dap -endian $_ENDIAN -ap-num 0 -dbgbase 0x80030000
+
+# SRAM 128KB - shared with ROM code and AT91Bootstrap
+$_TARGETNAME configure -work-area-phys 0x00100000 -work-area-size 0x20000 -work-area-backup 0
+
+$_TARGETNAME configure -event examine-start {
+ adapter speed 1000
+}
+
+$_TARGETNAME configure -event examine-end {
+ if { [catch { $_TARGETNAME arp_halt }] } {
+ echo "Warning: Could not halt target - JTAG may not be enabled yet"
+ }
+ catch { $_TARGETNAME arp_waitstate halted 1000 }
+}
+
+$_TARGETNAME configure -event reset-start {
+ adapter speed 1000
+}
+
+$_TARGETNAME configure -event reset-init {
+ adapter speed 4000
+}
-----------------------------------------------------------------------
Summary of changes:
tcl/board/microchip/sama7d65-curiosity.cfg | 22 +++++++++
tcl/board/microchip/sama7g54-ek.cfg | 35 +++++++++++++++
tcl/target/microchip/sama7d6.cfg | 71 ++++++++++++++++++++++++++++++
tcl/target/microchip/sama7g5.cfg | 71 ++++++++++++++++++++++++++++++
4 files changed, 199 insertions(+)
create mode 100644 tcl/board/microchip/sama7d65-curiosity.cfg
create mode 100644 tcl/board/microchip/sama7g54-ek.cfg
create mode 100644 tcl/target/microchip/sama7d6.cfg
create mode 100644 tcl/target/microchip/sama7g5.cfg
hooks/post-receive
--
Main OpenOCD repository
|
|
From: openocd-gerrit <ope...@us...> - 2026-07-17 08:33:04
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".
The branch, master has been updated
via b63fc374f038a474fd0cbca2728138512d4f640e (commit)
via 7bb208c309203c70c43e5ad21a806b17894763c1 (commit)
from da6c65041fb9e299fe8f1cc9eb825c119c454c5c (commit)
Those revisions listed above that are new to this repository have
not appeared on any other notification email; so we list those
revisions in full, below.
- Log -----------------------------------------------------------------
commit b63fc374f038a474fd0cbca2728138512d4f640e
Author: Anatoly Parshintsev <kup...@gm...>
Date: Sun Feb 1 13:30:19 2026 +0300
target/riscv: do not cache access to vxrm, vxsat and vcsr
vxrm and vxsat registers are mirrored in vcsr, so we can't cache any of
them.
Change-Id: I09760de5b76c330797caa99d2ef0ef151546e956
Signed-off-by: Anatoly Parshintsev <kup...@gm...>
Reviewed-on: https://review.openocd.org/c/openocd/+/9422
Reviewed-by: Tomas Vanek <va...@fb...>
Tested-by: jenkins
diff --git a/src/target/riscv/riscv_reg_impl.h b/src/target/riscv/riscv_reg_impl.h
index f45af047d..d38d4146e 100644
--- a/src/target/riscv/riscv_reg_impl.h
+++ b/src/target/riscv/riscv_reg_impl.h
@@ -195,8 +195,6 @@ static inline bool riscv_reg_impl_gdb_regno_cacheable(enum gdb_regno regno,
* CSRs. */
switch (regno) {
case GDB_REGNO_DPC:
- case GDB_REGNO_VXSAT:
- case GDB_REGNO_VXRM:
case GDB_REGNO_VLENB:
case GDB_REGNO_MISA:
case GDB_REGNO_DCSR:
@@ -216,6 +214,9 @@ static inline bool riscv_reg_impl_gdb_regno_cacheable(enum gdb_regno regno,
case GDB_REGNO_VSTART: /* Changes value when vtype is changed. */
case GDB_REGNO_VL: /* Changes value when vtype is changed. */
case GDB_REGNO_VTYPE: /* Writes to vtype have side effects, so we don't cache it. */
+ case GDB_REGNO_VXSAT: /* Changes value when vcsr is changed. */
+ case GDB_REGNO_VXRM: /* Changes value when vcsr is changed. */
+ case GDB_REGNO_VCSR: /* Changes when vxrm or vxsat are changed. */
default:
return false;
}
commit 7bb208c309203c70c43e5ad21a806b17894763c1
Author: Anatoly Parshintsev <kup...@gm...>
Date: Thu Jan 29 21:34:27 2026 +0300
target/riscv: do not cache access to vtype
Writes to the vtype register are expected to have the side effect of
resetting vl and vstart. However, the current implementation caches the
vtype state on read, which prevents subsequent writes with
already-cached values from being issued.
Change-Id: I28beea6e2145bca52c5b37023399d6ae0937dfe0
Signed-off-by: Anatoly Parshintsev <kup...@gm...>
Reviewed-on: https://review.openocd.org/c/openocd/+/9416
Tested-by: jenkins
Reviewed-by: Tomas Vanek <va...@fb...>
diff --git a/src/target/riscv/riscv_reg_impl.h b/src/target/riscv/riscv_reg_impl.h
index 2948ef401..f45af047d 100644
--- a/src/target/riscv/riscv_reg_impl.h
+++ b/src/target/riscv/riscv_reg_impl.h
@@ -198,7 +198,6 @@ static inline bool riscv_reg_impl_gdb_regno_cacheable(enum gdb_regno regno,
case GDB_REGNO_VXSAT:
case GDB_REGNO_VXRM:
case GDB_REGNO_VLENB:
- case GDB_REGNO_VTYPE:
case GDB_REGNO_MISA:
case GDB_REGNO_DCSR:
case GDB_REGNO_MEPC:
@@ -216,6 +215,7 @@ static inline bool riscv_reg_impl_gdb_regno_cacheable(enum gdb_regno regno,
case GDB_REGNO_DSCRATCH1:
case GDB_REGNO_VSTART: /* Changes value when vtype is changed. */
case GDB_REGNO_VL: /* Changes value when vtype is changed. */
+ case GDB_REGNO_VTYPE: /* Writes to vtype have side effects, so we don't cache it. */
default:
return false;
}
-----------------------------------------------------------------------
Summary of changes:
src/target/riscv/riscv_reg_impl.h | 7 ++++---
1 file changed, 4 insertions(+), 3 deletions(-)
hooks/post-receive
--
Main OpenOCD repository
|
|
From: openocd-gerrit <ope...@us...> - 2026-07-17 08:32:39
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".
The branch, master has been updated
via da6c65041fb9e299fe8f1cc9eb825c119c454c5c (commit)
from cb52502e88832386610add9781030f5380344063 (commit)
Those revisions listed above that are new to this repository have
not appeared on any other notification email; so we list those
revisions in full, below.
- Log -----------------------------------------------------------------
commit da6c65041fb9e299fe8f1cc9eb825c119c454c5c
Author: Anatoly Parshintsev <kup...@gm...>
Date: Thu Jan 29 21:32:32 2026 +0300
target/riscv: disable cache-on-read for VL and VSTART
When VTYPE is updated:
- VL is set to some appropriate value
- VSTART is set to zero
Change-Id: If67d0e4a1058d35f47b42c67abc2183836f34f22
Signed-off-by: Anatoly Parshintsev <kup...@gm...>
Reviewed-on: https://review.openocd.org/c/openocd/+/9414
Tested-by: jenkins
Reviewed-by: Tomas Vanek <va...@fb...>
diff --git a/src/target/riscv/riscv_reg_impl.h b/src/target/riscv/riscv_reg_impl.h
index 2cf4e6ad5..2948ef401 100644
--- a/src/target/riscv/riscv_reg_impl.h
+++ b/src/target/riscv/riscv_reg_impl.h
@@ -195,11 +195,9 @@ static inline bool riscv_reg_impl_gdb_regno_cacheable(enum gdb_regno regno,
* CSRs. */
switch (regno) {
case GDB_REGNO_DPC:
- case GDB_REGNO_VSTART:
case GDB_REGNO_VXSAT:
case GDB_REGNO_VXRM:
case GDB_REGNO_VLENB:
- case GDB_REGNO_VL:
case GDB_REGNO_VTYPE:
case GDB_REGNO_MISA:
case GDB_REGNO_DCSR:
@@ -216,6 +214,8 @@ static inline bool riscv_reg_impl_gdb_regno_cacheable(enum gdb_regno regno,
case GDB_REGNO_TDATA2: /* Changes value when tselect is changed. */
case GDB_REGNO_DSCRATCH0: /* Dscratch* need not retain value between abstract commands. */
case GDB_REGNO_DSCRATCH1:
+ case GDB_REGNO_VSTART: /* Changes value when vtype is changed. */
+ case GDB_REGNO_VL: /* Changes value when vtype is changed. */
default:
return false;
}
-----------------------------------------------------------------------
Summary of changes:
src/target/riscv/riscv_reg_impl.h | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
hooks/post-receive
--
Main OpenOCD repository
|
|
From: openocd-gerrit <ope...@us...> - 2026-07-11 09:14:04
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".
The branch, master has been updated
via cb52502e88832386610add9781030f5380344063 (commit)
via a81a448bb9198fb4cc1cb88d674bb87ba0d6bf47 (commit)
via 6b36b0cbe35c17d8fbe1e30b8f1977ca08fe478e (commit)
from 02df329b8b8803fffefa5ee0261189e02c5a7d4e (commit)
Those revisions listed above that are new to this repository have
not appeared on any other notification email; so we list those
revisions in full, below.
- Log -----------------------------------------------------------------
commit cb52502e88832386610add9781030f5380344063
Author: Marc Schink <de...@za...>
Date: Mon Jul 6 16:43:53 2026 +0200
contrib/firmware/angie: Add PREFIX to makebin command
Add the prefix to makebin to match other commands. This fixes building,
for example, on Fedora, which uses the 'sdcc' prefix for all SDCC commands.
Change-Id: I93705062c58d2b7821e37bf9fa1b46aaf8648d1c
Signed-off-by: Marc Schink <de...@za...>
Reviewed-on: https://review.openocd.org/c/openocd/+/9777
Reviewed-by: Adrien Charruel <adr...@gm...>
Reviewed-by: Antonio Borneo <bor...@gm...>
Tested-by: jenkins
diff --git a/contrib/firmware/angie/c/Makefile b/contrib/firmware/angie/c/Makefile
index 21873da6b..a8817daa1 100644
--- a/contrib/firmware/angie/c/Makefile
+++ b/contrib/firmware/angie/c/Makefile
@@ -22,6 +22,8 @@ AS = $(PREFIX)sdas8051
# the OpenOCD driver, but the resulting file is smaller.
PACKIHX = $(PREFIX)packihx
+MAKEBIN = $(PREFIX)makebin
+
# GNU binutils size. Used to print the size of the IHX file generated by SDCC.
SIZE = size
@@ -71,7 +73,7 @@ clean:
rm -f *.asm *.lst *.rel *.rst *.sym *.ihx *.lk *.map *.mem
bin: angie_firmware.ihx
- makebin -p angie_firmware.ihx angie_firmware.bin
+ $(MAKEBIN) -p angie_firmware.ihx angie_firmware.bin
hex: angie_firmware.ihx
$(PACKIHX) angie_firmware.ihx > fx2.hex
commit a81a448bb9198fb4cc1cb88d674bb87ba0d6bf47
Author: Marc Schink <de...@za...>
Date: Mon Jul 6 16:43:29 2026 +0200
contrib/firmware/angie: Add parentheses for __at
Add parentheses to match the __interrupt change in the previous commit.
This is a cosmetic change and not technically required.
Change-Id: I26fe61aa9ae56be37488b0cfe9f176ed93408e44
Signed-off-by: Marc Schink <de...@za...>
Reviewed-on: https://review.openocd.org/c/openocd/+/9776
Reviewed-by: Adrien Charruel <adr...@gm...>
Reviewed-by: Antonio Borneo <bor...@gm...>
Tested-by: jenkins
diff --git a/contrib/firmware/angie/c/include/usb.h b/contrib/firmware/angie/c/include/usb.h
index dbf41fe8e..fb4067d62 100644
--- a/contrib/firmware/angie/c/include/usb.h
+++ b/contrib/firmware/angie/c/include/usb.h
@@ -125,7 +125,7 @@ struct setup_data {
uint16_t wlength; /**< Number of bytes to transfer in data stage. */
};
-extern volatile __xdata __at 0xE6B8 struct setup_data setup_data;
+extern volatile __xdata __at(0xE6B8) struct setup_data setup_data;
/*
* USB Request Types (bmRequestType): See USB 2.0 Spec
diff --git a/contrib/firmware/angie/c/src/usb.c b/contrib/firmware/angie/c/src/usb.c
index 8a448d903..4b3db0a60 100644
--- a/contrib/firmware/angie/c/src/usb.c
+++ b/contrib/firmware/angie/c/src/usb.c
@@ -23,7 +23,7 @@
// #define PRINTF_DEBUG
-volatile __xdata __at 0xE6B8 struct setup_data setup_data;
+volatile __xdata __at(0xE6B8) struct setup_data setup_data;
/* Define number of endpoints (except Control Endpoint 0) in a central place.
* Be sure to include the necessary endpoint descriptors!
commit 6b36b0cbe35c17d8fbe1e30b8f1977ca08fe478e
Author: Marc Schink <de...@za...>
Date: Mon Jul 6 16:36:51 2026 +0200
contrib/firmware/angie: Use parentheses for __interrupt
Since SDCC 4.2.3, non-parenthesized __interrupt arguments are no longer
supported (see section 1.5 in the SDCC manual [1]).
Add parentheses to fix the build on newer SDCC versions. Parentheses are
supported in SDCC 3.0.0 (released in 2010) and later.
[1] https://sdcc.sourceforge.net/doc/sdccman.pdf
Change-Id: I488628631f26b05c3f0ee80cda6da84b4aecfeaf
Signed-off-by: Marc Schink <de...@za...>
Reviewed-on: https://review.openocd.org/c/openocd/+/9775
Tested-by: jenkins
Reviewed-by: Adrien Charruel <adr...@gm...>
Reviewed-by: Antonio Borneo <bor...@gm...>
diff --git a/contrib/firmware/angie/c/src/main.c b/contrib/firmware/angie/c/src/main.c
index 657694b6c..8729b3ecb 100644
--- a/contrib/firmware/angie/c/src/main.c
+++ b/contrib/firmware/angie/c/src/main.c
@@ -16,7 +16,7 @@
#include "reg_ezusb.h"
#include <stdio.h>
-extern void sudav_isr(void)__interrupt SUDAV_ISR;
+extern void sudav_isr(void)__interrupt(SUDAV_ISR);
extern void sof_isr(void)__interrupt;
extern void sutok_isr(void)__interrupt;
extern void suspend_isr(void)__interrupt;
diff --git a/contrib/firmware/angie/c/src/usb.c b/contrib/firmware/angie/c/src/usb.c
index 6a07cc5d3..8a448d903 100644
--- a/contrib/firmware/angie/c/src/usb.c
+++ b/contrib/firmware/angie/c/src/usb.c
@@ -141,140 +141,140 @@ __code struct usb_string_descriptor *__code en_string_descriptors[3] = {
&strproduct,
&strserialnumber
};
-void sudav_isr(void)__interrupt SUDAV_ISR
+void sudav_isr(void)__interrupt(SUDAV_ISR)
{
EXIF &= ~0x10; /* Clear USBINT: Main global interrupt */
USBIRQ = SUDAVI;
EP0CS |= HSNAK;
usb_handle_setup_data();
}
-void sof_isr(void)__interrupt SOF_ISR
+void sof_isr(void)__interrupt(SOF_ISR)
{
}
-void sutok_isr(void)__interrupt SUTOK_ISR
+void sutok_isr(void)__interrupt(SUTOK_ISR)
{
}
-void suspend_isr(void)__interrupt SUSPEND_ISR
+void suspend_isr(void)__interrupt(SUSPEND_ISR)
{
}
-void usbreset_isr(void)__interrupt USBRESET_ISR
+void usbreset_isr(void)__interrupt(USBRESET_ISR)
{
}
-void highspeed_isr(void)__interrupt HIGHSPEED_ISR
+void highspeed_isr(void)__interrupt(HIGHSPEED_ISR)
{
}
-void ep0ack_isr(void)__interrupt EP0ACK_ISR
+void ep0ack_isr(void)__interrupt(EP0ACK_ISR)
{
}
-void stub_isr(void)__interrupt STUB_ISR
+void stub_isr(void)__interrupt(STUB_ISR)
{
}
-void ep0in_isr(void)__interrupt EP0IN_ISR
+void ep0in_isr(void)__interrupt(EP0IN_ISR)
{
}
-void ep0out_isr(void)__interrupt EP0OUT_ISR
+void ep0out_isr(void)__interrupt(EP0OUT_ISR)
{
}
-void ep1in_isr(void)__interrupt EP1IN_ISR
+void ep1in_isr(void)__interrupt(EP1IN_ISR)
{
}
-void ep1out_isr(void)__interrupt EP1OUT_ISR
+void ep1out_isr(void)__interrupt(EP1OUT_ISR)
{
}
-void ep2_isr(void)__interrupt EP2_ISR
+void ep2_isr(void)__interrupt(EP2_ISR)
{
}
-void ep4_isr(void)__interrupt EP4_ISR
+void ep4_isr(void)__interrupt(EP4_ISR)
{
}
-void ep6_isr(void)__interrupt EP6_ISR
+void ep6_isr(void)__interrupt(EP6_ISR)
{
REVCTL = 0; /* REVCTL.0 and REVCTL.1 set to 0 */
i2c_recieve(); /* Execute I2C communication */
EXIF &= ~0x10; /* Clear USBINT: Main global interrupt */
EPIRQ = 0x40; /* Clear individual EP6OUT IRQ */
}
-void ep8_isr(void)__interrupt EP8_ISR
+void ep8_isr(void)__interrupt(EP8_ISR)
{
EXIF &= ~0x10; /* Clear USBINT: Main global interrupt */
EPIRQ = 0x80; /* Clear individual EP8IN IRQ */
}
-void ibn_isr(void)__interrupt IBN_ISR
+void ibn_isr(void)__interrupt(IBN_ISR)
{
}
-void ep0pingnak_isr(void)__interrupt EP0PINGNAK_ISR
+void ep0pingnak_isr(void)__interrupt(EP0PINGNAK_ISR)
{
}
-void ep1pingnak_isr(void)__interrupt EP1PINGNAK_ISR
+void ep1pingnak_isr(void)__interrupt(EP1PINGNAK_ISR)
{
}
-void ep2pingnak_isr(void)__interrupt EP2PINGNAK_ISR
+void ep2pingnak_isr(void)__interrupt(EP2PINGNAK_ISR)
{
}
-void ep4pingnak_isr(void)__interrupt EP4PINGNAK_ISR
+void ep4pingnak_isr(void)__interrupt(EP4PINGNAK_ISR)
{
}
-void ep6pingnak_isr(void)__interrupt EP6PINGNAK_ISR
+void ep6pingnak_isr(void)__interrupt(EP6PINGNAK_ISR)
{
}
-void ep8pingnak_isr(void)__interrupt EP8PINGNAK_ISR
+void ep8pingnak_isr(void)__interrupt(EP8PINGNAK_ISR)
{
}
-void errorlimit_isr(void)__interrupt ERRORLIMIT_ISR
+void errorlimit_isr(void)__interrupt(ERRORLIMIT_ISR)
{
}
-void ep2piderror_isr(void)__interrupt EP2PIDERROR_ISR
+void ep2piderror_isr(void)__interrupt(EP2PIDERROR_ISR)
{
}
-void ep4piderror_isr(void)__interrupt EP4PIDERROR_ISR
+void ep4piderror_isr(void)__interrupt(EP4PIDERROR_ISR)
{
}
-void ep6piderror_isr(void)__interrupt EP6PIDERROR_ISR
+void ep6piderror_isr(void)__interrupt(EP6PIDERROR_ISR)
{
}
-void ep8piderror_isr(void)__interrupt EP8PIDERROR_ISR
+void ep8piderror_isr(void)__interrupt(EP8PIDERROR_ISR)
{
}
-void ep2pflag_isr(void)__interrupt EP2PFLAG_ISR
+void ep2pflag_isr(void)__interrupt(EP2PFLAG_ISR)
{
}
-void ep4pflag_isr(void)__interrupt EP4PFLAG_ISR
+void ep4pflag_isr(void)__interrupt(EP4PFLAG_ISR)
{
}
-void ep6pflag_isr(void)__interrupt EP6PFLAG_ISR
+void ep6pflag_isr(void)__interrupt(EP6PFLAG_ISR)
{
}
-void ep8pflag_isr(void)__interrupt EP8PFLAG_ISR
+void ep8pflag_isr(void)__interrupt(EP8PFLAG_ISR)
{
}
-void ep2eflag_isr(void)__interrupt EP2EFLAG_ISR
+void ep2eflag_isr(void)__interrupt(EP2EFLAG_ISR)
{
}
-void ep4eflag_isr(void)__interrupt EP4EFLAG_ISR
+void ep4eflag_isr(void)__interrupt(EP4EFLAG_ISR)
{
}
-void ep6eflag_isr(void)__interrupt EP6EFLAG_ISR
+void ep6eflag_isr(void)__interrupt(EP6EFLAG_ISR)
{
}
-void ep8eflag_isr(void)__interrupt EP8EFLAG_ISR
+void ep8eflag_isr(void)__interrupt(EP8EFLAG_ISR)
{
}
-void ep2fflag_isr(void)__interrupt EP2FFLAG_ISR
+void ep2fflag_isr(void)__interrupt(EP2FFLAG_ISR)
{
}
-void ep4fflag_isr(void)__interrupt EP4FFLAG_ISR
+void ep4fflag_isr(void)__interrupt(EP4FFLAG_ISR)
{
}
-void ep6fflag_isr(void)__interrupt EP6FFLAG_ISR
+void ep6fflag_isr(void)__interrupt(EP6FFLAG_ISR)
{
}
-void ep8fflag_isr(void)__interrupt EP8FFLAG_ISR
+void ep8fflag_isr(void)__interrupt(EP8FFLAG_ISR)
{
}
-void gpifcomplete_isr(void)__interrupt GPIFCOMPLETE_ISR
+void gpifcomplete_isr(void)__interrupt(GPIFCOMPLETE_ISR)
{
}
-void gpifwaveform_isr(void)__interrupt GPIFWAVEFORM_ISR
+void gpifwaveform_isr(void)__interrupt(GPIFWAVEFORM_ISR)
{
}
-----------------------------------------------------------------------
Summary of changes:
contrib/firmware/angie/c/Makefile | 4 +-
contrib/firmware/angie/c/include/usb.h | 2 +-
contrib/firmware/angie/c/src/main.c | 2 +-
contrib/firmware/angie/c/src/usb.c | 86 +++++++++++++++++-----------------
4 files changed, 48 insertions(+), 46 deletions(-)
hooks/post-receive
--
Main OpenOCD repository
|
|
From: openocd-gerrit <ope...@us...> - 2026-07-11 09:13:51
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".
The branch, master has been updated
via 02df329b8b8803fffefa5ee0261189e02c5a7d4e (commit)
from 7b70be04cc6a6fd7f1a1b1a8d7c521c09d7fb688 (commit)
Those revisions listed above that are new to this repository have
not appeared on any other notification email; so we list those
revisions in full, below.
- Log -----------------------------------------------------------------
commit 02df329b8b8803fffefa5ee0261189e02c5a7d4e
Author: Antonio Borneo <bor...@gm...>
Date: Mon Jul 6 16:17:28 2026 +0200
checkpatch: recognize the type FILE
Let checkpatch recognize the type FILE so it will not complain
that the "multiplication":
FILE *my_file;
requires space around the "multiplication operator".
Change-Id: If17d4739d05e552a38380f1d6dfe5c41eb959cfa
Signed-off-by: Antonio Borneo <bor...@gm...>
Reviewed-on: https://review.openocd.org/c/openocd/+/9770
Tested-by: jenkins
diff --git a/tools/scripts/typedefs.txt b/tools/scripts/typedefs.txt
index 97f330d9d..57da94056 100644
--- a/tools/scripts/typedefs.txt
+++ b/tools/scripts/typedefs.txt
@@ -1,6 +1,7 @@
# SPDX-License-Identifier: GPL-2.0-or-later
fd_set
+FILE
Jim_Cmd
Jim_CmdProc
Jim_DelCmdProc
-----------------------------------------------------------------------
Summary of changes:
tools/scripts/typedefs.txt | 1 +
1 file changed, 1 insertion(+)
hooks/post-receive
--
Main OpenOCD repository
|
|
From: openocd-gerrit <ope...@us...> - 2026-07-11 09:06:05
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".
The branch, master has been updated
via 7b70be04cc6a6fd7f1a1b1a8d7c521c09d7fb688 (commit)
from 065edc1e2e5ea3a4719bb2cdfb766d7d825fd6a9 (commit)
Those revisions listed above that are new to this repository have
not appeared on any other notification email; so we list those
revisions in full, below.
- Log -----------------------------------------------------------------
commit 7b70be04cc6a6fd7f1a1b1a8d7c521c09d7fb688
Author: HAOUES Ahmed <ahm...@st...>
Date: Fri May 8 11:54:05 2026 +0100
tcl/stm32wba6x: fix clock config used at 'reset init'
Use HSI 16 MHz
Change-Id: I298772f8e1e39cedc8cc11ed62db3515aaddab77
Signed-off-by: HAOUES Ahmed <ahm...@st...>
Reviewed-on: https://review.openocd.org/c/openocd/+/9615
Reviewed-by: Antonio Borneo <bor...@gm...>
Tested-by: jenkins
diff --git a/tcl/target/stm32wba6x.cfg b/tcl/target/stm32wba6x.cfg
index 470af0f27..4f29ca941 100644
--- a/tcl/target/stm32wba6x.cfg
+++ b/tcl/target/stm32wba6x.cfg
@@ -76,7 +76,7 @@ $_TARGETNAME configure -event reset-init {
# 1 WS compliant with VOS == 2 and 16 MHz.
mmw 0x40022000 0x00000001 0x0000000E ;# FLASH_ACR: Latency = 1
mmw 0x56020C00 0x00000100 0x00000000 ;# RCC_CR |= HSION
- mmw 0x56020C1C 0x00000000 0x00000002 ;# RCC_CFGR1: SW=HSI16
+ mmw 0x56020C1C 0x00000000 0x00000003 ;# RCC_CFGR1: SW=HSI16
# Boost JTAG frequency
adapter speed 4000
}
-----------------------------------------------------------------------
Summary of changes:
tcl/target/stm32wba6x.cfg | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
hooks/post-receive
--
Main OpenOCD repository
|
|
From: openocd-gerrit <ope...@us...> - 2026-07-11 09:05:28
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".
The branch, master has been updated
via 065edc1e2e5ea3a4719bb2cdfb766d7d825fd6a9 (commit)
via 3a16d2a9b7b451bee1f1fc7adf8f1da97f4ac666 (commit)
from 2ae1981ab5077c30ad617c35cfaacb63e048ba30 (commit)
Those revisions listed above that are new to this repository have
not appeared on any other notification email; so we list those
revisions in full, below.
- Log -----------------------------------------------------------------
commit 065edc1e2e5ea3a4719bb2cdfb766d7d825fd6a9
Author: HAOUES Ahmed <ahm...@st...>
Date: Wed May 6 17:04:51 2026 +0100
tcl/stm32wba5x: fix clock config used at 'reset init'
Use HSI 16 MHz
Change-Id: Ie23043274de1c6aae90763ba6e5ff5b6dd0410d2
Signed-off-by: HAOUES Ahmed <ahm...@st...>
Reviewed-on: https://review.openocd.org/c/openocd/+/9614
Reviewed-by: Antonio Borneo <bor...@gm...>
Tested-by: jenkins
diff --git a/tcl/target/stm32wba5x.cfg b/tcl/target/stm32wba5x.cfg
index 704174db4..9eadd2403 100644
--- a/tcl/target/stm32wba5x.cfg
+++ b/tcl/target/stm32wba5x.cfg
@@ -76,7 +76,7 @@ $_TARGETNAME configure -event reset-init {
# 1 WS compliant with VOS == 2 and 16 MHz.
mmw 0x40022000 0x00000001 0x0000000E ;# FLASH_ACR: Latency = 1
mmw 0x56020C00 0x00000100 0x00000000 ;# RCC_CR |= HSION
- mmw 0x56020C1C 0x00000000 0x00000002 ;# RCC_CFGR1: SW=HSI16
+ mmw 0x56020C1C 0x00000000 0x00000003 ;# RCC_CFGR1: SW=HSI16
# Boost JTAG frequency
adapter speed 4000
}
commit 3a16d2a9b7b451bee1f1fc7adf8f1da97f4ac666
Author: HAOUES Ahmed <ahm...@st...>
Date: Tue Jul 15 11:12:06 2025 +0100
flash/stm32l4x: Support STM32WBA2x devices
This device is similar to STM32WBA5x devices but with flash size
equal to 512Kb and with default programming word size (double-word)
Change-Id: I3c4023f58df7de980ccbd56c71f9c41d380a208f
Signed-off-by: HAOUES Ahmed <ahm...@st...>
Reviewed-on: https://review.openocd.org/c/openocd/+/9613
Tested-by: jenkins
Reviewed-by: Antonio Borneo <bor...@gm...>
diff --git a/src/flash/nor/stm32l4x.c b/src/flash/nor/stm32l4x.c
index 20d7842ee..34676659b 100644
--- a/src/flash/nor/stm32l4x.c
+++ b/src/flash/nor/stm32l4x.c
@@ -408,6 +408,10 @@ static const struct stm32l4_rev stm32wba6x_revs[] = {
{ 0x1000, "A" }, { 0x1001, "Z" },
};
+static const struct stm32l4_rev stm32wba2x_revs[] = {
+ { 0x1000, "A" },
+};
+
static const struct stm32l4_rev stm32wb1xx_revs[] = {
{ 0x1000, "A" }, { 0x2000, "B" },
};
@@ -791,6 +795,18 @@ static const struct stm32l4_part_info stm32l4_parts[] = {
.otp_base = 0x0BFA0000,
.otp_size = 512,
},
+ {
+ .id = DEVID_STM32WBA2X,
+ .revs = stm32wba2x_revs,
+ .num_revs = ARRAY_SIZE(stm32wba2x_revs),
+ .device_str = "STM32WBA2x",
+ .max_flash_size_kb = 512,
+ .flags = F_HAS_TZ | F_HAS_L5_FLASH_REGS | F_WRP_HAS_LOCK,
+ .flash_regs_base = 0x40022000,
+ .fsize_addr = 0x0BF8D7A0,
+ .otp_base = 0x0BF8D000,
+ .otp_size = 512,
+ },
{
.id = DEVID_STM32WB1XX,
.revs = stm32wb1xx_revs,
@@ -2262,6 +2278,7 @@ static int stm32l4_probe(struct flash_bank *bank)
break;
case DEVID_STM32WB5XX:
case DEVID_STM32WB3XX:
+ case DEVID_STM32WBA2X:
/* single bank flash */
page_size_kb = 4;
num_pages = flash_size_kb / page_size_kb;
diff --git a/src/flash/nor/stm32l4x.h b/src/flash/nor/stm32l4x.h
index 990504336..7ee62d663 100644
--- a/src/flash/nor/stm32l4x.h
+++ b/src/flash/nor/stm32l4x.h
@@ -121,7 +121,8 @@
#define DEVID_STM32WB5XX 0x495
#define DEVID_STM32WB3XX 0x496
#define DEVID_STM32WLE_WL5XX 0x497
-#define DEVID_STM32WBA6X 0x4B0
+#define DEVID_STM32WBA6X 0x4B0
+#define DEVID_STM32WBA2X 0x4B2
/* known Flash base addresses */
#define STM32_FLASH_BANK_BASE 0x08000000
diff --git a/tcl/target/stm32wba2x.cfg b/tcl/target/stm32wba2x.cfg
new file mode 100644
index 000000000..88349bafb
--- /dev/null
+++ b/tcl/target/stm32wba2x.cfg
@@ -0,0 +1,106 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
+# script for stm32wba2x family
+
+#
+# stm32wba2x devices support both JTAG and SWD transports.
+#
+source [find target/swj-dp.tcl]
+source [find mem_helper.tcl]
+
+if { [info exists CHIPNAME] } {
+ set _CHIPNAME $CHIPNAME
+} else {
+ set _CHIPNAME stm32wba2x
+}
+
+# Work-area is a space in RAM used for flash programming
+# By default use 64kB
+if { [info exists WORKAREASIZE] } {
+ set _WORKAREASIZE $WORKAREASIZE
+} else {
+ set _WORKAREASIZE 0x10000
+}
+
+# jtag scan chain
+if { [info exists CPUTAPID] } {
+ set _CPUTAPID $CPUTAPID
+} else {
+ if { [using_jtag] } {
+ set _CPUTAPID 0x0be11477
+ } else {
+ # SWD IDCODE (single drop, arm)
+ set _CPUTAPID 0x0be12477
+ }
+}
+
+swj_newdap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
+dap create $_CHIPNAME.dap -chain-position $_CHIPNAME.cpu
+
+if {[using_jtag]} {
+ jtag newtap $_CHIPNAME bs -irlen 5
+}
+
+set _TARGETNAME $_CHIPNAME.cpu
+target create $_TARGETNAME cortex_m -endian little -dap $_CHIPNAME.dap -ap-num 1
+
+$_TARGETNAME configure -work-area-phys 0x20000000 -work-area-size $_WORKAREASIZE -work-area-backup 0
+
+flash bank $_CHIPNAME.flash stm32l4x 0x08000000 0 0 0 $_TARGETNAME
+flash bank $_CHIPNAME.otp stm32l4x 0x0bf8d000 0 0 0 $_TARGETNAME
+
+# Common knowledges tells JTAG speed should be <= F_CPU/6.
+# F_CPU after reset is MSI 4MHz, so use F_JTAG = 500 kHz to stay on
+# the safe side.
+#
+# Note that there is a pretty wide band where things are
+# more or less stable, see http://openocd.zylin.com/#/c/3366/
+adapter speed 500
+
+adapter srst delay 100
+if {[using_jtag]} {
+ jtag_ntrst_delay 100
+}
+
+reset_config srst_nogate
+
+if {![using_hla]} {
+ # if srst is not fitted use SYSRESETREQ to
+ # perform a soft reset
+ cortex_m reset_config sysresetreq
+}
+
+$_TARGETNAME configure -event reset-init {
+ # CPU comes out of reset with HSION | HSIRDY.
+ # Use HSI 16 MHz clock, compliant even with VOS == 2.
+ # 1 WS compliant with VOS == 2 and 16 MHz.
+ mmw 0x40022000 0x00000001 0x0000000E ;# FLASH_ACR: Latency = 1
+ mmw 0x46020C00 0x00000100 0x00000000 ;# RCC_CR |= HSION
+ mmw 0x46020C1C 0x00000000 0x00000003 ;# RCC_CFGR1: SW=HSI16
+ # Boost JTAG frequency
+ adapter speed 4000
+}
+
+$_TARGETNAME configure -event reset-start {
+ # Reset clock is HSI (16 MHz)
+ adapter speed 2000
+}
+
+$_TARGETNAME configure -event examine-end {
+ # Enable debug during low power modes (uses more power)
+ # DBGMCU_SCR |= DBG_STANDBY | DBG_STOP | DBG_SLEEP
+ mmw 0xE0044004 0x00000007 0
+
+ # Stop watchdog counters during halt
+ # DBGMCU_APB1LFZR |= DBG_IWDG_STOP
+ mmw 0xE0044008 0x00001000 0
+}
+
+tpiu create $_CHIPNAME.tpiu -dap $_CHIPNAME.dap -ap-num 0 -baseaddr 0xE0040000
+
+lappend _telnet_autocomplete_skip _proc_pre_enable_$_CHIPNAME.tpiu
+proc _proc_pre_enable_$_CHIPNAME.tpiu {_targetname} {
+ targets $_targetname
+}
+
+$_CHIPNAME.tpiu configure -event pre-enable "_proc_pre_enable_$_CHIPNAME.tpiu $_TARGETNAME"
-----------------------------------------------------------------------
Summary of changes:
src/flash/nor/stm32l4x.c | 17 +++++++++++++++++
src/flash/nor/stm32l4x.h | 3 ++-
tcl/target/{stm32wba5x.cfg => stm32wba2x.cfg} | 24 ++++++++++++------------
tcl/target/stm32wba5x.cfg | 2 +-
4 files changed, 32 insertions(+), 14 deletions(-)
copy tcl/target/{stm32wba5x.cfg => stm32wba2x.cfg} (82%)
hooks/post-receive
--
Main OpenOCD repository
|
|
From: openocd-gerrit <ope...@us...> - 2026-07-11 09:05:06
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".
The branch, master has been updated
via 2ae1981ab5077c30ad617c35cfaacb63e048ba30 (commit)
via 73b102deabf0f04220d1c2b46c81c36b9a995b64 (commit)
from eff5f00e518438fdb767fd3edc0b9be1fda8723d (commit)
Those revisions listed above that are new to this repository have
not appeared on any other notification email; so we list those
revisions in full, below.
- Log -----------------------------------------------------------------
commit 2ae1981ab5077c30ad617c35cfaacb63e048ba30
Author: HAOUES Ahmed <ahm...@st...>
Date: Wed May 6 09:34:43 2026 +0100
flash/stm32l4x: Reorder DBGMCU_IDCODE registers
To avoid read errors on some targets (for example STM32WBA5 and STM32WBA6),
read the possible IDCODE registers in the specified order.
Change-Id: I0ae4290dbf5899f03accaf81fa90eb165b5745e6
Signed-off-by: HAOUES Ahmed <ahm...@st...>
Reviewed-on: https://review.openocd.org/c/openocd/+/9612
Tested-by: jenkins
Reviewed-by: Tomas Vanek <va...@fb...>
diff --git a/src/flash/nor/stm32l4x.c b/src/flash/nor/stm32l4x.c
index d46bfbeb5..20d7842ee 100644
--- a/src/flash/nor/stm32l4x.c
+++ b/src/flash/nor/stm32l4x.c
@@ -1884,7 +1884,7 @@ static int stm32l4_read_idcode(struct flash_bank *bank, uint32_t *id)
struct target *target = bank->target;
/* try reading possible IDCODE registers, in the following order */
- uint32_t dbgmcu_idcode[] = {DBGMCU_IDCODE_L4_G4, DBGMCU_IDCODE_G0, DBGMCU_IDCODE_L5};
+ uint32_t dbgmcu_idcode[] = {DBGMCU_IDCODE_L4_G4, DBGMCU_IDCODE_L5, DBGMCU_IDCODE_G0};
for (unsigned int i = 0; i < ARRAY_SIZE(dbgmcu_idcode); i++) {
retval = target_read_u32(target, dbgmcu_idcode[i], id);
commit 73b102deabf0f04220d1c2b46c81c36b9a995b64
Author: HAOUES Ahmed <ahm...@st...>
Date: Thu Jul 17 09:12:41 2025 +0100
flash/bluenrg-x: support SPIRIT3R
The SPIRIT3R is similar to the SPIRIT3, with 16KB of SRAM
Change-Id: Id74104265b3f438f2c2e604e3c773edf657e13b9
Signed-off-by: HAOUES Ahmed <ahm...@st...>
Reviewed-on: https://review.openocd.org/c/openocd/+/9531
Tested-by: jenkins
Reviewed-by: Antonio Borneo <bor...@gm...>
diff --git a/src/flash/nor/bluenrg-x.c b/src/flash/nor/bluenrg-x.c
index 651daa98d..7bc8ce35c 100644
--- a/src/flash/nor/bluenrg-x.c
+++ b/src/flash/nor/bluenrg-x.c
@@ -95,7 +95,7 @@ static const struct flash_ctrl_priv_data flash_priv_data_spirit3 = {
.flash_regs_base = 0x40001000,
.flash_page_size = 2048,
.jtag_idcode = 0x02027041,
- .part_name = "STM32WL33 (SPIRIT3)",
+ .part_name = "STM32WL33/WL3R (SPIRIT3/3R)",
};
struct bluenrgx_flash_bank {
diff --git a/tcl/target/bluenrg-x.cfg b/tcl/target/bluenrg-x.cfg
index afa1b513b..ad6f1c43f 100644
--- a/tcl/target/bluenrg-x.cfg
+++ b/tcl/target/bluenrg-x.cfg
@@ -20,7 +20,7 @@ set _ENDIAN little
if { [info exists WORKAREASIZE] } {
set _WORKAREASIZE $WORKAREASIZE
} else {
- set _WORKAREASIZE 0x5F00
+ set _WORKAREASIZE 0x3C00
}
adapter speed 4000
-----------------------------------------------------------------------
Summary of changes:
src/flash/nor/bluenrg-x.c | 2 +-
src/flash/nor/stm32l4x.c | 2 +-
tcl/target/bluenrg-x.cfg | 2 +-
3 files changed, 3 insertions(+), 3 deletions(-)
hooks/post-receive
--
Main OpenOCD repository
|
|
From: openocd-gerrit <ope...@us...> - 2026-07-11 09:04:51
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".
The branch, master has been updated
via eff5f00e518438fdb767fd3edc0b9be1fda8723d (commit)
from 16b9eae804f394e72a1ba6eccba9bcb461a0230a (commit)
Those revisions listed above that are new to this repository have
not appeared on any other notification email; so we list those
revisions in full, below.
- Log -----------------------------------------------------------------
commit eff5f00e518438fdb767fd3edc0b9be1fda8723d
Author: HAOUES Ahmed <ahm...@st...>
Date: Thu Jul 17 09:00:26 2025 +0100
flash/bluenrg-x: fix working area buffer size calculation
Adjust buffer_size to use available working area minus 128 bytes
reserved for write_algorithm_stack and 8 bytes reserved for read
and write pointers.
Ensure buffer_size is aligned to FLASH_DATA_WIDTH boundary.
Add checks to handle insufficient working area (<256 bytes) with
a warning and resource cleanup.
Cap buffer_size at 16384 + 8 bytes to avoid diminishing returns on
larger buffers.
Change-Id: I428a5de1bb6b1c3af0cba41e9a50278c45a1c54c
Signed-off-by: HAOUES Ahmed <ahm...@st...>
Reviewed-on: https://review.openocd.org/c/openocd/+/9530
Reviewed-by: Tomas Vanek <va...@fb...>
Tested-by: jenkins
Reviewed-by: Antonio Borneo <bor...@gm...>
diff --git a/src/flash/nor/bluenrg-x.c b/src/flash/nor/bluenrg-x.c
index caf659eff..651daa98d 100644
--- a/src/flash/nor/bluenrg-x.c
+++ b/src/flash/nor/bluenrg-x.c
@@ -11,6 +11,7 @@
#include <helper/binarybuffer.h>
#include "helper/types.h"
+#include "helper/align.h"
#include <target/algorithm.h>
#include <target/armv7m.h>
#include <target/cortex_m.h>
@@ -273,7 +274,7 @@ static int bluenrgx_write_with_loader(struct flash_bank *bank, const uint8_t *bu
{
struct bluenrgx_flash_bank *bluenrgx_info = bank->driver_priv;
struct target *target = bank->target;
- uint32_t buffer_size = 16384 + 8;
+ uint32_t max_buffer_size = 16384 + 8;
struct working_area *write_algorithm;
struct working_area *write_algorithm_stack;
struct working_area *source;
@@ -302,6 +303,23 @@ static int bluenrgx_write_with_loader(struct flash_bank *bank, const uint8_t *bu
if (retval != ERROR_OK)
return retval;
+ /* Compute usable buffer size by excluding 128 bytes for write_algorithm_stack
+ * and 8 bytes for read and write pointers.
+ */
+ uint32_t buffer_size = target_get_working_area_avail(target) - 128 - 8;
+ /* buffer size should be multiple of FLASH_DATA_WIDTH*/
+ buffer_size = ALIGN_DOWN(buffer_size, FLASH_DATA_WIDTH);
+ buffer_size += 8;
+
+ if (buffer_size < 256) {
+ LOG_WARNING("large enough working area not available, can't do block memory writes");
+ target_free_working_area(target, write_algorithm);
+ return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
+ } else if (buffer_size > max_buffer_size) {
+ /* probably won't benefit from more than 16k ... */
+ buffer_size = max_buffer_size;
+ }
+
/* memory buffer */
if (target_alloc_working_area(target, buffer_size, &source)) {
LOG_WARNING("no large enough working area available");
-----------------------------------------------------------------------
Summary of changes:
src/flash/nor/bluenrg-x.c | 20 +++++++++++++++++++-
1 file changed, 19 insertions(+), 1 deletion(-)
hooks/post-receive
--
Main OpenOCD repository
|
|
From: openocd-gerrit <ope...@us...> - 2026-07-08 18:55:12
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".
The branch, master has been updated
via 16b9eae804f394e72a1ba6eccba9bcb461a0230a (commit)
from 2ed9f231a47300c39c2573f3a98266aceebc7dd0 (commit)
Those revisions listed above that are new to this repository have
not appeared on any other notification email; so we list those
revisions in full, below.
- Log -----------------------------------------------------------------
commit 16b9eae804f394e72a1ba6eccba9bcb461a0230a
Author: Tomas Vanek <va...@fb...>
Date: Wed Jul 9 09:38:37 2025 +0200
tcl/target/stm32u3x: fix voltage scale before flashing from gdb
The config files of Cortex-M33 based devices (L5, U5, U3) intentionally
dropped 'reset init' from the 'gdb-flash-erase-start' event to allow
programming of unsecure part of flash in 0.5 RDP level.
STM32U3 needs to set voltage range 1 before flash programming,
which was issued in the 'reset-init' event only before this patch.
If the application ran in voltage range 2 and gdb command 'load'
was issued, the flash operation failed due to voltage range 2.
Refactor 'gdb-flash-erase-start' event to use Tcl proc
'stm32x5x_gdb_flash_erase_start'
Add voltage range 1 setting (call 'config_voltage_range') to
'gdb-flash-erase-start' event of STM32U3
Change-Id: Ie910fef11d6737e34158cbb616721a1add72acd1
Signed-off-by: Tomas Vanek <va...@fb...>
Reviewed-on: https://review.openocd.org/c/openocd/+/9062
Reviewed-by: Ahmed Haoues <ahm...@st...>
Tested-by: jenkins
diff --git a/tcl/target/stm32u3x.cfg b/tcl/target/stm32u3x.cfg
index 449c04217..47c68935e 100644
--- a/tcl/target/stm32u3x.cfg
+++ b/tcl/target/stm32u3x.cfg
@@ -43,3 +43,8 @@ proc config_voltage_range {} {
$_TARGETNAME configure -event reset-init {
config_voltage_range
}
+
+$_TARGETNAME configure -event gdb-flash-erase-start {
+ stm32x5x_gdb_flash_erase_start
+ config_voltage_range
+}
diff --git a/tcl/target/stm32x5x_common.cfg b/tcl/target/stm32x5x_common.cfg
index b6370e493..61ef35d6d 100644
--- a/tcl/target/stm32x5x_common.cfg
+++ b/tcl/target/stm32x5x_common.cfg
@@ -88,6 +88,38 @@ proc stm32x5x_ahb_ap_secure_access {} {
}
}
+proc stm32x5x_gdb_flash_erase_start {} {
+ set use_secure_workarea 0
+ # check if FLASH_OPTR.TZEN is enabled
+ set FLASH_OPTR [mrw 0x40022040]
+ if {[expr {$FLASH_OPTR & 0x80000000}] == 0} {
+ echo "TZEN option bit disabled"
+ stm32x5x_ahb_ap_non_secure_access
+ } else {
+ stm32x5x_ahb_ap_secure_access
+ echo "TZEN option bit enabled"
+
+ # check if FLASH_OPTR.RDP is not Level 0.5
+ if {[expr {$FLASH_OPTR & 0xFF}] != 0x55} {
+ set use_secure_workarea 1
+ }
+ }
+
+ set _TARGETNAME [target current]
+ set workarea_addr [$_TARGETNAME cget -work-area-phys]
+ echo "workarea_addr $workarea_addr"
+
+ if {$use_secure_workarea} {
+ set workarea_addr [expr {$workarea_addr | 0x10000000}]
+ } else {
+ set workarea_addr [expr {$workarea_addr & ~0x10000000}]
+ }
+
+ $_TARGETNAME configure -work-area-phys $workarea_addr
+}
+
+$_TARGETNAME configure -event gdb-flash-erase-start stm32x5x_gdb_flash_erase_start
+
$_TARGETNAME configure -event reset-start {
# Reset clock is MSI (4 MHz)
adapter speed 480
@@ -124,36 +156,6 @@ $_TARGETNAME configure -event halted {
}
}
-$_TARGETNAME configure -event gdb-flash-erase-start {
- set use_secure_workarea 0
- # check if FLASH_OPTR.TZEN is enabled
- set FLASH_OPTR [mrw 0x40022040]
- if {[expr {$FLASH_OPTR & 0x80000000}] == 0} {
- echo "TZEN option bit disabled"
- stm32x5x_ahb_ap_non_secure_access
- } else {
- stm32x5x_ahb_ap_secure_access
- echo "TZEN option bit enabled"
-
- # check if FLASH_OPTR.RDP is not Level 0.5
- if {[expr {$FLASH_OPTR & 0xFF}] != 0x55} {
- set use_secure_workarea 1
- }
- }
-
- set _TARGETNAME [target current]
- set workarea_addr [$_TARGETNAME cget -work-area-phys]
- echo "workarea_addr $workarea_addr"
-
- if {$use_secure_workarea} {
- set workarea_addr [expr {$workarea_addr | 0x10000000}]
- } else {
- set workarea_addr [expr {$workarea_addr & ~0x10000000}]
- }
-
- $_TARGETNAME configure -work-area-phys $workarea_addr
-}
-
tpiu create $_CHIPNAME.tpiu -dap $_CHIPNAME.dap -ap-num 0 -baseaddr 0xE0040000
lappend _telnet_autocomplete_skip _proc_pre_enable_$_CHIPNAME.tpiu
-----------------------------------------------------------------------
Summary of changes:
tcl/target/stm32u3x.cfg | 5 ++++
tcl/target/stm32x5x_common.cfg | 62 ++++++++++++++++++++++--------------------
2 files changed, 37 insertions(+), 30 deletions(-)
hooks/post-receive
--
Main OpenOCD repository
|
|
From: openocd-gerrit <ope...@us...> - 2026-07-07 17:01:43
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".
The branch, master has been updated
via 2ed9f231a47300c39c2573f3a98266aceebc7dd0 (commit)
from 472edee1297e65dfc24a171358fe836e4de41c7d (commit)
Those revisions listed above that are new to this repository have
not appeared on any other notification email; so we list those
revisions in full, below.
- Log -----------------------------------------------------------------
commit 2ed9f231a47300c39c2573f3a98266aceebc7dd0
Author: Tomas Vanek <va...@fb...>
Date: Sat Nov 29 09:37:58 2025 +0100
gdb_server: preserve gdb monitor command output from Tcl events
target_call_timer_callbacks_now() in gdb_query_packet() may result
in Tcl event execution. The event output replaces the desired command
output.
Call target_call_timer_callbacks_now() as late as Tcl return message
of monitor command is gathered.
Change-Id: Id1c2304fc9b218ceade02e9ae8eff5bd814baa38
Signed-off-by: Tomas Vanek <va...@fb...>
Reviewed-on: https://review.openocd.org/c/openocd/+/9272
Tested-by: jenkins
Reviewed-by: zapb <de...@za...>
diff --git a/src/server/gdb_server.c b/src/server/gdb_server.c
index 6c28a715d..7c8bfee8e 100644
--- a/src/server/gdb_server.c
+++ b/src/server/gdb_server.c
@@ -2850,7 +2850,6 @@ static int gdb_query_packet(struct connection *connection,
cmd_ctx->current_target_override = saved_target_override;
current_gdb_connection = NULL;
- target_call_timer_callbacks_now();
gdb_connection->output_flag = GDB_OUTPUT_NO;
free(cmd);
if (retval == JIM_RETURN)
@@ -2864,6 +2863,9 @@ static int gdb_query_packet(struct connection *connection,
} else {
retmsg = strdup(cretmsg);
}
+
+ target_call_timer_callbacks_now();
+
if (!retmsg)
return ERROR_GDB_BUFFER_TOO_SMALL;
-----------------------------------------------------------------------
Summary of changes:
src/server/gdb_server.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
hooks/post-receive
--
Main OpenOCD repository
|
|
From: openocd-gerrit <ope...@us...> - 2026-07-04 17:57:03
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".
The branch, master has been updated
via 472edee1297e65dfc24a171358fe836e4de41c7d (commit)
from bbb9f4ffe7d6bc1cd27ea919c141927e45c4d26b (commit)
Those revisions listed above that are new to this repository have
not appeared on any other notification email; so we list those
revisions in full, below.
- Log -----------------------------------------------------------------
commit 472edee1297e65dfc24a171358fe836e4de41c7d
Author: Mark O'Donovan <sh...@po...>
Date: Wed Jun 24 23:04:38 2026 +0100
tcl/target: Add max32655.cfg
Config file added and tested on MAX32655FTHR EV kit
Change-Id: I373b79b6184f8b5c90f266cc693643cf2752bd45
Signed-off-by: Mark O'Donovan <sh...@po...>
Reviewed-on: https://review.openocd.org/c/openocd/+/9756
Reviewed-by: Henrik Mau <hen...@an...>
Reviewed-by: Antonio Borneo <bor...@gm...>
Tested-by: jenkins
diff --git a/tcl/target/max32655.cfg b/tcl/target/max32655.cfg
new file mode 100644
index 000000000..4151fe19d
--- /dev/null
+++ b/tcl/target/max32655.cfg
@@ -0,0 +1,20 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+# Maxim Integrated MAX32655 - Arm Cortex-M4F @ 100MHz
+
+# Set flash parameters
+set FLASH_BASE 0x10000000
+set FLASH_SIZE 0x80000
+set FLC_BASE 0x40029000
+set FLASH_SECTOR 0x2000
+set FLASH_CLK 100
+set FLASH_OPTIONS 0x01
+
+# Use Serial Wire Debug
+transport select swd
+
+source [find target/max32xxx_common.cfg]
+
+if {![using_hla]} {
+ # The chip supports standard ARM/Cortex-M4 SYSRESETREQ signal
+ cortex_m reset_config sysresetreq
+}
-----------------------------------------------------------------------
Summary of changes:
tcl/target/{max32650.cfg => max32655.cfg} | 7 ++++---
1 file changed, 4 insertions(+), 3 deletions(-)
copy tcl/target/{max32650.cfg => max32655.cfg} (75%)
hooks/post-receive
--
Main OpenOCD repository
|
|
From: openocd-gerrit <ope...@us...> - 2026-07-04 17:56:20
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".
The branch, master has been updated
via bbb9f4ffe7d6bc1cd27ea919c141927e45c4d26b (commit)
from 4ee667c15de2f9ba13a8f738c12ecf2a894b921c (commit)
Those revisions listed above that are new to this repository have
not appeared on any other notification email; so we list those
revisions in full, below.
- Log -----------------------------------------------------------------
commit bbb9f4ffe7d6bc1cd27ea919c141927e45c4d26b
Author: Samuel Obuch <sam...@es...>
Date: Wed Jun 24 17:23:49 2026 +0200
target/espressif: add insn_set functions
Adds default instruction set so that users do not have to select
one manually when using the 'disassemble' command.
Change-Id: Ic100fa82588cd567d3531502eceb88a3231df266
Signed-off-by: Samuel Obuch <sam...@es...>
Reviewed-on: https://review.openocd.org/c/openocd/+/9758
Tested-by: jenkins
Reviewed-by: Antonio Borneo <bor...@gm...>
diff --git a/src/target/espressif/esp32.c b/src/target/espressif/esp32.c
index 4ea1c8a33..fd6565d6b 100644
--- a/src/target/espressif/esp32.c
+++ b/src/target/espressif/esp32.c
@@ -457,6 +457,13 @@ static const struct command_registration esp32_command_handlers[] = {
COMMAND_REGISTRATION_DONE
};
+static int esp32_insn_set(struct command_invocation *cmd,
+ struct target *target, const char **insn_set)
+{
+ *insn_set = "xtensa";
+ return ERROR_OK;
+}
+
/** Holds methods for Xtensa targets. */
struct target_type esp32_target = {
.name = "esp32",
@@ -502,4 +509,5 @@ struct target_type esp32_target = {
.commands = esp32_command_handlers,
.profiling = esp_xtensa_profiling,
+ .insn_set = esp32_insn_set,
};
diff --git a/src/target/espressif/esp32s2.c b/src/target/espressif/esp32s2.c
index eb3ad71f2..4a5bcb047 100644
--- a/src/target/espressif/esp32s2.c
+++ b/src/target/espressif/esp32s2.c
@@ -494,6 +494,13 @@ static const struct command_registration esp32s2_command_handlers[] = {
COMMAND_REGISTRATION_DONE
};
+static int esp32s2_insn_set(struct command_invocation *cmd,
+ struct target *target, const char **insn_set)
+{
+ *insn_set = "xtensa_s2";
+ return ERROR_OK;
+}
+
/* Holds methods for Xtensa targets. */
struct target_type esp32s2_target = {
.name = "esp32s2",
@@ -539,4 +546,5 @@ struct target_type esp32s2_target = {
.commands = esp32s2_command_handlers,
.profiling = esp_xtensa_profiling,
+ .insn_set = esp32s2_insn_set,
};
diff --git a/src/target/espressif/esp32s3.c b/src/target/espressif/esp32s3.c
index 14f7a7bb6..a8e3fff68 100644
--- a/src/target/espressif/esp32s3.c
+++ b/src/target/espressif/esp32s3.c
@@ -378,6 +378,13 @@ static const struct command_registration esp32s3_command_handlers[] = {
COMMAND_REGISTRATION_DONE
};
+static int esp32s3_insn_set(struct command_invocation *cmd,
+ struct target *target, const char **insn_set)
+{
+ *insn_set = "xtensa_s2";
+ return ERROR_OK;
+}
+
/** Holds methods for Xtensa targets. */
struct target_type esp32s3_target = {
.name = "esp32s3",
@@ -423,4 +430,5 @@ struct target_type esp32s3_target = {
.commands = esp32s3_command_handlers,
.profiling = esp_xtensa_profiling,
+ .insn_set = esp32s3_insn_set,
};
-----------------------------------------------------------------------
Summary of changes:
src/target/espressif/esp32.c | 8 ++++++++
src/target/espressif/esp32s2.c | 8 ++++++++
src/target/espressif/esp32s3.c | 8 ++++++++
3 files changed, 24 insertions(+)
hooks/post-receive
--
Main OpenOCD repository
|
|
From: openocd-gerrit <ope...@us...> - 2026-07-04 17:53:48
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".
The branch, master has been updated
via 4ee667c15de2f9ba13a8f738c12ecf2a894b921c (commit)
from fa01258d99d8b72a5eec2903b0240eeec0ceb82c (commit)
Those revisions listed above that are new to this repository have
not appeared on any other notification email; so we list those
revisions in full, below.
- Log -----------------------------------------------------------------
commit 4ee667c15de2f9ba13a8f738c12ecf2a894b921c
Author: Lazar Aleksic <kri...@pr...>
Date: Tue Jun 23 01:04:31 2026 +0200
target/oocd_capstone: add Xtensa and ARC support for capstone v6
Capstone v6 adds support for Xtensa and ARC architectures. Add
entries to the all_archs[] table under the CS_API_MAJOR >= 6 block
so they are available when building against capstone v6.
Xtensa entries cover ESP32, ESP32-S2, and ESP8266 variants.
ARC uses little-endian mode as default.
Change-Id: I631070ffde337b4113af59050183a6210639764e
Signed-off-by: Lazar Aleksic <kri...@pr...>
Reviewed-on: https://review.openocd.org/c/openocd/+/9751
Tested-by: jenkins
Reviewed-by: Samuel Obuch <sam...@es...>
Reviewed-by: Antonio Borneo <bor...@gm...>
diff --git a/src/target/oocd_capstone.c b/src/target/oocd_capstone.c
index b2175565e..8135fc77f 100644
--- a/src/target/oocd_capstone.c
+++ b/src/target/oocd_capstone.c
@@ -46,6 +46,10 @@ static struct {
{ "arm64be", CS_ARCH_AARCH64, CS_MODE_BIG_ENDIAN },
{ "riscv32", CS_ARCH_RISCV, CS_MODE_RISCV32 | CS_MODE_RISCV_C },
{ "riscv64", CS_ARCH_RISCV, CS_MODE_RISCV64 | CS_MODE_RISCV_C },
+ { "xtensa", CS_ARCH_XTENSA, CS_MODE_XTENSA_ESP32 },
+ { "xtensa_s2", CS_ARCH_XTENSA, CS_MODE_XTENSA_ESP32S2 },
+ { "xtensa_8266", CS_ARCH_XTENSA, CS_MODE_XTENSA_ESP8266 },
+ { "arc", CS_ARCH_ARC, CS_MODE_LITTLE_ENDIAN },
#endif /* CS_API_MAJOR >= 6 */
};
-----------------------------------------------------------------------
Summary of changes:
src/target/oocd_capstone.c | 4 ++++
1 file changed, 4 insertions(+)
hooks/post-receive
--
Main OpenOCD repository
|
|
From: openocd-gerrit <ope...@us...> - 2026-07-04 17:53:27
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".
The branch, master has been updated
via fa01258d99d8b72a5eec2903b0240eeec0ceb82c (commit)
from c9fe186e14cf762240c195ad4b1f6098f4e7f595 (commit)
Those revisions listed above that are new to this repository have
not appeared on any other notification email; so we list those
revisions in full, below.
- Log -----------------------------------------------------------------
commit fa01258d99d8b72a5eec2903b0240eeec0ceb82c
Author: Lazar Aleksic <kri...@pr...>
Date: Tue Jun 23 01:04:14 2026 +0200
target/oocd_capstone: fix RISC-V mode and ARM64 rename for capstone v6
CS_MODE_RISCVC was renamed to CS_MODE_RISCV_C and CS_ARCH_ARM64
was renamed to CS_ARCH_AARCH64 in capstone v6 with no backward
compat #define.
Use version-separated #if blocks in the all_archs[] table.
CS_API_MAJOR < 6 keeps the old names, CS_API_MAJOR >= 6 uses
the new names directly.
Change-Id: I1fc343c7f4f40ab0b9902b72fa8f010e1a15d2e3
Signed-off-by: Lazar Aleksic <kri...@pr...>
Reviewed-on: https://review.openocd.org/c/openocd/+/9750
Reviewed-by: Samuel Obuch <sam...@es...>
Reviewed-by: Antonio Borneo <bor...@gm...>
Tested-by: jenkins
diff --git a/src/target/oocd_capstone.c b/src/target/oocd_capstone.c
index 05ae4d21e..b2175565e 100644
--- a/src/target/oocd_capstone.c
+++ b/src/target/oocd_capstone.c
@@ -29,15 +29,24 @@ static struct {
} all_archs[] = {
{ "arm", CS_ARCH_ARM, CS_MODE_ARM },
{ "armbe", CS_ARCH_ARM, CS_MODE_ARM | CS_MODE_BIG_ENDIAN },
- { "arm64", CS_ARCH_ARM64, CS_MODE_LITTLE_ENDIAN },
- { "arm64be", CS_ARCH_ARM64, CS_MODE_BIG_ENDIAN },
{ "cortexm", CS_ARCH_ARM, CS_MODE_ARM | CS_MODE_THUMB | CS_MODE_MCLASS },
{ "thumb", CS_ARCH_ARM, CS_MODE_ARM | CS_MODE_THUMB },
+#if CS_API_MAJOR < 6
+ { "arm64", CS_ARCH_ARM64, CS_MODE_LITTLE_ENDIAN },
+ { "arm64be", CS_ARCH_ARM64, CS_MODE_BIG_ENDIAN },
#if CS_API_MAJOR >= 5
{ "riscv32", CS_ARCH_RISCV, CS_MODE_RISCV32 | CS_MODE_RISCVC },
{ "riscv64", CS_ARCH_RISCV, CS_MODE_RISCV64 | CS_MODE_RISCVC },
-#endif /* CS_API_MAJOR >= 5 */
+#endif
+#endif /* CS_API_MAJOR < 6 */
+
+#if CS_API_MAJOR >= 6
+ { "arm64", CS_ARCH_AARCH64, CS_MODE_LITTLE_ENDIAN },
+ { "arm64be", CS_ARCH_AARCH64, CS_MODE_BIG_ENDIAN },
+ { "riscv32", CS_ARCH_RISCV, CS_MODE_RISCV32 | CS_MODE_RISCV_C },
+ { "riscv64", CS_ARCH_RISCV, CS_MODE_RISCV64 | CS_MODE_RISCV_C },
+#endif /* CS_API_MAJOR >= 6 */
};
int oocd_cs_list_insn_types(struct command_invocation *cmd)
-----------------------------------------------------------------------
Summary of changes:
src/target/oocd_capstone.c | 15 ++++++++++++---
1 file changed, 12 insertions(+), 3 deletions(-)
hooks/post-receive
--
Main OpenOCD repository
|
|
From: openocd-gerrit <ope...@us...> - 2026-07-04 17:53:06
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".
The branch, master has been updated
via c9fe186e14cf762240c195ad4b1f6098f4e7f595 (commit)
via 603c6e68e3286123b76799e18a106face3bbcce3 (commit)
from 4f9ab4262c49c5bf1f71541c885178cdb6497e9c (commit)
Those revisions listed above that are new to this repository have
not appeared on any other notification email; so we list those
revisions in full, below.
- Log -----------------------------------------------------------------
commit c9fe186e14cf762240c195ad4b1f6098f4e7f595
Author: Antonio Borneo <bor...@gm...>
Date: Mon Jun 15 22:54:38 2026 +0200
openocd: drop windows replacement for gettimeofday()
The replacement helper provides an implementation of gettimeofday()
based on Windows API.
With no use of gettimeofday() in Windows build, drop the
replacement implementation.
While there, drop the CameCase Windows API not referenced anymore
and the configure check for gettimeofday().
Change-Id: I32b6b1e7fafde0fbc681c060c8cf1a3243f04389
Signed-off-by: Antonio Borneo <bor...@gm...>
Reviewed-on: https://review.openocd.org/c/openocd/+/9748
Reviewed-by: Grant Ramsay <gra...@ho...>
Tested-by: jenkins
diff --git a/configure.ac b/configure.ac
index b61769453..74a476fe5 100644
--- a/configure.ac
+++ b/configure.ac
@@ -95,7 +95,6 @@ AC_C_BIGENDIAN
AC_CHECK_FUNCS([strndup])
AC_CHECK_FUNCS([strnlen])
-AC_CHECK_FUNCS([gettimeofday])
AC_CHECK_FUNCS([clock_gettime])
AC_CHECK_FUNCS([usleep])
AC_CHECK_FUNCS([realpath])
diff --git a/src/helper/replacements.c b/src/helper/replacements.c
index 16b918020..de7ee84ec 100644
--- a/src/helper/replacements.c
+++ b/src/helper/replacements.c
@@ -59,51 +59,6 @@ void *fill_malloc(size_t size)
#include <winsock2.h>
#endif
-/* replacements for gettimeofday */
-#ifndef HAVE_GETTIMEOFDAY
-
-/* Windows */
-#ifdef _WIN32
-
-#ifndef __GNUC__
-#define EPOCHFILETIME (116444736000000000i64)
-#else
-#define EPOCHFILETIME (116444736000000000LL)
-#endif
-
-int gettimeofday(struct timeval *tv, struct timezone *tz)
-{
- FILETIME ft;
- LARGE_INTEGER li;
- __int64 t;
- static int tzflag;
-
- if (tv) {
- GetSystemTimeAsFileTime(&ft);
- li.LowPart = ft.dwLowDateTime;
- li.HighPart = ft.dwHighDateTime;
- t = li.QuadPart; /* In 100-nanosecond intervals */
- t -= EPOCHFILETIME; /* Offset to the Epoch time */
- t /= 10; /* In microseconds */
- tv->tv_sec = (long)(t / 1000000);
- tv->tv_usec = (long)(t % 1000000);
- }
-
- if (tz) {
- if (!tzflag) {
- _tzset();
- tzflag++;
- }
- tz->tz_minuteswest = _timezone / 60;
- tz->tz_dsttime = _daylight;
- }
-
- return 0;
-}
-#endif /* _WIN32 */
-
-#endif /* HAVE_GETTIMEOFDAY */
-
#ifndef HAVE_STRNLEN
size_t strnlen(const char *s, size_t maxlen)
{
diff --git a/src/helper/replacements.h b/src/helper/replacements.h
index 11e3c119e..c48bc79a8 100644
--- a/src/helper/replacements.h
+++ b/src/helper/replacements.h
@@ -51,21 +51,6 @@ struct timeval {
#endif
-/* gettimeofday() */
-#ifndef HAVE_GETTIMEOFDAY
-
-#ifdef _WIN32
-struct timezone {
- int tz_minuteswest;
- int tz_dsttime;
-};
-#endif
-struct timezone;
-
-int gettimeofday(struct timeval *tv, struct timezone *tz);
-
-#endif
-
void *clear_malloc(size_t size);
void *fill_malloc(size_t size);
diff --git a/tools/scripts/camelcase.txt b/tools/scripts/camelcase.txt
index e566eafad..ee690f64d 100644
--- a/tools/scripts/camelcase.txt
+++ b/tools/scripts/camelcase.txt
@@ -161,7 +161,6 @@ CreateFile
CloseHandle
FormatMessage
GetModuleFileName
-GetSystemTimeAsFileTime
GetTickCount
GetVersionEx
HighPart
@@ -179,8 +178,6 @@ WSACleanup
WSAGetLastError
WSASetLastError
WSAStartup
-dwHighDateTime
-dwLowDateTime
dwPlatformId
dwOSVersionInfoSize
commit 603c6e68e3286123b76799e18a106face3bbcce3
Author: Antonio Borneo <bor...@gm...>
Date: Mon Jun 15 23:02:56 2026 +0200
helper: time_support: drop unused functions
The helpers
- timeval_add_time()
- timeval_compare()
- timeval_subtract()
are not used anymore. Drop them.
Change-Id: I1c5cf1ec7d2a931a61efbb06437456374e271600
Signed-off-by: Antonio Borneo <bor...@gm...>
Reviewed-on: https://review.openocd.org/c/openocd/+/9747
Reviewed-by: Grant Ramsay <gra...@ho...>
Tested-by: jenkins
diff --git a/src/helper/time_support.c b/src/helper/time_support.c
index cc4c8c367..535b0626f 100644
--- a/src/helper/time_support.c
+++ b/src/helper/time_support.c
@@ -19,55 +19,6 @@
#include "time_support.h"
-/* calculate difference between two struct timeval values */
-int timeval_subtract(struct timeval *result, struct timeval *x, struct timeval *y)
-{
- if (x->tv_usec < y->tv_usec) {
- int nsec = (y->tv_usec - x->tv_usec) / 1000000 + 1;
- y->tv_usec -= 1000000 * nsec;
- y->tv_sec += nsec;
- }
- if (x->tv_usec - y->tv_usec > 1000000) {
- int nsec = (x->tv_usec - y->tv_usec) / 1000000;
- y->tv_usec += 1000000 * nsec;
- y->tv_sec -= nsec;
- }
-
- result->tv_sec = x->tv_sec - y->tv_sec;
- result->tv_usec = x->tv_usec - y->tv_usec;
-
- /* Return 1 if result is negative. */
- return x->tv_sec < y->tv_sec;
-}
-
-int timeval_add_time(struct timeval *result, long sec, long usec)
-{
- result->tv_sec += sec;
- result->tv_usec += usec;
-
- while (result->tv_usec > 1000000) {
- result->tv_usec -= 1000000;
- result->tv_sec++;
- }
-
- return 0;
-}
-
-/* compare two timevals and return -1/0/+1 accordingly */
-int timeval_compare(const struct timeval *x, const struct timeval *y)
-{
- if (x->tv_sec < y->tv_sec)
- return -1;
- else if (x->tv_sec > y->tv_sec)
- return 1;
- else if (x->tv_usec < y->tv_usec)
- return -1;
- else if (x->tv_usec > y->tv_usec)
- return 1;
- else
- return 0;
-}
-
int duration_start(struct duration *duration)
{
int64_t now = timeval_ms();
diff --git a/src/helper/time_support.h b/src/helper/time_support.h
index 7e0a315c2..36d08c443 100644
--- a/src/helper/time_support.h
+++ b/src/helper/time_support.h
@@ -21,10 +21,6 @@
#include <sys/time.h>
#endif
-int timeval_subtract(struct timeval *result, struct timeval *x, struct timeval *y);
-int timeval_add_time(struct timeval *result, long sec, long usec);
-int timeval_compare(const struct timeval *x, const struct timeval *y);
-
/** @returns gettimeofday() timeval as 64-bit in ms */
int64_t timeval_ms(void);
-----------------------------------------------------------------------
Summary of changes:
configure.ac | 1 -
src/helper/replacements.c | 45 -----------------------------------------
src/helper/replacements.h | 15 --------------
src/helper/time_support.c | 49 ---------------------------------------------
src/helper/time_support.h | 4 ----
tools/scripts/camelcase.txt | 3 ---
6 files changed, 117 deletions(-)
hooks/post-receive
--
Main OpenOCD repository
|
|
From: openocd-gerrit <ope...@us...> - 2026-07-04 17:52:07
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".
The branch, master has been updated
via 4f9ab4262c49c5bf1f71541c885178cdb6497e9c (commit)
via 4956f345ec30e94d4a86de1a4293cbc58ae703f0 (commit)
from 1950a58d85cd469332023dc937e9ecb59b0d557c (commit)
Those revisions listed above that are new to this repository have
not appeared on any other notification email; so we list those
revisions in full, below.
- Log -----------------------------------------------------------------
commit 4f9ab4262c49c5bf1f71541c885178cdb6497e9c
Author: Antonio Borneo <bor...@gm...>
Date: Mon Jun 15 22:43:01 2026 +0200
openocd: replace gettimeofday() with timeval_ms()
The man gettimeofday(2) reports that:
POSIX.1-2008 marks gettimeofday() as obsolete,
recommending the use of clock_gettime(2) instead.
Uniform the code by replacing gettimeofday() with the OpenOCD
function timeval_ms().
Change-Id: I27f4f0273291be5105d2c567ed4cc897778ec70d
Signed-off-by: Antonio Borneo <bor...@gm...>
Reviewed-on: https://review.openocd.org/c/openocd/+/9746
Reviewed-by: Grant Ramsay <gra...@ho...>
Tested-by: jenkins
diff --git a/src/jtag/drivers/presto.c b/src/jtag/drivers/presto.c
index 552c74c9c..1519a6d98 100644
--- a/src/jtag/drivers/presto.c
+++ b/src/jtag/drivers/presto.c
@@ -94,9 +94,8 @@ static int presto_read(uint8_t *buf, uint32_t size)
{
uint32_t ftbytes = 0;
- struct timeval timeout, now;
- gettimeofday(&timeout, NULL);
- timeval_add_time(&timeout, 1, 0); /* one second timeout */
+ // 1 second timeout
+ int64_t then = timeval_ms() + 1000;
while (ftbytes < size) {
presto->retval = ftdi_read_data(&presto->ftdic, buf + ftbytes, size - ftbytes);
@@ -106,8 +105,7 @@ static int presto_read(uint8_t *buf, uint32_t size)
}
ftbytes += presto->retval;
- gettimeofday(&now, NULL);
- if (timeval_compare(&now, &timeout) > 0)
+ if (timeval_ms() > then)
break;
}
diff --git a/src/jtag/drivers/sysfsgpio.c b/src/jtag/drivers/sysfsgpio.c
index 279b35377..902459c7d 100644
--- a/src/jtag/drivers/sysfsgpio.c
+++ b/src/jtag/drivers/sysfsgpio.c
@@ -101,7 +101,6 @@ static void unexport_sysfs_gpio(int gpio)
*/
static int setup_sysfs_gpio(int gpio, int is_output, int init_high)
{
- struct timeval timeout, now;
char buf[40];
char gpiostr[5];
int ret;
@@ -121,16 +120,15 @@ static int setup_sysfs_gpio(int gpio, int is_output, int init_high)
}
}
- gettimeofday(&timeout, NULL);
- timeval_add_time(&timeout, 0, 500000);
+ // 500 ms timeout
+ int64_t then = timeval_ms() + 500;
snprintf(buf, sizeof(buf), "/sys/class/gpio/gpio%d/direction", gpio);
for (;;) {
ret = open_write_close(buf, is_output ? (init_high ? "high" : "low") : "in");
if (ret >= 0 || errno != EACCES)
break;
- gettimeofday(&now, NULL);
- if (timeval_compare(&now, &timeout) >= 0)
+ if (timeval_ms() >= then)
break;
jtag_sleep(10000);
}
@@ -146,8 +144,7 @@ static int setup_sysfs_gpio(int gpio, int is_output, int init_high)
ret = open(buf, O_RDWR | O_NONBLOCK | O_SYNC);
if (ret >= 0 || errno != EACCES)
break;
- gettimeofday(&now, NULL);
- if (timeval_compare(&now, &timeout) >= 0)
+ if (timeval_ms() >= then)
break;
jtag_sleep(10000);
}
diff --git a/src/target/cortex_m.c b/src/target/cortex_m.c
index f8b6164af..61cddafc1 100644
--- a/src/target/cortex_m.c
+++ b/src/target/cortex_m.c
@@ -2370,7 +2370,6 @@ void cortex_m_deinit_target(struct target *target)
int cortex_m_profiling(struct target *target, uint32_t *samples,
uint32_t max_num_samples, uint32_t *num_samples, uint32_t seconds)
{
- struct timeval timeout, now;
struct armv7m_common *armv7m = target_to_armv7m(target);
uint32_t reg_value;
int retval;
@@ -2385,8 +2384,7 @@ int cortex_m_profiling(struct target *target, uint32_t *samples,
return target_profiling_default(target, samples, max_num_samples, num_samples, seconds);
}
- gettimeofday(&timeout, NULL);
- timeval_add_time(&timeout, seconds, 0);
+ int64_t then = timeval_ms() + seconds * 1000LL;
LOG_TARGET_INFO(target, "Starting Cortex-M profiling. Sampling DWT_PCSR as fast as we can...");
@@ -2422,8 +2420,7 @@ int cortex_m_profiling(struct target *target, uint32_t *samples,
}
- gettimeofday(&now, NULL);
- if (sample_count >= max_num_samples || timeval_compare(&now, &timeout) > 0) {
+ if (sample_count >= max_num_samples || timeval_ms() > then) {
LOG_TARGET_INFO(target, "Profiling completed. %" PRIu32 " samples.", sample_count);
break;
}
diff --git a/src/target/embeddedice.c b/src/target/embeddedice.c
index f6e330b37..890b5f499 100644
--- a/src/target/embeddedice.c
+++ b/src/target/embeddedice.c
@@ -574,7 +574,7 @@ int embeddedice_send(struct arm_jtag *jtag_info, uint32_t *data, uint32_t size)
/**
* Poll DCC control register until read or write handshake completes.
*/
-int embeddedice_handshake(struct arm_jtag *jtag_info, int hsbit, uint32_t timeout)
+int embeddedice_handshake(struct arm_jtag *jtag_info, int hsbit, uint32_t timeout_ms)
{
struct scan_field fields[3];
uint8_t field0_in[4];
@@ -582,8 +582,6 @@ int embeddedice_handshake(struct arm_jtag *jtag_info, int hsbit, uint32_t timeou
uint8_t field2_out[1];
int retval;
uint32_t hsact;
- struct timeval now;
- struct timeval timeout_end;
if (hsbit == EICE_COMM_CTRL_WBIT)
hsact = 1;
@@ -616,8 +614,8 @@ int embeddedice_handshake(struct arm_jtag *jtag_info, int hsbit, uint32_t timeou
fields[2].in_value = NULL;
jtag_add_dr_scan(jtag_info->tap, 3, fields, TAP_IDLE);
- gettimeofday(&timeout_end, NULL);
- timeval_add_time(&timeout_end, 0, timeout * 1000);
+
+ int64_t then = timeval_ms() + timeout_ms;
do {
jtag_add_dr_scan(jtag_info->tap, 3, fields, TAP_IDLE);
retval = jtag_execute_queue();
@@ -627,8 +625,7 @@ int embeddedice_handshake(struct arm_jtag *jtag_info, int hsbit, uint32_t timeou
if (buf_get_u32(field0_in, hsbit, 1) == hsact)
return ERROR_OK;
- gettimeofday(&now, NULL);
- } while (timeval_compare(&now, &timeout_end) <= 0);
+ } while (timeval_ms() <= then);
LOG_ERROR("embeddedice handshake timeout");
return ERROR_TARGET_TIMEOUT;
diff --git a/src/target/espressif/esp_xtensa.c b/src/target/espressif/esp_xtensa.c
index 4cadcb330..357527260 100644
--- a/src/target/espressif/esp_xtensa.c
+++ b/src/target/espressif/esp_xtensa.c
@@ -183,7 +183,6 @@ int esp_xtensa_breakpoint_remove(struct target *target, struct breakpoint *break
int esp_xtensa_profiling(struct target *target, uint32_t *samples,
uint32_t max_num_samples, uint32_t *num_samples, uint32_t seconds)
{
- struct timeval timeout, now;
struct xtensa *xtensa = target_to_xtensa(target);
int retval = ERROR_OK;
int res;
@@ -192,8 +191,7 @@ int esp_xtensa_profiling(struct target *target, uint32_t *samples,
#define MIN_PASS 200
#define MAX_PASS 1000
- gettimeofday(&timeout, NULL);
- timeval_add_time(&timeout, seconds, 0);
+ int64_t then = timeval_ms() + seconds * 1000LL;
uint8_t buf[sizeof(uint32_t) * MAX_PASS];
@@ -238,8 +236,7 @@ int esp_xtensa_profiling(struct target *target, uint32_t *samples,
uint32_t sample32 = buf_get_u32(buf + i * sizeof(uint32_t), 0, 32);
samples[sample_count++] = sample32;
}
- gettimeofday(&now, NULL);
- if (sample_count >= max_num_samples || timeval_compare(&now, &timeout) > 0) {
+ if (sample_count >= max_num_samples || timeval_ms() > then) {
LOG_TARGET_INFO(target, "Profiling completed. %" PRIu32 " samples.", sample_count);
break;
}
diff --git a/src/target/openrisc/or1k.c b/src/target/openrisc/or1k.c
index eab064140..200a97dfe 100644
--- a/src/target/openrisc/or1k.c
+++ b/src/target/openrisc/or1k.c
@@ -1200,13 +1200,11 @@ static int or1k_checksum_memory(struct target *target, target_addr_t address,
static int or1k_profiling(struct target *target, uint32_t *samples,
uint32_t max_num_samples, uint32_t *num_samples, uint32_t seconds)
{
- struct timeval timeout, now;
struct or1k_common *or1k = target_to_or1k(target);
struct or1k_du *du_core = or1k_to_du(or1k);
int retval = ERROR_OK;
- gettimeofday(&timeout, NULL);
- timeval_add_time(&timeout, seconds, 0);
+ int64_t then = timeval_ms() + seconds * 1000LL;
LOG_INFO("Starting or1k profiling. Sampling npc as fast as we can...");
@@ -1232,8 +1230,7 @@ static int or1k_profiling(struct target *target, uint32_t *samples,
samples[sample_count++] = reg_value;
- gettimeofday(&now, NULL);
- if ((sample_count >= max_num_samples) || timeval_compare(&now, &timeout) > 0) {
+ if (sample_count >= max_num_samples || timeval_ms() > then) {
LOG_INFO("Profiling completed. %" PRIu32 " samples.", sample_count);
break;
}
diff --git a/src/target/target.c b/src/target/target.c
index 1b2bc8191..1920de55c 100644
--- a/src/target/target.c
+++ b/src/target/target.c
@@ -2343,10 +2343,7 @@ static int target_gdb_fileio_end_default(struct target *target,
int target_profiling_default(struct target *target, uint32_t *samples,
uint32_t max_num_samples, uint32_t *num_samples, uint32_t seconds)
{
- struct timeval timeout, now;
-
- gettimeofday(&timeout, NULL);
- timeval_add_time(&timeout, seconds, 0);
+ int64_t then = timeval_ms() + seconds * 1000LL;
LOG_INFO("Starting profiling. Halting and resuming the"
" target as often as we can...");
@@ -2377,8 +2374,7 @@ int target_profiling_default(struct target *target, uint32_t *samples,
if (retval != ERROR_OK)
break;
- gettimeofday(&now, NULL);
- if ((sample_count >= max_num_samples) || timeval_compare(&now, &timeout) >= 0) {
+ if (sample_count >= max_num_samples || timeval_ms() >= then) {
LOG_INFO("Profiling completed. %" PRIu32 " samples.", sample_count);
break;
}
diff --git a/src/target/xscale.c b/src/target/xscale.c
index 64980ee24..6dc4e4308 100644
--- a/src/target/xscale.c
+++ b/src/target/xscale.c
@@ -334,7 +334,6 @@ static int xscale_read_tx(struct target *target, int consume)
enum tap_state path[3];
enum tap_state noconsume_path[6];
int retval;
- struct timeval timeout, now;
struct scan_field fields[3];
uint8_t field0_in = 0x0;
uint8_t field0_check_value = 0x2;
@@ -369,8 +368,8 @@ static int xscale_read_tx(struct target *target, int consume)
uint8_t tmp;
fields[2].in_value = &tmp;
- gettimeofday(&timeout, NULL);
- timeval_add_time(&timeout, 1, 0);
+ // 1 second timeout
+ int64_t then = timeval_ms() + 1000;
for (;; ) {
/* if we want to consume the register content (i.e. clear TX_READY),
@@ -393,8 +392,7 @@ static int xscale_read_tx(struct target *target, int consume)
return ERROR_TARGET_TIMEOUT;
}
- gettimeofday(&now, NULL);
- if (timeval_compare(&now, &timeout) > 0) {
+ if (timeval_ms() > then) {
LOG_ERROR("time out reading TX register");
return ERROR_TARGET_TIMEOUT;
}
@@ -418,7 +416,6 @@ static int xscale_write_rx(struct target *target)
{
struct xscale_common *xscale = target_to_xscale(target);
int retval;
- struct timeval timeout, now;
struct scan_field fields[3];
uint8_t field0_out = 0x0;
uint8_t field0_in = 0x0;
@@ -446,8 +443,8 @@ static int xscale_write_rx(struct target *target)
uint8_t tmp;
fields[2].in_value = &tmp;
- gettimeofday(&timeout, NULL);
- timeval_add_time(&timeout, 1, 0);
+ // 1 second timeout
+ int64_t then = timeval_ms() + 1000;
/* poll until rx_read is low */
LOG_DEBUG("polling RX");
@@ -463,9 +460,7 @@ static int xscale_write_rx(struct target *target)
return retval;
}
- gettimeofday(&now, NULL);
- if ((now.tv_sec > timeout.tv_sec) ||
- ((now.tv_sec == timeout.tv_sec) && (now.tv_usec > timeout.tv_usec))) {
+ if (timeval_ms() > then) {
LOG_ERROR("time out writing RX register");
return ERROR_TARGET_TIMEOUT;
}
commit 4956f345ec30e94d4a86de1a4293cbc58ae703f0
Author: Antonio Borneo <bor...@gm...>
Date: Mon Jun 15 23:43:48 2026 +0200
pld: use duration helper
Replace the custom code that computes the duration of the loading
time with the OpenOCD helpers.
While there, drop else after the return statement.
Change-Id: Ic574c9fda0cebe076f2c53d49535f9d7fa6a85c6
Signed-off-by: Antonio Borneo <bor...@gm...>
Reviewed-on: https://review.openocd.org/c/openocd/+/9745
Reviewed-by: Grant Ramsay <gra...@ho...>
Tested-by: jenkins
diff --git a/src/pld/pld.c b/src/pld/pld.c
index edd779613..8334ff5fb 100644
--- a/src/pld/pld.c
+++ b/src/pld/pld.c
@@ -249,11 +249,8 @@ COMMAND_HANDLER(handle_pld_devices_command)
COMMAND_HANDLER(handle_pld_load_command)
{
int retval;
- struct timeval start, end, duration;
struct pld_device *p;
- gettimeofday(&start, NULL);
-
if (CMD_ARGC < 2)
return ERROR_COMMAND_SYNTAX_ERROR;
@@ -279,20 +276,21 @@ COMMAND_HANDLER(handle_pld_load_command)
return ERROR_PLD_FILE_LOAD_FAILED;
}
+ struct duration load_time;
+ duration_start(&load_time);
+
retval = p->driver->load(p, CMD_ARGV[1]);
if (retval != ERROR_OK) {
command_print(CMD, "failed loading file %s to pld device %s",
CMD_ARGV[1], CMD_ARGV[0]);
return retval;
- } else {
- gettimeofday(&end, NULL);
- timeval_subtract(&duration, &end, &start);
-
- command_print(CMD, "loaded file %s to pld device %s in %jis %jius",
- CMD_ARGV[1], CMD_ARGV[0],
- (intmax_t)duration.tv_sec, (intmax_t)duration.tv_usec);
}
+ duration_measure(&load_time);
+
+ command_print(CMD, "loaded file %s to pld device %s in %f s",
+ CMD_ARGV[1], CMD_ARGV[0], duration_elapsed(&load_time));
+
return ERROR_OK;
}
-----------------------------------------------------------------------
Summary of changes:
src/jtag/drivers/presto.c | 8 +++-----
src/jtag/drivers/sysfsgpio.c | 11 ++++-------
src/pld/pld.c | 18 ++++++++----------
src/target/cortex_m.c | 7 ++-----
src/target/embeddedice.c | 11 ++++-------
src/target/espressif/esp_xtensa.c | 7 ++-----
src/target/openrisc/or1k.c | 7 ++-----
src/target/target.c | 8 ++------
src/target/xscale.c | 17 ++++++-----------
9 files changed, 33 insertions(+), 61 deletions(-)
hooks/post-receive
--
Main OpenOCD repository
|
|
From: openocd-gerrit <ope...@us...> - 2026-07-04 17:51:51
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".
The branch, master has been updated
via 1950a58d85cd469332023dc937e9ecb59b0d557c (commit)
from 0240d2e3b77fb9d6ffba78194e6c43d34cad2fe5 (commit)
Those revisions listed above that are new to this repository have
not appeared on any other notification email; so we list those
revisions in full, below.
- Log -----------------------------------------------------------------
commit 1950a58d85cd469332023dc937e9ecb59b0d557c
Author: Antonio Borneo <bor...@gm...>
Date: Mon Jun 15 23:23:03 2026 +0200
helper: time_support: convert duration helpers to timeval_ms()
Drop the use of gettimeofday() in the duration_*() helpers and use
OpenOCD timeval_ms().
Change-Id: I9a8dd77e0b03e636a3653a75561997b97c9a27ed
Signed-off-by: Antonio Borneo <bor...@gm...>
Reviewed-on: https://review.openocd.org/c/openocd/+/9744
Reviewed-by: Grant Ramsay <gra...@ho...>
Tested-by: jenkins
diff --git a/src/helper/time_support.c b/src/helper/time_support.c
index 46fb17246..cc4c8c367 100644
--- a/src/helper/time_support.c
+++ b/src/helper/time_support.c
@@ -70,31 +70,39 @@ int timeval_compare(const struct timeval *x, const struct timeval *y)
int duration_start(struct duration *duration)
{
- if (gettimeofday(&duration->start, NULL) != 0)
+ int64_t now = timeval_ms();
+
+ if (now < 0)
return ERROR_FAIL;
+ duration->start_ms = now;
+
return ERROR_OK;
}
int duration_measure(struct duration *duration)
{
- struct timeval end;
- if (gettimeofday(&end, NULL) != 0)
+ int64_t now = timeval_ms();
+
+ if (now < 0)
return ERROR_FAIL;
- timeval_subtract(&duration->elapsed, &end, &duration->start);
+ duration->elapsed_ms = now - duration->start_ms;
return ERROR_OK;
}
float duration_elapsed(const struct duration *duration)
{
- float t = duration->elapsed.tv_sec;
- t += (float)duration->elapsed.tv_usec / 1000000.0;
- return t;
+ return ((float)duration->elapsed_ms) / 1000;
}
float duration_kbps(const struct duration *duration, size_t count)
{
- return count / (1024.0 * duration_elapsed(duration));
+ int64_t elapsed_ms = duration->elapsed_ms;
+
+ if (elapsed_ms == 0)
+ elapsed_ms = 1;
+
+ return 1000 * count / (1024 * (float)elapsed_ms);
}
diff --git a/src/helper/time_support.h b/src/helper/time_support.h
index c98429681..7e0a315c2 100644
--- a/src/helper/time_support.h
+++ b/src/helper/time_support.h
@@ -29,8 +29,8 @@ int timeval_compare(const struct timeval *x, const struct timeval *y);
int64_t timeval_ms(void);
struct duration {
- struct timeval start;
- struct timeval elapsed;
+ int64_t start_ms;
+ int64_t elapsed_ms;
};
/** Update the duration->start field to start the @a duration measurement. */
-----------------------------------------------------------------------
Summary of changes:
src/helper/time_support.c | 24 ++++++++++++++++--------
src/helper/time_support.h | 4 ++--
2 files changed, 18 insertions(+), 10 deletions(-)
hooks/post-receive
--
Main OpenOCD repository
|
|
From: openocd-gerrit <ope...@us...> - 2026-07-04 17:51:30
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".
The branch, master has been updated
via 0240d2e3b77fb9d6ffba78194e6c43d34cad2fe5 (commit)
from a7750b901de7809020cce6449e3ae22735f0c910 (commit)
Those revisions listed above that are new to this repository have
not appeared on any other notification email; so we list those
revisions in full, below.
- Log -----------------------------------------------------------------
commit 0240d2e3b77fb9d6ffba78194e6c43d34cad2fe5
Author: Grant Ramsay <gra...@ho...>
Date: Mon Jun 15 09:55:40 2026 +1200
time_support: Use monotonic time for timeval_ms
gettimeofday is susceptible to NTP adjustments and marked as obsolete.
Replace timeval_ms implementation with suitable monotonic time source
and fall back to gettimeofday if needed
Change-Id: Iba21bfb023a9df1e668175bea327467bbd5b45b4
Signed-off-by: Grant Ramsay <gra...@ho...>
Reviewed-on: https://review.openocd.org/c/openocd/+/9743
Reviewed-by: Tomas Vanek <va...@fb...>
Tested-by: jenkins
Reviewed-by: Antonio Borneo <bor...@gm...>
diff --git a/configure.ac b/configure.ac
index 335eb2bc3..b61769453 100644
--- a/configure.ac
+++ b/configure.ac
@@ -48,6 +48,8 @@ AC_TYPE_LONG_LONG_INT
AC_SEARCH_LIBS([ioperm], [ioperm])
AC_SEARCH_LIBS([dlopen], [dl])
AC_SEARCH_LIBS([openpty], [util])
+# Older versions of Linux put clock_gettime in librt
+AC_SEARCH_LIBS([clock_gettime], [rt])
AC_CHECK_HEADERS([sys/socket.h])
AC_CHECK_HEADERS([elf.h])
@@ -94,6 +96,7 @@ AC_C_BIGENDIAN
AC_CHECK_FUNCS([strndup])
AC_CHECK_FUNCS([strnlen])
AC_CHECK_FUNCS([gettimeofday])
+AC_CHECK_FUNCS([clock_gettime])
AC_CHECK_FUNCS([usleep])
AC_CHECK_FUNCS([realpath])
AC_CHECK_FUNCS([mallinfo])
diff --git a/src/helper/time_support_common.c b/src/helper/time_support_common.c
index 9d17a315b..6d78c1f42 100644
--- a/src/helper/time_support_common.c
+++ b/src/helper/time_support_common.c
@@ -9,6 +9,9 @@
* *
* Copyright (C) 2008 by Spencer Oliver *
* sp...@sp... *
+ * *
+ * Copyright (C) 2026 by Grant Ramsay *
+ * gra...@ho... *
***************************************************************************/
#ifdef HAVE_CONFIG_H
@@ -17,14 +20,44 @@
#include "time_support.h"
+#ifdef _WIN32
+#include <windows.h>
+#endif
+
/* simple and low overhead fetching of ms counter. Use only
* the difference between ms counters returned from this fn.
+ * Use QueryPerformanceCounter for Windows, else
+ * clock_gettime with CLOCK_MONOTONIC_RAW if available, else
+ * clock_gettime with CLOCK_MONOTONIC if available, else
+ * fallback to gettimeofday (susceptible to NTP adjustments)
*/
int64_t timeval_ms(void)
{
+#ifdef _WIN32
+ static LARGE_INTEGER frequency;
+ LARGE_INTEGER now;
+ // frequency is static and only read once on the first call
+ if (frequency.QuadPart == 0 && !QueryPerformanceFrequency(&frequency))
+ return -1;
+ if (!QueryPerformanceCounter(&now))
+ return -1;
+ return (now.QuadPart * 1000) / frequency.QuadPart;
+#elif defined(HAVE_CLOCK_GETTIME)
+#ifdef CLOCK_MONOTONIC_RAW
+ clockid_t clk_id = CLOCK_MONOTONIC_RAW;
+#else
+ clockid_t clk_id = CLOCK_MONOTONIC;
+#endif
+ struct timespec now;
+ int retval = clock_gettime(clk_id, &now);
+ if (retval < 0)
+ return retval;
+ return (int64_t)now.tv_sec * 1000 + now.tv_nsec / 1000000;
+#else
struct timeval now;
int retval = gettimeofday(&now, NULL);
if (retval < 0)
return retval;
return (int64_t)now.tv_sec * 1000 + now.tv_usec / 1000;
+#endif
}
diff --git a/tools/scripts/camelcase.txt b/tools/scripts/camelcase.txt
index 95ef4af55..e566eafad 100644
--- a/tools/scripts/camelcase.txt
+++ b/tools/scripts/camelcase.txt
@@ -170,6 +170,8 @@ MsgWaitForMultipleObjects
PeekMessage
PeekNamedPipe
QuadPart
+QueryPerformanceCounter
+QueryPerformanceFrequency
SetConsoleCtrlHandler
Sleep
WaitForSingleObject
-----------------------------------------------------------------------
Summary of changes:
configure.ac | 3 +++
src/helper/time_support_common.c | 33 +++++++++++++++++++++++++++++++++
tools/scripts/camelcase.txt | 2 ++
3 files changed, 38 insertions(+)
hooks/post-receive
--
Main OpenOCD repository
|
|
From: openocd-gerrit <ope...@us...> - 2026-07-04 17:51:10
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".
The branch, master has been updated
via a7750b901de7809020cce6449e3ae22735f0c910 (commit)
via 95c5a5268ad0459b351fdd3580755d4bf119f5ec (commit)
from b1a6190740a285ac9c88cc924e459a20a0c4d337 (commit)
Those revisions listed above that are new to this repository have
not appeared on any other notification email; so we list those
revisions in full, below.
- Log -----------------------------------------------------------------
commit a7750b901de7809020cce6449e3ae22735f0c910
Author: Antonio Borneo <bor...@gm...>
Date: Thu Jun 11 17:58:11 2026 +0200
jtag: check tap_state_by_name() return value against TAP_INVALID
The return value of tap_state_by_name() is an enum tap_state.
Don't compare it with zero to check if it's not valid but use the
enum's value TAP_INVALID.
Change-Id: I185a86a71f6ddbd4e28aca329552dfb94aee5b57
Signed-off-by: Antonio Borneo <bor...@gm...>
Reviewed-on: https://review.openocd.org/c/openocd/+/9740
Tested-by: jenkins
Reviewed-by: Evgeniy Naydanov <eu...@gm...>
diff --git a/src/jtag/tcl.c b/src/jtag/tcl.c
index 90d6799ab..96066c5af 100644
--- a/src/jtag/tcl.c
+++ b/src/jtag/tcl.c
@@ -130,7 +130,7 @@ COMMAND_HANDLER(handle_jtag_command_drscan)
if (CMD_ARGC > 3 && !strcmp("-endstate", CMD_ARGV[CMD_ARGC - 2])) {
const char *state_name = CMD_ARGV[CMD_ARGC - 1];
endstate = tap_state_by_name(state_name);
- if (endstate < 0) {
+ if (endstate == TAP_INVALID) {
command_print(CMD, "endstate: %s invalid", state_name);
return ERROR_COMMAND_ARGUMENT_INVALID;
}
@@ -183,7 +183,7 @@ COMMAND_HANDLER(handle_jtag_command_pathmove)
for (unsigned int i = 0; i < CMD_ARGC; i++) {
states[i] = tap_state_by_name(CMD_ARGV[i]);
- if (states[i] < 0) {
+ if (states[i] == TAP_INVALID) {
command_print(CMD, "endstate: %s invalid", CMD_ARGV[i]);
return ERROR_COMMAND_ARGUMENT_INVALID;
}
commit 95c5a5268ad0459b351fdd3580755d4bf119f5ec
Author: Antonio Borneo <bor...@gm...>
Date: Thu Jun 11 17:05:28 2026 +0200
jtag: core: quit jtag_add_pathmove() if nothing to do
If jtag_add_pathmove() is called with num_states set to zero it
means there is nothing to do.
Check num_states and quit if it is zero.
Change-Id: I254a6f84c57d52ca50bfb911d572346a8b10ee3c
Signed-off-by: Antonio Borneo <bor...@gm...>
Reported-by: Evgeniy Naydanov <eu...@gm...>
Reviewed-on: https://review.openocd.org/c/openocd/+/9739
Reviewed-by: Evgeniy Naydanov <eu...@gm...>
Tested-by: jenkins
diff --git a/src/jtag/core.c b/src/jtag/core.c
index 08228c024..7e7b84d6d 100644
--- a/src/jtag/core.c
+++ b/src/jtag/core.c
@@ -519,6 +519,10 @@ void jtag_add_pathmove(unsigned int num_states, const enum tap_state *path)
{
enum tap_state cur_state = cmd_queue_cur_state;
+ // quit if there is nothing to do
+ if (num_states == 0)
+ return;
+
/* the last state has to be a stable state */
if (!tap_is_state_stable(path[num_states - 1])) {
LOG_ERROR("BUG: TAP path doesn't finish in a stable state");
-----------------------------------------------------------------------
Summary of changes:
src/jtag/core.c | 4 ++++
src/jtag/tcl.c | 4 ++--
2 files changed, 6 insertions(+), 2 deletions(-)
hooks/post-receive
--
Main OpenOCD repository
|
|
From: openocd-gerrit <ope...@us...> - 2026-07-04 17:50:32
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".
The branch, master has been updated
via b1a6190740a285ac9c88cc924e459a20a0c4d337 (commit)
from 9cf28dcab9a1b91606db6061ab6b4152f761e173 (commit)
Those revisions listed above that are new to this repository have
not appeared on any other notification email; so we list those
revisions in full, below.
- Log -----------------------------------------------------------------
commit b1a6190740a285ac9c88cc924e459a20a0c4d337
Author: Antonio Borneo <bor...@gm...>
Date: Thu Jun 11 16:51:40 2026 +0200
target: dsp5680xx: fix segfault on jtag pathmove <state>
After [1] it has been reported that this target causes a segfault.
This is caused by calling jtag_add_pathmove() with the parameter
num_states set to zero.
The function jtag_add_pathmove() is supposed to do nothing in this
case, but it lacks the check to return.
Simplify the code as there is no need to call jtag_add_pathmove().
Link: commit 0847a4d7fb98 ("jtag/commands: Use 'unsigned int' data type") [1]
Change-Id: I2944778733f9672610d263139219514cc8aed467
Signed-off-by: Antonio Borneo <bor...@gm...>
Reported-by: Evgeniy Naydanov <eu...@gm...>
Reviewed-on: https://review.openocd.org/c/openocd/+/9738
Tested-by: jenkins
diff --git a/src/target/dsp5680xx.c b/src/target/dsp5680xx.c
index 30eca91a5..3dc2e01dc 100644
--- a/src/target/dsp5680xx.c
+++ b/src/target/dsp5680xx.c
@@ -33,18 +33,9 @@ static int dsp5680xx_execute_queue(void)
*/
static int reset_jtag(void)
{
- enum tap_state states[2];
-
- const char *cp = "RESET";
-
- states[0] = tap_state_by_name(cp);
- int retval = jtag_add_statemove(states[0]);
- if (retval != ERROR_OK)
- return retval;
- retval = jtag_execute_queue();
+ int retval = jtag_add_statemove(TAP_RESET);
if (retval != ERROR_OK)
return retval;
- jtag_add_pathmove(0, states + 1);
return jtag_execute_queue();
}
-----------------------------------------------------------------------
Summary of changes:
src/target/dsp5680xx.c | 11 +----------
1 file changed, 1 insertion(+), 10 deletions(-)
hooks/post-receive
--
Main OpenOCD repository
|
|
From: openocd-gerrit <ope...@us...> - 2026-07-04 17:45:06
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".
The branch, master has been updated
via 9cf28dcab9a1b91606db6061ab6b4152f761e173 (commit)
from ef5ac7aef3d11dfe806b9bdd88a2770febdaefa3 (commit)
Those revisions listed above that are new to this repository have
not appeared on any other notification email; so we list those
revisions in full, below.
- Log -----------------------------------------------------------------
commit 9cf28dcab9a1b91606db6061ab6b4152f761e173
Author: liangzhen <zhe...@sp...>
Date: Tue May 6 14:15:56 2025 +0800
target/riscv: activate dm before get nextdm
when Debug Module is inactive, accesses to the nextdm may fail.
Specifically, nextdm might not return correct data.
Change-Id: Ib19ece315af6e0c4a066f79c0270c119398c3606
Signed-off-by: liangzhen <zhe...@sp...>
Reviewed-on: https://review.openocd.org/c/openocd/+/9221
Reviewed-by: Evgeniy Naydanov <eu...@gm...>
Tested-by: jenkins
Reviewed-by: Antonio Borneo <bor...@gm...>
diff --git a/src/target/riscv/riscv-013.c b/src/target/riscv/riscv-013.c
index a87e3f97b..b4664d2a7 100644
--- a/src/target/riscv/riscv-013.c
+++ b/src/target/riscv/riscv-013.c
@@ -531,7 +531,32 @@ static int dm_write(struct target *target, uint32_t address, uint32_t value)
return dmi_write(target, riscv013_get_dmi_address(target, address), value);
}
-static bool check_dbgbase_exists(struct target *target)
+static int activate_dm(struct target *target, uint32_t dm_base_addr)
+{
+ LOG_TARGET_DEBUG(target, "Activating the DM with DMI base address (dbgbase) = 0x%x", dm_base_addr);
+ if (dmi_write(target, DM_DMCONTROL + dm_base_addr, DM_DMCONTROL_DMACTIVE) != ERROR_OK)
+ return ERROR_FAIL;
+
+ int64_t then = timeval_ms() + 1000 * riscv_get_command_timeout_sec();
+ LOG_TARGET_DEBUG(target, "Waiting for the DM to become active");
+ while (1) {
+ uint32_t dmcontrol;
+ if (dmi_read(target, &dmcontrol, DM_DMCONTROL + dm_base_addr) != ERROR_OK)
+ return ERROR_FAIL;
+ if (get_field32(dmcontrol, DM_DMCONTROL_DMACTIVE))
+ break;
+ if (timeval_ms() > then) {
+ LOG_TARGET_ERROR(target, "Debug Module (at address dbgbase=0x%" PRIx32 ") did not become active in %d s. "
+ "Increase the timeout with 'riscv set_command_timeout_sec'",
+ dm_base_addr, riscv_get_command_timeout_sec());
+ return ERROR_TIMEOUT_REACHED;
+ }
+ }
+ LOG_TARGET_DEBUG(target, "DM has become active");
+ return ERROR_OK;
+}
+
+static int check_dbgbase_exists(struct target *target)
{
uint32_t next_dm = 0;
unsigned int count = 1;
@@ -541,7 +566,14 @@ static bool check_dbgbase_exists(struct target *target)
while (1) {
uint32_t current_dm = next_dm;
if (current_dm == target->dbgbase)
- return true;
+ return ERROR_OK;
+
+ uint32_t dmcontrol;
+ if (dmi_read(target, &dmcontrol, DM_DMCONTROL + current_dm) != ERROR_OK)
+ break;
+ if (!get_field32(dmcontrol, DM_DMCONTROL_DMACTIVE) && activate_dm(target, current_dm) != ERROR_OK)
+ break;
+
if (dmi_read(target, &next_dm, DM_NEXTDM + current_dm) != ERROR_OK)
break;
LOG_TARGET_DEBUG(target, "dm @ 0x%x --> nextdm=0x%x", current_dm, next_dm);
@@ -562,7 +594,7 @@ static bool check_dbgbase_exists(struct target *target)
break;
}
}
- return false;
+ return ERROR_FAIL;
}
static int dmstatus_read(struct target *target, uint32_t *dmstatus,
@@ -1890,27 +1922,13 @@ static int reset_dm(struct target *target)
} while (get_field32(dmcontrol, DM_DMCONTROL_DMACTIVE));
LOG_TARGET_DEBUG(target, "DM reset initiated.");
}
+ /* TODO: Move the code above into `deactivate_dm()` function
+ * (a logical counterpart to activate_dm()). */
- LOG_TARGET_DEBUG(target, "Activating the DM.");
- result = dm_write(target, DM_DMCONTROL, DM_DMCONTROL_DMACTIVE);
+ result = activate_dm(target, dm->base);
if (result != ERROR_OK)
return result;
- int64_t then = timeval_ms() + 1000 * riscv_get_command_timeout_sec();
- LOG_TARGET_DEBUG(target, "Waiting for the DM to come out of reset.");
- do {
- result = dm_read(target, &dmcontrol, DM_DMCONTROL);
- if (result != ERROR_OK)
- return result;
-
- if (timeval_ms() > then) {
- LOG_TARGET_ERROR(target, "Debug Module did not become active in %d s. "
- "Increase the timeout with 'riscv set_command_timeout_sec'.",
- riscv_get_command_timeout_sec());
- return ERROR_TIMEOUT_REACHED;
- }
- } while (!get_field32(dmcontrol, DM_DMCONTROL_DMACTIVE));
-
LOG_TARGET_DEBUG(target, "DM successfully reset.");
dm->was_reset = true;
return ERROR_OK;
@@ -2065,7 +2083,7 @@ static int examine(struct target *target)
info->abits, RISCV013_DTMCS_ABITS_MIN);
}
- if (!check_dbgbase_exists(target)) {
+ if (check_dbgbase_exists(target) != ERROR_OK) {
LOG_TARGET_ERROR(target, "Could not find debug module with DMI base address (dbgbase) = 0x%x", target->dbgbase);
return ERROR_FAIL;
}
-----------------------------------------------------------------------
Summary of changes:
src/target/riscv/riscv-013.c | 60 ++++++++++++++++++++++++++++----------------
1 file changed, 39 insertions(+), 21 deletions(-)
hooks/post-receive
--
Main OpenOCD repository
|
|
From: openocd-gerrit <ope...@us...> - 2026-07-01 09:58:37
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".
The branch, master has been updated
via ef5ac7aef3d11dfe806b9bdd88a2770febdaefa3 (commit)
from 0b3e390506d1dd0e3d8a0db2e3163fce71f6f131 (commit)
Those revisions listed above that are new to this repository have
not appeared on any other notification email; so we list those
revisions in full, below.
- Log -----------------------------------------------------------------
commit ef5ac7aef3d11dfe806b9bdd88a2770febdaefa3
Author: Anatoly Parshintsev <kup...@gm...>
Date: Tue Jan 27 00:19:55 2026 +0300
target/riscv: vstart should be preserved when manipulating vector state
read access should not ruin the current execution context
Change-Id: I76a932986958c5715a7b5dd0012c868303a6c83b
Signed-off-by: Anatoly Parshintsev <kup...@gm...>
Reviewed-on: https://review.openocd.org/c/openocd/+/9415
Reviewed-by: Mark Zhuang <mar...@sp...>
Reviewed-by: Jan Matyas <jan...@co...>
Reviewed-by: Evgeniy Naydanov <eu...@gm...>
Tested-by: jenkins
Reviewed-by: Tomas Vanek <va...@fb...>
diff --git a/src/target/riscv/riscv-013.c b/src/target/riscv/riscv-013.c
index d588331a9..a87e3f97b 100644
--- a/src/target/riscv/riscv-013.c
+++ b/src/target/riscv/riscv-013.c
@@ -2339,7 +2339,7 @@ static int try_set_vsew(struct target *target, unsigned int *debug_vsew)
static int prep_for_vector_access(struct target *target,
riscv_reg_t *orig_mstatus, riscv_reg_t *orig_vtype, riscv_reg_t *orig_vl,
- unsigned int *debug_vl, unsigned int *debug_vsew)
+ riscv_reg_t *orig_vstart, unsigned int *debug_vl, unsigned int *debug_vsew)
{
assert(orig_mstatus);
assert(orig_vtype);
@@ -2356,12 +2356,15 @@ static int prep_for_vector_access(struct target *target,
if (prep_for_register_access(target, orig_mstatus, GDB_REGNO_VL) != ERROR_OK)
return ERROR_FAIL;
- /* Save vtype and vl. */
+ /* Save original vstart, vtype and vl values for later restoration */
+ if (riscv_reg_get(target, orig_vstart, GDB_REGNO_VSTART) != ERROR_OK)
+ return ERROR_FAIL;
if (riscv_reg_get(target, orig_vtype, GDB_REGNO_VTYPE) != ERROR_OK)
return ERROR_FAIL;
if (riscv_reg_get(target, orig_vl, GDB_REGNO_VL) != ERROR_OK)
return ERROR_FAIL;
-
+ /* Note: vstart may be non-zero at this point. Updating vsew (via VTYPE)
+ * reset vstart to 0. */
if (try_set_vsew(target, debug_vsew) != ERROR_OK)
return ERROR_FAIL;
/* Set the number of elements to be updated with results from a vector
@@ -2372,13 +2375,15 @@ static int prep_for_vector_access(struct target *target,
}
static int cleanup_after_vector_access(struct target *target,
- riscv_reg_t mstatus, riscv_reg_t vtype, riscv_reg_t vl)
+ riscv_reg_t mstatus, riscv_reg_t vtype, riscv_reg_t vl, riscv_reg_t vstart)
{
- /* Restore vtype and vl. */
+ /* Restore vtype, vl and vstart. */
if (riscv_reg_write(target, GDB_REGNO_VTYPE, vtype) != ERROR_OK)
return ERROR_FAIL;
if (riscv_reg_write(target, GDB_REGNO_VL, vl) != ERROR_OK)
return ERROR_FAIL;
+ if (riscv_reg_write(target, GDB_REGNO_VSTART, vstart) != ERROR_OK)
+ return ERROR_FAIL;
return cleanup_after_register_access(target, mstatus, GDB_REGNO_VL);
}
@@ -2390,10 +2395,10 @@ int riscv013_get_register_buf(struct target *target, uint8_t *value,
if (dm013_select_target(target) != ERROR_OK)
return ERROR_FAIL;
- riscv_reg_t mstatus, vtype, vl;
+ riscv_reg_t mstatus, vtype, vl, vstart;
unsigned int debug_vl, debug_vsew;
- if (prep_for_vector_access(target, &mstatus, &vtype, &vl,
+ if (prep_for_vector_access(target, &mstatus, &vtype, &vl, &vstart,
&debug_vl, &debug_vsew) != ERROR_OK)
return ERROR_FAIL;
@@ -2431,7 +2436,7 @@ int riscv013_get_register_buf(struct target *target, uint8_t *value,
}
}
- if (cleanup_after_vector_access(target, mstatus, vtype, vl) != ERROR_OK)
+ if (cleanup_after_vector_access(target, mstatus, vtype, vl, vstart) != ERROR_OK)
return ERROR_FAIL;
return result;
@@ -2445,10 +2450,10 @@ int riscv013_set_register_buf(struct target *target, enum gdb_regno regno,
if (dm013_select_target(target) != ERROR_OK)
return ERROR_FAIL;
- riscv_reg_t mstatus, vtype, vl;
+ riscv_reg_t mstatus, vtype, vl, vstart;
unsigned int debug_vl, debug_vsew;
- if (prep_for_vector_access(target, &mstatus, &vtype, &vl,
+ if (prep_for_vector_access(target, &mstatus, &vtype, &vl, &vstart,
&debug_vl, &debug_vsew) != ERROR_OK)
return ERROR_FAIL;
@@ -2470,7 +2475,7 @@ int riscv013_set_register_buf(struct target *target, enum gdb_regno regno,
break;
}
- if (cleanup_after_vector_access(target, mstatus, vtype, vl) != ERROR_OK)
+ if (cleanup_after_vector_access(target, mstatus, vtype, vl, vstart) != ERROR_OK)
return ERROR_FAIL;
return result;
-----------------------------------------------------------------------
Summary of changes:
src/target/riscv/riscv-013.c | 27 ++++++++++++++++-----------
1 file changed, 16 insertions(+), 11 deletions(-)
hooks/post-receive
--
Main OpenOCD repository
|
|
From: openocd-gerrit <ope...@us...> - 2026-07-01 09:54:36
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".
The branch, master has been updated
via 0b3e390506d1dd0e3d8a0db2e3163fce71f6f131 (commit)
from 4de89132f4b5e059d5421af3ec66196b6f855bd2 (commit)
Those revisions listed above that are new to this repository have
not appeared on any other notification email; so we list those
revisions in full, below.
- Log -----------------------------------------------------------------
commit 0b3e390506d1dd0e3d8a0db2e3163fce71f6f131
Author: Nishanth Menon <nm...@ti...>
Date: Thu May 28 23:38:44 2026 -0500
flash/nor/mspm0: workaround FLASH_ERR_01 in mspm0_read_part_info
MSPM0G devices have errata FLASH_ERR_01: accessing FACTORYREGION
(0x41C40000) via any AHB bus master causes a hard fault when the flash
controller is operating with 2 wait states. This occurs when MCLK is
sourced from HSCLK (SYSPLL/HFXT), i.e. MCLK > 32 MHz.
This affects OpenOCD reads (via DAP AHB-AP) in mspm0_read_part_info().
Fix this by checking SYSCTL_MCLKCFG before reading FACTORYREGION. If
USEHSCLK is set and FLASHWAIT == 2, temporarily switch MCLK to SYSOSC
(⤠32 MHz), perform the reads (DID, TRACEID, USERID, SRAMFLASH), and
then restore the original MCLK configuration. Restoration is ensured for
both success and error paths.
The workaround is effectively a no-op on MSPM0L and MSPM0C devices,
since they do not reach the required clock conditions.
Also handle cases where FACTORYREGION reads fail during probe: if the
main flash size is zero, force a re-probe by clearing did.
Link: https://www.ti.com/lit/er/slaz758d/slaz758d.pdf
Change-Id: I100b02f009b3e200cb3a4482c4a26ffbdb8f5f3e
Reported-by: Michael Rodriguez <Mic...@cr...>
Tested-by: Michael Rodriguez <Mic...@cr...>
Signed-off-by: Nishanth Menon <nm...@ti...>
Reviewed-on: https://review.openocd.org/c/openocd/+/9726
Tested-by: jenkins
Reviewed-by: Tomas Vanek <va...@fb...>
diff --git a/src/flash/nor/mspm0.c b/src/flash/nor/mspm0.c
index 5ff1d71e4..1ba35374d 100644
--- a/src/flash/nor/mspm0.c
+++ b/src/flash/nor/mspm0.c
@@ -77,6 +77,20 @@
#define SYSCTL_BASE 0x400AF000
#define SYSCTL_SECCFG_SECSTATUS (SYSCTL_BASE + 0x00003048)
+/*
+ * SYSCTL SOCLOCK MCLKCFG register (offset 0x1104 from SYSCTL_BASE).
+ * Used for the FLASH_ERR_01 workaround: accessing FACTORYREGION while MCLK
+ * is sourced from HSCLK (SYSPLL/HFXT, implying MCLK > 32 MHz) with flash
+ * wait-state 2 active causes a hard fault on MSPM0G devices. The flash
+ * controller enforces its wait-state timing for all AHB masters, including
+ * the DAP AHB-AP used by OpenOCD. Temporarily switching MCLK to SYSOSC
+ * (⤠32 MHz on all MSPM0 variants) before reading FACTORYREGION avoids this.
+ */
+#define SYSCTL_MCLKCFG (SYSCTL_BASE + 0x00001104)
+#define SYSCTL_MCLKCFG_USEHSCLK BIT(16)
+#define SYSCTL_MCLKCFG_FLASHWAIT_MASK GENMASK(11, 8)
+#define SYSCTL_MCLKCFG_FLASHWAIT_2 (2U << 8)
+
/* TI manufacturer ID */
#define TI_MANUFACTURER_ID 0x17
@@ -474,30 +488,94 @@ static int mspm0_read_part_info(struct flash_bank *bank)
struct target *target = bank->target;
const struct mspm0_family_info *minfo = NULL;
+ /*
+ * FLASH_ERR_01 workaround: on MSPM0G devices the flash controller
+ * rejects any bus-master access to FACTORYREGION when MCLK is sourced
+ * from HSCLK (SYSPLL/HFXT) and flash wait-state 2 is active
+ * (required for MCLK > 32 MHz). This applies to DAP AHB-AP reads too,
+ * not just CPU accesses. If both conditions are true, temporarily
+ * switch MCLK back to SYSOSC (⤠32 MHz on every MSPM0 variant) for the
+ * FACTORYREGION reads and restore afterwards. The SYSCTL_MCLKCFG write
+ * does not take place on L/C parts: USEHSCLK is never set there because
+ * those cores do not exceed 32 MHz.
+ */
+ uint32_t saved_mclkcfg = 0;
+ bool mclk_switched = false;
+ uint32_t mclkcfg;
+ int retval = target_read_u32(target, SYSCTL_MCLKCFG, &mclkcfg);
+ if (retval != ERROR_OK) {
+ LOG_ERROR("Failed to read SYSCTL_MCLKCFG to check FLASH_ERR_01");
+ return retval;
+ }
+
+ if ((mclkcfg & SYSCTL_MCLKCFG_USEHSCLK) &&
+ ((mclkcfg & SYSCTL_MCLKCFG_FLASHWAIT_MASK) == SYSCTL_MCLKCFG_FLASHWAIT_2)) {
+ saved_mclkcfg = mclkcfg;
+ retval = target_write_u32(target, SYSCTL_MCLKCFG,
+ mclkcfg & ~SYSCTL_MCLKCFG_USEHSCLK);
+ if (retval == ERROR_OK) {
+ mclk_switched = true;
+ /*
+ * Read back MCLKCFG to flush the write, then add an
+ * explicit delay to allow the MCLK source mux to fully
+ * settle on SYSOSC before the flash controller timing is
+ * used for FACTORYREGION accesses.
+ */
+ uint32_t dummy;
+ retval = target_read_u32(target, SYSCTL_MCLKCFG, &dummy);
+ if (retval != ERROR_OK) {
+ LOG_ERROR("MSPM0: FLASH_ERR_01 workaround: "
+ "readback flush failed");
+ goto restore_mclk;
+ }
+ alive_sleep(1);
+ LOG_DEBUG("MSPM0: FLASH_ERR_01 workaround ACTIVE: "
+ "Lowering MCLK before FACTORYREGION read");
+ } else {
+ LOG_ERROR("MSPM0: FLASH_ERR_01 workaround: "
+ "could not lower MCLK before FACTORYREGION read");
+ }
+ }
+
/* Read and parse chip identification and flash version register */
uint32_t did;
- int retval = target_read_u32(target, MSPM0_DID, &did);
+ retval = target_read_u32(target, MSPM0_DID, &did);
if (retval != ERROR_OK) {
LOG_ERROR("Failed to read device ID");
- return retval;
+ goto restore_mclk;
}
retval = target_read_u32(target, MSPM0_TRACEID, &mspm0_info->traceid);
if (retval != ERROR_OK) {
LOG_ERROR("Failed to read trace ID");
- return retval;
+ goto restore_mclk;
}
uint32_t userid;
retval = target_read_u32(target, MSPM0_USERID, &userid);
if (retval != ERROR_OK) {
LOG_ERROR("Failed to read user ID");
- return retval;
+ goto restore_mclk;
}
uint32_t flashram;
retval = target_read_u32(target, MSPM0_SRAMFLASH, &flashram);
if (retval != ERROR_OK) {
LOG_ERROR("Failed to read sramflash register");
- return retval;
+ goto restore_mclk;
+ }
+
+restore_mclk:
+ if (mclk_switched) {
+ int retval2 = target_write_u32(target, SYSCTL_MCLKCFG, saved_mclkcfg);
+ if (retval2 != ERROR_OK) {
+ LOG_ERROR("MSPM0: FLASH_ERR_01 workaround: "
+ "could not restore MCLK after FACTORYREGION read");
+ return retval2;
+ }
+ LOG_DEBUG("MSPM0: FLASH_ERR_01 workaround: "
+ "restored MCLK after FACTORYREGION read");
}
+ if (retval != ERROR_OK)
+ return retval;
+
uint32_t flashdesc;
retval = target_read_u32(target, FCTL_REG_DESC, &flashdesc);
if (retval != ERROR_OK) {
@@ -1157,6 +1235,19 @@ static int mspm0_probe(struct flash_bank *bank)
mspm0_info->protect_reg_count = 1;
break;
case MSPM0_FLASH_BASE_MAIN:
+ if (!mspm0_info->main_flash_size_kb) {
+ /*
+ * FACTORYREGION was unreadable when this bank was probed
+ * (e.g. device not yet halted, MCLK still at HSCLK on
+ * first examine). Clear did so the next auto_probe call
+ * re-runs mspm0_read_part_info with the target in a known
+ * state.
+ */
+ LOG_WARNING("MSPM0: main flash size is 0 â "
+ "FACTORYREGION data incomplete, scheduling re-probe");
+ mspm0_info->did = 0;
+ return ERROR_FLASH_BANK_NOT_PROBED;
+ }
bank->size = (mspm0_info->main_flash_size_kb * 1024);
bank->num_sectors = bank->size / mspm0_info->sector_size;
/*
-----------------------------------------------------------------------
Summary of changes:
src/flash/nor/mspm0.c | 101 +++++++++++++++++++++++++++++++++++++++++++++++---
1 file changed, 96 insertions(+), 5 deletions(-)
hooks/post-receive
--
Main OpenOCD repository
|
