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[OpenOCD-commit] Main OpenOCD repository branch, master, updated. v0.12.0-1232-g6d51e6b90

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commit 6d51e6b900a1d2ec2446f042c8294109ecda7483
Author: Marc Schink <de...@za...>
Date:   Mon Aug 25 15:11:06 2025 +0000

    tcl/interface: Remove flashlink config
    
    Remove the configuration file, a replacement is already available.
    
    Link the old filename to the new configuration file to ensure backwards
    compatibility.
    
    Change-Id: I77cbd62d805b1c9b9bb8f56a823c3f6476d1a5a9
    Signed-off-by: Marc Schink <de...@za...>
    Reviewed-on: https://review.openocd.org/c/openocd/+/9150
    Reviewed-by: Antonio Borneo <bor...@gm...>
    Tested-by: jenkins

diff --git a/tcl/file_renaming.cfg b/tcl/file_renaming.cfg
index 9b5fedbb1..79932473e 100644
--- a/tcl/file_renaming.cfg
+++ b/tcl/file_renaming.cfg
@@ -21,4 +21,5 @@ set _file_renaming {
 	board/stm32mp15x_dk2.cfg		board/st/stm32mp157f-dk2.cfg
 	board/sifive-hifive1-revb.cfg		board/sifive/hifive1-rev-b.cfg
 	interface/chameleon.cfg			interface/parport/chameleon.cfg
+	interface/flashlink.cfg			interface/parport/flashlink.cfg
 }
diff --git a/tcl/interface/flashlink.cfg b/tcl/interface/flashlink.cfg
deleted file mode 100644
index d552c50a6..000000000
--- a/tcl/interface/flashlink.cfg
+++ /dev/null
@@ -1,18 +0,0 @@
-# SPDX-License-Identifier: GPL-2.0-or-later
-
-#
-# ST FlashLINK JTAG parallel cable
-#
-# http://www.st.com/internet/evalboard/product/94023.jsp
-# http://www.st.com/stonline/products/literature/um/7889.pdf
-#
-
-if { [info exists PARPORTADDR] } {
-   set _PARPORTADDR $PARPORTADDR
-} else {
-   set _PARPORTADDR 0
-}
-
-adapter driver parport
-parport port $_PARPORTADDR
-parport cable flashlink

commit 4805ecad761d447f6fd6d5a243289e02f4251812
Author: Marc Schink <de...@za...>
Date:   Mon Aug 25 15:09:22 2025 +0000

    tcl/interface: Remove chameleon config
    
    Remove the configuration file, a replacement is already available.
    
    Link the old filename to the new configuration file to ensure backwards
    compatibility.
    
    Change-Id: I11361e471bb7ec277a850f956e51cd7d0fab408d
    Signed-off-by: Marc Schink <de...@za...>
    Reviewed-on: https://review.openocd.org/c/openocd/+/9149
    Reviewed-by: Antonio Borneo <bor...@gm...>
    Tested-by: jenkins

diff --git a/tcl/file_renaming.cfg b/tcl/file_renaming.cfg
index 8950f6cd6..9b5fedbb1 100644
--- a/tcl/file_renaming.cfg
+++ b/tcl/file_renaming.cfg
@@ -20,4 +20,5 @@ set _file_renaming {
 	board/stm32mp13x_dk.cfg			board/st/stm32mp135f-dk.cfg
 	board/stm32mp15x_dk2.cfg		board/st/stm32mp157f-dk2.cfg
 	board/sifive-hifive1-revb.cfg		board/sifive/hifive1-rev-b.cfg
+	interface/chameleon.cfg			interface/parport/chameleon.cfg
 }
diff --git a/tcl/interface/chameleon.cfg b/tcl/interface/chameleon.cfg
deleted file mode 100644
index b73d129f0..000000000
--- a/tcl/interface/chameleon.cfg
+++ /dev/null
@@ -1,10 +0,0 @@
-# SPDX-License-Identifier: GPL-2.0-or-later
-
-#
-# Amontec Chameleon POD
-#
-# http://www.amontec.com/chameleon.shtml
-#
-
-adapter driver parport
-parport cable chameleon

-----------------------------------------------------------------------

Summary of changes:
 tcl/file_renaming.cfg       |  2 ++
 tcl/interface/chameleon.cfg | 10 ----------
 tcl/interface/flashlink.cfg | 18 ------------------
 3 files changed, 2 insertions(+), 28 deletions(-)
 delete mode 100644 tcl/interface/chameleon.cfg
 delete mode 100644 tcl/interface/flashlink.cfg


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- Log -----------------------------------------------------------------
commit 382f067b6ee51229d8b502362722fa22d36edcfe
Author: Marek Kraus <gam...@ou...>
Date:   Sat Mar 22 15:36:45 2025 +0100

    tcl/target: add Bouffalo Lab BL616 chip series support
    
    Adds support for BL616 series of chips, BL616 and BL618.
    No flash bank support yet.
    
    BL616 in comparison with BL602-series have new architecture,
    using T-Head E907 RISC-V cores, instead of SiFive ones.
    
    As BL602-series, the ndmreset bit in RISC-V Debug Module
    does not reset the chip as it should, so we need to do it
    manually with registers almost the same way as in BL602.
    
    Additionally, JTAG Debug Transport Module in the chip have wrongly
    implemented Test-Logic-Reset state, causing automatic chain scan
    not working at all after initial JTAG usage. This is because
    Test-Logic-State do not set IR instruction to IDCODE,
    as it should by JTAG spec. We can fix this by getting state machine
    to known state and configure IR instruction manually to IDCODE.
    This bug was so far found in T-Head C906 and E907 IP cores.
    
    This patch was tested heavily and works reliably on
    BL616, BL618 and QCC74X.
    
    Change-Id: Idc80a702e817d78fc0ca925572c68d4d0c28ce4e
    Signed-off-by: Marek Kraus <gam...@ou...>
    Reviewed-on: https://review.openocd.org/c/openocd/+/9145
    Tested-by: jenkins
    Reviewed-by: Antonio Borneo <bor...@gm...>

diff --git a/tcl/target/bl616.cfg b/tcl/target/bl616.cfg
new file mode 100644
index 000000000..ee59f1850
--- /dev/null
+++ b/tcl/target/bl616.cfg
@@ -0,0 +1,145 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+# Author: Marek Kraus <gam...@ga...>
+
+#
+# Bouffalo Labs BL616 and BL618 target
+#
+# Default JTAG pins: (if not changed by eFuse configuration)
+# TMS - GPIO0
+# TCK - GPIO1
+# TDO - GPIO2
+# TDI - GPIO3
+#
+
+source [find mem_helper.tcl]
+
+transport select jtag
+
+if { [info exists CHIPNAME] } {
+	set _CHIPNAME $CHIPNAME
+} else {
+	set _CHIPNAME bl616
+}
+
+jtag newtap $_CHIPNAME cpu -irlen 5 -expected-id 0x10000b6f
+
+set _TARGETNAME $_CHIPNAME.cpu
+target create $_TARGETNAME riscv -chain-position $_TARGETNAME
+
+riscv set_mem_access progbuf
+riscv set_enable_virt2phys off
+
+$_TARGETNAME configure -work-area-phys 0x40000000 -work-area-size 0x10000 -work-area-backup 1
+
+adapter speed 4000
+
+# Useful functions
+set dmcontrol 		0x10
+set dmcontrol_dmactive	[expr {1 << 0}]
+set dmcontrol_haltreq	[expr {1 << 31}]
+
+# By spec, ndmreset should reset whole chip. This implementation resets only few parts of the chip.
+# CTRL_PWRON_RESET register in GLB core triggers full "power-on like" reset, so we use it instead
+# for full software reset.
+$_TARGETNAME configure -event reset-assert {
+	halt
+
+	# To stay in BootROM until JTAG re-attaches, we are using BootROM functionality
+	# to force ISP mode, so BootROM looks out for external ISP communication.
+
+	# In HBN_RSV2, set HBN_RELEASE_CORE to HBN_RELEASE_CORE_FLAG (4)
+	# and HBN_USER_BOOT_SEL to 1 (ISP)
+	mww 0x2000f108 0x44000000
+
+	# Switch clock to internal RC32M
+	# In HBN_GLB, set ROOT_CLK_SEL = 0
+	mmw 0x2000f030 0x0 0x00000002
+
+	# In GLB_SYS_CFG0, set REG_BCLK_DIV and REG_HCLK_DIV = 0
+	mmw 0x20000090 0x0 0x00FFFF00
+
+	# Trigger BCLK ACT pulse
+	# In GLB_SYS_CFG1, set BCLK_DIV_ACT_PULSE = 1
+	mmw 0x20000094 0x1 0x00000001
+	# In GLB_SYS_CFG1, wait for GLB_STS_BCLK_PROT_DONE to become 1
+	while { [expr {[mrw 0x20000094] & 4}] == 0 } { sleep 1 }
+
+	# In GLB_SWRST_CFG2, clear CTRL_PWRON_RESET
+	mmw 0x20000548 0x0 0x00000001
+
+	# This Software reset method resets everything, so CPU as well.
+	# It does that in not much good way, resulting in Debug Module being reset as well.
+	# This also means, that right after CPU and Debug Module are turned on, we need to
+	# enable Debug Module and halt CPU if needed. Additionally, we trigger this SW reset
+	# through program buffer access directly with DMI commands, to avoid errors printed by
+	# OpenOCD about unsuccessful register write.
+
+	# In GLB_SWRST_CFG2, set CTRL_PWRON_RESET to 1
+	set_reg {fp 0x20000548 s1 0x01}
+	riscv dmi_write 0x20 0x00942023
+	riscv dmi_write 0x17 0x40000
+
+	# We need to wait for chip to finish reset and execute BootROM
+	sleep 10
+
+	# JTAG Debug Transport Module is reset as well, so we need to get into RUN/IDLE state
+	runtest 10
+
+	# We need to enable Debug Module and halt the CPU, so we can reset Program Counter
+	# and to do additional clean-ups. If reset was called without halt, resume is handled
+	# by reset-deassert-post event handler.
+
+	# In Debug Module Control (dmcontrol), set dmactive to 1 and then haltreq to 1
+	riscv dmi_write $::dmcontrol $::dmcontrol_dmactive
+	riscv dmi_write $::dmcontrol [ expr {$::dmcontrol_dmactive | $::dmcontrol_haltreq} ]
+}
+
+$_TARGETNAME configure -event reset-deassert-post {
+	# Set Program Counter to start of BootROM and execute one instruction
+	step 0x90000000
+
+	# When using default JTAG pinout, BOOT pin is the same as JTAG TDO pin.
+	# Since after reset we set PC to start of the BootROM,
+	# BootROM will execute also check of BOOT pin, which will disable TDO pin,
+	# to check the BOOT pin state. This leads to temporary loss of JTAG access
+	# and causes (recoverable) errors in OpenOCD. We can bypass the BOOT pin check
+	# function, by forcing booting from Media/SPI Flash.
+
+	# In HBN_RSV2, set HBN_RELEASE_CORE to HBN_RELEASE_CORE_FLAG (4)
+	# and HBN_USER_BOOT_SEL to 2 (Media/SPI Flash)
+	mww 0x2000f108 0x48000000
+
+	# Resume the processor if reset was triggered without halt request
+	if {$halt == 0} {
+		resume
+	}
+}
+
+# According to JTAG spec (IEEE 1149.1), when chip enters "Test-Logic-Reset" state,
+# the IR instruction should be set to "IDCODE" or "BYPASS" (when chip does not have IDCODE).
+# This is done so automatic chain scan can detect all the chips within JTAG chain without knowing IDCODE.
+# JTAG Debug Transport Module (DTM) used in this chip, developed by T-Head (formerly C-Sky)
+# does not implement this, so OpenOCD can't detect the chip anymore after the IR instruction is changed.
+# This workaround gets chip into known state, and manually set IR instruction to IDCODE,
+# which is 0x01, standardized by RISC-V Debug Specification.
+proc init_reset { mode } {
+	if {[using_jtag]} {
+		# Get JTAG SM to known state
+		runtest 10
+		# Set IR to IDCODE
+		irscan $::_CHIPNAME.cpu 0x01
+		jtag arp_init-reset
+	}
+}
+
+proc jtag_init {} {
+	# Get JTAG SM to known state
+	runtest 10
+	# Set IR to IDCODE
+	irscan $::_CHIPNAME.cpu 0x01
+
+	if {[catch {jtag arp_init} err]!=0} {
+		# try resetting additionally
+		init_reset startup
+	}
+}

-----------------------------------------------------------------------

Summary of changes:
 tcl/target/bl616.cfg | 145 +++++++++++++++++++++++++++++++++++++++++++++++++++
 1 file changed, 145 insertions(+)
 create mode 100644 tcl/target/bl616.cfg


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commit 34d76b805ef974825b5b69e036fcc0835679fc72
Author: Antonio Borneo <bor...@gm...>
Date:   Sat Sep 13 10:15:21 2025 +0200

    README: add instructions for missing INSTALL file
    
    The file INSTALL has been dropped in 2009 with [1] and it has been
    replaced by the INSTALL file generated by automake.
    The file INSTALL is only present in official releases of OpenOCD
    and not in the code cloned from git.
    
    Add a note in README to report this inconsistency.
    
    Change-Id: I881b4282550a80bd5a6c61baff05543714a2e9c5
    Reported-by: Mats <ma...@us...>
    Signed-off-by: Antonio Borneo <bor...@gm...>
    Fixes: https://sourceforge.net/p/openocd/tickets/451/
    Link: [1] commit ef733b48e9f8 ("Switch automake handling to use
            --gnu mode, not --foreign. Remove INSTALL file; automake
            generates a copy of the latest version.")
    Reviewed-on: https://review.openocd.org/c/openocd/+/9121
    Tested-by: jenkins

diff --git a/README b/README
index 875c85de3..73aa3a630 100644
--- a/README
+++ b/README
@@ -191,6 +191,11 @@ and compiling the OpenOCD source code. That file is provided by
 default for all GNU autotools packages. If you are not familiar with
 the GNU autotools, then you should read those instructions first.
 
+Note: if the INSTALL file is not present, it means you are using the
+source code from a development branch, not from an OpenOCD release.
+In this case, follow the instructions 'Compiling OpenOCD' below and
+the file will be created by the first command './bootstrap'.
+
 The remainder of this document tries to provide some instructions for
 those looking for a quick-install.
 

-----------------------------------------------------------------------

Summary of changes:
 README | 5 +++++
 1 file changed, 5 insertions(+)


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- Log -----------------------------------------------------------------
commit 5fa74d4ee8739ef15d529ce0d4a49d129ce6f517
Author: EasyDevKits <in...@ea...>
Date:   Wed Sep 3 22:21:21 2025 +0200

    jtag/ch347: Refine driver and configs for EasyDevKits adapters
    
    This commit improves support for CH347-based JTAG adapters:
    
    - configure.ac: removed "Mode3" restriction (CH347F does not require mode).
    - configs: added board config for ESP32-WROVER-E WCH JTAG DevKit and
      ESP32-WROVER-E FTDI JTAG DevKit
    - ch347 driver: removed `ch347 activity_led` command; activity LED
      is now controlled via the generic `adapter gpio led` command.
    - doc/openocd.texi: updated documentation accordingly.
    
    Change-Id: I5524290297adcc004e00af919181868d2b6303af
    Signed-off-by: EasyDevKits <in...@ea...>
    Reviewed-on: https://review.openocd.org/c/openocd/+/9015
    Reviewed-by: zapb <de...@za...>
    Tested-by: jenkins
    Reviewed-by: Tomas Vanek <va...@fb...>
    Reviewed-by: Antonio Borneo <bor...@gm...>

diff --git a/configure.ac b/configure.ac
index ed26d45e1..128c565a0 100644
--- a/configure.ac
+++ b/configure.ac
@@ -129,7 +129,7 @@ m4_define([ADAPTER_OPT], [m4_translit(ADAPTER_ARG($1), [_], [-])])
 
 m4_define([USB1_ADAPTERS],
 	[[[ftdi], [MPSSE mode of FTDI based devices], [FTDI]],
-	[[ch347], [Mode 3 of CH347 based devices], [CH347]],
+	[[ch347], [CH347 based devices], [CH347]],
 	[[stlink], [ST-Link Programmer], [HLADAPTER_STLINK]],
 	[[ti_icdi], [TI ICDI JTAG Programmer], [HLADAPTER_ICDI]],
 	[[ulink], [Keil ULINK JTAG Programmer], [ULINK]],
diff --git a/doc/openocd.texi b/doc/openocd.texi
index 6301077fc..d6f9736b8 100644
--- a/doc/openocd.texi
+++ b/doc/openocd.texi
@@ -2590,6 +2590,9 @@ mitigates the problem.
 @end itemize
 @end itemize
 
+The driver supports activity LED through the generic
+command @ref{adapter gpio, @command{adapter gpio led}}.
+
 This driver has these driver-specific command:
 
 @deffn {Config Command} {ch347 vid_pid} [vid pid]+
@@ -2609,17 +2612,6 @@ and product ID will be connected.
 ch347 device_desc "EasyDevKit"
 @end example
 @end deffn
-
-@deffn {Config Command} {ch347 activity_led} [n]gpio_number
-If specified the drive let an activity LED blink during JTAG operations.
-The number is the GPIO number of the CH347T chip. If prefixed with "n",
-then this GPIO should be low active. The example configures GPIO4 as
-low active activity LED. For the CH347T chip only GPIO3 (Pin11 / SCL),
-GPIO4 (Pin15 / ACT), GPIO5 (Pin9 / TRST) and GPIO6 (Pin2 / CTS1) are possible.
-@example
-ch347 activity_led n4
-@end example
-@end deffn
 @end deffn
 
 @deffn {Interface Driver} {cmsis-dap}
diff --git a/src/jtag/drivers/ch347.c b/src/jtag/drivers/ch347.c
index 6a848ba7c..c031ceece 100644
--- a/src/jtag/drivers/ch347.c
+++ b/src/jtag/drivers/ch347.c
@@ -48,6 +48,7 @@
 #include <jtag/interface.h>
 #include <jtag/commands.h>
 #include <jtag/swd.h>
+#include <jtag/adapter.h>
 #include <helper/time_support.h>
 #include <helper/replacements.h>
 #include <helper/list.h>
@@ -1805,32 +1806,6 @@ COMMAND_HANDLER(ch347_handle_device_desc_command)
 	return ERROR_OK;
 }
 
-/**
- * @brief The command handler for configuring which GPIO pin is used as activity LED
- *
- * @return ERROR_OK at success; ERROR_COMMAND_SYNTAX_ERROR otherwise
- */
-COMMAND_HANDLER(ch347_handle_activity_led_command)
-{
-	if (CMD_ARGC != 1)
-		return ERROR_COMMAND_SYNTAX_ERROR;
-
-	uint8_t gpio;
-	if (CMD_ARGV[0][0] == 'n') {
-		COMMAND_PARSE_NUMBER(u8, &CMD_ARGV[0][1], gpio);
-		ch347_activity_led_active_high = false;
-	} else {
-		COMMAND_PARSE_NUMBER(u8, CMD_ARGV[0], gpio);
-		ch347_activity_led_active_high = true;
-	}
-
-	if (gpio >= GPIO_CNT || (BIT(gpio) & USEABLE_GPIOS) == 0)
-		return ERROR_COMMAND_ARGUMENT_INVALID;
-
-	ch347_activity_led_gpio_pin = gpio;
-	return ERROR_OK;
-}
-
 static const struct command_registration ch347_subcommand_handlers[] = {
 	{
 		.name = "vid_pid",
@@ -1846,13 +1821,6 @@ static const struct command_registration ch347_subcommand_handlers[] = {
 		.help = "set the USB device description of the CH347 device",
 		.usage = "description_string",
 	},
-	{
-		.name = "activity_led",
-		.handler = &ch347_handle_activity_led_command,
-		.mode = COMMAND_CONFIG,
-		.help = "if set this CH347 GPIO pin is the JTAG activity LED; start with n for active low output",
-		.usage = "[n]gpio_number",
-	},
 	COMMAND_REGISTRATION_DONE
 };
 
@@ -1867,6 +1835,25 @@ static const struct command_registration ch347_command_handlers[] = {
 	COMMAND_REGISTRATION_DONE
 };
 
+/**
+ * @brief Configure which GPIO pin is used as the activity LED.
+ *
+ * Updates the global activity LED GPIO pin and polarity settings
+ * based on the provided configuration. If the given GPIO is not
+ * usable, the function returns without making changes.
+ *
+ * @param led_config Pointer to the GPIO configuration structure for the LED pin
+ */
+static void ch347_configure_activity_led(const struct adapter_gpio_config *led_config)
+{
+	uint8_t gpio = led_config->gpio_num;
+	if (gpio >= GPIO_CNT || (BIT(gpio) & USEABLE_GPIOS) == 0)
+		return;
+
+	ch347_activity_led_gpio_pin = gpio;
+	ch347_activity_led_active_high = !led_config->active_low;
+}
+
 /**
  * @brief CH347 Initialization function
  *
@@ -1893,6 +1880,8 @@ static int ch347_init(void)
 
 	ch347.pack_size = UNSET;
 
+	ch347_configure_activity_led(&adapter_gpio_get_config()[ADAPTER_GPIO_IDX_LED]);
+
 	if (!swd_mode) {
 		tap_set_state(TAP_RESET);
 	} else {
diff --git a/tcl/board/easydevkits/esp32-wrover-e-ftdi-jtag-devkit.cfg b/tcl/board/easydevkits/esp32-wrover-e-ftdi-jtag-devkit.cfg
new file mode 100644
index 000000000..30cfb5797
--- /dev/null
+++ b/tcl/board/easydevkits/esp32-wrover-e-ftdi-jtag-devkit.cfg
@@ -0,0 +1,37 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+#
+# Example OpenOCD configuration file for the EasyDevKits ESP32-WROVER-E FTDI JTAG DevKit.
+#
+# For example, OpenOCD can be started for ESP32 debugging on
+#
+#   openocd -f board/esp32-wrover-e-ftdi-jtag-devkit.cfg
+#
+
+# Select the FTDI JTAG driver
+adapter driver ftdi
+
+# Identify the device
+ftdi device_desc "EasyDevKit"
+ftdi vid_pid 0x0403 0x6010
+# interface 0 is JTAG; interface 1 is the uart
+ftdi channel 0
+
+# TCK, TDI, TDO, TMS: ADBUS0-3
+# activity LED: ADBUS4
+ftdi layout_init 0x0008 0x001b
+ftdi layout_signal LED -data 0x0010
+
+# Source the ESP32 configuration file
+source [find target/esp32.cfg]
+
+# ---------------------------------------------------------------------------
+# JTAG speed (in kHz)
+#
+# If you encounter DSR/DIR errors that are not caused by OpenOCD
+# attempting to read unmapped memory regions, try lowering this value.
+#
+# Recommended settings for EasyDevKits:
+#   - Do not exceed 20 MHz.
+#   - Best results are typically achieved at 20 MHz.
+# ---------------------------------------------------------------------------
+adapter speed 20000
diff --git a/tcl/board/easydevkits/esp32-wrover-e-wch-jtag-devkit.cfg b/tcl/board/easydevkits/esp32-wrover-e-wch-jtag-devkit.cfg
new file mode 100644
index 000000000..76f1435be
--- /dev/null
+++ b/tcl/board/easydevkits/esp32-wrover-e-wch-jtag-devkit.cfg
@@ -0,0 +1,37 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+#
+# Example OpenOCD configuration file for the EasyDevKits ESP32-WROVER-E WCH JTAG DevKit.
+#
+# For example, OpenOCD can be started for ESP32 debugging on
+#
+#   openocd -f board/esp32-wrover-e-wch-jtag-devkit.cfg
+#
+
+# Select the CH347 JTAG driver
+adapter driver ch347
+
+# Identify the device
+ch347 device_desc "EasyDevKit"
+ch347 vid_pid 0x1a86 0x55dd
+
+# Configure activity LED
+# Note: The LED is active-low on GPIO4.
+adapter gpio led 4 -active-low
+
+# Source the ESP32 configuration file
+source [find target/esp32.cfg]
+
+# ---------------------------------------------------------------------------
+# JTAG speed (in kHz)
+#
+# If you encounter DSR/DIR errors that are not caused by OpenOCD
+# attempting to read unmapped memory regions, try lowering this value.
+#
+# Recommended settings for EasyDevKits:
+#   - Do not exceed 30 MHz.
+#   - Best results are typically achieved at 15 MHz.
+#
+# Supported frequencies (kHz):
+#   469, 938, 1875, 3750, 7500, 15000, 30000, 60000
+# ---------------------------------------------------------------------------
+adapter speed 15000

-----------------------------------------------------------------------

Summary of changes:
 configure.ac                                       |  2 +-
 doc/openocd.texi                                   | 14 ++----
 src/jtag/drivers/ch347.c                           | 55 +++++++++-------------
 .../esp32-wrover-e-ftdi-jtag-devkit.cfg            | 37 +++++++++++++++
 .../easydevkits/esp32-wrover-e-wch-jtag-devkit.cfg | 37 +++++++++++++++
 5 files changed, 100 insertions(+), 45 deletions(-)
 create mode 100644 tcl/board/easydevkits/esp32-wrover-e-ftdi-jtag-devkit.cfg
 create mode 100644 tcl/board/easydevkits/esp32-wrover-e-wch-jtag-devkit.cfg


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       via  8b43a967e59de4eacb65627ea0ff6665dcdb0ac4 (commit)
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- Log -----------------------------------------------------------------
commit 8b43a967e59de4eacb65627ea0ff6665dcdb0ac4
Author: Antonio Borneo <bor...@gm...>
Date:   Mon Sep 22 09:53:43 2025 +0200

    target: cortex_m: add comment for breakpoint of length 3
    
    Add a comment in the breakpoint code to clarify the check for the
    odd breakpoint length of 3 bytes, introduced by [1].
    
    [1]: commit 0a5e03c12aff ("cortex_m.c: Use two byte breakpoint for
         32bit Thumb-2 request").
    
    Change-Id: I024863d10078b5d9062c876aa59ccf70a81bf641
    Signed-off-by: Antonio Borneo <bor...@gm...>
    Reviewed-on: https://review.openocd.org/c/openocd/+/9139
    Reviewed-by: Tomas Vanek <va...@fb...>
    Tested-by: jenkins

diff --git a/src/target/cortex_m.c b/src/target/cortex_m.c
index bfcbbc289..42e957260 100644
--- a/src/target/cortex_m.c
+++ b/src/target/cortex_m.c
@@ -2041,6 +2041,15 @@ int cortex_m_unset_breakpoint(struct target *target, struct breakpoint *breakpoi
 
 int cortex_m_add_breakpoint(struct target *target, struct breakpoint *breakpoint)
 {
+	/*
+	 * GDB packets Z0 and z0 provide the 'kind' parameter that is target-specific
+	 * and typically indicates the size in bytes of the breakpoint.
+	 * But for 32-bit Thumb mode (Thumb-2) breakpoint, GDB provides 'kind = 3' to
+	 * be used to derive the length information. See:
+	 * https://sourceware.org/gdb/current/onlinedocs/gdb.html/ARM-Breakpoint-Kinds.html
+	 * Since there isn't a four byte Thumb-2 breakpoint instruction, always use
+	 * the two bytes breakpoint instruction.
+	 */
 	if (breakpoint->length == 3) {
 		LOG_TARGET_DEBUG(target, "Using a two byte breakpoint for 32bit Thumb-2 request");
 		breakpoint->length = 2;

-----------------------------------------------------------------------

Summary of changes:
 src/target/cortex_m.c | 9 +++++++++
 1 file changed, 9 insertions(+)


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- Log -----------------------------------------------------------------
commit 04da6e2c624658d2c2c5c81f49be2e396bd30490
Author: Antonio Borneo <bor...@gm...>
Date:   Tue Aug 5 12:06:22 2025 +0200

    target: cortex-m: add support for armv8m caches
    
    Cores like Cortex-M7, Cortex-M55 and Cortex-M85 can have either
    D-Cache and/or I-Cache.
    Using SW breakpoints in RAM requires handling these caches.
    
    Detect the presence of cache at examine.
    Detect cache state (enable/disable) at debug entry.
    Take care of caches synchronization through the PoC (usually the
    SRAM) while setting and removing SW breakpoints.
    Add command 'cache_info' to check cache presence and size.
    
    Change-Id: Ice637c215fe3042c8fff57edefbab1b86515ef4b
    Signed-off-by: Antonio Borneo <bor...@gm...>
    Reviewed-on: https://review.openocd.org/c/openocd/+/9077
    Reviewed-by: Tomas Vanek <va...@fb...>
    Tested-by: jenkins

diff --git a/doc/openocd.texi b/doc/openocd.texi
index 7f7c8892f..6301077fc 100644
--- a/doc/openocd.texi
+++ b/doc/openocd.texi
@@ -11120,6 +11120,10 @@ Enable or disable trace output for all ITM stimulus ports.
 @subsection Cortex-M specific commands
 @cindex Cortex-M
 
+@deffn {Command} {cortex_m cache_info}
+Report information about the type and size of the cache, if present.
+@end deffn
+
 @deffn {Command} {cortex_m maskisr} (@option{auto}|@option{on}|@option{off}|@option{steponly})
 Control masking (disabling) interrupts during target step/resume.
 
diff --git a/src/target/Makefile.am b/src/target/Makefile.am
index 1a7686418..0b5a85704 100644
--- a/src/target/Makefile.am
+++ b/src/target/Makefile.am
@@ -75,6 +75,7 @@ ARMV6_SRC = \
 
 ARMV7_SRC = \
 	%D%/armv7m.c \
+	%D%/armv7m_cache.c \
 	%D%/armv7m_trace.c \
 	%D%/cortex_m.c \
 	%D%/armv7a.c \
@@ -183,6 +184,7 @@ ARC_SRC = \
 	%D%/armv4_5_cache.h \
 	%D%/armv7a.h \
 	%D%/armv7m.h \
+	%D%/armv7m_cache.h \
 	%D%/armv7m_trace.h \
 	%D%/armv8.h \
 	%D%/armv8_dpm.h \
diff --git a/src/target/armv7m.h b/src/target/armv7m.h
index 86c45f7f2..942e22584 100644
--- a/src/target/armv7m.h
+++ b/src/target/armv7m.h
@@ -15,6 +15,7 @@
 #define OPENOCD_TARGET_ARMV7M_H
 
 #include "arm.h"
+#include "armv7m_cache.h"
 #include "armv7m_trace.h"
 
 struct adiv5_ap;
@@ -239,6 +240,8 @@ struct armv7m_common {
 	/* hla_target uses a high level adapter that does not support all functions */
 	bool is_hla_target;
 
+	struct armv7m_cache_common armv7m_cache;
+
 	struct armv7m_trace_config trace_config;
 
 	/* Direct processor core register read and writes */
diff --git a/src/target/armv7m_cache.c b/src/target/armv7m_cache.c
new file mode 100644
index 000000000..cb57c0e25
--- /dev/null
+++ b/src/target/armv7m_cache.c
@@ -0,0 +1,284 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
+/*
+ * Copyright (C) 2025 by STMicroelectronics
+ * Copyright (C) 2025 by Antonio Borneo <bor...@gm...>
+ */
+
+#ifdef HAVE_CONFIG_H
+#include "config.h"
+#endif
+
+#include <stdint.h>
+
+#include <helper/align.h>
+#include <helper/bitfield.h>
+#include <helper/bits.h>
+#include <helper/command.h>
+#include <helper/log.h>
+#include <helper/types.h>
+#include <target/arm_adi_v5.h>
+#include <target/armv7m_cache.h>
+#include <target/cortex_m.h>
+
+static int get_cache_info(struct adiv5_ap *ap, unsigned int cl,
+	unsigned int ind, uint32_t *ccsidr)
+{
+	uint32_t csselr = FIELD_PREP(CSSELR_LEVEL_MASK, cl)
+					| FIELD_PREP(CSSELR_IND_MASK, ind);
+
+	int retval = mem_ap_write_u32(ap, CSSELR, csselr);
+	if (retval != ERROR_OK)
+		return retval;
+
+	return mem_ap_read_u32(ap, CCSIDR, ccsidr);
+}
+
+static int get_d_u_cache_info(struct adiv5_ap *ap, unsigned int cl,
+	uint32_t *ccsidr)
+{
+	return get_cache_info(ap, cl, CSSELR_IND_DATA_OR_UNIFIED_CACHE, ccsidr);
+}
+
+static int get_i_cache_info(struct adiv5_ap *ap, unsigned int cl,
+	uint32_t *ccsidr)
+{
+	return get_cache_info(ap, cl, CSSELR_IND_INSTRUCTION_CACHE, ccsidr);
+}
+
+static struct armv7m_cache_size decode_ccsidr(uint32_t ccsidr)
+{
+	struct armv7m_cache_size size;
+
+	size.line_len = 16 << FIELD_GET(CCSIDR_LINESIZE_MASK, ccsidr);
+	size.associativity = FIELD_GET(CCSIDR_ASSOCIATIVITY_MASK, ccsidr) + 1;
+	size.num_sets = FIELD_GET(CCSIDR_NUMSETS_MASK, ccsidr) + 1;
+	size.cache_size = size.line_len * size.associativity * size.num_sets / 1024;
+
+	// compute info for set way operation on cache
+	size.index_shift = FIELD_GET(CCSIDR_LINESIZE_MASK, ccsidr) + 2;
+	size.index = FIELD_GET(CCSIDR_NUMSETS_MASK, ccsidr);
+	size.way = FIELD_GET(CCSIDR_ASSOCIATIVITY_MASK, ccsidr);
+
+	unsigned int i = 0;
+	while (((size.way << i) & 0x80000000) == 0)
+		i++;
+	size.way_shift = i;
+
+	return size;
+}
+
+int armv7m_identify_cache(struct target *target)
+{
+	struct armv7m_common *armv7m = target_to_armv7m(target);
+	struct armv7m_cache_common *cache = &armv7m->armv7m_cache;
+
+	uint32_t clidr;
+	int retval = mem_ap_read_u32(armv7m->debug_ap, CLIDR, &clidr);
+	if (retval != ERROR_OK)
+		return retval;
+
+	uint32_t ctr;
+	retval = mem_ap_read_u32(armv7m->debug_ap, CTR, &ctr);
+	if (retval != ERROR_OK)
+		return retval;
+
+	//  retrieve selected cache for later restore
+	uint32_t csselr;
+	retval = mem_ap_read_atomic_u32(armv7m->debug_ap, CSSELR, &csselr);
+	if (retval != ERROR_OK)
+		return retval;
+
+	if (clidr == 0) {
+		LOG_TARGET_DEBUG(target, "No cache detected");
+		return ERROR_OK;
+	}
+
+	if (FIELD_GET(CTR_FORMAT_MASK, ctr) != CTR_FORMAT_PROVIDED) {
+		LOG_ERROR("Wrong value in CTR register");
+		return ERROR_FAIL;
+	}
+
+	cache->i_min_line_len = 4UL << FIELD_GET(CTR_IMINLINE_MASK, ctr);
+	cache->d_min_line_len = 4UL << FIELD_GET(CTR_DMINLINE_MASK, ctr);
+	LOG_TARGET_DEBUG(target,
+		"ctr=0x%" PRIx32 " ctr.i_min_line_len=%" PRIu32 " ctr.d_min_line_len=%" PRIu32,
+		ctr, cache->i_min_line_len, cache->d_min_line_len);
+
+	cache->loc = FIELD_GET(CLIDR_LOC_MASK, clidr);
+	LOG_TARGET_DEBUG(target,
+		"clidr=0x%" PRIx32 " Number of cache levels to PoC=%" PRIu32,
+		clidr, cache->loc);
+
+	// retrieve all available inner caches
+	uint32_t d_u_ccsidr[8], i_ccsidr[8];
+	for (unsigned int cl = 0; cl < cache->loc; cl++) {
+		unsigned int ctype = FIELD_GET(CLIDR_CTYPE_MASK(cl + 1), clidr);
+
+		// skip reserved values
+		if (ctype > CLIDR_CTYPE_UNIFIED_CACHE)
+			continue;
+
+		cache->arch[cl].ctype = ctype;
+
+		// separate d or unified d/i cache at this level ?
+		if (ctype & (CLIDR_CTYPE_UNIFIED_CACHE | CLIDR_CTYPE_D_CACHE)) {
+			// retrieve d-cache info
+			retval = get_d_u_cache_info(armv7m->debug_ap, cl, &d_u_ccsidr[cl]);
+			if (retval != ERROR_OK)
+				break;
+		}
+
+		if (ctype & CLIDR_CTYPE_I_CACHE) {
+			// retrieve i-cache info
+			retval = get_i_cache_info(armv7m->debug_ap, cl, &i_ccsidr[cl]);
+			if (retval != ERROR_OK)
+				break;
+		}
+	}
+
+	// restore selected cache
+	int retval1 = mem_ap_write_atomic_u32(armv7m->debug_ap, CSSELR, csselr);
+
+	if (retval != ERROR_OK)
+		return retval;
+	if (retval1 != ERROR_OK)
+		return retval1;
+
+	for (unsigned int cl = 0; cl < cache->loc; cl++) {
+		unsigned int ctype = cache->arch[cl].ctype;
+
+		// separate d or unified d/i cache at this level ?
+		if (ctype & (CLIDR_CTYPE_UNIFIED_CACHE | CLIDR_CTYPE_D_CACHE)) {
+			cache->has_d_u_cache = true;
+			cache->arch[cl].d_u_size = decode_ccsidr(d_u_ccsidr[cl]);
+
+			LOG_TARGET_DEBUG(target,
+				"data/unified cache index %" PRIu32 " << %" PRIu32 ", way %" PRIu32 " << %" PRIu32,
+				cache->arch[cl].d_u_size.index,
+				cache->arch[cl].d_u_size.index_shift,
+				cache->arch[cl].d_u_size.way,
+				cache->arch[cl].d_u_size.way_shift);
+
+			LOG_TARGET_DEBUG(target,
+				"cache line %" PRIu32 " bytes %" PRIu32 " KBytes asso %" PRIu32 " ways",
+				cache->arch[cl].d_u_size.line_len,
+				cache->arch[cl].d_u_size.cache_size,
+				cache->arch[cl].d_u_size.associativity);
+		}
+
+		if (ctype & CLIDR_CTYPE_I_CACHE) {
+			cache->has_i_cache = true;
+			cache->arch[cl].i_size = decode_ccsidr(i_ccsidr[cl]);
+
+			LOG_TARGET_DEBUG(target,
+				"instruction cache index %" PRIu32 " << %" PRIu32 ", way %" PRIu32 " << %" PRIu32,
+				cache->arch[cl].i_size.index,
+				cache->arch[cl].i_size.index_shift,
+				cache->arch[cl].i_size.way,
+				cache->arch[cl].i_size.way_shift);
+
+			LOG_TARGET_DEBUG(target,
+				"cache line %" PRIu32 " bytes %" PRIu32 " KBytes asso %" PRIu32 " ways",
+				cache->arch[cl].i_size.line_len,
+				cache->arch[cl].i_size.cache_size,
+				cache->arch[cl].i_size.associativity);
+		}
+	}
+
+	cache->info_valid = true;
+
+	return ERROR_OK;
+}
+
+int armv7m_d_cache_flush(struct target *target, uint32_t address,
+	unsigned int length)
+{
+	struct armv7m_common *armv7m = target_to_armv7m(target);
+	struct armv7m_cache_common *cache = &armv7m->armv7m_cache;
+
+	if (!cache->info_valid || !cache->has_d_u_cache)
+		return ERROR_OK;
+
+	uint32_t line_len = cache->d_min_line_len;
+	uint32_t addr_line = ALIGN_DOWN(address, line_len);
+	uint32_t addr_end = address + length;
+
+	while (addr_line < addr_end) {
+		int retval = mem_ap_write_u32(armv7m->debug_ap, DCCIMVAC, addr_line);
+		if (retval != ERROR_OK)
+			return retval;
+		addr_line += line_len;
+		keep_alive();
+	}
+
+	return dap_run(armv7m->debug_ap->dap);
+}
+
+int armv7m_i_cache_inval(struct target *target, uint32_t address,
+	unsigned int length)
+{
+	struct armv7m_common *armv7m = target_to_armv7m(target);
+	struct armv7m_cache_common *cache = &armv7m->armv7m_cache;
+
+	if (!cache->info_valid || !cache->has_i_cache)
+		return ERROR_OK;
+
+	uint32_t line_len = cache->i_min_line_len;
+	uint32_t addr_line = ALIGN_DOWN(address, line_len);
+	uint32_t addr_end = address + length;
+
+	while (addr_line < addr_end) {
+		int retval = mem_ap_write_u32(armv7m->debug_ap, ICIMVAU, addr_line);
+		if (retval != ERROR_OK)
+			return retval;
+		addr_line += line_len;
+		keep_alive();
+	}
+
+	return dap_run(armv7m->debug_ap->dap);
+}
+
+int armv7m_handle_cache_info_command(struct command_invocation *cmd,
+	struct target *target)
+{
+	struct armv7m_common *armv7m = target_to_armv7m(target);
+	struct armv7m_cache_common *cache = &armv7m->armv7m_cache;
+
+	if (!target_was_examined(target)) {
+		command_print(cmd, "Target not examined yet");
+		return ERROR_FAIL;
+	}
+
+	if (!cache->info_valid) {
+		command_print(cmd, "No cache detected");
+		return ERROR_OK;
+	}
+
+	for (unsigned int cl = 0; cl < cache->loc; cl++) {
+		struct armv7m_arch_cache *arch = &cache->arch[cl];
+
+		if (arch->ctype & CLIDR_CTYPE_I_CACHE)
+			command_print(cmd,
+				"L%d I-Cache: line length %" PRIu32 ", associativity %" PRIu32
+				", num sets %" PRIu32 ", cache size %" PRIu32 " KBytes",
+				cl + 1,
+				arch->i_size.line_len,
+				arch->i_size.associativity,
+				arch->i_size.num_sets,
+				arch->i_size.cache_size);
+
+		if (arch->ctype & (CLIDR_CTYPE_UNIFIED_CACHE | CLIDR_CTYPE_D_CACHE))
+			command_print(cmd,
+				"L%d %c-Cache: line length %" PRIu32 ", associativity %" PRIu32
+				", num sets %" PRIu32 ", cache size %" PRIu32 " KBytes",
+				cl + 1,
+				(arch->ctype & CLIDR_CTYPE_D_CACHE) ? 'D' : 'U',
+				arch->d_u_size.line_len,
+				arch->d_u_size.associativity,
+				arch->d_u_size.num_sets,
+				arch->d_u_size.cache_size);
+	}
+
+	return ERROR_OK;
+}
diff --git a/src/target/armv7m_cache.h b/src/target/armv7m_cache.h
new file mode 100644
index 000000000..576bff8d6
--- /dev/null
+++ b/src/target/armv7m_cache.h
@@ -0,0 +1,57 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
+/*
+ * Copyright (C) 2025 by STMicroelectronics
+ * Copyright (C) 2025 by Antonio Borneo <bor...@gm...>
+ */
+
+#ifndef OPENOCD_TARGET_ARMV7M_CACHE_H
+#define OPENOCD_TARGET_ARMV7M_CACHE_H
+
+#include <stdbool.h>
+#include <stdint.h>
+
+#include <helper/types.h>
+
+struct target;
+
+struct armv7m_cache_size {
+	// cache dimensioning
+	uint32_t line_len;
+	uint32_t associativity;
+	uint32_t num_sets;
+	uint32_t cache_size;
+	// info for set way operation on cache
+	uint32_t index;
+	uint32_t index_shift;
+	uint32_t way;
+	uint32_t way_shift;
+};
+
+// information about one architecture cache at any level
+struct armv7m_arch_cache {
+	unsigned int ctype;					// cache type, CLIDR encoding
+	struct armv7m_cache_size d_u_size;	// data cache
+	struct armv7m_cache_size i_size;	// instruction cache
+};
+
+// common cache information
+struct armv7m_cache_common {
+	bool info_valid;
+	bool has_i_cache;
+	bool has_d_u_cache;
+	unsigned int loc;					// level of coherency
+	uint32_t d_min_line_len;			// minimum d-cache line_len
+	uint32_t i_min_line_len;			// minimum i-cache line_len
+	struct armv7m_arch_cache arch[6];	// cache info, L1 - L7
+};
+
+int armv7m_identify_cache(struct target *target);
+int armv7m_d_cache_flush(struct target *target, uint32_t address,
+	unsigned int length);
+int armv7m_i_cache_inval(struct target *target, uint32_t address,
+	unsigned int length);
+int armv7m_handle_cache_info_command(struct command_invocation *cmd,
+	struct target *target);
+
+#endif /* OPENOCD_TARGET_ARMV7M_CACHE_H */
diff --git a/src/target/cortex_m.c b/src/target/cortex_m.c
index 047a1d38e..bfcbbc289 100644
--- a/src/target/cortex_m.c
+++ b/src/target/cortex_m.c
@@ -21,6 +21,7 @@
 #include "jtag/interface.h"
 #include "breakpoints.h"
 #include "cortex_m.h"
+#include "armv7m_cache.h"
 #include "target_request.h"
 #include "target_type.h"
 #include "arm_adi_v5.h"
@@ -30,6 +31,7 @@
 #include "arm_semihosting.h"
 #include "smp.h"
 #include <helper/nvp.h>
+#include <helper/string_choices.h>
 #include <helper/time_support.h>
 #include <rtt/rtt.h>
 
@@ -873,6 +875,14 @@ static int cortex_m_debug_entry(struct target *target)
 			return retval;
 	}
 
+	// read caches state
+	uint32_t ccr = 0;
+	if (armv7m->armv7m_cache.info_valid) {
+		retval = mem_ap_read_u32(armv7m->debug_ap, CCR, &ccr);
+		if (retval != ERROR_OK)
+			return retval;
+	}
+
 	/* Load all registers to arm.core_cache */
 	if (!cortex_m->slow_register_read) {
 		retval = cortex_m_fast_read_all_regs(target);
@@ -926,6 +936,11 @@ static int cortex_m_debug_entry(struct target *target)
 		secure_state ? "Secure" : "Non-Secure",
 		target_state_name(target));
 
+	if (armv7m->armv7m_cache.info_valid)
+		LOG_TARGET_DEBUG(target, "D-Cache %s, I-Cache %s",
+			str_enabled_disabled(ccr & CCR_DC_MASK),
+			str_enabled_disabled(ccr & CCR_IC_MASK));
+
 	/* Errata 3092511 workaround
 	 * Cortex-M7 can halt in an incorrect address when breakpoint
 	 * and exception occurs simultaneously */
@@ -1938,12 +1953,25 @@ int cortex_m_set_breakpoint(struct target *target, struct breakpoint *breakpoint
 				breakpoint->orig_instr);
 		if (retval != ERROR_OK)
 			return retval;
+		// make sure data cache is cleaned & invalidated down to PoC
+		retval = armv7m_d_cache_flush(target, breakpoint->address, breakpoint->length);
+		if (retval != ERROR_OK)
+			return retval;
+
 		retval = target_write_memory(target,
 				breakpoint->address & 0xFFFFFFFE,
 				breakpoint->length, 1,
 				code);
 		if (retval != ERROR_OK)
 			return retval;
+		// update i-cache at breakpoint location
+		retval = armv7m_d_cache_flush(target, breakpoint->address, breakpoint->length);
+		if (retval != ERROR_OK)
+			return retval;
+		retval = armv7m_i_cache_inval(target, breakpoint->address, breakpoint->length);
+		if (retval != ERROR_OK)
+			return retval;
+
 		breakpoint->is_set = true;
 	}
 
@@ -1986,12 +2014,25 @@ int cortex_m_unset_breakpoint(struct target *target, struct breakpoint *breakpoi
 		target_write_u32(target, comparator_list[fp_num].fpcr_address,
 			comparator_list[fp_num].fpcr_value);
 	} else {
+		// make sure data cache is cleaned & invalidated down to PoC
+		retval = armv7m_d_cache_flush(target, breakpoint->address, breakpoint->length);
+		if (retval != ERROR_OK)
+			return retval;
+
 		/* restore original instruction (kept in target endianness) */
 		retval = target_write_memory(target, breakpoint->address & 0xFFFFFFFE,
 					breakpoint->length, 1,
 					breakpoint->orig_instr);
 		if (retval != ERROR_OK)
 			return retval;
+
+		// update i-cache at breakpoint location
+		retval = armv7m_d_cache_flush(target, breakpoint->address, breakpoint->length);
+		if (retval != ERROR_OK)
+			return retval;
+		retval = armv7m_i_cache_inval(target, breakpoint->address, breakpoint->length);
+		if (retval != ERROR_OK)
+			return retval;
 	}
 	breakpoint->is_set = false;
 
@@ -2906,6 +2947,12 @@ int cortex_m_examine(struct target *target)
 		LOG_TARGET_INFO(target, "target has %d breakpoints, %d watchpoints",
 			cortex_m->fp_num_code,
 			cortex_m->dwt_num_comp);
+
+		retval = armv7m_identify_cache(target);
+		if (retval != ERROR_OK) {
+			LOG_ERROR("Cannot detect cache");
+			return retval;
+		}
 	}
 
 	return ERROR_OK;
@@ -3238,6 +3285,16 @@ COMMAND_HANDLER(handle_cortex_m_reset_config_command)
 	return ERROR_OK;
 }
 
+COMMAND_HANDLER(handle_cortex_m_cache_info_command)
+{
+	if (CMD_ARGC)
+		return ERROR_COMMAND_SYNTAX_ERROR;
+
+	struct target *target = get_current_target(CMD_CTX);
+
+	return armv7m_handle_cache_info_command(CMD, target);
+}
+
 static const struct command_registration cortex_m_exec_command_handlers[] = {
 	{
 		.name = "maskisr",
@@ -3260,6 +3317,13 @@ static const struct command_registration cortex_m_exec_command_handlers[] = {
 		.help = "configure software reset handling",
 		.usage = "['sysresetreq'|'vectreset']",
 	},
+	{
+		.name = "cache_info",
+		.handler = handle_cortex_m_cache_info_command,
+		.mode = COMMAND_EXEC,
+		.help = "display information about target caches",
+		.usage = "",
+	},
 	{
 		.chain = smp_command_handlers,
 	},
diff --git a/src/target/cortex_m.h b/src/target/cortex_m.h
index 82b2c1ecd..e0a4e8552 100644
--- a/src/target/cortex_m.h
+++ b/src/target/cortex_m.h
@@ -15,6 +15,7 @@
 #define OPENOCD_TARGET_CORTEX_M_H
 
 #include "armv7m.h"
+#include "helper/bitfield.h"
 #include "helper/bits.h"
 
 #define CORTEX_M_COMMON_MAGIC 0x1A451A45U
@@ -114,6 +115,45 @@ struct cortex_m_part_info {
 #define FPU_FPCAR	0xE000EF38
 #define FPU_FPDSCR	0xE000EF3C
 
+// Cache
+#define CCR			0xE000ED14
+#define CLIDR		0xE000ED78
+#define CTR			0xE000ED7C
+#define CCSIDR		0xE000ED80
+#define CSSELR		0xE000ED84
+#define ICIMVAU		0xE000EF58
+#define DCCIMVAC	0xE000EF70
+
+#define CCR_IC_MASK							BIT(17)
+#define CCR_DC_MASK							BIT(16)
+
+#define CLIDR_ICB_MASK						GENMASK(31, 30)
+#define CLIDR_LOUU_MASK						GENMASK(29, 27)
+#define CLIDR_LOC_MASK						GENMASK(26, 24)
+#define CLIDR_LOUIS_MASK					GENMASK(23, 21)
+#define CLIDR_CTYPE_MASK(i)					(GENMASK(2, 0) << (3 * (i) - 3))
+
+#define CLIDR_CTYPE_I_CACHE					BIT(0)
+#define CLIDR_CTYPE_D_CACHE					BIT(1)
+#define CLIDR_CTYPE_UNIFIED_CACHE			BIT(2)
+
+#define CTR_FORMAT_MASK						GENMASK(31, 29)
+#define CTR_CWG_MASK						GENMASK(27, 24)
+#define CTR_ERG_MASK						GENMASK(23, 20)
+#define CTR_DMINLINE_MASK					GENMASK(19, 16)
+#define CTR_IMINLINE_MASK					GENMASK(3, 0)
+
+#define CTR_FORMAT_PROVIDED					0x04
+
+#define CCSIDR_NUMSETS_MASK					GENMASK(27, 13)
+#define CCSIDR_ASSOCIATIVITY_MASK			GENMASK(12, 3)
+#define CCSIDR_LINESIZE_MASK				GENMASK(2, 0)
+
+#define CSSELR_LEVEL_MASK					GENMASK(3, 1)
+#define CSSELR_IND_MASK						BIT(0)
+#define CSSELR_IND_DATA_OR_UNIFIED_CACHE    0
+#define CSSELR_IND_INSTRUCTION_CACHE        1
+
 #define TPIU_SSPSR	0xE0040000
 #define TPIU_CSPSR	0xE0040004
 #define TPIU_ACPR	0xE0040010

-----------------------------------------------------------------------

Summary of changes:
 doc/openocd.texi          |   4 +
 src/target/Makefile.am    |   2 +
 src/target/armv7m.h       |   3 +
 src/target/armv7m_cache.c | 284 ++++++++++++++++++++++++++++++++++++++++++++++
 src/target/armv7m_cache.h |  57 ++++++++++
 src/target/cortex_m.c     |  64 +++++++++++
 src/target/cortex_m.h     |  40 +++++++
 7 files changed, 454 insertions(+)
 create mode 100644 src/target/armv7m_cache.c
 create mode 100644 src/target/armv7m_cache.h


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- Log -----------------------------------------------------------------
commit 2abf8daa80d31dc78877943ad580af7a6fbbbe3f
Author: Marc Schink <de...@za...>
Date:   Mon Apr 15 07:48:31 2024 +0200

    target/cortex_m: Remove echo of 'reset_config' command
    
    Do not echo the selected reset config. This is one of many changes to
    make the behavior of Tcl commands more consistent.
    
    This also avoids stray and confusing messages in the output of OpenOCD.
    For example, the "reset_config" line here:
    
      Open On-Chip Debugger 0.12.0+dev-00802-gb7f0145fc-dirty
      Licensed under GNU GPL v2
      For bug reports, read
            http://openocd.org/doc/doxygen/bugs.html
      cortex_m reset_config sysresetreq
      Info : Listening on port 6666 for tcl connections
      Info : Listening on port 4444 for telnet connections
    
    While at it, fix some coding style and command handling issues.
    
    Change-Id: I3b3d8687af1d23a2dc1764f29b52dc607b80cb59
    Signed-off-by: Marc Schink <de...@za...>
    Reviewed-on: https://review.openocd.org/c/openocd/+/8638
    Reviewed-by: Antonio Borneo <bor...@gm...>
    Tested-by: jenkins

diff --git a/src/target/cortex_m.c b/src/target/cortex_m.c
index c5d668a4d..047a1d38e 100644
--- a/src/target/cortex_m.c
+++ b/src/target/cortex_m.c
@@ -3194,43 +3194,46 @@ COMMAND_HANDLER(handle_cortex_m_reset_config_command)
 {
 	struct target *target = get_current_target(CMD_CTX);
 	struct cortex_m_common *cortex_m = target_to_cm(target);
-	int retval;
-	char *reset_config;
 
-	retval = cortex_m_verify_pointer(CMD, cortex_m);
+	int retval = cortex_m_verify_pointer(CMD, cortex_m);
 	if (retval != ERROR_OK)
 		return retval;
 
-	if (CMD_ARGC > 0) {
-		if (strcmp(*CMD_ARGV, "sysresetreq") == 0)
-			cortex_m->soft_reset_config = CORTEX_M_RESET_SYSRESETREQ;
-
-		else if (strcmp(*CMD_ARGV, "vectreset") == 0) {
-			if (target_was_examined(target)
-					&& !cortex_m->vectreset_supported)
-				LOG_TARGET_WARNING(target, "VECTRESET is not supported on your Cortex-M core!");
-			else
-				cortex_m->soft_reset_config = CORTEX_M_RESET_VECTRESET;
+	if (!CMD_ARGC) {
+		char *reset_config;
 
-		} else
-			return ERROR_COMMAND_SYNTAX_ERROR;
-	}
+		switch (cortex_m->soft_reset_config) {
+		case CORTEX_M_RESET_SYSRESETREQ:
+			reset_config = "sysresetreq";
+			break;
 
-	switch (cortex_m->soft_reset_config) {
-	case CORTEX_M_RESET_SYSRESETREQ:
-		reset_config = "sysresetreq";
-		break;
+		case CORTEX_M_RESET_VECTRESET:
+			reset_config = "vectreset";
+			break;
 
-	case CORTEX_M_RESET_VECTRESET:
-		reset_config = "vectreset";
-		break;
+		default:
+			reset_config = "unknown";
+			break;
+		}
 
-	default:
-		reset_config = "unknown";
-		break;
+		command_print(CMD, "%s", reset_config);
+		return ERROR_OK;
+	} else if (CMD_ARGC != 1) {
+		return ERROR_COMMAND_SYNTAX_ERROR;
 	}
 
-	command_print(CMD, "cortex_m reset_config %s", reset_config);
+	if (!strcmp(CMD_ARGV[0], "sysresetreq")) {
+		cortex_m->soft_reset_config = CORTEX_M_RESET_SYSRESETREQ;
+	} else if (!strcmp(CMD_ARGV[0], "vectreset")) {
+		if (target_was_examined(target)
+				&& !cortex_m->vectreset_supported)
+			LOG_TARGET_WARNING(target, "VECTRESET is not supported on your Cortex-M core");
+		else
+			cortex_m->soft_reset_config = CORTEX_M_RESET_VECTRESET;
+	} else {
+		command_print(CMD, "invalid reset config '%s'", CMD_ARGV[0]);
+		return ERROR_COMMAND_ARGUMENT_INVALID;
+	}
 
 	return ERROR_OK;
 }

-----------------------------------------------------------------------

Summary of changes:
 src/target/cortex_m.c | 57 +++++++++++++++++++++++++++------------------------
 1 file changed, 30 insertions(+), 27 deletions(-)


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- Log -----------------------------------------------------------------
commit e5888bda38f4952e2ae92f7dc5b25fc9a2d1c2b3
Author: Samuel Obuch <sam...@es...>
Date:   Mon Aug 18 22:05:55 2025 +0200

    target/breakpoints: drop duplicate breakpoint/watchpoint "clear_target" functions
    
    We need to cleanup watchpoints on all targets in SMP group when GDB
    connects. Otherwise, the targets will not be consistent.
    Once thats fixed, both *_clear_target functions clearly duplicate
    the corresponding *_remove_all functions.
    
    Change-Id: I8e85dbc66fd3e596990d631ed2aed22959a8ca60
    Signed-off-by: Samuel Obuch <sam...@es...>
    Reviewed-on: https://review.openocd.org/c/openocd/+/9086
    Reviewed-by: Evgeniy Naydanov <evg...@sy...>
    Tested-by: jenkins
    Reviewed-by: Tomas Vanek <va...@fb...>

diff --git a/src/server/gdb_server.c b/src/server/gdb_server.c
index 356dd6ec4..080e3360a 100644
--- a/src/server/gdb_server.c
+++ b/src/server/gdb_server.c
@@ -1041,8 +1041,8 @@ static int gdb_new_connection(struct connection *connection)
 	 * GDB session could leave dangling breakpoints if e.g. communication
 	 * timed out.
 	 */
-	breakpoint_clear_target(target);
-	watchpoint_clear_target(target);
+	breakpoint_remove_all(target);
+	watchpoint_remove_all(target);
 
 	/* Since version 3.95 (gdb-19990504), with the exclusion of 6.5~6.8, GDB
 	 * sends an ACK at connection with the following comment in its source code:
@@ -3219,8 +3219,8 @@ static void gdb_restart_inferior(struct connection *connection, const char *pack
 	struct gdb_connection *gdb_con = connection->priv;
 	struct target *target = get_target_from_connection(connection);
 
-	breakpoint_clear_target(target);
-	watchpoint_clear_target(target);
+	breakpoint_remove_all(target);
+	watchpoint_remove_all(target);
 	command_run_linef(connection->cmd_ctx, "ocd_gdb_restart %s",
 			target_name(target));
 	/* set connection as attached after reset */
diff --git a/src/target/breakpoints.c b/src/target/breakpoints.c
index 54a6145ca..7254eac7d 100644
--- a/src/target/breakpoints.c
+++ b/src/target/breakpoints.c
@@ -412,6 +412,8 @@ static int watchpoint_free(struct target *target, struct watchpoint *watchpoint_
 
 static int watchpoint_remove_all_internal(struct target *target)
 {
+	LOG_TARGET_DEBUG(target, "Delete all watchpoints");
+
 	struct watchpoint *watchpoint = target->watchpoints;
 	int retval = ERROR_OK;
 
@@ -465,27 +467,6 @@ int watchpoint_remove_all(struct target *target)
 	return breakpoint_watchpoint_remove_all(target, WATCHPOINT);
 }
 
-int breakpoint_clear_target(struct target *target)
-{
-	int retval = ERROR_OK;
-
-	if (target->smp) {
-		struct target_list *head;
-
-		foreach_smp_target(head, target->smp_targets) {
-			struct target *curr = head->target;
-			int status = breakpoint_remove_all_internal(curr);
-
-			if (status != ERROR_OK)
-				retval = status;
-		}
-	} else {
-		retval = breakpoint_remove_all_internal(target);
-	}
-
-	return retval;
-}
-
 struct breakpoint *breakpoint_find(struct target *target, target_addr_t address)
 {
 	struct breakpoint *breakpoint = target->breakpoints;
@@ -641,23 +622,6 @@ int watchpoint_remove(struct target *target, target_addr_t address)
 	return retval;
 }
 
-int watchpoint_clear_target(struct target *target)
-{
-	LOG_TARGET_DEBUG(target, "Delete all watchpoints");
-
-	struct watchpoint *watchpoint = target->watchpoints;
-	int retval = ERROR_OK;
-
-	while (watchpoint) {
-		struct watchpoint *tmp = watchpoint;
-		watchpoint = watchpoint->next;
-		int status = watchpoint_free(target, tmp);
-		if (status != ERROR_OK)
-			retval = status;
-	}
-	return retval;
-}
-
 int watchpoint_hit(struct target *target, enum watchpoint_rw *rw,
 		   target_addr_t *address)
 {
diff --git a/src/target/breakpoints.h b/src/target/breakpoints.h
index 0789267c7..d547a687f 100644
--- a/src/target/breakpoints.h
+++ b/src/target/breakpoints.h
@@ -50,7 +50,6 @@ struct watchpoint {
 	int unique_id;
 };
 
-int breakpoint_clear_target(struct target *target);
 int breakpoint_add(struct target *target,
 		target_addr_t address, unsigned int length, enum breakpoint_type type);
 int context_breakpoint_add(struct target *target,
@@ -69,7 +68,6 @@ static inline void breakpoint_hw_set(struct breakpoint *breakpoint, unsigned int
 	breakpoint->number = hw_number;
 }
 
-int watchpoint_clear_target(struct target *target);
 int watchpoint_add(struct target *target,
 		target_addr_t address, unsigned int length,
 		enum watchpoint_rw rw, uint64_t value, uint64_t mask);

-----------------------------------------------------------------------

Summary of changes:
 src/server/gdb_server.c  |  8 ++++----
 src/target/breakpoints.c | 40 ++--------------------------------------
 src/target/breakpoints.h |  2 --
 3 files changed, 6 insertions(+), 44 deletions(-)


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- Log -----------------------------------------------------------------
commit 896738264e92b74a17250dab639999a2743d0b7c
Author: Brian Kuschak <bku...@gm...>
Date:   Thu Sep 18 13:41:24 2025 +0800

    jtag/drivers/cmsis_dap_tcp: fix socket handling for Windows
    
    Windows does not support socket recv() with a combination of MSG_PEEK
    and MSG_WAITALL flags. Work around this limitation in a way that works
    for both Windows and other platforms.
    
    Change-Id: Ib77e2cc872e5fe3d1fc41034010b86390131fff3
    Fixes: https://sourceforge.net/p/openocd/tickets/457/
    Signed-off-by: Brian Kuschak <bku...@gm...>
    Reviewed-on: https://review.openocd.org/c/openocd/+/9136
    Reviewed-by: IRON ALEKS <8ir...@gm...>
    Reviewed-by: Tomas Vanek <va...@fb...>
    Tested-by: jenkins

diff --git a/src/jtag/drivers/cmsis_dap_tcp.c b/src/jtag/drivers/cmsis_dap_tcp.c
index 8a96cd624..7894550fe 100644
--- a/src/jtag/drivers/cmsis_dap_tcp.c
+++ b/src/jtag/drivers/cmsis_dap_tcp.c
@@ -20,6 +20,10 @@
 #include "config.h"
 #endif
 
+#ifdef HAVE_ARPA_INET_H
+#include <arpa/inet.h>
+#endif
+#include <errno.h>
 #ifdef HAVE_NETDB_H
 #include <netdb.h>
 #endif
@@ -28,10 +32,21 @@
 #endif
 #include <stdbool.h>
 #include <string.h>
+#ifdef HAVE_SYS_IOCTL_H
+#include <sys/ioctl.h>
+#endif
 #ifdef HAVE_SYS_SOCKET_H
 #include <sys/socket.h>
 #endif
 #include <sys/types.h>
+#ifdef HAVE_UNISTD_H
+#include <unistd.h>
+#endif
+
+#ifdef _WIN32
+#include <winsock2.h>
+#include <ws2tcpip.h>
+#endif
 
 #include "helper/command.h"
 #include "helper/log.h"
@@ -193,19 +208,107 @@ static void cmsis_dap_tcp_close(struct cmsis_dap *dap)
 	cmsis_dap_tcp_free(dap);
 }
 
+static int socket_bytes_available(int sock, unsigned int *out_avail)
+{
+#ifdef _WIN32
+	u_long avail = 0;
+	if (ioctlsocket((SOCKET)sock, FIONREAD, &avail) == SOCKET_ERROR)
+		return -1;
+#else
+	int avail = 0;
+	if (ioctl(sock, FIONREAD, &avail) < 0)
+		return -1;
+#endif
+	*out_avail = avail;
+	return 0;
+}
+
 static inline int readall_socket(int handle, void *buffer, unsigned int count)
 {
 	// Return after all count bytes available, or timeout, or error.
 	return recv(handle, buffer, count, MSG_WAITALL);
 }
 
-static inline int peekall_socket(int handle, void *buffer, unsigned int count)
+static int peekall_socket(int handle, void *buffer, unsigned int count,
+		enum cmsis_dap_blocking blocking, unsigned int timeout_ms)
 {
-	/* Data remains unread on the socket until recv() is called later without
+	/* Windows doesn't support MSG_PEEK in combination with MSG_WAITALL:
+	 *	 return recv(handle, buffer, count, MSG_PEEK | MSG_WAITALL);
+	 *
+	 * So, use this method instead which should work for Windows and others.
+	 *
+	 * Data remains unread on the socket until recv() is called later without
 	 * the MSG_PEEK flag. Return after all count bytes available, or timeout,
 	 * or error.
 	 */
-	return recv(handle, buffer, count, MSG_PEEK | MSG_WAITALL);
+
+	if (count == 0)
+		return 0;
+
+	while (true) {
+		int ret;
+		unsigned int avail;
+		if (socket_bytes_available(handle, &avail) < 0)
+			return -1;
+
+		if (avail >= count) {
+			ret = recv(handle, (char *)buffer, (int)count, MSG_PEEK);
+			if (ret < 0) {
+#ifdef _WIN32
+				int err = WSAGetLastError();
+				if (err == WSAEINTR)
+					continue;
+				if (err == WSAEWOULDBLOCK)
+					return -1;
+#else
+				if (errno == EINTR)
+					continue;
+				if (errno == EAGAIN || errno == EWOULDBLOCK)
+					return -1;	// Timeout or nonblocking.
+#endif
+			}
+			return ret; // 0: Closed, <0: Other error, >0 Success.
+		}
+
+		// Not enough data available.
+		if (blocking == CMSIS_DAP_NON_BLOCKING) {
+#ifdef _WIN32
+			WSASetLastError(WSAEWOULDBLOCK);
+#else
+			errno = EAGAIN;
+#endif
+			return -1;
+		}
+
+		// Blocking wait.
+		fd_set rfds;
+		FD_ZERO(&rfds);
+		FD_SET(handle, &rfds);
+
+		struct timeval tv;
+		tv.tv_sec  = timeout_ms / 1000;
+		tv.tv_usec = (timeout_ms % 1000) * 1000;
+
+		ret = select(handle + 1, &rfds, NULL, NULL, &tv);
+		if (ret > 0)
+			continue;		// Readable
+
+		if (ret == 0) {		// Timeout
+#ifdef _WIN32
+			WSASetLastError(WSAEWOULDBLOCK);
+#else
+			errno = EAGAIN;
+#endif
+			return -1;
+		}
+
+		// Error
+#ifndef _WIN32
+		if (errno == EINTR)
+			continue;
+#endif
+		return ret;
+	}
 }
 
 static int cmsis_dap_tcp_read(struct cmsis_dap *dap, int transfer_timeout_ms,
@@ -232,7 +335,7 @@ static int cmsis_dap_tcp_read(struct cmsis_dap *dap, int transfer_timeout_ms,
 
 	// Peek at the header first to find the length.
 	int retval = peekall_socket(dap->bdata->sockfd, dap->packet_buffer,
-			HEADER_SIZE);
+			HEADER_SIZE, blocking, wait_ms);
 	LOG_DEBUG_IO("Reading header returned %d", retval);
 	if (retval == 0) {
 		LOG_DEBUG_IO("CMSIS-DAP: tcp timeout reached 1");

-----------------------------------------------------------------------

Summary of changes:
 src/jtag/drivers/cmsis_dap_tcp.c | 111 +++++++++++++++++++++++++++++++++++++--
 1 file changed, 107 insertions(+), 4 deletions(-)


hooks/post-receive
-- 
Main OpenOCD repository

[OpenOCD-commit] Main OpenOCD repository branch, master, updated. v0.12.0-1222-g5bf633331

[openocd-gerrit <ope...@us...>]

This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".

The branch, master has been updated
       via  5bf63333138896120349cbcd48af815aeab5e185 (commit)
      from  32afb0ab04e773edd57bb64e428a24708c127c82 (commit)

Those revisions listed above that are new to this repository have
not appeared on any other notification email; so we list those
revisions in full, below.

- Log -----------------------------------------------------------------
commit 5bf63333138896120349cbcd48af815aeab5e185
Author: Brian Kuschak <bku...@gm...>
Date:   Thu Sep 18 16:19:40 2025 +0800

    tools/scripts: symbol added to camelcase.txt
    
    This Windows symbol is camelcase.
    
    Change-Id: I2427de43e070592cf0c36c160c53c2bdfe96e524
    Signed-off-by: Brian Kuschak <bku...@gm...>
    Reviewed-on: https://review.openocd.org/c/openocd/+/9137
    Tested-by: jenkins
    Reviewed-by: Tomas Vanek <va...@fb...>

diff --git a/tools/scripts/camelcase.txt b/tools/scripts/camelcase.txt
index 058df4d80..1c782ee35 100644
--- a/tools/scripts/camelcase.txt
+++ b/tools/scripts/camelcase.txt
@@ -172,6 +172,7 @@ Sleep
 WaitForSingleObject
 WSACleanup
 WSAGetLastError
+WSASetLastError
 WSAStartup
 dwHighDateTime
 dwLowDateTime

-----------------------------------------------------------------------

Summary of changes:
 tools/scripts/camelcase.txt | 1 +
 1 file changed, 1 insertion(+)


hooks/post-receive
-- 
Main OpenOCD repository

[OpenOCD-commit] Main OpenOCD repository branch, master, updated. v0.12.0-1221-g32afb0ab0

[openocd-gerrit <ope...@us...>]

This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".

The branch, master has been updated
       via  32afb0ab04e773edd57bb64e428a24708c127c82 (commit)
       via  9e2a11c2f22792400077e81950f8ff7ef5fae874 (commit)
       via  c92cc6b5703cd85497011d2221f008372921b192 (commit)
       via  f64421d07e09bc6addc15ab363db250c5ba5a228 (commit)
      from  4b311d3b8f4221938eabccda23f99c4d64ca8dcb (commit)

Those revisions listed above that are new to this repository have
not appeared on any other notification email; so we list those
revisions in full, below.

- Log -----------------------------------------------------------------
commit 32afb0ab04e773edd57bb64e428a24708c127c82
Author: Tomas Vanek <va...@fb...>
Date:   Thu Sep 11 22:12:05 2025 +0200

    jtag: linuxgpiod: log memory allocation errors
    
    Log error in case of NULL calloc() return.
    
    Change-Id: I40c5cba5b92cd39e9a8f7e6d420e11afc8747b3e
    Signed-off-by: Tomas Vanek <va...@fb...>
    Reviewed-on: https://review.openocd.org/c/openocd/+/9119
    Reviewed-by: Antonio Borneo <bor...@gm...>
    Tested-by: jenkins

diff --git a/src/jtag/drivers/linuxgpiod.c b/src/jtag/drivers/linuxgpiod.c
index 323160b1a..cc738e9a3 100644
--- a/src/jtag/drivers/linuxgpiod.c
+++ b/src/jtag/drivers/linuxgpiod.c
@@ -52,8 +52,10 @@ static struct gpiod_line_settings *gpiod_line_settings_new(void)
 	struct gpiod_line_settings *rv;
 
 	rv = calloc(sizeof(struct gpiod_line_settings), 1);
-	if (!rv)
+	if (!rv) {
+		LOG_ERROR("No memory for gpiod line settings");
 		return NULL;
+	}
 
 	return rv;
 }
@@ -128,8 +130,10 @@ static struct gpiod_line_config *gpiod_line_config_new(void)
 	struct gpiod_line_config *rv;
 
 	rv = calloc(sizeof(struct gpiod_line_config), 1);
-	if (!rv)
+	if (!rv) {
+		LOG_ERROR("No memory for gpiod line config");
 		return NULL;
+	}
 
 	return rv;
 }
@@ -159,8 +163,10 @@ static struct gpiod_request_config *gpiod_request_config_new(void)
 	struct gpiod_request_config *rv;
 
 	rv = calloc(sizeof(struct gpiod_request_config), 1);
-	if (!rv)
+	if (!rv) {
+		LOG_ERROR("No memory for gpiod request config");
 		return NULL;
+	}
 
 	return rv;
 }
@@ -194,8 +200,10 @@ static struct gpiod_line_request *gpiod_chip_request_lines(struct gpiod_chip *ch
 	assert(req_cfg);
 
 	line_req = calloc(sizeof(struct gpiod_line_request), 1);
-	if (!line_req)
+	if (!line_req) {
+		LOG_ERROR("No memory for gpiod line request");
 		return NULL;
+	}
 
 	line_req->gpio_line = gpiod_chip_get_line(chip, line_cfg->gpio_num);
 	if (!line_req->gpio_line) {

commit 9e2a11c2f22792400077e81950f8ff7ef5fae874
Author: Michael Heimpold <mh...@he...>
Date:   Sat Apr 20 19:01:30 2024 +0200

    jtag: linuxgpiod: finalize emulation of libgpiod v2 API for older versions
    
    This finalizes the work that has begun to emulate v2 API
    for older libgpiod versions.
    
    It also add the required autotools/pkg-config stuff to
    detect the available libgpiod version.
    
    Change-Id: I2c3a60ce607ed9601b01d22d5d9b8af953944941
    Signed-off-by: Michael Heimpold <mh...@he...>
    Signed-off-by: Tomas Vanek <va...@fb...>
    Reviewed-on: https://review.openocd.org/c/openocd/+/8226
    Reviewed-by: Antonio Borneo <bor...@gm...>
    Tested-by: jenkins

diff --git a/configure.ac b/configure.ac
index 3060940ed..ed26d45e1 100644
--- a/configure.ac
+++ b/configure.ac
@@ -583,12 +583,19 @@ PKG_CHECK_MODULES([LIBFTDI], [libftdi1], [
 	PKG_CHECK_MODULES([LIBFTDI], [libftdi], [use_libftdi=yes], [use_libftdi=no])
 ])
 
-PKG_CHECK_MODULES([LIBGPIOD], [libgpiod < 2.0], [
+PKG_CHECK_MODULES([LIBGPIOD], [libgpiod >= 2.0] , [
 	use_libgpiod=yes
-	AC_DEFINE([HAVE_LIBGPIOD_V1], [1], [define if libgpiod is version v1.x])
-	PKG_CHECK_EXISTS([libgpiod >= 1.5],
-		[AC_DEFINE([HAVE_LIBGPIOD1_FLAGS_BIAS], [1], [define if libgpiod v1 has line request flags bias])])
-], [use_libgpiod=no])
+], [
+	PKG_CHECK_MODULES([LIBGPIOD], [libgpiod], [
+		use_libgpiod=yes
+		AC_DEFINE([HAVE_LIBGPIOD_V1], [1], [define if libgpiod is version v1.x])
+
+		PKG_CHECK_EXISTS([libgpiod >= 1.5],
+			[AC_DEFINE([HAVE_LIBGPIOD1_FLAGS_BIAS], [1], [define if libgpiod v1 has line request flags bias])])
+	], [
+		use_libgpiod=no
+	])
+])
 
 PKG_CHECK_MODULES([LIBJAYLINK], [libjaylink >= 0.2],
 	[use_libjaylink=yes], [use_libjaylink=no])
diff --git a/src/jtag/drivers/linuxgpiod.c b/src/jtag/drivers/linuxgpiod.c
index f5d2cf457..323160b1a 100644
--- a/src/jtag/drivers/linuxgpiod.c
+++ b/src/jtag/drivers/linuxgpiod.c
@@ -39,8 +39,6 @@
 #define GPIOD_LINE_BIAS_PULL_UP         GPIOD_LINE_REQUEST_FLAG_BIAS_PULL_UP
 #define GPIOD_LINE_BIAS_PULL_DOWN       GPIOD_LINE_REQUEST_FLAG_BIAS_PULL_DOWN
 
-#define gpiod_request_config            gpiod_line_request_config
-
 struct gpiod_line_settings {
 	int direction;
 	int value;
@@ -49,48 +47,20 @@ struct gpiod_line_settings {
 	int active_low;
 };
 
-struct gpiod_line_config {
-	unsigned int gpio_num;
-	struct gpiod_line_settings *line_settings;
-};
-
 static struct gpiod_line_settings *gpiod_line_settings_new(void)
 {
-	static struct gpiod_line_settings my;
-
-	my = (struct gpiod_line_settings) { 0 };
-
-	return &my;
-}
-
-static struct gpiod_line_config *gpiod_line_config_new(void)
-{
-	static struct gpiod_line_config my;
-
-	my = (struct gpiod_line_config) { 0 };
-
-	return &my;
-}
-
-static struct gpiod_request_config *gpiod_request_config_new(void)
-{
-	static struct gpiod_request_config my;
+	struct gpiod_line_settings *rv;
 
-	my = (struct gpiod_request_config) { NULL, 0, 0 };
+	rv = calloc(sizeof(struct gpiod_line_settings), 1);
+	if (!rv)
+		return NULL;
 
-	return &my;
+	return rv;
 }
 
 static void gpiod_line_settings_free(struct gpiod_line_settings *settings)
 {
-}
-
-static void gpiod_line_config_free(struct gpiod_line_config *config)
-{
-}
-
-static void gpiod_request_config_free(struct gpiod_request_config *config)
-{
+	free(settings);
 }
 
 static int gpiod_line_settings_set_direction(struct gpiod_line_settings *settings,
@@ -123,12 +93,6 @@ static void gpiod_line_settings_set_active_low(struct gpiod_line_settings *setti
 		settings->active_low = GPIOD_LINE_REQUEST_FLAG_ACTIVE_LOW;
 }
 
-static void gpiod_request_config_set_consumer(struct gpiod_request_config *config,
-	const char *consumer)
-{
-	config->consumer = consumer;
-}
-
 #ifdef HAVE_LIBGPIOD1_FLAGS_BIAS
 
 static int gpiod_line_settings_set_bias(struct gpiod_line_settings *settings, int bias)
@@ -145,18 +109,180 @@ static int gpiod_line_settings_set_bias(struct gpiod_line_settings *settings, in
 	if (bias == GPIOD_LINE_BIAS_DISABLED)
 		return 0;
 
-	LOG_WARNING("linuxgpiod: ignoring request for pull-%s: not supported by gpiod v%s",
+	LOG_WARNING("linuxgpiod: ignoring request for pull-%s: not supported by libgpiod v%s",
 				(bias == GPIOD_LINE_BIAS_PULL_UP) ? "up" : "down",
 				gpiod_version_string());
 
-	return -1;
+	return 0;
 }
 
 #endif /* HAVE_LIBGPIOD1_FLAGS_BIAS */
+
+struct gpiod_line_config {
+	unsigned int gpio_num;
+	struct gpiod_line_settings *line_settings;
+};
+
+static struct gpiod_line_config *gpiod_line_config_new(void)
+{
+	struct gpiod_line_config *rv;
+
+	rv = calloc(sizeof(struct gpiod_line_config), 1);
+	if (!rv)
+		return NULL;
+
+	return rv;
+}
+
+static void gpiod_line_config_free(struct gpiod_line_config *config)
+{
+	free(config);
+}
+
+static int gpiod_line_config_add_line_settings(struct gpiod_line_config *config,
+	const unsigned int *offsets, size_t num_offsets, struct gpiod_line_settings *settings)
+{
+	assert(num_offsets == 1);
+
+	config->gpio_num = *offsets;
+	config->line_settings = settings;
+
+	return 0;
+}
+
+struct gpiod_request_config {
+	const char *consumer;
+};
+
+static struct gpiod_request_config *gpiod_request_config_new(void)
+{
+	struct gpiod_request_config *rv;
+
+	rv = calloc(sizeof(struct gpiod_request_config), 1);
+	if (!rv)
+		return NULL;
+
+	return rv;
+}
+
+static void gpiod_request_config_free(struct gpiod_request_config *config)
+{
+	free(config);
+}
+
+static void gpiod_request_config_set_consumer(struct gpiod_request_config *config,
+	const char *consumer)
+{
+	config->consumer = consumer;
+}
+
+struct gpiod_line_request {
+	struct gpiod_line *gpio_line;
+	struct gpiod_chip *chip;
+	struct gpiod_request_config *req_cfg;
+	struct gpiod_line_config *line_cfg;
+};
+
+static void gpiod_line_request_release(struct gpiod_line_request *request);
+
+static struct gpiod_line_request *gpiod_chip_request_lines(struct gpiod_chip *chip,
+	struct gpiod_request_config *req_cfg, struct gpiod_line_config *line_cfg)
+{
+	struct gpiod_line_request *line_req;
+	int rv, flags = 0;
+
+	assert(req_cfg);
+
+	line_req = calloc(sizeof(struct gpiod_line_request), 1);
+	if (!line_req)
+		return NULL;
+
+	line_req->gpio_line = gpiod_chip_get_line(chip, line_cfg->gpio_num);
+	if (!line_req->gpio_line) {
+		free(line_req);
+		return NULL;
+	}
+
+	/* remember stuff in case we need to reconfigure later */
+	line_req->chip = chip;
+	line_req->req_cfg = gpiod_request_config_new();
+	*line_req->req_cfg = *req_cfg;
+	line_req->line_cfg = line_cfg;
+
+	flags |= line_cfg->line_settings->drive;
+	flags |= line_cfg->line_settings->bias;
+	flags |= line_cfg->line_settings->active_low;
+
+	struct gpiod_line_request_config config = {
+		.consumer = line_req->req_cfg->consumer,
+		.request_type = line_cfg->line_settings->direction,
+		.flags = flags,
+	};
+
+	rv = gpiod_line_request(line_req->gpio_line, &config, line_cfg->line_settings->value);
+	if (rv < 0) {
+		gpiod_line_request_release(line_req);
+		return NULL;
+	}
+
+	return line_req;
+}
+
+static int gpiod_line_request_get_value(struct gpiod_line_request *request,
+					__attribute__((unused)) unsigned int offset)
+{
+	return gpiod_line_get_value(request->gpio_line);
+}
+
+static int gpiod_line_request_set_value(struct gpiod_line_request *request,
+					__attribute__((unused)) unsigned int offset, int value)
+{
+	return gpiod_line_set_value(request->gpio_line, value);
+}
+
+static void gpiod_line_request_release(struct gpiod_line_request *request)
+{
+	gpiod_request_config_free(request->req_cfg);
+	gpiod_line_release(request->gpio_line);
+	free(request);
+}
+
+static int gpiod_line_request_reconfigure_lines(struct gpiod_line_request *request,
+												struct gpiod_line_config *line_cfg)
+{
+	int rv, flags = 0;
+
+	/* in libgpiod v1 we have to release the line and re-aquire it */
+	gpiod_line_release(request->gpio_line);
+	request->gpio_line = gpiod_chip_get_line(request->chip, request->line_cfg->gpio_num);
+	if (!request->gpio_line)
+		return -1;
+
+	flags |= line_cfg->line_settings->drive;
+	flags |= line_cfg->line_settings->bias;
+	flags |= line_cfg->line_settings->active_low;
+
+	struct gpiod_line_request_config config = {
+		.consumer = request->req_cfg->consumer,
+		.request_type = line_cfg->line_settings->direction,
+		.flags = flags,
+	};
+
+	rv = gpiod_line_request(request->gpio_line, &config, line_cfg->line_settings->value);
+	if (rv < 0)
+		return -1;
+
+	/* remember updated line_cfg */
+	request->line_cfg = line_cfg;
+	return 0;
+}
+
 #endif /* HAVE_LIBGPIOD_V1 */
 
 static struct gpiod_chip *gpiod_chip[ADAPTER_GPIO_IDX_NUM] = {};
-static struct gpiod_line *gpiod_line[ADAPTER_GPIO_IDX_NUM] = {};
+static struct gpiod_line_settings *gpiod_line_settings[ADAPTER_GPIO_IDX_NUM] = {};
+static struct gpiod_line_config *gpiod_line_config[ADAPTER_GPIO_IDX_NUM] = {};
+static struct gpiod_line_request *gpiod_line_req[ADAPTER_GPIO_IDX_NUM] = {};
 
 static int last_swclk;
 static int last_swdio;
@@ -165,6 +291,20 @@ static bool swdio_input;
 
 static const struct adapter_gpio_config *adapter_gpio_config;
 
+/* Helper to get/set a single line */
+static int linuxgpiod_line_get_value(enum adapter_gpio_config_index idx)
+{
+	return gpiod_line_request_get_value(gpiod_line_req[idx],
+				adapter_gpio_config[idx].gpio_num);
+}
+
+static int linuxgpiod_line_set_value(enum adapter_gpio_config_index idx, int value)
+{
+	return gpiod_line_request_set_value(gpiod_line_req[idx],
+				adapter_gpio_config[idx].gpio_num,
+				value);
+}
+
 /*
  * Helper function to determine if gpio config is valid
  *
@@ -182,7 +322,7 @@ static enum bb_value linuxgpiod_read(void)
 {
 	int retval;
 
-	retval = gpiod_line_get_value(gpiod_line[ADAPTER_GPIO_IDX_TDO]);
+	retval = linuxgpiod_line_get_value(ADAPTER_GPIO_IDX_TDO);
 	if (retval < 0) {
 		LOG_WARNING("reading tdo failed");
 		return 0;
@@ -215,20 +355,20 @@ static int linuxgpiod_write(int tck, int tms, int tdi)
 	}
 
 	if (tdi != last_tdi) {
-		retval = gpiod_line_set_value(gpiod_line[ADAPTER_GPIO_IDX_TDI], tdi);
+		retval = linuxgpiod_line_set_value(ADAPTER_GPIO_IDX_TDI, tdi);
 		if (retval < 0)
 			LOG_WARNING("writing tdi failed");
 	}
 
 	if (tms != last_tms) {
-		retval = gpiod_line_set_value(gpiod_line[ADAPTER_GPIO_IDX_TMS], tms);
+		retval = linuxgpiod_line_set_value(ADAPTER_GPIO_IDX_TMS, tms);
 		if (retval < 0)
 			LOG_WARNING("writing tms failed");
 	}
 
 	/* write clk last */
 	if (tck != last_tck) {
-		retval = gpiod_line_set_value(gpiod_line[ADAPTER_GPIO_IDX_TCK], tck);
+		retval = linuxgpiod_line_set_value(ADAPTER_GPIO_IDX_TCK, tck);
 		if (retval < 0)
 			LOG_WARNING("writing tck failed");
 	}
@@ -244,7 +384,7 @@ static int linuxgpiod_swdio_read(void)
 {
 	int retval;
 
-	retval = gpiod_line_get_value(gpiod_line[ADAPTER_GPIO_IDX_SWDIO]);
+	retval = linuxgpiod_line_get_value(ADAPTER_GPIO_IDX_SWDIO);
 	if (retval < 0) {
 		LOG_WARNING("Fail read swdio");
 		return 0;
@@ -257,30 +397,54 @@ static void linuxgpiod_swdio_drive(bool is_output)
 {
 	int retval;
 
-	/*
-	 * FIXME: change direction requires release and re-require the line
-	 * https://stackoverflow.com/questions/58735140/
-	 * this would change in future libgpiod
-	 */
-	gpiod_line_release(gpiod_line[ADAPTER_GPIO_IDX_SWDIO]);
-
 	if (is_output) {
-		if (gpiod_line[ADAPTER_GPIO_IDX_SWDIO_DIR]) {
-			retval = gpiod_line_set_value(gpiod_line[ADAPTER_GPIO_IDX_SWDIO_DIR], 1);
+		if (gpiod_line_req[ADAPTER_GPIO_IDX_SWDIO_DIR]) {
+			retval = linuxgpiod_line_set_value(ADAPTER_GPIO_IDX_SWDIO_DIR, 1);
 			if (retval < 0)
-				LOG_WARNING("Fail set swdio_dir");
+				LOG_WARNING("Failed to set swdio_dir=1");
 		}
-		retval = gpiod_line_request_output(gpiod_line[ADAPTER_GPIO_IDX_SWDIO], "OpenOCD", 1);
+
+		retval = gpiod_line_settings_set_direction(gpiod_line_settings[ADAPTER_GPIO_IDX_SWDIO],
+													GPIOD_LINE_DIRECTION_OUTPUT);
+		if (retval < 0)
+			LOG_WARNING("Failed to set new direction of swdio");
+
+		retval = gpiod_line_settings_set_output_value(gpiod_line_settings[ADAPTER_GPIO_IDX_SWDIO],
+														GPIOD_LINE_VALUE_ACTIVE);
+		if (retval < 0)
+			LOG_WARNING("Failed to set output value of swdio");
+
+		retval = gpiod_line_config_add_line_settings(gpiod_line_config[ADAPTER_GPIO_IDX_SWDIO],
+														&adapter_gpio_config[ADAPTER_GPIO_IDX_SWDIO].gpio_num, 1,
+														gpiod_line_settings[ADAPTER_GPIO_IDX_SWDIO]);
 		if (retval < 0)
-			LOG_WARNING("Fail request_output line swdio");
+			LOG_WARNING("Failed to apply output configuration to swdio");
+
+		retval = gpiod_line_request_reconfigure_lines(gpiod_line_req[ADAPTER_GPIO_IDX_SWDIO],
+														gpiod_line_config[ADAPTER_GPIO_IDX_SWDIO]);
+		if (retval < 0)
+			LOG_WARNING("Failed to switch swdio to output");
 	} else {
-		retval = gpiod_line_request_input(gpiod_line[ADAPTER_GPIO_IDX_SWDIO], "OpenOCD");
+		retval = gpiod_line_settings_set_direction(gpiod_line_settings[ADAPTER_GPIO_IDX_SWDIO],
+														GPIOD_LINE_DIRECTION_INPUT);
+		if (retval < 0)
+			LOG_WARNING("Failed to switch swdio to output");
+
+		retval = gpiod_line_config_add_line_settings(gpiod_line_config[ADAPTER_GPIO_IDX_SWDIO],
+														&adapter_gpio_config[ADAPTER_GPIO_IDX_SWDIO].gpio_num, 1,
+														gpiod_line_settings[ADAPTER_GPIO_IDX_SWDIO]);
 		if (retval < 0)
-			LOG_WARNING("Fail request_input line swdio");
-		if (gpiod_line[ADAPTER_GPIO_IDX_SWDIO_DIR]) {
-			retval = gpiod_line_set_value(gpiod_line[ADAPTER_GPIO_IDX_SWDIO_DIR], 0);
+			LOG_WARNING("Failed to apply input configuration to swdio");
+
+		retval = gpiod_line_request_reconfigure_lines(gpiod_line_req[ADAPTER_GPIO_IDX_SWDIO],
+														gpiod_line_config[ADAPTER_GPIO_IDX_SWDIO]);
+		if (retval < 0)
+			LOG_WARNING("Failed to switch swdio to input");
+
+		if (gpiod_line_req[ADAPTER_GPIO_IDX_SWDIO_DIR]) {
+			retval = linuxgpiod_line_set_value(ADAPTER_GPIO_IDX_SWDIO_DIR, 0);
 			if (retval < 0)
-				LOG_WARNING("Fail set swdio_dir");
+				LOG_WARNING("Failed to set swdio_dir=0");
 		}
 	}
 
@@ -294,7 +458,7 @@ static int linuxgpiod_swd_write(int swclk, int swdio)
 
 	if (!swdio_input) {
 		if (!last_stored || swdio != last_swdio) {
-			retval = gpiod_line_set_value(gpiod_line[ADAPTER_GPIO_IDX_SWDIO], swdio);
+			retval = linuxgpiod_line_set_value(ADAPTER_GPIO_IDX_SWDIO, swdio);
 			if (retval < 0)
 				LOG_WARNING("Fail set swdio");
 		}
@@ -302,7 +466,7 @@ static int linuxgpiod_swd_write(int swclk, int swdio)
 
 	/* write swclk last */
 	if (!last_stored || swclk != last_swclk) {
-		retval = gpiod_line_set_value(gpiod_line[ADAPTER_GPIO_IDX_SWCLK], swclk);
+		retval = linuxgpiod_line_set_value(ADAPTER_GPIO_IDX_SWCLK, swclk);
 		if (retval < 0)
 			LOG_WARNING("Fail set swclk");
 	}
@@ -321,7 +485,7 @@ static int linuxgpiod_blink(bool on)
 	if (!is_gpio_config_valid(ADAPTER_GPIO_IDX_LED))
 		return ERROR_OK;
 
-	retval = gpiod_line_set_value(gpiod_line[ADAPTER_GPIO_IDX_LED], on ? 1 : 0);
+	retval = linuxgpiod_line_set_value(ADAPTER_GPIO_IDX_LED, on);
 	if (retval < 0)
 		LOG_WARNING("Fail set led");
 	return retval;
@@ -348,17 +512,17 @@ static int linuxgpiod_reset(int trst, int srst)
 	LOG_DEBUG("linuxgpiod_reset");
 
 	/*
-	 * active low behaviour handled by "adaptor gpio" command and
+	 * active low behavior handled by "adaptor gpio" command and
 	 * GPIOD_LINE_REQUEST_FLAG_ACTIVE_LOW flag when requesting the line.
 	 */
-	if (gpiod_line[ADAPTER_GPIO_IDX_SRST]) {
-		retval1 = gpiod_line_set_value(gpiod_line[ADAPTER_GPIO_IDX_SRST], srst);
+	if (gpiod_line_req[ADAPTER_GPIO_IDX_SRST]) {
+		retval1 = linuxgpiod_line_set_value(ADAPTER_GPIO_IDX_SRST, srst);
 		if (retval1 < 0)
 			LOG_WARNING("set srst value failed");
 	}
 
-	if (gpiod_line[ADAPTER_GPIO_IDX_TRST]) {
-		retval2 = gpiod_line_set_value(gpiod_line[ADAPTER_GPIO_IDX_TRST], trst);
+	if (gpiod_line_req[ADAPTER_GPIO_IDX_TRST]) {
+		retval2 = linuxgpiod_line_set_value(ADAPTER_GPIO_IDX_TRST, trst);
 		if (retval2 < 0)
 			LOG_WARNING("set trst value failed");
 	}
@@ -390,9 +554,17 @@ static bool linuxgpiod_swd_mode_possible(void)
 
 static inline void helper_release(enum adapter_gpio_config_index idx)
 {
-	if (gpiod_line[idx]) {
-		gpiod_line_release(gpiod_line[idx]);
-		gpiod_line[idx] = NULL;
+	if (gpiod_line_req[idx]) {
+		gpiod_line_request_release(gpiod_line_req[idx]);
+		gpiod_line_req[idx] = NULL;
+	}
+	if (gpiod_line_config[idx]) {
+		gpiod_line_config_free(gpiod_line_config[idx]);
+		gpiod_line_config[idx] = NULL;
+	}
+	if (gpiod_line_settings[idx]) {
+		gpiod_line_settings_free(gpiod_line_settings[idx]);
+		gpiod_line_settings[idx] = NULL;
 	}
 	if (gpiod_chip[idx]) {
 		gpiod_chip_close(gpiod_chip[idx]);
@@ -411,97 +583,108 @@ static int linuxgpiod_quit(void)
 
 static int helper_get_line(enum adapter_gpio_config_index idx)
 {
+	struct gpiod_request_config *req_cfg = NULL;
 	char chip_path[24];
+	int rv = 0;
 
 	if (!is_gpio_config_valid(idx))
 		return ERROR_OK;
 
-	int flags = 0, retval;
-
 	snprintf(chip_path, sizeof(chip_path), "/dev/gpiochip%u", adapter_gpio_config[idx].chip_num);
 	gpiod_chip[idx] = gpiod_chip_open(chip_path);
+
 	if (!gpiod_chip[idx]) {
 		LOG_ERROR("Cannot open LinuxGPIOD chip %d for %s", adapter_gpio_config[idx].chip_num,
 			adapter_gpio_get_name(idx));
 		return ERROR_JTAG_INIT_FAILED;
 	}
 
-	gpiod_line[idx] = gpiod_chip_get_line(gpiod_chip[idx], adapter_gpio_config[idx].gpio_num);
-	if (!gpiod_line[idx]) {
-		LOG_ERROR("Error get line %s", adapter_gpio_get_name(idx));
-		return ERROR_JTAG_INIT_FAILED;
-	}
-
-	struct gpiod_line_settings *line_settings = gpiod_line_settings_new();
-	struct gpiod_line_config *line_config = gpiod_line_config_new();
-	struct gpiod_request_config *req_cfg = gpiod_request_config_new();
+	gpiod_line_settings[idx] = gpiod_line_settings_new();
+	gpiod_line_config[idx] = gpiod_line_config_new();
+	req_cfg = gpiod_request_config_new();
 
-	if (!line_settings || !line_config || !req_cfg) {
+	if (!gpiod_line_settings[idx] || !gpiod_line_config[idx] || !req_cfg) {
 		LOG_ERROR("Cannot configure LinuxGPIOD line for %s", adapter_gpio_get_name(idx));
-		retval = ERROR_JTAG_INIT_FAILED;
-		goto err_out;
+		gpiod_request_config_free(req_cfg);
+		return ERROR_JTAG_INIT_FAILED;
 	}
 
 	gpiod_request_config_set_consumer(req_cfg, "OpenOCD");
 
 	switch (adapter_gpio_config[idx].init_state) {
 	case ADAPTER_GPIO_INIT_STATE_INPUT:
-		gpiod_line_settings_set_direction(line_settings, GPIOD_LINE_DIRECTION_INPUT);
+		rv = gpiod_line_settings_set_direction(gpiod_line_settings[idx], GPIOD_LINE_DIRECTION_INPUT);
 		break;
 	case ADAPTER_GPIO_INIT_STATE_INACTIVE:
-		gpiod_line_settings_set_direction(line_settings, GPIOD_LINE_DIRECTION_OUTPUT);
-		gpiod_line_settings_set_output_value(line_settings, GPIOD_LINE_VALUE_INACTIVE);
+		rv = gpiod_line_settings_set_direction(gpiod_line_settings[idx], GPIOD_LINE_DIRECTION_OUTPUT);
+		rv |= gpiod_line_settings_set_output_value(gpiod_line_settings[idx], GPIOD_LINE_VALUE_INACTIVE);
 		break;
 	case ADAPTER_GPIO_INIT_STATE_ACTIVE:
-		gpiod_line_settings_set_direction(line_settings, GPIOD_LINE_DIRECTION_OUTPUT);
-		gpiod_line_settings_set_output_value(line_settings, GPIOD_LINE_VALUE_ACTIVE);
+		rv = gpiod_line_settings_set_direction(gpiod_line_settings[idx], GPIOD_LINE_DIRECTION_OUTPUT);
+		rv |= gpiod_line_settings_set_output_value(gpiod_line_settings[idx], GPIOD_LINE_VALUE_ACTIVE);
 		break;
 	}
+	if (rv < 0) {
+		LOG_ERROR("Error while configuring LinuxGPIOD line init state for %s", adapter_gpio_get_name(idx));
+		gpiod_request_config_free(req_cfg);
+		return ERROR_JTAG_INIT_FAILED;
+	}
 
 	switch (adapter_gpio_config[idx].drive) {
 	case ADAPTER_GPIO_DRIVE_MODE_PUSH_PULL:
-		gpiod_line_settings_set_drive(line_settings, GPIOD_LINE_DRIVE_PUSH_PULL);
+		rv = gpiod_line_settings_set_drive(gpiod_line_settings[idx], GPIOD_LINE_DRIVE_PUSH_PULL);
 		break;
 	case ADAPTER_GPIO_DRIVE_MODE_OPEN_DRAIN:
-		gpiod_line_settings_set_drive(line_settings, GPIOD_LINE_DRIVE_OPEN_DRAIN);
+		rv = gpiod_line_settings_set_drive(gpiod_line_settings[idx], GPIOD_LINE_DRIVE_OPEN_DRAIN);
 		break;
 	case ADAPTER_GPIO_DRIVE_MODE_OPEN_SOURCE:
-		gpiod_line_settings_set_drive(line_settings, GPIOD_LINE_DRIVE_OPEN_SOURCE);
+		rv = gpiod_line_settings_set_drive(gpiod_line_settings[idx], GPIOD_LINE_DRIVE_OPEN_SOURCE);
 		break;
 	}
+	if (rv < 0) {
+		LOG_ERROR("Error while configuring LinuxGPIOD line driving for %s", adapter_gpio_get_name(idx));
+		gpiod_request_config_free(req_cfg);
+		return ERROR_JTAG_INIT_FAILED;
+	}
 
 	switch (adapter_gpio_config[idx].pull) {
 	case ADAPTER_GPIO_PULL_NONE:
-		gpiod_line_settings_set_bias(line_settings, GPIOD_LINE_BIAS_DISABLED);
+		rv = gpiod_line_settings_set_bias(gpiod_line_settings[idx], GPIOD_LINE_BIAS_DISABLED);
 		break;
 	case ADAPTER_GPIO_PULL_UP:
-		gpiod_line_settings_set_bias(line_settings, GPIOD_LINE_BIAS_PULL_UP);
+		rv = gpiod_line_settings_set_bias(gpiod_line_settings[idx], GPIOD_LINE_BIAS_PULL_UP);
 		break;
 	case ADAPTER_GPIO_PULL_DOWN:
-		gpiod_line_settings_set_bias(line_settings, GPIOD_LINE_BIAS_PULL_DOWN);
+		rv = gpiod_line_settings_set_bias(gpiod_line_settings[idx], GPIOD_LINE_BIAS_PULL_DOWN);
 		break;
 	}
+	if (rv < 0) {
+		LOG_ERROR("Error while configuring LinuxGPIOD line biasing for %s", adapter_gpio_get_name(idx));
+		gpiod_request_config_free(req_cfg);
+		return ERROR_JTAG_INIT_FAILED;
+	}
 
-	gpiod_line_settings_set_active_low(line_settings, adapter_gpio_config[idx].active_low);
-
-	req_cfg->request_type = line_settings->direction;
-	req_cfg->flags = flags | line_settings->drive | line_settings->bias | line_settings->active_low;
+	gpiod_line_settings_set_active_low(gpiod_line_settings[idx], adapter_gpio_config[idx].active_low);
 
-	retval = gpiod_line_request(gpiod_line[idx], req_cfg, line_settings->value);
-	if (retval < 0) {
-		LOG_ERROR("Error requesting gpio line %s", adapter_gpio_get_name(idx));
-		retval = ERROR_JTAG_INIT_FAILED;
-		goto err_out;
+	rv = gpiod_line_config_add_line_settings(gpiod_line_config[idx],
+												&adapter_gpio_config[idx].gpio_num, 1,
+												gpiod_line_settings[idx]);
+	if (rv < 0) {
+		LOG_ERROR("Error configuring gpio line %s", adapter_gpio_get_name(idx));
+		gpiod_request_config_free(req_cfg);
+		return ERROR_JTAG_INIT_FAILED;
 	}
 
-	retval = ERROR_OK;
+	gpiod_line_req[idx] = gpiod_chip_request_lines(gpiod_chip[idx], req_cfg, gpiod_line_config[idx]);
 
-err_out:
-	gpiod_line_settings_free(line_settings);
-	gpiod_line_config_free(line_config);
 	gpiod_request_config_free(req_cfg);
 
-	return retval;
+	if (!gpiod_line_req[idx]) {
+		LOG_ERROR("Error requesting gpio line %s", adapter_gpio_get_name(idx));
+		return ERROR_JTAG_INIT_FAILED;
+	}
+
+	return ERROR_OK;
 }
 
 static int linuxgpiod_init(void)

commit c92cc6b5703cd85497011d2221f008372921b192
Author: Antonio Borneo <bor...@gm...>
Date:   Sun Apr 7 21:15:48 2024 +0200

    jtag: linuxgpiod: use libgpiod v2 API for gpiod_line_request()
    
    Work in progress. Target is to replace v1 gpiod_line_request()
    
    Define and use dummy functions from v2 for v1:
    - gpiod_line_config_new(),
    - gpiod_line_config_free(),
    
    Not yet used:
    - gpiod_line_config_add_line_settings(),
    - gpiod_chip_request_lines().
    
    Change-Id: I9e2d3013845c5d12942f5e07c9721fcd151d6840
    Signed-off-by: Antonio Borneo <bor...@gm...>
    Reviewed-on: https://review.openocd.org/c/openocd/+/8207
    Reviewed-by: Tomas Vanek <va...@fb...>
    Tested-by: jenkins

diff --git a/src/jtag/drivers/linuxgpiod.c b/src/jtag/drivers/linuxgpiod.c
index 4369175f7..f5d2cf457 100644
--- a/src/jtag/drivers/linuxgpiod.c
+++ b/src/jtag/drivers/linuxgpiod.c
@@ -49,6 +49,11 @@ struct gpiod_line_settings {
 	int active_low;
 };
 
+struct gpiod_line_config {
+	unsigned int gpio_num;
+	struct gpiod_line_settings *line_settings;
+};
+
 static struct gpiod_line_settings *gpiod_line_settings_new(void)
 {
 	static struct gpiod_line_settings my;
@@ -58,6 +63,15 @@ static struct gpiod_line_settings *gpiod_line_settings_new(void)
 	return &my;
 }
 
+static struct gpiod_line_config *gpiod_line_config_new(void)
+{
+	static struct gpiod_line_config my;
+
+	my = (struct gpiod_line_config) { 0 };
+
+	return &my;
+}
+
 static struct gpiod_request_config *gpiod_request_config_new(void)
 {
 	static struct gpiod_request_config my;
@@ -71,6 +85,10 @@ static void gpiod_line_settings_free(struct gpiod_line_settings *settings)
 {
 }
 
+static void gpiod_line_config_free(struct gpiod_line_config *config)
+{
+}
+
 static void gpiod_request_config_free(struct gpiod_request_config *config)
 {
 }
@@ -415,9 +433,10 @@ static int helper_get_line(enum adapter_gpio_config_index idx)
 	}
 
 	struct gpiod_line_settings *line_settings = gpiod_line_settings_new();
+	struct gpiod_line_config *line_config = gpiod_line_config_new();
 	struct gpiod_request_config *req_cfg = gpiod_request_config_new();
 
-	if (!line_settings || !req_cfg) {
+	if (!line_settings || !line_config || !req_cfg) {
 		LOG_ERROR("Cannot configure LinuxGPIOD line for %s", adapter_gpio_get_name(idx));
 		retval = ERROR_JTAG_INIT_FAILED;
 		goto err_out;
@@ -479,6 +498,7 @@ static int helper_get_line(enum adapter_gpio_config_index idx)
 
 err_out:
 	gpiod_line_settings_free(line_settings);
+	gpiod_line_config_free(line_config);
 	gpiod_request_config_free(req_cfg);
 
 	return retval;

commit f64421d07e09bc6addc15ab363db250c5ba5a228
Author: Antonio Borneo <bor...@gm...>
Date:   Sun Apr 7 18:32:45 2024 +0200

    jtag: linuxgpiod: use libgpiod v2 API to set gpio active_low
    
    Define and use dummy functions from v2 for v1:
    - gpiod_line_settings_set_active_low().
    
    Change-Id: I2c00e1a71950215c47dc07d71af4f319434a266a
    Signed-off-by: Antonio Borneo <bor...@gm...>
    Reviewed-on: https://review.openocd.org/c/openocd/+/8206
    Tested-by: jenkins
    Reviewed-by: Tomas Vanek <va...@fb...>

diff --git a/src/jtag/drivers/linuxgpiod.c b/src/jtag/drivers/linuxgpiod.c
index dc9b9f5d5..4369175f7 100644
--- a/src/jtag/drivers/linuxgpiod.c
+++ b/src/jtag/drivers/linuxgpiod.c
@@ -46,6 +46,7 @@ struct gpiod_line_settings {
 	int value;
 	int drive;
 	int bias;
+	int active_low;
 };
 
 static struct gpiod_line_settings *gpiod_line_settings_new(void)
@@ -97,6 +98,13 @@ static int gpiod_line_settings_set_drive(struct gpiod_line_settings *settings, i
 	return 0;
 }
 
+static void gpiod_line_settings_set_active_low(struct gpiod_line_settings *settings,
+	bool active_low)
+{
+	if (active_low)
+		settings->active_low = GPIOD_LINE_REQUEST_FLAG_ACTIVE_LOW;
+}
+
 static void gpiod_request_config_set_consumer(struct gpiod_request_config *config,
 	const char *consumer)
 {
@@ -455,11 +463,10 @@ static int helper_get_line(enum adapter_gpio_config_index idx)
 		break;
 	}
 
-	if (adapter_gpio_config[idx].active_low)
-		flags |= GPIOD_LINE_REQUEST_FLAG_ACTIVE_LOW;
+	gpiod_line_settings_set_active_low(line_settings, adapter_gpio_config[idx].active_low);
 
 	req_cfg->request_type = line_settings->direction;
-	req_cfg->flags = flags | line_settings->drive | line_settings->bias;
+	req_cfg->flags = flags | line_settings->drive | line_settings->bias | line_settings->active_low;
 
 	retval = gpiod_line_request(gpiod_line[idx], req_cfg, line_settings->value);
 	if (retval < 0) {

-----------------------------------------------------------------------

Summary of changes:
 configure.ac                  |  17 +-
 src/jtag/drivers/linuxgpiod.c | 408 ++++++++++++++++++++++++++++++++----------
 2 files changed, 325 insertions(+), 100 deletions(-)


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-- 
Main OpenOCD repository

[OpenOCD-commit] Main OpenOCD repository branch, master, updated. v0.12.0-1217-g4b311d3b8

[openocd-gerrit <ope...@us...>]

This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".

The branch, master has been updated
       via  4b311d3b8f4221938eabccda23f99c4d64ca8dcb (commit)
       via  78ea8c7fb4755089d4190c580dbf6bb60c7721e1 (commit)
      from  981ae530fc4fcca57a5e66b0459783b92ccbc29f (commit)

Those revisions listed above that are new to this repository have
not appeared on any other notification email; so we list those
revisions in full, below.

- Log -----------------------------------------------------------------
commit 4b311d3b8f4221938eabccda23f99c4d64ca8dcb
Author: Antonio Borneo <bor...@gm...>
Date:   Sun Apr 7 18:25:49 2024 +0200

    jtag: linuxgpiod: use libgpiod v2 API to set gpio bias
    
    Define and use dummy functions from v2 for v1:
    - gpiod_line_settings_set_bias().
    
    Change-Id: I96d32b6200d3bb6ca7c16e7a18e3860f367b5008
    Signed-off-by: Antonio Borneo <bor...@gm...>
    Reviewed-on: https://review.openocd.org/c/openocd/+/8205
    Reviewed-by: Tomas Vanek <va...@fb...>
    Tested-by: jenkins

diff --git a/src/jtag/drivers/linuxgpiod.c b/src/jtag/drivers/linuxgpiod.c
index 6afb1dcc9..dc9b9f5d5 100644
--- a/src/jtag/drivers/linuxgpiod.c
+++ b/src/jtag/drivers/linuxgpiod.c
@@ -35,12 +35,17 @@
 #define GPIOD_LINE_DRIVE_OPEN_DRAIN     GPIOD_LINE_REQUEST_FLAG_OPEN_DRAIN
 #define GPIOD_LINE_DRIVE_OPEN_SOURCE    GPIOD_LINE_REQUEST_FLAG_OPEN_SOURCE
 
+#define GPIOD_LINE_BIAS_DISABLED        GPIOD_LINE_REQUEST_FLAG_BIAS_DISABLE
+#define GPIOD_LINE_BIAS_PULL_UP         GPIOD_LINE_REQUEST_FLAG_BIAS_PULL_UP
+#define GPIOD_LINE_BIAS_PULL_DOWN       GPIOD_LINE_REQUEST_FLAG_BIAS_PULL_DOWN
+
 #define gpiod_request_config            gpiod_line_request_config
 
 struct gpiod_line_settings {
 	int direction;
 	int value;
 	int drive;
+	int bias;
 };
 
 static struct gpiod_line_settings *gpiod_line_settings_new(void)
@@ -98,6 +103,30 @@ static void gpiod_request_config_set_consumer(struct gpiod_request_config *confi
 	config->consumer = consumer;
 }
 
+#ifdef HAVE_LIBGPIOD1_FLAGS_BIAS
+
+static int gpiod_line_settings_set_bias(struct gpiod_line_settings *settings, int bias)
+{
+	settings->bias = bias;
+
+	return 0;
+}
+
+#else /* HAVE_LIBGPIOD1_FLAGS_BIAS */
+
+static int gpiod_line_settings_set_bias(struct gpiod_line_settings *settings, int bias)
+{
+	if (bias == GPIOD_LINE_BIAS_DISABLED)
+		return 0;
+
+	LOG_WARNING("linuxgpiod: ignoring request for pull-%s: not supported by gpiod v%s",
+				(bias == GPIOD_LINE_BIAS_PULL_UP) ? "up" : "down",
+				gpiod_version_string());
+
+	return -1;
+}
+
+#endif /* HAVE_LIBGPIOD1_FLAGS_BIAS */
 #endif /* HAVE_LIBGPIOD_V1 */
 
 static struct gpiod_chip *gpiod_chip[ADAPTER_GPIO_IDX_NUM] = {};
@@ -416,25 +445,13 @@ static int helper_get_line(enum adapter_gpio_config_index idx)
 
 	switch (adapter_gpio_config[idx].pull) {
 	case ADAPTER_GPIO_PULL_NONE:
-#ifdef HAVE_LIBGPIOD1_FLAGS_BIAS
-		flags |= GPIOD_LINE_REQUEST_FLAG_BIAS_DISABLE;
-#endif
+		gpiod_line_settings_set_bias(line_settings, GPIOD_LINE_BIAS_DISABLED);
 		break;
 	case ADAPTER_GPIO_PULL_UP:
-#ifdef HAVE_LIBGPIOD1_FLAGS_BIAS
-		flags |= GPIOD_LINE_REQUEST_FLAG_BIAS_PULL_UP;
-#else
-		LOG_WARNING("linuxgpiod: ignoring request for pull-up on %s: not supported by gpiod v%s",
-			adapter_gpio_get_name(idx), gpiod_version_string());
-#endif
+		gpiod_line_settings_set_bias(line_settings, GPIOD_LINE_BIAS_PULL_UP);
 		break;
 	case ADAPTER_GPIO_PULL_DOWN:
-#ifdef HAVE_LIBGPIOD1_FLAGS_BIAS
-		flags |= GPIOD_LINE_REQUEST_FLAG_BIAS_PULL_DOWN;
-#else
-		LOG_WARNING("linuxgpiod: ignoring request for pull-down on %s: not supported by gpiod v%s",
-			adapter_gpio_get_name(idx), gpiod_version_string());
-#endif
+		gpiod_line_settings_set_bias(line_settings, GPIOD_LINE_BIAS_PULL_DOWN);
 		break;
 	}
 
@@ -442,7 +459,7 @@ static int helper_get_line(enum adapter_gpio_config_index idx)
 		flags |= GPIOD_LINE_REQUEST_FLAG_ACTIVE_LOW;
 
 	req_cfg->request_type = line_settings->direction;
-	req_cfg->flags = flags | line_settings->drive;
+	req_cfg->flags = flags | line_settings->drive | line_settings->bias;
 
 	retval = gpiod_line_request(gpiod_line[idx], req_cfg, line_settings->value);
 	if (retval < 0) {

commit 78ea8c7fb4755089d4190c580dbf6bb60c7721e1
Author: Antonio Borneo <bor...@gm...>
Date:   Sun Apr 7 18:15:48 2024 +0200

    jtag: linuxgpiod: use libgpiod v2 API to set gpio drive
    
    Define and use dummy functions from v2 for v1:
    - gpiod_line_settings_set_drive().
    
    Change-Id: Ic058e85c441c9f8db63919be5166172be5b72221
    Signed-off-by: Antonio Borneo <bor...@gm...>
    Reviewed-on: https://review.openocd.org/c/openocd/+/8204
    Tested-by: jenkins
    Reviewed-by: Tomas Vanek <va...@fb...>

diff --git a/src/jtag/drivers/linuxgpiod.c b/src/jtag/drivers/linuxgpiod.c
index fa0b38ebb..6afb1dcc9 100644
--- a/src/jtag/drivers/linuxgpiod.c
+++ b/src/jtag/drivers/linuxgpiod.c
@@ -31,11 +31,16 @@
 #define GPIOD_LINE_VALUE_INACTIVE       0
 #define GPIOD_LINE_VALUE_ACTIVE         1
 
+#define GPIOD_LINE_DRIVE_PUSH_PULL      0
+#define GPIOD_LINE_DRIVE_OPEN_DRAIN     GPIOD_LINE_REQUEST_FLAG_OPEN_DRAIN
+#define GPIOD_LINE_DRIVE_OPEN_SOURCE    GPIOD_LINE_REQUEST_FLAG_OPEN_SOURCE
+
 #define gpiod_request_config            gpiod_line_request_config
 
 struct gpiod_line_settings {
 	int direction;
 	int value;
+	int drive;
 };
 
 static struct gpiod_line_settings *gpiod_line_settings_new(void)
@@ -80,6 +85,13 @@ static int gpiod_line_settings_set_output_value(struct gpiod_line_settings *sett
 	return 0;
 }
 
+static int gpiod_line_settings_set_drive(struct gpiod_line_settings *settings, int drive)
+{
+	settings->drive = drive;
+
+	return 0;
+}
+
 static void gpiod_request_config_set_consumer(struct gpiod_request_config *config,
 	const char *consumer)
 {
@@ -392,12 +404,13 @@ static int helper_get_line(enum adapter_gpio_config_index idx)
 
 	switch (adapter_gpio_config[idx].drive) {
 	case ADAPTER_GPIO_DRIVE_MODE_PUSH_PULL:
+		gpiod_line_settings_set_drive(line_settings, GPIOD_LINE_DRIVE_PUSH_PULL);
 		break;
 	case ADAPTER_GPIO_DRIVE_MODE_OPEN_DRAIN:
-		flags |= GPIOD_LINE_REQUEST_FLAG_OPEN_DRAIN;
+		gpiod_line_settings_set_drive(line_settings, GPIOD_LINE_DRIVE_OPEN_DRAIN);
 		break;
 	case ADAPTER_GPIO_DRIVE_MODE_OPEN_SOURCE:
-		flags |= GPIOD_LINE_REQUEST_FLAG_OPEN_SOURCE;
+		gpiod_line_settings_set_drive(line_settings, GPIOD_LINE_DRIVE_OPEN_SOURCE);
 		break;
 	}
 
@@ -429,7 +442,7 @@ static int helper_get_line(enum adapter_gpio_config_index idx)
 		flags |= GPIOD_LINE_REQUEST_FLAG_ACTIVE_LOW;
 
 	req_cfg->request_type = line_settings->direction;
-	req_cfg->flags = flags;
+	req_cfg->flags = flags | line_settings->drive;
 
 	retval = gpiod_line_request(gpiod_line[idx], req_cfg, line_settings->value);
 	if (retval < 0) {

-----------------------------------------------------------------------

Summary of changes:
 src/jtag/drivers/linuxgpiod.c | 66 +++++++++++++++++++++++++++++++------------
 1 file changed, 48 insertions(+), 18 deletions(-)


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- Log -----------------------------------------------------------------
commit 981ae530fc4fcca57a5e66b0459783b92ccbc29f
Author: Antonio Borneo <bor...@gm...>
Date:   Sun Apr 7 17:45:07 2024 +0200

    jtag: linuxgpiod: use libgpiod v2 to set gpio state
    
    Define and use dummy functions from v2 for v1:
    - gpiod_line_settings_new(),
    - gpiod_line_settings_free(),
    - gpiod_line_settings_set_direction(),
    - gpiod_line_settings_set_output_value().
    
    Change-Id: I7d147fa49daf1d008744fab5bf0001c570ea43d6
    Signed-off-by: Antonio Borneo <bor...@gm...>
    Reviewed-on: https://review.openocd.org/c/openocd/+/8203
    Tested-by: jenkins
    Reviewed-by: Tomas Vanek <va...@fb...>

diff --git a/src/jtag/drivers/linuxgpiod.c b/src/jtag/drivers/linuxgpiod.c
index 6336a56d0..fa0b38ebb 100644
--- a/src/jtag/drivers/linuxgpiod.c
+++ b/src/jtag/drivers/linuxgpiod.c
@@ -25,8 +25,28 @@
  */
 #ifdef HAVE_LIBGPIOD_V1
 
+#define GPIOD_LINE_DIRECTION_INPUT      GPIOD_LINE_REQUEST_DIRECTION_INPUT
+#define GPIOD_LINE_DIRECTION_OUTPUT     GPIOD_LINE_REQUEST_DIRECTION_OUTPUT
+
+#define GPIOD_LINE_VALUE_INACTIVE       0
+#define GPIOD_LINE_VALUE_ACTIVE         1
+
 #define gpiod_request_config            gpiod_line_request_config
 
+struct gpiod_line_settings {
+	int direction;
+	int value;
+};
+
+static struct gpiod_line_settings *gpiod_line_settings_new(void)
+{
+	static struct gpiod_line_settings my;
+
+	my = (struct gpiod_line_settings) { 0 };
+
+	return &my;
+}
+
 static struct gpiod_request_config *gpiod_request_config_new(void)
 {
 	static struct gpiod_request_config my;
@@ -36,10 +56,30 @@ static struct gpiod_request_config *gpiod_request_config_new(void)
 	return &my;
 }
 
+static void gpiod_line_settings_free(struct gpiod_line_settings *settings)
+{
+}
+
 static void gpiod_request_config_free(struct gpiod_request_config *config)
 {
 }
 
+static int gpiod_line_settings_set_direction(struct gpiod_line_settings *settings,
+	int direction)
+{
+	settings->direction = direction;
+
+	return 0;
+}
+
+static int gpiod_line_settings_set_output_value(struct gpiod_line_settings *settings,
+	int value)
+{
+	settings->value = value;
+
+	return 0;
+}
+
 static void gpiod_request_config_set_consumer(struct gpiod_request_config *config,
 	const char *consumer)
 {
@@ -309,7 +349,7 @@ static int helper_get_line(enum adapter_gpio_config_index idx)
 	if (!is_gpio_config_valid(idx))
 		return ERROR_OK;
 
-	int dir = GPIOD_LINE_REQUEST_DIRECTION_INPUT, flags = 0, val = 0, retval;
+	int flags = 0, retval;
 
 	snprintf(chip_path, sizeof(chip_path), "/dev/gpiochip%u", adapter_gpio_config[idx].chip_num);
 	gpiod_chip[idx] = gpiod_chip_open(chip_path);
@@ -325,8 +365,10 @@ static int helper_get_line(enum adapter_gpio_config_index idx)
 		return ERROR_JTAG_INIT_FAILED;
 	}
 
+	struct gpiod_line_settings *line_settings = gpiod_line_settings_new();
 	struct gpiod_request_config *req_cfg = gpiod_request_config_new();
-	if (!req_cfg) {
+
+	if (!line_settings || !req_cfg) {
 		LOG_ERROR("Cannot configure LinuxGPIOD line for %s", adapter_gpio_get_name(idx));
 		retval = ERROR_JTAG_INIT_FAILED;
 		goto err_out;
@@ -336,15 +378,15 @@ static int helper_get_line(enum adapter_gpio_config_index idx)
 
 	switch (adapter_gpio_config[idx].init_state) {
 	case ADAPTER_GPIO_INIT_STATE_INPUT:
-		dir = GPIOD_LINE_REQUEST_DIRECTION_INPUT;
+		gpiod_line_settings_set_direction(line_settings, GPIOD_LINE_DIRECTION_INPUT);
 		break;
 	case ADAPTER_GPIO_INIT_STATE_INACTIVE:
-		dir = GPIOD_LINE_REQUEST_DIRECTION_OUTPUT;
-		val = 0;
+		gpiod_line_settings_set_direction(line_settings, GPIOD_LINE_DIRECTION_OUTPUT);
+		gpiod_line_settings_set_output_value(line_settings, GPIOD_LINE_VALUE_INACTIVE);
 		break;
 	case ADAPTER_GPIO_INIT_STATE_ACTIVE:
-		dir = GPIOD_LINE_REQUEST_DIRECTION_OUTPUT;
-		val = 1;
+		gpiod_line_settings_set_direction(line_settings, GPIOD_LINE_DIRECTION_OUTPUT);
+		gpiod_line_settings_set_output_value(line_settings, GPIOD_LINE_VALUE_ACTIVE);
 		break;
 	}
 
@@ -386,10 +428,10 @@ static int helper_get_line(enum adapter_gpio_config_index idx)
 	if (adapter_gpio_config[idx].active_low)
 		flags |= GPIOD_LINE_REQUEST_FLAG_ACTIVE_LOW;
 
-	req_cfg->request_type = dir;
+	req_cfg->request_type = line_settings->direction;
 	req_cfg->flags = flags;
 
-	retval = gpiod_line_request(gpiod_line[idx], req_cfg, val);
+	retval = gpiod_line_request(gpiod_line[idx], req_cfg, line_settings->value);
 	if (retval < 0) {
 		LOG_ERROR("Error requesting gpio line %s", adapter_gpio_get_name(idx));
 		retval = ERROR_JTAG_INIT_FAILED;
@@ -399,6 +441,7 @@ static int helper_get_line(enum adapter_gpio_config_index idx)
 	retval = ERROR_OK;
 
 err_out:
+	gpiod_line_settings_free(line_settings);
 	gpiod_request_config_free(req_cfg);
 
 	return retval;

commit fcbdab78c918f6dc014d953836ef66e03e07c336
Author: Antonio Borneo <bor...@gm...>
Date:   Sun Apr 7 17:18:40 2024 +0200

    jtag: linuxgpiod: wrap gpiod_request_config from libgpiod v2
    
    Reorganize the code of helper_get_line() for label err_out.
    Define and use dummy functions from v2 for v1:
    - gpiod_request_config_new(),
    - gpiod_request_config_free(),
    - gpiod_request_config_set_consumer().
    
    Change-Id: Ide7cd8459941a5a863c425a2b5abf1fb4a075874
    Signed-off-by: Antonio Borneo <bor...@gm...>
    Reviewed-on: https://review.openocd.org/c/openocd/+/8202
    Tested-by: jenkins
    Reviewed-by: Tomas Vanek <va...@fb...>

diff --git a/src/jtag/drivers/linuxgpiod.c b/src/jtag/drivers/linuxgpiod.c
index 6f71205ca..6336a56d0 100644
--- a/src/jtag/drivers/linuxgpiod.c
+++ b/src/jtag/drivers/linuxgpiod.c
@@ -19,6 +19,35 @@
 #include <transport/transport.h>
 #include "bitbang.h"
 
+/*
+ * In case of libgpiod v1, use as much as possible API from v2 plus
+ * the dummy wrappers below.
+ */
+#ifdef HAVE_LIBGPIOD_V1
+
+#define gpiod_request_config            gpiod_line_request_config
+
+static struct gpiod_request_config *gpiod_request_config_new(void)
+{
+	static struct gpiod_request_config my;
+
+	my = (struct gpiod_request_config) { NULL, 0, 0 };
+
+	return &my;
+}
+
+static void gpiod_request_config_free(struct gpiod_request_config *config)
+{
+}
+
+static void gpiod_request_config_set_consumer(struct gpiod_request_config *config,
+	const char *consumer)
+{
+	config->consumer = consumer;
+}
+
+#endif /* HAVE_LIBGPIOD_V1 */
+
 static struct gpiod_chip *gpiod_chip[ADAPTER_GPIO_IDX_NUM] = {};
 static struct gpiod_line *gpiod_line[ADAPTER_GPIO_IDX_NUM] = {};
 
@@ -296,6 +325,15 @@ static int helper_get_line(enum adapter_gpio_config_index idx)
 		return ERROR_JTAG_INIT_FAILED;
 	}
 
+	struct gpiod_request_config *req_cfg = gpiod_request_config_new();
+	if (!req_cfg) {
+		LOG_ERROR("Cannot configure LinuxGPIOD line for %s", adapter_gpio_get_name(idx));
+		retval = ERROR_JTAG_INIT_FAILED;
+		goto err_out;
+	}
+
+	gpiod_request_config_set_consumer(req_cfg, "OpenOCD");
+
 	switch (adapter_gpio_config[idx].init_state) {
 	case ADAPTER_GPIO_INIT_STATE_INPUT:
 		dir = GPIOD_LINE_REQUEST_DIRECTION_INPUT;
@@ -348,19 +386,22 @@ static int helper_get_line(enum adapter_gpio_config_index idx)
 	if (adapter_gpio_config[idx].active_low)
 		flags |= GPIOD_LINE_REQUEST_FLAG_ACTIVE_LOW;
 
-	struct gpiod_line_request_config config = {
-		.consumer = "OpenOCD",
-		.request_type = dir,
-		.flags = flags,
-	};
+	req_cfg->request_type = dir;
+	req_cfg->flags = flags;
 
-	retval = gpiod_line_request(gpiod_line[idx], &config, val);
+	retval = gpiod_line_request(gpiod_line[idx], req_cfg, val);
 	if (retval < 0) {
 		LOG_ERROR("Error requesting gpio line %s", adapter_gpio_get_name(idx));
-		return ERROR_JTAG_INIT_FAILED;
+		retval = ERROR_JTAG_INIT_FAILED;
+		goto err_out;
 	}
 
-	return ERROR_OK;
+	retval = ERROR_OK;
+
+err_out:
+	gpiod_request_config_free(req_cfg);
+
+	return retval;
 }
 
 static int linuxgpiod_init(void)

-----------------------------------------------------------------------

Summary of changes:
 src/jtag/drivers/linuxgpiod.c | 112 ++++++++++++++++++++++++++++++++++++------
 1 file changed, 98 insertions(+), 14 deletions(-)


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- Log -----------------------------------------------------------------
commit 82d0aac95b7440f62ee29e1888809c52503a3220
Author: Michael Heimpold <mh...@he...>
Date:   Sun Sep 14 11:47:10 2025 +0200

    jtag: linuxgpiod: add macro HAVE_LIBGPIOD_V1
    
    To prepare the support for libgpiod v2, add a macro to report the
    old version v1 of the library.
    
    Extracted part of 8226: jtag: linuxgpiod:
    finalize emulation of libgpiod v2 API for older versions
    
    Link: https://review.openocd.org/c/openocd/+/8226
    Change-Id: Ib9c4e495b326770fabadbc752df8aa0a920b1831
    Signed-off-by: Michael Heimpold <mh...@he...>
    Signed-off-by: Tomas Vanek <va...@fb...>
    Signed-off-by: Antonio Borneo <bor...@gm...>
    Reviewed-on: https://review.openocd.org/c/openocd/+/9118
    Tested-by: jenkins

diff --git a/configure.ac b/configure.ac
index 01077847b..3060940ed 100644
--- a/configure.ac
+++ b/configure.ac
@@ -585,6 +585,7 @@ PKG_CHECK_MODULES([LIBFTDI], [libftdi1], [
 
 PKG_CHECK_MODULES([LIBGPIOD], [libgpiod < 2.0], [
 	use_libgpiod=yes
+	AC_DEFINE([HAVE_LIBGPIOD_V1], [1], [define if libgpiod is version v1.x])
 	PKG_CHECK_EXISTS([libgpiod >= 1.5],
 		[AC_DEFINE([HAVE_LIBGPIOD1_FLAGS_BIAS], [1], [define if libgpiod v1 has line request flags bias])])
 ], [use_libgpiod=no])

-----------------------------------------------------------------------

Summary of changes:
 configure.ac | 1 +
 1 file changed, 1 insertion(+)


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- Log -----------------------------------------------------------------
commit 601d478015dcbd96ce9dcde57f8004b9a13fd311
Author: Antonio Borneo <bor...@gm...>
Date:   Sun Apr 7 16:00:14 2024 +0200

    jtag: linuxgpiod: replace gpiod_chip_open_by_number()
    
    Preparing for libgpiod v2, replace v1 specific function
    gpiod_chip_open_by_number() with the common v1 & v2 function
    gpiod_chip_open().
    
    Change-Id: I5f0f9bef739f4097fb74f78b5b6e2fe823c1ab87
    Signed-off-by: Antonio Borneo <bor...@gm...>
    Reviewed-on: https://review.openocd.org/c/openocd/+/8201
    Tested-by: jenkins
    Reviewed-by: Tomas Vanek <va...@fb...>

diff --git a/src/jtag/drivers/linuxgpiod.c b/src/jtag/drivers/linuxgpiod.c
index 36c7e0493..6f71205ca 100644
--- a/src/jtag/drivers/linuxgpiod.c
+++ b/src/jtag/drivers/linuxgpiod.c
@@ -275,12 +275,15 @@ static int linuxgpiod_quit(void)
 
 static int helper_get_line(enum adapter_gpio_config_index idx)
 {
+	char chip_path[24];
+
 	if (!is_gpio_config_valid(idx))
 		return ERROR_OK;
 
 	int dir = GPIOD_LINE_REQUEST_DIRECTION_INPUT, flags = 0, val = 0, retval;
 
-	gpiod_chip[idx] = gpiod_chip_open_by_number(adapter_gpio_config[idx].chip_num);
+	snprintf(chip_path, sizeof(chip_path), "/dev/gpiochip%u", adapter_gpio_config[idx].chip_num);
+	gpiod_chip[idx] = gpiod_chip_open(chip_path);
 	if (!gpiod_chip[idx]) {
 		LOG_ERROR("Cannot open LinuxGPIOD chip %d for %s", adapter_gpio_config[idx].chip_num,
 			adapter_gpio_get_name(idx));

-----------------------------------------------------------------------

Summary of changes:
 src/jtag/drivers/linuxgpiod.c | 5 ++++-
 1 file changed, 4 insertions(+), 1 deletion(-)


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- Log -----------------------------------------------------------------
commit 27ab12dd82de8154724db96b921d6b0ed650eb2d
Author: Antonio Borneo <bor...@gm...>
Date:   Sat Sep 13 20:41:31 2025 +0200

    target: extend registers match on 'get_reg' and 'set_reg'
    
    Some target, like aarch64, has more than one bank of registers.
    
    Let the commands 'get_reg' and 'set_reg' to search the register
    name in all banks, as is already done in command 'reg'.
    
    Change-Id: Iae350a52f993790c5546925a2f7f81fbdb3f49b8
    Signed-off-by: Antonio Borneo <bor...@gm...>
    Fixes: e8e62c5aca49 ("target/tcl: Add get_reg function")
    Fixes: da7328010165 ("target/tcl: Add set_reg function")
    Reviewed-on: https://review.openocd.org/c/openocd/+/9122
    Tested-by: jenkins
    Reviewed-by: zapb <de...@za...>

diff --git a/src/target/target.c b/src/target/target.c
index 1bdbee19a..bdf0ff244 100644
--- a/src/target/target.c
+++ b/src/target/target.c
@@ -4745,7 +4745,7 @@ COMMAND_HANDLER(handle_target_get_reg)
 
 		const char *reg_name = Jim_String(elem);
 
-		struct reg *reg = register_get_by_name(target->reg_cache, reg_name, false);
+		struct reg *reg = register_get_by_name(target->reg_cache, reg_name, true);
 
 		if (!reg || !reg->exist) {
 			command_print(CMD, "unknown register '%s'", reg_name);
@@ -4803,7 +4803,7 @@ COMMAND_HANDLER(handle_set_reg_command)
 	for (unsigned int i = 0; i < length; i += 2) {
 		const char *reg_name = Jim_String(dict[i]);
 		const char *reg_value = Jim_String(dict[i + 1]);
-		struct reg *reg = register_get_by_name(target->reg_cache, reg_name, false);
+		struct reg *reg = register_get_by_name(target->reg_cache, reg_name, true);
 
 		if (!reg || !reg->exist) {
 			command_print(CMD, "unknown register '%s'", reg_name);

-----------------------------------------------------------------------

Summary of changes:
 src/target/target.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)


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- Log -----------------------------------------------------------------
commit 3b03e439dee2f1b3959f38246fa44a51210e7108
Author: Daniel Anselmi <dan...@gm...>
Date:   Fri Sep 12 23:42:21 2025 +0200

    tcl/board/digilent_zybo: clarify supported/tested hardware
    
    Clarify that this config has been tested with the Zybo board but
    not with the Zybo Z7 board.
    
    Change-Id: Id826480444364e5916f25c1c219c5ddaa3ec827d
    Signed-off-by: Daniel Anselmi <dan...@gm...>
    Reviewed-on: https://review.openocd.org/c/openocd/+/9019
    Tested-by: jenkins
    Reviewed-by: Antonio Borneo <bor...@gm...>

diff --git a/tcl/board/digilent_zybo.cfg b/tcl/board/digilent_zybo.cfg
index 97d54302a..8573399f8 100644
--- a/tcl/board/digilent_zybo.cfg
+++ b/tcl/board/digilent_zybo.cfg
@@ -1,8 +1,11 @@
 # SPDX-License-Identifier: GPL-2.0-or-later
 
-# digilent zybo
+# Digilent Zybo
 # https://digilent.com/reference/programmable-logic/zybo/start
 
+# Tested with the Zybo board from Digilent (older).
+# Not tested with the Zybo Z7 board from Digilent (newer).
+
 
 adapter driver ftdi
 ftdi channel 0

-----------------------------------------------------------------------

Summary of changes:
 tcl/board/digilent_zybo.cfg | 5 ++++-
 1 file changed, 4 insertions(+), 1 deletion(-)


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commit 4ae92ee3b9c8c2eaa07dc22262cdc2c1eec6412d
Author: Paul Fertser <fer...@gm...>
Date:   Wed Sep 17 19:19:24 2025 +0300

    tcl/target/rp2040: fix reset-init rom_api_call invocation
    
    The reset-init handler needs to call the ROM API function to enable
    XIP from flash.
    
    Correct syntax for this command is to supply two-letter function code
    as the first argument, flash bank number sholudn't be there.
    
    Reported-by: Thomas D. Dean <to...@wa...>
    Fixes: 376d11c2e38303094976186d59502ab7d3073452
    Signed-off-by: Paul Fertser <fer...@gm...>
    Change-Id: I94713630300ead32bc9db6a1a77658fa5d5214d4
    Reviewed-on: https://review.openocd.org/c/openocd/+/9134
    Tested-by: jenkins
    Reviewed-by: Tomas Vanek <va...@fb...>

diff --git a/tcl/target/rp2040.cfg b/tcl/target/rp2040.cfg
index dab3f8da3..262de4418 100644
--- a/tcl/target/rp2040.cfg
+++ b/tcl/target/rp2040.cfg
@@ -85,7 +85,7 @@ if { $_USE_CORE != 1 } {
 
 	# After a rescue reset or if halted in BOOTSEL connect the flash to enable
 	# reads from the XIP cached mapping area
-	$_TARGETNAME_0 configure -event reset-init { rp2xxx rom_api_call 0 CX }
+	$_TARGETNAME_0 configure -event reset-init { rp2xxx rom_api_call CX }
 }
 
 # core 1

-----------------------------------------------------------------------

Summary of changes:
 tcl/target/rp2040.cfg | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)


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commit 0732a9bb7b3066ca10cd178986e9baea0f57f161
Author: Marc Schink <de...@za...>
Date:   Mon Sep 1 17:09:33 2025 +0200

    doc/manual: Drop LaTeX style guide
    
    LaTeX is not used for the documentation but only as (intermediate)
    output format. Developers do not need to write any LaTeX code at all and
    will not need to do so in the future, so we do not need a style guide.
    
    Remove the section on LaTeX from the style guide to make it clearer and
    avoid confusion.
    
    Change-Id: I238a35445616f39e38104ad0ff50ab246dd5990f
    Signed-off-by: Marc Schink <de...@za...>
    Reviewed-on: https://review.openocd.org/c/openocd/+/9110
    Tested-by: jenkins
    Reviewed-by: Antonio Borneo <bor...@gm...>

diff --git a/doc/manual/primer/docs.txt b/doc/manual/primer/docs.txt
index 1aefa17e6..ccf4550d5 100644
--- a/doc/manual/primer/docs.txt
+++ b/doc/manual/primer/docs.txt
@@ -16,7 +16,6 @@ OpenOCD presently produces several kinds of documentation:
   - Provides overview, usage, reference, and FAQ for each device.
   - Written using LaTeX language with custom macros.
   - Created with 'make references'.
-  - See @subpage primerlatex and @ref stylelatex.
 - The Manual:
   - Focuses on developing the OpenOCD software.
   - Details the architecture, driver interfaces, and processes.
@@ -44,19 +43,6 @@ the Texinfo web site for the Texinfo manual and more information.
 OpenOCD style guidelines for Texinfo documentation can be found on the
 @ref styletexinfo page.
 
- */
-/** @page primerlatex LaTeX Primer
-
-The OpenOCD project provides a number of reference guides using the
-LaTeX typesetting language.
-
-- OpenOCD Quick Reference Sheets
-- OpenOCD Hardware Reference Guides
-
-These documents have not yet been produced, so this Primer serves as
-a placeholder to describe how they are created and can be extended.
-The same holds true for the @ref stylelatex page.
-
  */
 /** @page primerdoxygen Doxygen Primer
 
@@ -118,7 +104,6 @@ This file contains the Doxygen source code for the @ref primerdocs.
 The @ref primerdocs page also contains the following sections:
 
 - @ref primertexinfo
-- @ref primerlatex
 - @ref primerdoxygen
 
  */
diff --git a/doc/manual/style.txt b/doc/manual/style.txt
index f7a12988f..fa08f4de9 100644
--- a/doc/manual/style.txt
+++ b/doc/manual/style.txt
@@ -22,7 +22,6 @@ providing documentation, either as part of the C code or stand-alone.
 
 - @subpage styledoxygen
 - @subpage styletexinfo
-- @subpage stylelatex
 
 Feedback would be welcome to improve the OpenOCD guidelines.
 
@@ -449,13 +448,6 @@ be as productive as possible.  Needing to look at OpenOCD source code,
 to figure out how to use it is a bad sign, though it's OK to need to
 look at the User's guide to figure out what a config script is doing.
 
- */
-/** @page stylelatex LaTeX Style Guide
-
-This page needs to provide style guidelines for using LaTeX, the
-typesetting language used by The References for OpenOCD Hardware.
-Likewise, the @ref primerlatex for using this guide needs to be completed.
-
  */
 /** @page styleperl Perl Style Guide
 
@@ -510,7 +502,6 @@ documentation languages:
 - @ref stylec
 - @ref styledoxygen
 - @ref styletexinfo
-- @ref stylelatex
 - @ref styleperl
 - @ref styleautotools
 

commit db2cd0f5a593858e3d956549b5d353cb05d48757
Author: Marc Schink <de...@za...>
Date:   Thu Feb 6 10:07:03 2025 +0100

    README.Windows: Remove outdated pkg-config section
    
    pkg-config [1] and the compatible tool pkgconf [2] are available via the
    package manager as for other systems. No need to install it manually
    from other sources.
    
    [1] https://packages.msys2.org/packages/mingw-w64-x86_64-pkg-config
    [2] https://packages.msys2.org/package/mingw-w64-x86_64-pkgconf
    
    Change-Id: I36e115fce8ab542aa0377483f24e4a374faeef58
    Signed-off-by: Marc Schink <de...@za...>
    Reviewed-on: https://review.openocd.org/c/openocd/+/9108
    Reviewed-by: Antonio Borneo <bor...@gm...>
    Tested-by: jenkins

diff --git a/README.Windows b/README.Windows
index 64bf5c0c6..293eed975 100644
--- a/README.Windows
+++ b/README.Windows
@@ -10,18 +10,6 @@ host. See README for the generic instructions.
 Also, the MSYS2 project provides both ready-made binaries and an easy
 way to self-compile from their software repository out of the box.
 
-Native MinGW-w64/MSYS compilation
------------------------------
-
-As MSYS doesn't come with pkg-config pre-installed, you need to add it
-manually. The easiest way to do that is to download pkg-config-lite
-from:
-
-  http://sourceforge.net/projects/pkgconfiglite/
-
-Then simply unzip the archive to the root directory of your MinGW-w64
-installation.
-
 USB adapters
 ------------
 

-----------------------------------------------------------------------

Summary of changes:
 README.Windows             | 12 ------------
 doc/manual/primer/docs.txt | 15 ---------------
 doc/manual/style.txt       |  9 ---------
 3 files changed, 36 deletions(-)


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commit e10fb1e2a4bd36ea8b47eb2ddc85cccf53e05a47
Author: Ryan QIAN <jia...@hp...>
Date:   Wed Sep 10 12:23:26 2025 +0800

    gdb_server: Fix buffer size calculation for snprintf null terminator
    
    The buffer size check was using len + 4 but snprintf requires additional
    space for the null terminator. The snprintf call formats '#%02x' which
    needs 4 bytes total (1 for '#', 2 for checksum, 1 for null terminator).
    
    The original check of len + 4 was insufficient and could cause snprintf
    to truncate the checksum and replace the last character with '\0',
    leading to malformed GDB packets.
    
    Fix by changing the buffer size check from len + 4 to len + 5 (1 for '$',
    1 for '#', 2 for checksum, 1 for null terminator) to provide adequate space
    for snprintf's null terminator.
    
    Change-Id: Ibf8b3c3f5e4d5ac5be795b8e688e055453798afe
    Signed-off-by: Ryan QIAN <jia...@hp...>
    Reviewed-on: https://review.openocd.org/c/openocd/+/9117
    Tested-by: jenkins
    Reviewed-by: Tomas Vanek <va...@fb...>

diff --git a/src/server/gdb_server.c b/src/server/gdb_server.c
index e06412db5..356dd6ec4 100644
--- a/src/server/gdb_server.c
+++ b/src/server/gdb_server.c
@@ -474,7 +474,7 @@ static int gdb_put_packet_inner(struct connection *connection,
 
 		char local_buffer[1024];
 		local_buffer[0] = '$';
-		if ((size_t)len + 4 <= sizeof(local_buffer)) {
+		if ((size_t)len + 5 <= sizeof(local_buffer)) {
 			/* performance gain on smaller packets by only a single call to gdb_write() */
 			memcpy(local_buffer + 1, buffer, len++);
 			len += snprintf(local_buffer + len, sizeof(local_buffer) - len, "#%02x", my_checksum);

-----------------------------------------------------------------------

Summary of changes:
 src/server/gdb_server.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)


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commit 874be7dc034f0f09f25861c8545a104c6d0c3e22
Author: Tomas Vanek <va...@fb...>
Date:   Thu Sep 4 15:04:12 2025 +0200

    tcl/target/rp2040: fix typo in the comment
    
    and use better wording.
    
    Change-Id: I733283a957957354bdf527240be73b711631e372
    Signed-off-by: Tomas Vanek <va...@fb...>
    Reviewed-on: https://review.openocd.org/c/openocd/+/9112
    Tested-by: jenkins
    Reviewed-by: Antonio Borneo <bor...@gm...>

diff --git a/tcl/target/rp2040.cfg b/tcl/target/rp2040.cfg
index da88a3125..dab3f8da3 100644
--- a/tcl/target/rp2040.cfg
+++ b/tcl/target/rp2040.cfg
@@ -83,7 +83,7 @@ if { $_USE_CORE != 1 } {
 	# srst does not exist; use SYSRESETREQ to perform a soft reset
 	$_TARGETNAME_0 cortex_m reset_config sysresetreq
 
-	# After a rescue reset and fi BOOTSEL is halted connect the flash to enable
+	# After a rescue reset or if halted in BOOTSEL connect the flash to enable
 	# reads from the XIP cached mapping area
 	$_TARGETNAME_0 configure -event reset-init { rp2xxx rom_api_call 0 CX }
 }

-----------------------------------------------------------------------

Summary of changes:
 tcl/target/rp2040.cfg | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)


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commit a6752a1671f7387ee3232bf84fe27a3746a55ac9
Author: Samuel Obuch <sam...@es...>
Date:   Mon Sep 8 12:25:32 2025 +0200

    jtag/drivers/cmsis_dap: fix build with cmsis_dap_tcp backend
    
    For some hosts build fails after the recent cmsis_dap_tcp addition
    (see commit fcff4b712c53 ("jtag/drivers/cmsis_dap: add new backend
    cmsis_dap_tcp") or https://review.openocd.org/c/openocd/+/8973)
    
    - Header 'hidapi.h' may not be available and should not be needed here.
    
    - Global pointer variable is not guaranteed to be treated as a constant
      expression even with const modifier. Use global array instead, to avoid
      'error: initializer element is not constant', as address of a global
      array is a constant expression.
    
    Change-Id: I0c72ff52340f546a5f635663a8fde28c99176d1b
    Signed-off-by: Samuel Obuch <sam...@es...>
    Reviewed-on: https://review.openocd.org/c/openocd/+/9115
    Tested-by: jenkins
    Reviewed-by: Brian Kuschak <bku...@gm...>
    Reviewed-by: Tomas Vanek <va...@fb...>

diff --git a/src/jtag/drivers/cmsis_dap_tcp.c b/src/jtag/drivers/cmsis_dap_tcp.c
index a654c6bff..8a96cd624 100644
--- a/src/jtag/drivers/cmsis_dap_tcp.c
+++ b/src/jtag/drivers/cmsis_dap_tcp.c
@@ -20,7 +20,6 @@
 #include "config.h"
 #endif
 
-#include <hidapi.h>
 #ifdef HAVE_NETDB_H
 #include <netdb.h>
 #endif
@@ -90,7 +89,7 @@ struct cmsis_dap_backend_data {
 };
 
 static char *cmsis_dap_tcp_host;
-static char *const cmsis_dap_tcp_port_default = STRINGIFY(CMSIS_DAP_TCP_PORT);
+static char cmsis_dap_tcp_port_default[] = STRINGIFY(CMSIS_DAP_TCP_PORT);
 static char *cmsis_dap_tcp_port = cmsis_dap_tcp_port_default;
 static int cmsis_dap_tcp_min_timeout_ms = DEFAULT_MIN_TIMEOUT_MS;
 

-----------------------------------------------------------------------

Summary of changes:
 src/jtag/drivers/cmsis_dap_tcp.c | 3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)


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commit c2cfeee471bd4a1b77ab1c30329200bb5fd37af4
Author: Peter Lawrence <maj...@gm...>
Date:   Thu Aug 28 17:18:03 2025 -0500

    add tcl/board/pico2-debug.cfg; update tcl/board/pico-debug.cfg
    
    pico-debug and pico2-debug are virtual CMSIS-DAP adapters that
    run on the otherwise dormant second core of the RP2040 and RP2350
    respectively.
    
    Change-Id: Ifd7dcbbabeb86c738cc58854add0e897633197de
    Signed-off-by: Peter Lawrence <maj...@gm...>
    Reviewed-on: https://review.openocd.org/c/openocd/+/9099
    Reviewed-by: Tomas Vanek <va...@fb...>
    Tested-by: jenkins

diff --git a/tcl/board/pico-debug.cfg b/tcl/board/pico-debug.cfg
index ba59f860a..8139663f2 100644
--- a/tcl/board/pico-debug.cfg
+++ b/tcl/board/pico-debug.cfg
@@ -6,5 +6,5 @@
 source [find interface/cmsis-dap.cfg]
 adapter speed 4000
 
-set CHIPNAME rp2040
-source [find target/rp2040-core0.cfg]
+set USE_CORE 0
+source [find target/rp2040.cfg]
diff --git a/tcl/board/pico2-debug.cfg b/tcl/board/pico2-debug.cfg
new file mode 100644
index 000000000..d0a4c6af5
--- /dev/null
+++ b/tcl/board/pico2-debug.cfg
@@ -0,0 +1,10 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+# pico2-debug is a virtual CMSIS-DAP debug adapter
+# it runs on the very same RP2350 target being debugged without additional hardware
+# https://github.com/majbthrd/pico2-debug
+
+source [find interface/cmsis-dap.cfg]
+adapter speed 4000
+
+set USE_CORE 0
+source [find target/rp2350.cfg]

-----------------------------------------------------------------------

Summary of changes:
 tcl/board/pico-debug.cfg  |  4 ++--
 tcl/board/pico2-debug.cfg | 10 ++++++++++
 2 files changed, 12 insertions(+), 2 deletions(-)
 create mode 100644 tcl/board/pico2-debug.cfg


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commit 9279a489d466529e94ff8abc92e3565f6b1fc010
Author: Marc Schink <de...@za...>
Date:   Sun Jul 27 14:26:35 2025 +0200

    target/stm8: Remove useless parentheses
    
    Parentheses are not necessary here, remove them.
    
    Change-Id: I793639fbef38688045104d351fb4e5320f1eba2a
    Signed-off-by: Marc Schink <de...@za...>
    Reviewed-on: https://review.openocd.org/c/openocd/+/9058
    Reviewed-by: Antonio Borneo <bor...@gm...>
    Tested-by: jenkins

diff --git a/src/target/stm8.c b/src/target/stm8.c
index 1fc028b4d..05989eeb9 100644
--- a/src/target/stm8.c
+++ b/src/target/stm8.c
@@ -704,13 +704,13 @@ static int stm8_write_flash(struct target *target, enum mem_type type,
 	int res;
 
 	switch (type) {
-	case (FLASH):
+	case FLASH:
 		stm8_unlock_flash(target);
 		break;
-	case (EEPROM):
+	case EEPROM:
 		stm8_unlock_eeprom(target);
 		break;
-	case (OPTION):
+	case OPTION:
 		stm8_unlock_eeprom(target);
 		opt = OPT;
 		break;

-----------------------------------------------------------------------

Summary of changes:
 src/target/stm8.c | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)


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- Log -----------------------------------------------------------------
commit ddef9cf73b1a39a2cf07ab04c8aee3aae1caae98
Author: Antonio Borneo <bor...@gm...>
Date:   Sat Jul 26 15:46:26 2025 +0200

    target: align switch and case statements
    
    The coding style requires the 'case' to be at the same indentation
    level of its 'switch' statement.
    
    Align the code accordingly.
    
    While there:
    - add space around the operators;
    - drop useless empty line.
    
    Skip all riscv code, as it is going to be updated soon from the
    external fork.
    
    No changes are reported by
            git log -p -w --ignore-blank-lines --patience
    
    Change-Id: I2691dfdd2b6734143e14160b46183623e9773539
    Signed-off-by: Antonio Borneo <bor...@gm...>
    Reviewed-on: https://review.openocd.org/c/openocd/+/9051
    Tested-by: jenkins

diff --git a/src/target/aarch64.c b/src/target/aarch64.c
index 9539a6437..ed9cb48aa 100644
--- a/src/target/aarch64.c
+++ b/src/target/aarch64.c
@@ -613,22 +613,22 @@ static int aarch64_restore_one(struct target *target, bool current,
 	 * kill the return address
 	 */
 	switch (arm->core_state) {
-		case ARM_STATE_ARM:
-			resume_pc &= 0xFFFFFFFC;
-			break;
-		case ARM_STATE_AARCH64:
-			resume_pc &= 0xFFFFFFFFFFFFFFFCULL;
-			break;
-		case ARM_STATE_THUMB:
-		case ARM_STATE_THUMB_EE:
-			/* When the return address is loaded into PC
-			 * bit 0 must be 1 to stay in Thumb state
-			 */
-			resume_pc |= 0x1;
-			break;
-		case ARM_STATE_JAZELLE:
-			LOG_ERROR("How do I resume into Jazelle state??");
-			return ERROR_FAIL;
+	case ARM_STATE_ARM:
+		resume_pc &= 0xFFFFFFFC;
+		break;
+	case ARM_STATE_AARCH64:
+		resume_pc &= 0xFFFFFFFFFFFFFFFCULL;
+		break;
+	case ARM_STATE_THUMB:
+	case ARM_STATE_THUMB_EE:
+		/* When the return address is loaded into PC
+		 * bit 0 must be 1 to stay in Thumb state
+		 */
+		resume_pc |= 0x1;
+		break;
+	case ARM_STATE_JAZELLE:
+		LOG_ERROR("How do I resume into Jazelle state??");
+		return ERROR_FAIL;
 	}
 	LOG_DEBUG("resume pc = 0x%016" PRIx64, resume_pc);
 	buf_set_u64(arm->pc->value, 0, 64, resume_pc);
@@ -3026,14 +3026,14 @@ COMMAND_HANDLER(aarch64_handle_disassemble_command)
 	target_addr_t address;
 
 	switch (CMD_ARGC) {
-		case 2:
-			COMMAND_PARSE_NUMBER(int, CMD_ARGV[1], count);
-		/* FALL THROUGH */
-		case 1:
-			COMMAND_PARSE_ADDRESS(CMD_ARGV[0], address);
-			break;
-		default:
-			return ERROR_COMMAND_SYNTAX_ERROR;
+	case 2:
+		COMMAND_PARSE_NUMBER(int, CMD_ARGV[1], count);
+	/* FALL THROUGH */
+	case 1:
+		COMMAND_PARSE_ADDRESS(CMD_ARGV[0], address);
+		break;
+	default:
+		return ERROR_COMMAND_SYNTAX_ERROR;
 	}
 
 	return a64_disassemble(CMD, target, address, count);
diff --git a/src/target/arc.c b/src/target/arc.c
index f2482c25e..638e22099 100644
--- a/src/target/arc.c
+++ b/src/target/arc.c
@@ -1892,18 +1892,18 @@ static int arc_set_watchpoint(struct target *target,
 
 	int enable = AP_AC_TT_DISABLE;
 	switch (watchpoint->rw) {
-		case WPT_READ:
-			enable = AP_AC_TT_READ;
-			break;
-		case WPT_WRITE:
-			enable = AP_AC_TT_WRITE;
-			break;
-		case WPT_ACCESS:
-			enable = AP_AC_TT_READWRITE;
-			break;
-		default:
-			LOG_TARGET_ERROR(target, "BUG: watchpoint->rw neither read, write nor access");
-			return ERROR_FAIL;
+	case WPT_READ:
+		enable = AP_AC_TT_READ;
+		break;
+	case WPT_WRITE:
+		enable = AP_AC_TT_WRITE;
+		break;
+	case WPT_ACCESS:
+		enable = AP_AC_TT_READWRITE;
+		break;
+	default:
+		LOG_TARGET_ERROR(target, "BUG: watchpoint->rw neither read, write nor access");
+		return ERROR_FAIL;
 	}
 
 	int retval =  arc_configure_actionpoint(target, wp_num,
diff --git a/src/target/arc_cmd.c b/src/target/arc_cmd.c
index bf8a8aa28..2e42398d2 100644
--- a/src/target/arc_cmd.c
+++ b/src/target/arc_cmd.c
@@ -709,29 +709,29 @@ COMMAND_HANDLER(arc_handle_get_reg_field)
 	int retval = arc_reg_get_field(target, reg_name, field_name, &value);
 
 	switch (retval) {
-		case ERROR_OK:
-			break;
-		case ERROR_ARC_REGISTER_NOT_FOUND:
-			command_print(CMD,
-				"Register `%s' has not been found.", reg_name);
-			return ERROR_COMMAND_ARGUMENT_INVALID;
-		case ERROR_ARC_REGISTER_IS_NOT_STRUCT:
-			command_print(CMD,
-				"Register `%s' must have 'struct' type.", reg_name);
-			return ERROR_COMMAND_ARGUMENT_INVALID;
-		case ERROR_ARC_REGISTER_FIELD_NOT_FOUND:
-			command_print(CMD,
-				"Field `%s' has not been found in register `%s'.",
-				field_name, reg_name);
-			return ERROR_COMMAND_ARGUMENT_INVALID;
-		case ERROR_ARC_FIELD_IS_NOT_BITFIELD:
-			command_print(CMD,
-				"Field `%s' is not a 'bitfield' field in a structure.",
-				field_name);
-			return ERROR_COMMAND_ARGUMENT_INVALID;
-		default:
-			/* Pass through other errors. */
-			return retval;
+	case ERROR_OK:
+		break;
+	case ERROR_ARC_REGISTER_NOT_FOUND:
+		command_print(CMD,
+			"Register `%s' has not been found.", reg_name);
+		return ERROR_COMMAND_ARGUMENT_INVALID;
+	case ERROR_ARC_REGISTER_IS_NOT_STRUCT:
+		command_print(CMD,
+			"Register `%s' must have 'struct' type.", reg_name);
+		return ERROR_COMMAND_ARGUMENT_INVALID;
+	case ERROR_ARC_REGISTER_FIELD_NOT_FOUND:
+		command_print(CMD,
+			"Field `%s' has not been found in register `%s'.",
+			field_name, reg_name);
+		return ERROR_COMMAND_ARGUMENT_INVALID;
+	case ERROR_ARC_FIELD_IS_NOT_BITFIELD:
+		command_print(CMD,
+			"Field `%s' is not a 'bitfield' field in a structure.",
+			field_name);
+		return ERROR_COMMAND_ARGUMENT_INVALID;
+	default:
+		/* Pass through other errors. */
+		return retval;
 	}
 
 	command_print(CMD, "0x%" PRIx32, value);
diff --git a/src/target/arm11.c b/src/target/arm11.c
index a3e3ef843..81026c68c 100644
--- a/src/target/arm11.c
+++ b/src/target/arm11.c
@@ -414,19 +414,19 @@ static uint32_t arm11_nextpc(struct arm11_common *arm11, bool current,
 	 * kill the return address
 	 */
 	switch (arm11->arm.core_state) {
-		case ARM_STATE_ARM:
-			address &= 0xFFFFFFFC;
-			break;
-		case ARM_STATE_THUMB:
-			/* When the return address is loaded into PC
-			 * bit 0 must be 1 to stay in Thumb state
-			 */
-			address |= 0x1;
-			break;
-
-		/* catch-all for JAZELLE and THUMB_EE */
-		default:
-			break;
+	case ARM_STATE_ARM:
+		address &= 0xFFFFFFFC;
+		break;
+	case ARM_STATE_THUMB:
+		/* When the return address is loaded into PC
+		 * bit 0 must be 1 to stay in Thumb state
+		 */
+		address |= 0x1;
+		break;
+
+	/* catch-all for JAZELLE and THUMB_EE */
+	default:
+		break;
 	}
 
 	buf_set_u32(value, 0, 32, address);
@@ -819,44 +819,44 @@ static int arm11_read_memory_inner(struct target *target,
 		return retval;
 
 	switch (size) {
-		case 1:
-			arm11->arm.core_cache->reg_list[1].dirty = true;
+	case 1:
+		arm11->arm.core_cache->reg_list[1].dirty = true;
 
-			for (size_t i = 0; i < count; i++) {
-				/* ldrb    r1, [r0], #1 */
-				/* ldrb    r1, [r0] */
-				CHECK_RETVAL(arm11_run_instr_no_data1(arm11,
-						!arm11_config_memrw_no_increment ? 0xe4d01001 : 0xe5d01000));
+		for (size_t i = 0; i < count; i++) {
+			/* ldrb    r1, [r0], #1 */
+			/* ldrb    r1, [r0] */
+			CHECK_RETVAL(arm11_run_instr_no_data1(arm11,
+					!arm11_config_memrw_no_increment ? 0xe4d01001 : 0xe5d01000));
 
-				uint32_t res;
-				/* MCR p14,0,R1,c0,c5,0 */
-				CHECK_RETVAL(arm11_run_instr_data_from_core(arm11, 0xEE001E15, &res, 1));
+			uint32_t res;
+			/* MCR p14,0,R1,c0,c5,0 */
+			CHECK_RETVAL(arm11_run_instr_data_from_core(arm11, 0xEE001E15, &res, 1));
 
-				*buffer++ = res;
-			}
+			*buffer++ = res;
+		}
 
-			break;
+		break;
 
-		case 2:
-			arm11->arm.core_cache->reg_list[1].dirty = true;
+	case 2:
+		arm11->arm.core_cache->reg_list[1].dirty = true;
 
-			for (size_t i = 0; i < count; i++) {
-				/* ldrh    r1, [r0], #2 */
-				CHECK_RETVAL(arm11_run_instr_no_data1(arm11,
-						!arm11_config_memrw_no_increment ? 0xe0d010b2 : 0xe1d010b0));
+		for (size_t i = 0; i < count; i++) {
+			/* ldrh    r1, [r0], #2 */
+			CHECK_RETVAL(arm11_run_instr_no_data1(arm11,
+					!arm11_config_memrw_no_increment ? 0xe0d010b2 : 0xe1d010b0));
 
-				uint32_t res;
+			uint32_t res;
 
-				/* MCR p14,0,R1,c0,c5,0 */
-				CHECK_RETVAL(arm11_run_instr_data_from_core(arm11, 0xEE001E15, &res, 1));
+			/* MCR p14,0,R1,c0,c5,0 */
+			CHECK_RETVAL(arm11_run_instr_data_from_core(arm11, 0xEE001E15, &res, 1));
 
-				uint16_t svalue = res;
-				memcpy(buffer + i * sizeof(uint16_t), &svalue, sizeof(uint16_t));
-			}
+			uint16_t svalue = res;
+			memcpy(buffer + i * sizeof(uint16_t), &svalue, sizeof(uint16_t));
+		}
 
-			break;
+		break;
 
-		case 4:
+	case 4:
 		{
 			uint32_t instr = !arm11_config_memrw_no_increment ? 0xecb05e01 : 0xed905e00;
 			/** \todo TODO: buffer cast to uint32_t* causes alignment warnings */
@@ -925,52 +925,52 @@ static int arm11_write_memory_inner(struct target *target,
 	bool burst = arm11->memwrite_burst && (count > 1);
 
 	switch (size) {
-		case 1:
-			arm11->arm.core_cache->reg_list[1].dirty = true;
-
-			for (size_t i = 0; i < count; i++) {
-				/* load r1 from DCC with byte data */
-				/* MRC p14,0,r1,c0,c5,0 */
-				retval = arm11_run_instr_data_to_core1(arm11, 0xee101e15, *buffer++);
-				if (retval != ERROR_OK)
-					return retval;
-
-				/* write r1 to memory */
-				/* strb    r1, [r0], #1 */
-				/* strb    r1, [r0] */
-				retval = arm11_run_instr_no_data1(arm11,
-						!no_increment ? 0xe4c01001 : 0xe5c01000);
-				if (retval != ERROR_OK)
-					return retval;
-			}
+	case 1:
+		arm11->arm.core_cache->reg_list[1].dirty = true;
 
-			break;
+		for (size_t i = 0; i < count; i++) {
+			/* load r1 from DCC with byte data */
+			/* MRC p14,0,r1,c0,c5,0 */
+			retval = arm11_run_instr_data_to_core1(arm11, 0xee101e15, *buffer++);
+			if (retval != ERROR_OK)
+				return retval;
 
-		case 2:
-			arm11->arm.core_cache->reg_list[1].dirty = true;
-
-			for (size_t i = 0; i < count; i++) {
-				uint16_t value;
-				memcpy(&value, buffer + i * sizeof(uint16_t), sizeof(uint16_t));
-
-				/* load r1 from DCC with halfword data */
-				/* MRC p14,0,r1,c0,c5,0 */
-				retval = arm11_run_instr_data_to_core1(arm11, 0xee101e15, value);
-				if (retval != ERROR_OK)
-					return retval;
-
-				/* write r1 to memory */
-				/* strh    r1, [r0], #2 */
-				/* strh    r1, [r0] */
-				retval = arm11_run_instr_no_data1(arm11,
-						!no_increment ? 0xe0c010b2 : 0xe1c010b0);
-				if (retval != ERROR_OK)
-					return retval;
-			}
+			/* write r1 to memory */
+			/* strb    r1, [r0], #1 */
+			/* strb    r1, [r0] */
+			retval = arm11_run_instr_no_data1(arm11,
+					!no_increment ? 0xe4c01001 : 0xe5c01000);
+			if (retval != ERROR_OK)
+				return retval;
+		}
 
-			break;
+		break;
+
+	case 2:
+		arm11->arm.core_cache->reg_list[1].dirty = true;
 
-		case 4:
+		for (size_t i = 0; i < count; i++) {
+			uint16_t value;
+			memcpy(&value, buffer + i * sizeof(uint16_t), sizeof(uint16_t));
+
+			/* load r1 from DCC with halfword data */
+			/* MRC p14,0,r1,c0,c5,0 */
+			retval = arm11_run_instr_data_to_core1(arm11, 0xee101e15, value);
+			if (retval != ERROR_OK)
+				return retval;
+
+			/* write r1 to memory */
+			/* strh    r1, [r0], #2 */
+			/* strh    r1, [r0] */
+			retval = arm11_run_instr_no_data1(arm11,
+					!no_increment ? 0xe0c010b2 : 0xe1c010b0);
+			if (retval != ERROR_OK)
+				return retval;
+		}
+
+		break;
+
+	case 4:
 		{
 			/* stream word data through DCC directly to memory */
 			/* increment:		STC p14,c5,[R0],#4 */
@@ -1159,34 +1159,34 @@ static int arm11_examine(struct target *target)
 
 	/* assume the manufacturer id is ok; check the part # */
 	switch ((device_id >> 12) & 0xFFFF) {
-		case 0x7B36:
-			type = "ARM1136";
-			break;
-		case 0x7B37:
-			type = "ARM11 MPCore";
-			break;
-		case 0x7B56:
-			type = "ARM1156";
-			break;
-		case 0x7B76:
-			arm11->arm.core_type = ARM_CORE_TYPE_SEC_EXT;
-			/* NOTE: could default arm11->hardware_step to true */
-			type = "ARM1176";
-			break;
-		default:
-			LOG_ERROR("unexpected ARM11 ID code");
-			return ERROR_FAIL;
+	case 0x7B36:
+		type = "ARM1136";
+		break;
+	case 0x7B37:
+		type = "ARM11 MPCore";
+		break;
+	case 0x7B56:
+		type = "ARM1156";
+		break;
+	case 0x7B76:
+		arm11->arm.core_type = ARM_CORE_TYPE_SEC_EXT;
+		/* NOTE: could default arm11->hardware_step to true */
+		type = "ARM1176";
+		break;
+	default:
+		LOG_ERROR("unexpected ARM11 ID code");
+		return ERROR_FAIL;
 	}
 	LOG_INFO("found %s", type);
 
 	/* unlikely this could ever fail, but ... */
 	switch ((didr >> 16) & 0x0F) {
-		case ARM11_DEBUG_V6:
-		case ARM11_DEBUG_V61:	/* supports security extensions */
-			break;
-		default:
-			LOG_ERROR("Only ARM v6 and v6.1 debug supported.");
-			return ERROR_FAIL;
+	case ARM11_DEBUG_V6:
+	case ARM11_DEBUG_V61:	/* supports security extensions */
+		break;
+	default:
+		LOG_ERROR("Only ARM v6 and v6.1 debug supported.");
+		return ERROR_FAIL;
 	}
 
 	arm11->brp = ((didr >> 24) & 0x0F) + 1;
@@ -1250,13 +1250,13 @@ COMMAND_HANDLER(arm11_handle_vcr)
 	struct arm11_common *arm11 = target_to_arm11(target);
 
 	switch (CMD_ARGC) {
-		case 0:
-			break;
-		case 1:
-			COMMAND_PARSE_NUMBER(u32, CMD_ARGV[0], arm11->vcr);
-			break;
-		default:
-			return ERROR_COMMAND_SYNTAX_ERROR;
+	case 0:
+		break;
+	case 1:
+		COMMAND_PARSE_NUMBER(u32, CMD_ARGV[0], arm11->vcr);
+		break;
+	default:
+		return ERROR_COMMAND_SYNTAX_ERROR;
 	}
 
 	LOG_INFO("VCR 0x%08" PRIx32, arm11->vcr);
diff --git a/src/target/arm11_dbgtap.c b/src/target/arm11_dbgtap.c
index 4c7211365..4c2fedaeb 100644
--- a/src/target/arm11_dbgtap.c
+++ b/src/target/arm11_dbgtap.c
@@ -85,30 +85,30 @@ static const char *arm11_ir_to_string(uint8_t ir)
 	const char *s = "unknown";
 
 	switch (ir) {
-		case ARM11_EXTEST:
-			s = "EXTEST";
-			break;
-		case ARM11_SCAN_N:
-			s = "SCAN_N";
-			break;
-		case ARM11_RESTART:
-			s = "RESTART";
-			break;
-		case ARM11_HALT:
-			s = "HALT";
-			break;
-		case ARM11_INTEST:
-			s = "INTEST";
-			break;
-		case ARM11_ITRSEL:
-			s = "ITRSEL";
-			break;
-		case ARM11_IDCODE:
-			s = "IDCODE";
-			break;
-		case ARM11_BYPASS:
-			s = "BYPASS";
-			break;
+	case ARM11_EXTEST:
+		s = "EXTEST";
+		break;
+	case ARM11_SCAN_N:
+		s = "SCAN_N";
+		break;
+	case ARM11_RESTART:
+		s = "RESTART";
+		break;
+	case ARM11_HALT:
+		s = "HALT";
+		break;
+	case ARM11_INTEST:
+		s = "INTEST";
+		break;
+	case ARM11_ITRSEL:
+		s = "ITRSEL";
+		break;
+	case ARM11_IDCODE:
+		s = "IDCODE";
+		break;
+	case ARM11_BYPASS:
+		s = "BYPASS";
+		break;
 	}
 	return s;
 }
@@ -1061,17 +1061,17 @@ static int arm11_bpwp_enable(struct arm_dpm *dpm, unsigned int index_t,
 	action[1].value = control;
 
 	switch (index_t) {
-	    case 0 ... 15:
-		    action[0].address = ARM11_SC7_BVR0 + index_t;
-		    action[1].address = ARM11_SC7_BCR0 + index_t;
-		    break;
-	    case 16 ... 32:
-		    index_t -= 16;
-		    action[0].address = ARM11_SC7_WVR0 + index_t;
-		    action[1].address = ARM11_SC7_WCR0 + index_t;
-		    break;
-	    default:
-		    return ERROR_FAIL;
+	case 0 ... 15:
+	    action[0].address = ARM11_SC7_BVR0 + index_t;
+	    action[1].address = ARM11_SC7_BCR0 + index_t;
+	    break;
+	case 16 ... 32:
+	    index_t -= 16;
+	    action[0].address = ARM11_SC7_WVR0 + index_t;
+	    action[1].address = ARM11_SC7_WCR0 + index_t;
+	    break;
+	default:
+	    return ERROR_FAIL;
 	}
 
 	arm11->bpwp_n += 2;
@@ -1090,15 +1090,15 @@ static int arm11_bpwp_disable(struct arm_dpm *dpm, unsigned int index_t)
 	action[0].value = 0;
 
 	switch (index_t) {
-	    case 0 ... 15:
-		    action[0].address = ARM11_SC7_BCR0 + index_t;
-		    break;
-	    case 16 ... 32:
-		    index_t -= 16;
-		    action[0].address = ARM11_SC7_WCR0 + index_t;
-		    break;
-	    default:
-		    return ERROR_FAIL;
+	case 0 ... 15:
+	    action[0].address = ARM11_SC7_BCR0 + index_t;
+	    break;
+	case 16 ... 32:
+	    index_t -= 16;
+	    action[0].address = ARM11_SC7_WCR0 + index_t;
+	    break;
+	default:
+	    return ERROR_FAIL;
 	}
 
 	arm11->bpwp_n += 1;
diff --git a/src/target/arm7_9_common.c b/src/target/arm7_9_common.c
index 3a066e07d..c4bedcd85 100644
--- a/src/target/arm7_9_common.c
+++ b/src/target/arm7_9_common.c
@@ -2136,18 +2136,48 @@ int arm7_9_read_memory(struct target *target,
 	arm7_9->write_core_regs(target, 0x1, reg);
 
 	switch (size) {
-		case 4:
-			while (num_accesses < count) {
-				uint32_t reg_list;
-				thisrun_accesses =
-						((count - num_accesses) >= 14) ? 14 : (count - num_accesses);
-				reg_list = (0xffff >> (15 - thisrun_accesses)) & 0xfffe;
+	case 4:
+		while (num_accesses < count) {
+			uint32_t reg_list;
+			thisrun_accesses =
+					((count - num_accesses) >= 14) ? 14 : (count - num_accesses);
+			reg_list = (0xffff >> (15 - thisrun_accesses)) & 0xfffe;
+
+			if (last_reg <= thisrun_accesses)
+				last_reg = thisrun_accesses;
+
+			arm7_9->load_word_regs(target, reg_list);
+
+			/* fast memory reads are only safe when the target is running
+			 * from a sufficiently high clock (32 kHz is usually too slow)
+			 */
+			if (arm7_9->fast_memory_access)
+				retval = arm7_9_execute_fast_sys_speed(target);
+			else
+				retval = arm7_9_execute_sys_speed(target);
+			if (retval != ERROR_OK)
+				return retval;
 
-				if (last_reg <= thisrun_accesses)
-					last_reg = thisrun_accesses;
+			arm7_9->read_core_regs_target_buffer(target, reg_list, buffer, 4);
 
-				arm7_9->load_word_regs(target, reg_list);
+			/* advance buffer, count number of accesses */
+			buffer += thisrun_accesses * 4;
+			num_accesses += thisrun_accesses;
 
+			keep_alive();
+		}
+		break;
+	case 2:
+		while (num_accesses < count) {
+			uint32_t reg_list;
+			thisrun_accesses =
+					((count - num_accesses) >= 14) ? 14 : (count - num_accesses);
+			reg_list = (0xffff >> (15 - thisrun_accesses)) & 0xfffe;
+
+			for (i = 1; i <= thisrun_accesses; i++) {
+				if (i > last_reg)
+				    last_reg = i;
+				arm7_9->load_hword_reg(target, i);
 				/* fast memory reads are only safe when the target is running
 				 * from a sufficiently high clock (32 kHz is usually too slow)
 				 */
@@ -2158,78 +2188,48 @@ int arm7_9_read_memory(struct target *target,
 				if (retval != ERROR_OK)
 					return retval;
 
-				arm7_9->read_core_regs_target_buffer(target, reg_list, buffer, 4);
-
-				/* advance buffer, count number of accesses */
-				buffer += thisrun_accesses * 4;
-				num_accesses += thisrun_accesses;
-
-				keep_alive();
 			}
-			break;
-		case 2:
-			while (num_accesses < count) {
-				uint32_t reg_list;
-				thisrun_accesses =
-						((count - num_accesses) >= 14) ? 14 : (count - num_accesses);
-				reg_list = (0xffff >> (15 - thisrun_accesses)) & 0xfffe;
-
-				for (i = 1; i <= thisrun_accesses; i++) {
-					if (i > last_reg)
-					    last_reg = i;
-					arm7_9->load_hword_reg(target, i);
-					/* fast memory reads are only safe when the target is running
-					 * from a sufficiently high clock (32 kHz is usually too slow)
-					 */
-					if (arm7_9->fast_memory_access)
-						retval = arm7_9_execute_fast_sys_speed(target);
-					else
-						retval = arm7_9_execute_sys_speed(target);
-					if (retval != ERROR_OK)
-						return retval;
 
-				}
-
-				arm7_9->read_core_regs_target_buffer(target, reg_list, buffer, 2);
+			arm7_9->read_core_regs_target_buffer(target, reg_list, buffer, 2);
 
-				/* advance buffer, count number of accesses */
-				buffer += thisrun_accesses * 2;
-				num_accesses += thisrun_accesses;
+			/* advance buffer, count number of accesses */
+			buffer += thisrun_accesses * 2;
+			num_accesses += thisrun_accesses;
 
-				keep_alive();
+			keep_alive();
+		}
+		break;
+	case 1:
+		while (num_accesses < count) {
+			uint32_t reg_list;
+			thisrun_accesses =
+					((count - num_accesses) >= 14) ? 14 : (count - num_accesses);
+			reg_list = (0xffff >> (15 - thisrun_accesses)) & 0xfffe;
+
+			for (i = 1; i <= thisrun_accesses; i++) {
+				if (i > last_reg)
+					last_reg = i;
+				arm7_9->load_byte_reg(target, i);
+				/* fast memory reads are only safe when the target is running
+				 * from a sufficiently high clock (32 kHz is usually too slow)
+				 */
+				if (arm7_9->fast_memory_access)
+					retval = arm7_9_execute_fast_sys_speed(target);
+				else
+					retval = arm7_9_execute_sys_speed(target);
+				if (retval != ERROR_OK)
+					return retval;
 			}
-			break;
-		case 1:
-			while (num_accesses < count) {
-				uint32_t reg_list;
-				thisrun_accesses =
-						((count - num_accesses) >= 14) ? 14 : (count - num_accesses);
-				reg_list = (0xffff >> (15 - thisrun_accesses)) & 0xfffe;
-
-				for (i = 1; i <= thisrun_accesses; i++) {
-					if (i > last_reg)
-						last_reg = i;
-					arm7_9->load_byte_reg(target, i);
-					/* fast memory reads are only safe when the target is running
-					 * from a sufficiently high clock (32 kHz is usually too slow)
-					 */
-					if (arm7_9->fast_memory_access)
-						retval = arm7_9_execute_fast_sys_speed(target);
-					else
-						retval = arm7_9_execute_sys_speed(target);
-					if (retval != ERROR_OK)
-						return retval;
-				}
 
-				arm7_9->read_core_regs_target_buffer(target, reg_list, buffer, 1);
+			arm7_9->read_core_regs_target_buffer(target, reg_list, buffer, 1);
 
-				/* advance buffer, count number of accesses */
-				buffer += thisrun_accesses * 1;
-				num_accesses += thisrun_accesses;
+			/* advance buffer, count number of accesses */
+			buffer += thisrun_accesses * 1;
+			num_accesses += thisrun_accesses;
 
-				keep_alive();
-			}
-			break;
+			keep_alive();
+		}
+		break;
 	}
 
 	if (!is_arm_mode(arm->core_mode))
@@ -2308,23 +2308,67 @@ int arm7_9_write_memory(struct target *target,
 	embeddedice_store_reg(dbg_ctrl);
 
 	switch (size) {
-		case 4:
-			while (num_accesses < count) {
-				uint32_t reg_list;
-				thisrun_accesses =
-						((count - num_accesses) >= 14) ? 14 : (count - num_accesses);
-				reg_list = (0xffff >> (15 - thisrun_accesses)) & 0xfffe;
-
-				for (i = 1; i <= thisrun_accesses; i++) {
-					if (i > last_reg)
-						last_reg = i;
-					reg[i] = target_buffer_get_u32(target, buffer);
-					buffer += 4;
-				}
+	case 4:
+		while (num_accesses < count) {
+			uint32_t reg_list;
+			thisrun_accesses =
+					((count - num_accesses) >= 14) ? 14 : (count - num_accesses);
+			reg_list = (0xffff >> (15 - thisrun_accesses)) & 0xfffe;
+
+			for (i = 1; i <= thisrun_accesses; i++) {
+				if (i > last_reg)
+					last_reg = i;
+				reg[i] = target_buffer_get_u32(target, buffer);
+				buffer += 4;
+			}
+
+			arm7_9->write_core_regs(target, reg_list, reg);
 
-				arm7_9->write_core_regs(target, reg_list, reg);
+			arm7_9->store_word_regs(target, reg_list);
 
-				arm7_9->store_word_regs(target, reg_list);
+			/* fast memory writes are only safe when the target is running
+			 * from a sufficiently high clock (32 kHz is usually too slow)
+			 */
+			if (arm7_9->fast_memory_access) {
+				retval = arm7_9_execute_fast_sys_speed(target);
+			} else {
+				retval = arm7_9_execute_sys_speed(target);
+
+				/*
+				 * if memory writes are made when the clock is running slow
+				 * (i.e. 32 kHz) which is necessary in some scripts to reconfigure
+				 * processor operations after a "reset halt" or "reset init",
+				 * need to immediately stroke the keep alive or will end up with
+				 * gdb "keep alive not sent error message" problem.
+				 */
+
+				keep_alive();
+			}
+
+			if (retval != ERROR_OK)
+				return retval;
+
+			num_accesses += thisrun_accesses;
+		}
+		break;
+	case 2:
+		while (num_accesses < count) {
+			uint32_t reg_list;
+			thisrun_accesses =
+					((count - num_accesses) >= 14) ? 14 : (count - num_accesses);
+			reg_list = (0xffff >> (15 - thisrun_accesses)) & 0xfffe;
+
+			for (i = 1; i <= thisrun_accesses; i++) {
+				if (i > last_reg)
+					last_reg = i;
+				reg[i] = target_buffer_get_u16(target, buffer) & 0xffff;
+				buffer += 2;
+			}
+
+			arm7_9->write_core_regs(target, reg_list, reg);
+
+			for (i = 1; i <= thisrun_accesses; i++) {
+				arm7_9->store_hword_reg(target, i);
 
 				/* fast memory writes are only safe when the target is running
 				 * from a sufficiently high clock (32 kHz is usually too slow)
@@ -2347,99 +2391,55 @@ int arm7_9_write_memory(struct target *target,
 
 				if (retval != ERROR_OK)
 					return retval;
+			}
 
-				num_accesses += thisrun_accesses;
+			num_accesses += thisrun_accesses;
+		}
+		break;
+	case 1:
+		while (num_accesses < count) {
+			uint32_t reg_list;
+			thisrun_accesses =
+					((count - num_accesses) >= 14) ? 14 : (count - num_accesses);
+			reg_list = (0xffff >> (15 - thisrun_accesses)) & 0xfffe;
+
+			for (i = 1; i <= thisrun_accesses; i++) {
+				if (i > last_reg)
+					last_reg = i;
+				reg[i] = *buffer++ & 0xff;
 			}
-			break;
-		case 2:
-			while (num_accesses < count) {
-				uint32_t reg_list;
-				thisrun_accesses =
-						((count - num_accesses) >= 14) ? 14 : (count - num_accesses);
-				reg_list = (0xffff >> (15 - thisrun_accesses)) & 0xfffe;
-
-				for (i = 1; i <= thisrun_accesses; i++) {
-					if (i > last_reg)
-						last_reg = i;
-					reg[i] = target_buffer_get_u16(target, buffer) & 0xffff;
-					buffer += 2;
-				}
 
-				arm7_9->write_core_regs(target, reg_list, reg);
+			arm7_9->write_core_regs(target, reg_list, reg);
 
-				for (i = 1; i <= thisrun_accesses; i++) {
-					arm7_9->store_hword_reg(target, i);
+			for (i = 1; i <= thisrun_accesses; i++) {
+				arm7_9->store_byte_reg(target, i);
+				/* fast memory writes are only safe when the target is running
+				 * from a sufficiently high clock (32 kHz is usually too slow)
+				 */
+				if (arm7_9->fast_memory_access) {
+					retval = arm7_9_execute_fast_sys_speed(target);
+				} else {
+					retval = arm7_9_execute_sys_speed(target);
 
-					/* fast memory writes are only safe when the target is running
-					 * from a sufficiently high clock (32 kHz is usually too slow)
+					/*
+					 * if memory writes are made when the clock is running slow
+					 * (i.e. 32 kHz) which is necessary in some scripts to reconfigure
+					 * processor operations after a "reset halt" or "reset init",
+					 * need to immediately stroke the keep alive or will end up with
+					 * gdb "keep alive not sent error message" problem.
 					 */
-					if (arm7_9->fast_memory_access) {
-						retval = arm7_9_execute_fast_sys_speed(target);
-					} else {
-						retval = arm7_9_execute_sys_speed(target);
-
-						/*
-						 * if memory writes are made when the clock is running slow
-						 * (i.e. 32 kHz) which is necessary in some scripts to reconfigure
-						 * processor operations after a "reset halt" or "reset init",
-						 * need to immediately stroke the keep alive or will end up with
-						 * gdb "keep alive not sent error message" problem.
-						 */
-
-						keep_alive();
-					}
-
-					if (retval != ERROR_OK)
-						return retval;
-				}
 
-				num_accesses += thisrun_accesses;
-			}
-			break;
-		case 1:
-			while (num_accesses < count) {
-				uint32_t reg_list;
-				thisrun_accesses =
-						((count - num_accesses) >= 14) ? 14 : (count - num_accesses);
-				reg_list = (0xffff >> (15 - thisrun_accesses)) & 0xfffe;
-
-				for (i = 1; i <= thisrun_accesses; i++) {
-					if (i > last_reg)
-						last_reg = i;
-					reg[i] = *buffer++ & 0xff;
+					keep_alive();
 				}
 
-				arm7_9->write_core_regs(target, reg_list, reg);
-
-				for (i = 1; i <= thisrun_accesses; i++) {
-					arm7_9->store_byte_reg(target, i);
-					/* fast memory writes are only safe when the target is running
-					 * from a sufficiently high clock (32 kHz is usually too slow)
-					 */
-					if (arm7_9->fast_memory_access) {
-						retval = arm7_9_execute_fast_sys_speed(target);
-					} else {
-						retval = arm7_9_execute_sys_speed(target);
-
-						/*
-						 * if memory writes are made when the clock is running slow
-						 * (i.e. 32 kHz) which is necessary in some scripts to reconfigure
-						 * processor operations after a "reset halt" or "reset init",
-						 * need to immediately stroke the keep alive or will end up with
-						 * gdb "keep alive not sent error message" problem.
-						 */
-
-						keep_alive();
-					}
-
-					if (retval != ERROR_OK)
-						return retval;
-
-				}
+				if (retval != ERROR_OK)
+					return retval;
 
-				num_accesses += thisrun_accesses;
 			}
-			break;
+
+			num_accesses += thisrun_accesses;
+		}
+		break;
 	}
 
 	/* Re-Set DBGACK */
diff --git a/src/target/arm7tdmi.c b/src/target/arm7tdmi.c
index 2f59254af..fea6a3ff2 100644
--- a/src/target/arm7tdmi.c
+++ b/src/target/arm7tdmi.c
@@ -327,15 +327,15 @@ static void arm7tdmi_read_core_regs_target_buffer(struct target *target,
 		/* nothing fetched, STM still in EXECUTE (1 + i cycle), read databus */
 		if (mask & (1 << i)) {
 			switch (size) {
-				case 4:
-					arm7tdmi_clock_data_in_endianness(jtag_info, buf_u32++, 4, be);
-					break;
-				case 2:
-					arm7tdmi_clock_data_in_endianness(jtag_info, buf_u16++, 2, be);
-					break;
-				case 1:
-					arm7tdmi_clock_data_in_endianness(jtag_info, buf_u8++, 1, be);
-					break;
+			case 4:
+				arm7tdmi_clock_data_in_endianness(jtag_info, buf_u32++, 4, be);
+				break;
+			case 2:
+				arm7tdmi_clock_data_in_endianness(jtag_info, buf_u16++, 2, be);
+				break;
+			case 1:
+				arm7tdmi_clock_data_in_endianness(jtag_info, buf_u8++, 1, be);
+				break;
 			}
 		}
 	}
diff --git a/src/target/arm926ejs.c b/src/target/arm926ejs.c
index 55ddb6313..0b77981ae 100644
--- a/src/target/arm926ejs.c
+++ b/src/target/arm926ejs.c
@@ -221,88 +221,88 @@ static int arm926ejs_examine_debug_reason(struct target *target)
 	debug_reason = buf_get_u32(dbg_stat->value, 6, 4);
 
 	switch (debug_reason) {
-		case 0:
-			LOG_DEBUG("no *NEW* debug entry (?missed one?)");
-			/* ... since last restart or debug reset ... */
-			target->debug_reason = DBG_REASON_DBGRQ;
-			break;
-		case 1:
-			LOG_DEBUG("breakpoint from EICE unit 0");
-			target->debug_reason = DBG_REASON_BREAKPOINT;
-			break;
-		case 2:
-			LOG_DEBUG("breakpoint from EICE unit 1");
-			target->debug_reason = DBG_REASON_BREAKPOINT;
-			break;
-		case 3:
-			LOG_DEBUG("soft breakpoint (BKPT instruction)");
-			target->debug_reason = DBG_REASON_BREAKPOINT;
-			break;
-		case 4:
-			LOG_DEBUG("vector catch breakpoint");
-			target->debug_reason = DBG_REASON_BREAKPOINT;
-			break;
-		case 5:
-			LOG_DEBUG("external breakpoint");
-			target->debug_reason = DBG_REASON_BREAKPOINT;
-			break;
-		case 6:
-			LOG_DEBUG("watchpoint from EICE unit 0");
-			target->debug_reason = DBG_REASON_WATCHPOINT;
-			break;
-		case 7:
-			LOG_DEBUG("watchpoint from EICE unit 1");
-			target->debug_reason = DBG_REASON_WATCHPOINT;
-			break;
-		case 8:
-			LOG_DEBUG("external watchpoint");
-			target->debug_reason = DBG_REASON_WATCHPOINT;
-			break;
-		case 9:
-			LOG_DEBUG("internal debug request");
-			target->debug_reason = DBG_REASON_DBGRQ;
-			break;
-		case 10:
-			LOG_DEBUG("external debug request");
-			target->debug_reason = DBG_REASON_DBGRQ;
-			break;
-		case 11:
-			LOG_DEBUG("debug re-entry from system speed access");
-			/* This is normal when connecting to something that's
-			 * already halted, or in some related code paths, but
-			 * otherwise is surprising (and presumably wrong).
-			 */
-			switch (target->debug_reason) {
-			case DBG_REASON_DBGRQ:
-				break;
-			default:
-				LOG_ERROR("unexpected -- debug re-entry");
-				/* FALLTHROUGH */
-			case DBG_REASON_UNDEFINED:
-				target->debug_reason = DBG_REASON_DBGRQ;
-				break;
-			}
-			break;
-		case 12:
-			/* FIX!!!! here be dragons!!! We need to fail here so
-			 * the target will interpreted as halted but we won't
-			 * try to talk to it right now... a resume + halt seems
-			 * to sync things up again. Please send an email to
-			 * openocd development mailing list if you have hardware
-			 * to donate to look into this problem....
-			 */
-			LOG_WARNING("WARNING: mystery debug reason MOE = 0xc. Try issuing a resume + halt.");
-			target->debug_reason = DBG_REASON_DBGRQ;
+	case 0:
+		LOG_DEBUG("no *NEW* debug entry (?missed one?)");
+		/* ... since last restart or debug reset ... */
+		target->debug_reason = DBG_REASON_DBGRQ;
+		break;
+	case 1:
+		LOG_DEBUG("breakpoint from EICE unit 0");
+		target->debug_reason = DBG_REASON_BREAKPOINT;
+		break;
+	case 2:
+		LOG_DEBUG("breakpoint from EICE unit 1");
+		target->debug_reason = DBG_REASON_BREAKPOINT;
+		break;
+	case 3:
+		LOG_DEBUG("soft breakpoint (BKPT instruction)");
+		target->debug_reason = DBG_REASON_BREAKPOINT;
+		break;
+	case 4:
+		LOG_DEBUG("vector catch breakpoint");
+		target->debug_reason = DBG_REASON_BREAKPOINT;
+		break;
+	case 5:
+		LOG_DEBUG("external breakpoint");
+		target->debug_reason = DBG_REASON_BREAKPOINT;
+		break;
+	case 6:
+		LOG_DEBUG("watchpoint from EICE unit 0");
+		target->debug_reason = DBG_REASON_WATCHPOINT;
+		break;
+	case 7:
+		LOG_DEBUG("watchpoint from EICE unit 1");
+		target->debug_reason = DBG_REASON_WATCHPOINT;
+		break;
+	case 8:
+		LOG_DEBUG("external watchpoint");
+		target->debug_reason = DBG_REASON_WATCHPOINT;
+		break;
+	case 9:
+		LOG_DEBUG("internal debug request");
+		target->debug_reason = DBG_REASON_DBGRQ;
+		break;
+	case 10:
+		LOG_DEBUG("external debug request");
+		target->debug_reason = DBG_REASON_DBGRQ;
+		break;
+	case 11:
+		LOG_DEBUG("debug re-entry from system speed access");
+		/* This is normal when connecting to something that's
+		 * already halted, or in some related code paths, but
+		 * otherwise is surprising (and presumably wrong).
+		 */
+		switch (target->debug_reason) {
+		case DBG_REASON_DBGRQ:
 			break;
 		default:
-			LOG_WARNING("WARNING: unknown debug reason: 0x%x", debug_reason);
-			/* Oh agony! should we interpret this as a halt request or
-			 * that the target stopped on it's own accord?
-			 */
+			LOG_ERROR("unexpected -- debug re-entry");
+			/* FALLTHROUGH */
+		case DBG_REASON_UNDEFINED:
 			target->debug_reason = DBG_REASON_DBGRQ;
-			/* if we fail here, we won't talk to the target and it will
-			 * be reported to be in the halted state */
 			break;
+		}
+		break;
+	case 12:
+		/* FIX!!!! here be dragons!!! We need to fail here so
+		 * the target will interpreted as halted but we won't
+		 * try to talk to it right now... a resume + halt seems
+		 * to sync things up again. Please send an email to
+		 * openocd development mailing list if you have hardware
+		 * to donate to look into this problem....
+		 */
+		LOG_WARNING("WARNING: mystery debug reason MOE = 0xc. Try issuing a resume + halt.");
+		target->debug_reason = DBG_REASON_DBGRQ;
+		break;
+	default:
+		LOG_WARNING("WARNING: unknown debug reason: 0x%x", debug_reason);
+		/* Oh agony! should we interpret this as a halt request or
+		 * that the target stopped on it's own accord?
+		 */
+		target->debug_reason = DBG_REASON_DBGRQ;
+		/* if we fail here, we won't talk to the target and it will
+		 * be reported to be in the halted state */
+		break;
 	}
 
 	return ERROR_OK;
diff --git a/src/target/arm9tdmi.c b/src/target/arm9tdmi.c
index 8ab12de32..34b4ba2ce 100644
--- a/src/target/arm9tdmi.c
+++ b/src/target/arm9tdmi.c
@@ -398,15 +398,15 @@ static void arm9tdmi_read_core_regs_target_buffer(struct target *target,
 		if (mask & (1 << i))
 			/* nothing fetched, STM in MEMORY (i'th cycle) */
 			switch (size) {
-				case 4:
-					arm9tdmi_clock_data_in_endianness(jtag_info, buf_u32++, 4, be);
-					break;
-				case 2:
-					arm9tdmi_clock_data_in_endianness(jtag_info, buf_u16++, 2, be);
-					break;
-				case 1:
-					arm9tdmi_clock_data_in_endianness(jtag_info, buf_u8++, 1, be);
-					break;
+			case 4:
+				arm9tdmi_clock_data_in_endianness(jtag_info, buf_u32++, 4, be);
+				break;
+			case 2:
+				arm9tdmi_clock_data_in_endianness(jtag_info, buf_u16++, 2, be);
+				break;
+			case 1:
+				arm9tdmi_clock_data_in_endianness(jtag_info, buf_u8++, 1, be);
+				break;
 			}
 	}
 }
diff --git a/src/target/arm_dap.c b/src/target/arm_dap.c
index be5e63c7c..5ba5e1c38 100644
--- a/src/target/arm_dap.c
+++ b/src/target/arm_dap.c
@@ -442,28 +442,28 @@ COMMAND_HANDLER(handle_dap_info_command)
 	}
 
 	switch (CMD_ARGC) {
-		case 0:
-			apsel = dap->apsel;
-			break;
-		case 1:
-			if (!strcmp(CMD_ARGV[0], "root")) {
-				if (!is_adiv6(dap)) {
-					command_print(CMD, "Option \"root\" not allowed with ADIv5 DAP");
-					return ERROR_COMMAND_ARGUMENT_INVALID;
-				}
-				int retval = adiv6_dap_read_baseptr(CMD, dap, &apsel);
-				if (retval != ERROR_OK) {
-					command_print(CMD, "Failed reading DAP baseptr");
-					return retval;
-				}
-				break;
+	case 0:
+		apsel = dap->apsel;
+		break;
+	case 1:
+		if (!strcmp(CMD_ARGV[0], "root")) {
+			if (!is_adiv6(dap)) {
+				command_print(CMD, "Option \"root\" not allowed with ADIv5 DAP");
+				return ERROR_COMMAND_ARGUMENT_INVALID;
+			}
+			int retval = adiv6_dap_read_baseptr(CMD, dap, &apsel);
+			if (retval != ERROR_OK) {
+				command_print(CMD, "Failed reading DAP baseptr");
+				return retval;
 			}
-			COMMAND_PARSE_NUMBER(u64, CMD_ARGV[0], apsel);
-			if (!is_ap_num_valid(dap, apsel))
-				return ERROR_COMMAND_SYNTAX_ERROR;
 			break;
-		default:
+		}
+		COMMAND_PARSE_NUMBER(u64, CMD_ARGV[0], apsel);
+		if (!is_ap_num_valid(dap, apsel))
 			return ERROR_COMMAND_SYNTAX_ERROR;
+		break;
+	default:
+		return ERROR_COMMAND_SYNTAX_ERROR;
 	}
 
 	struct adiv5_ap *ap = dap_get_ap(dap, apsel);
diff --git a/src/target/arm_disassembler.c b/src/target/arm_disassembler.c
index 820b2c02b..6dea19f93 100644
--- a/src/target/arm_disassembler.c
+++ b/src/target/arm_disassembler.c
@@ -248,39 +248,39 @@ static int evaluate_srs(uint32_t opcode,
 	const char *mode = "";
 
 	switch ((opcode >> 23) & 0x3) {
-		case 0:
-			mode = "DA";
-			break;
-		case 1:
-			/* "IA" is default */
-			break;
-		case 2:
-			mode = "DB";
-			break;
-		case 3:
-			mode = "IB";
-			break;
+	case 0:
+		mode = "DA";
+		break;
+	case 1:
+		/* "IA" is default */
+		break;
+	case 2:
+		mode = "DB";
+		break;
+	case 3:
+		mode = "IB";
+		break;
 	}
 
 	switch (opcode & 0x0e500000) {
-		case 0x08400000:
-			snprintf(instruction->text, 128, "0x%8.8" PRIx32
-				"\t0x%8.8" PRIx32
-				"\tSRS%s\tSP%s, #%" PRIu32,
-				address, opcode,
-				mode, wback,
-				opcode & 0x1f);
-			break;
-		case 0x08100000:
-			snprintf(instruction->text, 128, "0x%8.8" PRIx32
-				"\t0x%8.8" PRIx32
-				"\tRFE%s\tr%" PRIu32 "%s",
-				address, opcode,
-				mode,
-				(opcode >> 16) & 0xf, wback);
-			break;
-		default:
-			return evaluate_unknown(opcode, address, instruction);
+	case 0x08400000:
+		snprintf(instruction->text, 128, "0x%8.8" PRIx32
+			"\t0x%8.8" PRIx32
+			"\tSRS%s\tSP%s, #%" PRIu32,
+			address, opcode,
+			mode, wback,
+			opcode & 0x1f);
+		break;
+	case 0x08100000:
+		snprintf(instruction->text, 128, "0x%8.8" PRIx32
+			"\t0x%8.8" PRIx32
+			"\tRFE%s\tr%" PRIu32 "%s",
+			address, opcode,
+			mode,
+			(opcode >> 16) & 0xf, wback);
+		break;
+	default:
+		return evaluate_unknown(opcode, address, instruction);
 	}
 	return ERROR_OK;
 }
@@ -631,21 +631,21 @@ static int evaluate_load_store(uint32_t opcode,
 			snprintf(offset, 32, ", %sr%i", (u) ? "" : "-", rm);
 		else {	/* +-<Rm>, <Shift>, #<shift_imm> */
 			switch (shift) {
-				case 0x0:		/* LSL */
-					snprintf(offset, 32, ", %sr%i, LSL #0x%x", (u) ? "" : "-", rm, shift_imm);
-					break;
-				case 0x1:		/* LSR */
-					snprintf(offset, 32, ", %sr%i, LSR #0x%x", (u) ? "" : "-", rm, shift_imm);
-					break;
-				case 0x2:		/* ASR */
-					snprintf(offset, 32, ", %sr%i, ASR #0x%x", (u) ? "" : "-", rm, shift_imm);
-					break;
-				case 0x3:		/* ROR */
-					snprintf(offset, 32, ", %sr%i, ROR #0x%x", (u) ? "" : "-", rm, shift_imm);
-					break;
-				case 0x4:		/* RRX */
-					snprintf(offset, 32, ", %sr%i, RRX", (u) ? "" : "-", rm);
-					break;
+			case 0x0:		/* LSL */
+				snprintf(offset, 32, ", %sr%i, LSL #0x%x", (u) ? "" : "-", rm, shift_imm);
+				break;
+			case 0x1:		/* LSR */
+				snprintf(offset, 32, ", %sr%i, LSR #0x%x", (u) ? "" : "-", rm, shift_imm);
+				break;
+			case 0x2:		/* ASR */
+				snprintf(offset, 32, ", %sr%i, ASR #0x%x", (u) ? "" : "-", rm, shift_imm);
+				break;
+			case 0x3:		/* ROR */
+				snprintf(offset, 32, ", %sr%i, ROR #0x%x", (u) ? "" : "-", rm, shift_imm);
+				break;
+			case 0x4:		/* RRX */
+				snprintf(offset, 32, ", %sr%i, RRX", (u) ? "" : "-", rm);
+				break;
 			}
 		}
 	}
@@ -707,33 +707,33 @@ static int evaluate_extend(uint32_t opcode, uint32_t address, char *cp)
 	char *type, *rot;
 
 	switch ((opcode >> 24) & 0x3) {
-		case 0:
-			type = "B16";
-			break;
-		case 1:
-			sprintf(cp, "UNDEFINED");
-			return ARM_UNDEFINED_INSTRUCTION;
-		case 2:
-			type = "B";
-			break;
-		default:
-			type = "H";
-			break;
+	case 0:
+		type = "B16";
+		break;
+	case 1:
+		sprintf(cp, "UNDEFINED");
+		return ARM_UNDEFINED_INSTRUCTION;
+	case 2:
+		type = "B";
+		break;
+	default:
+		type = "H";
+		break;
 	}
 
 	switch ((opcode >> 10) & 0x3) {
-		case 0:
-			rot = "";
-			break;
-		case 1:
-			rot = ", ROR #8";
-			break;
-		case 2:
-			rot = ", ROR #16";
-			break;
-		default:
-			rot = ", ROR #24";
-			break;
+	case 0:
+		rot = "";
+		break;
+	case 1:
+		rot = ", ROR #8";
+		break;
+	case 2:
+		rot = ", ROR #16";
+		break;
+	default:
+		rot = ", ROR #24";
+		break;
 	}
 
 	if (rn == 0xf) {
@@ -758,55 +758,55 @@ static int evaluate_p_add_sub(uint32_t opcode, uint32_t address, char *cp)
 	int type;
 
 	switch ((opcode >> 20) & 0x7) {
-		case 1:
-			prefix = "S";
-			break;
-		case 2:
-			prefix = "Q";
-			break;
-		case 3:
-			prefix = "SH";
-			break;
-		case 5:
-			prefix = "U";
-			break;
-		case 6:
-			prefix = "UQ";
-			break;
-		case 7:
-			prefix = "UH";
-			break;
-		default:
-			goto undef;
+	case 1:
+		prefix = "S";
+		break;
+	case 2:
+		prefix = "Q";
+		break;
+	case 3:
+		prefix = "SH";
+		break;
+	case 5:
+		prefix = "U";
+		break;
+	case 6:
+		prefix = "UQ";
+		break;
+	case 7:
+		prefix = "UH";
+		break;
+	default:
+		goto undef;
 	}
 
 	switch ((opcode >> 5) & 0x7) {
-		case 0:
-			op = "ADD16";
-			type = ARM_ADD;
-			break;
-		case 1:
-			op = "ADDSUBX";
-			type = ARM_ADD;
-			break;
-		case 2:
-			op = "SUBADDX";
-			type = ARM_SUB;
-			break;
-		case 3:
-			op = "SUB16";
-			type = ARM_SUB;
-			break;
-		case 4:
-			op = "ADD8";
-			type = ARM_ADD;
-			break;
-		case 7:
-			op = "SUB8";
-			type = ARM_SUB;
-			break;
-		default:
-			goto undef;
+	case 0:
+		op = "ADD16";
+		type = ARM_ADD;
+		break;
+	case 1:
+		op = "ADDSUBX";
+		type = ARM_ADD;
+		break;
+	case 2:
+		op = "SUBADDX";
+		type = ARM_SUB;
+		break;
+	case 3:
+		op = "SUB16";
+		type = ARM_SUB;
+		break;
+	case 4:
+		op = "ADD8";
+		type = ARM_ADD;
+		break;
+	case 7:
+		op = "SUB8";
+		type = ARM_SUB;
+		break;
+	default:
+		goto undef;
 	}
 
 	sprintf(cp, "%s%s%s\tr%d, r%d, r%d", prefix, op, COND(opcode),
@@ -928,14 +928,14 @@ static int evaluate_media(uint32_t opcode, uint32_t address,
 		unsigned int rn = (opcode >> 12) & 0xf;
 
 		switch (opcode & 0xc0) {
-			case 3:
-				if (rn == 0xf)
-					goto undef;
-			/* FALL THROUGH */
-			case 0:
-				break;
-			default:
+		case 3:
+			if (rn == 0xf)
 				goto undef;
+		/* FALL THROUGH */
+		case 0:
+			break;
+		default:
+			goto undef;
 		}
 
 		if (rn != 0xf)
@@ -959,46 +959,46 @@ static int evaluate_media(uint32_t opcode, uint32_t address,
 
 	/* simple matches against the remaining decode bits */
 	switch (opcode & 0x01f000f0) {
-		case 0x00a00030:
-		case 0x00e00030:
-			/* parallel halfword saturate */
-			sprintf(cp, "%cSAT16%s\tr%d, #%d, r%d",
-				(opcode & (1 << 22)) ? 'U' : 'S',
-				COND(opcode),
-				(int) (opcode >> 12) & 0xf,
-				(int) (opcode >> 16) & 0xf,
-				(int) (opcode >> 0) & 0xf);
-			return ERROR_OK;
-		case 0x00b00030:
-			mnemonic = "REV";
-			break;
-		case 0x00b000b0:
-			mnemonic = "REV16";
-			break;
-		case 0x00f000b0:
-			mnemonic = "REVSH";
-			break;
-		case 0x008000b0:
-			/* select bytes */
-			sprintf(cp, "SEL%s\tr%d, r%d, r%d", COND(opcode),
-				(int) (opcode >> 12) & 0xf,
-				(int) (opcode >> 16) & 0xf,
-				(int) (opcode >> 0) & 0xf);
-			return ERROR_OK;
-		case 0x01800010:
-			/* unsigned sum of absolute differences */
-			if (((opcode >> 12) & 0xf) == 0xf)
-				sprintf(cp, "USAD8%s\tr%d, r%d, r%d", COND(opcode),
-						(int) (opcode >> 16) & 0xf,
-						(int) (opcode >> 0) & 0xf,
-						(int) (opcode >> 8) & 0xf);
-			else
-				sprintf(cp, "USADA8%s\tr%d, r%d, r%d, r%d", COND(opcode),
-						(int) (opcode >> 16) & 0xf,
-						(int) (opcode >> 0) & 0xf,
-						(int) (opcode >> 8) & 0xf,
-						(int) (opcode >> 12) & 0xf);
-			return ERROR_OK;
+	case 0x00a00030:
+	case 0x00e00030:
+		/* parallel halfword saturate */
+		sprintf(cp, "%cSAT16%s\tr%d, #%d, r%d",
+			(opcode & (1 << 22)) ? 'U' : 'S',
+			COND(opcode),
+			(int)(opcode >> 12) & 0xf,
+			(int)(opcode >> 16) & 0xf,
+			(int)(opcode >> 0) & 0xf);
+		return ERROR_OK;
+	case 0x00b00030:
+		mnemonic = "REV";
+		break;
+	case 0x00b000b0:
+		mnemonic = "REV16";
+		break;
+	case 0x00f000b0:
+		mnemonic = "REVSH";
+		break;
+	case 0x008000b0:
+		/* select bytes */
+		sprintf(cp, "SEL%s\tr%d, r%d, r%d", COND(opcode),
+			(int)(opcode >> 12) & 0xf,
+			(int)(opcode >> 16) & 0xf,
+			(int)(opcode >> 0) & 0xf);
+		return ERROR_OK;
+	case 0x01800010:
+		/* unsigned sum of absolute differences */
+		if (((opcode >> 12) & 0xf) == 0xf)
+			sprintf(cp, "USAD8%s\tr%d, r%d, r%d", COND(opcode),
+					(int)(opcode >> 16) & 0xf,
+					(int)(opcode >> 0) & 0xf,
+					(int)(opcode >> 8) & 0xf);
+		else
+			sprintf(cp, "USADA8%s\tr%d, r%d, r%d, r%d", COND(opcode),
+					(int)(opcode >> 16) & 0xf,
+					(int)(opcode >> 0) & 0xf,
+					(int)(opcode >> 8) & 0xf,
+					(int)(opcode >> 12) & 0xf);
+		return ERROR_OK;
 	}
 	if (mnemonic) {
 		unsigned int rm = (opcode >> 0) & 0xf;
@@ -1280,22 +1280,22 @@ static int evaluate_mul_and_extra_ld_st(uint32_t opcode,
 			s = (opcode & 0x00100000) >> 20;
 
 			switch ((opcode & 0x00600000) >> 21) {
-				case 0x0:
-					instruction->type = ARM_UMULL;
-					mnemonic = "UMULL";
-					break;
-				case 0x1:
-					instruction->type = ARM_UMLAL;
-					mnemonic = "UMLAL";
-					break;
-				case 0x2:
-					instruction->type = ARM_SMULL;
-					mnemonic = "SMULL";
-					break;
-				case 0x3:
-					instruction->type = ARM_SMLAL;
-					mnemonic = "SMLAL";
-					break;
+			case 0x0:
+				instruction->type = ARM_UMULL;
+				mnemonic = "UMULL";
+				break;
+			case 0x1:
+				instruction->type = ARM_UMLAL;
+				mnemonic = "UMLAL";
+				break;
+			case 0x2:
+				instruction->type = ARM_SMULL;
+				mnemonic = "SMULL";
+				break;
+			case 0x3:
+				instruction->type = ARM_SMLAL;
+				mnemonic = "SMLAL";
+				break;
 			}
 
 			snprintf(instruction->text,
@@ -1480,22 +1480,22 @@ static int evaluate_misc_instr(uint32_t opcode,
 		rn = (opcode & 0xf0000) >> 16;
 
 		switch ((opcode & 0x00600000) >> 21) {
-			case 0x0:
-				instruction->type = ARM_QADD;
-				mnemonic = "QADD";
-				break;
-			case 0x1:
-				instruction->type = ARM_QSUB;
-				mnemonic = "QSUB";
-				break;
-			case 0x2:
-				instruction->type = ARM_QDADD;
-				mnemonic = "QDADD";
-				break;
-			case 0x3:
-				instruction->type = ARM_QDSUB;
-				mnemonic = "QDSUB";
-				break;
+		case 0x0:
+			instruction->type = ARM_QADD;
+			mnemonic = "QADD";
+			break;
+		case 0x1:
+			instruction->type = ARM_QSUB;
+			mnemonic = "QSUB";
+			break;
+		case 0x2:
+			instruction->type = ARM_QDADD;
+			mnemonic = "QDADD";
+			break;
+		case 0x3:
+			instruction->type = ARM_QDSUB;
+			mnemonic = "QDSUB";
+			break;
 		}
 
 		snprintf(instruction->text,
@@ -1527,21 +1527,21 @@ static int evaluate_misc_instr(uint32_t opcode,
 		char *mnemonic = NULL;
 
 		switch ((opcode & 0x600000) >> 21) {
-			case 0x1:
-				instruction->type = ARM_BKPT;
-				mnemonic = "BRKT";
-				immediate = ((opcode & 0x000fff00) >> 4) | (opcode & 0xf);
-				break;
-			case 0x2:
-				instruction->type = ARM_HVC;
-				mnemonic = "HVC";
-				immediate = ((opcode & 0x000fff00) >> 4) | (opcode & 0xf);
-				break;
-			case 0x3:
-				instruction->type = ARM_SMC;
-				mnemonic = "SMC";
-				immediate = (opcode & 0xf);
-				break;
+		case 0x1:
+			instruction->type = ARM_BKPT;
+			mnemonic = "BRKT";
+			immediate = ((opcode & 0x000fff00) >> 4) | (opcode & 0xf);
+			break;
+		case 0x2:
+			instruction->type = ARM_HVC;
+			mnemonic = "HVC";
+			immediate = ((opcode & 0x000fff00) >> 4) | (opcode & 0xf);
+			break;
+		case 0x3:
+			instruction->type = ARM_SMC;
+			mnemonic = "SMC";
+			immediate = (opcode & 0xf);
+			break;
 		}
 
 		snprintf(instruction->text,
@@ -1717,70 +1717,70 @@ static int evaluate_data_proc(uint32_t opcode,
 	instruction->info.data_proc.s = s;
 
 	switch (op) {
-		case 0x0:
-			instruction->type = ARM_AND;
-			mnemonic = "AND";
-			break;
-		case 0x1:
-			instruction->type = ARM_EOR;
-			mnemonic = "EOR";
-			break;
-		case 0x2:
-			instruction->type = ARM_SUB;
-			mnemonic = "SUB";
-			break;
-		case 0x3:
-			instruction->type = ARM_RSB;
-			mnemonic = "RSB";
-			break;
-		case 0x4:
-			instruction->type = ARM_ADD;
-			mnemonic = "ADD";
-			break;
-		case 0x5:
-			instruction->type = ARM_ADC;
-			mnemonic = "ADC";
-			break;
-		case 0x6:
-			instruction->type = ARM_SBC;
-			mnemonic = "SBC";
-			break;
-		case 0x7:
-			instruction->type = ARM_RSC;
-			mnemonic = "RSC";
-			break;
-		case 0x8:
-			instruction->type = ARM_TST;
-			mnemonic = "TST";
-			break;
-		case 0x9:
-			instruction->type = ARM_TEQ;
-			mnemonic = "TEQ";
-			break;
-		case 0xa:
-			instruction->type = ARM_CMP;
-			mnemonic = "CMP";
-			break;
-		case 0xb:
-			instruction->type = ARM_CMN;
-			mnemonic = "CMN";
-			break;
-		case 0xc:
-			instruction->type = ARM_ORR;
-			mnemonic = "ORR";
-			break;
-		case 0xd:
-			instruction->type = ARM_MOV;
-			mnemonic = "MOV";
-			break;
-		case 0xe:
-			instruction->type = ARM_BIC;
-			mnemonic = "BIC";
-			break;
-		case 0xf:
-			instruction->type = ARM_MVN;
-			mnemonic = "MVN";
-			break;
+	case 0x0:
+		instruction->type = ARM_AND;
+		mnemonic = "AND";
+		break;
+	case 0x1:
+		instruction->type = ARM_EOR;
+		mnemonic = "EOR";
+		break;
+	case 0x2:
+		instruction->type = ARM_SUB;
+		mnemonic = "SUB";
+		break;
+	case 0x3:
+		instruction->type = ARM_RSB;
+		mnemonic = "RSB";
+		break;
+	case 0x4:
+		instruction->type = ARM_ADD;
+		mnemonic = "ADD";
+		break;
+	case 0x5:
+		instruction->type = ARM_ADC;
+		mnemonic = "ADC";
+		break;
+	case 0x6:
+		instruction->type = ARM_SBC;
+		mnemonic = "SBC";
+		break;
+	case 0x7:
+		instruction->type = ARM_RSC;
+		mnemonic = "RSC";
+		break;
+	case 0x8:
+		instruction->type = ARM_TST;
+		mnemonic = "TST";
+		break;
+	case 0x9:
+		instruction->type = ARM_TEQ;
+		mnemonic = "TEQ";
+		break;
+	case 0xa:
+		instruction->type = ARM_CMP;
+		mnemonic = "CMP";
+		break;
+	case 0xb:
+		instruction->type = ARM_CMN;
+		mnemonic = "CMN";
+		break;
+	case 0xc:
+		instruction->type = ARM_ORR;
+		mnemonic = "ORR";
+		break;
+	case 0xd:
+		instruction->type = ARM_MOV;
+		mnemonic = "MOV";
+		break;
+	case 0xe:
+		instruction->type = ARM_BIC;
+		mnemonic = "BIC";
+		break;
+	case 0xf:
+		instruction->type = ARM_MVN;
+		mnemonic = "MVN";
+		break;
 	}
 
 	if (i) {/* immediate shifter operand (#<immediate>)*/
@@ -2065,28 +2065,28 @@ static int evaluate_b_bl_blx_thumb(uint16_t opcode,
 	target_address = address + 4 + (offset << 1);
 
 	switch (opc) {
-		/* unconditional branch */
-		case 0:
-			instruction->type = ARM_B;
-			mnemonic = "B";
-			break;
-		/* BLX suffix */
-		case 1:
-			instruction->type = ARM_BLX;
-			mnemonic = "BLX";
-			target_address &= 0xfffffffc;
-			break;
-		/* BL/BLX prefix */
-		case 2:
-			instruction->type = ARM_UNKNOWN_INSTRUCTION;
-			mnemonic = "prefix";
-			target_address = offset << 12;
-			break;
-		/* BL suffix */
-		case 3:
-			instruction->type = ARM_BL;
-			mnemonic = "BL";
-			break;
+	/* unconditional branch */
+	case 0:
+		instruction->type = ARM_B;
+		mnemonic = "B";
+		break;
+	/* BLX suffix */
+	case 1:
+		instruction->type = ARM_BLX;
+		mnemonic = "BLX";
+		target_address &= 0xfffffffc;
+		break;
+	/* BL/BLX prefix */
+	case 2:
+		instruction->type = ARM_UNKNOWN_INSTRUCTION;
+		mnemonic = "prefix";
+		target_address = offset << 12;
+		break;
+	/* BL suffix */
+	case 3:
+		instruction->type = ARM_BL;
+		mnemonic = "BL";
+		break;
 	}
 
 	/* TODO: deal correctly with dual opcode (prefixed) BL/BLX;
@@ -2158,21 +2158,21 @@ static int evaluate_shift_imm_thumb(uint16_t opcode,
 	char *mnemonic = NULL;
 
 	switch (opc) {
-		case 0:
-			instruction->type = ARM_MOV;
-			mnemonic = "LSLS";
-			instruction->info.data_proc.shifter_operand.immediate_shift.shift = 0;
-			break;
-		case 1:
-			instruction->type = ARM_MOV;
-			mnemonic = "LSRS";
-			instruction->info.data_proc.shifter_operand.immediate_shift.shift = 1;
-			break;
-		case 2:
-			instruction->type = ARM_MOV;
-			mnemonic = "ASRS";
-			instruction->info.data_proc.shifter_operand.immediate_shift.shift = 2;
-			break;
+	case 0:
+		instruction->type = ARM_MOV;
+		mnemonic = "LSLS";
+		instruction->info.data_proc.shifter_operand.immediate_shift.shift = 0;
+		break;
+	case 1:
+		instruction->type = ARM_MOV;
+		mnemonic = "LSRS";
+		instruction->info.data_proc.shifter_operand.immediate_shift.shift = 1;
+		break;
+	case 2:
+		instruction->type = ARM_MOV;
+		mnemonic = "ASRS";
+		instruction->info.data_proc.shifter_operand.immediate_shift.shift = 2;
+		break;
 	}
 
 	if ((imm == 0) && (opc != 0))
@@ -2208,24 +2208,24 @@ static int evaluate_data_proc_imm_thumb(uint16_t opcode,
 	instruction->info.data_proc.shifter_operand.immediate.immediate = imm;
 
 	switch (opc) {
-		case 0:
-			instruction->type = ARM_MOV;
-			mnemonic = "MOVS";
-			instruction->info.data_proc.rn = -1;
-			break;
-		case 1:
-			instruction->type = ARM_CMP;
-			mnemonic = "CMP";
-			instruction->info.data_proc.rd = -1;
-			break;
-		case 2:
-			instruction->type = ARM_ADD;
-			mnemonic = "ADDS";
-			break;
-		case 3:
-			instruction->type = ARM_SUB;
-			mnemonic = "SUBS";
-			break;
+	case 0:
+		instruction->type = ARM_MOV;
+		mnemonic = "MOVS";
+		instruction->info.data_proc.rn = -1;
+		break;
+	case 1:
+		instruction->type = ARM_CMP;
+		mnemonic = "CMP";
+		instruction->info.data_proc.rd = -1;
+		break;
+	case 2:
+		instruction->type = ARM_ADD;
+		mnemonic = "ADDS";
+		break;
+	case 3:
+		instruction->type = ARM_SUB;
+		mnemonic = "SUBS";
+		break;
 	}
 
 	snprintf(instruction->text, 128,
@@ -2262,131 +2262,131 @@ static int evaluate_data_proc_thumb(uint16_t opcode,
 		op >>= 2;
 
 		switch (op) {
-			case 0x0:
-				instruction->type = ARM_ADD;
-				mnemonic = "ADD";
-				break;
-			case 0x1:
-				instruction->type = ARM_CMP;
-				mnemonic = "CMP";
-				break;
-			case 0x2:
-				instruction->type = ARM_MOV;
-				mnemonic = "MOV";
-				if (rd == rm)
-					nop = true;
-				break;
-			case 0x3:
-				if ((opcode & 0x7) == 0x0) {
-					instruction->info.b_bl_bx_blx.reg_operand = rm;
-					if (h1) {
-						instruction->type = ARM_BLX;
-						snprintf(instruction->text, 128,
-								"0x%8.8" PRIx32
-								"  0x%4.4x    \tBLX\tr%i",
-								address, opcode, rm);
-					} else {
-						instruction->type = ARM_BX;
-						snprintf(instruction->text, 128,
-								"0x%8.8" PRIx32
-								"  0x%4.4x    \tBX\tr%i",
-								address, opcode, rm);
-					}
+		case 0x0:
+			instruction->type = ARM_ADD;
+			mnemonic = "ADD";
+			break;
+		case 0x1:
+			instruction->type = ARM_CMP;
+			mnemonic = "CMP";
+			break;
+		case 0x2:
+			instruction->type = ARM_MOV;
+			mnemonic = "MOV";
+			if (rd == rm)
+				nop = true;
+			break;
+		case 0x3:
+			if ((opcode & 0x7) == 0x0) {
+				instruction->info.b_bl_bx_blx.reg_operand = rm;
+				if (h1) {
+					instruction->type = ARM_BLX;
+					snprintf(instruction->text, 128,
+							"0x%8.8" PRIx32
+							"  0x%4.4x    \tBLX\tr%i",
+							address, opcode, rm);
 				} else {
-					instruction->type = ARM_UNDEFINED_INSTRUCTION;
+					instruction->type = ARM_BX;
 					snprintf(instruction->text, 128,
 							"0x%8.8" PRIx32
-							"  0x%4.4x    \t"
-							"UNDEFINED INSTRUCTION",
-							address, opcode);
+							"  0x%4.4x    \tBX\tr%i",
+							address, opcode, rm);
 				}
-				return ERROR_OK;
+			} else {
+				instruction->type = ARM_UNDEFINED_INSTRUCTION;
+				snprintf(instruction->text, 128,
+						"0x%8.8" PRIx32
+						"  0x%4.4x    \t"
+						"UNDEFINED INSTRUCTION",
+						address, opcode);
+			}
+			return ERROR_OK;
 		}
 	} else {
 		switch (op) {
-			case 0x0:
-				instruction->type = ARM_AND;
-				mnemonic = "ANDS";
-				break;
-			case 0x1:
-				instruction->type = ARM_EOR;
-				mnemonic = "EORS";
-				break;
-			case 0x2:
-				instruction->type = ARM_MOV;
-				mnemonic = "LSLS";
-				instruction->info.data_proc.variant = 2	/*register shift*/;
-				instruction->info.data_proc.shifter_operand.register_shift.shift = 0;
-				instruction->info.data_proc.shifter_operand.register_shift.rm = rd;
-				instruction->info.data_proc.shifter_operand.register_shift.rs = rm;
-				break;
-			case 0x3:
-				instruction->type = ARM_MOV;
-				mnemonic = "LSRS";
-				instruction->info.data_proc.variant = 2	/*register shift*/;
-				instruction->info.data_proc.shifter_operand.register_shift.shift = 1;
-				instruction->info.data_proc.shifter_operand.register_shift.rm = rd;
-				instruction->info.data_proc.shifter_operand.register_shift.rs = rm;
-				break;
-			case 0x4:
-				instruction->type = ARM_MOV;
-				mnemonic = "ASRS";
-				instruction->info.data_proc.variant = 2	/*register shift*/;
-				instruction->info.data_proc.shifter_operand.register_shift.shift = 2;
-				instruction->info.data_proc.shifter_operand.register_shift.rm = rd;
-				instruction->info.data_proc.shifter_operand.register_shift.rs = rm;
-				break;
-			case 0x5:
-				instruction->type = ARM_ADC;
-				mnemonic = "ADCS";
-				break;
-			case 0x6:
-				instruction->type = ARM_SBC;
-				mnemonic = "SBCS";
-				break;
-			case 0x7:
-				instruction->type = ARM_MOV;
-				mnemonic = "RORS";
-				instruction->info.data_proc.variant = 2	/*register shift*/;
-				instruction->info.data_proc.shifter_operand.register_shift.shift = 3;
-				instruction->info.data_proc.shifter_operand.register_shift.rm = rd;
-				instruction->info.data_proc.shifter_operand.register_shift.rs = rm;
-				break;
-			case 0x8:
-				instruction->type = ARM_TST;
-				mnemonic = "TST";
-				break;
-			case 0x9:
-				instruction->type = ARM_RSB;
-				mnemonic = "RSBS";
-				instruction->info.data_proc.variant = 0	/*immediate*/;
-				instruction->info.data_proc.shifter_operand.immediate.immediate = 0;
-				instruction->info.data_proc.rn = rm;
-				break;
-			case 0xA:
-				instruction->type = ARM_CMP;
-				mnemonic = "CMP";
-				break;
-			case 0xB:
-				instruction->type = ARM_CMN;
-				mnemonic = "CMN";
-				break;
-			case 0xC:
-				instruction->type = ARM_ORR;
-				mnemonic = "ORRS";
-				break;
-			case 0xD:
-				instruction->type = ARM_MUL;
-				mnemonic = "MULS";
-				break;
-			case 0xE:
-				instruction->type = ARM_BIC;
-				mnemonic = "BICS";
-				break;
-			case 0xF:
-				instruction->type = ARM_MVN;
-				mnemonic = "MVNS";
-				break;
+		case 0x0:
+			instruction->type = ARM_AND;
+			mnemonic = "ANDS";
+			break;
+		case 0x1:
+			instruction->type = ARM_EOR;
+			mnemonic = "EORS";
+			break;
+		case 0x2:
+			instruction->type = ARM_MOV;
+			mnemonic = "LSLS";
+			instruction->info.data_proc.variant = 2	/*register shift*/;
+			instruction->info.data_proc.shifter_operand.register_shift.shift = 0;
+			instruction->info.data_proc.shifter_operand.register_shift.rm = rd;
+			instruction->info.data_proc.shifter_operand.register_shift.rs = rm;
+			break;
+		case 0x3:
+			instruction->type = ARM_MOV;
+			mnemonic = "LSRS";
+			instruction->info.data_proc.variant = 2	/*register shift*/;
+			instruction->info.data_proc.shifter_operand.register_shift.shift = 1;
+			instruction->info.data_proc.shifter_operand.register_shift.rm = rd;
+			instruction->info.data_proc.shifter_operand.register_shift.rs = rm;
+			break;
+		case 0x4:
+			instruction->type = ARM_MOV;
+			mnemonic = "ASRS";
+			instruction->info.data_proc.variant = 2	/*register shift*/;
+			instruction->info.data_proc.shifter_operand.register_shift.shift = 2;
+			instruction->info.data_proc.shifter_operand.register_shift.rm = rd;
+			instruction->info.data_proc.shifter_operand.register_shift.rs = rm;
+			break;
+		case 0x5:
+			instruction->type = ARM_ADC;
+			mnemonic = "ADCS";
+			break;
+		c...
 
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