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|
From: openocd-gerrit <ope...@us...> - 2024-02-15 09:01:23
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".
The branch, master has been updated
via 7145b984a9852a0494e2e63df2f61aa36f877377 (commit)
from efdd5e09b1108e3bd35898a684817c01dc95cd93 (commit)
Those revisions listed above that are new to this repository have
not appeared on any other notification email; so we list those
revisions in full, below.
- Log -----------------------------------------------------------------
commit 7145b984a9852a0494e2e63df2f61aa36f877377
Author: Sevan Janiyan <ven...@ge...>
Date: Sun Jan 28 20:34:41 2024 +0000
portability fix: Switch binary literals to hex
Allows build with legacy toolchains which do not support
C23 nor GCC extension for binary literals.
Change-Id: I742d3a8a86bf16f81421d11c59d3cb155ee17aed
Signed-off-by: Sevan Janiyan <ven...@ge...>
Reviewed-on: https://review.openocd.org/c/openocd/+/8123
Tested-by: jenkins
Reviewed-by: Jörg Wunsch <op...@ur...>
Reviewed-by: Tomas Vanek <va...@fb...>
diff --git a/src/flash/nor/xcf.c b/src/flash/nor/xcf.c
index c253b2264..1d67b0943 100644
--- a/src/flash/nor/xcf.c
+++ b/src/flash/nor/xcf.c
@@ -130,8 +130,8 @@ static struct xcf_status read_status(struct flash_bank *bank)
jtag_add_ir_scan(bank->target->tap, &scan, TAP_IDLE);
jtag_execute_queue();
- ret.isc_error = ((irdata[0] >> 7) & 3) == 0b01;
- ret.prog_error = ((irdata[0] >> 5) & 3) == 0b01;
+ ret.isc_error = ((irdata[0] >> 7) & 3) == 1;
+ ret.prog_error = ((irdata[0] >> 5) & 3) == 1;
ret.prog_busy = ((irdata[0] >> 4) & 1) == 0;
ret.isc_mode = ((irdata[0] >> 3) & 1) == 1;
@@ -528,7 +528,7 @@ static int isc_program_single_revision_btc(struct flash_bank *bank)
{
uint8_t buf[4];
uint32_t btc = 0xFFFFFFFF;
- btc &= ~0b1111;
+ btc &= ~0xF;
btc |= ((bank->num_sectors - 1) << 2);
btc &= ~(1 << 4);
h_u32_to_le(buf, btc);
diff --git a/src/target/armv8_dpm.c b/src/target/armv8_dpm.c
index 552bcfa02..8bb24f225 100644
--- a/src/target/armv8_dpm.c
+++ b/src/target/armv8_dpm.c
@@ -46,7 +46,7 @@ enum arm_state armv8_dpm_get_core_state(struct arm_dpm *dpm)
dpm->last_el = el;
/* In Debug state, each bit gives the current Execution state of each EL */
- if ((rw >> el) & 0b1)
+ if ((rw >> el) & 1)
return ARM_STATE_AARCH64;
return ARM_STATE_ARM;
diff --git a/src/target/armv8_opcodes.h b/src/target/armv8_opcodes.h
index ddb0f9b07..9200dac72 100644
--- a/src/target/armv8_opcodes.h
+++ b/src/target/armv8_opcodes.h
@@ -26,80 +26,80 @@
#define SYSTEM_AAR64_MODE_EL3T 0xC
#define SYSTEM_AAR64_MODE_EL3H 0xd
-#define SYSTEM_DAIF 0b1101101000010001
+#define SYSTEM_DAIF 0xDA11
#define SYSTEM_DAIF_MASK 0x3C0
#define SYSTEM_DAIF_SHIFT 6
-#define SYSTEM_ELR_EL1 0b1100001000000001
-#define SYSTEM_ELR_EL2 0b1110001000000001
-#define SYSTEM_ELR_EL3 0b1111001000000001
-
-#define SYSTEM_SCTLR_EL1 0b1100000010000000
-#define SYSTEM_SCTLR_EL2 0b1110000010000000
-#define SYSTEM_SCTLR_EL3 0b1111000010000000
-
-#define SYSTEM_FPCR 0b1101101000100000
-#define SYSTEM_FPSR 0b1101101000100001
-#define SYSTEM_DAIF 0b1101101000010001
-#define SYSTEM_NZCV 0b1101101000010000
-#define SYSTEM_SP_EL0 0b1100001000001000
-#define SYSTEM_SP_EL1 0b1110001000001000
-#define SYSTEM_SP_EL2 0b1111001000001000
-#define SYSTEM_SP_SEL 0b1100001000010000
-#define SYSTEM_SPSR_ABT 0b1110001000011001
-#define SYSTEM_SPSR_FIQ 0b1110001000011011
-#define SYSTEM_SPSR_IRQ 0b1110001000011000
-#define SYSTEM_SPSR_UND 0b1110001000011010
-
-#define SYSTEM_SPSR_EL1 0b1100001000000000
-#define SYSTEM_SPSR_EL2 0b1110001000000000
-#define SYSTEM_SPSR_EL3 0b1111001000000000
-
-#define SYSTEM_ISR_EL1 0b1100011000001000
-
-#define SYSTEM_DBG_DSPSR_EL0 0b1101101000101000
-#define SYSTEM_DBG_DLR_EL0 0b1101101000101001
-#define SYSTEM_DBG_DTRRX_EL0 0b1001100000101000
-#define SYSTEM_DBG_DTRTX_EL0 0b1001100000101000
-#define SYSTEM_DBG_DBGDTR_EL0 0b1001100000100000
-
-#define SYSTEM_CCSIDR 0b1100100000000000
-#define SYSTEM_CLIDR 0b1100100000000001
-#define SYSTEM_CSSELR 0b1101000000000000
-#define SYSTEM_CTYPE 0b1101100000000001
-#define SYSTEM_CTR 0b1101100000000001
-
-#define SYSTEM_DCCISW 0b0100001111110010
-#define SYSTEM_DCCSW 0b0100001111010010
-#define SYSTEM_ICIVAU 0b0101101110101001
-#define SYSTEM_DCCVAU 0b0101101111011001
-#define SYSTEM_DCCIVAC 0b0101101111110001
-
-#define SYSTEM_MPIDR 0b1100000000000101
-
-#define SYSTEM_TCR_EL1 0b1100000100000010
-#define SYSTEM_TCR_EL2 0b1110000100000010
-#define SYSTEM_TCR_EL3 0b1111000100000010
-
-#define SYSTEM_TTBR0_EL1 0b1100000100000000
-#define SYSTEM_TTBR0_EL2 0b1110000100000000
-#define SYSTEM_TTBR0_EL3 0b1111000100000000
-#define SYSTEM_TTBR1_EL1 0b1100000100000001
+#define SYSTEM_ELR_EL1 0xC201
+#define SYSTEM_ELR_EL2 0xE201
+#define SYSTEM_ELR_EL3 0xF201
+
+#define SYSTEM_SCTLR_EL1 0xC080
+#define SYSTEM_SCTLR_EL2 0xE080
+#define SYSTEM_SCTLR_EL3 0xF080
+
+#define SYSTEM_FPCR 0xDA20
+#define SYSTEM_FPSR 0xDA21
+#define SYSTEM_DAIF 0xDA11
+#define SYSTEM_NZCV 0xDA10
+#define SYSTEM_SP_EL0 0xC208
+#define SYSTEM_SP_EL1 0xE208
+#define SYSTEM_SP_EL2 0xF208
+#define SYSTEM_SP_SEL 0xC210
+#define SYSTEM_SPSR_ABT 0xE219
+#define SYSTEM_SPSR_FIQ 0xE21B
+#define SYSTEM_SPSR_IRQ 0xE218
+#define SYSTEM_SPSR_UND 0xE21A
+
+#define SYSTEM_SPSR_EL1 0xC200
+#define SYSTEM_SPSR_EL2 0xE200
+#define SYSTEM_SPSR_EL3 0xF200
+
+#define SYSTEM_ISR_EL1 0xC608
+
+#define SYSTEM_DBG_DSPSR_EL0 0xDA28
+#define SYSTEM_DBG_DLR_EL0 0xDA29
+#define SYSTEM_DBG_DTRRX_EL0 0x9828
+#define SYSTEM_DBG_DTRTX_EL0 0x9828
+#define SYSTEM_DBG_DBGDTR_EL0 0x9820
+
+#define SYSTEM_CCSIDR 0xC800
+#define SYSTEM_CLIDR 0xC801
+#define SYSTEM_CSSELR 0xD000
+#define SYSTEM_CTYPE 0xD801
+#define SYSTEM_CTR 0xD801
+
+#define SYSTEM_DCCISW 0x43F2
+#define SYSTEM_DCCSW 0x43D2
+#define SYSTEM_ICIVAU 0x5BA9
+#define SYSTEM_DCCVAU 0x5BD9
+#define SYSTEM_DCCIVAC 0x5BF1
+
+#define SYSTEM_MPIDR 0xC005
+
+#define SYSTEM_TCR_EL1 0xC102
+#define SYSTEM_TCR_EL2 0xE102
+#define SYSTEM_TCR_EL3 0xF102
+
+#define SYSTEM_TTBR0_EL1 0xC100
+#define SYSTEM_TTBR0_EL2 0xE100
+#define SYSTEM_TTBR0_EL3 0xF100
+#define SYSTEM_TTBR1_EL1 0xC101
/* ARMv8 address translation */
-#define SYSTEM_PAR_EL1 0b1100001110100000
-#define SYSTEM_ATS12E0R 0b0110001111000110
-#define SYSTEM_ATS12E1R 0b0110001111000100
-#define SYSTEM_ATS1E2R 0b0110001111000000
-#define SYSTEM_ATS1E3R 0b0111001111000000
+#define SYSTEM_PAR_EL1 0xC3A0
+#define SYSTEM_ATS12E0R 0x63C6
+#define SYSTEM_ATS12E1R 0x63C4
+#define SYSTEM_ATS1E2R 0x63C0
+#define SYSTEM_ATS1E3R 0x73C0
/* fault status and fault address */
-#define SYSTEM_FAR_EL1 0b1100001100000000
-#define SYSTEM_FAR_EL2 0b1110001100000000
-#define SYSTEM_FAR_EL3 0b1111001100000000
-#define SYSTEM_ESR_EL1 0b1100001010010000
-#define SYSTEM_ESR_EL2 0b1110001010010000
-#define SYSTEM_ESR_EL3 0b1111001010010000
+#define SYSTEM_FAR_EL1 0xC300
+#define SYSTEM_FAR_EL2 0xE300
+#define SYSTEM_FAR_EL3 0xF300
+#define SYSTEM_ESR_EL1 0xC290
+#define SYSTEM_ESR_EL2 0xE290
+#define SYSTEM_ESR_EL3 0xF290
#define ARMV8_MRS_DSPSR(rt) (0xd53b4500 | (rt))
#define ARMV8_MSR_DSPSR(rt) (0xd51b4500 | (rt))
-----------------------------------------------------------------------
Summary of changes:
src/flash/nor/xcf.c | 6 +-
src/target/armv8_dpm.c | 2 +-
src/target/armv8_opcodes.h | 134 ++++++++++++++++++++++-----------------------
3 files changed, 71 insertions(+), 71 deletions(-)
hooks/post-receive
--
Main OpenOCD repository
|
|
From: openocd-gerrit <ope...@us...> - 2024-02-11 23:14:07
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".
The branch, master has been updated
via efdd5e09b1108e3bd35898a684817c01dc95cd93 (commit)
from 847f1209d644fb1db45f7a385d9592eba76ab688 (commit)
Those revisions listed above that are new to this repository have
not appeared on any other notification email; so we list those
revisions in full, below.
- Log -----------------------------------------------------------------
commit efdd5e09b1108e3bd35898a684817c01dc95cd93
Author: Antonio Borneo <ant...@st...>
Date: Tue Feb 6 22:20:06 2024 +0100
jep106: update to revision JEP106BI January 2024
The original documents from Jedec since JEP106BG, do not report
the entry for "21 NXP (Philips)", replaced by "c".
It's clearly a typo.
Keep the line from JEP106BF.01 for "NXP (Philips)".
Change-Id: I293173c4527c2eabebdc33a94cd23d3a557a4618
Signed-off-by: Antonio Borneo <ant...@st...>
Reviewed-on: https://review.openocd.org/c/openocd/+/8132
Tested-by: jenkins
Reviewed-by: Antonio Borneo <bor...@gm...>
diff --git a/src/helper/jep106.inc b/src/helper/jep106.inc
index bcf354c91..958dc4ea4 100644
--- a/src/helper/jep106.inc
+++ b/src/helper/jep106.inc
@@ -2,13 +2,13 @@
/*
* The manufacturer's standard identification code list appears in JEP106.
- * Copyright (c) 2023 JEDEC. All rights reserved.
+ * Copyright (c) 2024 JEDEC. All rights reserved.
*
* JEP106 is regularly updated. For the current manufacturer's standard
* identification code list, please visit the JEDEC website at www.jedec.org .
*/
-/* This file is aligned to revision JEP106BH September 2023. */
+/* This file is aligned to revision JEP106BI January 2024. */
/* "NXP (Philips)" is reported below, while missing since JEP106BG */
@@ -1621,7 +1621,7 @@
[12][0x5f - 1] = "Sitrus Technology",
[12][0x60 - 1] = "AnHui Conner Storage Co Ltd",
[12][0x61 - 1] = "Rochester Electronics",
-[12][0x62 - 1] = "Wuxi Petabyte Technologies Co Ltd",
+[12][0x62 - 1] = "Wuxi Smart Memories Technologies Co",
[12][0x63 - 1] = "Star Memory",
[12][0x64 - 1] = "Agile Memory Technology Co Ltd",
[12][0x65 - 1] = "MEJEC",
@@ -1864,7 +1864,7 @@
[14][0x56 - 1] = "Exacta Technologies Ltd",
[14][0x57 - 1] = "Synology",
[14][0x58 - 1] = "Trium Elektronik Bilgi Islem San Ve Dis",
-[14][0x59 - 1] = "Shenzhen Hippstor Technology Co Ltd",
+[14][0x59 - 1] = "Wuxi HippStor Technology Co Ltd",
[14][0x5a - 1] = "SSCT",
[14][0x5b - 1] = "Sichuan Heentai Semiconductor Co Ltd",
[14][0x5c - 1] = "Zhejiang University",
@@ -1888,4 +1888,54 @@
[14][0x6e - 1] = "Chemgdu EG Technology Co Ltd",
[14][0x6f - 1] = "AGI Technology",
[14][0x70 - 1] = "Syntiant",
+[14][0x71 - 1] = "AOC",
+[14][0x72 - 1] = "GamePP",
+[14][0x73 - 1] = "Yibai Electronic Technologies",
+[14][0x74 - 1] = "Hangzhou Rencheng Trading Co Ltd",
+[14][0x75 - 1] = "HOGE Technology Co Ltd",
+[14][0x76 - 1] = "United Micro Technology (Shenzhen) Co",
+[14][0x77 - 1] = "Fabric of Truth Inc",
+[14][0x78 - 1] = "Epitech",
+[14][0x79 - 1] = "Elitestek",
+[14][0x7a - 1] = "Cornelis Networks Inc",
+[14][0x7b - 1] = "WingSemi Technologies Co Ltd",
+[14][0x7c - 1] = "ForwardEdge ASIC",
+[14][0x7d - 1] = "Beijing Future Imprint Technology Co Ltd",
+[14][0x7e - 1] = "Fine Made Microelectronics Group Co Ltd",
+[15][0x01 - 1] = "Changxin Memory Technology (Shanghai)",
+[15][0x02 - 1] = "Synconv",
+[15][0x03 - 1] = "MULTIUNIT",
+[15][0x04 - 1] = "Zero ASIC Corporation",
+[15][0x05 - 1] = "NTT Innovative Devices Corporation",
+[15][0x06 - 1] = "Xbstor",
+[15][0x07 - 1] = "Shenzhen South Electron Co Ltd",
+[15][0x08 - 1] = "Iontra Inc",
+[15][0x09 - 1] = "SIEFFI Inc",
+[15][0x0a - 1] = "HK Winston Electronics Co Limited",
+[15][0x0b - 1] = "Anhui SunChip Semiconductor Technology",
+[15][0x0c - 1] = "HaiLa Technologies Inc",
+[15][0x0d - 1] = "AUTOTALKS",
+[15][0x0e - 1] = "Shenzhen Ranshuo Technology Co Limited",
+[15][0x0f - 1] = "ScaleFlux",
+[15][0x10 - 1] = "XC Memory",
+[15][0x11 - 1] = "Guangzhou Beimu Technology Co., Ltd",
+[15][0x12 - 1] = "Rays Semiconductor Nanjing Co Ltd",
+[15][0x13 - 1] = "Milli-Centi Intelligence Technology Jiangsu",
+[15][0x14 - 1] = "Zilia Technologioes",
+[15][0x15 - 1] = "Incore Semiconductors",
+[15][0x16 - 1] = "Kinetic Technologies",
+[15][0x17 - 1] = "Nanjing Houmo Technology Co Ltd",
+[15][0x18 - 1] = "Suzhou Yige Technology Co Ltd",
+[15][0x19 - 1] = "Shenzhen Techwinsemi Technology Co Ltd",
+[15][0x1a - 1] = "Pure Array Technology (Shanghai) Co. Ltd",
+[15][0x1b - 1] = "Shenzhen Techwinsemi Technology Udstore",
+[15][0x1c - 1] = "RISE MODE",
+[15][0x1d - 1] = "NEWREESTAR",
+[15][0x1e - 1] = "Hangzhou Hualan Microeletronique Co Ltd",
+[15][0x1f - 1] = "Senscomm Semiconductor Co Ltd",
+[15][0x20 - 1] = "Holt Integrated Circuits",
+[15][0x21 - 1] = "Tenstorrent Inc",
+[15][0x22 - 1] = "SkyeChip",
+[15][0x23 - 1] = "Guangzhou Kaishile Trading Co Ltd",
+[15][0x24 - 1] = "Jing Pai Digital Technology (Shenzhen) Co",
/* EOF */
-----------------------------------------------------------------------
Summary of changes:
src/helper/jep106.inc | 58 +++++++++++++++++++++++++++++++++++++++++++++++----
1 file changed, 54 insertions(+), 4 deletions(-)
hooks/post-receive
--
Main OpenOCD repository
|
|
From: openocd-gerrit <ope...@us...> - 2024-02-11 23:12:40
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".
The branch, master has been updated
via 847f1209d644fb1db45f7a385d9592eba76ab688 (commit)
from c6e7e48b053c281ef4a9dd50f2d94fa12184a956 (commit)
Those revisions listed above that are new to this repository have
not appeared on any other notification email; so we list those
revisions in full, below.
- Log -----------------------------------------------------------------
commit 847f1209d644fb1db45f7a385d9592eba76ab688
Author: Evan Hunter <eh...@br...>
Date: Wed Oct 31 17:51:45 2012 +1100
jtag interfaces: Reduce usage of global for jtag queue
Makes driver interface slightly more flexible.
Change-Id: I2c7f5cb6d014e94a0e6122cbe2f4002c77fbabb9
Signed-off-by: Evan Hunter <eh...@br...>
Signed-off-by: David Ryskalczyk <dav...@gm...>
Reviewed-on: https://review.openocd.org/c/openocd/+/945
Reviewed-by: Antonio Borneo <bor...@gm...>
Tested-by: jenkins
diff --git a/src/jtag/commands.c b/src/jtag/commands.c
index 43cda8ad4..c36c21923 100644
--- a/src/jtag/commands.c
+++ b/src/jtag/commands.c
@@ -33,7 +33,7 @@ struct cmd_queue_page {
static struct cmd_queue_page *cmd_queue_pages;
static struct cmd_queue_page *cmd_queue_pages_tail;
-struct jtag_command *jtag_command_queue;
+static struct jtag_command *jtag_command_queue;
static struct jtag_command **next_command_pointer = &jtag_command_queue;
void jtag_queue_command(struct jtag_command *cmd)
@@ -147,6 +147,11 @@ void jtag_command_queue_reset(void)
next_command_pointer = &jtag_command_queue;
}
+struct jtag_command *jtag_command_queue_get(void)
+{
+ return jtag_command_queue;
+}
+
/**
* Copy a struct scan_field for insertion into the queue.
*
diff --git a/src/jtag/commands.h b/src/jtag/commands.h
index a8c7ffdc6..a1096daa7 100644
--- a/src/jtag/commands.h
+++ b/src/jtag/commands.h
@@ -149,13 +149,11 @@ struct jtag_command {
struct jtag_command *next;
};
-/** The current queue of jtag_command_s structures. */
-extern struct jtag_command *jtag_command_queue;
-
void *cmd_queue_alloc(size_t size);
void jtag_queue_command(struct jtag_command *cmd);
void jtag_command_queue_reset(void);
+struct jtag_command *jtag_command_queue_get(void);
void jtag_scan_field_clone(struct scan_field *dst, const struct scan_field *src);
enum scan_type jtag_scan_type(const struct scan_command *cmd);
diff --git a/src/jtag/core.c b/src/jtag/core.c
index e2af6c53d..c84d5aa3d 100644
--- a/src/jtag/core.c
+++ b/src/jtag/core.c
@@ -951,9 +951,9 @@ int default_interface_jtag_execute_queue(void)
return ERROR_OK;
}
- int result = adapter_driver->jtag_ops->execute_queue();
+ struct jtag_command *cmd = jtag_command_queue_get();
+ int result = adapter_driver->jtag_ops->execute_queue(cmd);
- struct jtag_command *cmd = jtag_command_queue;
while (debug_level >= LOG_LVL_DEBUG_IO && cmd) {
switch (cmd->type) {
case JTAG_SCAN:
diff --git a/src/jtag/drivers/amt_jtagaccel.c b/src/jtag/drivers/amt_jtagaccel.c
index a4c8f3212..b28ce62ff 100644
--- a/src/jtag/drivers/amt_jtagaccel.c
+++ b/src/jtag/drivers/amt_jtagaccel.c
@@ -317,9 +317,9 @@ static void amt_jtagaccel_scan(bool ir_scan, enum scan_type type, uint8_t *buffe
tap_set_state(tap_get_end_state());
}
-static int amt_jtagaccel_execute_queue(void)
+static int amt_jtagaccel_execute_queue(struct jtag_command *cmd_queue)
{
- struct jtag_command *cmd = jtag_command_queue; /* currently processed command */
+ struct jtag_command *cmd = cmd_queue; /* currently processed command */
int scan_size;
enum scan_type type;
uint8_t *buffer;
diff --git a/src/jtag/drivers/angie.c b/src/jtag/drivers/angie.c
index 62079f015..c024667bd 100644
--- a/src/jtag/drivers/angie.c
+++ b/src/jtag/drivers/angie.c
@@ -233,7 +233,7 @@ static int angie_post_process_scan(struct angie_cmd *angie_cmd);
static int angie_post_process_queue(struct angie *device);
/* adapter driver functions */
-static int angie_execute_queue(void);
+static int angie_execute_queue(struct jtag_command *cmd_queue);
static int angie_khz(int khz, int *jtag_speed);
static int angie_speed(int speed);
static int angie_speed_div(int speed, int *khz);
@@ -2037,9 +2037,9 @@ static int angie_post_process_queue(struct angie *device)
* @return on success: ERROR_OK
* @return on failure: ERROR_FAIL
*/
-static int angie_execute_queue(void)
+static int angie_execute_queue(struct jtag_command *cmd_queue)
{
- struct jtag_command *cmd = jtag_command_queue;
+ struct jtag_command *cmd = cmd_queue;
int ret;
while (cmd) {
diff --git a/src/jtag/drivers/arm-jtag-ew.c b/src/jtag/drivers/arm-jtag-ew.c
index eada67f45..4c50c54c9 100644
--- a/src/jtag/drivers/arm-jtag-ew.c
+++ b/src/jtag/drivers/arm-jtag-ew.c
@@ -85,9 +85,9 @@ static struct armjtagew *armjtagew_handle;
/**************************************************************************
* External interface implementation */
-static int armjtagew_execute_queue(void)
+static int armjtagew_execute_queue(struct jtag_command *cmd_queue)
{
- struct jtag_command *cmd = jtag_command_queue;
+ struct jtag_command *cmd = cmd_queue;
int scan_size;
enum scan_type type;
uint8_t *buffer;
diff --git a/src/jtag/drivers/bitbang.c b/src/jtag/drivers/bitbang.c
index 186d2098a..8df51764b 100644
--- a/src/jtag/drivers/bitbang.c
+++ b/src/jtag/drivers/bitbang.c
@@ -15,6 +15,7 @@
#include "config.h"
#endif
+#include <jtag/jtag.h> /* Added to avoid include loop in commands.h */
#include "bitbang.h"
#include <jtag/interface.h>
#include <jtag/commands.h>
@@ -287,9 +288,9 @@ static void bitbang_sleep(unsigned int microseconds)
}
}
-int bitbang_execute_queue(void)
+int bitbang_execute_queue(struct jtag_command *cmd_queue)
{
- struct jtag_command *cmd = jtag_command_queue; /* currently processed command */
+ struct jtag_command *cmd = cmd_queue; /* currently processed command */
int scan_size;
enum scan_type type;
uint8_t *buffer;
diff --git a/src/jtag/drivers/bitbang.h b/src/jtag/drivers/bitbang.h
index 097a5c0d1..dc941796e 100644
--- a/src/jtag/drivers/bitbang.h
+++ b/src/jtag/drivers/bitbang.h
@@ -12,6 +12,7 @@
#define OPENOCD_JTAG_DRIVERS_BITBANG_H
#include <jtag/swd.h>
+#include <jtag/commands.h>
typedef enum {
BB_LOW,
@@ -64,7 +65,7 @@ struct bitbang_interface {
extern const struct swd_driver bitbang_swd;
-int bitbang_execute_queue(void);
+int bitbang_execute_queue(struct jtag_command *cmd_queue);
extern struct bitbang_interface *bitbang_interface;
diff --git a/src/jtag/drivers/bitq.c b/src/jtag/drivers/bitq.c
index 59e4f3574..2e5cca2a4 100644
--- a/src/jtag/drivers/bitq.c
+++ b/src/jtag/drivers/bitq.c
@@ -203,11 +203,11 @@ static void bitq_scan(struct scan_command *cmd)
bitq_scan_field(&cmd->fields[i], 1);
}
-int bitq_execute_queue(void)
+int bitq_execute_queue(struct jtag_command *cmd_queue)
{
- struct jtag_command *cmd = jtag_command_queue; /* currently processed command */
+ struct jtag_command *cmd = cmd_queue; /* currently processed command */
- bitq_in_state.cmd = jtag_command_queue;
+ bitq_in_state.cmd = cmd_queue;
bitq_in_state.field_idx = 0;
bitq_in_state.bit_pos = 0;
bitq_in_state.status = ERROR_OK;
diff --git a/src/jtag/drivers/bitq.h b/src/jtag/drivers/bitq.h
index 8e06fcf73..3ed182da4 100644
--- a/src/jtag/drivers/bitq.h
+++ b/src/jtag/drivers/bitq.h
@@ -27,7 +27,7 @@ struct bitq_interface {
extern struct bitq_interface *bitq_interface;
-int bitq_execute_queue(void);
+int bitq_execute_queue(struct jtag_command *cmd_queue);
void bitq_cleanup(void);
diff --git a/src/jtag/drivers/buspirate.c b/src/jtag/drivers/buspirate.c
index 03b48e68b..3b03337c9 100644
--- a/src/jtag/drivers/buspirate.c
+++ b/src/jtag/drivers/buspirate.c
@@ -20,7 +20,7 @@
#undef DEBUG_SERIAL
/*#define DEBUG_SERIAL */
-static int buspirate_execute_queue(void);
+static int buspirate_execute_queue(struct jtag_command *cmd_queue);
static int buspirate_init(void);
static int buspirate_quit(void);
static int buspirate_reset(int trst, int srst);
@@ -151,10 +151,10 @@ static int buspirate_serial_read(int fd, uint8_t *buf, int size);
static void buspirate_serial_close(int fd);
static void buspirate_print_buffer(uint8_t *buf, int size);
-static int buspirate_execute_queue(void)
+static int buspirate_execute_queue(struct jtag_command *cmd_queue)
{
/* currently processed command */
- struct jtag_command *cmd = jtag_command_queue;
+ struct jtag_command *cmd = cmd_queue;
int scan_size;
enum scan_type type;
uint8_t *buffer;
diff --git a/src/jtag/drivers/cmsis_dap.c b/src/jtag/drivers/cmsis_dap.c
index caacc9b91..341d35cdf 100644
--- a/src/jtag/drivers/cmsis_dap.c
+++ b/src/jtag/drivers/cmsis_dap.c
@@ -1954,9 +1954,9 @@ static void cmsis_dap_execute_command(struct jtag_command *cmd)
}
}
-static int cmsis_dap_execute_queue(void)
+static int cmsis_dap_execute_queue(struct jtag_command *cmd_queue)
{
- struct jtag_command *cmd = jtag_command_queue;
+ struct jtag_command *cmd = cmd_queue;
while (cmd) {
cmsis_dap_execute_command(cmd);
diff --git a/src/jtag/drivers/ft232r.c b/src/jtag/drivers/ft232r.c
index 2d9d9ef34..766f6ddb5 100644
--- a/src/jtag/drivers/ft232r.c
+++ b/src/jtag/drivers/ft232r.c
@@ -803,9 +803,9 @@ static void syncbb_scan(bool ir_scan, enum scan_type type, uint8_t *buffer, int
}
}
-static int syncbb_execute_queue(void)
+static int syncbb_execute_queue(struct jtag_command *cmd_queue)
{
- struct jtag_command *cmd = jtag_command_queue; /* currently processed command */
+ struct jtag_command *cmd = cmd_queue; /* currently processed command */
int scan_size;
enum scan_type type;
uint8_t *buffer;
diff --git a/src/jtag/drivers/ftdi.c b/src/jtag/drivers/ftdi.c
index da5911ac9..2bde93169 100644
--- a/src/jtag/drivers/ftdi.c
+++ b/src/jtag/drivers/ftdi.c
@@ -625,14 +625,14 @@ static void ftdi_execute_command(struct jtag_command *cmd)
}
}
-static int ftdi_execute_queue(void)
+static int ftdi_execute_queue(struct jtag_command *cmd_queue)
{
/* blink, if the current layout has that feature */
struct signal *led = find_signal_by_name("LED");
if (led)
ftdi_set_signal(led, '1');
- for (struct jtag_command *cmd = jtag_command_queue; cmd; cmd = cmd->next) {
+ for (struct jtag_command *cmd = cmd_queue; cmd; cmd = cmd->next) {
/* fill the write buffer with the desired command */
ftdi_execute_command(cmd);
}
diff --git a/src/jtag/drivers/gw16012.c b/src/jtag/drivers/gw16012.c
index 592e17099..a4c6fd0f0 100644
--- a/src/jtag/drivers/gw16012.c
+++ b/src/jtag/drivers/gw16012.c
@@ -270,9 +270,9 @@ static void gw16012_scan(bool ir_scan, enum scan_type type, uint8_t *buffer, int
}
}
-static int gw16012_execute_queue(void)
+static int gw16012_execute_queue(struct jtag_command *cmd_queue)
{
- struct jtag_command *cmd = jtag_command_queue; /* currently processed command */
+ struct jtag_command *cmd = cmd_queue; /* currently processed command */
int scan_size;
enum scan_type type;
uint8_t *buffer;
diff --git a/src/jtag/drivers/jlink.c b/src/jtag/drivers/jlink.c
index 97dc351fd..1874557dc 100644
--- a/src/jtag/drivers/jlink.c
+++ b/src/jtag/drivers/jlink.c
@@ -276,10 +276,10 @@ static int jlink_execute_command(struct jtag_command *cmd)
return ERROR_OK;
}
-static int jlink_execute_queue(void)
+static int jlink_execute_queue(struct jtag_command *cmd_queue)
{
int ret;
- struct jtag_command *cmd = jtag_command_queue;
+ struct jtag_command *cmd = cmd_queue;
while (cmd) {
ret = jlink_execute_command(cmd);
diff --git a/src/jtag/drivers/jtag_dpi.c b/src/jtag/drivers/jtag_dpi.c
index 2a36331ef..285f96e4b 100644
--- a/src/jtag/drivers/jtag_dpi.c
+++ b/src/jtag/drivers/jtag_dpi.c
@@ -222,12 +222,12 @@ static int jtag_dpi_stableclocks(int cycles)
return jtag_dpi_runtest(cycles);
}
-static int jtag_dpi_execute_queue(void)
+static int jtag_dpi_execute_queue(struct jtag_command *cmd_queue)
{
struct jtag_command *cmd;
int ret = ERROR_OK;
- for (cmd = jtag_command_queue; ret == ERROR_OK && cmd;
+ for (cmd = cmd_queue; ret == ERROR_OK && cmd;
cmd = cmd->next) {
switch (cmd->type) {
case JTAG_RUNTEST:
diff --git a/src/jtag/drivers/jtag_vpi.c b/src/jtag/drivers/jtag_vpi.c
index c2b3b0808..9dec0d19d 100644
--- a/src/jtag/drivers/jtag_vpi.c
+++ b/src/jtag/drivers/jtag_vpi.c
@@ -480,12 +480,12 @@ static int jtag_vpi_stableclocks(int cycles)
return ERROR_OK;
}
-static int jtag_vpi_execute_queue(void)
+static int jtag_vpi_execute_queue(struct jtag_command *cmd_queue)
{
struct jtag_command *cmd;
int retval = ERROR_OK;
- for (cmd = jtag_command_queue; retval == ERROR_OK && cmd;
+ for (cmd = cmd_queue; retval == ERROR_OK && cmd;
cmd = cmd->next) {
switch (cmd->type) {
case JTAG_RESET:
diff --git a/src/jtag/drivers/opendous.c b/src/jtag/drivers/opendous.c
index 4d9fd998a..81b74d40e 100644
--- a/src/jtag/drivers/opendous.c
+++ b/src/jtag/drivers/opendous.c
@@ -99,7 +99,7 @@ static char *opendous_type;
static const struct opendous_probe *opendous_probe;
/* External interface functions */
-static int opendous_execute_queue(void);
+static int opendous_execute_queue(struct jtag_command *cmd_queue);
static int opendous_init(void);
static int opendous_quit(void);
@@ -238,9 +238,9 @@ struct adapter_driver opendous_adapter_driver = {
.jtag_ops = &opendous_interface,
};
-static int opendous_execute_queue(void)
+static int opendous_execute_queue(struct jtag_command *cmd_queue)
{
- struct jtag_command *cmd = jtag_command_queue;
+ struct jtag_command *cmd = cmd_queue;
int scan_size;
enum scan_type type;
uint8_t *buffer;
diff --git a/src/jtag/drivers/openjtag.c b/src/jtag/drivers/openjtag.c
index 086a411d6..ea78ca8fd 100644
--- a/src/jtag/drivers/openjtag.c
+++ b/src/jtag/drivers/openjtag.c
@@ -805,9 +805,9 @@ static void openjtag_execute_command(struct jtag_command *cmd)
}
}
-static int openjtag_execute_queue(void)
+static int openjtag_execute_queue(struct jtag_command *cmd_queue)
{
- struct jtag_command *cmd = jtag_command_queue;
+ struct jtag_command *cmd = cmd_queue;
while (cmd) {
openjtag_execute_command(cmd);
diff --git a/src/jtag/drivers/osbdm.c b/src/jtag/drivers/osbdm.c
index 84f2fd66a..8d4fc90d8 100644
--- a/src/jtag/drivers/osbdm.c
+++ b/src/jtag/drivers/osbdm.c
@@ -628,7 +628,7 @@ static int osbdm_execute_command(
return retval;
}
-static int osbdm_execute_queue(void)
+static int osbdm_execute_queue(struct jtag_command *cmd_queue)
{
int retval = ERROR_OK;
@@ -637,7 +637,7 @@ static int osbdm_execute_queue(void)
LOG_ERROR("BUG: can't allocate bit queue");
retval = ERROR_FAIL;
} else {
- struct jtag_command *cmd = jtag_command_queue;
+ struct jtag_command *cmd = cmd_queue;
while (retval == ERROR_OK && cmd) {
retval = osbdm_execute_command(&osbdm_context, queue, cmd);
diff --git a/src/jtag/drivers/remote_bitbang.c b/src/jtag/drivers/remote_bitbang.c
index 6d0fba2e4..c97b6b6ab 100644
--- a/src/jtag/drivers/remote_bitbang.c
+++ b/src/jtag/drivers/remote_bitbang.c
@@ -456,14 +456,14 @@ static const struct command_registration remote_bitbang_command_handlers[] = {
COMMAND_REGISTRATION_DONE
};
-static int remote_bitbang_execute_queue(void)
+static int remote_bitbang_execute_queue(struct jtag_command *cmd_queue)
{
/* safety: the send buffer must be empty, no leftover characters from
* previous transactions */
assert(remote_bitbang_send_buf_used == 0);
/* process the JTAG command queue */
- int ret = bitbang_execute_queue();
+ int ret = bitbang_execute_queue(cmd_queue);
if (ret != ERROR_OK)
return ret;
diff --git a/src/jtag/drivers/rlink.c b/src/jtag/drivers/rlink.c
index a28e76e01..1b1f2e4de 100644
--- a/src/jtag/drivers/rlink.c
+++ b/src/jtag/drivers/rlink.c
@@ -1262,9 +1262,9 @@ static int rlink_scan(struct jtag_command *cmd, enum scan_type type,
return 0;
}
-static int rlink_execute_queue(void)
+static int rlink_execute_queue(struct jtag_command *cmd_queue)
{
- struct jtag_command *cmd = jtag_command_queue; /* currently processed command */
+ struct jtag_command *cmd = cmd_queue; /* currently processed command */
int scan_size;
enum scan_type type;
uint8_t *buffer;
diff --git a/src/jtag/drivers/ulink.c b/src/jtag/drivers/ulink.c
index fd29f126e..4f23c6c7f 100644
--- a/src/jtag/drivers/ulink.c
+++ b/src/jtag/drivers/ulink.c
@@ -227,7 +227,7 @@ static int ulink_post_process_scan(struct ulink_cmd *ulink_cmd);
static int ulink_post_process_queue(struct ulink *device);
/* adapter driver functions */
-static int ulink_execute_queue(void);
+static int ulink_execute_queue(struct jtag_command *cmd_queue);
static int ulink_khz(int khz, int *jtag_speed);
static int ulink_speed(int speed);
static int ulink_speed_div(int speed, int *khz);
@@ -1905,9 +1905,9 @@ static int ulink_post_process_queue(struct ulink *device)
* @return on success: ERROR_OK
* @return on failure: ERROR_FAIL
*/
-static int ulink_execute_queue(void)
+static int ulink_execute_queue(struct jtag_command *cmd_queue)
{
- struct jtag_command *cmd = jtag_command_queue;
+ struct jtag_command *cmd = cmd_queue;
int ret;
while (cmd) {
diff --git a/src/jtag/drivers/usb_blaster/usb_blaster.c b/src/jtag/drivers/usb_blaster/usb_blaster.c
index 8c3704814..c84055c4a 100644
--- a/src/jtag/drivers/usb_blaster/usb_blaster.c
+++ b/src/jtag/drivers/usb_blaster/usb_blaster.c
@@ -765,7 +765,7 @@ static void ublast_initial_wipeout(void)
tap_set_state(TAP_RESET);
}
-static int ublast_execute_queue(void)
+static int ublast_execute_queue(struct jtag_command *cmd_queue)
{
struct jtag_command *cmd;
static int first_call = 1;
@@ -776,7 +776,7 @@ static int ublast_execute_queue(void)
ublast_initial_wipeout();
}
- for (cmd = jtag_command_queue; ret == ERROR_OK && cmd;
+ for (cmd = cmd_queue; ret == ERROR_OK && cmd;
cmd = cmd->next) {
switch (cmd->type) {
case JTAG_RESET:
diff --git a/src/jtag/drivers/usbprog.c b/src/jtag/drivers/usbprog.c
index aa655ed7e..2d666d072 100644
--- a/src/jtag/drivers/usbprog.c
+++ b/src/jtag/drivers/usbprog.c
@@ -83,9 +83,9 @@ static void usbprog_jtag_write_slice(struct usbprog_jtag *usbprog_jtag, unsigned
static void usbprog_jtag_set_bit(struct usbprog_jtag *usbprog_jtag, int bit, int value);
/* static int usbprog_jtag_get_bit(struct usbprog_jtag *usbprog_jtag, int bit); */
-static int usbprog_execute_queue(void)
+static int usbprog_execute_queue(struct jtag_command *cmd_queue)
{
- struct jtag_command *cmd = jtag_command_queue; /* currently processed command */
+ struct jtag_command *cmd = cmd_queue; /* currently processed command */
int scan_size;
enum scan_type type;
uint8_t *buffer;
diff --git a/src/jtag/drivers/vdebug.c b/src/jtag/drivers/vdebug.c
index 6d9016e9c..f1fc4535f 100644
--- a/src/jtag/drivers/vdebug.c
+++ b/src/jtag/drivers/vdebug.c
@@ -1046,11 +1046,11 @@ static int vdebug_jtag_div(int speed, int *khz)
return ERROR_OK;
}
-static int vdebug_jtag_execute_queue(void)
+static int vdebug_jtag_execute_queue(struct jtag_command *cmd_queue)
{
int rc = ERROR_OK;
- for (struct jtag_command *cmd = jtag_command_queue; rc == ERROR_OK && cmd; cmd = cmd->next) {
+ for (struct jtag_command *cmd = cmd_queue; rc == ERROR_OK && cmd; cmd = cmd->next) {
switch (cmd->type) {
case JTAG_RUNTEST:
rc = vdebug_jtag_runtest(cmd->cmd.runtest->num_cycles, cmd->cmd.runtest->end_state, !cmd->next);
diff --git a/src/jtag/drivers/vsllink.c b/src/jtag/drivers/vsllink.c
index 255ff88a2..34525d546 100644
--- a/src/jtag/drivers/vsllink.c
+++ b/src/jtag/drivers/vsllink.c
@@ -84,9 +84,9 @@ static bool swd_mode;
static struct vsllink *vsllink_handle;
-static int vsllink_execute_queue(void)
+static int vsllink_execute_queue(struct jtag_command *cmd_queue)
{
- struct jtag_command *cmd = jtag_command_queue;
+ struct jtag_command *cmd = cmd_queue;
int scan_size;
enum scan_type type;
uint8_t *buffer;
diff --git a/src/jtag/drivers/xds110.c b/src/jtag/drivers/xds110.c
index 717295c73..11fbaaab2 100644
--- a/src/jtag/drivers/xds110.c
+++ b/src/jtag/drivers/xds110.c
@@ -1840,9 +1840,9 @@ static void xds110_execute_command(struct jtag_command *cmd)
}
}
-static int xds110_execute_queue(void)
+static int xds110_execute_queue(struct jtag_command *cmd_queue)
{
- struct jtag_command *cmd = jtag_command_queue;
+ struct jtag_command *cmd = cmd_queue;
while (cmd) {
xds110_execute_command(cmd);
diff --git a/src/jtag/drivers/xlnx-pcie-xvc.c b/src/jtag/drivers/xlnx-pcie-xvc.c
index 6ad0255e7..233ade3f8 100644
--- a/src/jtag/drivers/xlnx-pcie-xvc.c
+++ b/src/jtag/drivers/xlnx-pcie-xvc.c
@@ -362,9 +362,9 @@ static int xlnx_pcie_xvc_execute_command(struct jtag_command *cmd)
return ERROR_OK;
}
-static int xlnx_pcie_xvc_execute_queue(void)
+static int xlnx_pcie_xvc_execute_queue(struct jtag_command *cmd_queue)
{
- struct jtag_command *cmd = jtag_command_queue;
+ struct jtag_command *cmd = cmd_queue;
int ret;
while (cmd) {
diff --git a/src/jtag/interface.h b/src/jtag/interface.h
index 3df424086..28c1458cb 100644
--- a/src/jtag/interface.h
+++ b/src/jtag/interface.h
@@ -187,10 +187,12 @@ struct jtag_interface {
#define DEBUG_CAP_TMS_SEQ (1 << 0)
/**
- * Execute queued commands.
+ * Execute commands in the supplied queue
+ * @param cmd_queue - a linked list of commands to execute
* @returns ERROR_OK on success, or an error code on failure.
*/
- int (*execute_queue)(void);
+
+ int (*execute_queue)(struct jtag_command *cmd_queue);
};
/**
-----------------------------------------------------------------------
Summary of changes:
src/jtag/commands.c | 7 ++++++-
src/jtag/commands.h | 4 +---
src/jtag/core.c | 4 ++--
src/jtag/drivers/amt_jtagaccel.c | 4 ++--
src/jtag/drivers/angie.c | 6 +++---
src/jtag/drivers/arm-jtag-ew.c | 4 ++--
src/jtag/drivers/bitbang.c | 5 +++--
src/jtag/drivers/bitbang.h | 3 ++-
src/jtag/drivers/bitq.c | 6 +++---
src/jtag/drivers/bitq.h | 2 +-
src/jtag/drivers/buspirate.c | 6 +++---
src/jtag/drivers/cmsis_dap.c | 4 ++--
src/jtag/drivers/ft232r.c | 4 ++--
src/jtag/drivers/ftdi.c | 4 ++--
src/jtag/drivers/gw16012.c | 4 ++--
src/jtag/drivers/jlink.c | 4 ++--
src/jtag/drivers/jtag_dpi.c | 4 ++--
src/jtag/drivers/jtag_vpi.c | 4 ++--
src/jtag/drivers/opendous.c | 6 +++---
src/jtag/drivers/openjtag.c | 4 ++--
src/jtag/drivers/osbdm.c | 4 ++--
src/jtag/drivers/remote_bitbang.c | 4 ++--
src/jtag/drivers/rlink.c | 4 ++--
src/jtag/drivers/ulink.c | 6 +++---
src/jtag/drivers/usb_blaster/usb_blaster.c | 4 ++--
src/jtag/drivers/usbprog.c | 4 ++--
src/jtag/drivers/vdebug.c | 4 ++--
src/jtag/drivers/vsllink.c | 4 ++--
src/jtag/drivers/xds110.c | 4 ++--
src/jtag/drivers/xlnx-pcie-xvc.c | 4 ++--
src/jtag/interface.h | 6 ++++--
31 files changed, 72 insertions(+), 65 deletions(-)
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--
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|
From: openocd-gerrit <ope...@us...> - 2024-02-11 23:11:36
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".
The branch, master has been updated
via c6e7e48b053c281ef4a9dd50f2d94fa12184a956 (commit)
from 7295ddc15c0516a64c9996d2b351accb50175803 (commit)
Those revisions listed above that are new to this repository have
not appeared on any other notification email; so we list those
revisions in full, below.
- Log -----------------------------------------------------------------
commit c6e7e48b053c281ef4a9dd50f2d94fa12184a956
Author: N S <nl...@ya...>
Date: Mon Jan 22 21:47:34 2024 -0800
jtag/drivers: fix reset logic handling in OpenJTAG
The OpenJTAG driver behaviour always forces a system reset on jtag_init.
The driver was incorrectly assuming that when execute_reset is called
with trst set to 1 - perform a software TAP reset, otherwise perform a
system reset when trst is 0.
The set_state call assumes the that OpenJTAG hardware will perform a
software TLR reset if the target state is TAP_RESET. This is not the
case: the published VHDL will simply find the shortest path to TLR and
not perform a fixed 5 cycle operation with TMS held high.
Fix the code to only perform system resets when srst is 1 in
execute_reset and to force a software TAP reset operation in set_state
when the target state is TAP_RESET.
Change-Id: I7e0f76f8491efefff1ccaeb4b1ae16e722d76df4
Signed-off-by: N S <nl...@ya...>
Reviewed-on: https://review.openocd.org/c/openocd/+/8121
Reviewed-by: Antonio Borneo <bor...@gm...>
Tested-by: jenkins
diff --git a/src/jtag/drivers/openjtag.c b/src/jtag/drivers/openjtag.c
index 1c79a2c9b..086a411d6 100644
--- a/src/jtag/drivers/openjtag.c
+++ b/src/jtag/drivers/openjtag.c
@@ -671,14 +671,12 @@ static void openjtag_execute_reset(struct jtag_command *cmd)
uint8_t buf = 0x00;
- if (cmd->cmd.reset->trst) {
- buf = 0x03;
- } else {
+ /* Pull SRST low for 5 TCLK cycles */
+ if (cmd->cmd.reset->srst) {
buf |= 0x04;
buf |= 0x05 << 4;
+ openjtag_add_byte(buf);
}
-
- openjtag_add_byte(buf);
}
static void openjtag_execute_sleep(struct jtag_command *cmd)
@@ -691,8 +689,14 @@ static void openjtag_set_state(uint8_t openocd_state)
uint8_t state = openjtag_get_tap_state(openocd_state);
uint8_t buf = 0;
- buf = 0x01;
- buf |= state << 4;
+
+ if (state != OPENJTAG_TAP_RESET) {
+ buf = 0x01;
+ buf |= state << 4;
+ } else {
+ /* Force software TLR */
+ buf = 0x03;
+ }
openjtag_add_byte(buf);
}
-----------------------------------------------------------------------
Summary of changes:
src/jtag/drivers/openjtag.c | 18 +++++++++++-------
1 file changed, 11 insertions(+), 7 deletions(-)
hooks/post-receive
--
Main OpenOCD repository
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|
From: openocd-gerrit <ope...@us...> - 2024-02-11 23:11:02
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".
The branch, master has been updated
via 7295ddc15c0516a64c9996d2b351accb50175803 (commit)
from 81a50d3e9050eed8f4d95622f2b326054a200b93 (commit)
Those revisions listed above that are new to this repository have
not appeared on any other notification email; so we list those
revisions in full, below.
- Log -----------------------------------------------------------------
commit 7295ddc15c0516a64c9996d2b351accb50175803
Author: N S <nl...@ya...>
Date: Sun Jan 22 21:34:16 2023 -0800
jtag/drivers: OpenJTAG standard variant perf improvement
Calculate exact size of response expected from OpenJTAG device so that
openjtag_buf_read_standard doesn't spend 5 retry cycles waiting for
data that isn't coming.
Change-Id: Icd010d1fa4453d6592a1f9aed93fb1f01e0a19da
Signed-off-by: N S <nl...@ya...>
Reviewed-on: https://review.openocd.org/c/openocd/+/8101
Reviewed-by: Antonio Borneo <bor...@gm...>
Tested-by: jenkins
diff --git a/src/jtag/drivers/openjtag.c b/src/jtag/drivers/openjtag.c
index 45064fe6a..1c79a2c9b 100644
--- a/src/jtag/drivers/openjtag.c
+++ b/src/jtag/drivers/openjtag.c
@@ -530,9 +530,20 @@ static int openjtag_quit(void)
static void openjtag_write_tap_buffer(void)
{
uint32_t written;
+ uint32_t rx_expected = 0;
+
+ /* calculate expected number of return bytes */
+ for (int tx_offs = 0; tx_offs < usb_tx_buf_offs; tx_offs++) {
+ if ((usb_tx_buf[tx_offs] & 0x0F) == 6) {
+ rx_expected++;
+ tx_offs++;
+ } else if ((usb_tx_buf[tx_offs] & 0x0F) == 2) {
+ rx_expected++;
+ }
+ }
openjtag_buf_write(usb_tx_buf, usb_tx_buf_offs, &written);
- openjtag_buf_read(usb_rx_buf, usb_tx_buf_offs, &usb_rx_buf_len);
+ openjtag_buf_read(usb_rx_buf, rx_expected, &usb_rx_buf_len);
usb_tx_buf_offs = 0;
}
-----------------------------------------------------------------------
Summary of changes:
src/jtag/drivers/openjtag.c | 13 ++++++++++++-
1 file changed, 12 insertions(+), 1 deletion(-)
hooks/post-receive
--
Main OpenOCD repository
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|
From: openocd-gerrit <ope...@us...> - 2024-02-11 23:08:17
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".
The branch, master has been updated
via 81a50d3e9050eed8f4d95622f2b326054a200b93 (commit)
from d0548940f289fbb6c3ce61106799aa56ec20f188 (commit)
Those revisions listed above that are new to this repository have
not appeared on any other notification email; so we list those
revisions in full, below.
- Log -----------------------------------------------------------------
commit 81a50d3e9050eed8f4d95622f2b326054a200b93
Author: Antonio Borneo <bor...@gm...>
Date: Thu Feb 1 10:55:51 2024 +0100
jtag: fix jtag configure command containing events
Commit ea2e26f7d521 ("jtag: rewrite jim_jtag_configure() as
COMMAND_HANDLER") breaks the option -event if it is the last of
the command line.
This can be tested, even without any device connected, through:
#> openocd -f board/ti_cc26x0_launchpad.cfg
wrong # args: should be "-event <event-name> <event-body>"
Fix the check on available arguments after -event.
Change-Id: Iec1522238f906d61a888a09a7685acd9ac6442a7
Signed-off-by: Antonio Borneo <bor...@gm...>
Reported-by: Lorenz Brun <lo...@br...>
Fixes: ea2e26f7d521 ("jtag: rewrite jim_jtag_configure() as COMMAND_HANDLER")
Reviewed-on: https://review.openocd.org/c/openocd/+/8125
Tested-by: jenkins
Reviewed-by: Lorenz Brun <lo...@br...>
diff --git a/src/jtag/tcl.c b/src/jtag/tcl.c
index 163edfa19..799552901 100644
--- a/src/jtag/tcl.c
+++ b/src/jtag/tcl.c
@@ -315,7 +315,7 @@ __COMMAND_HANDLER(handle_jtag_configure)
const struct nvp *n = nvp_name2value(nvp_config_opts, CMD_ARGV[i]);
switch (n->value) {
case JCFG_EVENT:
- if (i + (is_configure ? 3 : 2) >= CMD_ARGC) {
+ if (i + (is_configure ? 2 : 1) >= CMD_ARGC) {
command_print(CMD, "wrong # args: should be \"-event <event-name>%s\"",
is_configure ? " <event-body>" : "");
return ERROR_COMMAND_ARGUMENT_INVALID;
-----------------------------------------------------------------------
Summary of changes:
src/jtag/tcl.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
hooks/post-receive
--
Main OpenOCD repository
|
|
From: openocd-gerrit <ope...@us...> - 2024-02-11 23:07:43
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".
The branch, master has been updated
via d0548940f289fbb6c3ce61106799aa56ec20f188 (commit)
from 50be4bd2672916f9262df31108d4611c2b0fbf44 (commit)
Those revisions listed above that are new to this repository have
not appeared on any other notification email; so we list those
revisions in full, below.
- Log -----------------------------------------------------------------
commit d0548940f289fbb6c3ce61106799aa56ec20f188
Author: Evgeniy Naydanov <evg...@sy...>
Date: Wed Jan 10 19:23:53 2024 +0300
helper/log: report the file in `log_output` command
Prior to the change when calling `log_output` without any arguments it
was unclear where the log was redirected.
Change-Id: Iaa3ecea8166f9c7ec8aad7adf5bd412799f719a1
Signed-off-by: Evgeniy Naydanov <evg...@sy...>
Reviewed-on: https://review.openocd.org/c/openocd/+/8071
Tested-by: jenkins
Reviewed-by: Antonio Borneo <bor...@gm...>
diff --git a/doc/openocd.texi b/doc/openocd.texi
index a4e7c6aaa..38c897045 100644
--- a/doc/openocd.texi
+++ b/doc/openocd.texi
@@ -9035,9 +9035,10 @@ echo "Downloading kernel -- please wait"
@end example
@end deffn
-@deffn {Command} {log_output} [filename | "default"]
-Redirect logging to @var{filename} or set it back to default output;
-the default log output channel is stderr.
+@deffn {Command} {log_output} [filename | 'default']
+Redirect logging to @var{filename}. If used without an argument or
+@var{filename} is set to 'default' log output channel is set to
+stderr.
@end deffn
@deffn {Command} {add_script_search_dir} [directory]
diff --git a/src/helper/log.c b/src/helper/log.c
index a4fc53d4b..471069ade 100644
--- a/src/helper/log.c
+++ b/src/helper/log.c
@@ -214,31 +214,28 @@ COMMAND_HANDLER(handle_debug_level_command)
COMMAND_HANDLER(handle_log_output_command)
{
- if (CMD_ARGC == 0 || (CMD_ARGC == 1 && strcmp(CMD_ARGV[0], "default") == 0)) {
- if (log_output != stderr && log_output) {
- /* Close previous log file, if it was open and wasn't stderr. */
- fclose(log_output);
- }
- log_output = stderr;
- LOG_DEBUG("set log_output to default");
- return ERROR_OK;
- }
- if (CMD_ARGC == 1) {
- FILE *file = fopen(CMD_ARGV[0], "w");
+ if (CMD_ARGC > 1)
+ return ERROR_COMMAND_SYNTAX_ERROR;
+
+ FILE *file;
+ if (CMD_ARGC == 1 && strcmp(CMD_ARGV[0], "default") != 0) {
+ file = fopen(CMD_ARGV[0], "w");
if (!file) {
- LOG_ERROR("failed to open output log '%s'", CMD_ARGV[0]);
+ command_print(CMD, "failed to open output log \"%s\"", CMD_ARGV[0]);
return ERROR_FAIL;
}
- if (log_output != stderr && log_output) {
- /* Close previous log file, if it was open and wasn't stderr. */
- fclose(log_output);
- }
- log_output = file;
- LOG_DEBUG("set log_output to \"%s\"", CMD_ARGV[0]);
- return ERROR_OK;
+ command_print(CMD, "set log_output to \"%s\"", CMD_ARGV[0]);
+ } else {
+ file = stderr;
+ command_print(CMD, "set log_output to default");
}
- return ERROR_COMMAND_SYNTAX_ERROR;
+ if (log_output != stderr && log_output) {
+ /* Close previous log file, if it was open and wasn't stderr. */
+ fclose(log_output);
+ }
+ log_output = file;
+ return ERROR_OK;
}
static const struct command_registration log_command_handlers[] = {
@@ -247,7 +244,7 @@ static const struct command_registration log_command_handlers[] = {
.handler = handle_log_output_command,
.mode = COMMAND_ANY,
.help = "redirect logging to a file (default: stderr)",
- .usage = "[file_name | \"default\"]",
+ .usage = "[file_name | 'default']",
},
{
.name = "debug_level",
-----------------------------------------------------------------------
Summary of changes:
doc/openocd.texi | 7 ++++---
src/helper/log.c | 39 ++++++++++++++++++---------------------
2 files changed, 22 insertions(+), 24 deletions(-)
hooks/post-receive
--
Main OpenOCD repository
|
|
From: openocd-gerrit <ope...@us...> - 2024-02-11 23:05:23
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".
The branch, master has been updated
via 50be4bd2672916f9262df31108d4611c2b0fbf44 (commit)
from 3b5ef1726a4e5da657080d640e16f1f4d9dc6071 (commit)
Those revisions listed above that are new to this repository have
not appeared on any other notification email; so we list those
revisions in full, below.
- Log -----------------------------------------------------------------
commit 50be4bd2672916f9262df31108d4611c2b0fbf44
Author: Parshintsev Anatoly <ana...@sy...>
Date: Mon Jul 10 16:30:07 2023 +0300
jtag/mpsse: mpsse_flush should not treat LIBUSB_ERROR_INTERRUPTED as an error
LIBUSB_ERROR_INTERRUPTED can happen when (among other things) OpenOCD
process receives a signal like SIGHUP or SIGINT during a call to libusb.
Such situations are expected and should not be treated as an error - the
affected request should just be restarted.
Without this patch applied if a signal arrives during FTDI initialization
procedure we can easily end up (if JTAG speed is low) in situations like
https://review.openocd.org/c/openocd/+/4767. This happens because
fpsse_flush fails due to LIBUSB_ERROR_INTERRUPTED .
It should be noted that the current usage of mpsse_flush should be
revised since it seems that we don't always process error codes returned
by the function.
Change-Id: Ifa063ce828068f8d0371e1c2a864bb6174649848
Signed-off-by: Parshintsev Anatoly <ana...@sy...>
Reviewed-on: https://review.openocd.org/c/openocd/+/7769
Reviewed-by: Tim Newsome <ti...@si...>
Reviewed-by: Antonio Borneo <bor...@gm...>
Tested-by: jenkins
diff --git a/src/jtag/drivers/mpsse.c b/src/jtag/drivers/mpsse.c
index fad91dde2..41a8b6e33 100644
--- a/src/jtag/drivers/mpsse.c
+++ b/src/jtag/drivers/mpsse.c
@@ -880,20 +880,6 @@ int mpsse_flush(struct mpsse_ctx *ctx)
retval = libusb_handle_events_timeout_completed(ctx->usb_ctx, &timeout_usb, NULL);
keep_alive();
- if (retval == LIBUSB_ERROR_NO_DEVICE || retval == LIBUSB_ERROR_INTERRUPTED)
- break;
-
- if (retval != LIBUSB_SUCCESS) {
- libusb_cancel_transfer(write_transfer);
- if (read_transfer)
- libusb_cancel_transfer(read_transfer);
- while (!write_result.done || !read_result.done) {
- retval = libusb_handle_events_timeout_completed(ctx->usb_ctx,
- &timeout_usb, NULL);
- if (retval != LIBUSB_SUCCESS)
- break;
- }
- }
int64_t now = timeval_ms();
if (now - start > warn_after) {
@@ -901,6 +887,15 @@ int mpsse_flush(struct mpsse_ctx *ctx)
"ms.", now - start);
warn_after *= 2;
}
+
+ if (retval == LIBUSB_ERROR_INTERRUPTED)
+ continue;
+
+ if (retval != LIBUSB_SUCCESS) {
+ libusb_cancel_transfer(write_transfer);
+ if (read_transfer)
+ libusb_cancel_transfer(read_transfer);
+ }
}
error_check:
-----------------------------------------------------------------------
Summary of changes:
src/jtag/drivers/mpsse.c | 23 +++++++++--------------
1 file changed, 9 insertions(+), 14 deletions(-)
hooks/post-receive
--
Main OpenOCD repository
|
|
From: openocd-gerrit <ope...@us...> - 2024-02-11 23:04:50
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".
The branch, master has been updated
via 3b5ef1726a4e5da657080d640e16f1f4d9dc6071 (commit)
from 79f519bb633e0d37a9b9ce4b7a1dc16aa14014cd (commit)
Those revisions listed above that are new to this repository have
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revisions in full, below.
- Log -----------------------------------------------------------------
commit 3b5ef1726a4e5da657080d640e16f1f4d9dc6071
Author: N S <nl...@ya...>
Date: Sun Jan 21 17:45:06 2024 -0800
jtag/drivers: Add vid_pid command to OpenJTAG
Enable support for USB vid and pid combinations other than 0x0403/0x6001
on OpenJTAG adapters.
Change-Id: Ibb5fb14a6f33abbc011dbf3179df20d79ed74a7a
Signed-off-by: N S <nl...@ya...>
Reviewed-on: https://review.openocd.org/c/openocd/+/8100
Tested-by: jenkins
Reviewed-by: Antonio Borneo <bor...@gm...>
diff --git a/doc/openocd.texi b/doc/openocd.texi
index e4d4dc5d6..a4e7c6aaa 100644
--- a/doc/openocd.texi
+++ b/doc/openocd.texi
@@ -3445,6 +3445,15 @@ Currently valid @var{variant} values include:
The USB device description string of the adapter.
This value is only used with the standard variant.
@end deffn
+
+@deffn {Config Command} {openjtag vid_pid} vid pid
+The USB vendor ID and product ID of the adapter. If not specified, default
+0x0403:0x6001 is used.
+This value is only used with the standard variant.
+@example
+openjtag vid_pid 0x403 0x6014
+@end example
+@end deffn
@end deffn
diff --git a/src/jtag/drivers/openjtag.c b/src/jtag/drivers/openjtag.c
index dca27b0a6..45064fe6a 100644
--- a/src/jtag/drivers/openjtag.c
+++ b/src/jtag/drivers/openjtag.c
@@ -861,6 +861,17 @@ COMMAND_HANDLER(openjtag_handle_variant_command)
return ERROR_OK;
}
+COMMAND_HANDLER(openjtag_handle_vid_pid_command)
+{
+ if (CMD_ARGC != 2)
+ return ERROR_COMMAND_SYNTAX_ERROR;
+
+ COMMAND_PARSE_NUMBER(u16, CMD_ARGV[0], openjtag_vid);
+ COMMAND_PARSE_NUMBER(u16, CMD_ARGV[1], openjtag_pid);
+
+ return ERROR_OK;
+}
+
static const struct command_registration openjtag_subcommand_handlers[] = {
{
.name = "device_desc",
@@ -876,6 +887,13 @@ static const struct command_registration openjtag_subcommand_handlers[] = {
.help = "set the OpenJTAG variant",
.usage = "variant-string",
},
+ {
+ .name = "vid_pid",
+ .handler = openjtag_handle_vid_pid_command,
+ .mode = COMMAND_CONFIG,
+ .help = "USB VID and PID of the adapter",
+ .usage = "vid pid",
+ },
COMMAND_REGISTRATION_DONE
};
-----------------------------------------------------------------------
Summary of changes:
doc/openocd.texi | 9 +++++++++
src/jtag/drivers/openjtag.c | 18 ++++++++++++++++++
2 files changed, 27 insertions(+)
hooks/post-receive
--
Main OpenOCD repository
|
|
From: openocd-gerrit <ope...@us...> - 2024-02-11 23:03:23
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".
The branch, master has been updated
via 79f519bb633e0d37a9b9ce4b7a1dc16aa14014cd (commit)
from 226085065bdfdfd44bfadbfb2973971ff154eb22 (commit)
Those revisions listed above that are new to this repository have
not appeared on any other notification email; so we list those
revisions in full, below.
- Log -----------------------------------------------------------------
commit 79f519bb633e0d37a9b9ce4b7a1dc16aa14014cd
Author: Tomas Vanek <va...@fb...>
Date: Sun Jan 21 12:29:14 2024 +0100
target/cortex_m: fix couple of comments
Fix obsoleted references to Cortex-M3 from the time
when M3 was the only supported Cortex.
Fix typo.
Signed-off-by: Tomas Vanek <va...@fb...>
Change-Id: I6f93265f1b9328fec063fecd819210deb28aaf2c
Reviewed-on: https://review.openocd.org/c/openocd/+/8099
Tested-by: jenkins
Reviewed-by: Antonio Borneo <bor...@gm...>
diff --git a/src/target/cortex_m.c b/src/target/cortex_m.c
index fb1794af2..4894cabf8 100644
--- a/src/target/cortex_m.c
+++ b/src/target/cortex_m.c
@@ -1607,7 +1607,7 @@ static int cortex_m_assert_reset(struct target *target)
}
/* some cores support connecting while srst is asserted
- * use that mode is it has been configured */
+ * use that mode if it has been configured */
bool srst_asserted = false;
@@ -1693,9 +1693,8 @@ static int cortex_m_assert_reset(struct target *target)
/* srst is asserted, ignore AP access errors */
retval = ERROR_OK;
} else {
- /* Use a standard Cortex-M3 software reset mechanism.
- * We default to using VECTRESET as it is supported on all current cores
- * (except Cortex-M0, M0+ and M1 which support SYSRESETREQ only!)
+ /* Use a standard Cortex-M software reset mechanism.
+ * We default to using VECTRESET.
* This has the disadvantage of not resetting the peripherals, so a
* reset-init event handler is needed to perform any peripheral resets.
*/
@@ -2785,7 +2784,7 @@ static int cortex_m_init_arch_info(struct target *target,
armv7m_init_arch_info(target, armv7m);
/* default reset mode is to use srst if fitted
- * if not it will use CORTEX_M3_RESET_VECTRESET */
+ * if not it will use CORTEX_M_RESET_VECTRESET */
cortex_m->soft_reset_config = CORTEX_M_RESET_VECTRESET;
armv7m->arm.dap = dap;
@@ -2842,8 +2841,7 @@ static int cortex_m_verify_pointer(struct command_invocation *cmd,
/*
* Only stuff below this line should need to verify that its target
- * is a Cortex-M3. Everything else should have indirected through the
- * cortexm3_target structure, which is only used with CM3 targets.
+ * is a Cortex-M with available DAP access (not a HLA adapter).
*/
COMMAND_HANDLER(handle_cortex_m_vector_catch_command)
@@ -2902,7 +2900,7 @@ COMMAND_HANDLER(handle_cortex_m_vector_catch_command)
break;
}
if (i == ARRAY_SIZE(vec_ids)) {
- LOG_TARGET_ERROR(target, "No CM3 vector '%s'", CMD_ARGV[CMD_ARGC]);
+ LOG_TARGET_ERROR(target, "No Cortex-M vector '%s'", CMD_ARGV[CMD_ARGC]);
return ERROR_COMMAND_SYNTAX_ERROR;
}
}
-----------------------------------------------------------------------
Summary of changes:
src/target/cortex_m.c | 14 ++++++--------
1 file changed, 6 insertions(+), 8 deletions(-)
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From: openocd-gerrit <ope...@us...> - 2024-02-11 23:03:02
|
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generated because a ref change was pushed to the repository containing
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- Log -----------------------------------------------------------------
commit 226085065bdfdfd44bfadbfb2973971ff154eb22
Author: Tomas Vanek <va...@fb...>
Date: Sun Jan 21 12:05:35 2024 +0100
target/cortex_m: drop useless target_halt() call
In 2008 the commit 182936125371 ("define resetting
the target into the halted or running state as an atomic operation.")
introduced the target_halt() call to the end of cortex_m3_assert_reset(),
Checkpatch-ignore: GIT_COMMIT_ID
A year later the commit ed36a8d15dfd
("... Updated halt handling for cortex_m3")
prevented cortex_m3_halt() take any action in case of TARGET_RESET state.
This narrowed the target_halt() called from cortex_m3_assert_reset()
to setting target->halt_issued and storing a time stamp.
Introducing ocd_process_reset(_inner) made the setting of halt_issued
and halt_issued_time useless. The Tcl function waits for halt
of all targets if applicable.
cortex_m_halt() and also target_halt() does not work as expected
if the cached target state is TARGET_RESET (although the core could
be out of reset and ready to be halted, just have not been polled).
Explicit Tcl arp_poll must be issued in many scenarios.
Remove the useless hack.
Also remove the explicit error return from cortex_m_halt_one()
in case of RESET_SRST_PULLS_TRST and asserted srst. If the communication
with the target is gated by any reset, cortex_m_write_debug_halt_mask()
fails. Propagate the error return of this call instead.
Change-Id: I0da05b87f43c3d0facb78e54d8f00c1728fe7c46
Signed-off-by: Tomas Vanek <va...@fb...>
Reviewed-on: https://review.openocd.org/c/openocd/+/8098
Tested-by: jenkins
Reviewed-by: Antonio Borneo <bor...@gm...>
diff --git a/src/target/cortex_m.c b/src/target/cortex_m.c
index 8bb852f4f..fb1794af2 100644
--- a/src/target/cortex_m.c
+++ b/src/target/cortex_m.c
@@ -1106,6 +1106,7 @@ static int cortex_m_poll(struct target *target)
static int cortex_m_halt_one(struct target *target)
{
+ int retval;
LOG_TARGET_DEBUG(target, "target->state: %s", target_state_name(target));
if (target->state == TARGET_HALTED) {
@@ -1116,22 +1117,8 @@ static int cortex_m_halt_one(struct target *target)
if (target->state == TARGET_UNKNOWN)
LOG_TARGET_WARNING(target, "target was in unknown state when halt was requested");
- if (target->state == TARGET_RESET) {
- if ((jtag_get_reset_config() & RESET_SRST_PULLS_TRST) && jtag_get_srst()) {
- LOG_TARGET_ERROR(target, "can't request a halt while in reset if nSRST pulls nTRST");
- return ERROR_TARGET_FAILURE;
- } else {
- /* we came here in a reset_halt or reset_init sequence
- * debug entry was already prepared in cortex_m3_assert_reset()
- */
- target->debug_reason = DBG_REASON_DBGRQ;
-
- return ERROR_OK;
- }
- }
-
/* Write to Debug Halting Control and Status Register */
- cortex_m_write_debug_halt_mask(target, C_HALT, 0);
+ retval = cortex_m_write_debug_halt_mask(target, C_HALT, 0);
/* Do this really early to minimize the window where the MASKINTS erratum
* can pile up pending interrupts. */
@@ -1139,7 +1126,7 @@ static int cortex_m_halt_one(struct target *target)
target->debug_reason = DBG_REASON_DBGRQ;
- return ERROR_OK;
+ return retval;
}
static int cortex_m_halt(struct target *target)
@@ -1755,17 +1742,7 @@ static int cortex_m_assert_reset(struct target *target)
register_cache_invalidate(cortex_m->armv7m.arm.core_cache);
- /* now return stored error code if any */
- if (retval != ERROR_OK)
- return retval;
-
- if (target->reset_halt && target_was_examined(target)) {
- retval = target_halt(target);
- if (retval != ERROR_OK)
- return retval;
- }
-
- return ERROR_OK;
+ return retval;
}
static int cortex_m_deassert_reset(struct target *target)
-----------------------------------------------------------------------
Summary of changes:
src/target/cortex_m.c | 31 ++++---------------------------
1 file changed, 4 insertions(+), 27 deletions(-)
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From: openocd-gerrit <ope...@us...> - 2024-02-11 23:02:43
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".
The branch, master has been updated
via 38616990744b2bac7026f0d41da9247b42494379 (commit)
from 0d3d4c981ac77b600ce95c9ea6f1cdb280127342 (commit)
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- Log -----------------------------------------------------------------
commit 38616990744b2bac7026f0d41da9247b42494379
Author: Tomas Vanek <va...@fb...>
Date: Sun Jan 21 10:15:07 2024 +0100
target/cortex_m: prevent asserting reset if examine is deferred
In a corner case when debug_ap is not available,
cortex_m_assert_reset() asserts reset to restore
communication with the target.
Prevent to do so on targets with defer_examine,
as such targets need some special handling to enable them
after reset anyway.
The change makes possible to handle a multicore Cortex-M SoC with
an auxiliary Cortex-M core(s) switched of by default
even with 'reset_config srst_gates_jtag'
Change-Id: I8cec7a816423e588d5e2e4f7904c81c776eddc42
Signed-off-by: Tomas Vanek <va...@fb...>
Reviewed-on: https://review.openocd.org/c/openocd/+/8097
Tested-by: jenkins
Reviewed-by: Antonio Borneo <bor...@gm...>
diff --git a/src/target/cortex_m.c b/src/target/cortex_m.c
index 6a29a5fd4..8bb852f4f 100644
--- a/src/target/cortex_m.c
+++ b/src/target/cortex_m.c
@@ -1625,7 +1625,8 @@ static int cortex_m_assert_reset(struct target *target)
bool srst_asserted = false;
if ((jtag_reset_config & RESET_HAS_SRST) &&
- ((jtag_reset_config & RESET_SRST_NO_GATING) || !armv7m->debug_ap)) {
+ ((jtag_reset_config & RESET_SRST_NO_GATING)
+ || (!armv7m->debug_ap && !target->defer_examine))) {
/* If we have no debug_ap, asserting SRST is the only thing
* we can do now */
adapter_assert_reset();
-----------------------------------------------------------------------
Summary of changes:
src/target/cortex_m.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
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From: openocd-gerrit <ope...@us...> - 2024-02-08 21:16:58
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".
The branch, master has been updated
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- Log -----------------------------------------------------------------
commit 0d3d4c981ac77b600ce95c9ea6f1cdb280127342
Author: Vincent Fazio <vf...@gm...>
Date: Wed Jan 31 09:06:20 2024 -0600
jtag/adapter: retype adapter_gpio_config.{gpio,chip}_num
Previously, the gpio_num and chip_num members of adapter_gpio_config
were typed as 'int' and a sentinel value of -1 was used to denote
unconfigured values.
Now, these members are typed as 'unsigned int' to better reflect their
expected value range.
The sentinel value now maps to UINT_MAX as all adapters either define an
upper bound for these members or, in the case of bcm2835gpio, only
operate on a specific chip, in which case the value doesn't matter.
Format specifiers have been left as %d since, when configured, valid
values are within the positive range of 'int'. This allows unconfigured
values to display as a more readable value of -1 instead of UINT_MAX.
Change-Id: Ieb20e5327b2e2e443a8e43d8689cb29538a5c9c1
Signed-off-by: Vincent Fazio <vf...@gm...>
Reviewed-on: https://review.openocd.org/c/openocd/+/8124
Tested-by: jenkins
Reviewed-by: Tomas Vanek <va...@fb...>
diff --git a/src/jtag/adapter.c b/src/jtag/adapter.c
index e70f4a1e8..bbf1cb3d2 100644
--- a/src/jtag/adapter.c
+++ b/src/jtag/adapter.c
@@ -94,8 +94,9 @@ static void adapter_driver_gpios_init(void)
return;
for (int i = 0; i < ADAPTER_GPIO_IDX_NUM; ++i) {
- adapter_config.gpios[i].gpio_num = -1;
- adapter_config.gpios[i].chip_num = -1;
+ /* Use ADAPTER_GPIO_NOT_SET as the sentinel 'unset' value. */
+ adapter_config.gpios[i].gpio_num = ADAPTER_GPIO_NOT_SET;
+ adapter_config.gpios[i].chip_num = ADAPTER_GPIO_NOT_SET;
if (gpio_map[i].direction == ADAPTER_GPIO_DIRECTION_INPUT)
adapter_config.gpios[i].init_state = ADAPTER_GPIO_INIT_STATE_INPUT;
}
@@ -848,6 +849,11 @@ static COMMAND_HELPER(helper_adapter_gpio_print_config, enum adapter_gpio_config
const char *pull = "";
const char *init_state = "";
+ if (gpio_config->gpio_num == ADAPTER_GPIO_NOT_SET) {
+ command_print(CMD, "adapter gpio %s: not configured", gpio_map[gpio_idx].name);
+ return ERROR_OK;
+ }
+
switch (gpio_map[gpio_idx].direction) {
case ADAPTER_GPIO_DIRECTION_INPUT:
dir = "input";
@@ -900,8 +906,8 @@ static COMMAND_HELPER(helper_adapter_gpio_print_config, enum adapter_gpio_config
}
}
- command_print(CMD, "adapter gpio %s (%s): num %d, chip %d, active-%s%s%s%s",
- gpio_map[gpio_idx].name, dir, gpio_config->gpio_num, gpio_config->chip_num, active_state,
+ command_print(CMD, "adapter gpio %s (%s): num %u, chip %d, active-%s%s%s%s",
+ gpio_map[gpio_idx].name, dir, gpio_config->gpio_num, (int)gpio_config->chip_num, active_state,
drive, pull, init_state);
return ERROR_OK;
@@ -942,9 +948,7 @@ COMMAND_HANDLER(adapter_gpio_config_handler)
LOG_DEBUG("Processing %s", CMD_ARGV[i]);
if (isdigit(*CMD_ARGV[i])) {
- int gpio_num; /* Use a meaningful output parameter for more helpful error messages */
- COMMAND_PARSE_NUMBER(int, CMD_ARGV[i], gpio_num);
- gpio_config->gpio_num = gpio_num;
+ COMMAND_PARSE_NUMBER(uint, CMD_ARGV[i], gpio_config->gpio_num);
++i;
continue;
}
@@ -955,9 +959,7 @@ COMMAND_HANDLER(adapter_gpio_config_handler)
return ERROR_FAIL;
}
LOG_DEBUG("-chip arg is %s", CMD_ARGV[i + 1]);
- int chip_num; /* Use a meaningful output parameter for more helpful error messages */
- COMMAND_PARSE_NUMBER(int, CMD_ARGV[i + 1], chip_num);
- gpio_config->chip_num = chip_num;
+ COMMAND_PARSE_NUMBER(uint, CMD_ARGV[i + 1], gpio_config->chip_num);
i += 2;
continue;
}
diff --git a/src/jtag/adapter.h b/src/jtag/adapter.h
index 682fc10ae..23ffe2cc5 100644
--- a/src/jtag/adapter.h
+++ b/src/jtag/adapter.h
@@ -10,6 +10,7 @@
#include <stdbool.h>
#include <stddef.h>
#include <stdint.h>
+#include <limits.h>
/** Supported output drive modes for adaptor GPIO */
enum adapter_gpio_drive_mode {
@@ -56,8 +57,8 @@ enum adapter_gpio_config_index {
/** Configuration options for a single GPIO */
struct adapter_gpio_config {
- int gpio_num;
- int chip_num;
+ unsigned int gpio_num;
+ unsigned int chip_num;
enum adapter_gpio_drive_mode drive; /* For outputs only */
enum adapter_gpio_init_state init_state;
bool active_low;
@@ -121,4 +122,6 @@ const char *adapter_gpio_get_name(enum adapter_gpio_config_index idx);
*/
const struct adapter_gpio_config *adapter_gpio_get_config(void);
+#define ADAPTER_GPIO_NOT_SET UINT_MAX
+
#endif /* OPENOCD_JTAG_ADAPTER_H */
diff --git a/src/jtag/drivers/am335xgpio.c b/src/jtag/drivers/am335xgpio.c
index 29d410118..cfe41c3be 100644
--- a/src/jtag/drivers/am335xgpio.c
+++ b/src/jtag/drivers/am335xgpio.c
@@ -86,9 +86,7 @@ static const struct adapter_gpio_config *adapter_gpio_config;
static bool is_gpio_config_valid(const struct adapter_gpio_config *gpio_config)
{
- return gpio_config->chip_num >= 0
- && gpio_config->chip_num < AM335XGPIO_NUM_GPIO_CHIPS
- && gpio_config->gpio_num >= 0
+ return gpio_config->chip_num < AM335XGPIO_NUM_GPIO_CHIPS
&& gpio_config->gpio_num < AM335XGPIO_NUM_GPIO_PER_CHIP;
}
@@ -249,10 +247,13 @@ static int am335xgpio_reset(int trst, int srst)
if (is_gpio_config_valid(&adapter_gpio_config[ADAPTER_GPIO_IDX_TRST]))
set_gpio_value(&adapter_gpio_config[ADAPTER_GPIO_IDX_TRST], trst);
- LOG_DEBUG("am335xgpio_reset(%d, %d), trst_gpio: %d %d, srst_gpio: %d %d",
- trst, srst,
- adapter_gpio_config[ADAPTER_GPIO_IDX_TRST].chip_num, adapter_gpio_config[ADAPTER_GPIO_IDX_TRST].gpio_num,
- adapter_gpio_config[ADAPTER_GPIO_IDX_SRST].chip_num, adapter_gpio_config[ADAPTER_GPIO_IDX_SRST].gpio_num);
+ LOG_DEBUG("trst %d gpio: %d %d, srst %d gpio: %d %d",
+ trst,
+ (int)adapter_gpio_config[ADAPTER_GPIO_IDX_TRST].chip_num,
+ (int)adapter_gpio_config[ADAPTER_GPIO_IDX_TRST].gpio_num,
+ srst,
+ (int)adapter_gpio_config[ADAPTER_GPIO_IDX_SRST].chip_num,
+ (int)adapter_gpio_config[ADAPTER_GPIO_IDX_SRST].gpio_num);
return ERROR_OK;
}
diff --git a/src/jtag/drivers/bcm2835gpio.c b/src/jtag/drivers/bcm2835gpio.c
index 7fd7f3894..ff10b0a78 100644
--- a/src/jtag/drivers/bcm2835gpio.c
+++ b/src/jtag/drivers/bcm2835gpio.c
@@ -84,10 +84,7 @@ static inline void bcm2835_delay(void)
static bool is_gpio_config_valid(enum adapter_gpio_config_index idx)
{
/* Only chip 0 is supported, accept unset value (-1) too */
- return adapter_gpio_config[idx].chip_num >= -1
- && adapter_gpio_config[idx].chip_num <= 0
- && adapter_gpio_config[idx].gpio_num >= 0
- && adapter_gpio_config[idx].gpio_num <= 31;
+ return adapter_gpio_config[idx].gpio_num <= 31;
}
static void set_gpio_value(const struct adapter_gpio_config *gpio_config, int value)
@@ -243,10 +240,13 @@ static int bcm2835gpio_reset(int trst, int srst)
if (is_gpio_config_valid(ADAPTER_GPIO_IDX_TRST))
set_gpio_value(&adapter_gpio_config[ADAPTER_GPIO_IDX_TRST], trst);
- LOG_DEBUG("BCM2835 GPIO: bcm2835gpio_reset(%d, %d), trst_gpio: %d %d, srst_gpio: %d %d",
- trst, srst,
- adapter_gpio_config[ADAPTER_GPIO_IDX_TRST].chip_num, adapter_gpio_config[ADAPTER_GPIO_IDX_TRST].gpio_num,
- adapter_gpio_config[ADAPTER_GPIO_IDX_SRST].chip_num, adapter_gpio_config[ADAPTER_GPIO_IDX_SRST].gpio_num);
+ LOG_DEBUG("trst %d gpio: %d %d, srst %d gpio: %d %d",
+ trst,
+ (int)adapter_gpio_config[ADAPTER_GPIO_IDX_TRST].chip_num,
+ (int)adapter_gpio_config[ADAPTER_GPIO_IDX_TRST].gpio_num,
+ srst,
+ (int)adapter_gpio_config[ADAPTER_GPIO_IDX_SRST].chip_num,
+ (int)adapter_gpio_config[ADAPTER_GPIO_IDX_SRST].gpio_num);
return ERROR_OK;
}
diff --git a/src/jtag/drivers/linuxgpiod.c b/src/jtag/drivers/linuxgpiod.c
index d1a88c88d..942883788 100644
--- a/src/jtag/drivers/linuxgpiod.c
+++ b/src/jtag/drivers/linuxgpiod.c
@@ -37,9 +37,7 @@ static const struct adapter_gpio_config *adapter_gpio_config;
*/
static bool is_gpio_config_valid(enum adapter_gpio_config_index idx)
{
- return adapter_gpio_config[idx].chip_num >= 0
- && adapter_gpio_config[idx].chip_num < 1000
- && adapter_gpio_config[idx].gpio_num >= 0
+ return adapter_gpio_config[idx].chip_num < 1000
&& adapter_gpio_config[idx].gpio_num < 10000;
}
-----------------------------------------------------------------------
Summary of changes:
src/jtag/adapter.c | 22 ++++++++++++----------
src/jtag/adapter.h | 7 +++++--
src/jtag/drivers/am335xgpio.c | 15 ++++++++-------
src/jtag/drivers/bcm2835gpio.c | 16 ++++++++--------
src/jtag/drivers/linuxgpiod.c | 4 +---
5 files changed, 34 insertions(+), 30 deletions(-)
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From: openocd-gerrit <ope...@us...> - 2024-02-04 02:56:40
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".
The branch, master has been updated
via 4593c75f0b45ebb1bf10350c26c0163d0676f81a (commit)
from 9659a9b5e28dc615dfb508d301fdd8fa426c191b (commit)
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- Log -----------------------------------------------------------------
commit 4593c75f0b45ebb1bf10350c26c0163d0676f81a
Author: Tomas Vanek <va...@fb...>
Date: Mon Jan 22 21:25:59 2024 +0100
jtag/drivers/jlink: make jlink quiet polling target in -d 3
Jlink driver floods the debug log by a message per one poll interval.
Avoid annoying messages, change their logging level to LOG_DEBUG_IO
Signed-off-by: Tomas Vanek <va...@fb...>
Change-Id: I84ea6aa9cdfd44b5985c5393519d1efb7de9530a
Reviewed-on: https://review.openocd.org/c/openocd/+/8116
Reviewed-by: zapb <de...@za...>
Tested-by: jenkins
diff --git a/src/jtag/drivers/jlink.c b/src/jtag/drivers/jlink.c
index 5743d8d6e..97dc351fd 100644
--- a/src/jtag/drivers/jlink.c
+++ b/src/jtag/drivers/jlink.c
@@ -2108,7 +2108,7 @@ static int jlink_swd_switch_seq(enum swd_special_seq seq)
switch (seq) {
case LINE_RESET:
- LOG_DEBUG("SWD line reset");
+ LOG_DEBUG_IO("SWD line reset");
s = swd_seq_line_reset;
s_len = swd_seq_line_reset_len;
break;
@@ -2157,7 +2157,7 @@ static int jlink_swd_run_queue(void)
int i;
int ret;
- LOG_DEBUG("Executing %d queued transactions", pending_scan_results_length);
+ LOG_DEBUG_IO("Executing %d queued transactions", pending_scan_results_length);
if (queued_retval != ERROR_OK) {
LOG_DEBUG("Skipping due to previous errors: %d", queued_retval);
-----------------------------------------------------------------------
Summary of changes:
src/jtag/drivers/jlink.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
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From: openocd-gerrit <ope...@us...> - 2024-01-28 14:20:17
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".
The branch, master has been updated
via 9659a9b5e28dc615dfb508d301fdd8fa426c191b (commit)
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- Log -----------------------------------------------------------------
commit 9659a9b5e28dc615dfb508d301fdd8fa426c191b
Author: Antonio Borneo <bor...@gm...>
Date: Sun Jan 14 17:51:41 2024 +0100
target/esirisc: free memory at OpenOCD exit
The target esirisc does not free the allocated memory resources,
causing memory leaks at OpenOCD exit.
Add esirisc_free_reg_cache() and esirisc_deinit_target() and use
them to free all the allocated resources.
Change-Id: I17b8ebff54906fa25a37f2d96c01d010a98cffbd
Signed-off-by: Antonio Borneo <bor...@gm...>
Reviewed-on: https://review.openocd.org/c/openocd/+/8094
Tested-by: jenkins
Reviewed-by: Steven Stallion <sst...@gm...>
diff --git a/src/target/esirisc.c b/src/target/esirisc.c
index c9ac1d606..0f76b5982 100644
--- a/src/target/esirisc.c
+++ b/src/target/esirisc.c
@@ -1486,6 +1486,32 @@ static struct reg_cache *esirisc_build_reg_cache(struct target *target)
return cache;
}
+static void esirisc_free_reg_cache(struct target *target)
+{
+ struct esirisc_common *esirisc = target_to_esirisc(target);
+ struct reg_cache *cache = esirisc->reg_cache;
+ struct reg *reg_list = cache->reg_list;
+
+ for (int i = 0; i < esirisc->num_regs; ++i) {
+ struct reg *reg = reg_list + esirisc_regs[i].number;
+
+ free(reg->arch_info);
+ free(reg->value);
+ free(reg->reg_data_type);
+ }
+
+ for (size_t i = 0; i < ARRAY_SIZE(esirisc_csrs); ++i) {
+ struct reg *reg = reg_list + esirisc_csrs[i].number;
+
+ free(reg->arch_info);
+ free(reg->value);
+ free(reg->reg_data_type);
+ }
+
+ free(reg_list);
+ free(cache);
+}
+
static int esirisc_identify(struct target *target)
{
struct esirisc_common *esirisc = target_to_esirisc(target);
@@ -1584,6 +1610,19 @@ static int esirisc_init_target(struct command_context *cmd_ctx, struct target *t
return ERROR_OK;
}
+static void esirisc_deinit_target(struct target *target)
+{
+ struct esirisc_common *esirisc = target_to_esirisc(target);
+
+ if (!target_was_examined(target))
+ return;
+
+ esirisc_free_reg_cache(target);
+
+ free(esirisc->gdb_arch);
+ free(esirisc);
+}
+
static int esirisc_examine(struct target *target)
{
struct esirisc_common *esirisc = target_to_esirisc(target);
@@ -1822,5 +1861,6 @@ struct target_type esirisc_target = {
.target_create = esirisc_target_create,
.init_target = esirisc_init_target,
+ .deinit_target = esirisc_deinit_target,
.examine = esirisc_examine,
};
-----------------------------------------------------------------------
Summary of changes:
src/target/esirisc.c | 40 ++++++++++++++++++++++++++++++++++++++++
1 file changed, 40 insertions(+)
hooks/post-receive
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From: openocd-gerrit <ope...@us...> - 2024-01-28 14:19:28
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".
The branch, master has been updated
via 1b0ffa97ea90c09e96b068450644e462102c10ae (commit)
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- Log -----------------------------------------------------------------
commit 1b0ffa97ea90c09e96b068450644e462102c10ae
Author: Evgeniy Naydanov <evg...@sy...>
Date: Fri Jan 12 16:29:32 2024 +0300
target: get_gdb_arch() accepts target via const pointer
The function in question does not need to change target state. It is a
target-type-dependant function, however, IMHO, it is safe to assume that
any target type would not need to change type-independant state of a
target to figure out the arch.
Change-Id: I607cb3aee6529cd5a97bc1200a0226cf6ef43caf
Signed-off-by: Evgeniy Naydanov <evg...@sy...>
Reviewed-on: https://review.openocd.org/c/openocd/+/8093
Tested-by: jenkins
Reviewed-by: Jan Matyas <jan...@co...>
Reviewed-by: Antonio Borneo <bor...@gm...>
diff --git a/src/target/arm.h b/src/target/arm.h
index d5053afb8..486666b5c 100644
--- a/src/target/arm.h
+++ b/src/target/arm.h
@@ -257,7 +257,7 @@ struct arm {
};
/** Convert target handle to generic ARM target state handle. */
-static inline struct arm *target_to_arm(struct target *target)
+static inline struct arm *target_to_arm(const struct target *target)
{
assert(target);
return target->arch_info;
@@ -293,11 +293,11 @@ extern const struct command_registration arm_command_handlers[];
extern const struct command_registration arm_all_profiles_command_handlers[];
int arm_arch_state(struct target *target);
-const char *arm_get_gdb_arch(struct target *target);
+const char *arm_get_gdb_arch(const struct target *target);
int arm_get_gdb_reg_list(struct target *target,
struct reg **reg_list[], int *reg_list_size,
enum target_register_class reg_class);
-const char *armv8_get_gdb_arch(struct target *target);
+const char *armv8_get_gdb_arch(const struct target *target);
int armv8_get_gdb_reg_list(struct target *target,
struct reg **reg_list[], int *reg_list_size,
enum target_register_class reg_class);
diff --git a/src/target/armv4_5.c b/src/target/armv4_5.c
index 7debb9498..1886d5e1f 100644
--- a/src/target/armv4_5.c
+++ b/src/target/armv4_5.c
@@ -1264,7 +1264,7 @@ const struct command_registration arm_command_handlers[] = {
* same way as a gdb for arm. This can be changed later on. User can still
* set the specific architecture variant with the gdb command.
*/
-const char *arm_get_gdb_arch(struct target *target)
+const char *arm_get_gdb_arch(const struct target *target)
{
return "arm";
}
diff --git a/src/target/armv8.c b/src/target/armv8.c
index daf1ffca3..bf582ff80 100644
--- a/src/target/armv8.c
+++ b/src/target/armv8.c
@@ -1865,7 +1865,7 @@ const struct command_registration armv8_command_handlers[] = {
COMMAND_REGISTRATION_DONE
};
-const char *armv8_get_gdb_arch(struct target *target)
+const char *armv8_get_gdb_arch(const struct target *target)
{
struct arm *arm = target_to_arm(target);
return arm->core_state == ARM_STATE_AARCH64 ? "aarch64" : "arm";
diff --git a/src/target/esirisc.c b/src/target/esirisc.c
index 561edb255..c9ac1d606 100644
--- a/src/target/esirisc.c
+++ b/src/target/esirisc.c
@@ -1248,7 +1248,7 @@ static int esirisc_arch_state(struct target *target)
return ERROR_OK;
}
-static const char *esirisc_get_gdb_arch(struct target *target)
+static const char *esirisc_get_gdb_arch(const struct target *target)
{
struct esirisc_common *esirisc = target_to_esirisc(target);
diff --git a/src/target/esirisc.h b/src/target/esirisc.h
index 7496b1eda..6f8cd1472 100644
--- a/src/target/esirisc.h
+++ b/src/target/esirisc.h
@@ -106,7 +106,7 @@ struct esirisc_reg {
int (*write)(struct reg *reg);
};
-static inline struct esirisc_common *target_to_esirisc(struct target *target)
+static inline struct esirisc_common *target_to_esirisc(const struct target *target)
{
return (struct esirisc_common *)target->arch_info;
}
diff --git a/src/target/mem_ap.c b/src/target/mem_ap.c
index 50dc91c7b..5c81e3a75 100644
--- a/src/target/mem_ap.c
+++ b/src/target/mem_ap.c
@@ -182,7 +182,7 @@ static struct reg_arch_type mem_ap_reg_arch_type = {
.set = mem_ap_reg_set,
};
-static const char *mem_ap_get_gdb_arch(struct target *target)
+static const char *mem_ap_get_gdb_arch(const struct target *target)
{
return "arm";
}
diff --git a/src/target/riscv/riscv.c b/src/target/riscv/riscv.c
index cb8d04f20..d895ca372 100644
--- a/src/target/riscv/riscv.c
+++ b/src/target/riscv/riscv.c
@@ -1744,7 +1744,7 @@ static int riscv_write_memory(struct target *target, target_addr_t address,
return tt->write_memory(target, address, size, count, buffer);
}
-static const char *riscv_get_gdb_arch(struct target *target)
+static const char *riscv_get_gdb_arch(const struct target *target)
{
switch (riscv_xlen(target)) {
case 32:
diff --git a/src/target/stm8.c b/src/target/stm8.c
index ad4a45298..227101b6f 100644
--- a/src/target/stm8.c
+++ b/src/target/stm8.c
@@ -1158,7 +1158,7 @@ static int stm8_write_core_reg(struct target *target, unsigned int num)
return ERROR_OK;
}
-static const char *stm8_get_gdb_arch(struct target *target)
+static const char *stm8_get_gdb_arch(const struct target *target)
{
return "stm8";
}
diff --git a/src/target/target.c b/src/target/target.c
index a411270e2..45698a66c 100644
--- a/src/target/target.c
+++ b/src/target/target.c
@@ -1358,7 +1358,7 @@ int target_hit_watchpoint(struct target *target,
return target->type->hit_watchpoint(target, hit_watchpoint);
}
-const char *target_get_gdb_arch(struct target *target)
+const char *target_get_gdb_arch(const struct target *target)
{
if (!target->type->get_gdb_arch)
return NULL;
diff --git a/src/target/target.h b/src/target/target.h
index bd01f5eb6..1713448ce 100644
--- a/src/target/target.h
+++ b/src/target/target.h
@@ -501,7 +501,7 @@ int target_hit_watchpoint(struct target *target,
*
* This routine is a wrapper for target->type->get_gdb_arch.
*/
-const char *target_get_gdb_arch(struct target *target);
+const char *target_get_gdb_arch(const struct target *target);
/**
* Obtain the registers for GDB.
diff --git a/src/target/target_type.h b/src/target/target_type.h
index 678ce0f46..bc42c2d16 100644
--- a/src/target/target_type.h
+++ b/src/target/target_type.h
@@ -83,7 +83,7 @@ struct target_type {
* if dynamic allocation is used for this value, it must be managed by
* the target, ideally by caching the result for subsequent calls.
*/
- const char *(*get_gdb_arch)(struct target *target);
+ const char *(*get_gdb_arch)(const struct target *target);
/**
* Target register access for GDB. Do @b not call this function
diff --git a/src/target/xtensa/xtensa.c b/src/target/xtensa/xtensa.c
index b516c17ab..fb7748aa2 100644
--- a/src/target/xtensa/xtensa.c
+++ b/src/target/xtensa/xtensa.c
@@ -3442,7 +3442,7 @@ void xtensa_target_deinit(struct target *target)
free(xtensa->core_config);
}
-const char *xtensa_get_gdb_arch(struct target *target)
+const char *xtensa_get_gdb_arch(const struct target *target)
{
return "xtensa";
}
diff --git a/src/target/xtensa/xtensa.h b/src/target/xtensa/xtensa.h
index f799208f0..a220021a6 100644
--- a/src/target/xtensa/xtensa.h
+++ b/src/target/xtensa/xtensa.h
@@ -422,7 +422,7 @@ int xtensa_run_algorithm(struct target *target,
target_addr_t entry_point, target_addr_t exit_point,
unsigned int timeout_ms, void *arch_info);
void xtensa_set_permissive_mode(struct target *target, bool state);
-const char *xtensa_get_gdb_arch(struct target *target);
+const char *xtensa_get_gdb_arch(const struct target *target);
int xtensa_gdb_query_custom(struct target *target, const char *packet, char **response_p);
COMMAND_HELPER(xtensa_cmd_xtdef_do, struct xtensa *xtensa);
-----------------------------------------------------------------------
Summary of changes:
src/target/arm.h | 6 +++---
src/target/armv4_5.c | 2 +-
src/target/armv8.c | 2 +-
src/target/esirisc.c | 2 +-
src/target/esirisc.h | 2 +-
src/target/mem_ap.c | 2 +-
src/target/riscv/riscv.c | 2 +-
src/target/stm8.c | 2 +-
src/target/target.c | 2 +-
src/target/target.h | 2 +-
src/target/target_type.h | 2 +-
src/target/xtensa/xtensa.c | 2 +-
src/target/xtensa/xtensa.h | 2 +-
13 files changed, 15 insertions(+), 15 deletions(-)
hooks/post-receive
--
Main OpenOCD repository
|
|
From: openocd-gerrit <ope...@us...> - 2024-01-28 14:19:02
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".
The branch, master has been updated
via 67675323e1ea09b5d1a4250bf58163103c85b844 (commit)
from 3d3f82392045384e4cfe81bf19140a60312a47e8 (commit)
Those revisions listed above that are new to this repository have
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revisions in full, below.
- Log -----------------------------------------------------------------
commit 67675323e1ea09b5d1a4250bf58163103c85b844
Author: Evgeniy Naydanov <evg...@sy...>
Date: Thu Jan 11 14:02:28 2024 +0300
target: pass target to observers via const pointer
There are quite a lot of "getters" in target interface.
They do not change target structure, nevertheless the structure is
passed to these functions via a plain pointer.
The intention is to clarify the purpouse of these functions by passing
the `target` structure as a pointer to constant data.
Change-Id: Ida4a798da94938753b86a293a308d93b091d1bf3
Signed-off-by: Evgeniy Naydanov <evg...@sy...>
Reviewed-on: https://review.openocd.org/c/openocd/+/8092
Tested-by: jenkins
Reviewed-by: Antonio Borneo <bor...@gm...>
diff --git a/src/target/target.c b/src/target/target.c
index 920511e96..a411270e2 100644
--- a/src/target/target.c
+++ b/src/target/target.c
@@ -244,7 +244,7 @@ static const struct nvp nvp_reset_modes[] = {
{ .name = NULL, .value = -1 },
};
-const char *debug_reason_name(struct target *t)
+const char *debug_reason_name(const struct target *t)
{
const char *cp;
@@ -257,7 +257,7 @@ const char *debug_reason_name(struct target *t)
return cp;
}
-const char *target_state_name(struct target *t)
+const char *target_state_name(const struct target *t)
{
const char *cp;
cp = nvp_value2name(nvp_target_state, t->state)->name;
@@ -733,7 +733,7 @@ int target_examine(void)
return retval;
}
-const char *target_type_name(struct target *target)
+const char *target_type_name(const struct target *target)
{
return target->type->name;
}
@@ -1398,7 +1398,7 @@ int target_get_gdb_reg_list_noread(struct target *target,
return target_get_gdb_reg_list(target, reg_list, reg_list_size, reg_class);
}
-bool target_supports_gdb_connection(struct target *target)
+bool target_supports_gdb_connection(const struct target *target)
{
/*
* exclude all the targets that don't provide get_gdb_reg_list
@@ -4851,7 +4851,7 @@ static int target_jim_set_reg(Jim_Interp *interp, int argc,
/**
* Returns true only if the target has a handler for the specified event.
*/
-bool target_has_event_action(struct target *target, enum target_event event)
+bool target_has_event_action(const struct target *target, enum target_event event)
{
struct target_event_action *teap;
diff --git a/src/target/target.h b/src/target/target.h
index f69ee77ac..bd01f5eb6 100644
--- a/src/target/target.h
+++ b/src/target/target.h
@@ -222,19 +222,19 @@ struct gdb_fileio_info {
};
/** Returns a description of the endianness for the specified target. */
-static inline const char *target_endianness(struct target *target)
+static inline const char *target_endianness(const struct target *target)
{
return (target->endianness == TARGET_ENDIAN_UNKNOWN) ? "unknown" :
(target->endianness == TARGET_BIG_ENDIAN) ? "big endian" : "little endian";
}
/** Returns the instance-specific name of the specified target. */
-static inline const char *target_name(struct target *target)
+static inline const char *target_name(const struct target *target)
{
return target->cmd_name;
}
-const char *debug_reason_name(struct target *t);
+const char *debug_reason_name(const struct target *t);
enum target_event {
@@ -301,7 +301,7 @@ struct target_event_action {
struct target_event_action *next;
};
-bool target_has_event_action(struct target *target, enum target_event event);
+bool target_has_event_action(const struct target *target, enum target_event event);
struct target_event_callback {
int (*callback)(struct target *target, enum target_event event, void *priv);
@@ -421,7 +421,7 @@ struct target *get_target(const char *id);
* This routine is a wrapper for the target->type->name field.
* Note that this is not an instance-specific name for his target.
*/
-const char *target_type_name(struct target *target);
+const char *target_type_name(const struct target *target);
/**
* Examine the specified @a target, letting it perform any
@@ -432,7 +432,7 @@ const char *target_type_name(struct target *target);
int target_examine_one(struct target *target);
/** @returns @c true if target_set_examined() has been called. */
-static inline bool target_was_examined(struct target *target)
+static inline bool target_was_examined(const struct target *target)
{
return target->examined;
}
@@ -527,7 +527,7 @@ int target_get_gdb_reg_list_noread(struct target *target,
*
* Some target do not implement the necessary code required by GDB.
*/
-bool target_supports_gdb_connection(struct target *target);
+bool target_supports_gdb_connection(const struct target *target);
/**
* Step the target.
@@ -694,7 +694,7 @@ unsigned target_address_bits(struct target *target);
unsigned int target_data_bits(struct target *target);
/** Return the *name* of this targets current state */
-const char *target_state_name(struct target *target);
+const char *target_state_name(const struct target *target);
/** Return the *name* of a target event enumeration value */
const char *target_event_name(enum target_event event);
-----------------------------------------------------------------------
Summary of changes:
src/target/target.c | 10 +++++-----
src/target/target.h | 16 ++++++++--------
2 files changed, 13 insertions(+), 13 deletions(-)
hooks/post-receive
--
Main OpenOCD repository
|
|
From: openocd-gerrit <ope...@us...> - 2024-01-28 14:18:11
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".
The branch, master has been updated
via 3d3f82392045384e4cfe81bf19140a60312a47e8 (commit)
from 151b743714382120dbe0dee0e0eeb75826ef5b3a (commit)
Those revisions listed above that are new to this repository have
not appeared on any other notification email; so we list those
revisions in full, below.
- Log -----------------------------------------------------------------
commit 3d3f82392045384e4cfe81bf19140a60312a47e8
Author: Ian Thompson <ia...@ca...>
Date: Thu Jan 18 16:10:26 2024 -0800
target/xtensa: add dual-core support
- Example for configuring multiple non-SMP
Xtensa cores e.g. for heterogeneous debug
- JTAG only at this time; DAP out of scope
- Dual-Xtensa Palladium example via VDebug
- Update Xtensa core config examples
Signed-off-by: Ian Thompson <ia...@ca...>
Change-Id: I6d2b3d13fa8075416dcd383cf256a3e8582ee1c1
Reviewed-on: https://review.openocd.org/c/openocd/+/8078
Tested-by: jenkins
Reviewed-by: Jacek Wuwer <jac...@gm...>
Reviewed-by: Antonio Borneo <bor...@gm...>
diff --git a/tcl/board/xtensa-palladium-vdebug-dual.cfg b/tcl/board/xtensa-palladium-vdebug-dual.cfg
new file mode 100644
index 000000000..447bc1fa0
--- /dev/null
+++ b/tcl/board/xtensa-palladium-vdebug-dual.cfg
@@ -0,0 +1,33 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+# Cadence virtual debug interface
+# for Palladium emulation systems
+#
+
+source [find interface/vdebug.cfg]
+
+# vdebug select JTAG transport
+transport select jtag
+
+# JTAG reset config, frequency and reset delay
+reset_config trst_and_srst
+adapter speed 50000
+adapter srst delay 5
+
+# Future improvement: Enable backdoor memory access
+# set _MEMSTART 0x00000000
+# set _MEMSIZE 0x100000
+
+# BFM hierarchical path and input clk period
+vdebug bfm_path Testbench.VJTAG 10ns
+
+# DMA Memories to access backdoor (up to 4)
+# vdebug mem_path tbench.u_mcu.u_sys.u_itcm_ram.Mem $_MEMSTART $_MEMSIZE
+
+# Configure dual-core TAP chain
+set XTENSA_NUM_CORES 2
+
+# Create Xtensa target first
+source [find target/xtensa.cfg]
+
+# Configure Xtensa core parameters next
+# Generate [xtensa-core-XXX.cfg] via "xt-gdb --dump-oocd-config"
diff --git a/tcl/board/xtensa-palladium-vdebug.cfg b/tcl/board/xtensa-palladium-vdebug.cfg
index d4a700e36..f14d92da8 100644
--- a/tcl/board/xtensa-palladium-vdebug.cfg
+++ b/tcl/board/xtensa-palladium-vdebug.cfg
@@ -13,4 +13,18 @@ reset_config trst_and_srst
adapter speed 50000
adapter srst delay 5
-source [find target/vd_xtensa_jtag.cfg]
+# Future improvement: Enable backdoor memory access
+# set _MEMSTART 0x00000000
+# set _MEMSIZE 0x100000
+
+# BFM hierarchical path and input clk period
+vdebug bfm_path Testbench.VJTAG 10ns
+
+# DMA Memories to access backdoor (up to 4)
+# vdebug mem_path tbench.u_mcu.u_sys.u_itcm_ram.Mem $_MEMSTART $_MEMSIZE
+
+# Create Xtensa target first
+source [find target/xtensa.cfg]
+
+# Configure Xtensa core parameters next
+# Generate [xtensa-core-XXX.cfg] via "xt-gdb --dump-oocd-config"
diff --git a/tcl/target/xtensa-core-nxp_rt600.cfg b/tcl/target/xtensa-core-nxp_rt600.cfg
index abd961e4f..ca7fd6848 100644
--- a/tcl/target/xtensa-core-nxp_rt600.cfg
+++ b/tcl/target/xtensa-core-nxp_rt600.cfg
@@ -2,246 +2,254 @@
# OpenOCD configuration file for Xtensa HiFi DSP in NXP RT600 target
+# Core instance default definition
+if { [info exists XTNAME] } {
+ set _XTNAME $XTNAME
+} else {
+ set _XTNAME xtensa.cpu
+}
+
+
# Core definition and ABI
-xtensa xtdef LX
-xtensa xtopt arnum 32
-xtensa xtopt windowed 1
+$_XTNAME xtensa xtdef LX
+$_XTNAME xtensa xtopt arnum 32
+$_XTNAME xtensa xtopt windowed 1
# Exception/Interrupt Options
-xtensa xtopt exceptions 1
-xtensa xtopt hipriints 1
-xtensa xtopt intlevels 4
-xtensa xtopt excmlevel 2
+$_XTNAME xtensa xtopt exceptions 1
+$_XTNAME xtensa xtopt hipriints 1
+$_XTNAME xtensa xtopt intlevels 4
+$_XTNAME xtensa xtopt excmlevel 2
# Cache Options
-xtensa xtmem icache 256 32768 4
-xtensa xtmem dcache 256 65536 4 1
+$_XTNAME xtensa xtmem icache 256 32768 4
+$_XTNAME xtensa xtmem dcache 256 65536 4 1
# Memory Options
-xtensa xtmem iram 0x24020000 65536
-xtensa xtmem dram 0x24000000 65536
-xtensa xtmem sram 0x00000000 603979776
+$_XTNAME xtensa xtmem iram 0x24020000 65536
+$_XTNAME xtensa xtmem dram 0x24000000 65536
+$_XTNAME xtensa xtmem sram 0x00000000 603979776
# Memory Protection/Translation Options
# Debug Options
-xtensa xtopt debuglevel 4
-xtensa xtopt ibreaknum 2
-xtensa xtopt dbreaknum 2
+$_XTNAME xtensa xtopt debuglevel 4
+$_XTNAME xtensa xtopt ibreaknum 2
+$_XTNAME xtensa xtopt dbreaknum 2
# Core Registers
-xtensa xtregs 208
-xtensa xtreg pc 0x0020
-xtensa xtreg ar0 0x0100
-xtensa xtreg ar1 0x0101
-xtensa xtreg ar2 0x0102
-xtensa xtreg ar3 0x0103
-xtensa xtreg ar4 0x0104
-xtensa xtreg ar5 0x0105
-xtensa xtreg ar6 0x0106
-xtensa xtreg ar7 0x0107
-xtensa xtreg ar8 0x0108
-xtensa xtreg ar9 0x0109
-xtensa xtreg ar10 0x010a
-xtensa xtreg ar11 0x010b
-xtensa xtreg ar12 0x010c
-xtensa xtreg ar13 0x010d
-xtensa xtreg ar14 0x010e
-xtensa xtreg ar15 0x010f
-xtensa xtreg ar16 0x0110
-xtensa xtreg ar17 0x0111
-xtensa xtreg ar18 0x0112
-xtensa xtreg ar19 0x0113
-xtensa xtreg ar20 0x0114
-xtensa xtreg ar21 0x0115
-xtensa xtreg ar22 0x0116
-xtensa xtreg ar23 0x0117
-xtensa xtreg ar24 0x0118
-xtensa xtreg ar25 0x0119
-xtensa xtreg ar26 0x011a
-xtensa xtreg ar27 0x011b
-xtensa xtreg ar28 0x011c
-xtensa xtreg ar29 0x011d
-xtensa xtreg ar30 0x011e
-xtensa xtreg ar31 0x011f
-xtensa xtreg lbeg 0x0200
-xtensa xtreg lend 0x0201
-xtensa xtreg lcount 0x0202
-xtensa xtreg sar 0x0203
-xtensa xtreg prefctl 0x0228
-xtensa xtreg windowbase 0x0248
-xtensa xtreg windowstart 0x0249
-xtensa xtreg configid0 0x02b0
-xtensa xtreg configid1 0x02d0
-xtensa xtreg ps 0x02e6
-xtensa xtreg threadptr 0x03e7
-xtensa xtreg br 0x0204
-xtensa xtreg scompare1 0x020c
-xtensa xtreg acclo 0x0210
-xtensa xtreg acchi 0x0211
-xtensa xtreg m0 0x0220
-xtensa xtreg m1 0x0221
-xtensa xtreg m2 0x0222
-xtensa xtreg m3 0x0223
-xtensa xtreg expstate 0x03e6
-xtensa xtreg f64r_lo 0x03ea
-xtensa xtreg f64r_hi 0x03eb
-xtensa xtreg f64s 0x03ec
-xtensa xtreg ae_ovf_sar 0x03f0
-xtensa xtreg ae_bithead 0x03f1
-xtensa xtreg ae_ts_fts_bu_bp 0x03f2
-xtensa xtreg ae_cw_sd_no 0x03f3
-xtensa xtreg ae_cbegin0 0x03f6
-xtensa xtreg ae_cend0 0x03f7
-xtensa xtreg ae_cbegin1 0x03f8
-xtensa xtreg ae_cend1 0x03f9
-xtensa xtreg aed0 0x1010
-xtensa xtreg aed1 0x1011
-xtensa xtreg aed2 0x1012
-xtensa xtreg aed3 0x1013
-xtensa xtreg aed4 0x1014
-xtensa xtreg aed5 0x1015
-xtensa xtreg aed6 0x1016
-xtensa xtreg aed7 0x1017
-xtensa xtreg aed8 0x1018
-xtensa xtreg aed9 0x1019
-xtensa xtreg aed10 0x101a
-xtensa xtreg aed11 0x101b
-xtensa xtreg aed12 0x101c
-xtensa xtreg aed13 0x101d
-xtensa xtreg aed14 0x101e
-xtensa xtreg aed15 0x101f
-xtensa xtreg u0 0x1020
-xtensa xtreg u1 0x1021
-xtensa xtreg u2 0x1022
-xtensa xtreg u3 0x1023
-xtensa xtreg aep0 0x1024
-xtensa xtreg aep1 0x1025
-xtensa xtreg aep2 0x1026
-xtensa xtreg aep3 0x1027
-xtensa xtreg fcr_fsr 0x1029
-xtensa xtreg mmid 0x0259
-xtensa xtreg ibreakenable 0x0260
-xtensa xtreg memctl 0x0261
-xtensa xtreg atomctl 0x0263
-xtensa xtreg ddr 0x0268
-xtensa xtreg ibreaka0 0x0280
-xtensa xtreg ibreaka1 0x0281
-xtensa xtreg dbreaka0 0x0290
-xtensa xtreg dbreaka1 0x0291
-xtensa xtreg dbreakc0 0x02a0
-xtensa xtreg dbreakc1 0x02a1
-xtensa xtreg epc1 0x02b1
-xtensa xtreg epc2 0x02b2
-xtensa xtreg epc3 0x02b3
-xtensa xtreg epc4 0x02b4
-xtensa xtreg epc5 0x02b5
-xtensa xtreg depc 0x02c0
-xtensa xtreg eps2 0x02c2
-xtensa xtreg eps3 0x02c3
-xtensa xtreg eps4 0x02c4
-xtensa xtreg eps5 0x02c5
-xtensa xtreg excsave1 0x02d1
-xtensa xtreg excsave2 0x02d2
-xtensa xtreg excsave3 0x02d3
-xtensa xtreg excsave4 0x02d4
-xtensa xtreg excsave5 0x02d5
-xtensa xtreg cpenable 0x02e0
-xtensa xtreg interrupt 0x02e2
-xtensa xtreg intset 0x02e2
-xtensa xtreg intclear 0x02e3
-xtensa xtreg intenable 0x02e4
-xtensa xtreg vecbase 0x02e7
-xtensa xtreg exccause 0x02e8
-xtensa xtreg debugcause 0x02e9
-xtensa xtreg ccount 0x02ea
-xtensa xtreg prid 0x02eb
-xtensa xtreg icount 0x02ec
-xtensa xtreg icountlevel 0x02ed
-xtensa xtreg excvaddr 0x02ee
-xtensa xtreg ccompare0 0x02f0
-xtensa xtreg ccompare1 0x02f1
-xtensa xtreg misc0 0x02f4
-xtensa xtreg misc1 0x02f5
-xtensa xtreg pwrctl 0x2024
-xtensa xtreg pwrstat 0x2025
-xtensa xtreg eristat 0x2026
-xtensa xtreg cs_itctrl 0x2027
-xtensa xtreg cs_claimset 0x2028
-xtensa xtreg cs_claimclr 0x2029
-xtensa xtreg cs_lockaccess 0x202a
-xtensa xtreg cs_lockstatus 0x202b
-xtensa xtreg cs_authstatus 0x202c
-xtensa xtreg pmg 0x203b
-xtensa xtreg pmpc 0x203c
-xtensa xtreg pm0 0x203d
-xtensa xtreg pm1 0x203e
-xtensa xtreg pmctrl0 0x203f
-xtensa xtreg pmctrl1 0x2040
-xtensa xtreg pmstat0 0x2041
-xtensa xtreg pmstat1 0x2042
-xtensa xtreg ocdid 0x2043
-xtensa xtreg ocd_dcrclr 0x2044
-xtensa xtreg ocd_dcrset 0x2045
-xtensa xtreg ocd_dsr 0x2046
-xtensa xtreg a0 0x0000
-xtensa xtreg a1 0x0001
-xtensa xtreg a2 0x0002
-xtensa xtreg a3 0x0003
-xtensa xtreg a4 0x0004
-xtensa xtreg a5 0x0005
-xtensa xtreg a6 0x0006
-xtensa xtreg a7 0x0007
-xtensa xtreg a8 0x0008
-xtensa xtreg a9 0x0009
-xtensa xtreg a10 0x000a
-xtensa xtreg a11 0x000b
-xtensa xtreg a12 0x000c
-xtensa xtreg a13 0x000d
-xtensa xtreg a14 0x000e
-xtensa xtreg a15 0x000f
-xtensa xtreg b0 0x0010
-xtensa xtreg b1 0x0011
-xtensa xtreg b2 0x0012
-xtensa xtreg b3 0x0013
-xtensa xtreg b4 0x0014
-xtensa xtreg b5 0x0015
-xtensa xtreg b6 0x0016
-xtensa xtreg b7 0x0017
-xtensa xtreg b8 0x0018
-xtensa xtreg b9 0x0019
-xtensa xtreg b10 0x001a
-xtensa xtreg b11 0x001b
-xtensa xtreg b12 0x001c
-xtensa xtreg b13 0x001d
-xtensa xtreg b14 0x001e
-xtensa xtreg b15 0x001f
-xtensa xtreg psintlevel 0x2006
-xtensa xtreg psum 0x2007
-xtensa xtreg pswoe 0x2008
-xtensa xtreg psexcm 0x2009
-xtensa xtreg pscallinc 0x200a
-xtensa xtreg psowb 0x200b
-xtensa xtreg acc 0x200c
-xtensa xtreg dbnum 0x2011
-xtensa xtreg ae_overflow 0x2014
-xtensa xtreg ae_sar 0x2015
-xtensa xtreg ae_cwrap 0x2016
-xtensa xtreg ae_bitptr 0x2017
-xtensa xtreg ae_bitsused 0x2018
-xtensa xtreg ae_tablesize 0x2019
-xtensa xtreg ae_first_ts 0x201a
-xtensa xtreg ae_nextoffset 0x201b
-xtensa xtreg ae_searchdone 0x201c
-xtensa xtreg roundmode 0x201d
-xtensa xtreg invalidflag 0x201e
-xtensa xtreg divzeroflag 0x201f
-xtensa xtreg overflowflag 0x2020
-xtensa xtreg underflowflag 0x2021
-xtensa xtreg inexactflag 0x2022
+$_XTNAME xtensa xtregs 208
+$_XTNAME xtensa xtreg pc 0x0020
+$_XTNAME xtensa xtreg ar0 0x0100
+$_XTNAME xtensa xtreg ar1 0x0101
+$_XTNAME xtensa xtreg ar2 0x0102
+$_XTNAME xtensa xtreg ar3 0x0103
+$_XTNAME xtensa xtreg ar4 0x0104
+$_XTNAME xtensa xtreg ar5 0x0105
+$_XTNAME xtensa xtreg ar6 0x0106
+$_XTNAME xtensa xtreg ar7 0x0107
+$_XTNAME xtensa xtreg ar8 0x0108
+$_XTNAME xtensa xtreg ar9 0x0109
+$_XTNAME xtensa xtreg ar10 0x010a
+$_XTNAME xtensa xtreg ar11 0x010b
+$_XTNAME xtensa xtreg ar12 0x010c
+$_XTNAME xtensa xtreg ar13 0x010d
+$_XTNAME xtensa xtreg ar14 0x010e
+$_XTNAME xtensa xtreg ar15 0x010f
+$_XTNAME xtensa xtreg ar16 0x0110
+$_XTNAME xtensa xtreg ar17 0x0111
+$_XTNAME xtensa xtreg ar18 0x0112
+$_XTNAME xtensa xtreg ar19 0x0113
+$_XTNAME xtensa xtreg ar20 0x0114
+$_XTNAME xtensa xtreg ar21 0x0115
+$_XTNAME xtensa xtreg ar22 0x0116
+$_XTNAME xtensa xtreg ar23 0x0117
+$_XTNAME xtensa xtreg ar24 0x0118
+$_XTNAME xtensa xtreg ar25 0x0119
+$_XTNAME xtensa xtreg ar26 0x011a
+$_XTNAME xtensa xtreg ar27 0x011b
+$_XTNAME xtensa xtreg ar28 0x011c
+$_XTNAME xtensa xtreg ar29 0x011d
+$_XTNAME xtensa xtreg ar30 0x011e
+$_XTNAME xtensa xtreg ar31 0x011f
+$_XTNAME xtensa xtreg lbeg 0x0200
+$_XTNAME xtensa xtreg lend 0x0201
+$_XTNAME xtensa xtreg lcount 0x0202
+$_XTNAME xtensa xtreg sar 0x0203
+$_XTNAME xtensa xtreg prefctl 0x0228
+$_XTNAME xtensa xtreg windowbase 0x0248
+$_XTNAME xtensa xtreg windowstart 0x0249
+$_XTNAME xtensa xtreg configid0 0x02b0
+$_XTNAME xtensa xtreg configid1 0x02d0
+$_XTNAME xtensa xtreg ps 0x02e6
+$_XTNAME xtensa xtreg threadptr 0x03e7
+$_XTNAME xtensa xtreg br 0x0204
+$_XTNAME xtensa xtreg scompare1 0x020c
+$_XTNAME xtensa xtreg acclo 0x0210
+$_XTNAME xtensa xtreg acchi 0x0211
+$_XTNAME xtensa xtreg m0 0x0220
+$_XTNAME xtensa xtreg m1 0x0221
+$_XTNAME xtensa xtreg m2 0x0222
+$_XTNAME xtensa xtreg m3 0x0223
+$_XTNAME xtensa xtreg expstate 0x03e6
+$_XTNAME xtensa xtreg f64r_lo 0x03ea
+$_XTNAME xtensa xtreg f64r_hi 0x03eb
+$_XTNAME xtensa xtreg f64s 0x03ec
+$_XTNAME xtensa xtreg ae_ovf_sar 0x03f0
+$_XTNAME xtensa xtreg ae_bithead 0x03f1
+$_XTNAME xtensa xtreg ae_ts_fts_bu_bp 0x03f2
+$_XTNAME xtensa xtreg ae_cw_sd_no 0x03f3
+$_XTNAME xtensa xtreg ae_cbegin0 0x03f6
+$_XTNAME xtensa xtreg ae_cend0 0x03f7
+$_XTNAME xtensa xtreg ae_cbegin1 0x03f8
+$_XTNAME xtensa xtreg ae_cend1 0x03f9
+$_XTNAME xtensa xtreg aed0 0x1010
+$_XTNAME xtensa xtreg aed1 0x1011
+$_XTNAME xtensa xtreg aed2 0x1012
+$_XTNAME xtensa xtreg aed3 0x1013
+$_XTNAME xtensa xtreg aed4 0x1014
+$_XTNAME xtensa xtreg aed5 0x1015
+$_XTNAME xtensa xtreg aed6 0x1016
+$_XTNAME xtensa xtreg aed7 0x1017
+$_XTNAME xtensa xtreg aed8 0x1018
+$_XTNAME xtensa xtreg aed9 0x1019
+$_XTNAME xtensa xtreg aed10 0x101a
+$_XTNAME xtensa xtreg aed11 0x101b
+$_XTNAME xtensa xtreg aed12 0x101c
+$_XTNAME xtensa xtreg aed13 0x101d
+$_XTNAME xtensa xtreg aed14 0x101e
+$_XTNAME xtensa xtreg aed15 0x101f
+$_XTNAME xtensa xtreg u0 0x1020
+$_XTNAME xtensa xtreg u1 0x1021
+$_XTNAME xtensa xtreg u2 0x1022
+$_XTNAME xtensa xtreg u3 0x1023
+$_XTNAME xtensa xtreg aep0 0x1024
+$_XTNAME xtensa xtreg aep1 0x1025
+$_XTNAME xtensa xtreg aep2 0x1026
+$_XTNAME xtensa xtreg aep3 0x1027
+$_XTNAME xtensa xtreg fcr_fsr 0x1029
+$_XTNAME xtensa xtreg mmid 0x0259
+$_XTNAME xtensa xtreg ibreakenable 0x0260
+$_XTNAME xtensa xtreg memctl 0x0261
+$_XTNAME xtensa xtreg atomctl 0x0263
+$_XTNAME xtensa xtreg ddr 0x0268
+$_XTNAME xtensa xtreg ibreaka0 0x0280
+$_XTNAME xtensa xtreg ibreaka1 0x0281
+$_XTNAME xtensa xtreg dbreaka0 0x0290
+$_XTNAME xtensa xtreg dbreaka1 0x0291
+$_XTNAME xtensa xtreg dbreakc0 0x02a0
+$_XTNAME xtensa xtreg dbreakc1 0x02a1
+$_XTNAME xtensa xtreg epc1 0x02b1
+$_XTNAME xtensa xtreg epc2 0x02b2
+$_XTNAME xtensa xtreg epc3 0x02b3
+$_XTNAME xtensa xtreg epc4 0x02b4
+$_XTNAME xtensa xtreg epc5 0x02b5
+$_XTNAME xtensa xtreg depc 0x02c0
+$_XTNAME xtensa xtreg eps2 0x02c2
+$_XTNAME xtensa xtreg eps3 0x02c3
+$_XTNAME xtensa xtreg eps4 0x02c4
+$_XTNAME xtensa xtreg eps5 0x02c5
+$_XTNAME xtensa xtreg excsave1 0x02d1
+$_XTNAME xtensa xtreg excsave2 0x02d2
+$_XTNAME xtensa xtreg excsave3 0x02d3
+$_XTNAME xtensa xtreg excsave4 0x02d4
+$_XTNAME xtensa xtreg excsave5 0x02d5
+$_XTNAME xtensa xtreg cpenable 0x02e0
+$_XTNAME xtensa xtreg interrupt 0x02e2
+$_XTNAME xtensa xtreg intset 0x02e2
+$_XTNAME xtensa xtreg intclear 0x02e3
+$_XTNAME xtensa xtreg intenable 0x02e4
+$_XTNAME xtensa xtreg vecbase 0x02e7
+$_XTNAME xtensa xtreg exccause 0x02e8
+$_XTNAME xtensa xtreg debugcause 0x02e9
+$_XTNAME xtensa xtreg ccount 0x02ea
+$_XTNAME xtensa xtreg prid 0x02eb
+$_XTNAME xtensa xtreg icount 0x02ec
+$_XTNAME xtensa xtreg icountlevel 0x02ed
+$_XTNAME xtensa xtreg excvaddr 0x02ee
+$_XTNAME xtensa xtreg ccompare0 0x02f0
+$_XTNAME xtensa xtreg ccompare1 0x02f1
+$_XTNAME xtensa xtreg misc0 0x02f4
+$_XTNAME xtensa xtreg misc1 0x02f5
+$_XTNAME xtensa xtreg pwrctl 0x2024
+$_XTNAME xtensa xtreg pwrstat 0x2025
+$_XTNAME xtensa xtreg eristat 0x2026
+$_XTNAME xtensa xtreg cs_itctrl 0x2027
+$_XTNAME xtensa xtreg cs_claimset 0x2028
+$_XTNAME xtensa xtreg cs_claimclr 0x2029
+$_XTNAME xtensa xtreg cs_lockaccess 0x202a
+$_XTNAME xtensa xtreg cs_lockstatus 0x202b
+$_XTNAME xtensa xtreg cs_authstatus 0x202c
+$_XTNAME xtensa xtreg pmg 0x203b
+$_XTNAME xtensa xtreg pmpc 0x203c
+$_XTNAME xtensa xtreg pm0 0x203d
+$_XTNAME xtensa xtreg pm1 0x203e
+$_XTNAME xtensa xtreg pmctrl0 0x203f
+$_XTNAME xtensa xtreg pmctrl1 0x2040
+$_XTNAME xtensa xtreg pmstat0 0x2041
+$_XTNAME xtensa xtreg pmstat1 0x2042
+$_XTNAME xtensa xtreg ocdid 0x2043
+$_XTNAME xtensa xtreg ocd_dcrclr 0x2044
+$_XTNAME xtensa xtreg ocd_dcrset 0x2045
+$_XTNAME xtensa xtreg ocd_dsr 0x2046
+$_XTNAME xtensa xtreg a0 0x0000
+$_XTNAME xtensa xtreg a1 0x0001
+$_XTNAME xtensa xtreg a2 0x0002
+$_XTNAME xtensa xtreg a3 0x0003
+$_XTNAME xtensa xtreg a4 0x0004
+$_XTNAME xtensa xtreg a5 0x0005
+$_XTNAME xtensa xtreg a6 0x0006
+$_XTNAME xtensa xtreg a7 0x0007
+$_XTNAME xtensa xtreg a8 0x0008
+$_XTNAME xtensa xtreg a9 0x0009
+$_XTNAME xtensa xtreg a10 0x000a
+$_XTNAME xtensa xtreg a11 0x000b
+$_XTNAME xtensa xtreg a12 0x000c
+$_XTNAME xtensa xtreg a13 0x000d
+$_XTNAME xtensa xtreg a14 0x000e
+$_XTNAME xtensa xtreg a15 0x000f
+$_XTNAME xtensa xtreg b0 0x0010
+$_XTNAME xtensa xtreg b1 0x0011
+$_XTNAME xtensa xtreg b2 0x0012
+$_XTNAME xtensa xtreg b3 0x0013
+$_XTNAME xtensa xtreg b4 0x0014
+$_XTNAME xtensa xtreg b5 0x0015
+$_XTNAME xtensa xtreg b6 0x0016
+$_XTNAME xtensa xtreg b7 0x0017
+$_XTNAME xtensa xtreg b8 0x0018
+$_XTNAME xtensa xtreg b9 0x0019
+$_XTNAME xtensa xtreg b10 0x001a
+$_XTNAME xtensa xtreg b11 0x001b
+$_XTNAME xtensa xtreg b12 0x001c
+$_XTNAME xtensa xtreg b13 0x001d
+$_XTNAME xtensa xtreg b14 0x001e
+$_XTNAME xtensa xtreg b15 0x001f
+$_XTNAME xtensa xtreg psintlevel 0x2006
+$_XTNAME xtensa xtreg psum 0x2007
+$_XTNAME xtensa xtreg pswoe 0x2008
+$_XTNAME xtensa xtreg psexcm 0x2009
+$_XTNAME xtensa xtreg pscallinc 0x200a
+$_XTNAME xtensa xtreg psowb 0x200b
+$_XTNAME xtensa xtreg acc 0x200c
+$_XTNAME xtensa xtreg dbnum 0x2011
+$_XTNAME xtensa xtreg ae_overflow 0x2014
+$_XTNAME xtensa xtreg ae_sar 0x2015
+$_XTNAME xtensa xtreg ae_cwrap 0x2016
+$_XTNAME xtensa xtreg ae_bitptr 0x2017
+$_XTNAME xtensa xtreg ae_bitsused 0x2018
+$_XTNAME xtensa xtreg ae_tablesize 0x2019
+$_XTNAME xtensa xtreg ae_first_ts 0x201a
+$_XTNAME xtensa xtreg ae_nextoffset 0x201b
+$_XTNAME xtensa xtreg ae_searchdone 0x201c
+$_XTNAME xtensa xtreg roundmode 0x201d
+$_XTNAME xtensa xtreg invalidflag 0x201e
+$_XTNAME xtensa xtreg divzeroflag 0x201f
+$_XTNAME xtensa xtreg overflowflag 0x2020
+$_XTNAME xtensa xtreg underflowflag 0x2021
+$_XTNAME xtensa xtreg inexactflag 0x2022
diff --git a/tcl/target/xtensa-core-xt8.cfg b/tcl/target/xtensa-core-xt8.cfg
index e544d7854..523dc74e1 100644
--- a/tcl/target/xtensa-core-xt8.cfg
+++ b/tcl/target/xtensa-core-xt8.cfg
@@ -1,166 +1,175 @@
# SPDX-License-Identifier: GPL-2.0-or-later
# OpenOCD configuration file for Xtensa xt8 target
+
+# Core instance default definition
+if { [info exists XTNAME] } {
+ set _XTNAME $XTNAME
+} else {
+ set _XTNAME xtensa
+}
+
+
# Core definition and ABI
-xtensa xtdef LX
-xtensa xtopt arnum 32
-xtensa xtopt windowed 1
+$_XTNAME xtensa xtdef LX
+$_XTNAME xtensa xtopt arnum 32
+$_XTNAME xtensa xtopt windowed 1
# Exception/Interrupt Options
-xtensa xtopt exceptions 1
-xtensa xtopt hipriints 1
-xtensa xtopt intlevels 3
-xtensa xtopt excmlevel 1
+$_XTNAME xtensa xtopt exceptions 1
+$_XTNAME xtensa xtopt hipriints 1
+$_XTNAME xtensa xtopt intlevels 3
+$_XTNAME xtensa xtopt excmlevel 1
# Cache Options
-xtensa xtmem icache 16 1024 1
-xtensa xtmem dcache 16 1024 1 1
+$_XTNAME xtensa xtmem icache 16 1024 1
+$_XTNAME xtensa xtmem dcache 16 1024 1 1
# Memory Options
-xtensa xtmem iram 0x40000000 1048576
-xtensa xtmem dram 0x3ff00000 262144
-xtensa xtmem srom 0x50000000 131072
-xtensa xtmem sram 0x60000000 4194304
+$_XTNAME xtensa xtmem iram 0x40000000 1048576
+$_XTNAME xtensa xtmem dram 0x3ff00000 262144
+$_XTNAME xtensa xtmem srom 0x50000000 131072
+$_XTNAME xtensa xtmem sram 0x60000000 4194304
# Memory Protection/Translation Options
# Debug Options
-xtensa xtopt debuglevel 3
-xtensa xtopt ibreaknum 2
-xtensa xtopt dbreaknum 2
+$_XTNAME xtensa xtopt debuglevel 3
+$_XTNAME xtensa xtopt ibreaknum 2
+$_XTNAME xtensa xtopt dbreaknum 2
# Core Registers
-xtensa xtregs 127
-xtensa xtreg a0 0x0000
-xtensa xtreg a1 0x0001
-xtensa xtreg a2 0x0002
-xtensa xtreg a3 0x0003
-xtensa xtreg a4 0x0004
-xtensa xtreg a5 0x0005
-xtensa xtreg a6 0x0006
-xtensa xtreg a7 0x0007
-xtensa xtreg a8 0x0008
-xtensa xtreg a9 0x0009
-xtensa xtreg a10 0x000a
-xtensa xtreg a11 0x000b
-xtensa xtreg a12 0x000c
-xtensa xtreg a13 0x000d
-xtensa xtreg a14 0x000e
-xtensa xtreg a15 0x000f
-xtensa xtreg pc 0x0020
-xtensa xtreg ar0 0x0100
-xtensa xtreg ar1 0x0101
-xtensa xtreg ar2 0x0102
-xtensa xtreg ar3 0x0103
-xtensa xtreg ar4 0x0104
-xtensa xtreg ar5 0x0105
-xtensa xtreg ar6 0x0106
-xtensa xtreg ar7 0x0107
-xtensa xtreg ar8 0x0108
-xtensa xtreg ar9 0x0109
-xtensa xtreg ar10 0x010a
-xtensa xtreg ar11 0x010b
-xtensa xtreg ar12 0x010c
-xtensa xtreg ar13 0x010d
-xtensa xtreg ar14 0x010e
-xtensa xtreg ar15 0x010f
-xtensa xtreg ar16 0x0110
-xtensa xtreg ar17 0x0111
-xtensa xtreg ar18 0x0112
-xtensa xtreg ar19 0x0113
-xtensa xtreg ar20 0x0114
-xtensa xtreg ar21 0x0115
-xtensa xtreg ar22 0x0116
-xtensa xtreg ar23 0x0117
-xtensa xtreg ar24 0x0118
-xtensa xtreg ar25 0x0119
-xtensa xtreg ar26 0x011a
-xtensa xtreg ar27 0x011b
-xtensa xtreg ar28 0x011c
-xtensa xtreg ar29 0x011d
-xtensa xtreg ar30 0x011e
-xtensa xtreg ar31 0x011f
-xtensa xtreg lbeg 0x0200
-xtensa xtreg lend 0x0201
-xtensa xtreg lcount 0x0202
-xtensa xtreg sar 0x0203
-xtensa xtreg windowbase 0x0248
-xtensa xtreg windowstart 0x0249
-xtensa xtreg configid0 0x02b0
-xtensa xtreg configid1 0x02d0
-xtensa xtreg ps 0x02e6
-xtensa xtreg expstate 0x03e6
-xtensa xtreg mmid 0x0259
-xtensa xtreg ibreakenable 0x0260
-xtensa xtreg ddr 0x0268
-xtensa xtreg ibreaka0 0x0280
-xtensa xtreg ibreaka1 0x0281
-xtensa xtreg dbreaka0 0x0290
-xtensa xtreg dbreaka1 0x0291
-xtensa xtreg dbreakc0 0x02a0
-xtensa xtreg dbreakc1 0x02a1
-xtensa xtreg epc1 0x02b1
-xtensa xtreg epc2 0x02b2
-xtensa xtreg epc3 0x02b3
-xtensa xtreg depc 0x02c0
-xtensa xtreg eps2 0x02c2
-xtensa xtreg eps3 0x02c3
-xtensa xtreg excsave1 0x02d1
-xtensa xtreg excsave2 0x02d2
-xtensa xtreg excsave3 0x02d3
-xtensa xtreg interrupt 0x02e2
-xtensa xtreg intset 0x02e2
-xtensa xtreg intclear 0x02e3
-xtensa xtreg intenable 0x02e4
-xtensa xtreg exccause 0x02e8
-xtensa xtreg debugcause 0x02e9
-xtensa xtreg ccount 0x02ea
-xtensa xtreg icount 0x02ec
-xtensa xtreg icountlevel 0x02ed
-xtensa xtreg excvaddr 0x02ee
-xtensa xtreg ccompare0 0x02f0
-xtensa xtreg ccompare1 0x02f1
-xtensa xtreg pwrctl 0x200f
-xtensa xtreg pwrstat 0x2010
-xtensa xtreg eristat 0x2011
-xtensa xtreg cs_itctrl 0x2012
-xtensa xtreg cs_claimset 0x2013
-xtensa xtreg cs_claimclr 0x2014
-xtensa xtreg cs_lockaccess 0x2015
-xtensa xtreg cs_lockstatus 0x2016
-xtensa xtreg cs_authstatus 0x2017
-xtensa xtreg fault_info 0x2026
-xtensa xtreg trax_id 0x2027
-xtensa xtreg trax_control 0x2028
-xtensa xtreg trax_status 0x2029
-xtensa xtreg trax_data 0x202a
-xtensa xtreg trax_address 0x202b
-xtensa xtreg trax_pctrigger 0x202c
-xtensa xtreg trax_pcmatch 0x202d
-xtensa xtreg trax_delay 0x202e
-xtensa xtreg trax_memstart 0x202f
-xtensa xtreg trax_memend 0x2030
-xtensa xtreg pmg 0x203e
-xtensa xtreg pmpc 0x203f
-xtensa xtreg pm0 0x2040
-xtensa xtreg pm1 0x2041
-xtensa xtreg pmctrl0 0x2042
-xtensa xtreg pmctrl1 0x2043
-xtensa xtreg pmstat0 0x2044
-xtensa xtreg pmstat1 0x2045
-xtensa xtreg ocdid 0x2046
-xtensa xtreg ocd_dcrclr 0x2047
-xtensa xtreg ocd_dcrset 0x2048
-xtensa xtreg ocd_dsr 0x2049
-xtensa xtreg psintlevel 0x2003
-xtensa xtreg psum 0x2004
-xtensa xtreg pswoe 0x2005
-xtensa xtreg psexcm 0x2006
-xtensa xtreg pscallinc 0x2007
-xtensa xtreg psowb 0x2008
+$_XTNAME xtensa xtregs 127
+$_XTNAME xtensa xtreg a0 0x0000
+$_XTNAME xtensa xtreg a1 0x0001
+$_XTNAME xtensa xtreg a2 0x0002
+$_XTNAME xtensa xtreg a3 0x0003
+$_XTNAME xtensa xtreg a4 0x0004
+$_XTNAME xtensa xtreg a5 0x0005
+$_XTNAME xtensa xtreg a6 0x0006
+$_XTNAME xtensa xtreg a7 0x0007
+$_XTNAME xtensa xtreg a8 0x0008
+$_XTNAME xtensa xtreg a9 0x0009
+$_XTNAME xtensa xtreg a10 0x000a
+$_XTNAME xtensa xtreg a11 0x000b
+$_XTNAME xtensa xtreg a12 0x000c
+$_XTNAME xtensa xtreg a13 0x000d
+$_XTNAME xtensa xtreg a14 0x000e
+$_XTNAME xtensa xtreg a15 0x000f
+$_XTNAME xtensa xtreg pc 0x0020
+$_XTNAME xtensa xtreg ar0 0x0100
+$_XTNAME xtensa xtreg ar1 0x0101
+$_XTNAME xtensa xtreg ar2 0x0102
+$_XTNAME xtensa xtreg ar3 0x0103
+$_XTNAME xtensa xtreg ar4 0x0104
+$_XTNAME xtensa xtreg ar5 0x0105
+$_XTNAME xtensa xtreg ar6 0x0106
+$_XTNAME xtensa xtreg ar7 0x0107
+$_XTNAME xtensa xtreg ar8 0x0108
+$_XTNAME xtensa xtreg ar9 0x0109
+$_XTNAME xtensa xtreg ar10 0x010a
+$_XTNAME xtensa xtreg ar11 0x010b
+$_XTNAME xtensa xtreg ar12 0x010c
+$_XTNAME xtensa xtreg ar13 0x010d
+$_XTNAME xtensa xtreg ar14 0x010e
+$_XTNAME xtensa xtreg ar15 0x010f
+$_XTNAME xtensa xtreg ar16 0x0110
+$_XTNAME xtensa xtreg ar17 0x0111
+$_XTNAME xtensa xtreg ar18 0x0112
+$_XTNAME xtensa xtreg ar19 0x0113
+$_XTNAME xtensa xtreg ar20 0x0114
+$_XTNAME xtensa xtreg ar21 0x0115
+$_XTNAME xtensa xtreg ar22 0x0116
+$_XTNAME xtensa xtreg ar23 0x0117
+$_XTNAME xtensa xtreg ar24 0x0118
+$_XTNAME xtensa xtreg ar25 0x0119
+$_XTNAME xtensa xtreg ar26 0x011a
+$_XTNAME xtensa xtreg ar27 0x011b
+$_XTNAME xtensa xtreg ar28 0x011c
+$_XTNAME xtensa xtreg ar29 0x011d
+$_XTNAME xtensa xtreg ar30 0x011e
+$_XTNAME xtensa xtreg ar31 0x011f
+$_XTNAME xtensa xtreg lbeg 0x0200
+$_XTNAME xtensa xtreg lend 0x0201
+$_XTNAME xtensa xtreg lcount 0x0202
+$_XTNAME xtensa xtreg sar 0x0203
+$_XTNAME xtensa xtreg windowbase 0x0248
+$_XTNAME xtensa xtreg windowstart 0x0249
+$_XTNAME xtensa xtreg configid0 0x02b0
+$_XTNAME xtensa xtreg configid1 0x02d0
+$_XTNAME xtensa xtreg ps 0x02e6
+$_XTNAME xtensa xtreg expstate 0x03e6
+$_XTNAME xtensa xtreg mmid 0x0259
+$_XTNAME xtensa xtreg ibreakenable 0x0260
+$_XTNAME xtensa xtreg ddr 0x0268
+$_XTNAME xtensa xtreg ibreaka0 0x0280
+$_XTNAME xtensa xtreg ibreaka1 0x0281
+$_XTNAME xtensa xtreg dbreaka0 0x0290
+$_XTNAME xtensa xtreg dbreaka1 0x0291
+$_XTNAME xtensa xtreg dbreakc0 0x02a0
+$_XTNAME xtensa xtreg dbreakc1 0x02a1
+$_XTNAME xtensa xtreg epc1 0x02b1
+$_XTNAME xtensa xtreg epc2 0x02b2
+$_XTNAME xtensa xtreg epc3 0x02b3
+$_XTNAME xtensa xtreg depc 0x02c0
+$_XTNAME xtensa xtreg eps2 0x02c2
+$_XTNAME xtensa xtreg eps3 0x02c3
+$_XTNAME xtensa xtreg excsave1 0x02d1
+$_XTNAME xtensa xtreg excsave2 0x02d2
+$_XTNAME xtensa xtreg excsave3 0x02d3
+$_XTNAME xtensa xtreg interrupt 0x02e2
+$_XTNAME xtensa xtreg intset 0x02e2
+$_XTNAME xtensa xtreg intclear 0x02e3
+$_XTNAME xtensa xtreg intenable 0x02e4
+$_XTNAME xtensa xtreg exccause 0x02e8
+$_XTNAME xtensa xtreg debugcause 0x02e9
+$_XTNAME xtensa xtreg ccount 0x02ea
+$_XTNAME xtensa xtreg icount 0x02ec
+$_XTNAME xtensa xtreg icountlevel 0x02ed
+$_XTNAME xtensa xtreg excvaddr 0x02ee
+$_XTNAME xtensa xtreg ccompare0 0x02f0
+$_XTNAME xtensa xtreg ccompare1 0x02f1
+$_XTNAME xtensa xtreg pwrctl 0x200f
+$_XTNAME xtensa xtreg pwrstat 0x2010
+$_XTNAME xtensa xtreg eristat 0x2011
+$_XTNAME xtensa xtreg cs_itctrl 0x2012
+$_XTNAME xtensa xtreg cs_claimset 0x2013
+$_XTNAME xtensa xtreg cs_claimclr 0x2014
+$_XTNAME xtensa xtreg cs_lockaccess 0x2015
+$_XTNAME xtensa xtreg cs_lockstatus 0x2016
+$_XTNAME xtensa xtreg cs_authstatus 0x2017
+$_XTNAME xtensa xtreg fault_info 0x2026
+$_XTNAME xtensa xtreg trax_id 0x2027
+$_XTNAME xtensa xtreg trax_control 0x2028
+$_XTNAME xtensa xtreg trax_status 0x2029
+$_XTNAME xtensa xtreg trax_data 0x202a
+$_XTNAME xtensa xtreg trax_address 0x202b
+$_XTNAME xtensa xtreg trax_pctrigger 0x202c
+$_XTNAME xtensa xtreg trax_pcmatch 0x202d
+$_XTNAME xtensa xtreg trax_delay 0x202e
+$_XTNAME xtensa xtreg trax_memstart 0x202f
+$_XTNAME xtensa xtreg trax_memend 0x2030
+$_XTNAME xtensa xtreg pmg 0x203e
+$_XTNAME xtensa xtreg pmpc 0x203f
+$_XTNAME xtensa xtreg pm0 0x2040
+$_XTNAME xtensa xtreg pm1 0x2041
+$_XTNAME xtensa xtreg pmctrl0 0x2042
+$_XTNAME xtensa xtreg pmctrl1 0x2043
+$_XTNAME xtensa xtreg pmstat0 0x2044
+$_XTNAME xtensa xtreg pmstat1 0x2045
+$_XTNAME xtensa xtreg ocdid 0x2046
+$_XTNAME xtensa xtreg ocd_dcrclr 0x2047
+$_XTNAME xtensa xtreg ocd_dcrset 0x2048
+$_XTNAME xtensa xtreg ocd_dsr 0x2049
+$_XTNAME xtensa xtreg psintlevel 0x2003
+$_XTNAME xtensa xtreg psum 0x2004
+$_XTNAME xtensa xtreg pswoe 0x2005
+$_XTNAME xtensa xtreg psexcm 0x2006
+$_XTNAME xtensa xtreg pscallinc 0x2007
+$_XTNAME xtensa xtreg psowb 0x2008
diff --git a/tcl/target/xtensa.cfg b/tcl/target/xtensa.cfg
index 101e13546..561131d84 100644
--- a/tcl/target/xtensa.cfg
+++ b/tcl/target/xtensa.cfg
@@ -5,7 +5,7 @@
set xtensa_ids { 0x120034e5 0x120134e5
0x209034e5 0x209134e5 0x209234e5 0x209334e5 0x209434e5 0x209534e5 0x209634e5 0x209734e5
0x20a034e5 0x20a134e5 0x20a234e5 0x20a334e5 0x20a434e5 0x20a534e5 0x20a634e5 0x20a734e5 0x20a834e5
- 0x20b034e5 }
+ 0x20b034e5 0x20b33ac5 0x20b33ac7 }
set expected_xtensa_ids {}
foreach i $xtensa_ids {
lappend expected_xtensa_ids -expected-id $i
@@ -23,6 +23,12 @@ if { [info exists CPUTAPID] } {
set _CPUTAPARGLIST [join $expected_xtensa_ids]
}
+if { [info exists XTENSA_NUM_CORES] } {
+ set _XTENSA_NUM_CORES $XTENSA_NUM_CORES
+} else {
+ set _XTENSA_NUM_CORES 1
+}
+
set _TARGETNAME $_CHIPNAME
set _CPU0NAME cpu
set _TAPNAME $_CHIPNAME.$_CPU0NAME
@@ -40,12 +46,25 @@ if { [info exists XTENSA_DAP] } {
} else {
target create $_TARGETNAME xtensa -dap $_CHIPNAME.dap
}
-} else {
+} elseif { $_XTENSA_NUM_CORES > 1 } {
# JTAG direct (without DAP)
+ for {set i 0} {$i < $_XTENSA_NUM_CORES} {incr i} {
+ set _LCPUNAME $_CPU0NAME$i
+ set _LTAPNAME $_CHIPNAME.$_LCPUNAME
+ eval jtag newtap $_CHIPNAME $_LCPUNAME -irlen 5 $_CPUTAPARGLIST
+ target create $_LTAPNAME xtensa -chain-position $_LTAPNAME -coreid $i
+
+ $_LTAPNAME configure -event reset-assert-post { soft_reset_halt }
+ }
+} else {
+ # JTAG direct (without DAP) - for legacy xtensa-config-XXX.cfg format
eval jtag newtap $_CHIPNAME $_CPU0NAME -irlen 5 $_CPUTAPARGLIST
target create $_TARGETNAME xtensa -chain-position $_TAPNAME
}
-$_TARGETNAME configure -event reset-assert-post { soft_reset_halt }
+if { $_XTENSA_NUM_CORES == 1 } {
+ # DAP and single-core legacy JTAG
+ $_TARGETNAME configure -event reset-assert-post { soft_reset_halt }
+}
gdb_report_register_access_error enable
-----------------------------------------------------------------------
Summary of changes:
tcl/board/xtensa-palladium-vdebug-dual.cfg | 33 +++
tcl/board/xtensa-palladium-vdebug.cfg | 16 +-
tcl/target/xtensa-core-nxp_rt600.cfg | 456 +++++++++++++++--------------
tcl/target/xtensa-core-xt8.cfg | 297 ++++++++++---------
tcl/target/xtensa.cfg | 25 +-
5 files changed, 455 insertions(+), 372 deletions(-)
create mode 100644 tcl/board/xtensa-palladium-vdebug-dual.cfg
hooks/post-receive
--
Main OpenOCD repository
|
|
From: openocd-gerrit <ope...@us...> - 2024-01-21 21:32:12
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".
The branch, master has been updated
via 151b743714382120dbe0dee0e0eeb75826ef5b3a (commit)
from 80b970bd29093a1e3e3b5fdeacda4958721a5afd (commit)
Those revisions listed above that are new to this repository have
not appeared on any other notification email; so we list those
revisions in full, below.
- Log -----------------------------------------------------------------
commit 151b743714382120dbe0dee0e0eeb75826ef5b3a
Author: Jacek Wuwer <jac...@gm...>
Date: Tue Jan 9 14:57:29 2024 +0100
jtag/vdebug: add support for DAP6
This change implements the support for the ARM Debug Interface v6.
The DAP-level interface properly selects the DP Banks and AP address.
Sample ARM configuration DAP and JTAG scripts have been updated.
Change-Id: I7df87ef764bca587697c778810443649a7f46c2b
Signed-off-by: Jacek Wuwer <jac...@gm...>
Reviewed-on: https://review.openocd.org/c/openocd/+/8067
Tested-by: jenkins
Reviewed-by: Ian Thompson <ia...@ca...>
Reviewed-by: Antonio Borneo <bor...@gm...>
diff --git a/src/jtag/drivers/vdebug.c b/src/jtag/drivers/vdebug.c
index d51d248bf..6d9016e9c 100644
--- a/src/jtag/drivers/vdebug.c
+++ b/src/jtag/drivers/vdebug.c
@@ -53,7 +53,7 @@
#include "helper/log.h"
#include "helper/list.h"
-#define VD_VERSION 47
+#define VD_VERSION 48
#define VD_BUFFER_LEN 4024
#define VD_CHEADER_LEN 24
#define VD_SHEADER_LEN 16
@@ -66,7 +66,8 @@
* @brief List of transactor types
*/
enum {
- VD_BFM_JTDP = 0x0001, /* transactor DAP JTAG DP */
+ VD_BFM_TPIU = 0x0000, /* transactor trace TPIU */
+ VD_BFM_DAP6 = 0x0001, /* transactor DAP ADI V6 */
VD_BFM_SWDP = 0x0002, /* transactor DAP SWD DP */
VD_BFM_AHB = 0x0003, /* transactor AMBA AHB */
VD_BFM_APB = 0x0004, /* transactor AMBA APB */
@@ -467,14 +468,14 @@ static int vdebug_run_reg_queue(int hsock, struct vd_shm *pm, unsigned int count
for (unsigned int j = 0; j < num; j++)
memcpy(&data[j * awidth], &pm->rd8[(rwords + j) * awidth], awidth);
}
- LOG_DEBUG_IO("read %04x AS:%02x RG:%02x O:%05x @%03x D:%08x", le_to_h_u16(pm->wid) - count + req,
- aspace, addr, (vdc.trans_first << 14) | (vdc.trans_last << 15), waddr,
+ LOG_DEBUG("read %04x AS:%1x RG:%1x O:%05x @%03x D:%08x", le_to_h_u16(pm->wid) - count + req,
+ aspace, addr << 2, (vdc.trans_first << 14) | (vdc.trans_last << 15), waddr,
(num ? le_to_h_u32(&pm->rd8[rwords * 4]) : 0xdead));
rwords += num * wwidth;
waddr += sizeof(uint64_t) / 4; /* waddr past header */
} else {
- LOG_DEBUG_IO("write %04x AS:%02x RG:%02x O:%05x @%03x D:%08x", le_to_h_u16(pm->wid) - count + req,
- aspace, addr, (vdc.trans_first << 14) | (vdc.trans_last << 15), waddr,
+ LOG_DEBUG("write %04x AS:%1x RG:%1x O:%05x @%03x D:%08x", le_to_h_u16(pm->wid) - count + req,
+ aspace, addr << 2, (vdc.trans_first << 14) | (vdc.trans_last << 15), waddr,
le_to_h_u32(&pm->wd8[(waddr + num + 1) * 4]));
waddr += sizeof(uint64_t) / 4 + (num * wwidth * awidth + 3) / 4;
}
@@ -518,7 +519,7 @@ static int vdebug_open(int hsock, struct vd_shm *pm, const char *path,
rc = VD_ERR_VERSION;
} else {
pm->cmd = VD_CMD_CONNECT;
- pm->type = type; /* BFM type to connect to, here JTAG */
+ pm->type = type; /* BFM type to connect to */
h_u32_to_le(pm->rwdata, sig_mask | VD_SIG_BUF | (VD_SIG_BUF << 16));
h_u16_to_le(pm->wbytes, strlen(path) + 1);
h_u16_to_le(pm->rbytes, 12);
@@ -922,7 +923,7 @@ static int vdebug_reset(int trst, int srst)
static int vdebug_jtag_tms_seq(const uint8_t *tms, int num, uint8_t f_flush)
{
- LOG_INFO("tms len:%d tms:%x", num, *tms);
+ LOG_DEBUG_IO("tms len:%d tms:%x", num, *tms);
return vdebug_jtag_shift_tap(vdc.hsocket, pbuf, num, *tms, 0, NULL, 0, 0, NULL, f_flush);
}
@@ -930,7 +931,7 @@ static int vdebug_jtag_tms_seq(const uint8_t *tms, int num, uint8_t f_flush)
static int vdebug_jtag_path_move(struct pathmove_command *cmd, uint8_t f_flush)
{
uint8_t tms[DIV_ROUND_UP(cmd->num_states, 8)];
- LOG_INFO("path num states %d", cmd->num_states);
+ LOG_DEBUG_IO("path num states %d", cmd->num_states);
memset(tms, 0, DIV_ROUND_UP(cmd->num_states, 8));
@@ -950,7 +951,7 @@ static int vdebug_jtag_tlr(tap_state_t state, uint8_t f_flush)
tap_state_t cur = tap_get_state();
uint8_t tms_pre = tap_get_tms_path(cur, state);
uint8_t num_pre = tap_get_tms_path_len(cur, state);
- LOG_INFO("tlr from %x to %x", cur, state);
+ LOG_DEBUG_IO("tlr from %x to %x", cur, state);
if (cur != state) {
rc = vdebug_jtag_shift_tap(vdc.hsocket, pbuf, num_pre, tms_pre, 0, NULL, 0, 0, NULL, f_flush);
tap_set_state(state);
@@ -970,7 +971,7 @@ static int vdebug_jtag_scan(struct scan_command *cmd, uint8_t f_flush)
uint8_t tms_post = tap_get_tms_path(state, cmd->end_state);
uint8_t num_post = tap_get_tms_path_len(state, cmd->end_state);
int num_bits = jtag_scan_size(cmd);
- LOG_DEBUG("scan len:%d fields:%d ir/!dr:%d state cur:%x end:%x",
+ LOG_DEBUG_IO("scan len:%d fields:%d ir/!dr:%d state cur:%x end:%x",
num_bits, cmd->num_fields, cmd->ir_scan, cur, cmd->end_state);
for (int i = 0; i < cmd->num_fields; i++) {
uint8_t cur_num_pre = i == 0 ? num_pre : 0;
@@ -996,7 +997,7 @@ static int vdebug_jtag_runtest(int cycles, tap_state_t state, uint8_t f_flush)
tap_state_t cur = tap_get_state();
uint8_t tms_pre = tap_get_tms_path(cur, state);
uint8_t num_pre = tap_get_tms_path_len(cur, state);
- LOG_DEBUG("idle len:%d state cur:%x end:%x", cycles, cur, state);
+ LOG_DEBUG_IO("idle len:%d state cur:%x end:%x", cycles, cur, state);
int rc = vdebug_jtag_shift_tap(vdc.hsocket, pbuf, num_pre, tms_pre, cycles, NULL, 0, 0, NULL, f_flush);
if (cur != state)
tap_set_state(state);
@@ -1006,7 +1007,7 @@ static int vdebug_jtag_runtest(int cycles, tap_state_t state, uint8_t f_flush)
static int vdebug_jtag_stableclocks(int num, uint8_t f_flush)
{
- LOG_INFO("stab len:%d state cur:%x", num, tap_get_state());
+ LOG_DEBUG("stab len:%d state cur:%x", num, tap_get_state());
return vdebug_jtag_shift_tap(vdc.hsocket, pbuf, 0, 0, num, NULL, 0, 0, NULL, f_flush);
}
@@ -1081,6 +1082,41 @@ static int vdebug_jtag_execute_queue(void)
return rc;
}
+static int vdebug_dap_bankselect(struct adiv5_ap *ap, unsigned int reg)
+{
+ int rc = ERROR_OK;
+ uint64_t sel;
+
+ if (is_adiv6(ap->dap)) {
+ sel = ap->ap_num | (reg & 0x00000FF0);
+ if (sel != (ap->dap->select & ~0xfull)) {
+ sel |= ap->dap->select & DP_SELECT_DPBANK;
+ if (ap->dap->asize > 32)
+ sel |= (DP_SELECT1 >> 4) & DP_SELECT_DPBANK;
+ ap->dap->select = sel;
+ ap->dap->select_valid = true;
+ rc = vdebug_reg_write(vdc.hsocket, pbuf, DP_SELECT >> 2, (uint32_t)sel, VD_ASPACE_DP, 0);
+ if (rc == ERROR_OK) {
+ ap->dap->select_valid = true;
+ if (ap->dap->asize > 32)
+ rc = vdebug_reg_write(vdc.hsocket, pbuf, (DP_SELECT1 & DP_SELECT_DPBANK) >> 2,
+ (uint32_t)(sel >> 32), VD_ASPACE_DP, 0);
+ if (rc == ERROR_OK)
+ ap->dap->select1_valid = true;
+ }
+ }
+ } else { /* ADIv5 */
+ sel = (ap->ap_num << 24) | (reg & ADIV5_DP_SELECT_APBANK);
+ if (sel != ap->dap->select) {
+ ap->dap->select = sel;
+ rc = vdebug_reg_write(vdc.hsocket, pbuf, DP_SELECT >> 2, (uint32_t)sel, VD_ASPACE_DP, 0);
+ if (rc == ERROR_OK)
+ ap->dap->select_valid = true;
+ }
+ }
+ return rc;
+}
+
static int vdebug_dap_connect(struct adiv5_dap *dap)
{
return dap_dp_init(dap);
@@ -1093,20 +1129,29 @@ static int vdebug_dap_send_sequence(struct adiv5_dap *dap, enum swd_special_seq
static int vdebug_dap_queue_dp_read(struct adiv5_dap *dap, unsigned int reg, uint32_t *data)
{
+ if (reg != DP_SELECT && reg != DP_RDBUFF
+ && (!dap->select_valid || ((reg >> 4) & DP_SELECT_DPBANK) != (dap->select & DP_SELECT_DPBANK))) {
+ dap->select = (dap->select & ~DP_SELECT_DPBANK) | ((reg >> 4) & DP_SELECT_DPBANK);
+ vdebug_reg_write(vdc.hsocket, pbuf, DP_SELECT >> 2, dap->select, VD_ASPACE_DP, 0);
+ dap->select_valid = true;
+ }
return vdebug_reg_read(vdc.hsocket, pbuf, (reg & DP_SELECT_DPBANK) >> 2, data, VD_ASPACE_DP, 0);
}
static int vdebug_dap_queue_dp_write(struct adiv5_dap *dap, unsigned int reg, uint32_t data)
{
+ if (reg != DP_SELECT && reg != DP_RDBUFF
+ && (!dap->select_valid || ((reg >> 4) & DP_SELECT_DPBANK) != (dap->select & DP_SELECT_DPBANK))) {
+ dap->select = (dap->select & ~DP_SELECT_DPBANK) | ((reg >> 4) & DP_SELECT_DPBANK);
+ vdebug_reg_write(vdc.hsocket, pbuf, DP_SELECT >> 2, dap->select, VD_ASPACE_DP, 0);
+ dap->select_valid = true;
+ }
return vdebug_reg_write(vdc.hsocket, pbuf, (reg & DP_SELECT_DPBANK) >> 2, data, VD_ASPACE_DP, 0);
}
static int vdebug_dap_queue_ap_read(struct adiv5_ap *ap, unsigned int reg, uint32_t *data)
{
- if ((reg & ADIV5_DP_SELECT_APBANK) != ap->dap->select) {
- vdebug_reg_write(vdc.hsocket, pbuf, DP_SELECT >> 2, reg & ADIV5_DP_SELECT_APBANK, VD_ASPACE_DP, 0);
- ap->dap->select = reg & ADIV5_DP_SELECT_APBANK;
- }
+ vdebug_dap_bankselect(ap, reg);
vdebug_reg_read(vdc.hsocket, pbuf, (reg & DP_SELECT_DPBANK) >> 2, NULL, VD_ASPACE_AP, 0);
@@ -1115,11 +1160,7 @@ static int vdebug_dap_queue_ap_read(struct adiv5_ap *ap, unsigned int reg, uint3
static int vdebug_dap_queue_ap_write(struct adiv5_ap *ap, unsigned int reg, uint32_t data)
{
- if ((reg & ADIV5_DP_SELECT_APBANK) != ap->dap->select) {
- vdebug_reg_write(vdc.hsocket, pbuf, DP_SELECT >> 2, reg & ADIV5_DP_SELECT_APBANK, VD_ASPACE_DP, 0);
- ap->dap->select = reg & ADIV5_DP_SELECT_APBANK;
- }
-
+ vdebug_dap_bankselect(ap, reg);
return vdebug_reg_write(vdc.hsocket, pbuf, (reg & DP_SELECT_DPBANK) >> 2, data, VD_ASPACE_AP, 0);
}
@@ -1175,7 +1216,7 @@ COMMAND_HANDLER(vdebug_set_bfm)
break;
}
if (transport_is_dapdirect_swd())
- vdc.bfm_type = VD_BFM_SWDP;
+ vdc.bfm_type = strstr(vdc.bfm_path, "dap6") ? VD_BFM_DAP6 : VD_BFM_SWDP;
else
vdc.bfm_type = VD_BFM_JTAG;
LOG_DEBUG("bfm_path: %s clk_period %ups", vdc.bfm_path, vdc.bfm_period);
diff --git a/tcl/board/vd_a53x2_dap.cfg b/tcl/board/vd_a53x2_dap.cfg
index 4cf5594d3..bcf8b4409 100644
--- a/tcl/board/vd_a53x2_dap.cfg
+++ b/tcl/board/vd_a53x2_dap.cfg
@@ -4,10 +4,13 @@
source [find interface/vdebug.cfg]
-set _CORES 2
-set _CHIPNAME a53
-set _MEMSTART 0x00000000
-set _MEMSIZE 0x1000000
+set CORES 2
+set CHIPNAME a53
+set ACCESSPORT 0
+set MEMSTART 0x00000000
+set MEMSIZE 0x1000000
+set DBGBASE {0x80810000 0x80910000}
+set CTIBASE {0x80820000 0x80920000}
# vdebug select transport
transport select dapdirect_swd
@@ -19,11 +22,9 @@ adapter srst delay 5
# BFM hierarchical path and input clk period
vdebug bfm_path tbench.u_vd_swdp_bfm 10ns
-# DMA Memories to access backdoor (up to 4)
-vdebug mem_path tbench.u_memory.mem_array $_MEMSTART $_MEMSIZE
+# DMA Memories to access backdoor (up to 20)
+vdebug mem_path tbench.u_memory.mem_array $MEMSTART $MEMSIZE
-source [find target/swj-dp.tcl]
-
-swj_newdap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf
+swd newdap $CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf
source [find target/vd_aarch64.cfg]
diff --git a/tcl/board/vd_a53x2_jtag.cfg b/tcl/board/vd_a53x2_jtag.cfg
index a5e8d24e5..0c3eebd7a 100644
--- a/tcl/board/vd_a53x2_jtag.cfg
+++ b/tcl/board/vd_a53x2_jtag.cfg
@@ -4,11 +4,14 @@
source [find interface/vdebug.cfg]
-set _CORES 2
-set _CHIPNAME a53
-set _MEMSTART 0x00000000
-set _MEMSIZE 0x1000000
-set _CPUTAPID 0x5ba00477
+set CORES 2
+set CHIPNAME a53
+set ACCESSPORT 0
+set MEMSTART 0x00000000
+set MEMSIZE 0x1000000
+set DBGBASE {0x80810000 0x80910000}
+set CTIBASE {0x80820000 0x80920000}
+set CPUTAPID 0x5ba00477
# vdebug select transport
transport select jtag
@@ -21,11 +24,10 @@ adapter srst delay 5
# BFM hierarchical path and input clk period
vdebug bfm_path tbench.u_vd_jtag_bfm 10ns
-# DMA Memories to access backdoor (up to 4)
-vdebug mem_path tbench.u_memory.mem_array $_MEMSTART $_MEMSIZE
-
-jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
+# DMA Memories to access backdoor (up to 20)
+vdebug mem_path tbench.u_memory.mem_array $MEMSTART $MEMSIZE
+jtag newtap $CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $CPUTAPID
jtag arp_init-reset
source [find target/vd_aarch64.cfg]
diff --git a/tcl/board/vd_a75x4_dap.cfg b/tcl/board/vd_a75x4_dap.cfg
new file mode 100644
index 000000000..5c2a2efe8
--- /dev/null
+++ b/tcl/board/vd_a75x4_dap.cfg
@@ -0,0 +1,30 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+# Cadence virtual debug interface
+# Arm Cortex A53x2 through DAP
+
+source [find interface/vdebug.cfg]
+
+set CORES 4
+set CHIPNAME a75
+set ACCESSPORT 0x00040000
+set MEMSTART 0x00000000
+set MEMSIZE 0x1000000
+set DBGBASE {0x01010000 0x01110000 0x01210000 0x01310000}
+set CTIBASE {0x01020000 0x01120000 0x01220000 0x01320000}
+
+# vdebug select transport
+transport select dapdirect_swd
+
+# JTAG reset config, frequency and reset delay
+adapter speed 200000
+adapter srst delay 5
+
+# BFM hierarchical path and input clk period
+vdebug bfm_path tbench.u_vd_dap6_bfm 2250ps
+
+# DMA Memories to access backdoor (up to 20)
+#vdebug mem_path tbench.u_memory.mem_array $_MEMSTART $_MEMSIZE
+
+swd newdap $CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf
+
+source [find target/vd_aarch64.cfg]
diff --git a/tcl/board/vd_a75x4_jtag.cfg b/tcl/board/vd_a75x4_jtag.cfg
new file mode 100644
index 000000000..c94a71972
--- /dev/null
+++ b/tcl/board/vd_a75x4_jtag.cfg
@@ -0,0 +1,30 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+# Cadence virtual debug interface
+# Arm Cortex A53x2 through DAP
+
+source [find interface/vdebug.cfg]
+
+set CORES 4
+set CHIPNAME a75
+set ACCESSPORT 0x00040000
+set MEMSTART 0x00000000
+set MEMSIZE 0x1000000
+set DBGBASE {0x01010000 0x01110000 0x01210000 0x01310000}
+set CTIBASE {0x01020000 0x01120000 0x01220000 0x01320000}
+set CPUTAPID 0x4ba06477
+
+# vdebug select transport
+transport select jtag
+
+# JTAG reset config, frequency and reset delay
+reset_config trst_and_srst
+adapter speed 1500000
+adapter srst delay 5
+
+# BFM hierarchical path and input clk period
+vdebug bfm_path tbench.u_vd_jtag_bfm 333ps
+
+jtag newtap $CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $CPUTAPID
+jtag arp_init-reset
+
+source [find target/vd_aarch64.cfg]
diff --git a/tcl/board/vd_m4_dap.cfg b/tcl/board/vd_m4_dap.cfg
index 691b6235f..5d3605aa3 100644
--- a/tcl/board/vd_m4_dap.cfg
+++ b/tcl/board/vd_m4_dap.cfg
@@ -4,9 +4,9 @@
source [find interface/vdebug.cfg]
-set _CHIPNAME m4
-set _MEMSTART 0x00000000
-set _MEMSIZE 0x10000
+set CHIPNAME m4
+set MEMSTART 0x00000000
+set MEMSIZE 0x10000
# vdebug select transport
transport select dapdirect_swd
@@ -16,11 +16,9 @@ adapter srst delay 5
# BFM hierarchical path and input clk period
vdebug bfm_path tbench.u_vd_swdp_bfm 20ns
-# DMA Memories to access backdoor (up to 4)
-vdebug mem_path tbench.u_mcu.u_sys.u_rom.rom $_MEMSTART $_MEMSIZE
+# DMA Memories to access backdoor (up to 20)
+vdebug mem_path tbench.u_mcu.u_sys.u_rom.rom $MEMSTART $MEMSIZE
-source [find target/swj-dp.tcl]
-
-swj_newdap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf
+swd newdap $CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf
source [find target/vd_cortex_m.cfg]
diff --git a/tcl/board/vd_m4_jtag.cfg b/tcl/board/vd_m4_jtag.cfg
index 4c795ebfd..3b32e17be 100644
--- a/tcl/board/vd_m4_jtag.cfg
+++ b/tcl/board/vd_m4_jtag.cfg
@@ -4,10 +4,10 @@
source [find interface/vdebug.cfg]
-set _CHIPNAME m4
-set _MEMSTART 0x00000000
-set _MEMSIZE 0x10000
-set _CPUTAPID 0x4ba00477
+set CHIPNAME m4
+set MEMSTART 0x00000000
+set MEMSIZE 0x10000
+set CPUTAPID 0x4ba00477
# vdebug select transport
transport select jtag
@@ -20,11 +20,10 @@ adapter srst delay 5
# BFM hierarchical path and input clk period
vdebug bfm_path tbench.u_vd_jtag_bfm 20ns
-# DMA Memories to access backdoor (up to 4)
-vdebug mem_path tbench.u_mcu.u_sys.u_rom.rom $_MEMSTART $_MEMSIZE
-
-jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
+# DMA Memories to access backdoor (up to 20)
+vdebug mem_path tbench.u_mcu.u_sys.u_rom.rom $MEMSTART $MEMSIZE
+jtag newtap $CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $CPUTAPID
jtag arp_init-reset
source [find target/vd_cortex_m.cfg]
diff --git a/tcl/board/vd_m7_jtag.cfg b/tcl/board/vd_m7_jtag.cfg
index 880ef9b4c..9a89584c8 100644
--- a/tcl/board/vd_m7_jtag.cfg
+++ b/tcl/board/vd_m7_jtag.cfg
@@ -4,10 +4,10 @@
source [find interface/vdebug.cfg]
-set _CHIPNAME m7
-set _MEMSTART 0x00000000
-set _MEMSIZE 0x100000
-set _CPUTAPID 0x0ba02477
+set CHIPNAME m7
+set MEMSTART 0x00000000
+set MEMSIZE 0x100000
+set CPUTAPID 0x0ba02477
# vdebug select JTAG transport
transport select jtag
@@ -20,11 +20,10 @@ adapter srst delay 5
# BFM hierarchical path and input clk period
vdebug bfm_path tbench.u_vd_jtag_bfm 10ns
-# DMA Memories to access backdoor (up to 4)
-vdebug mem_path tbench.u_mcu.u_sys.u_itcm_ram.Mem $_MEMSTART $_MEMSIZE
-
-jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
+# DMA Memories to access backdoor (up to 20)
+vdebug mem_path tbench.u_mcu.u_sys.u_itcm_ram.Mem $MEMSTART $MEMSIZE
+jtag newtap $CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $CPUTAPID
jtag arp_init-reset
source [find target/vd_cortex_m.cfg]
diff --git a/tcl/target/vd_aarch64.cfg b/tcl/target/vd_aarch64.cfg
index 619134aa6..177416bd0 100644
--- a/tcl/target/vd_aarch64.cfg
+++ b/tcl/target/vd_aarch64.cfg
@@ -2,36 +2,44 @@
# Cadence virtual debug interface
# Arm v8 64b Cortex A
-if {![info exists _CORES]} {
- set _CORES 1
+if {![info exists CORES]} {
+ set CORES 1
}
-if {![info exists _CHIPNAME]} {
- set _CHIPNAME aarch64
+if {![info exists CHIPNAME]} {
+ set CHIPNAME aarch64
+}
+if {[info exists ACCESSPORT]} {
+ set _APNUM "-ap-num $ACCESSPORT"
+ if { $ACCESSPORT > 0xff } {
+ set _DAP6 "-adiv6"
+ } else {
+ set _DAP6 "-adiv5"
+ }
+} else {
+ set _APNUM ""
}
-set _TARGETNAME $_CHIPNAME.cpu
-set _CTINAME $_CHIPNAME.cti
-set DBGBASE {0x80810000 0x80910000}
-set CTIBASE {0x80820000 0x80920000}
+set _TARGETNAME $CHIPNAME.cpu
+set _CTINAME $CHIPNAME.cti
+set _DAPNAME $CHIPNAME.dap
-dap create $_CHIPNAME.dap -chain-position $_TARGETNAME
-$_CHIPNAME.dap apsel 1
+dap create $_DAPNAME $_DAP6 -chain-position $_TARGETNAME
-for { set _core 0 } { $_core < $_CORES } { incr _core } \
+for { set _core 0 } { $_core < $CORES } { incr _core } \
{
- cti create $_CTINAME.$_core -dap $_CHIPNAME.dap -ap-num 1 -baseaddr [lindex $CTIBASE $_core]
- set _command "target create $_TARGETNAME.$_core aarch64 -dap $_CHIPNAME.dap \
- -dbgbase [lindex $DBGBASE $_core] -cti $_CTINAME.$_core -coreid $_core"
+ set _cmd "cti create $_CTINAME.$_core -dap $_DAPNAME $_APNUM -baseaddr [lindex $CTIBASE $_core]"
+ eval $_cmd
+ set _cmd "target create $_TARGETNAME.$_core aarch64 -dap $_DAPNAME $_APNUM -dbgbase [lindex $DBGBASE $_core] -cti $_CTINAME.$_core -coreid $_core"
if { $_core != 0 } {
# non-boot core examination may fail
- set _command "$_command -defer-examine"
- set _smp_command "$_smp_command $_TARGETNAME.$_core"
+ set _cmd "$_cmd -defer-examine"
+ set _smp_cmd "$_smp_cmd $_TARGETNAME.$_core"
} else {
- set _smp_command "target smp $_TARGETNAME.$_core"
+ set _smp_cmd "target smp $_TARGETNAME.$_core"
}
- eval $_command
+ eval $_cmd
}
-eval $_smp_command
+eval $_smp_cmd
-# default target is core 0
-targets $_TARGETNAME.0
+set _TARGETCUR $_TARGETNAME.0
+targets $_TARGETCUR
diff --git a/tcl/target/vd_cortex_m.cfg b/tcl/target/vd_cortex_m.cfg
index 4d7b0df26..7db9d3aba 100644
--- a/tcl/target/vd_cortex_m.cfg
+++ b/tcl/target/vd_cortex_m.cfg
@@ -2,11 +2,12 @@
# Cadence virtual debug interface
# ARM Cortex M
-if {![info exists _CHIPNAME]} {
- set _CHIPNAME cortex_m
+if {![info exists CHIPNAME]} {
+ set CHIPNAME cortex_m
}
-set _TARGETNAME $_CHIPNAME.cpu
+set _TARGETNAME $CHIPNAME.cpu
+set _DAPNAME $CHIPNAME.dap
-dap create $_CHIPNAME.dap -chain-position $_TARGETNAME
+dap create $_DAPNAME -chain-position $_TARGETNAME
-target create $_TARGETNAME cortex_m -dap $_CHIPNAME.dap
+target create $_TARGETNAME cortex_m -dap $_DAPNAME
-----------------------------------------------------------------------
Summary of changes:
src/jtag/drivers/vdebug.c | 87 +++++++++++++++++++++++++++++++++------------
tcl/board/vd_a53x2_dap.cfg | 19 +++++-----
tcl/board/vd_a53x2_jtag.cfg | 20 ++++++-----
tcl/board/vd_a75x4_dap.cfg | 30 ++++++++++++++++
tcl/board/vd_a75x4_jtag.cfg | 30 ++++++++++++++++
tcl/board/vd_m4_dap.cfg | 14 ++++----
tcl/board/vd_m4_jtag.cfg | 15 ++++----
tcl/board/vd_m7_jtag.cfg | 15 ++++----
tcl/target/vd_aarch64.cfg | 50 +++++++++++++++-----------
tcl/target/vd_cortex_m.cfg | 11 +++---
10 files changed, 200 insertions(+), 91 deletions(-)
create mode 100644 tcl/board/vd_a75x4_dap.cfg
create mode 100644 tcl/board/vd_a75x4_jtag.cfg
hooks/post-receive
--
Main OpenOCD repository
|
|
From: openocd-gerrit <ope...@us...> - 2024-01-21 21:31:29
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".
The branch, master has been updated
via 80b970bd29093a1e3e3b5fdeacda4958721a5afd (commit)
from 987a274a85732e5b23c58456287982260a5959b2 (commit)
Those revisions listed above that are new to this repository have
not appeared on any other notification email; so we list those
revisions in full, below.
- Log -----------------------------------------------------------------
commit 80b970bd29093a1e3e3b5fdeacda4958721a5afd
Author: Jacek Wuwer <jac...@gm...>
Date: Tue Jan 9 11:23:56 2024 +0100
jtag/vdebug: fix socket options on CYGWIN
the socket option RCVLOWAT is not supported on CYGWIN.
implemented ifdef __CYGWIN not to set this option.
Change-Id: I9f6e81fa98ecf5261ea286deb4675658aae59b8e
Signed-off-by: Jacek Wuwer <jac...@gm...>
Reviewed-on: https://review.openocd.org/c/openocd/+/8066
Tested-by: jenkins
Reviewed-by: Ian Thompson <ia...@ca...>
Reviewed-by: Antonio Borneo <bor...@gm...>
diff --git a/src/jtag/drivers/vdebug.c b/src/jtag/drivers/vdebug.c
index d2311b2ea..d51d248bf 100644
--- a/src/jtag/drivers/vdebug.c
+++ b/src/jtag/drivers/vdebug.c
@@ -53,7 +53,7 @@
#include "helper/log.h"
#include "helper/list.h"
-#define VD_VERSION 46
+#define VD_VERSION 47
#define VD_BUFFER_LEN 4024
#define VD_CHEADER_LEN 24
#define VD_SHEADER_LEN 16
@@ -253,6 +253,11 @@ static int vdebug_socket_open(char *server_addr, uint32_t port)
hsock = socket(AF_INET, SOCK_STREAM, IPPROTO_IP);
if (hsock == INVALID_SOCKET)
rc = vdebug_socket_error();
+#elif defined __CYGWIN__
+ /* SO_RCVLOWAT unsupported on CYGWIN */
+ hsock = socket(AF_INET, SOCK_STREAM, IPPROTO_IP);
+ if (hsock < 0)
+ rc = errno;
#else
uint32_t rcvwat = VD_SHEADER_LEN; /* size of the rcv header, as rcv min watermark */
hsock = socket(AF_INET, SOCK_STREAM, IPPROTO_IP);
-----------------------------------------------------------------------
Summary of changes:
src/jtag/drivers/vdebug.c | 7 ++++++-
1 file changed, 6 insertions(+), 1 deletion(-)
hooks/post-receive
--
Main OpenOCD repository
|
|
From: openocd-gerrit <ope...@us...> - 2024-01-21 21:30:52
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".
The branch, master has been updated
via 987a274a85732e5b23c58456287982260a5959b2 (commit)
from d7ee0e422eb5b18106b8c50b867fc20c6bcf047c (commit)
Those revisions listed above that are new to this repository have
not appeared on any other notification email; so we list those
revisions in full, below.
- Log -----------------------------------------------------------------
commit 987a274a85732e5b23c58456287982260a5959b2
Author: Ian Thompson <ia...@ca...>
Date: Mon Jan 8 10:43:05 2024 -0800
target/xtensa: update COMMAND_HELPER output to use command_print() API
- Change LOG_ERROR() and LOG_INFO() output, but
keep DEBUG and WARNING levels for verbosity
- Update command error code return values and
remove unnecessary output.
Signed-off-by: Ian Thompson <ia...@ca...>
Change-Id: I4ef0753b3a56be02716f2db43a7d4370a1917237
Reviewed-on: https://review.openocd.org/c/openocd/+/8076
Tested-by: jenkins
Reviewed-by: Antonio Borneo <bor...@gm...>
diff --git a/src/target/xtensa/xtensa.c b/src/target/xtensa/xtensa.c
index 1ec091c9f..b516c17ab 100644
--- a/src/target/xtensa/xtensa.c
+++ b/src/target/xtensa/xtensa.c
@@ -3459,8 +3459,8 @@ static COMMAND_HELPER(xtensa_cmd_exe_do, struct target *target)
const char *parm = CMD_ARGV[0];
unsigned int parm_len = strlen(parm);
if ((parm_len >= 64) || (parm_len & 1)) {
- LOG_ERROR("Invalid parameter length (%d): must be even, < 64 characters", parm_len);
- return ERROR_FAIL;
+ command_print(CMD, "Invalid parameter length (%d): must be even, < 64 characters", parm_len);
+ return ERROR_COMMAND_ARGUMENT_INVALID;
}
uint8_t ops[32];
@@ -3480,7 +3480,7 @@ static COMMAND_HELPER(xtensa_cmd_exe_do, struct target *target)
*/
int status = xtensa_write_dirty_registers(target);
if (status != ERROR_OK) {
- LOG_ERROR("%s: Failed to write back register cache.", target_name(target));
+ command_print(CMD, "%s: Failed to write back register cache.", target_name(target));
return ERROR_FAIL;
}
xtensa_reg_val_t exccause = xtensa_reg_get(target, XT_REG_IDX_EXCCAUSE);
@@ -3498,18 +3498,18 @@ static COMMAND_HELPER(xtensa_cmd_exe_do, struct target *target)
xtensa_queue_exec_ins_wide(xtensa, ops, oplen); /* Handles endian-swap */
status = xtensa_dm_queue_execute(&xtensa->dbg_mod);
if (status != ERROR_OK) {
- LOG_TARGET_ERROR(target, "exec: queue error %d", status);
+ command_print(CMD, "exec: queue error %d", status);
} else {
status = xtensa_core_status_check(target);
if (status != ERROR_OK)
- LOG_TARGET_ERROR(target, "exec: status error %d", status);
+ command_print(CMD, "exec: status error %d", status);
}
/* Reread register cache and restore saved regs after instruction execution */
if (xtensa_fetch_all_regs(target) != ERROR_OK)
- LOG_TARGET_ERROR(target, "post-exec: register fetch error");
+ command_print(CMD, "post-exec: register fetch error");
if (status != ERROR_OK) {
- LOG_TARGET_ERROR(target, "post-exec: EXCCAUSE 0x%02" PRIx32,
+ command_print(CMD, "post-exec: EXCCAUSE 0x%02" PRIx32,
xtensa_reg_get(target, XT_REG_IDX_EXCCAUSE));
}
xtensa_reg_set(target, XT_REG_IDX_EXCCAUSE, exccause);
@@ -3534,8 +3534,8 @@ COMMAND_HELPER(xtensa_cmd_xtdef_do, struct xtensa *xtensa)
} else if (strcasecmp(core_name, "NX") == 0) {
xtensa->core_config->core_type = XT_NX;
} else {
- LOG_ERROR("xtdef [LX|NX]\n");
- return ERROR_COMMAND_SYNTAX_ERROR;
+ command_print(CMD, "xtdef [LX|NX]\n");
+ return ERROR_COMMAND_ARGUMENT_INVALID;
}
return ERROR_OK;
}
@@ -3592,7 +3592,7 @@ COMMAND_HELPER(xtensa_cmd_xtopt_do, struct xtensa *xtensa)
if (!xtensa_cmd_xtopt_legal_val("excmlevel", opt_val, 1, 6))
return ERROR_COMMAND_ARGUMENT_INVALID;
if (!xtensa->core_config->high_irq.enabled) {
- LOG_ERROR("xtopt excmlevel requires hipriints\n");
+ command_print(CMD, "xtopt excmlevel requires hipriints\n");
return ERROR_COMMAND_ARGUMENT_INVALID;
}
xtensa->core_config->high_irq.excm_level = opt_val;
@@ -3605,7 +3605,7 @@ COMMAND_HELPER(xtensa_cmd_xtopt_do, struct xtensa *xtensa)
return ERROR_COMMAND_ARGUMENT_INVALID;
}
if (!xtensa->core_config->high_irq.enabled) {
- LOG_ERROR("xtopt intlevels requires hipriints\n");
+ command_print(CMD, "xtopt intlevels requires hipriints\n");
return ERROR_COMMAND_ARGUMENT_INVALID;
}
xtensa->core_config->high_irq.level_num = opt_val;
@@ -3662,10 +3662,8 @@ COMMAND_HELPER(xtensa_cmd_xtmem_do, struct xtensa *xtensa)
int mem_access = 0;
bool is_dcache = false;
- if (CMD_ARGC == 0) {
- LOG_ERROR("xtmem <type> [parameters]\n");
+ if (CMD_ARGC == 0)
return ERROR_COMMAND_SYNTAX_ERROR;
- }
const char *mem_name = CMD_ARGV[0];
if (strcasecmp(mem_name, "icache") == 0) {
@@ -3696,25 +3694,21 @@ COMMAND_HELPER(xtensa_cmd_xtmem_do, struct xtensa *xtensa)
memp = &xtensa->core_config->srom;
mem_access = XT_MEM_ACCESS_READ;
} else {
- LOG_ERROR("xtmem types: <icache|dcache|l2cache|l2addr|iram|irom|dram|drom|sram|srom>\n");
+ command_print(CMD, "xtmem types: <icache|dcache|l2cache|l2addr|iram|irom|dram|drom|sram|srom>\n");
return ERROR_COMMAND_ARGUMENT_INVALID;
}
if (cachep) {
- if ((CMD_ARGC != 4) && (CMD_ARGC != 5)) {
- LOG_ERROR("xtmem <cachetype> <linebytes> <cachebytes> <ways> [writeback]\n");
+ if (CMD_ARGC != 4 && CMD_ARGC != 5)
return ERROR_COMMAND_SYNTAX_ERROR;
- }
cachep->line_size = strtoul(CMD_ARGV[1], NULL, 0);
cachep->size = strtoul(CMD_ARGV[2], NULL, 0);
cachep->way_count = strtoul(CMD_ARGV[3], NULL, 0);
cachep->writeback = ((CMD_ARGC == 5) && is_dcache) ?
strtoul(CMD_ARGV[4], NULL, 0) : 0;
} else if (memp) {
- if (CMD_ARGC != 3) {
- LOG_ERROR("xtmem <memtype> <baseaddr> <bytes>\n");
+ if (CMD_ARGC != 3)
return ERROR_COMMAND_SYNTAX_ERROR;
- }
struct xtensa_local_mem_region_config *memcfgp = &memp->regions[memp->count];
memcfgp->base = strtoul(CMD_ARGV[1], NULL, 0);
memcfgp->size = strtoul(CMD_ARGV[2], NULL, 0);
@@ -3734,10 +3728,8 @@ COMMAND_HANDLER(xtensa_cmd_xtmem)
/* xtmpu <num FG seg> <min seg size> <lockable> <executeonly> */
COMMAND_HELPER(xtensa_cmd_xtmpu_do, struct xtensa *xtensa)
{
- if (CMD_ARGC != 4) {
- LOG_ERROR("xtmpu <num FG seg> <min seg size> <lockable> <executeonly>\n");
+ if (CMD_ARGC != 4)
return ERROR_COMMAND_SYNTAX_ERROR;
- }
unsigned int nfgseg = strtoul(CMD_ARGV[0], NULL, 0);
unsigned int minsegsize = strtoul(CMD_ARGV[1], NULL, 0);
@@ -3745,16 +3737,16 @@ COMMAND_HELPER(xtensa_cmd_xtmpu_do, struct xtensa *xtensa)
unsigned int execonly = strtoul(CMD_ARGV[3], NULL, 0);
if ((nfgseg > 32)) {
- LOG_ERROR("<nfgseg> must be within [0..32]\n");
+ command_print(CMD, "<nfgseg> must be within [0..32]\n");
return ERROR_COMMAND_ARGUMENT_INVALID;
} else if (minsegsize & (minsegsize - 1)) {
- LOG_ERROR("<minsegsize> must be a power of 2 >= 32\n");
+ command_print(CMD, "<minsegsize> must be a power of 2 >= 32\n");
return ERROR_COMMAND_ARGUMENT_INVALID;
} else if (lockable > 1) {
- LOG_ERROR("<lockable> must be 0 or 1\n");
+ command_print(CMD, "<lockable> must be 0 or 1\n");
return ERROR_COMMAND_ARGUMENT_INVALID;
} else if (execonly > 1) {
- LOG_ERROR("<execonly> must be 0 or 1\n");
+ command_print(CMD, "<execonly> must be 0 or 1\n");
return ERROR_COMMAND_ARGUMENT_INVALID;
}
@@ -3775,18 +3767,16 @@ COMMAND_HANDLER(xtensa_cmd_xtmpu)
/* xtmmu <NIREFILLENTRIES> <NDREFILLENTRIES> <IVARWAY56> <DVARWAY56> */
COMMAND_HELPER(xtensa_cmd_xtmmu_do, struct xtensa *xtensa)
{
- if (CMD_ARGC != 2) {
- LOG_ERROR("xtmmu <NIREFILLENTRIES> <NDREFILLENTRIES>\n");
+ if (CMD_ARGC != 2)
return ERROR_COMMAND_SYNTAX_ERROR;
- }
unsigned int nirefillentries = strtoul(CMD_ARGV[0], NULL, 0);
unsigned int ndrefillentries = strtoul(CMD_ARGV[1], NULL, 0);
if ((nirefillentries != 16) && (nirefillentries != 32)) {
- LOG_ERROR("<nirefillentries> must be 16 or 32\n");
+ command_print(CMD, "<nirefillentries> must be 16 or 32\n");
return ERROR_COMMAND_ARGUMENT_INVALID;
} else if ((ndrefillentries != 16) && (ndrefillentries != 32)) {
- LOG_ERROR("<ndrefillentries> must be 16 or 32\n");
+ command_print(CMD, "<ndrefillentries> must be 16 or 32\n");
return ERROR_COMMAND_ARGUMENT_INVALID;
}
@@ -3809,13 +3799,13 @@ COMMAND_HELPER(xtensa_cmd_xtreg_do, struct xtensa *xtensa)
if (CMD_ARGC == 1) {
int32_t numregs = strtoul(CMD_ARGV[0], NULL, 0);
if ((numregs <= 0) || (numregs > UINT16_MAX)) {
- LOG_ERROR("xtreg <numregs>: Invalid 'numregs' (%d)", numregs);
- return ERROR_COMMAND_SYNTAX_ERROR;
+ command_print(CMD, "xtreg <numregs>: Invalid 'numregs' (%d)", numregs);
+ return ERROR_COMMAND_ARGUMENT_INVALID;
}
if ((xtensa->genpkt_regs_num > 0) && (numregs < (int32_t)xtensa->genpkt_regs_num)) {
- LOG_ERROR("xtregs (%d) must be larger than numgenregs (%d) (if xtregfmt specified)",
+ command_print(CMD, "xtregs (%d) must be larger than numgenregs (%d) (if xtregfmt specified)",
numregs, xtensa->genpkt_regs_num);
- return ERROR_COMMAND_SYNTAX_ERROR;
+ return ERROR_COMMAND_ARGUMENT_INVALID;
}
xtensa->total_regs_num = numregs;
xtensa->core_regs_num = 0;
@@ -3844,17 +3834,17 @@ COMMAND_HELPER(xtensa_cmd_xtreg_do, struct xtensa *xtensa)
const char *regname = CMD_ARGV[0];
unsigned int regnum = strtoul(CMD_ARGV[1], NULL, 0);
if (regnum > UINT16_MAX) {
- LOG_ERROR("<regnum> must be a 16-bit number");
+ command_print(CMD, "<regnum> must be a 16-bit number");
return ERROR_COMMAND_ARGUMENT_INVALID;
}
if ((xtensa->num_optregs + xtensa->core_regs_num) >= xtensa->total_regs_num) {
if (xtensa->total_regs_num)
- LOG_ERROR("'xtreg %s 0x%04x': Too many registers (%d expected, %d core %d extended)",
+ command_print(CMD, "'xtreg %s 0x%04x': Too many registers (%d expected, %d core %d extended)",
regname, regnum,
xtensa->total_regs_num, xtensa->core_regs_num, xtensa->num_optregs);
else
- LOG_ERROR("'xtreg %s 0x%04x': Number of registers unspecified",
+ command_print(CMD, "'xtreg %s 0x%04x': Number of registers unspecified",
regname, regnum);
return ERROR_FAIL;
}
@@ -3934,7 +3924,7 @@ COMMAND_HELPER(xtensa_cmd_xtreg_do, struct xtensa *xtensa)
idx = XT_NX_REG_IDX_MESRCLR;
if (idx < XT_NX_REG_IDX_NUM) {
if (xtensa->nx_reg_idx[idx] != 0) {
- LOG_ERROR("nx_reg_idx[%d] previously set to %d",
+ command_print(CMD, "nx_reg_idx[%d] previously set to %d",
idx, xtensa->nx_reg_idx[idx]);
return ERROR_FAIL;
}
@@ -3981,9 +3971,9 @@ COMMAND_HELPER(xtensa_cmd_xtregfmt_do, struct xtensa *xtensa)
if ((numgregs <= 0) ||
((numgregs > xtensa->total_regs_num) &&
(xtensa->total_regs_num > 0))) {
- LOG_ERROR("xtregfmt: if specified, numgregs (%d) must be <= numregs (%d)",
+ command_print(CMD, "xtregfmt: if specified, numgregs (%d) must be <= numregs (%d)",
numgregs, xtensa->total_regs_num);
- return ERROR_COMMAND_SYNTAX_ERROR;
+ return ERROR_COMMAND_ARGUMENT_INVALID;
}
xtensa->genpkt_regs_num = numgregs;
}
@@ -4099,7 +4089,7 @@ COMMAND_HELPER(xtensa_cmd_perfmon_dump_do, struct xtensa *xtensa)
"%-12" PRIu64 "%s",
result.value,
result.overflow ? " (overflow)" : "");
- LOG_INFO("%s", result_buf);
+ command_print(CMD, "%s", result_buf);
}
return ERROR_OK;
@@ -4349,21 +4339,21 @@ COMMAND_HELPER(xtensa_cmd_tracedump_do, struct xtensa *xtensa, const char *fname
}
memsz = trace_config.memaddr_end - trace_config.memaddr_start + 1;
- LOG_INFO("Total trace memory: %d words", memsz);
+ command_print(CMD, "Total trace memory: %d words", memsz);
if ((trace_config.addr &
((TRAXADDR_TWRAP_MASK << TRAXADDR_TWRAP_SHIFT) | TRAXADDR_TWSAT)) == 0) {
/*Memory hasn't overwritten itself yet. */
wmem = trace_config.addr & TRAXADDR_TADDR_MASK;
- LOG_INFO("...but trace is only %d words", wmem);
+ command_print(CMD, "...but trace is only %d words", wmem);
if (wmem < memsz)
memsz = wmem;
} else {
if (trace_config.addr & TRAXADDR_TWSAT) {
- LOG_INFO("Real trace is many times longer than that (overflow)");
+ command_print(CMD, "Real trace is many times longer than that (overflow)");
} else {
uint32_t trc_sz = (trace_config.addr >> TRAXADDR_TWRAP_SHIFT) & TRAXADDR_TWRAP_MASK;
trc_sz = (trc_sz * memsz) + (trace_config.addr & TRAXADDR_TADDR_MASK);
- LOG_INFO("Real trace is %d words, but the start has been truncated.", trc_sz);
+ command_print(CMD, "Real trace is %d words, but the start has been truncated.", trc_sz);
}
}
-----------------------------------------------------------------------
Summary of changes:
src/target/xtensa/xtensa.c | 86 ++++++++++++++++++++--------------------------
1 file changed, 38 insertions(+), 48 deletions(-)
hooks/post-receive
--
Main OpenOCD repository
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|
From: openocd-gerrit <ope...@us...> - 2024-01-21 21:27:46
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".
The branch, master has been updated
via d7ee0e422eb5b18106b8c50b867fc20c6bcf047c (commit)
from 3fb729980c6e711146157c8c43a5e06ea6b99758 (commit)
Those revisions listed above that are new to this repository have
not appeared on any other notification email; so we list those
revisions in full, below.
- Log -----------------------------------------------------------------
commit d7ee0e422eb5b18106b8c50b867fc20c6bcf047c
Author: Antonio Borneo <bor...@gm...>
Date: Thu Nov 9 15:18:22 2023 +0100
contrib/rtos-helpers/uCOS-III-openocd: change license to Apache-2.0
This file is intended to be included in any user's project that
plans to use OpenOCD awareness for uCOS-III.
It is supposed to be distributed under a license compatible with
the uCOS-III code, that is Apache-2.0 license.
Distribute it under Apache License 2.0.
Change-Id: I51ecd469c8ccdd23a069d21e89b7d90886691395
Signed-off-by: Antonio Borneo <bor...@gm...>
Reviewed-on: https://review.openocd.org/c/openocd/+/7996
Tested-by: jenkins
diff --git a/contrib/rtos-helpers/uCOS-III-openocd.c b/contrib/rtos-helpers/uCOS-III-openocd.c
index 9869adf7e..ff2789e0a 100644
--- a/contrib/rtos-helpers/uCOS-III-openocd.c
+++ b/contrib/rtos-helpers/uCOS-III-openocd.c
@@ -1,4 +1,13 @@
-// SPDX-License-Identifier: GPL-2.0-or-later
+// SPDX-License-Identifier: Apache-2.0
+
+/*
+ * The original version of this file did not reported any license nor
+ * copyright, but the author clearly stated that:
+ * "This file should be linked along with the [uC/OS-III user's] project
+ * to enable RTOS support for uC/OS-III."
+ * Such statement implies the willing to have this file's license compatible
+ * with the license Apache 2.0 of uC/OS-III.
+ */
/*
* uC/OS-III does not provide a fixed layout for OS_TCB, which makes it
-----------------------------------------------------------------------
Summary of changes:
contrib/rtos-helpers/uCOS-III-openocd.c | 11 ++++++++++-
1 file changed, 10 insertions(+), 1 deletion(-)
hooks/post-receive
--
Main OpenOCD repository
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|
From: openocd-gerrit <ope...@us...> - 2024-01-21 21:27:32
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".
The branch, master has been updated
via 3fb729980c6e711146157c8c43a5e06ea6b99758 (commit)
from d8499687f8d2899508cb7cab3de750d944181b6a (commit)
Those revisions listed above that are new to this repository have
not appeared on any other notification email; so we list those
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- Log -----------------------------------------------------------------
commit 3fb729980c6e711146157c8c43a5e06ea6b99758
Author: Antonio Borneo <bor...@gm...>
Date: Sat Nov 11 20:10:41 2023 +0100
LICENSES: Add the Apache-2.0 license for standalone files
Add the full text of the Apache-2.0 license to the OpenOCD tree.
It has the same content from:
https://spdx.org/licenses/Apache-2.0.html#licenseText
but reformatted as in the Linux kernel document and added the
required tags for reference and tooling.
While this commit is specific for standalone files, it already
reports the information for dual licensing.
Change-Id: I1fd427256c310ab733fb5d50f344ac52c64a56f5
Signed-off-by: Antonio Borneo <bor...@gm...>
Reviewed-on: https://review.openocd.org/c/openocd/+/8005
Tested-by: jenkins
Reviewed-by: Erhan Kurubas <erh...@es...>
diff --git a/LICENSES/stand-alone/Apache-2.0 b/LICENSES/stand-alone/Apache-2.0
new file mode 100644
index 000000000..ae8128b7e
--- /dev/null
+++ b/LICENSES/stand-alone/Apache-2.0
@@ -0,0 +1,189 @@
+Valid-License-Identifier: Apache-2.0
+SPDX-URL: https://spdx.org/licenses/Apache-2.0.html
+Usage-Guide:
+ Do NOT use on OpenOCD code. The Apache-2.0 is not GPL2 compatible. It may only
+ be used for dual-licensed files where the other license is GPL2 compatible.
+ If you end up using this it MUST be used together with a GPL2 compatible
+ license using "OR".
+ It may also be used for stand-alone code NOT linked within the OpenOCD binary
+ but distributed with OpenOCD.
+ To use the Apache License version 2.0 put the following SPDX tag/value
+ pair into a comment according to the placement guidelines in the
+ licensing rules documentation:
+ SPDX-License-Identifier: Apache-2.0
+License-Text:
+
+Apache License
+
+Version 2.0, January 2004
+
+http://www.apache.org/licenses/
+
+TERMS AND CONDITIONS FOR USE, REPRODUCTION, AND DISTRIBUTION
+
+1. Definitions.
+
+"License" shall mean the terms and conditions for use, reproduction, and
+distribution as defined by Sections 1 through 9 of this document.
+
+"Licensor" shall mean the copyright owner or entity authorized by the
+copyright owner that is granting the License.
+
+"Legal Entity" shall mean the union of the acting entity and all other
+entities that control, are controlled by, or are under common control with
+that entity. For the purposes of this definition, "control" means (i) the
+power, direct or indirect, to cause the direction or management of such
+entity, whether by contract or otherwise, or (ii) ownership of fifty
+percent (50%) or more of the outstanding shares, or (iii) beneficial
+ownership of such entity.
+
+"You" (or "Your") shall mean an individual or Legal Entity exercising
+permissions granted by this License.
+
+"Source" form shall mean the preferred form for making modifications,
+including but not limited to software source code, documentation source,
+and configuration files.
+
+"Object" form shall mean any form resulting from mechanical transformation
+or translation of a Source form, including but not limited to compiled
+object code, generated documentation, and conversions to other media types.
+
+"Work" shall mean the work of authorship, whether in Source or Object form,
+made available under the License, as indicated by a copyright notice that
+is included in or attached to the work (an example is provided in the
+Appendix below).
+
+"Derivative Works" shall mean any work, whether in Source or Object form,
+that is based on (or derived from) the Work and for which the editorial
+revisions, annotations, elaborations, or other modifications represent, as
+a whole, an original work of authorship. For the purposes of this License,
+Derivative Works shall not include works that remain separable from, or
+merely link (or bind by name) to the interfaces of, the Work and Derivative
+Works thereof.
+
+"Contribution" shall mean any work of authorship, including the original
+version of the Work and any modifications or additions to that Work or
+Derivative Works thereof, that is intentionally submitted to Licensor for
+inclusion in the Work by the copyright owner or by an individual or Legal
+Entity authorized to submit on behalf of the copyright owner. For the
+purposes of this definition, "submitted" means any form of electronic,
+verbal, or written communication sent to the Licensor or its
+representatives, including but not limited to communication on electronic
+mailing lists, source code control systems, and issue tracking systems that
+are managed by, or on behalf of, the Licensor for the purpose of discussing
+and improving the Work, but excluding communication that is conspicuously
+marked or otherwise designated in writing by the copyright owner as "Not a
+Contribution."
+
+"Contributor" shall mean Licensor and any individual or Legal Entity on
+behalf of whom a Contribution has been received by Licensor and
+subsequently incorporated within the Work.
+
+2. Grant of Copyright License. Subject to the terms and conditions of this
+ License, each Contributor hereby grants to You a perpetual, worldwide,
+ non-exclusive, no-charge, royalty-free, irrevocable copyright license to
+ reproduce, prepare Derivative Works of, publicly display, publicly
+ perform, sublicense, and distribute the Work and such Derivative Works
+ in Source or Object form.
+
+3. Grant of Patent License. Subject to the terms and conditions of this
+ License, each Contributor hereby grants to You a perpetual, worldwide,
+ non-exclusive, no-charge, royalty-free, irrevocable (except as stated in
+ this section) patent license to make, have made, use, offer to sell,
+ sell, import, and otherwise transfer the Work, where such license
+ applies only to those patent claims licensable by such Contributor that
+ are necessarily infringed by their Contribution(s) alone or by
+ combination of their Contribution(s) with the Work to which such
+ Contribution(s) was submitted. If You institute patent litigation
+ against any entity (including a cross-claim or counterclaim in a
+ lawsuit) alleging that the Work or a Contribution incorporated within
+ the Work constitutes direct or contributory patent infringement, then
+ any patent licenses granted to You under this License for that Work
+ shall terminate as of the date such litigation is filed.
+
+4. Redistribution. You may reproduce and distribute copies of the Work or
+ Derivative Works thereof in any medium, with or without modifications,
+ and in Source or Object form, provided that You meet the following
+ conditions:
+
+ a. You must give any other recipients of the Work or Derivative Works a
+ copy of this License; and
+
+ b. You must cause any modified files to carry prominent notices stating
+ that You changed the files; and
+
+ c. You must retain, in the Source form of any Derivative Works that You
+ distribute, all copyright, patent, trademark, and attribution notices
+ from the Source form of the Work, excluding those notices that do not
+ pertain to any part of the Derivative Works; and
+
+ d. If the Work includes a "NOTICE" text file as part of its
+ distribution, then any Derivative Works that You distribute must
+ include a readable copy of the attribution notices contained within
+ such NOTICE file, excluding those notices that do not pertain to any
+ part of the Derivative Works, in at least one of the following
+ places: within a NOTICE text file distributed as part of the
+ Derivative Works; within the Source form or documentation, if
+ provided along with the Derivative Works; or, within a display
+ generated by the Derivative Works, if and wherever such third-party
+ notices normally appear. The contents of the NOTICE file are for
+ informational purposes only and do not modify the License. You may
+ add Your own attribution notices within Derivative Works that You
+ distribute, alongside or as an addendum to the NOTICE text from the
+ Work, provided that such additional attribution notices cannot be
+ construed as modifying the License.
+
+ You may add Your own copyright statement to Your modifications and may
+ provide additional or different license terms and conditions for use,
+ reproduction, or distribution of Your modifications, or for any such
+ Derivative Works as a whole, provided Your use, reproduction, and
+ distribution of the Work otherwise complies with the conditions stated
+ in this License.
+
+5. Submission of Contributions. Unless You explicitly state otherwise, any
+ Contribution intentionally submitted for inclusion in the Work by You to
+ the Licensor shall be under the terms and conditions of this License,
+ without any additional terms or conditions. Notwithstanding the above,
+ nothing herein shall supersede or modify the terms of any separate
+ license agreement you may have executed with Licensor regarding such
+ Contributions.
+
+6. Trademarks. This License does not grant permission to use the trade
+ names, trademarks, service marks, or product names of the Licensor,
+ except as required for reasonable and customary use in describing the
+ origin of the Work and reproducing the content of the NOTICE file.
+
+7. Disclaimer of Warranty. Unless required by applicable law or agreed to
+ in writing, Licensor provides the Work (and each Contributor provides
+ its Contributions) on an "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS
+ OF ANY KIND, either express or implied, including, without limitation,
+ any warranties or conditions of TITLE, NON-INFRINGEMENT,
+ MERCHANTABILITY, or FITNESS FOR A PARTICULAR PURPOSE. You are solely
+ responsible for determining the appropriateness of using or
+ redistributing the Work and assume any risks associated with Your
+ exercise of permissions under this License.
+
+8. Limitation of Liability. In no event and under no legal theory, whether
+ in tort (including negligence), contract, or otherwise, unless required
+ by applicable law (such as deliberate and grossly negligent acts) or
+ agreed to in writing, shall any Contributor be liable to You for
+ damages, including any direct, indirect, special, incidental, or
+ consequential damages of any character arising as a result of this
+ License or out of the use or inability to use the Work (including but
+ not limited to damages for loss of goodwill, work stoppage, computer
+ failure or malfunction, or any and all other commercial damages or
+ losses), even if such Contributor has been advised of the possibility of
+ such damages.
+
+9. Accepting Warranty or Additional Liability. While redistributing the
+ Work or Derivative Works thereof, You may choose to offer, and charge a
+ fee for, acceptance of support, warranty, indemnity, or other liability
+ obligations and/or rights consistent with this License. However, in
+ accepting such obligations, You may act only on Your own behalf and on
+ Your sole responsibility, not on behalf of any other Contributor, and
+ only if You agree to indemnify, defend, and hold each Contributor
+ harmless for any liability incurred by, or claims asserted against, such
+ Contributor by reason of your accepting any such warranty or additional
+ liability.
+
+END OF TERMS AND CONDITIONS
diff --git a/Makefile.am b/Makefile.am
index 153c471a9..1313d151b 100644
--- a/Makefile.am
+++ b/Makefile.am
@@ -70,6 +70,7 @@ EXTRA_DIST += \
LICENSES/preferred/GPL-2.0 \
LICENSES/preferred/LGPL-2.1 \
LICENSES/preferred/MIT \
+ LICENSES/stand-alone/Apache-2.0 \
LICENSES/stand-alone/GPL-3.0 \
tools/logger.pl \
tools/rlink_make_speed_table \
-----------------------------------------------------------------------
Summary of changes:
LICENSES/stand-alone/Apache-2.0 | 189 ++++++++++++++++++++++++++++++++++++++++
Makefile.am | 1 +
2 files changed, 190 insertions(+)
create mode 100644 LICENSES/stand-alone/Apache-2.0
hooks/post-receive
--
Main OpenOCD repository
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|
From: openocd-gerrit <ope...@us...> - 2024-01-21 21:27:12
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".
The branch, master has been updated
via d8499687f8d2899508cb7cab3de750d944181b6a (commit)
from 43e1d60e77b7984e21a9250a530a34f64bab78c0 (commit)
Those revisions listed above that are new to this repository have
not appeared on any other notification email; so we list those
revisions in full, below.
- Log -----------------------------------------------------------------
commit d8499687f8d2899508cb7cab3de750d944181b6a
Author: Ahmed BOUDJELIDA <abo...@na...>
Date: Mon Jan 15 15:45:49 2024 +0100
jtag/drivers: Correct ANGIE driver and GPIO Extender configuration
Correct GPIO Extender configuration, after reconsideration,
we need to configure the IO extender 0x23 pins as all inputs.
Add more LOG_ERRORs to the code to better track bugs.
Re-organize angie_init function
Change-Id: I1fcf4919ba9ea95576803dd35cce7dafa26853b4
Signed-off-by: Ahmed BOUDJELIDA <abo...@na...>
Reviewed-on: https://review.openocd.org/c/openocd/+/8079
Tested-by: jenkins
Reviewed-by: Antonio Borneo <bor...@gm...>
diff --git a/src/jtag/drivers/angie.c b/src/jtag/drivers/angie.c
index dfe65a208..62079f015 100644
--- a/src/jtag/drivers/angie.c
+++ b/src/jtag/drivers/angie.c
@@ -168,7 +168,7 @@ static int angie_load_firmware_and_renumerate(struct angie *device, const char *
static int angie_load_firmware(struct angie *device, const char *filename);
static int angie_load_bitstream(struct angie *device, const char *filename);
static int angie_i2c_write(struct angie *device, uint8_t *i2c_data, uint8_t i2c_data_size);
-static void angie_io_extender_config(struct angie *device, uint8_t i2c_adr, uint8_t cfg_value, uint8_t value);
+static int angie_io_extender_config(struct angie *device, uint8_t i2c_adr, uint8_t cfg_value);
static int angie_write_firmware_section(struct angie *device,
struct image *firmware_image, int section_index);
@@ -262,8 +262,10 @@ static int angie_usb_open(struct angie *device)
int ret = jtag_libusb_open(vids, pids, NULL, &usb_device_handle, NULL);
- if (ret != ERROR_OK)
+ if (ret != ERROR_OK) {
+ LOG_ERROR("Could not find and open ANGIE");
return ret;
+ }
device->usb_device_handle = usb_device_handle;
device->type = ANGIE;
@@ -281,8 +283,10 @@ static int angie_usb_open(struct angie *device)
static int angie_usb_close(struct angie *device)
{
if (device->usb_device_handle) {
- if (libusb_release_interface(device->usb_device_handle, 0) != 0)
+ if (libusb_release_interface(device->usb_device_handle, 0) != 0) {
+ LOG_ERROR("Could not release interface 0");
return ERROR_FAIL;
+ }
jtag_libusb_close(device->usb_device_handle);
device->usb_device_handle = NULL;
@@ -383,8 +387,10 @@ static int angie_load_firmware(struct angie *device, const char *filename)
/* Download all sections in the image to ANGIE */
for (unsigned int i = 0; i < angie_firmware_image.num_sections; i++) {
ret = angie_write_firmware_section(device, &angie_firmware_image, i);
- if (ret != ERROR_OK)
+ if (ret != ERROR_OK) {
+ LOG_ERROR("Could not write firmware section");
return ret;
+ }
}
image_close(&angie_firmware_image);
@@ -477,7 +483,7 @@ static int angie_load_bitstream(struct angie *device, const char *filename)
ret = jtag_libusb_control_transfer(device->usb_device_handle,
0x00, 0xB1, 0, 0, NULL, 0, LIBUSB_TIMEOUT_MS, &transferred);
if (ret != ERROR_OK) {
- LOG_INFO("error cfgclose");
+ LOG_ERROR("Failed cfgclose");
/* Abort if libusb sent less data than requested */
return ERROR_FAIL;
}
@@ -509,12 +515,10 @@ static int angie_i2c_write(struct angie *device, uint8_t *i2c_data, uint8_t i2c_
i2c_data_size + 2, 1000, &transferred);
if (ret != ERROR_OK) {
LOG_ERROR("Error in i2c clock gen configuration : ret ERROR");
- angie_quit();
return ret;
}
if (transferred != i2c_data_size + 2) {
LOG_ERROR("Error in i2c clock gen configuration : bytes transferred");
- angie_quit();
return ERROR_FAIL;
}
@@ -524,7 +528,6 @@ static int angie_i2c_write(struct angie *device, uint8_t *i2c_data, uint8_t i2c_
ret = jtag_libusb_bulk_write(device->usb_device_handle, 0x88, buffer_received, 1, 1000, &transferred);
if (ret != ERROR_OK) {
LOG_ERROR("Error in i2c clock gen configuration : ret ERROR");
- angie_quit();
return ret;
}
return ERROR_OK;
@@ -541,13 +544,15 @@ static int angie_i2c_write(struct angie *device, uint8_t *i2c_data, uint8_t i2c_
* @return on success: ERROR_OK
* @return on failure: ERROR_FAIL
*/
-static void angie_io_extender_config(struct angie *device, uint8_t i2c_adr, uint8_t cfg_value, uint8_t value)
+static int angie_io_extender_config(struct angie *device, uint8_t i2c_adr, uint8_t cfg_value)
{
uint8_t ioconfig[3] = {i2c_adr, 3, cfg_value};
- angie_i2c_write(device, ioconfig, 3);
- uint8_t iovalue[3] = {i2c_adr, 1, value};
- angie_i2c_write(device, iovalue, 3);
+ int ret = angie_i2c_write(device, ioconfig, 3);
+ if (ret != ERROR_OK)
+ return ret;
+
usleep(500);
+ return ret;
}
/**
@@ -851,19 +856,27 @@ static int angie_execute_queued_commands(struct angie *device, int timeout_ms)
/* Send packet to ANGIE */
ret = jtag_libusb_bulk_write(device->usb_device_handle, device->ep_out,
(char *)buffer, count_out, timeout_ms, &transferred);
- if (ret != ERROR_OK)
+ if (ret != ERROR_OK) {
+ LOG_ERROR("Libusb bulk write queued commands failed.");
return ret;
- if (transferred != count_out)
+ }
+ if (transferred != count_out) {
+ LOG_ERROR("Libusb bulk write queued commands failed: transferred byte count");
return ERROR_FAIL;
+ }
/* Wait for response if commands contain IN payload data */
if (count_in > 0) {
ret = jtag_libusb_bulk_write(device->usb_device_handle, device->ep_in,
(char *)buffer, count_in, timeout_ms, &transferred);
- if (ret != ERROR_OK)
- return ret;
- if (transferred != count_in)
- return ERROR_FAIL;
+ if (ret != ERROR_OK) {
+ LOG_ERROR("Libusb bulk write input payload data failed");
+ return ret;
+ }
+ if (transferred != count_in) {
+ LOG_ERROR("Libusb bulk write input payload data failed: transferred byte count");
+ return ERROR_FAIL;
+ }
/* Write back IN payload data */
index_in = 0;
@@ -2230,7 +2243,6 @@ static int angie_init(void)
ret = angie_usb_open(angie_handle);
if (ret != ERROR_OK) {
- LOG_ERROR("Could not open ANGIE device");
free(angie_handle);
angie_handle = NULL;
return ret;
@@ -2249,10 +2261,10 @@ static int angie_init(void)
if (download_firmware) {
LOG_INFO("Loading ANGIE firmware. This is reversible by power-cycling ANGIE device.");
-
- if (libusb_claim_interface(angie_handle->usb_device_handle, 0) != LIBUSB_SUCCESS)
- LOG_ERROR("Could not claim interface");
-
+ if (libusb_claim_interface(angie_handle->usb_device_handle, 0) != LIBUSB_SUCCESS) {
+ LOG_ERROR("Could not claim interface 0");
+ return ERROR_FAIL;
+ }
ret = angie_load_firmware_and_renumerate(angie_handle,
ANGIE_FIRMWARE_FILE, ANGIE_RENUMERATION_DELAY_US);
if (ret != ERROR_OK) {
@@ -2266,45 +2278,29 @@ static int angie_init(void)
angie_quit();
return ret;
}
+ if (libusb_release_interface(angie_handle->usb_device_handle, 0) != LIBUSB_SUCCESS) {
+ LOG_ERROR("Fail release interface 0");
+ return ERROR_FAIL;
+ }
if (libusb_claim_interface(angie_handle->usb_device_handle, 1) != LIBUSB_SUCCESS) {
LOG_ERROR("Could not claim interface 1");
- angie_quit();
return ERROR_FAIL;
}
- angie_io_extender_config(angie_handle, 0x22, 0xFF, 0xFF);
- if (ret != ERROR_OK) {
- LOG_ERROR("Could not configure io extender 22");
- angie_quit();
- return ret;
- }
- angie_io_extender_config(angie_handle, 0x23, 0xFF, 0xFF);
+ /* Configure io extender 23: all input */
+ ret = angie_io_extender_config(angie_handle, 0x23, 0xFF);
if (ret != ERROR_OK) {
LOG_ERROR("Could not configure io extender 23");
- angie_quit();
- return ret;
- }
- angie_io_extender_config(angie_handle, 0x24, 0x1F, 0x9F);
- if (ret != ERROR_OK) {
- LOG_ERROR("Could not configure io extender 24");
- angie_quit();
- return ret;
- }
- angie_io_extender_config(angie_handle, 0x25, 0x07, 0x00);
- if (ret != ERROR_OK) {
- LOG_ERROR("Could not configure io extender 25");
- angie_quit();
return ret;
}
if (libusb_release_interface(angie_handle->usb_device_handle, 1) != LIBUSB_SUCCESS) {
LOG_ERROR("Fail release interface 1");
- angie_quit();
return ERROR_FAIL;
}
} else {
LOG_INFO("ANGIE device is already running ANGIE firmware");
}
- /* Get ANGIE USB IN/OUT endpoints and claim the interface */
+ /* Get ANGIE USB IN/OUT endpoints and claim the interface 0 */
ret = jtag_libusb_choose_interface(angie_handle->usb_device_handle,
&angie_handle->ep_in, &angie_handle->ep_out, 0xFF, 0, 0, -1);
if (ret != ERROR_OK) {
@@ -2319,6 +2315,7 @@ static int angie_init(void)
/* Issue one test command with short timeout */
ret = angie_append_test_cmd(angie_handle);
if (ret != ERROR_OK) {
+ LOG_ERROR("Append test command failed.");
angie_quit();
return ret;
}
@@ -2345,14 +2342,16 @@ static int angie_init(void)
angie_clear_queue(angie_handle);
+ /* Execute get signals command */
ret = angie_append_get_signals_cmd(angie_handle);
if (ret != ERROR_OK) {
+ LOG_ERROR("Append get signals command failed");
angie_quit();
return ret;
}
-
ret = angie_execute_queued_commands(angie_handle, 200);
if (ret != ERROR_OK) {
+ LOG_ERROR("Execute get signals command failed");
angie_quit();
return ret;
}
-----------------------------------------------------------------------
Summary of changes:
src/jtag/drivers/angie.c | 93 ++++++++++++++++++++++++------------------------
1 file changed, 46 insertions(+), 47 deletions(-)
hooks/post-receive
--
Main OpenOCD repository
|
|
From: openocd-gerrit <ope...@us...> - 2024-01-21 21:26:37
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".
The branch, master has been updated
via 43e1d60e77b7984e21a9250a530a34f64bab78c0 (commit)
from ea2e26f7d521f5755b4bfda7bf12d99650277421 (commit)
Those revisions listed above that are new to this repository have
not appeared on any other notification email; so we list those
revisions in full, below.
- Log -----------------------------------------------------------------
commit 43e1d60e77b7984e21a9250a530a34f64bab78c0
Author: Tomas Vanek <va...@fb...>
Date: Sun Dec 10 15:03:46 2023 +0100
jtag/drivers/cmsis_dap_usb_bulk: fix clang warning
Clang static analyzer warnings
"1st function call argument is an uninitialized value"
on the first libusb_free_transfer() parameter (lines 423, 424)
could turn into a real problem in a corner case:
If allocation of a libusb transfer struct fails, the pointers of not yet
allocated transfers remain uninitialized.
Use calloc() to zero whole struct cmsis_dap_backend_data.
Fixes: fd75e9e54270 (jtag/drivers/cmsis_dap_bulk: use asynchronous libusb transfer)
Signed-off-by: Tomas Vanek <va...@fb...>
Change-Id: I0e489757d82d10ed7416c5e8c215e1facc7f8093
Reviewed-on: https://review.openocd.org/c/openocd/+/8045
Tested-by: jenkins
Reviewed-by: Antonio Borneo <bor...@gm...>
diff --git a/src/jtag/drivers/cmsis_dap_usb_bulk.c b/src/jtag/drivers/cmsis_dap_usb_bulk.c
index 92a972a04..8d0cb544d 100644
--- a/src/jtag/drivers/cmsis_dap_usb_bulk.c
+++ b/src/jtag/drivers/cmsis_dap_usb_bulk.c
@@ -362,7 +362,7 @@ static int cmsis_dap_usb_open(struct cmsis_dap *dap, uint16_t vids[], uint16_t p
if (err)
LOG_WARNING("could not claim interface: %s", libusb_strerror(err));
- dap->bdata = malloc(sizeof(struct cmsis_dap_backend_data));
+ dap->bdata = calloc(1, sizeof(struct cmsis_dap_backend_data));
if (!dap->bdata) {
LOG_ERROR("unable to allocate memory");
libusb_release_interface(dev_handle, interface_num);
-----------------------------------------------------------------------
Summary of changes:
src/jtag/drivers/cmsis_dap_usb_bulk.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
hooks/post-receive
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Main OpenOCD repository
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