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[OpenOCD-commit] Main OpenOCD repository branch, master, updated. v0.12.0-301-g3223b49c4

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- Log -----------------------------------------------------------------
commit 3223b49c401a07b0b59d2e5ac80a1e9ec999e98b
Author: Nishanth Menon <nm...@ti...>
Date:   Thu Jul 14 16:37:54 2022 -0500

    tcl/board: Add am625 native swd configuration
    
    Direct memory driver swd native configuration for am625.
    
    Signed-off-by: Nishanth Menon <nm...@ti...>
    Signed-off-by: Jason Peck <jp...@ti...>
    Change-Id: I6cf521fe9af0a4b8f8ab4853bc25722368b713e6
    Reviewed-on: https://review.openocd.org/c/openocd/+/7091
    Reviewed-by: Antonio Borneo <bor...@gm...>
    Tested-by: jenkins

diff --git a/tcl/board/ti_am625_swd_native.cfg b/tcl/board/ti_am625_swd_native.cfg
new file mode 100644
index 000000000..dc4b20579
--- /dev/null
+++ b/tcl/board/ti_am625_swd_native.cfg
@@ -0,0 +1,22 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+# Copyright (C) 2022-2023 Texas Instruments Incorporated - http://www.ti.com/
+#
+# Texas Instruments am625
+# Link: https://www.ti.com/product/AM625
+#
+# This configuration file is used as a self hosted debug configuration that
+# works on every AM625 platform based on firewall configuration permitted
+# in the system.
+#
+# In this system openOCD runs on one of the CPUs inside AM625 and provides
+# network ports that can then be used to debug the microcontrollers on the
+# SoC - either self hosted IDE OR remotely.
+
+# We are using dmem, which uses dapdirect_swd transport
+adapter driver dmem
+
+if { ![info exists SOC] } {
+	set SOC am625
+}
+
+source [find target/ti_k3.cfg]
diff --git a/tcl/target/ti_k3.cfg b/tcl/target/ti_k3.cfg
index 99b5b51a3..ef1f1569a 100644
--- a/tcl/target/ti_k3.cfg
+++ b/tcl/target/ti_k3.cfg
@@ -120,6 +120,16 @@ switch $_soc {
 		# M4 processor
 		set _gp_mcu_cores 1
 		set _gp_mcu_ap_unlock_offsets {0xf0 0x7c}
+
+		# Setup DMEM access descriptions
+		# DAPBUS (Debugger) description
+		set _dmem_base_address 0x740002000
+		set _dmem_ap_address_offset 0x100
+		set _dmem_max_aps 10
+		# Emulated AP description
+		set _dmem_emu_base_address 0x760000000
+		set _dmem_emu_base_address_map_to 0x1d500000
+		set _dmem_emu_ap_list 1
 	}
 	am62a7 {
 		set _CHIPNAME am62a7
@@ -329,3 +339,22 @@ if { $_gp_mcu_cores != 0 } {
 		halt 1000
 	}
 }
+
+# In case of DMEM access, configure the dmem adapter with offsets from above.
+if { 0 == [string compare [adapter name] dmem ] } {
+	if { [info exists _dmem_base_address] } {
+		# DAPBUS (Debugger) description
+		dmem base_address $_dmem_base_address
+		dmem ap_address_offset $_dmem_ap_address_offset
+		dmem max_aps $_dmem_max_aps
+
+		# The following are the details of APs to be emulated for direct address access.
+		# Debug Config (Debugger) description
+		dmem emu_base_address_range $_dmem_emu_base_address $_dmem_emu_base_address_map_to
+		dmem emu_ap_list $_dmem_emu_ap_list
+		# We are going local bus, so speed is really dummy here.
+		adapter speed 2500
+	} else {
+		puts "ERROR: ${SOC} data is missing to support dmem access!"
+	}
+}

-----------------------------------------------------------------------

Summary of changes:
 tcl/board/ti_am625_swd_native.cfg | 22 ++++++++++++++++++++++
 tcl/target/ti_k3.cfg              | 29 +++++++++++++++++++++++++++++
 2 files changed, 51 insertions(+)
 create mode 100644 tcl/board/ti_am625_swd_native.cfg


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- Log -----------------------------------------------------------------
commit 42872d18bf1326294521096b73314e54a31b0b60
Author: Jason Peck <jp...@ti...>
Date:   Mon Jul 18 13:45:05 2022 -0500

    jtag/drivers: dmem: Add Emulated AP mode
    
    This emulation mode supports software translation of an AP request
    into an address mapped transaction that does not rely on physical AP
    hardware. This is necessary in some hardware such as K3 SoCs since the
    hardware architecture anticipates a potential race condition between
    AP doing direct memory access generating transactions back to system
    bus and firewalls that data path out.
    
    This emulation mode allows direct memory driver to emulate CoreSight
    Access Port (AP) and reuse the SoC configuration meant for JTAG
    debuggers.
    
    Since the address ranges are flat in nature, the requisite memory base
    and size will need to be provided a-priori to the driver for mapping.
    The other design alternative would be to map requested memory map for
    every register operation, but, that would defeat our intent of getting
    max debug performance.
    
    Signed-off-by: Nishanth Menon <nm...@ti...>
    Signed-off-by: Jason Peck <jp...@ti...>
    Change-Id: I2d3c5f7833f1973e90b4f6b247827f62fc2905d0
    Reviewed-on: https://review.openocd.org/c/openocd/+/7089
    Tested-by: jenkins
    Reviewed-by: Antonio Borneo <bor...@gm...>

diff --git a/doc/openocd.texi b/doc/openocd.texi
index 6f16c9f70..d07188c4b 100644
--- a/doc/openocd.texi
+++ b/doc/openocd.texi
@@ -3626,6 +3626,19 @@ Set the address offset between Access Ports (APs).
 Set the maximum number of valid access ports on the SoC.
 @end deffn
 
+@deffn {Config Command} {dmem emu_ap_list} n
+Set the list of Access Ports (APs) that need to be emulated. This
+emulation mode supports software translation of an AP request into an
+address mapped transaction that does not rely on physical AP hardware.
+This maybe needed if the AP is either denied access via memory map or
+protected using other SoC mechanisms.
+@end deffn
+
+@deffn {Config Command} {dmem emu_base_address_range} base_address address_window_size
+Set the emulated address and address window size. Both of these
+parameters must be aligned to page size.
+@end deffn
+
 @end deffn
 
 @section Transport Configuration
diff --git a/src/jtag/drivers/dmem.c b/src/jtag/drivers/dmem.c
index 8d603ad63..4dc582115 100644
--- a/src/jtag/drivers/dmem.c
+++ b/src/jtag/drivers/dmem.c
@@ -25,6 +25,19 @@
 #include <target/arm_adi_v5.h>
 #include <transport/transport.h>
 
+struct dmem_emu_ap_info {
+	uint64_t ap_num;
+	/* Emulation mode AP state variables */
+	uint32_t apbap_tar;
+	uint32_t apbap_csw;
+};
+
+/*
+ * This bit tells if the transaction is coming in from jtag or not
+ * we just mask this out to emulate direct address access
+ */
+#define ARM_APB_PADDR31  BIT(31)
+
 static void *dmem_map_base, *dmem_virt_base_addr;
 static size_t dmem_mapped_size;
 
@@ -35,6 +48,176 @@ static uint64_t dmem_dap_base_address;
 static unsigned int dmem_dap_max_aps = 1;
 static uint32_t dmem_dap_ap_offset = 0x100;
 
+/* DAP error code. */
+static int dmem_dap_retval = ERROR_OK;
+
+/* AP Emulation Mode */
+static uint64_t dmem_emu_base_address;
+static uint64_t dmem_emu_size;
+static void *dmem_emu_map_base, *dmem_emu_virt_base_addr;
+static size_t dmem_emu_mapped_size;
+#define DMEM_MAX_EMULATE_APS 5
+static unsigned int dmem_emu_ap_count;
+static struct dmem_emu_ap_info dmem_emu_ap_list[DMEM_MAX_EMULATE_APS];
+
+/*
+ * This helper is used to determine the TAR increment size in bytes.  The AP's
+ * CSW encoding for SIZE supports byte count decode using "1 << SIZE".
+ */
+static uint32_t dmem_memap_tar_inc(uint32_t csw)
+{
+	if ((csw & CSW_ADDRINC_MASK) != 0)
+		return 1 << (csw & CSW_SIZE_MASK);
+	return 0;
+}
+
+/*
+ * EMULATION MODE: In Emulation MODE, we assume the following:
+ * TCL still describes as system is operational from the view of AP (ex. jtag)
+ * However, the hardware doesn't permit direct memory access to these APs
+ * (only permitted via JTAG).
+ *
+ * So, the access to these APs have to be decoded to a memory map
+ * access which we can directly access.
+ *
+ * A few TI processors have this issue.
+ */
+static bool dmem_is_emulated_ap(struct adiv5_ap *ap, unsigned int *idx)
+{
+	for (unsigned int i = 0; i < dmem_emu_ap_count; i++) {
+		if (ap->ap_num == dmem_emu_ap_list[i].ap_num) {
+			*idx = i;
+			return true;
+		}
+	}
+	return false;
+}
+
+static void dmem_emu_set_ap_reg(uint64_t addr, uint32_t val)
+{
+	addr &= ~ARM_APB_PADDR31;
+
+	*(volatile uint32_t *)((uintptr_t)dmem_emu_virt_base_addr + addr) = val;
+}
+
+static uint32_t dmem_emu_get_ap_reg(uint64_t addr)
+{
+	uint32_t val;
+
+	addr &= ~ARM_APB_PADDR31;
+
+	val = *(volatile uint32_t *)((uintptr_t)dmem_emu_virt_base_addr + addr);
+
+	return val;
+}
+
+static int dmem_emu_ap_q_read(unsigned int ap_idx, unsigned int reg, uint32_t *data)
+{
+	uint64_t addr;
+	int ret = ERROR_OK;
+	struct dmem_emu_ap_info *ap_info = &dmem_emu_ap_list[ap_idx];
+
+	switch (reg) {
+		case ADIV5_MEM_AP_REG_CSW:
+			*data = ap_info->apbap_csw;
+			break;
+		case ADIV5_MEM_AP_REG_TAR:
+			*data = ap_info->apbap_tar;
+			break;
+		case ADIV5_MEM_AP_REG_CFG:
+			*data = 0;
+			break;
+		case ADIV5_MEM_AP_REG_BASE:
+			*data = 0;
+			break;
+		case ADIV5_AP_REG_IDR:
+			*data = 0;
+			break;
+		case ADIV5_MEM_AP_REG_BD0:
+		case ADIV5_MEM_AP_REG_BD1:
+		case ADIV5_MEM_AP_REG_BD2:
+		case ADIV5_MEM_AP_REG_BD3:
+			addr = (ap_info->apbap_tar & ~0xf) + (reg & 0x0C);
+
+			*data = dmem_emu_get_ap_reg(addr);
+
+			break;
+		case ADIV5_MEM_AP_REG_DRW:
+			addr = ap_info->apbap_tar;
+
+			*data = dmem_emu_get_ap_reg(addr);
+
+			ap_info->apbap_tar += dmem_memap_tar_inc(ap_info->apbap_csw);
+			break;
+		default:
+			LOG_INFO("%s: Unknown reg: 0x%02x", __func__, reg);
+			ret = ERROR_FAIL;
+			break;
+	}
+
+	/* Track the last error code. */
+	if (ret != ERROR_OK)
+		dmem_dap_retval = ret;
+
+	return ret;
+}
+
+static int dmem_emu_ap_q_write(unsigned int ap_idx, unsigned int reg, uint32_t data)
+{
+	uint64_t addr;
+	int ret = ERROR_OK;
+	struct dmem_emu_ap_info *ap_info = &dmem_emu_ap_list[ap_idx];
+
+	switch (reg) {
+		case ADIV5_MEM_AP_REG_CSW:
+			/*
+			 * This implementation only supports 32-bit accesses.
+			 * Force this by ensuring CSW_SIZE field indicates 32-BIT.
+			 */
+			ap_info->apbap_csw = ((data & ~CSW_SIZE_MASK) | CSW_32BIT);
+			break;
+		case ADIV5_MEM_AP_REG_TAR:
+			/*
+			 * This implementation only supports 32-bit accesses.
+			 * Force LS 2-bits of TAR to 00b
+			 */
+			ap_info->apbap_tar = (data & ~0x3);
+			break;
+
+		case ADIV5_MEM_AP_REG_CFG:
+		case ADIV5_MEM_AP_REG_BASE:
+		case ADIV5_AP_REG_IDR:
+			/* We don't use this, so we don't need to store */
+			break;
+
+		case ADIV5_MEM_AP_REG_BD0:
+		case ADIV5_MEM_AP_REG_BD1:
+		case ADIV5_MEM_AP_REG_BD2:
+		case ADIV5_MEM_AP_REG_BD3:
+			addr = (ap_info->apbap_tar & ~0xf) + (reg & 0x0C);
+
+			dmem_emu_set_ap_reg(addr, data);
+
+			break;
+		case ADIV5_MEM_AP_REG_DRW:
+			addr = ap_info->apbap_tar;
+			dmem_emu_set_ap_reg(addr, data);
+
+			ap_info->apbap_tar += dmem_memap_tar_inc(ap_info->apbap_csw);
+			break;
+		default:
+			LOG_INFO("%s: Unknown reg: 0x%02x", __func__, reg);
+			ret = EINVAL;
+			break;
+	}
+
+	/* Track the last error code. */
+	if (ret != ERROR_OK)
+		dmem_dap_retval = ret;
+
+	return ret;
+}
+
 /* AP MODE */
 static uint32_t dmem_get_ap_reg_offset(struct adiv5_ap *ap, unsigned int reg)
 {
@@ -78,6 +261,8 @@ static int dmem_dp_q_write(struct adiv5_dap *dap, unsigned int reg, uint32_t dat
 
 static int dmem_ap_q_read(struct adiv5_ap *ap, unsigned int reg, uint32_t *data)
 {
+	unsigned int idx;
+
 	if (is_adiv6(ap->dap)) {
 		static bool error_flagged;
 
@@ -89,6 +274,9 @@ static int dmem_ap_q_read(struct adiv5_ap *ap, unsigned int reg, uint32_t *data)
 		return ERROR_FAIL;
 	}
 
+	if (dmem_is_emulated_ap(ap, &idx))
+		return dmem_emu_ap_q_read(idx, reg, data);
+
 	*data = dmem_get_ap_reg(ap, reg);
 
 	return ERROR_OK;
@@ -96,6 +284,8 @@ static int dmem_ap_q_read(struct adiv5_ap *ap, unsigned int reg, uint32_t *data)
 
 static int dmem_ap_q_write(struct adiv5_ap *ap, unsigned int reg, uint32_t data)
 {
+	unsigned int idx;
+
 	if (is_adiv6(ap->dap)) {
 		static bool error_flagged;
 
@@ -107,6 +297,9 @@ static int dmem_ap_q_write(struct adiv5_ap *ap, unsigned int reg, uint32_t data)
 		return ERROR_FAIL;
 	}
 
+	if (dmem_is_emulated_ap(ap, &idx))
+		return dmem_emu_ap_q_write(idx, reg, data);
+
 	dmem_set_ap_reg(ap, reg, data);
 
 	return ERROR_OK;
@@ -119,7 +312,12 @@ static int dmem_ap_q_abort(struct adiv5_dap *dap, uint8_t *ack)
 
 static int dmem_dp_run(struct adiv5_dap *dap)
 {
-	return ERROR_OK;
+	int retval = dmem_dap_retval;
+
+	/* Clear the error code. */
+	dmem_dap_retval = ERROR_OK;
+
+	return retval;
 }
 
 static int dmem_connect(struct adiv5_dap *dap)
@@ -168,6 +366,34 @@ COMMAND_HANDLER(dmem_dap_ap_offset_command)
 	return ERROR_OK;
 }
 
+COMMAND_HANDLER(dmem_emu_base_address_command)
+{
+	if (CMD_ARGC != 2)
+		return ERROR_COMMAND_SYNTAX_ERROR;
+
+	COMMAND_PARSE_NUMBER(u64, CMD_ARGV[0], dmem_emu_base_address);
+	COMMAND_PARSE_NUMBER(u64, CMD_ARGV[1], dmem_emu_size);
+
+	return ERROR_OK;
+}
+
+COMMAND_HANDLER(dmem_emu_ap_list_command)
+{
+	uint64_t em_ap;
+
+	if (CMD_ARGC < 1 || CMD_ARGC > DMEM_MAX_EMULATE_APS)
+		return ERROR_COMMAND_SYNTAX_ERROR;
+
+	for (unsigned int i = 0; i < CMD_ARGC; i++) {
+		COMMAND_PARSE_NUMBER(u64, CMD_ARGV[i], em_ap);
+		dmem_emu_ap_list[i].ap_num = em_ap;
+	}
+
+	dmem_emu_ap_count = CMD_ARGC;
+
+	return ERROR_OK;
+}
+
 COMMAND_HANDLER(dmem_dap_config_info_command)
 {
 	if (CMD_ARGC != 0)
@@ -179,7 +405,16 @@ COMMAND_HANDLER(dmem_dap_config_info_command)
 	command_print(CMD, " Base Address : 0x%" PRIx64, dmem_dap_base_address);
 	command_print(CMD, " Max APs      : %u", dmem_dap_max_aps);
 	command_print(CMD, " AP offset    : 0x%08" PRIx32, dmem_dap_ap_offset);
-
+	command_print(CMD, " Emulated AP Count : %u", dmem_emu_ap_count);
+
+	if (dmem_emu_ap_count) {
+		command_print(CMD, " Emulated AP details:");
+		command_print(CMD, " Emulated address  : 0x%" PRIx64, dmem_emu_base_address);
+		command_print(CMD, " Emulated size     : 0x%" PRIx64, dmem_emu_size);
+		for (unsigned int i = 0; i < dmem_emu_ap_count; i++)
+			command_print(CMD, " Emulated AP [%u]  : %" PRIx64, i,
+				      dmem_emu_ap_list[i].ap_num);
+	}
 	return ERROR_OK;
 }
 
@@ -219,6 +454,20 @@ static const struct command_registration dmem_dap_subcommand_handlers[] = {
 		.help = "set the maximum number of APs this will support",
 		.usage = "n",
 	},
+	{
+		.name = "emu_ap_list",
+		.handler = dmem_emu_ap_list_command,
+		.mode = COMMAND_CONFIG,
+		.help = "set the list of AP indices to be emulated (upto max)",
+		.usage = "n",
+	},
+	{
+		.name = "emu_base_address_range",
+		.handler = dmem_emu_base_address_command,
+		.mode = COMMAND_CONFIG,
+		.help = "set the base address and size of emulated AP range (all emulated APs access this range)",
+		.usage = "base_address address_window_size",
+	},
 	COMMAND_REGISTRATION_DONE
 };
 
@@ -269,18 +518,45 @@ static int dmem_dap_init(void)
 						 (PROT_READ | PROT_WRITE),
 						 MAP_SHARED, dmem_fd,
 						 dmem_mapped_start);
-
-	close(dmem_fd);
-
 	if (dmem_map_base == MAP_FAILED) {
 		LOG_ERROR("Mapping address 0x%lx for 0x%lx bytes failed!",
 			dmem_mapped_start, dmem_mapped_size);
-		return ERROR_FAIL;
+		goto error_fail;
 	}
 
 	dmem_virt_base_addr = (void *)((uintptr_t)dmem_map_base + start_delta);
 
+	/* Lets Map the emulated address if necessary */
+	if (dmem_emu_ap_count) {
+		dmem_mapped_start = dmem_emu_base_address;
+		dmem_mapped_end = dmem_emu_base_address + dmem_emu_size;
+		/* mmap() requires page aligned offsets */
+		dmem_mapped_start = ALIGN_DOWN(dmem_mapped_start, page_size);
+		dmem_mapped_end = ALIGN_UP(dmem_mapped_end, page_size);
+
+		dmem_emu_mapped_size = dmem_mapped_end - dmem_mapped_start;
+		start_delta = dmem_mapped_start - dmem_emu_base_address;
+
+		dmem_emu_map_base = mmap(NULL,
+									   dmem_emu_mapped_size,
+									   (PROT_READ | PROT_WRITE),
+									   MAP_SHARED, dmem_fd,
+									   dmem_mapped_start);
+		if (dmem_emu_map_base == MAP_FAILED) {
+			LOG_ERROR("Mapping EMU address 0x%lx for 0x%lx bytes failed!",
+					  dmem_emu_base_address, dmem_emu_size);
+			goto error_fail;
+		}
+		dmem_emu_virt_base_addr = (void *)((uintptr_t)dmem_emu_map_base +
+										   start_delta);
+	}
+
+	close(dmem_fd);
 	return ERROR_OK;
+
+error_fail:
+	close(dmem_fd);
+	return ERROR_FAIL;
 }
 
 static int dmem_dap_quit(void)
@@ -288,6 +564,10 @@ static int dmem_dap_quit(void)
 	if (munmap(dmem_map_base, dmem_mapped_size) == -1)
 		LOG_ERROR("%s: Failed to unmap mapped memory!", __func__);
 
+	if (dmem_emu_ap_count
+		&& munmap(dmem_emu_map_base, dmem_emu_mapped_size) == -1)
+		LOG_ERROR("%s: Failed to unmap emu mapped memory!", __func__);
+
 	return ERROR_OK;
 }
 

-----------------------------------------------------------------------

Summary of changes:
 doc/openocd.texi        |  13 +++
 src/jtag/drivers/dmem.c | 292 +++++++++++++++++++++++++++++++++++++++++++++++-
 2 files changed, 299 insertions(+), 6 deletions(-)


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- Log -----------------------------------------------------------------
commit 29a57545f6be5ca3ba31f46447b5226b0f604ea0
Author: Nishanth Menon <nm...@ti...>
Date:   Thu Jul 14 16:37:54 2022 -0500

    jtag/drivers: Add dmem driver
    
    Direct memory driver support for CoreSight Access Port(AP).
    
    Even though we emulate SWD (serial wire debug), we aren't actually
    using swd. Instead, we are using a direct memory access to get to the
    register set. This is similar in approach to other fast access native
    drivers such as am335xgpio drivers.
    
    Example operation on Texas Instrument's AM62x K3 SoC:
    
    +-----------+
    |  OpenOCD  |   SoC mem map
    |    on     |--------------+
    | Cortex-A53|              |
    +-----------+              |
                               |
    +-----------+        +-----v-----+
    |Cortex-M4F |<───────|           |
    +-----------+        |           |
                         |  DebugSS  |
    +-----------+        |           |
    |Cortex-M4F |<───────|           |
    +-----------+        +-----------+
    
    Signed-off-by: Nishanth Menon <nm...@ti...>
    Signed-off-by: Jason Peck <jp...@ti...>
    Change-Id: I8470cb15348863dd844b2c0e3f63a9063cb032c6
    Reviewed-on: https://review.openocd.org/c/openocd/+/7088
    Tested-by: jenkins
    Reviewed-by: Antonio Borneo <bor...@gm...>

diff --git a/configure.ac b/configure.ac
index ecf8384bf..a2442d40b 100644
--- a/configure.ac
+++ b/configure.ac
@@ -242,6 +242,10 @@ AC_ARG_ENABLE([rshim],
   AS_HELP_STRING([--enable-rshim], [Enable building the rshim driver]),
   [build_rshim=$enableval], [build_rshim=no])
 
+AC_ARG_ENABLE([dmem],
+  AS_HELP_STRING([--enable-dmem], [Enable building the dmem driver]),
+  [build_dmem=$enableval], [build_dmem=no])
+
 m4_define([AC_ARG_ADAPTERS], [
   m4_foreach([adapter], [$1],
 	[AC_ARG_ENABLE(ADAPTER_OPT([adapter]),
@@ -358,6 +362,10 @@ AS_CASE([$host_os],
         AC_MSG_ERROR([build_rshim is only available on linux or freebsd])
       ])
     ])
+
+    AS_IF([test "x$build_dmem" = "xyes"], [
+      AC_MSG_ERROR([dmem is only available on linux])
+    ])
 ])
 
 AC_ARG_ENABLE([internal-jimtcl],
@@ -478,6 +486,12 @@ AS_IF([test "x$build_rshim" = "xyes"], [
   AC_DEFINE([BUILD_RSHIM], [0], [0 if you don't want to debug BlueField SoC via rshim.])
 ])
 
+AS_IF([test "x$build_dmem" = "xyes"], [
+  AC_DEFINE([BUILD_DMEM], [1], [1 if you want to debug via Direct Mem.])
+], [
+  AC_DEFINE([BUILD_DMEM], [0], [0 if you don't want to debug via Direct Mem.])
+])
+
 AS_IF([test "x$build_dummy" = "xyes"], [
   build_bitbang=yes
   AC_DEFINE([BUILD_DUMMY], [1], [1 if you want dummy driver.])
@@ -754,6 +768,7 @@ AM_CONDITIONAL([USE_LIBGPIOD], [test "x$use_libgpiod" = "xyes"])
 AM_CONDITIONAL([USE_HIDAPI], [test "x$use_hidapi" = "xyes"])
 AM_CONDITIONAL([USE_LIBJAYLINK], [test "x$use_libjaylink" = "xyes"])
 AM_CONDITIONAL([RSHIM], [test "x$build_rshim" = "xyes"])
+AM_CONDITIONAL([DMEM], [test "x$build_dmem" = "xyes"])
 AM_CONDITIONAL([HAVE_CAPSTONE], [test "x$enable_capstone" != "xno"])
 
 AM_CONDITIONAL([INTERNAL_JIMTCL], [test "x$use_internal_jimtcl" = "xyes"])
diff --git a/doc/openocd.texi b/doc/openocd.texi
index 3348e472b..6f16c9f70 100644
--- a/doc/openocd.texi
+++ b/doc/openocd.texi
@@ -3568,6 +3568,66 @@ espusbjtag chip_id 1
 
 @end deffn
 
+@deffn {Interface Driver} {dmem} Direct Memory access debug interface
+
+The Texas Instruments K3 SoC family provides memory access to DAP
+and coresight control registers. This allows control over the
+microcontrollers directly from one of the processors on the SOC
+itself.
+
+For maximum performance, the driver accesses the debug registers
+directly over the SoC memory map. The memory mapping requires read
+and write permission to kernel memory via "/dev/mem" and assumes that
+the system firewall configurations permit direct access to the debug
+memory space.
+
+@verbatim
++-----------+
+|  OpenOCD  |   SoC mem map (/dev/mem)
+|    on     +--------------+
+| Cortex-A53|              |
++-----------+              |
+                           |
++-----------+        +-----v-----+
+|Cortex-M4F <--------+           |
++-----------+        |           |
+                     |  DebugSS  |
++-----------+        |           |
+|Cortex-M4F <--------+           |
++-----------+        +-----------+
+@end verbatim
+
+NOTE: Firewalls are configurable in K3 SoC and depending on various types of
+device configuration, this function may be blocked out. Typical behavior
+observed in such cases is a firewall exception report on the security
+controller and armv8 processor reporting a system error.
+
+See @file{tcl/interface/ti_k3_am625-swd-native.cfg} for a sample configuration
+file.
+
+@deffn {Command} {dmem info}
+Print the DAPBUS dmem configuration.
+@end deffn
+
+@deffn {Config Command} {dmem device} device_path
+Set the DAPBUS memory access device (default: /dev/mem).
+@end deffn
+
+@deffn {Config Command} {dmem base_address} base_address
+Set the DAPBUS base address which is used to access CoreSight
+compliant Access Ports (APs) directly.
+@end deffn
+
+@deffn {Config Command} {dmem ap_address_offset} offset_address
+Set the address offset between Access Ports (APs).
+@end deffn
+
+@deffn {Config Command} {dmem max_aps} n
+Set the maximum number of valid access ports on the SoC.
+@end deffn
+
+@end deffn
+
 @section Transport Configuration
 @cindex Transport
 As noted earlier, depending on the version of OpenOCD you use,
diff --git a/src/jtag/drivers/Makefile.am b/src/jtag/drivers/Makefile.am
index 4b2dbc44d..e404afe9f 100644
--- a/src/jtag/drivers/Makefile.am
+++ b/src/jtag/drivers/Makefile.am
@@ -161,6 +161,9 @@ endif
 if RSHIM
 DRIVERFILES += %D%/rshim.c
 endif
+if DMEM
+DRIVERFILES += %D%/dmem.c
+endif
 if OSBDM
 DRIVERFILES += %D%/osbdm.c
 endif
diff --git a/src/jtag/drivers/dmem.c b/src/jtag/drivers/dmem.c
new file mode 100644
index 000000000..8d603ad63
--- /dev/null
+++ b/src/jtag/drivers/dmem.c
@@ -0,0 +1,342 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
+/* Copyright (C) 2022 Texas Instruments Incorporated - https://www.ti.com/ */
+
+/**
+ * @file
+ * This file implements support for the Direct memory access to CoreSight
+ * Access Ports (APs) or emulate the same to access CoreSight debug registers
+ * directly.
+ */
+
+#ifdef HAVE_CONFIG_H
+#include "config.h"
+#endif
+
+#include <sys/mman.h>
+
+#include <helper/align.h>
+#include <helper/types.h>
+#include <helper/system.h>
+#include <helper/time_support.h>
+#include <helper/list.h>
+#include <jtag/interface.h>
+
+#include <target/arm_adi_v5.h>
+#include <transport/transport.h>
+
+static void *dmem_map_base, *dmem_virt_base_addr;
+static size_t dmem_mapped_size;
+
+/* Default dmem device. */
+#define DMEM_DEV_PATH_DEFAULT   "/dev/mem"
+static char *dmem_dev_path;
+static uint64_t dmem_dap_base_address;
+static unsigned int dmem_dap_max_aps = 1;
+static uint32_t dmem_dap_ap_offset = 0x100;
+
+/* AP MODE */
+static uint32_t dmem_get_ap_reg_offset(struct adiv5_ap *ap, unsigned int reg)
+{
+	return (dmem_dap_ap_offset * ap->ap_num) + reg;
+}
+
+static void dmem_set_ap_reg(struct adiv5_ap *ap, unsigned int reg, uint32_t val)
+{
+	*(volatile uint32_t *)((uintptr_t)dmem_virt_base_addr +
+						   dmem_get_ap_reg_offset(ap, reg)) = val;
+}
+
+static uint32_t dmem_get_ap_reg(struct adiv5_ap *ap, unsigned int reg)
+{
+	return *(volatile uint32_t *)((uintptr_t)dmem_virt_base_addr +
+								  dmem_get_ap_reg_offset(ap, reg));
+}
+
+static int dmem_dp_q_read(struct adiv5_dap *dap, unsigned int reg, uint32_t *data)
+{
+	if (!data)
+		return ERROR_OK;
+
+	switch (reg) {
+		case DP_CTRL_STAT:
+			*data = CDBGPWRUPACK | CSYSPWRUPACK;
+			break;
+
+		default:
+			*data = 0;
+			break;
+	}
+
+	return ERROR_OK;
+}
+
+static int dmem_dp_q_write(struct adiv5_dap *dap, unsigned int reg, uint32_t data)
+{
+	return ERROR_OK;
+}
+
+static int dmem_ap_q_read(struct adiv5_ap *ap, unsigned int reg, uint32_t *data)
+{
+	if (is_adiv6(ap->dap)) {
+		static bool error_flagged;
+
+		if (!error_flagged)
+			LOG_ERROR("ADIv6 dap not supported by dmem dap-direct mode");
+
+		error_flagged = true;
+
+		return ERROR_FAIL;
+	}
+
+	*data = dmem_get_ap_reg(ap, reg);
+
+	return ERROR_OK;
+}
+
+static int dmem_ap_q_write(struct adiv5_ap *ap, unsigned int reg, uint32_t data)
+{
+	if (is_adiv6(ap->dap)) {
+		static bool error_flagged;
+
+		if (!error_flagged)
+			LOG_ERROR("ADIv6 dap not supported by dmem dap-direct mode");
+
+		error_flagged = true;
+
+		return ERROR_FAIL;
+	}
+
+	dmem_set_ap_reg(ap, reg, data);
+
+	return ERROR_OK;
+}
+
+static int dmem_ap_q_abort(struct adiv5_dap *dap, uint8_t *ack)
+{
+	return ERROR_OK;
+}
+
+static int dmem_dp_run(struct adiv5_dap *dap)
+{
+	return ERROR_OK;
+}
+
+static int dmem_connect(struct adiv5_dap *dap)
+{
+	return ERROR_OK;
+}
+
+COMMAND_HANDLER(dmem_dap_device_command)
+{
+	if (CMD_ARGC != 1)
+		return ERROR_COMMAND_SYNTAX_ERROR;
+
+	free(dmem_dev_path);
+	dmem_dev_path = strdup(CMD_ARGV[0]);
+
+	return ERROR_OK;
+}
+
+COMMAND_HANDLER(dmem_dap_base_address_command)
+{
+	if (CMD_ARGC != 1)
+		return ERROR_COMMAND_SYNTAX_ERROR;
+
+	COMMAND_PARSE_NUMBER(u64, CMD_ARGV[0], dmem_dap_base_address);
+
+	return ERROR_OK;
+}
+
+COMMAND_HANDLER(dmem_dap_max_aps_command)
+{
+	if (CMD_ARGC != 1)
+		return ERROR_COMMAND_SYNTAX_ERROR;
+
+	COMMAND_PARSE_NUMBER(u32, CMD_ARGV[0], dmem_dap_max_aps);
+
+	return ERROR_OK;
+}
+
+COMMAND_HANDLER(dmem_dap_ap_offset_command)
+{
+	if (CMD_ARGC != 1)
+		return ERROR_COMMAND_SYNTAX_ERROR;
+
+	COMMAND_PARSE_NUMBER(u32, CMD_ARGV[0], dmem_dap_ap_offset);
+
+	return ERROR_OK;
+}
+
+COMMAND_HANDLER(dmem_dap_config_info_command)
+{
+	if (CMD_ARGC != 0)
+		return ERROR_COMMAND_SYNTAX_ERROR;
+
+	command_print(CMD, "dmem (Direct Memory) AP Adapter Configuration:");
+	command_print(CMD, " Device       : %s",
+				  dmem_dev_path ? dmem_dev_path : DMEM_DEV_PATH_DEFAULT);
+	command_print(CMD, " Base Address : 0x%" PRIx64, dmem_dap_base_address);
+	command_print(CMD, " Max APs      : %u", dmem_dap_max_aps);
+	command_print(CMD, " AP offset    : 0x%08" PRIx32, dmem_dap_ap_offset);
+
+	return ERROR_OK;
+}
+
+static const struct command_registration dmem_dap_subcommand_handlers[] = {
+	{
+		.name = "info",
+		.handler = dmem_dap_config_info_command,
+		.mode = COMMAND_ANY,
+		.help = "print the config info",
+		.usage = "",
+	},
+	{
+		.name = "device",
+		.handler = dmem_dap_device_command,
+		.mode = COMMAND_CONFIG,
+		.help = "set the dmem memory access device (default: /dev/mem)",
+		.usage = "device_path",
+	},
+	{
+		.name = "base_address",
+		.handler = dmem_dap_base_address_command,
+		.mode = COMMAND_CONFIG,
+		.help = "set the dmem dap AP memory map base address",
+		.usage = "base_address",
+	},
+	{
+		.name = "ap_address_offset",
+		.handler = dmem_dap_ap_offset_command,
+		.mode = COMMAND_CONFIG,
+		.help = "set the offsets of each ap index",
+		.usage = "offset_address",
+	},
+	{
+		.name = "max_aps",
+		.handler = dmem_dap_max_aps_command,
+		.mode = COMMAND_CONFIG,
+		.help = "set the maximum number of APs this will support",
+		.usage = "n",
+	},
+	COMMAND_REGISTRATION_DONE
+};
+
+static const struct command_registration dmem_dap_command_handlers[] = {
+	{
+		.name = "dmem",
+		.mode = COMMAND_ANY,
+		.help = "Perform dmem (Direct Memory) DAP management and configuration",
+		.chain = dmem_dap_subcommand_handlers,
+		.usage = "",
+	},
+	COMMAND_REGISTRATION_DONE
+};
+
+static int dmem_dap_init(void)
+{
+	char *path = dmem_dev_path ? dmem_dev_path : DMEM_DEV_PATH_DEFAULT;
+	uint32_t dmem_total_memory_window_size;
+	long page_size = sysconf(_SC_PAGESIZE);
+	size_t dmem_mapped_start, dmem_mapped_end;
+	long start_delta;
+	int dmem_fd;
+
+	if (!dmem_dap_base_address) {
+		LOG_ERROR("dmem DAP Base address NOT set? value is 0");
+		return ERROR_FAIL;
+	}
+
+	dmem_fd = open(path, O_RDWR | O_SYNC);
+	if (dmem_fd == -1) {
+		LOG_ERROR("Unable to open %s", path);
+		return ERROR_FAIL;
+	}
+
+	dmem_total_memory_window_size = (dmem_dap_max_aps + 1) * dmem_dap_ap_offset;
+
+	dmem_mapped_start = dmem_dap_base_address;
+	dmem_mapped_end = dmem_dap_base_address + dmem_total_memory_window_size;
+	 /* mmap() requires page aligned offsets */
+	dmem_mapped_start = ALIGN_DOWN(dmem_mapped_start, page_size);
+	dmem_mapped_end = ALIGN_UP(dmem_mapped_end, page_size);
+
+	dmem_mapped_size = dmem_mapped_end - dmem_mapped_start;
+	start_delta = dmem_mapped_start - dmem_dap_base_address;
+
+	dmem_map_base = mmap(NULL,
+						 dmem_mapped_size,
+						 (PROT_READ | PROT_WRITE),
+						 MAP_SHARED, dmem_fd,
+						 dmem_mapped_start);
+
+	close(dmem_fd);
+
+	if (dmem_map_base == MAP_FAILED) {
+		LOG_ERROR("Mapping address 0x%lx for 0x%lx bytes failed!",
+			dmem_mapped_start, dmem_mapped_size);
+		return ERROR_FAIL;
+	}
+
+	dmem_virt_base_addr = (void *)((uintptr_t)dmem_map_base + start_delta);
+
+	return ERROR_OK;
+}
+
+static int dmem_dap_quit(void)
+{
+	if (munmap(dmem_map_base, dmem_mapped_size) == -1)
+		LOG_ERROR("%s: Failed to unmap mapped memory!", __func__);
+
+	return ERROR_OK;
+}
+
+static int dmem_dap_reset(int req_trst, int req_srst)
+{
+	return ERROR_OK;
+}
+
+static int dmem_dap_speed(int speed)
+{
+	return ERROR_OK;
+}
+
+static int dmem_dap_khz(int khz, int *jtag_speed)
+{
+	*jtag_speed = khz;
+	return ERROR_OK;
+}
+
+static int dmem_dap_speed_div(int speed, int *khz)
+{
+	*khz = speed;
+	return ERROR_OK;
+}
+
+/* DAP operations. */
+static const struct dap_ops dmem_dap_ops = {
+	.connect = dmem_connect,
+	.queue_dp_read = dmem_dp_q_read,
+	.queue_dp_write = dmem_dp_q_write,
+	.queue_ap_read = dmem_ap_q_read,
+	.queue_ap_write = dmem_ap_q_write,
+	.queue_ap_abort = dmem_ap_q_abort,
+	.run = dmem_dp_run,
+};
+
+static const char *const dmem_dap_transport[] = { "dapdirect_swd", NULL };
+
+struct adapter_driver dmem_dap_adapter_driver = {
+	.name = "dmem",
+	.transports = dmem_dap_transport,
+	.commands = dmem_dap_command_handlers,
+
+	.init = dmem_dap_init,
+	.quit = dmem_dap_quit,
+	.reset = dmem_dap_reset,
+	.speed = dmem_dap_speed,
+	.khz = dmem_dap_khz,
+	.speed_div = dmem_dap_speed_div,
+
+	.dap_swd_ops = &dmem_dap_ops,
+};
diff --git a/src/jtag/interface.h b/src/jtag/interface.h
index 25ae7e8a1..3df424086 100644
--- a/src/jtag/interface.h
+++ b/src/jtag/interface.h
@@ -370,6 +370,7 @@ extern struct adapter_driver at91rm9200_adapter_driver;
 extern struct adapter_driver bcm2835gpio_adapter_driver;
 extern struct adapter_driver buspirate_adapter_driver;
 extern struct adapter_driver cmsis_dap_adapter_driver;
+extern struct adapter_driver dmem_dap_adapter_driver;
 extern struct adapter_driver dummy_adapter_driver;
 extern struct adapter_driver ep93xx_adapter_driver;
 extern struct adapter_driver esp_usb_adapter_driver;
diff --git a/src/jtag/interfaces.c b/src/jtag/interfaces.c
index aa0ad3ade..c24ead8cd 100644
--- a/src/jtag/interfaces.c
+++ b/src/jtag/interfaces.c
@@ -147,6 +147,9 @@ struct adapter_driver *adapter_drivers[] = {
 #if BUILD_RSHIM == 1
 		&rshim_dap_adapter_driver,
 #endif
+#if BUILD_DMEM == 1
+		&dmem_dap_adapter_driver,
+#endif
 #if BUILD_AM335XGPIO == 1
 		&am335xgpio_adapter_driver,
 #endif

-----------------------------------------------------------------------

Summary of changes:
 configure.ac                 |  15 ++
 doc/openocd.texi             |  60 ++++++++
 src/jtag/drivers/Makefile.am |   3 +
 src/jtag/drivers/dmem.c      | 342 +++++++++++++++++++++++++++++++++++++++++++
 src/jtag/interface.h         |   1 +
 src/jtag/interfaces.c        |   3 +
 6 files changed, 424 insertions(+)
 create mode 100644 src/jtag/drivers/dmem.c


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- Log -----------------------------------------------------------------
commit 02e4d7195ce9cdb3144fcc6d3a42134e2e8361b6
Author: Jason Kacines <j-k...@ti...>
Date:   Tue Aug 8 15:37:38 2023 -0500

    tcl/board: add TI am62a7evm config
    
    Add basic connection details with am625 SK/EVM
    
    For further details, see https://www.ti.com/tool/SK-AM62A-LP
    
    Change-Id: I0b6b4004f3a04be7a90207e44c588a4f68aff47a
    Signed-off-by: Jason Kacines <j-k...@ti...>
    Signed-off-by: Nishanth Menon <nm...@ti...>
    Reviewed-on: https://review.openocd.org/c/openocd/+/7855
    Reviewed-by: Antonio Borneo <bor...@gm...>
    Reviewed-by: Tomas Vanek <va...@fb...>
    Tested-by: jenkins

diff --git a/tcl/board/ti_am62a7evm.cfg b/tcl/board/ti_am62a7evm.cfg
new file mode 100644
index 000000000..e40790950
--- /dev/null
+++ b/tcl/board/ti_am62a7evm.cfg
@@ -0,0 +1,25 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+# Copyright (C) 2023 Texas Instruments Incorporated - http://www.ti.com/
+#
+# Texas Instruments am62a7 EVM/SK
+# Link: https://www.ti.com/tool/SK-AM62A-LP
+#
+
+# AM62a7 EVM/SK has an xds110 onboard.
+source [find interface/xds110.cfg]
+
+transport select jtag
+
+# default JTAG configuration has only SRST and no TRST
+reset_config srst_only srst_push_pull
+
+# delay after SRST goes inactive
+adapter srst delay 20
+
+if { ![info exists SOC] } {
+	set SOC am62a7
+}
+
+source [find target/ti_k3.cfg]
+
+adapter speed 2500

commit 627e949fc67eb7e77dd9fb3c51d3e0e8899e04ea
Author: Jason Kacines <j-k...@ti...>
Date:   Wed Aug 9 09:10:13 2023 -0500

    tcl/target/ti_k3: Add AM62A7 SoC
    
    Add support for the TI K3 family AM62A7 SoC.
    
    For further details, see https://www.ti.com/lit/pdf/spruj16a
    
    Change-Id: Ie69bde4895f34b04f9967f63d1ca9c8149c50b8a
    Signed-off-by: Jason Kacines <j-k...@ti...>
    Signed-off-by: Nishanth Menon <nm...@ti...>
    Reviewed-on: https://review.openocd.org/c/openocd/+/7854
    Reviewed-by: Antonio Borneo <bor...@gm...>
    Reviewed-by: Tomas Vanek <va...@fb...>
    Tested-by: jenkins

diff --git a/tcl/target/ti_k3.cfg b/tcl/target/ti_k3.cfg
index 20b78ba89..99b5b51a3 100644
--- a/tcl/target/ti_k3.cfg
+++ b/tcl/target/ti_k3.cfg
@@ -14,6 +14,8 @@
 #  Has 2 ARMV8 Cores and 4 R5 Cores, M4F and an M3
 # * AM625: https://www.ti.com/lit/pdf/spruiv7a
 #  Has 4 ARMV8 Cores and 1 R5 Core and an M4F
+# * AM62a7: https://www.ti.com/lit/pdf/spruj16a
+#  Has 4 ARMV8 Cores and 2 R5 Cores
 #
 
 source [find target/swj-dp.tcl]
@@ -119,6 +121,27 @@ switch $_soc {
 		set _gp_mcu_cores 1
 		set _gp_mcu_ap_unlock_offsets {0xf0 0x7c}
 	}
+	am62a7 {
+		set _CHIPNAME am62a7
+		set _K3_DAP_TAPID 0x0bb8d02f
+
+		# AM62a7 has 1 clusters of 4 A53 cores.
+		set _armv8_cpu_name a53
+		set _armv8_cores 4
+		set ARMV8_DBGBASE {0x90010000 0x90110000 0x90210000 0x90310000}
+		set ARMV8_CTIBASE {0x90020000 0x90120000 0x90220000 0x90320000}
+
+		# AM62a7 has 2 cluster of 1 R5s core.
+		set _r5_cores 2
+		set R5_NAMES {main0_r5.0 mcu0_r5.0}
+		set R5_DBGBASE {0x9d410000 0x9d810000}
+		set R5_CTIBASE {0x9d418000 0x9d818000}
+
+		# sysctrl CTI base
+		set CM3_CTIBASE {0x20001000}
+		# Sysctrl power-ap unlock offsets
+		set _sysctrl_ap_unlock_offsets {0xf0 0x78}
+	}
 	j721e {
 		set _CHIPNAME j721e
 		set _K3_DAP_TAPID 0x0bb6402f

-----------------------------------------------------------------------

Summary of changes:
 tcl/board/{ti_j721s2evm.cfg => ti_am62a7evm.cfg} | 10 +++++-----
 tcl/target/ti_k3.cfg                             | 23 +++++++++++++++++++++++
 2 files changed, 28 insertions(+), 5 deletions(-)
 copy tcl/board/{ti_j721s2evm.cfg => ti_am62a7evm.cfg} (63%)


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- Log -----------------------------------------------------------------
commit 154d7f5e185d80a4e49920bed917551b76ace858
Author: Jason Kacines <j-k...@ti...>
Date:   Wed Aug 9 09:07:28 2023 -0500

    tcl/target/ti_k3: Add missing documentation for supported SoCs
    
    Add links for the SoCs are supported by the conf file for future
    reference.
    
    Change-Id: Ic5b7786ef3ac31414fe2ce56c1237a18ce99aaa1
    Signed-off-by: Jason Kacines <j-k...@ti...>
    Signed-off-by: Nishanth Menon <nm...@ti...>
    Reviewed-on: https://review.openocd.org/c/openocd/+/7853
    Tested-by: jenkins
    Reviewed-by: Antonio Borneo <bor...@gm...>
    Reviewed-by: Tomas Vanek <va...@fb...>

diff --git a/tcl/target/ti_k3.cfg b/tcl/target/ti_k3.cfg
index 2454357fc..20b78ba89 100644
--- a/tcl/target/ti_k3.cfg
+++ b/tcl/target/ti_k3.cfg
@@ -8,8 +8,12 @@
 #  Has 2 ARMV8 Cores and 6 R5 Cores and an M3
 # * J7200: https://www.ti.com/lit/pdf/spruiu1
 #  Has 2 ARMV8 Cores and 4 R5 Cores and an M3
+# * J721S2: https://www.ti.com/lit/pdf/spruj28
+#  Has 2 ARMV8 Cores and 6 R5 Cores and an M4F
 # * AM642: https://www.ti.com/lit/pdf/spruim2
 #  Has 2 ARMV8 Cores and 4 R5 Cores, M4F and an M3
+# * AM625: https://www.ti.com/lit/pdf/spruiv7a
+#  Has 4 ARMV8 Cores and 1 R5 Core and an M4F
 #
 
 source [find target/swj-dp.tcl]

-----------------------------------------------------------------------

Summary of changes:
 tcl/target/ti_k3.cfg | 4 ++++
 1 file changed, 4 insertions(+)


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- Log -----------------------------------------------------------------
commit c213ffe85fc6bfb5e199fa9ed994f8984c4cf0c9
Author: Bruno Mendes <bd_...@ou...>
Date:   Tue Aug 8 15:19:41 2023 +0100

    rtos/zephyr: arm: fetch arm exc return offset
    
    Since zephyrproject-rtos/zephyr@c3eeae8,
    Zephyr OS exposes offset of mode_exc_return in the arch struct for ARM.
    
    Accounting for this allows for consistency and enables
    logic with further offsets that may be added after this.
    
    Signed-off-by: Bruno Mendes <bd_...@ou...>
    Change-Id: Id53ebd80c5d98a7d94eb6b00ad638ce51e719822
    Reviewed-on: https://review.openocd.org/c/openocd/+/7851
    Reviewed-by: Antonio Borneo <bor...@gm...>
    Tested-by: jenkins

diff --git a/src/rtos/zephyr.c b/src/rtos/zephyr.c
index 934a8dd1c..a4c60904b 100644
--- a/src/rtos/zephyr.c
+++ b/src/rtos/zephyr.c
@@ -57,6 +57,7 @@ enum zephyr_offsets {
 	OFFSET_T_ARCH,
 	OFFSET_T_PREEMPT_FLOAT,
 	OFFSET_T_COOP_FLOAT,
+	OFFSET_T_ARM_EXC_RETURN,
 	OFFSET_MAX
 };
 

-----------------------------------------------------------------------

Summary of changes:
 src/rtos/zephyr.c | 1 +
 1 file changed, 1 insertion(+)


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commit c76e30c8bc2c1c14c06b18e66fd211c64835dbe4
Author: Karl Palsson <ka...@tw...>
Date:   Tue Aug 1 00:02:36 2023 +0000

    tcl/target: add Realtek RTL872xD config
    
    Sufficient to probe both cores via multiple APs.
    No support listed for jtag in the datasheet or usermanual.
    Tested against a BW-16 board:
      https://www.amebaiot.com/en/amebad/#partner_bw16
    
    Change-Id: Idf82085e7b7327fdf3d6d668e6fb59eff6e0431b
    Signed-off-by: Karl Palsson <ka...@tw...>
    Reviewed-on: https://review.openocd.org/c/openocd/+/7847
    Reviewed-by: Antonio Borneo <bor...@gm...>
    Tested-by: jenkins

diff --git a/tcl/target/rtl872xd.cfg b/tcl/target/rtl872xd.cfg
new file mode 100644
index 000000000..65730e217
--- /dev/null
+++ b/tcl/target/rtl872xd.cfg
@@ -0,0 +1,33 @@
+# SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+# Realtek RTL872xD (ARM Cortex-M33 + M23, wifi+bt dualband soc)
+
+# HLA does not support AP other than 0
+if { [using_hla] } {
+        echo "ERROR: HLA transport cannot work with this target."
+        shutdown
+}
+
+source [find target/swj-dp.tcl]
+
+if { [info exists CHIPNAME] } {
+        set _CHIPNAME $CHIPNAME
+} else {
+        set _CHIPNAME rtl872xd
+}
+
+if { [info exists CPUTAPID] } {
+        set _CPUTAPID $CPUTAPID
+} else {
+        set _CPUTAPID 0x6ba02477
+}
+
+swj_newdap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
+dap create $_CHIPNAME.dap -chain-position $_CHIPNAME.cpu
+
+set _TARGETNAME $_CHIPNAME.cpu
+target create $_TARGETNAME.km0 cortex_m -endian little -dap $_CHIPNAME.dap -ap-num 1
+target create $_TARGETNAME.km4 cortex_m -endian little -dap $_CHIPNAME.dap -ap-num 2
+
+cortex_m reset_config sysresetreq
+
+adapter speed 1000

-----------------------------------------------------------------------

Summary of changes:
 tcl/target/rtl872xd.cfg | 33 +++++++++++++++++++++++++++++++++
 1 file changed, 33 insertions(+)
 create mode 100644 tcl/target/rtl872xd.cfg


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- Log -----------------------------------------------------------------
commit 3182a1398a02a930396bd0192bda2a9ed3dacd6f
Author: Karl Palsson <ka...@tw...>
Date:   Wed Aug 2 21:42:08 2023 +0000

    target/cortex_m: Add Realtek Real-M200 and M300
    
    These cores are advertised as M23 and M33 compatible, but are identified
    by the Realtek implementor id.  These cores are found on the RTL872xD
    family, at least.
    
    Raw CPUIDs:
    Real-M200 (KM0): 721cd200
    Real-M300 (KM4): 721fd220
    
    Change-Id: I4106ccb7e8c562f98072a71e9e818f57999d664e
    Signed-off-by: Karl Palsson <ka...@tw...>
    Reviewed-on: https://review.openocd.org/c/openocd/+/7846
    Tested-by: jenkins
    Reviewed-by: Antonio Borneo <bor...@gm...>

diff --git a/src/target/arm.h b/src/target/arm.h
index f3abd6cba..28e533019 100644
--- a/src/target/arm.h
+++ b/src/target/arm.h
@@ -61,6 +61,7 @@ enum arm_arch {
 /** Known ARM implementor IDs */
 enum arm_implementor {
 	ARM_IMPLEMENTOR_ARM = 0x41,
+	ARM_IMPLEMENTOR_REALTEK = 0x72,
 };
 
 /**
diff --git a/src/target/cortex_m.c b/src/target/cortex_m.c
index 87a884552..014ceaeba 100644
--- a/src/target/cortex_m.c
+++ b/src/target/cortex_m.c
@@ -111,6 +111,17 @@ static const struct cortex_m_part_info cortex_m_parts[] = {
 		.arch = ARM_ARCH_V8M,
 		.flags = CORTEX_M_F_HAS_FPV5,
 	},
+	{
+		.impl_part = REALTEK_M200_PARTNO,
+		.name = "Real-M200 (KM0)",
+		.arch = ARM_ARCH_V8M,
+	},
+	{
+		.impl_part = REALTEK_M300_PARTNO,
+		.name = "Real-M300 (KM4)",
+		.arch = ARM_ARCH_V8M,
+		.flags = CORTEX_M_F_HAS_FPV5,
+	},
 };
 
 /* forward declarations */
diff --git a/src/target/cortex_m.h b/src/target/cortex_m.h
index 806ff5910..b5d1da7f2 100644
--- a/src/target/cortex_m.h
+++ b/src/target/cortex_m.h
@@ -56,6 +56,8 @@ enum cortex_m_impl_part {
 	CORTEX_M33_PARTNO  = ARM_MAKE_CPUID(ARM_IMPLEMENTOR_ARM, 0xD21),
 	CORTEX_M35P_PARTNO = ARM_MAKE_CPUID(ARM_IMPLEMENTOR_ARM, 0xD31),
 	CORTEX_M55_PARTNO  = ARM_MAKE_CPUID(ARM_IMPLEMENTOR_ARM, 0xD22),
+	REALTEK_M200_PARTNO = ARM_MAKE_CPUID(ARM_IMPLEMENTOR_REALTEK, 0xd20),
+	REALTEK_M300_PARTNO = ARM_MAKE_CPUID(ARM_IMPLEMENTOR_REALTEK, 0xd22),
 };
 
 /* Relevant Cortex-M flags, used in struct cortex_m_part_info.flags */

commit 05ee88915520d1dd82da94a016a9374a1f3a8129
Author: Karl Palsson <ka...@tw...>
Date:   Wed Aug 2 21:38:58 2023 +0000

    target/cortex_m: check core implementor field
    
    Presently, we only look at the Part Number field of the CPUID, and
    completely ignore the Implmentor field, simply assuming it to be ARM.
    
    Parts have since been found, with different implementors, that use
    overlapping part numbers, causing detection to fail.
    
    Expand the "part number" field to be a full implementor+part number,
    excluding the revision/patch fields, to make checking more reliable.
    
    Change-Id: Id81774f829104f57a0c105320d0d2e479fa01522
    Signed-off-by: Karl Palsson <ka...@tw...>
    Reviewed-on: https://review.openocd.org/c/openocd/+/7845
    Tested-by: jenkins
    Reviewed-by: Antonio Borneo <bor...@gm...>
    Reviewed-by: Tomas Vanek <va...@fb...>

diff --git a/src/flash/nor/stm32f1x.c b/src/flash/nor/stm32f1x.c
index ab1ef2aef..b3bb84335 100644
--- a/src/flash/nor/stm32f1x.c
+++ b/src/flash/nor/stm32f1x.c
@@ -743,7 +743,7 @@ static int stm32x_get_property_addr(struct target *target, struct stm32x_propert
 		return ERROR_TARGET_NOT_EXAMINED;
 	}
 
-	switch (cortex_m_get_partno_safe(target)) {
+	switch (cortex_m_get_impl_part(target)) {
 	case CORTEX_M0_PARTNO: /* STM32F0x devices */
 		addr->device_id = 0x40015800;
 		addr->flash_size = 0x1FFFF7CC;
diff --git a/src/flash/nor/stm32f2x.c b/src/flash/nor/stm32f2x.c
index dcaf260d9..2e0d15897 100644
--- a/src/flash/nor/stm32f2x.c
+++ b/src/flash/nor/stm32f2x.c
@@ -961,7 +961,7 @@ static int stm32x_get_device_id(struct flash_bank *bank, uint32_t *device_id)
 		return retval;
 
 	if ((*device_id & 0xfff) == 0x411
-			&& cortex_m_get_partno_safe(target) == CORTEX_M4_PARTNO) {
+			&& cortex_m_get_impl_part(target) == CORTEX_M4_PARTNO) {
 		*device_id &= ~((0xFFFF << 16) | 0xfff);
 		*device_id |= (0x1000 << 16) | 0x413;
 		LOG_INFO("stm32f4x errata detected - fixing incorrect MCU_IDCODE");
diff --git a/src/flash/nor/stm32h7x.c b/src/flash/nor/stm32h7x.c
index 8be803728..21618b39b 100644
--- a/src/flash/nor/stm32h7x.c
+++ b/src/flash/nor/stm32h7x.c
@@ -795,7 +795,7 @@ static int stm32x_probe(struct flash_bank *bank)
 	/* STM32H74x/H75x, the second core (Cortex-M4) cannot read the flash size */
 	retval = ERROR_FAIL;
 	if (device_id == DEVID_STM32H74_H75XX
-			&& cortex_m_get_partno_safe(target) == CORTEX_M4_PARTNO)
+			&& cortex_m_get_impl_part(target) == CORTEX_M4_PARTNO)
 		LOG_WARNING("%s cannot read the flash size register", target_name(target));
 	else
 		retval = target_read_u16(target, stm32x_info->part_info->fsize_addr, &flash_size_in_kb);
diff --git a/src/flash/nor/stm32l4x.c b/src/flash/nor/stm32l4x.c
index 77a89f53c..4414cf539 100644
--- a/src/flash/nor/stm32l4x.c
+++ b/src/flash/nor/stm32l4x.c
@@ -1682,7 +1682,7 @@ static int stm32l4_read_idcode(struct flash_bank *bank, uint32_t *id)
 
 	/* CPU2 (Cortex-M0+) is supported only with non-hla adapters because it is on AP1.
 	 * Using HLA adapters armv7m.debug_ap is null, and checking ap_num triggers a segfault */
-	if (cortex_m_get_partno_safe(target) == CORTEX_M0P_PARTNO &&
+	if (cortex_m_get_impl_part(target) == CORTEX_M0P_PARTNO &&
 			armv7m->debug_ap && armv7m->debug_ap->ap_num == 1) {
 		uint32_t uid64_ids;
 
diff --git a/src/target/arm.h b/src/target/arm.h
index fd61d5f51..f3abd6cba 100644
--- a/src/target/arm.h
+++ b/src/target/arm.h
@@ -58,6 +58,11 @@ enum arm_arch {
 	ARM_ARCH_V8M,
 };
 
+/** Known ARM implementor IDs */
+enum arm_implementor {
+	ARM_IMPLEMENTOR_ARM = 0x41,
+};
+
 /**
  * Represent state of an ARM core.
  *
diff --git a/src/target/cortex_m.c b/src/target/cortex_m.c
index 987dc9b24..87a884552 100644
--- a/src/target/cortex_m.c
+++ b/src/target/cortex_m.c
@@ -50,63 +50,63 @@
 /* Supported Cortex-M Cores */
 static const struct cortex_m_part_info cortex_m_parts[] = {
 	{
-		.partno = CORTEX_M0_PARTNO,
+		.impl_part = CORTEX_M0_PARTNO,
 		.name = "Cortex-M0",
 		.arch = ARM_ARCH_V6M,
 	},
 	{
-		.partno = CORTEX_M0P_PARTNO,
+		.impl_part = CORTEX_M0P_PARTNO,
 		.name = "Cortex-M0+",
 		.arch = ARM_ARCH_V6M,
 	},
 	{
-		.partno = CORTEX_M1_PARTNO,
+		.impl_part = CORTEX_M1_PARTNO,
 		.name = "Cortex-M1",
 		.arch = ARM_ARCH_V6M,
 	},
 	{
-		.partno = CORTEX_M3_PARTNO,
+		.impl_part = CORTEX_M3_PARTNO,
 		.name = "Cortex-M3",
 		.arch = ARM_ARCH_V7M,
 		.flags = CORTEX_M_F_TAR_AUTOINCR_BLOCK_4K,
 	},
 	{
-		.partno = CORTEX_M4_PARTNO,
+		.impl_part = CORTEX_M4_PARTNO,
 		.name = "Cortex-M4",
 		.arch = ARM_ARCH_V7M,
 		.flags = CORTEX_M_F_HAS_FPV4 | CORTEX_M_F_TAR_AUTOINCR_BLOCK_4K,
 	},
 	{
-		.partno = CORTEX_M7_PARTNO,
+		.impl_part = CORTEX_M7_PARTNO,
 		.name = "Cortex-M7",
 		.arch = ARM_ARCH_V7M,
 		.flags = CORTEX_M_F_HAS_FPV5,
 	},
 	{
-		.partno = CORTEX_M23_PARTNO,
+		.impl_part = CORTEX_M23_PARTNO,
 		.name = "Cortex-M23",
 		.arch = ARM_ARCH_V8M,
 	},
 	{
-		.partno = CORTEX_M33_PARTNO,
+		.impl_part = CORTEX_M33_PARTNO,
 		.name = "Cortex-M33",
 		.arch = ARM_ARCH_V8M,
 		.flags = CORTEX_M_F_HAS_FPV5,
 	},
 	{
-		.partno = CORTEX_M35P_PARTNO,
+		.impl_part = CORTEX_M35P_PARTNO,
 		.name = "Cortex-M35P",
 		.arch = ARM_ARCH_V8M,
 		.flags = CORTEX_M_F_HAS_FPV5,
 	},
 	{
-		.partno = CORTEX_M55_PARTNO,
+		.impl_part = CORTEX_M55_PARTNO,
 		.name = "Cortex-M55",
 		.arch = ARM_ARCH_V8M,
 		.flags = CORTEX_M_F_HAS_FPV5,
 	},
 	{
-		.partno = STAR_MC1_PARTNO,
+		.impl_part = STAR_MC1_PARTNO,
 		.name = "STAR-MC1",
 		.arch = ARM_ARCH_V8M,
 		.flags = CORTEX_M_F_HAS_FPV5,
@@ -2526,18 +2526,18 @@ int cortex_m_examine(struct target *target)
 		if (retval != ERROR_OK)
 			return retval;
 
-		/* Get ARCH and CPU types */
-		const enum cortex_m_partno core_partno = (cpuid & ARM_CPUID_PARTNO_MASK) >> ARM_CPUID_PARTNO_POS;
+		/* Inspect implementor/part to look for recognized cores  */
+		unsigned int impl_part = cpuid & (ARM_CPUID_IMPLEMENTOR_MASK | ARM_CPUID_PARTNO_MASK);
 
 		for (unsigned int n = 0; n < ARRAY_SIZE(cortex_m_parts); n++) {
-			if (core_partno == cortex_m_parts[n].partno) {
+			if (impl_part == cortex_m_parts[n].impl_part) {
 				cortex_m->core_info = &cortex_m_parts[n];
 				break;
 			}
 		}
 
 		if (!cortex_m->core_info) {
-			LOG_TARGET_ERROR(target, "Cortex-M PARTNO 0x%x is unrecognized", core_partno);
+			LOG_TARGET_ERROR(target, "Cortex-M CPUID: 0x%x is unrecognized", cpuid);
 			return ERROR_FAIL;
 		}
 
@@ -2549,7 +2549,7 @@ int cortex_m_examine(struct target *target)
 				(uint8_t)((cpuid >> 0) & 0xf));
 
 		cortex_m->maskints_erratum = false;
-		if (core_partno == CORTEX_M7_PARTNO) {
+		if (impl_part == CORTEX_M7_PARTNO) {
 			uint8_t rev, patch;
 			rev = (cpuid >> 20) & 0xf;
 			patch = (cpuid >> 0) & 0xf;
diff --git a/src/target/cortex_m.h b/src/target/cortex_m.h
index a1c43b56d..806ff5910 100644
--- a/src/target/cortex_m.h
+++ b/src/target/cortex_m.h
@@ -31,22 +31,31 @@
 
 #define CPUID		0xE000ED00
 
-#define ARM_CPUID_PARTNO_POS    4
-#define ARM_CPUID_PARTNO_MASK	(0xFFF << ARM_CPUID_PARTNO_POS)
+#define ARM_CPUID_IMPLEMENTOR_POS	24
+#define ARM_CPUID_IMPLEMENTOR_MASK	(0xFF << ARM_CPUID_IMPLEMENTOR_POS)
+#define ARM_CPUID_PARTNO_POS		4
+#define ARM_CPUID_PARTNO_MASK		(0xFFF << ARM_CPUID_PARTNO_POS)
 
-enum cortex_m_partno {
+#define ARM_MAKE_CPUID(impl, partno)	((((impl) << ARM_CPUID_IMPLEMENTOR_POS) & ARM_CPUID_IMPLEMENTOR_MASK) | \
+	(((partno) << ARM_CPUID_PARTNO_POS)  & ARM_CPUID_PARTNO_MASK))
+
+/** Known Arm Cortex masked CPU Ids
+ * This includes the implementor and part number, but _not_ the revision or
+ * patch fields.
+ */
+enum cortex_m_impl_part {
 	CORTEX_M_PARTNO_INVALID,
-	STAR_MC1_PARTNO    = 0x132,
-	CORTEX_M0_PARTNO   = 0xC20,
-	CORTEX_M1_PARTNO   = 0xC21,
-	CORTEX_M3_PARTNO   = 0xC23,
-	CORTEX_M4_PARTNO   = 0xC24,
-	CORTEX_M7_PARTNO   = 0xC27,
-	CORTEX_M0P_PARTNO  = 0xC60,
-	CORTEX_M23_PARTNO  = 0xD20,
-	CORTEX_M33_PARTNO  = 0xD21,
-	CORTEX_M35P_PARTNO = 0xD31,
-	CORTEX_M55_PARTNO  = 0xD22,
+	STAR_MC1_PARTNO    = ARM_MAKE_CPUID(ARM_IMPLEMENTOR_ARM, 0x132), /* FIXME - confirm implementor! */
+	CORTEX_M0_PARTNO   = ARM_MAKE_CPUID(ARM_IMPLEMENTOR_ARM, 0xC20),
+	CORTEX_M1_PARTNO   = ARM_MAKE_CPUID(ARM_IMPLEMENTOR_ARM, 0xC21),
+	CORTEX_M3_PARTNO   = ARM_MAKE_CPUID(ARM_IMPLEMENTOR_ARM, 0xC23),
+	CORTEX_M4_PARTNO   = ARM_MAKE_CPUID(ARM_IMPLEMENTOR_ARM, 0xC24),
+	CORTEX_M7_PARTNO   = ARM_MAKE_CPUID(ARM_IMPLEMENTOR_ARM, 0xC27),
+	CORTEX_M0P_PARTNO  = ARM_MAKE_CPUID(ARM_IMPLEMENTOR_ARM, 0xC60),
+	CORTEX_M23_PARTNO  = ARM_MAKE_CPUID(ARM_IMPLEMENTOR_ARM, 0xD20),
+	CORTEX_M33_PARTNO  = ARM_MAKE_CPUID(ARM_IMPLEMENTOR_ARM, 0xD21),
+	CORTEX_M35P_PARTNO = ARM_MAKE_CPUID(ARM_IMPLEMENTOR_ARM, 0xD31),
+	CORTEX_M55_PARTNO  = ARM_MAKE_CPUID(ARM_IMPLEMENTOR_ARM, 0xD22),
 };
 
 /* Relevant Cortex-M flags, used in struct cortex_m_part_info.flags */
@@ -55,7 +64,7 @@ enum cortex_m_partno {
 #define CORTEX_M_F_TAR_AUTOINCR_BLOCK_4K  BIT(2)
 
 struct cortex_m_part_info {
-	enum cortex_m_partno partno;
+	enum cortex_m_impl_part impl_part;
 	const char *name;
 	enum arm_arch arch;
 	uint32_t flags;
@@ -292,11 +301,11 @@ target_to_cortex_m_safe(struct target *target)
 }
 
 /**
- * @returns cached value of Cortex-M part number
+ * @returns cached value of the cpuid, masked for implementation and part.
  * or CORTEX_M_PARTNO_INVALID if the magic number does not match
  * or core_info is not initialised.
  */
-static inline enum cortex_m_partno cortex_m_get_partno_safe(struct target *target)
+static inline enum cortex_m_impl_part cortex_m_get_impl_part(struct target *target)
 {
 	struct cortex_m_common *cortex_m = target_to_cortex_m_safe(target);
 	if (!cortex_m)
@@ -305,7 +314,7 @@ static inline enum cortex_m_partno cortex_m_get_partno_safe(struct target *targe
 	if (!cortex_m->core_info)
 		return CORTEX_M_PARTNO_INVALID;
 
-	return cortex_m->core_info->partno;
+	return cortex_m->core_info->impl_part;
 }
 
 int cortex_m_examine(struct target *target);

-----------------------------------------------------------------------

Summary of changes:
 src/flash/nor/stm32f1x.c |  2 +-
 src/flash/nor/stm32f2x.c |  2 +-
 src/flash/nor/stm32h7x.c |  2 +-
 src/flash/nor/stm32l4x.c |  2 +-
 src/target/arm.h         |  6 ++++++
 src/target/cortex_m.c    | 43 +++++++++++++++++++++++++++----------------
 src/target/cortex_m.h    | 47 +++++++++++++++++++++++++++++------------------
 7 files changed, 66 insertions(+), 38 deletions(-)


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commit a4b4750e3860fae620f51d34a43a655b5ccdd51d
Author: Karl Palsson <ka...@tw...>
Date:   Wed Aug 2 21:33:32 2023 +0000

    efm32: drop unnecessary and incomplete checks
    
    There's really no reason to try and add an extra layer of cpu
    verification here.
    
    Change-Id: If8c4aa03754607be6c089f514ae300b09b067ffa
    Signed-off-by: Karl Palsson <ka...@tw...>
    Reviewed-on: https://review.openocd.org/c/openocd/+/7844
    Tested-by: jenkins
    Reviewed-by: Antonio Borneo <bor...@gm...>

diff --git a/src/flash/nor/efm32.c b/src/flash/nor/efm32.c
index 3a49afc9c..f8e088657 100644
--- a/src/flash/nor/efm32.c
+++ b/src/flash/nor/efm32.c
@@ -251,18 +251,6 @@ static int efm32x_read_info(struct flash_bank *bank)
 
 	memset(efm32_info, 0, sizeof(struct efm32_info));
 
-	const struct cortex_m_common *cortex_m = target_to_cm(bank->target);
-
-	switch (cortex_m->core_info->partno) {
-	case CORTEX_M3_PARTNO:
-	case CORTEX_M4_PARTNO:
-	case CORTEX_M0P_PARTNO:
-		break;
-	default:
-		LOG_ERROR("Target is not Cortex-Mx Device");
-		return ERROR_FAIL;
-	}
-
 	ret = efm32x_get_flash_size(bank, &(efm32_info->flash_sz_kib));
 	if (ret != ERROR_OK)
 		return ret;

-----------------------------------------------------------------------

Summary of changes:
 src/flash/nor/efm32.c | 12 ------------
 1 file changed, 12 deletions(-)


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commit 2e60e2eca9d06dcb99a4adb81ebe435a72ab0c7f
Author: Nikolay Dimitrov <nik...@re...>
Date:   Fri Aug 4 23:56:49 2023 +0300

    flash/nor/spi: Improve erase performance on zd25q16
    
    Use blocks (64 KiB) instead of sectors (4 KiB) when erasing the zd25Q16
    SPI flash memory (thanks to Tomas Vanek!)
    
    Change-Id: I969a69ad35f51b84eb3e11b93f0d79db3e98613a
    Signed-off-by: Nikolay Dimitrov <nik...@re...>
    Reviewed-on: https://review.openocd.org/c/openocd/+/7850
    Reviewed-by: Tomas Vanek <va...@fb...>
    Tested-by: jenkins

diff --git a/src/flash/nor/spi.c b/src/flash/nor/spi.c
index d55956744..ace274f3d 100644
--- a/src/flash/nor/spi.c
+++ b/src/flash/nor/spi.c
@@ -171,7 +171,7 @@ const struct flash_device flash_devices[] = {
 	FLASH_ID("xtx xt25q32b",        0x03, 0x0b, 0x02, 0xd8, 0xc7, 0x0016600b, 0x100, 0x10000, 0x400000), /* exists ? */
 	FLASH_ID("xtx xt25q64b",        0x03, 0x0b, 0x02, 0xd8, 0xc7, 0x0017600b, 0x100, 0x10000, 0x800000),
 	FLASH_ID("xtx xt25q128b",       0x03, 0x0b, 0x02, 0xd8, 0xc7, 0x0018600b, 0x100, 0x10000, 0x1000000),
-	FLASH_ID("zetta zd25q16",       0x03, 0x00, 0x02, 0x20, 0xc7, 0x001560ba, 0x100, 0x1000, 0x200000),
+	FLASH_ID("zetta zd25q16",       0x03, 0x00, 0x02, 0xd8, 0xc7, 0x001560ba, 0x100, 0x10000, 0x200000),
 
 	/* FRAM, no erase commands, no write page or sectors */
 	FRAM_ID("fu mb85rs16n",         0x03, 0,    0x02, 0x00010104, 0x800),

commit 3a3400064a6147c2f2ec93b94b270c30c3147e61
Author: Nikolay Dimitrov <nik...@re...>
Date:   Thu Aug 3 23:50:55 2023 +0300

    flash/nor/spi: add zetta zd25q16
    
    * Zetta 16 Mbit (2 MiB) SPI flash
    * Tested on Olimex RP2040-PICO30 and Neo6502 boards
    
    Change-Id: I02224dd7a72a9b72f01b31edbd958daa23f28956
    Signed-off-by: Nikolay Dimitrov <nik...@re...>
    Reviewed-on: https://review.openocd.org/c/openocd/+/7849
    Reviewed-by: Tomas Vanek <va...@fb...>
    Tested-by: jenkins

diff --git a/src/flash/nor/spi.c b/src/flash/nor/spi.c
index 3bcaa9f61..d55956744 100644
--- a/src/flash/nor/spi.c
+++ b/src/flash/nor/spi.c
@@ -171,6 +171,7 @@ const struct flash_device flash_devices[] = {
 	FLASH_ID("xtx xt25q32b",        0x03, 0x0b, 0x02, 0xd8, 0xc7, 0x0016600b, 0x100, 0x10000, 0x400000), /* exists ? */
 	FLASH_ID("xtx xt25q64b",        0x03, 0x0b, 0x02, 0xd8, 0xc7, 0x0017600b, 0x100, 0x10000, 0x800000),
 	FLASH_ID("xtx xt25q128b",       0x03, 0x0b, 0x02, 0xd8, 0xc7, 0x0018600b, 0x100, 0x10000, 0x1000000),
+	FLASH_ID("zetta zd25q16",       0x03, 0x00, 0x02, 0x20, 0xc7, 0x001560ba, 0x100, 0x1000, 0x200000),
 
 	/* FRAM, no erase commands, no write page or sectors */
 	FRAM_ID("fu mb85rs16n",         0x03, 0,    0x02, 0x00010104, 0x800),

-----------------------------------------------------------------------

Summary of changes:
 src/flash/nor/spi.c | 1 +
 1 file changed, 1 insertion(+)


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commit c2d44c36d6c43a98afdad324aa46b36ef326452d
Author: Daniel Anselmi <dan...@gm...>
Date:   Mon Jul 31 21:10:52 2023 +0200

    pld: allow calling of configuration functions before 'init'
    
    Change-Id: I7c475fbbf8c13ae227e3393f01528eb180e9de51
    Signed-off-by: Daniel Anselmi <dan...@gm...>
    Reviewed-on: https://review.openocd.org/c/openocd/+/7835
    Tested-by: jenkins
    Reviewed-by: Antonio Borneo <bor...@gm...>

diff --git a/src/pld/intel.c b/src/pld/intel.c
index e5c927306..ee3097391 100644
--- a/src/pld/intel.c
+++ b/src/pld/intel.c
@@ -467,13 +467,13 @@ PLD_CREATE_COMMAND_HANDLER(intel_pld_create_command)
 static const struct command_registration intel_exec_command_handlers[] = {
 	{
 		.name = "set_bscan",
-		.mode = COMMAND_EXEC,
+		.mode = COMMAND_ANY,
 		.handler = intel_set_bscan_command_handler,
 		.help = "set boundary scan register length of FPGA",
 		.usage = "pld_name len",
 	}, {
 		.name = "set_check_pos",
-		.mode = COMMAND_EXEC,
+		.mode = COMMAND_ANY,
 		.handler = intel_set_check_pos_command_handler,
 		.help = "set check_pos of FPGA",
 		.usage = "pld_name pos",
diff --git a/src/pld/lattice.c b/src/pld/lattice.c
index 018cb2693..0cd08dd33 100644
--- a/src/pld/lattice.c
+++ b/src/pld/lattice.c
@@ -526,7 +526,7 @@ static const struct command_registration lattice_exec_command_handlers[] = {
 		.usage = "pld_name value",
 	}, {
 		.name = "set_preload",
-		.mode = COMMAND_EXEC,
+		.mode = COMMAND_ANY,
 		.handler = lattice_set_preload_command_handler,
 		.help = "set length for preload (device specific)",
 		.usage = "pld_name value",

-----------------------------------------------------------------------

Summary of changes:
 src/pld/intel.c   | 4 ++--
 src/pld/lattice.c | 2 +-
 2 files changed, 3 insertions(+), 3 deletions(-)


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commit 1233de5f903bf55c76feaf2d248fbb6fe90365ab
Author: Daniel Anselmi <dan...@gm...>
Date:   Tue Jul 25 23:31:54 2023 +0200

    pld: fix sparser warnings
    
    Change-Id: I31c5b19cd93ac41b026f824337488c9aa9b12439
    Signed-off-by: Daniel Anselmi <dan...@gm...>
    Reviewed-on: https://review.openocd.org/c/openocd/+/7828
    Tested-by: jenkins
    Reviewed-by: Antonio Borneo <bor...@gm...>

diff --git a/src/pld/lattice.c b/src/pld/lattice.c
index 2075f4490..018cb2693 100644
--- a/src/pld/lattice.c
+++ b/src/pld/lattice.c
@@ -319,7 +319,7 @@ static int lattice_load_command(struct pld_device *pld_device, const char *filen
 	return retval;
 }
 
-int lattice_get_ipdbg_hub(int user_num, struct pld_device *pld_device, struct pld_ipdbg_hub *hub)
+static int lattice_get_ipdbg_hub(int user_num, struct pld_device *pld_device, struct pld_ipdbg_hub *hub)
 {
 	if (!pld_device)
 		return ERROR_FAIL;
diff --git a/src/pld/virtex2.c b/src/pld/virtex2.c
index 5a8cf9d96..9b4a0979f 100644
--- a/src/pld/virtex2.c
+++ b/src/pld/virtex2.c
@@ -347,7 +347,7 @@ COMMAND_HANDLER(virtex2_handle_set_instuction_codes_command)
 	COMMAND_PARSE_NUMBER(u64, CMD_ARGV[3], instr_codes.jprog_b);
 	COMMAND_PARSE_NUMBER(u64, CMD_ARGV[4], instr_codes.jstart);
 	COMMAND_PARSE_NUMBER(u64, CMD_ARGV[5], instr_codes.jshutdown);
-	instr_codes.bypass = 0xffffffffffffffff;
+	instr_codes.bypass = 0xffffffffffffffffULL;
 
 	unsigned int num_user = CMD_ARGC - 6;
 	for (unsigned int i = 0; i < num_user; ++i)

-----------------------------------------------------------------------

Summary of changes:
 src/pld/lattice.c | 2 +-
 src/pld/virtex2.c | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)


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commit 307a3ca10996283697356a4835f3152dd00a9a0c
Author: Daniel Goehring <dgo...@os...>
Date:   Tue Jun 6 14:44:13 2023 -0600

    target/aarch64: add missing aarch64_poll() calls
    
    Add missing aarch64_poll() calls to ensure the event
    TARGET_EVENT_HALTED is called when necessary.
    
    This is needed with the poller update introduced in commit
    95603fae18f8 ("openocd: revert workarounds for 'expr' syntax change")
    
    Signed-off-by: Daniel Goehring <dgo...@os...>
    Change-Id: I6e91f1b6bc1f0d16e6f0eb76fc67d20111e3afd2
    Reviewed-on: https://review.openocd.org/c/openocd/+/7737
    Tested-by: jenkins
    Reviewed-by: Antonio Borneo <bor...@gm...>

diff --git a/src/target/aarch64.c b/src/target/aarch64.c
index 5d8a65273..d25c7d30e 100644
--- a/src/target/aarch64.c
+++ b/src/target/aarch64.c
@@ -1091,6 +1091,7 @@ static int aarch64_step(struct target *target, int current, target_addr_t addres
 	struct armv8_common *armv8 = target_to_armv8(target);
 	struct aarch64_common *aarch64 = target_to_aarch64(target);
 	int saved_retval = ERROR_OK;
+	int poll_retval;
 	int retval;
 	uint32_t edecr;
 
@@ -1173,6 +1174,8 @@ static int aarch64_step(struct target *target, int current, target_addr_t addres
 	if (retval == ERROR_TARGET_TIMEOUT)
 		saved_retval = aarch64_halt_one(target, HALT_SYNC);
 
+	poll_retval = aarch64_poll(target);
+
 	/* restore EDECR */
 	retval = mem_ap_write_atomic_u32(armv8->debug_ap,
 			armv8->debug_base + CPUV8_DBG_EDECR, edecr);
@@ -1189,6 +1192,9 @@ static int aarch64_step(struct target *target, int current, target_addr_t addres
 	if (saved_retval != ERROR_OK)
 		return saved_retval;
 
+	if (poll_retval != ERROR_OK)
+		return poll_retval;
+
 	return ERROR_OK;
 }
 
@@ -2695,6 +2701,9 @@ static int aarch64_examine(struct target *target)
 	if (retval == ERROR_OK)
 		retval = aarch64_init_debug_access(target);
 
+	if (retval == ERROR_OK)
+		retval = aarch64_poll(target);
+
 	return retval;
 }
 

-----------------------------------------------------------------------

Summary of changes:
 src/target/aarch64.c | 9 +++++++++
 1 file changed, 9 insertions(+)


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commit 3c558fda4bf09b5fd612f05a86da7ad5c47630bb
Author: Artemiy Volkov <ar...@sy...>
Date:   Mon Jul 17 17:07:28 2023 +0200

    tcl: add configuration files for the ARC HSDK-4xD board
    
    This commit provides startup files for the Synopsys DesignWare ARC
    HSDK-4xD board. These have been adapted from the corresponding
    snps_hsdk.cfg files, the only functional change being the JTAG IDs for
    the new board's CPU cores.
    
    Change-Id: I19a0cd13bc09de90cfe2a7cccf1239e459fd8077
    Signed-off-by: Artemiy Volkov <ar...@sy...>
    Reviewed-on: https://review.openocd.org/c/openocd/+/7829
    Tested-by: jenkins
    Reviewed-by: Antonio Borneo <bor...@gm...>
    Reviewed-by: Evgeniy Didin <di...@sy...>

diff --git a/tcl/board/snps_hsdk_4xd.cfg b/tcl/board/snps_hsdk_4xd.cfg
new file mode 100644
index 000000000..5901533d2
--- /dev/null
+++ b/tcl/board/snps_hsdk_4xd.cfg
@@ -0,0 +1,19 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
+# Copyright (C) 2023 Synopsys, Inc.
+# Artemiy Volkov <ar...@sy...>
+
+# Adapted from tcl/board/snps_hsdk.cfg.
+
+#
+# Synopsys DesignWare ARC HSDK Software Development Platform (HS47D cores)
+#
+
+source [find interface/ftdi/snps_sdp.cfg]
+adapter speed 10000
+
+# ARCs supports only JTAG.
+transport select jtag
+
+# Configure SoC
+source [find target/snps_hsdk_4xd.cfg]
diff --git a/tcl/target/snps_hsdk_4xd.cfg b/tcl/target/snps_hsdk_4xd.cfg
new file mode 100644
index 000000000..1520e3d7c
--- /dev/null
+++ b/tcl/target/snps_hsdk_4xd.cfg
@@ -0,0 +1,50 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
+# Copyright (C) 2023 Synopsys, Inc.
+# Artemiy Volkov <ar...@sy...>
+
+# Adapted from tcl/target/snps_hsdk.cfg.
+
+#
+# HS Development Kit SoC.
+#
+# Contains quad-core ARC HS47D.
+#
+
+source [find cpu/arc/hs.tcl]
+
+set _coreid 0
+set _dbgbase [expr {$_coreid << 13}]
+
+# CHIPNAME will be used to choose core family (600, 700 or EM). As far as
+# OpenOCD is concerned EM and HS are identical.
+set _CHIPNAME arc-em
+
+
+proc setup_cpu {core_index expected_id} {
+	global _coreid
+	global _dbgbase
+	global _CHIPNAME
+
+	set _TARGETNAME $_CHIPNAME.cpu$core_index
+	jtag newtap $_CHIPNAME cpu$core_index -irlen 4 -ircapture 0x1 -expected-id $expected_id
+
+	target create $_TARGETNAME arcv2 -chain-position $_TARGETNAME
+	$_TARGETNAME configure -coreid $_coreid
+	$_TARGETNAME configure -dbgbase $_dbgbase
+	$_TARGETNAME configure -event reset-assert "arc_hs_reset $_TARGETNAME"
+
+	arc_hs_init_regs
+
+	$_TARGETNAME arc cache l2 auto 1
+
+	set _coreid [expr {$_coreid + 1}]
+	set _dbgbase [expr {$_coreid << 13}]
+}
+
+# OpenOCD discovers JTAG TAPs in reverse order.
+
+setup_cpu 4 0x100c54b1
+setup_cpu 3 0x100854b1
+setup_cpu 2 0x100454b1
+setup_cpu 1 0x100054b1

-----------------------------------------------------------------------

Summary of changes:
 tcl/board/{snps_hsdk.cfg => snps_hsdk_4xd.cfg} | 11 +++---
 tcl/target/snps_hsdk_4xd.cfg                   | 50 ++++++++++++++++++++++++++
 2 files changed, 56 insertions(+), 5 deletions(-)
 copy tcl/board/{snps_hsdk.cfg => snps_hsdk_4xd.cfg} (58%)
 create mode 100644 tcl/target/snps_hsdk_4xd.cfg


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[openocd-gerrit <ope...@us...>]

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- Log -----------------------------------------------------------------
commit 8774fd60177623051388bf7371c79ae7bb91a52d
Author: gudvinr <gu...@gm...>
Date:   Thu Jul 27 15:03:57 2023 +0300

    tcl/interface/ftdi: support for SIPEED RV-Debugger
    
    BL702-based JTAG debugger that emulates FT2232D device
    
    Change-Id: Iefbf03645e6d8d154f4b1cad3385b8bc09da37dd
    Signed-off-by: gudvinr <gu...@gm...>
    Reviewed-on: https://review.openocd.org/c/openocd/+/7830
    Reviewed-by: Antonio Borneo <bor...@gm...>
    Tested-by: jenkins

diff --git a/tcl/interface/ftdi/sipeed-rv-debugger.cfg b/tcl/interface/ftdi/sipeed-rv-debugger.cfg
new file mode 100644
index 000000000..ca65398c6
--- /dev/null
+++ b/tcl/interface/ftdi/sipeed-rv-debugger.cfg
@@ -0,0 +1,13 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
+#
+# Interface file for BL702-based SIPEED RV Debugger
+#
+
+adapter driver ftdi
+adapter speed 6000
+
+ftdi device_desc "JTAG Debugger"
+ftdi vid_pid 0x0403 0x6010
+ftdi layout_init 0x0008 0x001b
+ftdi layout_signal nSRST -oe 0x0020 -data 0x0020

-----------------------------------------------------------------------

Summary of changes:
 tcl/interface/ftdi/sipeed-rv-debugger.cfg | 13 +++++++++++++
 1 file changed, 13 insertions(+)
 create mode 100644 tcl/interface/ftdi/sipeed-rv-debugger.cfg


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- Log -----------------------------------------------------------------
commit 94686eea6e982a83e5c1796e8a903bf683ed62e5
Author: Ahmed BOUDJELIDA <abo...@na...>
Date:   Sat Jun 17 01:11:15 2023 +0200

    jtag/drivers: Add new driver for ANGIE USB-JTAG Adapter
    
    This is the driver code for NanoXplore's ANGIE USB-JTAG Adapter.
    The driver is based on the openULINK project.
    
    This driver communicate with ANGIE's firmware in order to establish
    JTAG protocol to debug the target chip.
    
    Since the ANGIE Adapter has a Spartan-6 FPGA in addition to the
    FX2 microcontroller, the driver adds two functions, one to download
    the firmware (embedded C) to the FX2, and the second to program
    the FPGA with its bitstream.
    
    Add ANGIE's configuration file to tcl/interface/
    Add the device VID/PID to 60-openocd.rules file.
    Add ANGIE to OpenOCD's documentation
    
    Change-Id: Id17111c74073da01450d43d466e11b0cc086691f
    Signed-off-by: Ahmed BOUDJELIDA <abo...@na...>
    Reviewed-on: https://review.openocd.org/c/openocd/+/7702
    Reviewed-by: Antonio Borneo <bor...@gm...>
    Tested-by: jenkins

diff --git a/configure.ac b/configure.ac
index ac2808e1f..ecf8384bf 100644
--- a/configure.ac
+++ b/configure.ac
@@ -118,6 +118,7 @@ m4_define([USB1_ADAPTERS],
 	[[stlink], [ST-Link Programmer], [HLADAPTER_STLINK]],
 	[[ti_icdi], [TI ICDI JTAG Programmer], [HLADAPTER_ICDI]],
 	[[ulink], [Keil ULINK JTAG Programmer], [ULINK]],
+	[[angie], [ANGIE Adapter], [ANGIE]],
 	[[usb_blaster_2], [Altera USB-Blaster II Compatible], [USB_BLASTER_2]],
 	[[ft232r], [Bitbang mode of FT232R based devices], [FT232R]],
 	[[vsllink], [Versaloon-Link JTAG Programmer], [VSLLINK]],
diff --git a/contrib/60-openocd.rules b/contrib/60-openocd.rules
index fc35fb9b9..fd88564bd 100644
--- a/contrib/60-openocd.rules
+++ b/contrib/60-openocd.rules
@@ -224,6 +224,10 @@ ATTRS{idVendor}=="2aec", ATTRS{idProduct}=="1106", MODE="660", GROUP="plugdev",
 ATTRS{idVendor}=="303a", ATTRS{idProduct}=="1001", MODE="660", GROUP="plugdev", TAG+="uaccess"
 ATTRS{idVendor}=="303a", ATTRS{idProduct}=="1002", MODE="660", GROUP="plugdev", TAG+="uaccess"
 
+# ANGIE USB-JTAG Adapter
+ATTRS{idVendor}=="584e", ATTRS{idProduct}=="424e", MODE="660", GROUP="plugdev", TAG+="uaccess"
+ATTRS{idVendor}=="584e", ATTRS{idProduct}=="4a55", MODE="660", GROUP="plugdev", TAG+="uaccess"
+
 # Marvell Sheevaplug
 ATTRS{idVendor}=="9e88", ATTRS{idProduct}=="9e8f", MODE="660", GROUP="plugdev", TAG+="uaccess"
 
diff --git a/doc/openocd.texi b/doc/openocd.texi
index 03c5190ad..3348e472b 100644
--- a/doc/openocd.texi
+++ b/doc/openocd.texi
@@ -508,6 +508,9 @@ debuggers to ARM Cortex based targets @url{http://www.keil.com/support/man/docs/
 @item @b{ARM-JTAG-EW}
 @* Link: @url{http://www.olimex.com/dev/arm-jtag-ew.html}
 
+@item @b{angie}
+@* Link: @url{https://nanoxplore.org/}
+
 @item @b{Buspirate}
 @* Link: @url{http://dangerousprototypes.com/bus-pirate-manual/}
 
@@ -2515,6 +2518,10 @@ Optionally sets that option first.
 @end deffn
 @end deffn
 
+@deffn {Interface Driver} {angie}
+This is the NanoXplore's ANGIE USB-JTAG Adapter.
+@end deffn
+
 @deffn {Interface Driver} {arm-jtag-ew}
 Olimex ARM-JTAG-EW USB adapter
 This has one driver-specific command:
diff --git a/src/jtag/drivers/Makefile.am b/src/jtag/drivers/Makefile.am
index 6410f3754..4b2dbc44d 100644
--- a/src/jtag/drivers/Makefile.am
+++ b/src/jtag/drivers/Makefile.am
@@ -10,8 +10,10 @@ noinst_LTLIBRARIES += %D%/libocdjtagdrivers.la
 %C%_libocdjtagdrivers_la_CPPFLAGS = $(AM_CPPFLAGS)
 
 ULINK_FIRMWARE = %D%/OpenULINK
+ANGIE_FILES = %D%/angie
 
 EXTRA_DIST += $(ULINK_FIRMWARE) \
+	$(ANGIE_FILES) \
 	%D%/usb_blaster/README.CheapClone \
 	%D%/Makefile.rlink \
 	%D%/rlink_call.m4 \
@@ -123,6 +125,12 @@ ulinkdir = $(pkgdatadir)/OpenULINK
 dist_ulink_DATA = $(ULINK_FIRMWARE)/ulink_firmware.hex
 %C%_libocdjtagdrivers_la_LIBADD += -lm
 endif
+if ANGIE
+DRIVERFILES += %D%/angie.c
+angiedir = $(pkgdatadir)/angie
+dist_angie_DATA = $(ANGIE_FILES)/angie_firmware.bin $(ANGIE_FILES)/angie_bitstream.bit
+%C%_libocdjtagdrivers_la_LIBADD += -lm
+endif
 if VSLLINK
 DRIVERFILES += %D%/versaloon/usbtoxxx/usbtogpio.c
 DRIVERFILES += %D%/versaloon/usbtoxxx/usbtojtagraw.c
diff --git a/src/jtag/drivers/angie.c b/src/jtag/drivers/angie.c
new file mode 100644
index 000000000..35811fb80
--- /dev/null
+++ b/src/jtag/drivers/angie.c
@@ -0,0 +1,2280 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+/***************************************************************************
+	File : angie.c															*
+	Contents : OpenOCD driver code for NanoXplore USB-JTAG ANGIE			*
+	adapter hardware.														*
+	Based on openULINK driver code by: Martin Schmoelzer.					*
+	Copyright 2023, Ahmed Errached BOUDJELIDA, NanoXplore SAS.				*
+	<abo...@na...>											*
+	<ahm...@gm...>											*
+ ***************************************************************************/
+
+#ifdef HAVE_CONFIG_H
+#include "config.h"
+#endif
+
+#include <stdio.h>
+#include <stdlib.h>
+#include <math.h>
+#include "helper/system.h"
+#include <jtag/interface.h>
+#include <jtag/commands.h>
+#include <target/image.h>
+#include <libusb.h>
+#include "libusb_helper.h"
+#include "angie/include/msgtypes.h"
+
+/** USB Vendor ID of ANGIE device in unconfigured state (no firmware loaded
+ *  yet) or with its firmware. */
+#define ANGIE_VID				0x584e
+
+/** USB Product ID of ANGIE device in unconfigured state (no firmware loaded
+ *  yet) or with its firmware. */
+#define ANGIE_PID				0x424e
+#define ANGIE_PID_2				0x4a55
+
+/** Address of EZ-USB ANGIE CPU Control & Status register. This register can be
+ *  written by issuing a Control EP0 vendor request. */
+#define CPUCS_REG				0xE600
+
+/** USB Control EP0 bRequest: "Firmware Load". */
+#define REQUEST_FIRMWARE_LOAD	0xA0
+
+/** Value to write into CPUCS to put EZ-USB ANGIE into reset. */
+#define CPU_RESET				0x01
+
+/** Value to write into CPUCS to put EZ-USB ANGIE out of reset. */
+#define CPU_START				0x00
+
+/** Base address of firmware in EZ-USB ANGIE code space. */
+#define FIRMWARE_ADDR			0x0000
+
+/** USB interface number */
+#define USB_INTERFACE			0
+
+/** Delay (in microseconds) to wait while EZ-USB performs ReNumeration. */
+#define ANGIE_RENUMERATION_DELAY_US	1500000
+
+/** Default location of ANGIE firmware image. */
+#define ANGIE_FIRMWARE_FILE		PKGDATADIR "/angie/angie_firmware.bin"
+
+/** Default location of ANGIE firmware image. */
+#define ANGIE_BITSTREAM_FILE	PKGDATADIR "/angie/angie_bitstream.bit"
+
+/** Maximum size of a single firmware section. Entire EZ-USB ANGIE code space = 16kB */
+#define SECTION_BUFFERSIZE		16384
+
+/** Tuning of OpenOCD SCAN commands split into multiple ANGIE commands. */
+#define SPLIT_SCAN_THRESHOLD	10
+
+/** ANGIE hardware type */
+enum angie_type {
+	ANGIE,
+};
+
+enum angie_payload_direction {
+	PAYLOAD_DIRECTION_OUT,
+	PAYLOAD_DIRECTION_IN
+};
+
+enum angie_delay_type {
+	DELAY_CLOCK_TCK,
+	DELAY_CLOCK_TMS,
+	DELAY_SCAN_IN,
+	DELAY_SCAN_OUT,
+	DELAY_SCAN_IO
+};
+
+/**
+ * ANGIE command (ANGIE command queue element).
+ *
+ * For the OUT direction payload, things are quite easy: Payload is stored
+ * in a rather small array (up to 63 bytes), the payload is always allocated
+ * by the function generating the command and freed by angie_clear_queue().
+ *
+ * For the IN direction payload, things get a little bit more complicated:
+ * The maximum IN payload size for a single command is 64 bytes. Assume that
+ * a single OpenOCD command needs to scan 256 bytes. This results in the
+ * generation of four ANGIE commands. The function generating these
+ * commands shall allocate an uint8_t[256] array. Each command's #payload_in
+ * pointer shall point to the corresponding offset where IN data shall be
+ * placed, while #payload_in_start shall point to the first element of the 256
+ * byte array.
+ * - first command:  #payload_in_start + 0
+ * - second command: #payload_in_start + 64
+ * - third command:  #payload_in_start + 128
+ * - fourth command: #payload_in_start + 192
+ *
+ * The last command sets #needs_postprocessing to true.
+ */
+struct angie_cmd {
+	uint8_t id;			/**< ANGIE command ID */
+
+	uint8_t *payload_out;		/**< Pointer where OUT payload shall be stored */
+	uint8_t payload_out_size;	/**< OUT direction payload size for this command */
+
+	uint8_t *payload_in_start;	/**< Pointer to first element of IN payload array */
+	uint8_t *payload_in;		/**< Pointer where IN payload shall be stored */
+	uint8_t payload_in_size;	/**< IN direction payload size for this command */
+
+	/** Indicates if this command needs post-processing */
+	bool needs_postprocessing;
+
+	/** Indicates if angie_clear_queue() should free payload_in_start  */
+	bool free_payload_in_start;
+
+	/** Pointer to corresponding OpenOCD command for post-processing */
+	struct jtag_command *cmd_origin;
+
+	struct angie_cmd *next;		/**< Pointer to next command (linked list) */
+};
+
+/** Describes one driver instance */
+struct angie {
+	struct libusb_context *libusb_ctx;
+	struct libusb_device_handle *usb_device_handle;
+	enum angie_type type;
+
+	unsigned int ep_in;		/**< IN endpoint number */
+	unsigned int ep_out;		/**< OUT endpoint number */
+
+	/* delay value for "SLOW_CLOCK commands" in [0:255] range in units of 4 us;
+		-1 means no need for delay */
+	int delay_scan_in;	/**< Delay value for SCAN_IN commands */
+	int delay_scan_out;	/**< Delay value for SCAN_OUT commands */
+	int delay_scan_io;	/**< Delay value for SCAN_IO commands */
+	int delay_clock_tck;	/**< Delay value for CLOCK_TMS commands */
+	int delay_clock_tms;	/**< Delay value for CLOCK_TCK commands */
+
+	int commands_in_queue;		/**< Number of commands in queue */
+	struct angie_cmd *queue_start;	/**< Pointer to first command in queue */
+	struct angie_cmd *queue_end;	/**< Pointer to last command in queue */
+};
+
+/**************************** Function Prototypes *****************************/
+
+/* USB helper functions */
+static int angie_usb_open(struct angie *device);
+static int angie_usb_close(struct angie *device);
+
+/* ANGIE MCU (Cypress EZ-USB) specific functions */
+static int angie_cpu_reset(struct angie *device, char reset_bit);
+static int angie_load_firmware_and_renumerate(struct angie *device, const char *filename,
+		uint32_t delay_us);
+static int angie_load_firmware(struct angie *device, const char *filename);
+static int angie_load_bitstream(struct angie *device, const char *filename);
+
+static int angie_write_firmware_section(struct angie *device,
+		struct image *firmware_image, int section_index);
+
+/* Generic helper functions */
+static void angie_dump_signal_states(uint8_t input_signals, uint8_t output_signals);
+
+/* ANGIE command generation helper functions */
+static int angie_allocate_payload(struct angie_cmd *angie_cmd, int size,
+		enum angie_payload_direction direction);
+
+/* ANGIE command queue helper functions */
+static int angie_get_queue_size(struct angie *device,
+		enum angie_payload_direction direction);
+static void angie_clear_queue(struct angie *device);
+static int angie_append_queue(struct angie *device, struct angie_cmd *angie_cmd);
+static int angie_execute_queued_commands(struct angie *device, int timeout_ms);
+
+static void angie_dump_queue(struct angie *device);
+
+static int angie_append_scan_cmd(struct angie *device,
+		enum scan_type scan_type,
+		int scan_size_bits,
+		uint8_t *tdi,
+		uint8_t *tdo_start,
+		uint8_t *tdo,
+		uint8_t tms_count_start,
+		uint8_t tms_sequence_start,
+		uint8_t tms_count_end,
+		uint8_t tms_sequence_end,
+		struct jtag_command *origin,
+		bool postprocess);
+static int angie_append_clock_tms_cmd(struct angie *device, uint8_t count,
+		uint8_t sequence);
+static int angie_append_clock_tck_cmd(struct angie *device, uint16_t count);
+static int angie_append_get_signals_cmd(struct angie *device);
+static int angie_append_set_signals_cmd(struct angie *device, uint8_t low,
+		uint8_t high);
+static int angie_append_sleep_cmd(struct angie *device, uint32_t us);
+static int angie_append_configure_tck_cmd(struct angie *device,
+		int delay_scan_in,
+		int delay_scan_out,
+		int delay_scan_io,
+		int delay_tck,
+		int delay_tms);
+static int angie_append_test_cmd(struct angie *device);
+
+/* ANGIE TCK frequency helper functions */
+static int angie_calculate_delay(enum angie_delay_type type, long f, int *delay);
+
+/* Interface between ANGIE and OpenOCD */
+static void angie_set_end_state(tap_state_t endstate);
+static int angie_queue_statemove(struct angie *device);
+
+static int angie_queue_scan(struct angie *device, struct jtag_command *cmd);
+static int angie_queue_tlr_reset(struct angie *device, struct jtag_command *cmd);
+static int angie_queue_runtest(struct angie *device, struct jtag_command *cmd);
+static int angie_queue_pathmove(struct angie *device, struct jtag_command *cmd);
+static int angie_queue_sleep(struct angie *device, struct jtag_command *cmd);
+static int angie_queue_stableclocks(struct angie *device, struct jtag_command *cmd);
+
+static int angie_post_process_scan(struct angie_cmd *angie_cmd);
+static int angie_post_process_queue(struct angie *device);
+
+/* adapter driver functions */
+static int angie_execute_queue(void);
+static int angie_khz(int khz, int *jtag_speed);
+static int angie_speed(int speed);
+static int angie_speed_div(int speed, int *khz);
+static int angie_init(void);
+static int angie_quit(void);
+static int angie_reset(int trst, int srst);
+
+/****************************** Global Variables ******************************/
+
+static struct angie *angie_handle;
+
+/**************************** USB helper functions ****************************/
+
+/**
+ * Opens the ANGIE device
+ *
+ * @param device pointer to struct angie identifying ANGIE driver instance.
+ * @return on success: ERROR_OK
+ * @return on failure: ERROR_FAIL
+ */
+static int angie_usb_open(struct angie *device)
+{
+	struct libusb_device_handle *usb_device_handle;
+	const uint16_t vids[] = {ANGIE_VID, ANGIE_VID, 0};
+	const uint16_t pids[] = {ANGIE_PID, ANGIE_PID_2, 0};
+
+	int ret = jtag_libusb_open(vids, pids, &usb_device_handle, NULL);
+
+	if (ret != ERROR_OK)
+		return ret;
+
+	device->usb_device_handle = usb_device_handle;
+	device->type = ANGIE;
+
+	return ERROR_OK;
+}
+
+/**
+ * Releases the ANGIE interface and closes the USB device handle.
+ *
+ * @param device pointer to struct angie identifying ANGIE driver instance.
+ * @return on success: ERROR_OK
+ * @return on failure: ERROR_FAIL
+ */
+static int angie_usb_close(struct angie *device)
+{
+	if (device->usb_device_handle) {
+		if (libusb_release_interface(device->usb_device_handle, 0) != 0)
+			return ERROR_FAIL;
+
+		jtag_libusb_close(device->usb_device_handle);
+		device->usb_device_handle = NULL;
+	}
+	return ERROR_OK;
+}
+
+/******************* ANGIE CPU (EZ-USB) specific functions ********************/
+
+/**
+ * Writes '0' or '1' to the CPUCS register, putting the EZ-USB CPU into reset
+ * or out of reset.
+ *
+ * @param device pointer to struct angie identifying ANGIE driver instance.
+ * @param reset_bit 0 to put CPU into reset, 1 to put CPU out of reset.
+ * @return on success: ERROR_OK
+ * @return on failure: ERROR_FAIL
+ */
+static int angie_cpu_reset(struct angie *device, char reset_bit)
+{
+	return jtag_libusb_control_transfer(device->usb_device_handle,
+			(LIBUSB_ENDPOINT_OUT | LIBUSB_REQUEST_TYPE_VENDOR | LIBUSB_RECIPIENT_DEVICE),
+			REQUEST_FIRMWARE_LOAD, CPUCS_REG, 0, &reset_bit, 1, LIBUSB_TIMEOUT_MS, NULL);
+}
+
+/**
+ * Puts the ANGIE's EZ-USB microcontroller into reset state, downloads
+ * the firmware image, resumes the microcontroller and re-enumerates
+ * USB devices.
+ *
+ * @param device pointer to struct angie identifying ANGIE driver instance.
+ *  The usb_handle member will be modified during re-enumeration.
+ * @param filename path to the Intel HEX file containing the firmware image.
+ * @param delay_us the delay to wait for the device to re-enumerate.
+ * @return on success: ERROR_OK
+ * @return on failure: ERROR_FAIL
+ */
+static int angie_load_firmware_and_renumerate(struct angie *device,
+	const char *filename, uint32_t delay_us)
+{
+	int ret;
+
+	/* Basic process: After downloading the firmware, the ANGIE will disconnect
+	 * itself and re-connect after a short amount of time so we have to close
+	 * the handle and re-enumerate USB devices */
+
+	ret = angie_load_firmware(device, filename);
+	if (ret != ERROR_OK)
+		return ret;
+
+	ret = angie_usb_close(device);
+	if (ret != ERROR_OK)
+		return ret;
+
+	usleep(delay_us);
+
+	return angie_usb_open(device);
+}
+
+/**
+ * Downloads a firmware image to the ANGIE's EZ-USB microcontroller
+ * over the USB bus.
+ *
+ * @param device pointer to struct angie identifying ANGIE driver instance.
+ * @param filename an absolute or relative path to the Intel HEX file
+ *  containing the firmware image.
+ * @return on success: ERROR_OK
+ * @return on failure: ERROR_FAIL
+ */
+static int angie_load_firmware(struct angie *device, const char *filename)
+{
+	struct image angie_firmware_image;
+	int ret;
+
+	ret = angie_cpu_reset(device, CPU_RESET);
+	if (ret != ERROR_OK) {
+		LOG_ERROR("Could not halt ANGIE CPU");
+		return ret;
+	}
+
+	angie_firmware_image.base_address = 0;
+	angie_firmware_image.base_address_set = false;
+
+	ret = image_open(&angie_firmware_image, filename, "bin");
+	if (ret != ERROR_OK) {
+		LOG_ERROR("Could not load firmware image");
+		return ret;
+	}
+
+	/* Download all sections in the image to ANGIE */
+	for (unsigned int i = 0; i < angie_firmware_image.num_sections; i++) {
+		ret = angie_write_firmware_section(device, &angie_firmware_image, i);
+		if (ret != ERROR_OK)
+			return ret;
+	}
+
+	image_close(&angie_firmware_image);
+
+	ret = angie_cpu_reset(device, CPU_START);
+	if (ret != ERROR_OK) {
+		LOG_ERROR("Could not restart ANGIE CPU");
+		return ret;
+	}
+
+	return ERROR_OK;
+}
+
+/**
+ * Downloads a bitstream file to the ANGIE's FPGA through the EZ-USB microcontroller
+ * over the USB bus.
+ *
+ * @param device pointer to struct angie identifying ANGIE driver instance.
+ * @param filename an absolute or relative path to the Xilinx .bit file
+ *  containing the bitstream data.
+ * @return on success: ERROR_OK
+ * @return on failure: ERROR_FAIL
+ */
+static int angie_load_bitstream(struct angie *device, const char *filename)
+{
+	int ret, transferred;
+	const char *bitstream_file_path = filename;
+	FILE *bitstream_file = NULL;
+	char *bitstream_data = NULL;
+	size_t bitstream_size = 0;
+
+	/* CFGopen */
+	ret = jtag_libusb_control_transfer(device->usb_device_handle,
+		0x00, 0xB0, 0, 0, NULL, 0, LIBUSB_TIMEOUT_MS, &transferred);
+	if (ret != ERROR_OK) {
+		LOG_ERROR("Failed opencfg");
+		/* Abort if libusb sent less data than requested */
+		return ERROR_FAIL;
+	}
+
+	/* Open the bitstream file */
+	bitstream_file = fopen(bitstream_file_path, "rb");
+	if (!bitstream_file) {
+		LOG_ERROR("Failed to open bitstream file: %s\n", bitstream_file_path);
+		return ERROR_FAIL;
+	}
+
+	/* Get the size of the bitstream file */
+	fseek(bitstream_file, 0, SEEK_END);
+	bitstream_size = ftell(bitstream_file);
+	fseek(bitstream_file, 0, SEEK_SET);
+
+	/* Allocate memory for the bitstream data */
+	bitstream_data = malloc(bitstream_size);
+	if (!bitstream_data) {
+		LOG_ERROR("Failed to allocate memory for bitstream data.");
+		fclose(bitstream_file);
+		return ERROR_FAIL;
+	}
+
+	/* Read the bitstream data from the file */
+	if (fread(bitstream_data, 1, bitstream_size, bitstream_file) != bitstream_size) {
+		LOG_ERROR("Failed to read bitstream data.");
+		free(bitstream_data);
+		fclose(bitstream_file);
+		return ERROR_FAIL;
+	}
+
+	/* Send the bitstream data to the microcontroller */
+	int actual_length = 0;
+	ret = jtag_libusb_bulk_write(device->usb_device_handle, 0x02, bitstream_data, bitstream_size, 1000, &actual_length);
+	if (ret != ERROR_OK) {
+		LOG_ERROR("Failed to send bitstream data: %s", libusb_strerror(ret));
+		free(bitstream_data);
+		fclose(bitstream_file);
+		return ERROR_FAIL;
+	}
+
+	LOG_INFO("Bitstream sent successfully.");
+
+	/* Clean up */
+	free(bitstream_data);
+	fclose(bitstream_file);
+
+	/* CFGclose */
+	transferred = 0;
+	ret = jtag_libusb_control_transfer(device->usb_device_handle,
+		0x00, 0xB1, 0, 0, NULL, 0, LIBUSB_TIMEOUT_MS, &transferred);
+	if (ret != ERROR_OK) {
+		LOG_INFO("error cfgclose");
+		/* Abort if libusb sent less data than requested */
+		return ERROR_FAIL;
+	}
+	return ERROR_OK;
+}
+
+/**
+ * Send one contiguous firmware section to the ANGIE's EZ-USB microcontroller
+ * over the USB bus.
+ *
+ * @param device pointer to struct angie identifying ANGIE driver instance.
+ * @param firmware_image pointer to the firmware image that contains the section
+ *  which should be sent to the ANGIE's EZ-USB microcontroller.
+ * @param section_index index of the section within the firmware image.
+ * @return on success: ERROR_OK
+ * @return on failure: ERROR_FAIL
+ */
+static int angie_write_firmware_section(struct angie *device,
+	struct image *firmware_image, int section_index)
+{
+	int addr, bytes_remaining, chunk_size;
+	uint8_t data[SECTION_BUFFERSIZE];
+	uint8_t *data_ptr = data;
+	uint16_t size;
+	size_t size_read;
+	int ret, transferred;
+
+	size = (uint16_t)firmware_image->sections[section_index].size;
+	addr = (uint16_t)firmware_image->sections[section_index].base_address;
+
+	LOG_DEBUG("section %02i at addr 0x%04x (size 0x%04" PRIx16 ")", section_index, addr,
+		size);
+
+	/* Copy section contents to local buffer */
+	ret = image_read_section(firmware_image, section_index, 0, size, data,
+			&size_read);
+
+	if (ret != ERROR_OK)
+		return ret;
+	if (size_read != size)
+		return ERROR_FAIL;
+
+	bytes_remaining = size;
+
+	/* Send section data in chunks of up to 64 bytes to ANGIE */
+	while (bytes_remaining > 0) {
+		if (bytes_remaining > 64)
+			chunk_size = 64;
+		else
+			chunk_size = bytes_remaining;
+
+		ret = jtag_libusb_control_transfer(device->usb_device_handle,
+				(LIBUSB_ENDPOINT_OUT | LIBUSB_REQUEST_TYPE_VENDOR | LIBUSB_RECIPIENT_DEVICE),
+				REQUEST_FIRMWARE_LOAD, addr, FIRMWARE_ADDR, (char *)data_ptr,
+				chunk_size, LIBUSB_TIMEOUT_MS, &transferred);
+
+		if (ret != ERROR_OK)
+			return ret;
+
+		if (transferred != chunk_size) {
+			/* Abort if libusb sent less data than requested */
+			return ERROR_FAIL;
+		}
+
+		bytes_remaining -= chunk_size;
+		addr += chunk_size;
+		data_ptr += chunk_size;
+	}
+
+	return ERROR_OK;
+}
+
+/************************** Generic helper functions **************************/
+
+/**
+ * Print state of interesting signals via LOG_INFO().
+ *
+ * @param input_signals input signal states as returned by CMD_GET_SIGNALS
+ * @param output_signals output signal states as returned by CMD_GET_SIGNALS
+ */
+static void angie_dump_signal_states(uint8_t input_signals, uint8_t output_signals)
+{
+	LOG_INFO("ANGIE signal states: TDI: %i, TDO: %i, TMS: %i, TCK: %i, TRST: %i "
+		"SRST: %i",
+		(output_signals & SIGNAL_TDI   ? 1 : 0),
+		(input_signals  & SIGNAL_TDO   ? 1 : 0),
+		(output_signals & SIGNAL_TMS   ? 1 : 0),
+		(output_signals & SIGNAL_TCK   ? 1 : 0),
+		(output_signals & SIGNAL_TRST  ? 1 : 0),
+		(output_signals & SIGNAL_SRST  ? 1 : 0));
+}
+
+/**************** ANGIE command generation helper functions ***************/
+
+/**
+ * Allocate and initialize space in memory for ANGIE command payload.
+ *
+ * @param angie_cmd pointer to command whose payload should be allocated.
+ * @param size the amount of memory to allocate (bytes).
+ * @param direction which payload to allocate.
+ * @return on success: ERROR_OK
+ * @return on failure: ERROR_FAIL
+ */
+static int angie_allocate_payload(struct angie_cmd *angie_cmd, int size,
+	enum angie_payload_direction direction)
+{
+	uint8_t *payload;
+
+	payload = calloc(size, sizeof(uint8_t));
+
+	if (!payload) {
+		LOG_ERROR("Could not allocate ANGIE command payload: out of memory");
+		return ERROR_FAIL;
+	}
+
+	switch (direction) {
+	    case PAYLOAD_DIRECTION_OUT:
+		    if (angie_cmd->payload_out) {
+			    LOG_ERROR("BUG: Duplicate payload allocation for ANGIE command");
+			    free(payload);
+			    return ERROR_FAIL;
+		    }
+			angie_cmd->payload_out = payload;
+			angie_cmd->payload_out_size = size;
+		    break;
+	    case PAYLOAD_DIRECTION_IN:
+		    if (angie_cmd->payload_in_start) {
+			    LOG_ERROR("BUG: Duplicate payload allocation for ANGIE command");
+			    free(payload);
+			    return ERROR_FAIL;
+		    }
+
+			angie_cmd->payload_in_start = payload;
+		    angie_cmd->payload_in = payload;
+		    angie_cmd->payload_in_size = size;
+
+			/* By default, free payload_in_start in angie_clear_queue(). Commands
+			 * that do not want this behavior (e. g. split scans) must turn it off
+			 * separately! */
+		    angie_cmd->free_payload_in_start = true;
+
+		    break;
+	}
+
+	return ERROR_OK;
+}
+
+/****************** ANGIE command queue helper functions ******************/
+
+/**
+ * Get the current number of bytes in the queue, including command IDs.
+ *
+ * @param device pointer to struct angie identifying ANGIE driver instance.
+ * @param direction the transfer direction for which to get byte count.
+ * @return the number of bytes currently stored in the queue for the specified
+ *  direction.
+ */
+static int angie_get_queue_size(struct angie *device,
+	enum angie_payload_direction direction)
+{
+	struct angie_cmd *current = device->queue_start;
+	int sum = 0;
+
+	while (current) {
+		switch (direction) {
+		    case PAYLOAD_DIRECTION_OUT:
+			    sum += current->payload_out_size + 1;	/* + 1 byte for Command ID */
+			    break;
+		    case PAYLOAD_DIRECTION_IN:
+			    sum += current->payload_in_size;
+			    break;
+		}
+
+		current = current->next;
+	}
+
+	return sum;
+}
+
+/**
+ * Clear the ANGIE command queue.
+ *
+ * @param device pointer to struct angie identifying ANGIE driver instance.
+ */
+static void angie_clear_queue(struct angie *device)
+{
+	struct angie_cmd *current = device->queue_start;
+	struct angie_cmd *next = NULL;
+
+	while (current) {
+		/* Save pointer to next element */
+		next = current->next;
+
+		/* Free payloads: OUT payload can be freed immediately */
+		free(current->payload_out);
+		current->payload_out = NULL;
+
+		/* IN payload MUST be freed ONLY if no other commands use the
+		 * payload_in_start buffer */
+		if (current->free_payload_in_start) {
+			free(current->payload_in_start);
+			current->payload_in_start = NULL;
+			current->payload_in = NULL;
+		}
+
+		/* Free queue element */
+		free(current);
+
+		/* Proceed with next element */
+		current = next;
+	}
+
+	device->commands_in_queue = 0;
+	device->queue_start = NULL;
+	device->queue_end = NULL;
+}
+
+/**
+ * Add a command to the ANGIE command queue.
+ *
+ * @param device pointer to struct angie identifying ANGIE driver instance.
+ * @param angie_cmd pointer to command that shall be appended to the ANGIE
+ *  command queue.
+ * @return on success: ERROR_OK
+ * @return on failure: ERROR_FAIL
+ */
+static int angie_append_queue(struct angie *device, struct angie_cmd *angie_cmd)
+{
+	int newsize_out, newsize_in;
+	int ret = ERROR_OK;
+
+	newsize_out = angie_get_queue_size(device, PAYLOAD_DIRECTION_OUT) + 1
+		+ angie_cmd->payload_out_size;
+
+	newsize_in = angie_get_queue_size(device, PAYLOAD_DIRECTION_IN)
+		+ angie_cmd->payload_in_size;
+
+	/* Check if the current command can be appended to the queue */
+	if (newsize_out > 64 || newsize_in > 64) {
+		/* New command does not fit. Execute all commands in queue before starting
+		 * new queue with the current command as first entry. */
+		ret = angie_execute_queued_commands(device, LIBUSB_TIMEOUT_MS);
+
+		if (ret == ERROR_OK)
+			ret = angie_post_process_queue(device);
+
+		if (ret == ERROR_OK)
+			angie_clear_queue(device);
+	}
+
+	if (!device->queue_start) {
+		/* Queue was empty */
+		device->commands_in_queue = 1;
+
+		device->queue_start = angie_cmd;
+		device->queue_end = angie_cmd;
+	} else {
+		/* There are already commands in the queue */
+		device->commands_in_queue++;
+
+		device->queue_end->next = angie_cmd;
+		device->queue_end = angie_cmd;
+	}
+
+	if (ret != ERROR_OK)
+		angie_clear_queue(device);
+
+	return ret;
+}
+
+/**
+ * Sends all queued ANGIE commands to the ANGIE for execution.
+ *
+ * @param device pointer to struct angie identifying ANGIE driver instance.
+ * @param timeout_ms
+ * @return on success: ERROR_OK
+ * @return on failure: ERROR_FAIL
+ */
+static int angie_execute_queued_commands(struct angie *device, int timeout_ms)
+{
+	struct angie_cmd *current;
+	int ret, i, index_out, index_in, count_out, count_in, transferred;
+	uint8_t buffer[64];
+
+	if (LOG_LEVEL_IS(LOG_LVL_DEBUG_IO))
+		angie_dump_queue(device);
+
+	index_out = 0;
+	count_out = 0;
+	count_in = 0;
+
+	for (current = device->queue_start; current; current = current->next) {
+		/* Add command to packet */
+		buffer[index_out] = current->id;
+		index_out++;
+		count_out++;
+
+		for (i = 0; i < current->payload_out_size; i++)
+			buffer[index_out + i] = current->payload_out[i];
+		index_out += current->payload_out_size;
+		count_in += current->payload_in_size;
+		count_out += current->payload_out_size;
+	}
+
+	/* Send packet to ANGIE */
+	ret = jtag_libusb_bulk_write(device->usb_device_handle, device->ep_out,
+			(char *)buffer, count_out, timeout_ms, &transferred);
+	if (ret != ERROR_OK)
+		return ret;
+	if (transferred != count_out)
+		return ERROR_FAIL;
+
+	/* Wait for response if commands contain IN payload data */
+	if (count_in > 0) {
+		ret = jtag_libusb_bulk_write(device->usb_device_handle, device->ep_in,
+				(char *)buffer, count_in, timeout_ms, &transferred);
+		if (ret != ERROR_OK)
+			return ret;
+		if (transferred != count_in)
+			return ERROR_FAIL;
+
+		/* Write back IN payload data */
+		index_in = 0;
+		for (current = device->queue_start; current; current = current->next) {
+			for (i = 0; i < current->payload_in_size; i++) {
+				current->payload_in[i] = buffer[index_in];
+				index_in++;
+			}
+		}
+	}
+	return ERROR_OK;
+}
+
+/**
+ * Convert an ANGIE command ID (\a id) to a human-readable string.
+ *
+ * @param id the ANGIE command ID.
+ * @return the corresponding human-readable string.
+ */
+static const char *angie_cmd_id_string(uint8_t id)
+{
+	switch (id) {
+	case CMD_SCAN_IN:
+		return "CMD_SCAN_IN";
+	case CMD_SLOW_SCAN_IN:
+		return "CMD_SLOW_SCAN_IN";
+	case CMD_SCAN_OUT:
+		return "CMD_SCAN_OUT";
+	case CMD_SLOW_SCAN_OUT:
+		return "CMD_SLOW_SCAN_OUT";
+	case CMD_SCAN_IO:
+		return "CMD_SCAN_IO";
+	case CMD_SLOW_SCAN_IO:
+		return "CMD_SLOW_SCAN_IO";
+	case CMD_CLOCK_TMS:
+		return "CMD_CLOCK_TMS";
+	case CMD_SLOW_CLOCK_TMS:
+		return "CMD_SLOW_CLOCK_TMS";
+	case CMD_CLOCK_TCK:
+		return "CMD_CLOCK_TCK";
+	case CMD_SLOW_CLOCK_TCK:
+		return "CMD_SLOW_CLOCK_TCK";
+	case CMD_SLEEP_US:
+		return "CMD_SLEEP_US";
+	case CMD_SLEEP_MS:
+		return "CMD_SLEEP_MS";
+	case CMD_GET_SIGNALS:
+		return "CMD_GET_SIGNALS";
+	case CMD_SET_SIGNALS:
+		return "CMD_SET_SIGNALS";
+	case CMD_CONFIGURE_TCK_FREQ:
+		return "CMD_CONFIGURE_TCK_FREQ";
+	case CMD_SET_LEDS:
+		return "CMD_SET_LEDS";
+	case CMD_TEST:
+		return "CMD_TEST";
+	default:
+		return "CMD_UNKNOWN";
+	}
+}
+
+/**
+ * Print one ANGIE command to stdout.
+ *
+ * @param angie_cmd pointer to ANGIE command.
+ */
+static void angie_dump_command(struct angie_cmd *angie_cmd)
+{
+	char hex[64 * 3];
+	for (int i = 0; i < angie_cmd->payload_out_size; i++)
+		sprintf(hex + 3 * i, "%02" PRIX8 " ", angie_cmd->payload_out[i]);
+
+	hex[3 * angie_cmd->payload_out_size - 1] = 0;
+	LOG_DEBUG_IO(" %-22s | OUT size = %" PRIi8 ", bytes = %s",
+					angie_cmd_id_string(angie_cmd->id), angie_cmd->payload_out_size, hex);
+
+	LOG_DEBUG_IO("\n                         | IN size  =  %" PRIi8 "\n", angie_cmd->payload_in_size);
+}
+
+/**
+ * Print the ANGIE command queue to stdout.
+ *
+ * @param device pointer to struct angie identifying ANGIE driver instance.
+ */
+static void angie_dump_queue(struct angie *device)
+{
+	struct angie_cmd *current;
+
+	LOG_DEBUG_IO("ANGIE command queue:\n");
+
+	for (current = device->queue_start; current; current = current->next)
+		angie_dump_command(current);
+}
+
+/**
+ * Perform JTAG scan
+ *
+ * Creates and appends a JTAG scan command to the ANGIE command queue.
+ * A JTAG scan consists of three steps:
+ * - Move to the desired SHIFT state, depending on scan type (IR/DR scan).
+ * - Shift TDI data into the JTAG chain, optionally reading the TDO pin.
+ * - Move to the desired end state.
+ *
+ * @param device pointer to struct angie identifying ANGIE driver instance.
+ * @param scan_type the type of the scan (IN, OUT, IO (bidirectional)).
+ * @param scan_size_bits number of bits to shift into the JTAG chain.
+ * @param tdi pointer to array containing TDI data.
+ * @param tdo_start pointer to first element of array where TDO data shall be
+ *  stored. See #angie_cmd for details.
+ * @param tdo pointer to array where TDO data shall be stored
+ * @param tms_count_start number of TMS state transitions to perform BEFORE
+ *  shifting data into the JTAG chain.
+ * @param tms_sequence_start sequence of TMS state transitions that will be
+ *  performed BEFORE shifting data into the JTAG chain.
+ * @param tms_count_end number of TMS state transitions to perform AFTER
+ *  shifting data into the JTAG chain.
+ * @param tms_sequence_end sequence of TMS state transitions that will be
+ *  performed AFTER shifting data into the JTAG chain.
+ * @param origin pointer to OpenOCD command that generated this scan command.
+ * @param postprocess whether this command needs to be post-processed after
+ *  execution.
+ * @return on success: ERROR_OK
+ * @return on failure: ERROR_FAIL
+ */
+static int angie_append_scan_cmd(struct angie *device, enum scan_type scan_type,
+	int scan_size_bits, uint8_t *tdi, uint8_t *tdo_start, uint8_t *tdo,
+	uint8_t tms_count_start, uint8_t tms_sequence_start, uint8_t tms_count_end,
+	uint8_t tms_sequence_end, struct jtag_command *origin, bool postprocess)
+{
+	struct angie_cmd *cmd = calloc(1, sizeof(struct angie_cmd));
+	int ret, i, scan_size_bytes;
+	uint8_t bits_last_byte;
+
+	if (!cmd)
+		return ERROR_FAIL;
+
+	/* Check size of command. USB buffer can hold 64 bytes, 1 byte is command ID,
+	 * 5 bytes are setup data -> 58 remaining payload bytes for TDI data */
+	if (scan_size_bits > (58 * 8)) {
+		LOG_ERROR("BUG: Tried to create CMD_SCAN_IO ANGIE command with too"
+			" large payload");
+		free(cmd);
+		return ERROR_FAIL;
+	}
+
+	scan_size_bytes = DIV_ROUND_UP(scan_size_bits, 8);
+
+	bits_last_byte = scan_size_bits % 8;
+	if (bits_last_byte == 0)
+		bits_last_byte = 8;
+
+	/* Allocate out_payload depending on scan type */
+	switch (scan_type) {
+	    case SCAN_IN:
+		    if (device->delay_scan_in < 0)
+			    cmd->id = CMD_SCAN_IN;
+		    else
+			    cmd->id = CMD_SLOW_SCAN_IN;
+		    ret = angie_allocate_payload(cmd, 5, PAYLOAD_DIRECTION_IN);
+		    break;
+	    case SCAN_OUT:
+		    if (device->delay_scan_out < 0)
+			    cmd->id = CMD_SCAN_OUT;
+		    else
+			    cmd->id = CMD_SLOW_SCAN_OUT;
+		    ret = angie_allocate_payload(cmd, scan_size_bytes + 5, PAYLOAD_DIRECTION_OUT);
+		    break;
+	    case SCAN_IO:
+		    if (device->delay_scan_io < 0)
+			    cmd->id = CMD_SCAN_IO;
+		    else
+			    cmd->id = CMD_SLOW_SCAN_IO;
+		    ret = angie_allocate_payload(cmd, scan_size_bytes + 5, PAYLOAD_DIRECTION_OUT);
+		    break;
+	    default:
+		    LOG_ERROR("BUG: 'append scan cmd' encountered an unknown scan type");
+		    ret = ERROR_FAIL;
+		    break;
+	}
+
+	if (ret != ERROR_OK) {
+		free(cmd);
+		return ret;
+	}
+
+	/* Build payload_out that is common to all scan types */
+	cmd->payload_out[0] = scan_size_bytes & 0xFF;
+	cmd->payload_out[1] = bits_last_byte & 0xFF;
+	cmd->payload_out[2] = ((tms_count_start & 0x0F) << 4) | (tms_count_end & 0x0F);
+	cmd->payload_out[3] = tms_sequence_start;
+	cmd->payload_out[4] = tms_sequence_end;
+
+	/* Setup payload_out for types with OUT transfer */
+	if (scan_type == SCAN_OUT || scan_type == SCAN_IO) {
+		for (i = 0; i < scan_size_bytes; i++)
+			cmd->payload_out[i + 5] = tdi[i];
+	}
+
+	/* Setup payload_in pointers for types with IN transfer */
+	if (scan_type == SCAN_IN || scan_type == SCAN_IO) {
+		cmd->payload_in_start = tdo_start;
+		cmd->payload_in = tdo;
+		cmd->payload_in_size = scan_size_bytes;
+	}
+
+	cmd->needs_postprocessing = postprocess;
+	cmd->cmd_origin = origin;
+
+	/* For scan commands, we free payload_in_start only when the command is
+	 * the last in a series of split commands or a stand-alone command */
+	cmd->free_payload_in_start = postprocess;
+
+	return angie_append_queue(device, cmd);
+}
+
+/**
+ * Perform TAP state transitions
+ *
+ * @param device pointer to struct angie identifying ANGIE driver instance.
+ * @param count defines the number of TCK clock cycles generated (up to 8).
+ * @param sequence defines the TMS pin levels for each state transition. The
+ *  Least-Significant Bit is read first.
+ * @return on success: ERROR_OK
+ * @return on failure: ERROR_FAIL
+ */
+static int angie_append_clock_tms_cmd(struct angie *device, uint8_t count,
+	uint8_t sequence)
+{
+	struct angie_cmd *cmd = calloc(1, sizeof(struct angie_cmd));
+	int ret;
+
+	if (!cmd) {
+		LOG_ERROR("Out of memory");
+		return ERROR_FAIL;
+	}
+
+	if (device->delay_clock_tms < 0)
+		cmd->id = CMD_CLOCK_TMS;
+	else
+		cmd->id = CMD_SLOW_CLOCK_TMS;
+
+	/* CMD_CLOCK_TMS has two OUT payload bytes and zero IN payload bytes */
+	ret = angie_allocate_payload(cmd, 2, PAYLOAD_DIRECTION_OUT);
+	if (ret != ERROR_OK) {
+		free(cmd);
+		return ret;
+	}
+
+	cmd->payload_out[0] = count;
+	cmd->payload_out[1] = sequence;
+
+	return angie_append_queue(device, cmd);
+}
+
+/**
+ * Generate a defined amount of TCK clock cycles
+ *
+ * All other JTAG signals are left unchanged.
+ *
+ * @param device pointer to struct angie identifying ANGIE driver instance.
+ * @param count the number of TCK clock cycles to generate.
+ * @return on success: ERROR_OK
+ * @return on failure: ERROR_FAIL
+ */
+static int angie_append_clock_tck_cmd(struct angie *device, uint16_t count)
+{
+	struct angie_cmd *cmd = calloc(1, sizeof(struct angie_cmd));
+	int ret;
+
+	if (!cmd) {
+		LOG_ERROR("Out of memory");
+		return ERROR_FAIL;
+	}
+
+	if (device->delay_clock_tck < 0)
+		cmd->id = CMD_CLOCK_TCK;
+	else
+		cmd->id = CMD_SLOW_CLOCK_TCK;
+
+	/* CMD_CLOCK_TCK has two OUT payload bytes and zero IN payload bytes */
+	ret = angie_allocate_payload(cmd, 2, PAYLOAD_DIRECTION_OUT);
+	if (ret != ERROR_OK) {
+		free(cmd);
+		return ret;
+	}
+
+	cmd->payload_out[0] = count & 0xff;
+	cmd->payload_out[1] = (count >> 8) & 0xff;
+
+	return angie_append_queue(device, cmd);
+}
+
+/**
+ * Read JTAG signals.
+ *
+ * @param device pointer to struct angie identifying ANGIE driver instance.
+ * @return on success: ERROR_OK
+ * @return on failure: ERROR_FAIL
+ */
+static int angie_append_get_signals_cmd(struct angie *device)
+{
+	struct angie_cmd *cmd = calloc(1, sizeof(struct angie_cmd));
+	int ret;
+
+	if (!cmd) {
+		LOG_ERROR("Out of memory");
+		return ERROR_FAIL;
+	}
+
+	cmd->id = CMD_GET_SIGNALS;
+	cmd->needs_postprocessing = true;
+
+	/* CMD_GET_SIGNALS has two IN payload bytes */
+	ret = angie_allocate_payload(cmd, 2, PAYLOAD_DIRECTION_IN);
+
+	if (ret != ERROR_OK) {
+		free(cmd);
+		return ret;
+	}
+
+	return angie_append_queue(device, cmd);
+}
+
+/**
+ * Arbitrarily set JTAG output signals.
+ *
+ * @param device pointer to struct angie identifying ANGIE driver instance.
+ * @param low defines which signals will be de-asserted. Each bit corresponds
+ *  to a JTAG signal:
+ *  - SIGNAL_TDI
+ *  - SIGNAL_TMS
+ *  - SIGNAL_TCK
+ *  - SIGNAL_TRST
+ *  - SIGNAL_BRKIN
+ *  - SIGNAL_RESET
+ *  - SIGNAL_OCDSE
+ * @param high defines which signals will be asserted.
+ * @return on success: ERROR_OK
+ * @return on failure: ERROR_FAIL
+ */
+static int angie_append_set_signals_cmd(struct angie *device, uint8_t low,
+	uint8_t high)
+{
+	struct angie_cmd *cmd = calloc(1, sizeof(struct angie_cmd));
+	int ret;
+
+	if (!cmd) {
+		LOG_ERROR("Out of memory");
+		return ERROR_FAIL;
+	}
+
+	cmd->id = CMD_SET_SIGNALS;
+
+	/* CMD_SET_SIGNALS has two OUT payload bytes and zero IN payload bytes */
+	ret = angie_allocate_payload(cmd, 2, PAYLOAD_DIRECTION_OUT);
+
+	if (ret != ERROR_OK) {
+		free(cmd);
+		return ret;
+	}
+
+	cmd->payload_out[0] = low;
+	cmd->payload_out[1] = high;
+
+	return angie_append_queue(device, cmd);
+}
+
+/**
+ * Sleep for a pre-defined number of microseconds
+ *
+ * @param device pointer to struct angie identifying ANGIE driver instance.
+ * @param us the number microseconds to sleep.
+ * @return on success: ERROR_OK
+ * @return on failure: ERROR_FAIL
+ */
+static int angie_append_sleep_cmd(struct angie *device, uint32_t us)
+{
+	struct angie_cmd *cmd = calloc(1, sizeof(struct angie_cmd));
+	int ret;
+
+	if (!cmd) {
+		LOG_ERROR("Out of memory");
+		return ERROR_FAIL;
+	}
+
+	cmd->id = CMD_SLEEP_US;
+
+	/* CMD_SLEEP_US has two OUT payload bytes and zero IN payload bytes */
+	ret = angie_allocate_payload(cmd, 2, PAYLOAD_DIRECTION_OUT);
+
+	if (ret != ERROR_OK) {
+		free(cmd);
+		return ret;
+	}
+
+	cmd->payload_out[0] = us & 0x00ff;
+	cmd->payload_out[1] = (us >> 8) & 0x00ff;
+
+	return angie_append_queue(device, cmd);
+}
+
+/**
+ * Set TCK delay counters
+ *
+ * @param device pointer to struct angie identifying ANGIE driver instance.
+ * @param delay_scan_in delay count top value in jtag_slow_scan_in() function.
+ * @param delay_scan_out delay count top value in jtag_slow_scan_out() function.
+ * @param delay_scan_io delay count top value in jtag_slow_scan_io() function.
+ * @param delay_tck delay count top value in jtag_clock_tck() function.
+ * @param delay_tms delay count top value in jtag_slow_clock_tms() function.
+ * @return on success: ERROR_OK
+ * @return on failure: ERROR_FAIL
+ */
+static int angie_append_configure_tck_cmd(struct angie *device, int delay_scan_in,
+	int delay_scan_out, int delay_scan_io, int delay_tck, int delay_tms)
+{
+	struct angie_cmd *cmd = calloc(1, sizeof(struct angie_cmd));
+	int ret;
+
+	if (!cmd) {
+		LOG_ERROR("Out of memory");
+		return ERROR_FAIL;
+	}
+
+	cmd->id = CMD_CONFIGURE_TCK_FREQ;
+
+	/* CMD_CONFIGURE_TCK_FREQ has five OUT payload bytes and zero
+	 * IN payload bytes */
+	ret = angie_allocate_payload(cmd, 5, PAYLOAD_DIRECTION_OUT);
+	if (ret != ERROR_OK) {
+		free(cmd);
+		return ret;
+	}
+
+	if (delay_scan_in < 0)
+		cmd->payload_out[0] = 0;
+	else
+		cmd->payload_out[0] = (uint8_t)delay_scan_in;
+
+	if (delay_scan_out < 0)
+		cmd->payload_out[1] = 0;
+	else
+		cmd->payload_out[1] = (uint8_t)delay_scan_out;
+
+	if (delay_scan_io < 0)
+		cmd->payload_out[2] = 0;
+	else
+		cmd->payload_out[2] = (uint8_t)delay_scan_io;
+
+	if (delay_tck < 0)
+		cmd->payload_out[3] = 0;
+	else
+		cmd->payload_out[3] = (uint8_t)delay_tck;
+
+	if (delay_tms < 0)
+		cmd->payload_out[4] = 0;
+	else
+		cmd->payload_out[4] = (uint8_t)delay_tms;
+
+	return angie_append_queue(device, cmd);
+}
+
+/**
+ * Test command. Used to check if the ANGIE device is ready to accept new
+ * commands.
+ *
+ * @param device pointer to struct angie identifying ANGIE driver instance.
+ * @return on success: ERROR_OK
+ * @return on failure: ERROR_FAIL
+ */
+static int angie_append_test_cmd(struct angie *device)
+{
+	struct angie_cmd *cmd = calloc(1, sizeof(struct angie_cmd));
+	int ret;
+
+	if (!cmd) {
+		LOG_ERROR("Out of memory");
+		return ERROR_FAIL;
+	}
+
+	cmd->id = CMD_TEST;
+
+	/* CMD_TEST has one OUT payload byte and zero IN payload bytes */
+	ret = angie_allocate_payload(cmd, 1, PAYLOAD_DIRECTION_OUT);
+	if (ret != ERROR_OK) {
+		free(cmd);
+		return ret;
+	}
+
+	cmd->payload_out[0] = 0xAA;
+
+	return angie_append_queue(device, cmd);
+}
+
+/****************** ANGIE TCK frequency helper functions ******************/
+
+/**
+ * Calculate delay values for a given TCK frequency.
+ *
+ * The ANGIE firmware uses five different speed values for different
+ * commands. These speed values are calculated in these functions.
+ *
+ * The five different commands which support variable TCK frequency are
+ * implemented twice in the firmware:
+ *   1. Maximum possible frequency without any artificial delay
+ *   2. Variable frequency with artificial linear delay loop
+ *
+ * To set the ANGIE to maximum frequency, it is only necessary to use the
+ * corresponding command IDs. To set the ANGIE to a lower frequency, the
+ * delay loop top values have to be calculated first. Then, a
+ * CMD_CONFIGURE_TCK_FREQ command needs to be sent to the ANGIE device.
+ *
+ * The delay values are described by linear equations:
+ *    t = k * x + d
+ *    (t = period, k = constant, x = delay value, d = constant)
+ *
+ * Thus, the delay can be calculated as in the following equation:
+ *    x = (t - d) / k
+ *
+ * The constants in these equations have been determined and validated by
+ * measuring the frequency resulting from different delay values.
+ *
+ * @param type for which command to calculate the delay value.
+ * @param f TCK frequency for which to calculate the delay value in Hz.
+ * @param delay where to store resulting delay value.
+ * @return on success: ERROR_OK
+ * @return on failure: ERROR_FAIL
+ */
+static int angie_calculate_delay(enum angie_delay_type type, long f, int *delay)
+{
+	float t_us, x, x_ceil;
+
+	/* Calculate period of requested TCK frequency */
+	t_us = 1000000.0 / f;
+
+	switch (type) {
+	    case DELAY_CLOCK_TCK:
+		    x = (t_us - 6.0) / 4;
+		    break;
+	    case DELAY_CLOCK_TMS:
+		    x = (t_us - 8.5) / 4;
+		    break;
+	    case DELAY_SCAN_IN:
+		    x = (t_us - 8.8308) / 4;
+		    break;
+	    case DELAY_SCAN_OUT:
+		    x = (t_us - 10.527) / 4;
+		    break;
+	    case DELAY_SCAN_IO:
+		    x = (t_us - 13.132) / 4;
+		    break;
+	    default:
+		    return ERROR_FAIL;
+		    break;
+	}
+
+	/* Check if the delay value is negative. This happens when a frequency is
+	 * requested that is too high for the delay loop implementation. In this
+	 * case, set delay value to zero. */
+	if (x < 0)
+		x = 0;
+
+	/* We need to convert the exact delay value to an integer. Therefore, we
+	 * round the exact value UP to ensure that the resulting frequency is NOT
+	 * higher than the requested frequency. */
+	x_ceil = ceilf(x);
+
+	/* Check if the value is within limits */
+	if (x_ceil > 255)
+		return ERROR_FAIL;
+
+	*delay = (int)x_ceil;
+
+	return ERROR_OK;
+}
+
+/**
+ * Calculate frequency for a given delay value.
+ *
+ * Similar to the #angie_calculate_delay function, this function calculates the
+ * TCK frequency for a given delay value by using linear equations of the form:
+ *    t = k * x + d
+ *    (t = period, k = constant, x = delay value, d = constant)
+ *
+ * @param type for which command to calculate the delay value.
+ * @param delay value for which to calculate the resulting TCK frequency.
+ * @return the resulting TCK frequency
+ */
+static long angie_calculate_frequency(enum angie_delay_type type, int delay)
+{
+	float t_us, f_float;
+
+	if (delay > 255)
+		return 0;
+
+	switch (type) {
+	    case DELAY_CLOCK_TCK:
+		    if (delay < 0)
+			    t_us = 2.666;
+		    else
+			    t_us = (4.0 * delay) + 6.0;
+		    break;
+	    case DELAY_CLOCK_TMS:
+		    if (delay < 0)
+			    t_us = 5.666;
+		    else
+			    t_us = (4.0 * delay) + 8.5;
+		    break;
+	    case DELAY_SCAN_IN:
+		    if (delay < 0)
+			    t_us = 5.5;
+		    else
+			    t_us = (4.0 * delay) + 8.8308;
+		    break;
+	    case DELAY_SCAN_OUT:
+		    if (delay < 0)
+			    t_us = 7.0;
+		    else
+			    t_us = (4.0 * delay) + 10.527;
+		    break;
+	    case DELAY_SCAN_IO:
+		    if (delay < 0)
+			    t_us = 9.926;
+		    else
+			    t_us = (4.0 * delay) + 13.132;
+		    break;
+	    default:
+		    return 0;
+	}
+
+	f_float = 1000000.0 / t_us;
+	return roundf(f_float);
+}
+
+/******************* Interface between ANGIE and OpenOCD ******************/
+
+/**
+ * Sets the end state follower (see interface.h) if \a endstate is a stable
+ * state.
+ *
+ * @param endstate the state the end state follower should be set to.
+ */
+static void angie_set_end_state(tap_state_t endstate)
+{
+	if (tap_is_state_stable(endstate))
+		tap_set_end_state(endstate);
+	else
+		LOG_ERROR("BUG: %s is not a valid end state", tap_state_name(endstate));
+}
+
+/**
+ * Move from the current TAP state to the current TAP end state.
+ *
+ * @param device pointer to struct angie identifying ANGIE driver instance.
+ * @return on success: ERROR_OK
+ * @return on failure: ERROR_FAIL
+ */
+static int angie_queue_statemove(struct angie *device)
+{
+	uint8_t tms_sequence, tms_count;
+	int ret;
+
+	if (tap_get_state() == tap_get_end_state()) {
+		/* Do nothing if we are already there */
+		return ERROR_OK;
+	}
+
+	tms_sequence = tap_get_tms_path(tap_get_state(), tap_get_end_state());
+	tms_count = tap_get_tms_path_len(tap_get_state(), tap_get_end_state());
+
+	ret = angie_append_clock_tms_cmd(device, tms_count, tms_sequence);
+
+	if (ret == ERROR_OK)
+		tap_set_state(tap_get_end_state());
+
+	return ret;
+}
+
+/**
+ * Perform a scan operation on a JTAG register.
+ *
+ * @param device pointer to struct angie identifying ANGIE driver instance.
+ * @param cmd pointer to the command that shall be executed.
+ * @return on success: ERROR_OK
+ * @return on failure: ERROR_FAIL
+ */
+static int angie_queue_scan(struct angie *device, struct jtag_command *cmd)
+{
+	uint32_t scan_size_bits, scan_size_bytes, bits_last_scan;
+	uint32_t scans_max_payload, bytecount;
+	uint8_t *tdi_buffer_start = NULL, *tdi_buffer = NULL;
+	uint8_t *tdo_buffer_start = NULL, *tdo_buffer = NULL;
+
+	uint8_t first_tms_count, first_tms_sequence;
+	uint8_t last_tms_count, last_tms_sequence;
+
+	uint8_t tms_count_pause, tms_sequence_pause;
+	uint8_t tms_count_resume, tms_sequence_resume;
+
+	uint8_t tms_count_start, tms_sequence_start;
+	uint8_t tms_count_end, tms_sequence_end;
+
+	enum scan_type type;
+	int ret;
+
+	/* Determine scan size */
+	scan_size_bits = jtag_scan_size(cmd->cmd.scan);
+	scan_size_bytes = DIV_ROUND_UP(scan_size_bits, 8);
+
+	/* Determine scan type (IN/OUT/IO) */
+	type = jtag_scan_type(cmd->cmd.scan);
+
+	/* Determine number of scan commands with maximum payload */
+	scans_max_payload = scan_size_bytes / 58;
+
+	/* Determine size of last shift command */
+	bits_last_scan = scan_size_bits - (scans_max_payload * 58 * 8);
+
+	/* Allocate TDO buffer if required */
+	if (type == SCAN_IN || type == SCAN_IO) {
+		tdo_buffer_start = calloc(sizeof(uint8_t), scan_size_bytes);
+
+		if (!tdo_buffer_start)
+			return ERROR_FAIL;
+
+		tdo_buffer = tdo_buffer_start;
+	}
+
+	/* Fill TDI buffer if required */
+	if (type == SCAN_OUT || type == SCAN_IO) {
+		jtag_build_buffer(cmd->cmd.scan, &tdi_buffer_start);
+		tdi_buffer = tdi_buffer_start;
+	}
+
+	/* Get TAP state transitions */
+	if (cmd->cmd.scan->ir_scan) {
+		angie_set_end_state(TAP_IRSHIFT);
+		first_tms_count = tap_get_tms_path_len(tap_get_state(), tap_get_end_state());
+		first_tms_sequence = tap_get_tms_path(tap_get_state(), tap_get_end_state());
+
+		tap_set_state(TAP_IRSHIFT);
+		tap_set_end_state(cmd->cmd.scan->end_state);
+		last_tms_count = tap_get_tms_path_len(tap_get_state(), tap_get_end_state());
+		last_tms_sequence = tap_get_tms_path(tap_get_state(), tap_get_end_state());
+
+		/* TAP state transitions for split scans */
+		tms_count_pause = tap_get_tms_path_len(TAP_IRSHIFT, TAP_IRPAUSE);
+		tms_sequence_pause = tap_get_tms_path(TAP_IRSHIFT, TAP_IRPAUSE);
+		tms_count_resume = tap_get_tms_path_len(TAP_IRPAUSE, TAP_IRSHIFT);
+		tms_sequence_resume = tap_get_tms_path(TAP_IRPAUSE, TAP_IRSHIFT);
+	} else {
+		angie_set_end_state(TAP_DRSHIFT);
+		first_tms_count = tap_get_tms_path_len(tap_get_state(), tap_get_end_state());
+		first_tms_sequence = tap_get_tms_path(tap_get_state(), tap_get_end_state());
+
+		tap_set_state(TAP_DRSHIFT);
+		tap_set_end_state(cmd->cmd.scan->end_state);
+		last_tms_count = tap_get_tms_path_len(tap_get_state(), tap_get_end_state());
+		last_tms_sequence = tap_get_tms_path(tap_get_state(), tap_get_end_state());
+
+		/* TAP state transitions for split scans */
+		tms_count_pause = tap_get_tms_path_len(TAP_DRSHIFT, TAP_DRPAUSE);
+		tms_sequence_pause = tap_get_tms_path(TAP_DRSHIFT, TAP_DRPAUSE);
+		tms_count_resume = tap_get_tms_path_len(TAP_DRPAUSE, TAP_DRSHIFT);
+		tms_sequence_resume = tap_get_tms_path(TAP_DRPAUSE, TAP_DRSHIFT);
+	}
+
+	/* Generate scan commands */
+	bytecount = scan_size_bytes;
+	while (bytecount > 0) {
+		if (bytecount == scan_size_bytes) {
+			/* This is the first scan */
+			tms_count_start = first_tms_count;
+			tms_sequence_start = first_tms_sequence;
+		} else {
+			/* Resume from previous scan */
+			tms_count_start = tms_count_resume;
+			tms_sequence_start = tms_sequence_resume;
+		}
+
+		if (bytecount > 58) {	/* Full scan, at least one scan will follow */
+			tms_count_end = tms_count_pause;
+			tms_sequence_end = tms_sequence_pause;
+
+			ret = angie_append_scan_cmd(device,
+					type,
+					58 * 8,
+					tdi_buffer,
+					tdo_buffer_start,
+					tdo_buffer,
+					tms_count_start,
+					tms_sequence_start,
+					tms_count_end,
+					tms_sequence_end,
+					cmd,
+					false);
+
+			bytecount -= 58;
+
+			/* Update TDI and TDO buffer pointers */
+			if (tdi_buffer_start)
+				tdi_buffer += 58;
+			if (tdo_buffer_start)
+				tdo_buffer += 58;
+		} else if (bytecount == 58) {	/* Full scan, no further scans */
+			tms_count_end = last_tms_count;
+			tms_sequence_end = last_tms_sequence;
+
+			ret = angie_append_scan_cmd(device,
+					type,
+					58 * 8,
+					tdi_buffer,
+					tdo_buffer_start,
+					tdo_buffer,
+					tms_count_start,
+					tms_sequence_start,
+					tms_count_end,
+					tms_sequence_end,
+					cmd,
+					true);
+
+			bytecount = 0;
+		} else {/* Scan with less than maximum payload, no further scans */
+			tms_count_end = last_tms_count;
+			tms_sequence_end = last_tms_sequence;
+
+			ret = angie_append_scan_cmd(device,
+					type,
+					bits_last_scan,
+					tdi_buffer,
+					tdo_buffer_start,
+					tdo_buffer,
+					tms_count_start,
+					tms_sequence_start,
+					tms_count_end,
+					tms_sequence_end,
+					cmd,
+					true);
+
+			bytecount = 0;
+		}
+
+		if (ret != ERROR_OK) {
+			free(tdi_buffer_start);
+			free(tdo_buffer_start);
+			return ret;
+		}
+	}
+
+	free(tdi_buffer_start);
+
+	/* Set current state to the end state requested by the command */
+	tap_set_state(cmd->cmd.scan->end_state);
+
+	return ERROR_OK;
+}
+
+/**
+ * Move the TAP into the Test Logic Reset state.
+ *
+ * @param device pointer to struct angie identifying ANGIE driver instance.
+ * @param cmd pointer to the command that shall be executed.
+ * @return on success: ERROR_OK
+ * @return on failure: ERROR_FAIL
+ */
+static int angie_queue_tlr_reset(struct angie *device, struct jtag_command *cmd)
+{
+	int ret = angie_append_clock_tms_cmd(device, 5, 0xff);
+
+	if (ret == ERROR_OK)
+		tap_set_state(TAP_RESET);
+
+	return ret;
+}
+
+/**
+ * Run Test.
+ *
+ * Generate TCK clock cycles while remaining
+ * in the Run-Test/Idle state.
+ *
+ * @param device pointer to struct angie identifying ANGIE driver instance.
+ * @param cmd pointer to the command that shall be executed.
+ * @return on success: ERROR_OK
+ * @return on failure: ERROR_FAIL
+ */
+static int angie_queue_runtest(struct angie *device, struct jtag_command *cmd)
+{
+	int ret;
+
+	/* Only perform statemove if the TAP currently isn't in the TAP_IDLE state */
+	if (tap_get_state() != TAP_IDLE) {
+		angie_set_end_state(TAP_IDLE);
+		angie_queue_statemove(device);
+	}
+
+	/* Generate the clock cycles */
+	ret = angie_append_clock_tck_cmd(device, cmd->cmd.runtest->num_cycles);
+	if (ret != ERROR_OK)
+		return ret;
+
+	/* Move to end state specified in command */
+	if (cmd->cmd.runtest->end_state != tap_get_state()) {
+		tap_set_end_state(cmd->cmd.runtest->end_state);
+		angie_queue_statemove(device);
+	}
+
+	return ERROR_OK;
+}
+
+/**
+ * Execute a JTAG_RESET command
+ *
+ * @param device
+ * @param trst indicate if trst signal is activated.
+ * @param srst indicate if srst signal is activated.
+ * @return on success: ERROR_OK
+ * @return on failure: ERROR_FAIL
+ */
+static int angie_reset(int trst, int srst)
+{
+	struct angie *device = angie_handle;
+	uint8_t low = 0, high = 0;
+
+	if (trst) {
+		tap_set_state(TAP_RESET);
+		low |= SIGNAL_TRST;
+	} else {
+		high |= SIGNAL_TRST;
+	}
+
+	if (srst)
+		low |= SIGNAL_SRST;
+	else
+		high |= SIGNAL_SRST;
+
+	int ret = angie_append_set_signals_cmd(device, low, high);
+
+	ret = angie_execute_queued_commands(device, LIBUSB_TIMEOUT_MS);
+	if (ret == ERROR_OK)
+		angie_clear_queue(device);
+
+	return ret;
+}
+
+/**
+ * Move to one TAP state or several states in succession.
+ *
+ * @param device pointer to struct angie identifying ANGIE driver instance.
+ * @param cmd pointer to the command that shall be executed.
+ * @return on success: ERROR_OK
+ * @return on failure: ERROR_FAIL
+ */
+static int angie_queue_pathmove(struct angie *device, struct jtag_command *cmd)
+{
+	int ret, i, num_states, batch_size, state_count;
+	tap_state_t *path;
+	uint8_t tms_sequence;
+
+	num_states = cmd->cmd.pathmove->num_states;
+	path = cmd->cmd.pathmove->path;
+	state_count = 0;
+
+	while (num_states > 0) {
+		tms_sequence = 0;
+
+		/* Determine batch size */
+		if (num_states >= 8)
+			batch_size = 8;
+		else
+			batch_size = num_states;
+
+		for (i = 0; i < batch_size; i++) {
+			if (tap_state_transition(tap_get_state(), false) == path[state_count]) {
+				/* Append '0' transition: clear bit 'i' in tms_sequence */
+				buf_set_u32(&tms_sequence, i, 1, 0x0);
+			} else if (tap_state_transition(tap_get_state(), true)
+				   == path[state_count]) {
+				/* Append '1' transition: set bit 'i' in tms_sequence */
+				buf_set_u32(&tms_sequence, i, 1, 0x1);
+			} else {
+				/* Invalid state transition */
+				LOG_ERROR("BUG: %s -> %s isn't a valid TAP state transition",
+					tap_state_name(tap_get_state()),
+					tap_state_name(path[state_count]));
+				return ERROR_FAIL;
+			}
+
+			tap_set_state(path[state_count]);
+			state_count++;
+			num_states--;
+		}
+
+		/* Append CLOCK_TMS command to ANGIE command queue */
+		LOG_INFO("pathmove batch: count = %i, sequence = 0x%" PRIx8 "", batch_size, tms_sequence);
+		ret = angie_append_clock_tms_cmd(angie_handle, batch_size, tms_sequence);
+		if (ret != ERROR_OK)
+			return ret;
+	}
+
+	return ERROR_OK;
+}
+
+/**
+ * Sleep for a specific amount of time.
+ *
+ * @param device pointer to struct angie identifying ANGIE driver instance.
+ * @param cmd pointer to the command that shall be executed.
+ * @return on success: ERROR_OK
+ * @return on failure: ERROR_FAIL
+ */
+static int angie_queue_sleep(struct angie *device, struct jtag_command *cmd)
+{
+	/* IMPORTANT! Due to the time offset in command execution introduced by
+	 * command queueing, this needs to be implemented in the ANGIE device */
+	return angie_append_sleep_cmd(device, cmd->cmd.sleep->us);
+}
+
+/**
+ * Generate TCK cycles while remaining in a stable state.
+ *
+ * @param device pointer to struct angie identifying ANGIE driver instance.
+ * @param cmd pointer to the command that shall be executed.
+ */
+static int angie_queue_stableclocks(struct angie *device, struct jtag_command *cmd)
+{
+	int ret;
+	unsigned int num_cycles;
+
+	if (!tap_is_state_stable(tap_get_state())) {
+		LOG_ERROR("JTAG_STABLECLOCKS: state not stable");
+		return ERROR_FAIL;
+	}
+
+	num_cycles = cmd->cmd.stableclocks->num_cycles;
+
+	/* TMS stays either high (Test Logic Reset state) or low (all other states) */
+	if (tap_get_state() == TAP_RESET)
+		ret = angie_append_set_signals_cmd(device, 0, SIGNAL_TMS);
+	else
+		ret = angie_append_set_signals_cmd(device, SIGNAL_TMS, 0);
+
+	if (ret != ERROR_OK)
+		return ret;
+
+	while (num_cycles > 0) {
+		if (num_cycles > 0xFFFF) {
+			/* ANGIE CMD_CLOCK_TCK can generate up to 0xFFFF (uint16_t) cycles */
+			ret = angie_append_clock_tck_cmd(device, 0xFFFF);
+			num_cycles -= 0xFFFF;
+		} else {
+			ret = angie_append_clock_tck...
 
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- Log -----------------------------------------------------------------
commit 9c91ce8d24d0789a0f25affb73201c9e0a6b89d8
Author: Ahmed BOUDJELIDA <abo...@na...>
Date:   Fri Jun 16 23:19:05 2023 +0200

    contrib/firmware: add new adapter ANGIE's firmware/bitstream code
    
    This is ANGIE's firmware and bitstream code.
    The 'Embeded C' code is based on the openULINK project.
    The hdl bitstream source code is for the spartan-6 FPGA included in
    ANGIE.
    
    Since ANGIE has a different microcontroller (EZ-USB FX2) than openULINK
    (EZ-USB AN2131), the registers file (reg_ezusb.h) has been changed
    completely, so are the descriptors, interruptions and the endpoints
    configuration.
    
    Change-Id: I70590c7c58bac6f1939c5ffba57e87d86850664d
    Signed-off-by: Ahmed BOUDJELIDA <abo...@na...>
    Reviewed-on: https://review.openocd.org/c/openocd/+/7701
    Tested-by: jenkins
    Reviewed-by: Antonio Borneo <bor...@gm...>

diff --git a/contrib/firmware/angie/c/Makefile b/contrib/firmware/angie/c/Makefile
new file mode 100644
index 000000000..80e8cbe57
--- /dev/null
+++ b/contrib/firmware/angie/c/Makefile
@@ -0,0 +1,75 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+#****************************************************************************
+#   File : Makefile                                                         *
+#   Contents : Code for NanoXplore USB-JTAG ANGIE adapter hardware.         *
+#   Based on openULINK project by: Martin Schmoelzer.                       *
+#   Copyright 2023, Ahmed Errached BOUDJELIDA, NanoXplore SAS.              *
+#   <abo...@na...>                                            *
+#	<ahm...@gm...>											*
+# ***************************************************************************/
+
+# Define the name of tools.
+PREFIX =
+
+# Small Device C Compiler: http://sdcc.sourceforge.net/
+CC = $(PREFIX)sdcc
+
+# 8051 assembler, part of the SDCC software package.
+AS = $(PREFIX)sdas8051
+
+# SDCC produces quite messy Intel HEX files. This tool is be used to re-format
+# those files. It is not required for the firmware download functionality in
+# the OpenOCD driver, but the resulting file is smaller.
+PACKIHX = $(PREFIX)packihx
+
+# GNU binutils size. Used to print the size of the IHX file generated by SDCC.
+SIZE = size
+
+# Source and header directories.
+SRC_DIR     = src
+INCLUDE_DIR = include
+
+CODE_SIZE = 0x3C00
+XRAM_LOC  = 0x3C00
+XRAM_SIZE = 0x0400
+
+CFLAGS  = --std-sdcc99 --opt-code-size --model-small
+LDFLAGS = --code-loc 0x0000 --code-size $(CODE_SIZE) --xram-loc $(XRAM_LOC) \
+          --xram-size $(XRAM_SIZE) --iram-size 256 --model-small
+
+# list of base object files
+OBJECTS = main.rel usb.rel protocol.rel jtag.rel delay.rel USBJmpTb.rel serial.rel gpif.rel
+HEADERS = $(INCLUDE_DIR)/usb.h          \
+          $(INCLUDE_DIR)/protocol.h     \
+          $(INCLUDE_DIR)/jtag.h         \
+          $(INCLUDE_DIR)/delay.h        \
+          $(INCLUDE_DIR)/reg_ezusb.h    \
+          $(INCLUDE_DIR)/io.h           \
+          $(INCLUDE_DIR)/serial.h       \
+          $(INCLUDE_DIR)/fx2macros.h    \
+          $(INCLUDE_DIR)/msgtypes.h
+
+# Disable all built-in rules.
+.SUFFIXES:
+
+# Targets which are executed even when identically named file is present.
+.PHONY: all, clean
+
+all: angie_firmware.ihx
+	$(SIZE) angie_firmware.ihx
+
+angie_firmware.ihx: $(OBJECTS)
+	$(CC) -mmcs51 $(LDFLAGS) -o $@ $^
+
+# Rebuild every C module (there are only 5 of them) if any header changes.
+%.rel: $(SRC_DIR)/%.c $(HEADERS)
+	$(CC) -c $(CFLAGS) -mmcs51 -I$(INCLUDE_DIR) -o $@ $<
+
+%.rel: $(SRC_DIR)/%.a51
+	$(AS) -lsgo $@ $<
+
+clean:
+	rm -f *.asm *.lst *.rel *.rst *.sym *.ihx *.lk *.map *.mem
+
+bin: angie_firmware.ihx
+	makebin -p angie_firmware.ihx angie_firmware.bin
diff --git a/contrib/firmware/angie/c/README b/contrib/firmware/angie/c/README
new file mode 100644
index 000000000..04ed0be2a
--- /dev/null
+++ b/contrib/firmware/angie/c/README
@@ -0,0 +1,37 @@
+#SPDX-License-Identifier: GPL-2.0-or-later
+
+This is the ANGIE firmware for ANGIE USB-JTAG adapter.
+
+The main components of ANGIE adapter are:
+- Cypress EZ-USB FX2 microcontroller
+- Spartan-6 FPGA
+- SRAM memory chip
+- Pin headers for various JTAG pin assignments
+
+To compile the firmware, the SDCC compiler package is required. Most Linux
+distributions include SDCC in their official package repositories. The SDCC
+source code can be found at http://sdcc.sourceforge.net/
+
+Simply type "make hex" in the ANGIE directory to compile the firmware.
+"make clean" will remove all generated files except the Intel HEX file
+required for downloading the firmware to ANGIE.
+
+Note that the EZ-USB FX2 microcontroller does not have on-chip flash,
+ANGIE include on-board EEPROM memory to store the firmware program of
+the FX2, but we are not going to use this method.
+
+Instead, upon initial connection of the ANGIE adapter to the host PC
+via USB, the EZ-USB FX2 core has enough intelligence to act as a
+stand-alone USB device, responding to USB control requests and allowing
+firmware download via a special VENDOR-type control request. Then, the
+EZ-USB microcontroller simulates a disconnect and re-connect to the USB bus.
+It may take up to two seconds for the host to recognize the newly connected
+device before OpenOCD can proceed to execute JTAG commands. This delay is
+only visible when OpenOCD first uses a blank (unconfigured) ANGIE device.
+
+Once the firmware downloaded, the FX2 microcontroller activate its GPIF mode,
+download the Spartan-6 FPGA's bitstream, program the FPGA rapidly, and switch
+back to default io mode.
+
+Once the user disconnects the ANGIE adapter, all its memory contents are lost
+and the firmware & bitstream download process has to be executed again.
diff --git a/contrib/firmware/angie/c/include/delay.h b/contrib/firmware/angie/c/include/delay.h
new file mode 100644
index 000000000..0397941fe
--- /dev/null
+++ b/contrib/firmware/angie/c/include/delay.h
@@ -0,0 +1,50 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+/****************************************************************
+    File : delay.h                                              *
+    Contents : Delays handling header file for NanoXplore       *
+    USB-JTAG ANGIE adapter hardware.                            *
+    Based on openULINK project code by: Martin Schmoelzer.      *
+    Copyright 2023, Ahmed Errached BOUDJELIDA, NanoXplore SAS.  *
+    <abo...@na...>                                *
+    <ahm...@gm...>                               *
+*****************************************************************/
+
+#ifndef __DELAY_H
+#define __DELAY_H
+
+#include <stdint.h>
+
+void syncdelay(uint8_t count);
+void delay_5us(void);
+void delay_1ms(void);
+void delay_us(uint16_t delay);
+void delay_ms(uint16_t delay);
+
+#ifndef _IFREQ
+#define _IFREQ 48000   /* IFCLK frequency in kHz */
+#endif
+
+/* CFREQ can be any one of: 48000, 24000, or 12000 */
+#ifndef _CFREQ
+#define _CFREQ 48000   /* CLKOUT frequency in kHz */
+#endif
+
+#if (_IFREQ < 5000)
+#error "_IFREQ too small!  Valid Range: 5000 to 48000..."
+#endif
+
+#if (_IFREQ > 48000)
+#error "_IFREQ too large!  Valid Range: 5000 to 48000..."
+#endif
+
+#if (_CFREQ != 48000)
+#if (_CFREQ != 24000)
+#if (_CFREQ != 12000)
+#error "_CFREQ invalid!  Valid values: 48000, 24000, 12000..."
+#endif
+#endif
+#endif
+
+/* Synchronization Delay formula: see TRM section 15-14 */
+#define _SCYCL (3 * (_CFREQ) + 5 * (_IFREQ) - 1) / (2 * (_IFREQ))
+#endif
diff --git a/contrib/firmware/angie/c/include/fx2macros.h b/contrib/firmware/angie/c/include/fx2macros.h
new file mode 100644
index 000000000..9067b5619
--- /dev/null
+++ b/contrib/firmware/angie/c/include/fx2macros.h
@@ -0,0 +1,31 @@
+/* SPDX-License-Identifier: LGPL-2.1-or-later */
+
+/*
+ * This code was taken from the fx2lib project from this link:
+ * https://github.com/djmuhlestein/fx2lib
+ *
+ * Copyright (C) 2009 Ubixum, Inc.
+*/
+
+/*! \file
+ *  Macros for simple common tasks in fx2 firmware.
+ * */
+
+#ifndef FX2MACROS_H
+#define FX2MACROS_H
+
+#include "reg_ezusb.h"
+
+typedef enum {FALSE = 0, TRUE} BOOL_VALS;
+
+/**
+ * \brief Used for getting and setting the CPU clock speed.
+ **/
+typedef enum {CLK_12M = 0, CLK_24M, CLK_48M} CLK_SPD;
+
+/**
+ * \brief Evaluates to a CLK_SPD enum.
+ **/
+#define CPUFREQ (CLK_SPD)((CPUCS & bmclkspd) >> 3)
+
+#endif
diff --git a/contrib/firmware/angie/c/include/io.h b/contrib/firmware/angie/c/include/io.h
new file mode 100644
index 000000000..35afa626f
--- /dev/null
+++ b/contrib/firmware/angie/c/include/io.h
@@ -0,0 +1,65 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+/****************************************************************************
+    File : io.h                                                             *
+    Contents : input/output declaration header file for NanoXplore          *
+    USB-JTAG ANGIE adapter hardware.                                        *
+    Based on openULINK project code by: Martin Schmoelzer.                  *
+    Copyright 2023, Ahmed Errached BOUDJELIDA, NanoXplore SAS.              *
+    <abo...@na...>                                            *
+	<ahm...@gm...>											*
+*****************************************************************************/
+
+#ifndef __IO_H
+#define __IO_H
+
+#include "reg_ezusb.h"
+
+/***************************************************************************
+ *  JTAG Signals:                                                          *
+ ***************************************************************************
+ * TMS ....... Test Mode Select                                            *
+ * TCK ....... Test Clock                                                  *
+ * TDI ....... Test Data Input  (from device point of view, not JTAG       *
+ *             adapter point of view!)                                     *
+ * TDO ....... Test Data Output (from device point of view, not JTAG       *
+ *             adapter point of view!)                                     *
+ * TRST ...... Test Reset: Used to reset the TAP Finite State Machine      *
+ *             into the Test Logic Reset state                             *
+ * SRST .....  Chip Reset                                                  *
+ ***************************************************************************/
+
+/* PORT A */
+/* PA0 Not Connected */
+/* PA1 Not Connected */
+#define PIN_RDWR_B        IOA2
+#define PIN_CSI_B         IOA3
+#define PIN_INIT_B        IOA4
+#define PIN_PROGRAM_B     IOA5
+/* PA6 Not Connected */
+/* PA7 Not Connected */
+
+/* PORT B */
+#define PIN_TRST      IOB0
+#define PIN_TMS       IOB1
+#define PIN_TCK       IOB2
+#define PIN_TDI       IOB3
+#define PIN_TDO       IOB4
+#define PIN_SRST      IOB5
+/* PA6 Not Connected */
+/* PA7 Not Connected */
+
+/* JTAG Signals with direction 'OUT' on port B */
+/* PIN_TDI - PIN_TCK - PIN_TMS - PIN_TRST - PIN_SRST */
+#define MASK_PORTB_DIRECTION_OUT (bmbit0 | bmbit1 | bmbit2 | bmbit3 | bmbit5)
+
+/* PORT C */ // Debug:
+#define PIN_T0      IOC0
+#define PIN_T1      IOC1
+#define PIN_T2      IOC2
+#define PIN_T3      IOC3
+#define PIN_T4      IOC4
+/* PC5 Not Connected */
+/* PC6 Not Connected */
+/* PC7 Not Connected */
+
+#endif
diff --git a/contrib/firmware/angie/c/include/jtag.h b/contrib/firmware/angie/c/include/jtag.h
new file mode 100644
index 000000000..6d5df6480
--- /dev/null
+++ b/contrib/firmware/angie/c/include/jtag.h
@@ -0,0 +1,31 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+/****************************************************************************
+	File : jtag.h															*
+	Contents : Jtag handling functions header file for NanoXplore			*
+	USB-JTAG ANGIE adapter hardware.										*
+	Based on openULINK project code by: Martin Schmoelzer.					*
+	Copyright 2023, Ahmed Errached BOUDJELIDA, NanoXplore SAS.				*
+	<abo...@na...>											*
+	<ahm...@gm...>											*
+*****************************************************************************/
+
+#ifndef __JTAG_H
+#define __JTAG_H
+
+#include <stdint.h>
+
+uint16_t jtag_get_signals(void);
+void jtag_configure_tck_delay(uint8_t scan_in, uint8_t scan_out,
+	uint8_t scan_io, uint8_t tck, uint8_t tms);
+void jtag_clock_tms(uint8_t count, uint8_t sequence);
+void jtag_slow_clock_tms(uint8_t count, uint8_t sequence);
+void jtag_set_signals(uint8_t low, uint8_t high);
+void jtag_clock_tck(uint16_t count);
+void jtag_slow_clock_tck(uint16_t count);
+void jtag_scan_in(uint8_t out_offset, uint8_t in_offset);
+void jtag_scan_out(uint8_t out_offset);
+void jtag_scan_io(uint8_t out_offset, uint8_t in_offset);
+void jtag_slow_scan_in(uint8_t out_offset, uint8_t in_offset);
+void jtag_slow_scan_out(uint8_t out_offset);
+void jtag_slow_scan_io(uint8_t out_offset, uint8_t in_offset);
+#endif
diff --git a/contrib/firmware/angie/c/include/msgtypes.h b/contrib/firmware/angie/c/include/msgtypes.h
new file mode 100644
index 000000000..91116904a
--- /dev/null
+++ b/contrib/firmware/angie/c/include/msgtypes.h
@@ -0,0 +1,171 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+/****************************************************************************
+    File : msgtypes.h                                                       *
+    Contents : Definition of the commands supported by NanoXplore           *
+    USB-JTAG ANGIE adapter hardware.                                        *
+    Based on openULINK project code by: Martin Schmoelzer.                  *
+    Copyright 2023, Ahmed Errached BOUDJELIDA, NanoXplore SAS.              *
+    <abo...@na...>                                            *
+	<ahm...@gm...>											*
+*****************************************************************************/
+
+/**
+ * @file
+ * Definition of the commands supported by the ANGIE firmware.
+ *
+ * Basically, two types of commands can be distinguished:
+ *  - Commands with fixed payload size
+ *  - Commands with variable payload size
+ *
+ * SCAN commands (in all variations) carry payloads of variable size, all
+ * other commands carry payloads of fixed size.
+ *
+ * In the case of SCAN commands, the payload size (n) is calculated by
+ * dividing the scan_size_bits variable by 8, rounding up the result.
+ *
+ * Offset zero always contains the command ID.
+ *
+ ****************************************************************************
+ * CMD_SCAN_IN, CMD_SLOW_SCAN_IN:                                           *
+ *                                                                          *
+ * OUT:                                                                     *
+ * offset 1: scan_size_bytes                                                *
+ * offset 2: bits_last_byte                                                 *
+ * offset 3: tms_count_start + tms_count_end                                *
+ * offset 4: tms_sequence_start                                             *
+ * offset 5: tms_sequence_end                                               *
+ *                                                                          *
+ * IN:                                                                      *
+ * offset 0..n: TDO data                                                    *
+ ****************************************************************************
+ * CMD_SCAN_OUT, CMD_SLOW_SCAN_OUT:                                         *
+ *                                                                          *
+ * OUT:                                                                     *
+ * offset 1: scan_size_bytes                                                *
+ * offset 2: bits_last_byte                                                 *
+ * offset 3: tms_count_start + tms_count_end                                *
+ * offset 4: tms_sequence_start                                             *
+ * offset 5: tms_sequence_end                                               *
+ * offset 6..x: TDI data                                                    *
+ ****************************************************************************
+ * CMD_SCAN_IO, CMD_SLOW_SCAN_IO:                                           *
+ *                                                                          *
+ * OUT:                                                                     *
+ * offset 1: scan_size_bytes                                                *
+ * offset 2: bits_last_byte                                                 *
+ * offset 3: tms_count_start + tms_count_end                                *
+ * offset 4: tms_sequence_start                                             *
+ * offset 5: tms_sequence_end                                               *
+ * offset 6..x: TDI data                                                    *
+ *                                                                          *
+ * IN:                                                                      *
+ * offset 0..n: TDO data                                                    *
+ ****************************************************************************
+ * CMD_CLOCK_TMS, CMD_SLOW_CLOCK_TMS:                                       *
+ *                                                                          *
+ * OUT:                                                                     *
+ * offset 1: tms_count                                                      *
+ * offset 2: tms_sequence                                                   *
+ ****************************************************************************
+ * CMD_CLOCK_TCK, CMD_SLOW_CLOCK_TCK:                                       *
+ *                                                                          *
+ * OUT:                                                                     *
+ * offset 1: low byte of tck_count                                          *
+ * offset 2: high byte of tck_count                                         *
+ ****************************************************************************
+ * CMD_CLOCK_SLEEP_US:                                                      *
+ *                                                                          *
+ * OUT:                                                                     *
+ * offset 1: low byte of sleep_us                                           *
+ * offset 2: high byte of sleep_us                                          *
+ ****************************************************************************
+ * CMD_CLOCK_SLEEP_MS:                                                      *
+ *                                                                          *
+ * OUT:                                                                     *
+ * offset 1: low byte of sleep_ms                                           *
+ * offset 2: high byte of sleep_ms                                          *
+ ****************************************************************************
+ * CMD_GET_SIGNALS:                                                         *
+ *                                                                          *
+ * IN:                                                                      *
+ * offset 0: current state of input signals                                 *
+ * offset 1: current state of output signals                                *
+ ****************************************************************************
+ * CMD_SET_SIGNALS:                                                         *
+ *                                                                          *
+ * OUT:                                                                     *
+ * offset 1: signals that should be de-asserted                             *
+ * offset 2: signals that should be asserted                                *
+ ****************************************************************************
+ * CMD_CONFIGURE_TCK_FREQ:                                                  *
+ *                                                                          *
+ * OUT:                                                                     *
+ * offset 1: delay value for scan_in function                               *
+ * offset 2: delay value for scan_out function                              *
+ * offset 3: delay value for scan_io function                               *
+ * offset 4: delay value for clock_tck function                             *
+ * offset 5: delay value for clock_tms function                             *
+ ****************************************************************************
+ * CMD_SET_LEDS:                                                            *
+ *                                                                          *
+ * OUT:                                                                     *
+ * offset 1: LED states:                                                    *
+ *           Bit 0: turn COM LED on                                         *
+ *           Bit 1: turn RUN LED on                                         *
+ *           Bit 2: turn COM LED off                                        *
+ *           Bit 3: turn RUN LED off                                        *
+ *           Bits 7..4: Reserved                                            *
+ ****************************************************************************
+ * CMD_TEST:                                                                *
+ *                                                                          *
+ * OUT:                                                                     *
+ * offset 1: unused dummy value                                             *
+ ****************************************************************************
+ */
+
+#ifndef __MSGTYPES_H
+#define __MSGTYPES_H
+
+/*
+ * Command IDs:
+ *
+ * Bits 7..6: Reserved, should always be zero
+ * Bits 5..0: Command ID. There are 62 usable IDs. Of this 63 available IDs,
+ *            the IDs 0x00..0x1F are commands with variable payload size,
+ *            the IDs 0x20..0x3F are commands with fixed payload size.
+ */
+
+#define CMD_ID_MASK             0x3F
+
+/* Commands with variable payload size */
+#define CMD_SCAN_IN             0x00
+#define CMD_SLOW_SCAN_IN        0x01
+#define CMD_SCAN_OUT            0x02
+#define CMD_SLOW_SCAN_OUT       0x03
+#define CMD_SCAN_IO             0x04
+#define CMD_SLOW_SCAN_IO        0x05
+
+/* Commands with fixed payload size */
+#define CMD_CLOCK_TMS           0x20
+#define CMD_SLOW_CLOCK_TMS      0x21
+#define CMD_CLOCK_TCK           0x22
+#define CMD_SLOW_CLOCK_TCK      0x23
+#define CMD_SLEEP_US            0x24
+#define CMD_SLEEP_MS            0x25
+#define CMD_GET_SIGNALS         0x26
+#define CMD_SET_SIGNALS         0x27
+#define CMD_CONFIGURE_TCK_FREQ  0x28
+#define CMD_SET_LEDS            0x29
+#define CMD_TEST                0x2A
+
+/* JTAG signal definition for jtag_get_signals() -- Input signals! */
+#define SIGNAL_TDO      1
+
+/* JTAG signal definition for jtag_get_signals() -- Output signals! */
+#define SIGNAL_TDI      8
+#define SIGNAL_TMS      2
+#define SIGNAL_TCK      4
+#define SIGNAL_TRST     1
+#define SIGNAL_SRST     32
+
+#endif
diff --git a/contrib/firmware/angie/c/include/protocol.h b/contrib/firmware/angie/c/include/protocol.h
new file mode 100644
index 000000000..a12644b27
--- /dev/null
+++ b/contrib/firmware/angie/c/include/protocol.h
@@ -0,0 +1,20 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+/****************************************************************************
+    File : protocol.h                                                       *
+    Contents : Jtag commands handling protocol header file for NanoXplore   *
+    USB-JTAG ANGIE adapter hardware.                                        *
+    Based on openULINK project code by: Martin Schmoelzer.                  *
+    Copyright 2023, Ahmed Errached BOUDJELIDA, NanoXplore SAS.              *
+    <abo...@na...>                                            *
+	<ahm...@gm...>											*
+*****************************************************************************/
+
+#ifndef __PROTOCOL_H
+#define __PROTOCOL_H
+
+#include <stdbool.h>
+
+bool execute_command(void);
+void command_loop(void);
+
+#endif
diff --git a/contrib/firmware/angie/c/include/reg_ezusb.h b/contrib/firmware/angie/c/include/reg_ezusb.h
new file mode 100644
index 000000000..c22476a1a
--- /dev/null
+++ b/contrib/firmware/angie/c/include/reg_ezusb.h
@@ -0,0 +1,656 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+/****************************************************************************
+    File : reg_ezusb.h                                                      *
+    Contents : FX2 microcontroller registers file for NanoXplore            *
+    USB-JTAG ANGIE adapter hardware.                                        *
+    Based on openULINK project code by: Martin Schmoelzer.                  *
+    Copyright 2023, Ahmed Errached BOUDJELIDA, NanoXplore SAS.              *
+    <abo...@na...>                                            *
+	<ahm...@gm...>											*
+*****************************************************************************/
+
+#ifndef REG_EZUSB_H
+#define REG_EZUSB_H
+
+/**
+ * @file
+ * All information in this file was taken from the EZ-USB FX2 Technical
+ * Reference Manual, Cypress Semiconductor, 3901 North First Street
+ * San Jose, CA 95134 (www.cypress.com).
+ *
+ * The EZ-USB Technical Reference Manual is called "EZ-USB FX2 TRM" hereafter.
+ */
+
+/* Compiler-specific definitions of SBIT, SFR, SFRX, ... macros */
+#include <mcs51/compiler.h>
+
+/* Bit vectors */
+#define bmbit0      0x01
+#define bmbit1      0x02
+#define bmbit2      0x04
+#define bmbit3      0x08
+#define bmbit4      0x10
+#define bmbit5      0x20
+#define bmbit6      0x40
+#define bmbit7      0x80
+
+/**************************************************************************
+ ************************ Special Function Registers **********************
+ ***************************************************************************/
+SFR(IOA,            0x80);
+SBIT(IOA0,          0x80, 0);
+SBIT(IOA1,          0x80, 1);
+SBIT(IOA2,          0x80, 2);
+SBIT(IOA3,          0x80, 3);
+SBIT(IOA4,          0x80, 4);
+SBIT(IOA5,          0x80, 5);
+SBIT(IOA6,          0x80, 6);
+SBIT(IOA7,          0x80, 7);
+
+SFR(SP,             0x81);
+SFR(DPL0,           0x82);
+SFR(DPH0,           0x83);
+SFR(DPL1,           0x84);
+SFR(DPL2,           0x85);
+
+SFR(DPS,            0x86);
+#define SEL         bmbit0
+/* Bit 1 read-only, always reads '0' */
+/* Bit 2 read-only, always reads '0' */
+/* Bit 3 read-only, always reads '0' */
+/* Bit 4 read-only, always reads '0' */
+/* Bit 5 read-only, always reads '0' */
+/* Bit 6 read-only, always reads '0' */
+/* Bit 7 read-only, always reads '0' */
+
+SFR(PCON,           0x87);
+#define IDLE        bmbit0
+#define STOP        bmbit1
+#define GF0         bmbit2
+#define GF1         bmbit3
+/* Bit 4 read-only, always reads '1' */
+/* Bit 5 read-only, always reads '1' */
+/* Bit 6 unused */
+#define SMOD0     bmbit7
+
+SFR(TCON,           0x88);
+SBIT(IT0,           0x88, 0);
+SBIT(IE0,           0x88, 1);
+SBIT(IT1,           0x88, 2);
+SBIT(IE1,           0x88, 3);
+SBIT(TR0,           0x88, 4);
+SBIT(TF0,           0x88, 5);
+SBIT(TR1,           0x88, 6);
+SBIT(TF1,           0x88, 7);
+
+SFR(TMOD,           0x89);
+SFR(TL0,            0x8A);
+SFR(TL1,            0x8B);
+SFR(TH0,            0x8C);
+SFR(TH1,            0x8D);
+
+SFR(CKCON,          0x8E);
+#define MD0         bmbit0
+#define MD1         bmbit1
+#define MD2         bmbit2
+#define T0M         bmbit3
+#define T1M         bmbit4
+#define T2M         bmbit5
+/* Bit 6 unused */
+/* Bit 7 unused */
+
+SFR(SPC_FNC,        0x8F);
+#define BMWRS       bmbit0
+/* Bit 1 read-only, always reads '0' */
+/* Bit 2 read-only, always reads '0' */
+/* Bit 3 read-only, always reads '0' */
+/* Bit 4 read-only, always reads '0' */
+/* Bit 5 read-only, always reads '0' */
+/* Bit 6 read-only, always reads '0' */
+/* Bit 7 read-only, always reads '0' */
+
+SFR(IOB,            0x90);
+SBIT(IOB0,          0x90, 0);
+SBIT(IOB1,          0x90, 1);
+SBIT(IOB2,          0x90, 2);
+SBIT(IOB3,          0x90, 3);
+SBIT(IOB4,          0x90, 4);
+SBIT(IOB5,          0x90, 5);
+SBIT(IOB6,          0x90, 6);
+SBIT(IOB7,          0x90, 7);
+
+SFR(EXIF,           0x91);
+SBIT(USBINT,        0x91, 4);
+SBIT(I2CINT,        0x91, 5);
+SBIT(IE4,           0x91, 6);
+SBIT(IE5,           0x91, 7);
+
+SFR(MPAGE,          0x92);
+SFR(SCON0,          0x98);
+SBIT(RI,            0x98, 0);
+SBIT(TI,            0x98, 1);
+SBIT(RB8,           0x98, 2);
+SBIT(TB8,           0x98, 3);
+SBIT(REN,           0x98, 4);
+SBIT(SM2,           0x98, 5);
+SBIT(SM1,           0x98, 6);
+SBIT(SM0,           0x98, 7);
+
+SFR(SBUF0,          0x99);
+SFR(AUTOPTRH1,      0x9A);
+SFR(AUTOPTRL1,      0x9B);
+SFR(AUTOPTRH2,      0x9D);
+SFR(AUTOPTRL2,      0x9E);
+
+#define AUTOPTR1H AUTOPTRH1 /* for backwards compatibility with examples */
+#define AUTOPTR1L AUTOPTRL1 /* for backwards compatibility with examples */
+#define APTR1H AUTOPTRH1 /* for backwards compatibility with examples */
+#define APTR1L AUTOPTRL1 /* for backwards compatibility with examples */
+
+SFR(IOC,            0xA0);
+SBIT(IOC0,          0xA0, 0);
+SBIT(IOC1,          0xA0, 1);
+SBIT(IOC2,          0xA0, 2);
+SBIT(IOC3,          0xA0, 3);
+SBIT(IOC4,          0xA0, 4);
+SBIT(IOC5,          0xA0, 5);
+SBIT(IOC6,          0xA0, 6);
+SBIT(IOC7,          0xA0, 7);
+
+SFR(INT2CLR,        0xA1);
+SFR(INT4CLR,        0xA2);
+SFR(IE,             0xA8);
+SBIT(EX0,           0xA8, 0);
+SBIT(ET0,           0xA8, 1);
+SBIT(EX1,           0xA8, 2);
+SBIT(ET1,           0xA8, 3);
+SBIT(ES0,           0xA8, 4);
+SBIT(ET2,           0xA8, 5);
+SBIT(ES1,           0xA8, 6);
+SBIT(EA,            0xA8, 7);
+
+SFR(EP2468STAT,     0xAA);
+#define EP8F        bmbit7
+#define EP8E        bmbit6
+#define EP6F        bmbit5
+#define EP6E        bmbit4
+#define EP4F        bmbit3
+#define EP4E        bmbit2
+#define EP2F        bmbit1
+#define EP2E        bmbit0
+
+SFR(EP24FIFOFLGS,   0xAB);
+SFR(EP68FIFOFLGS,   0xAC);
+SFR(AUTOPTRSETUP,   0xAF);
+SFR(IOD,            0xB0);
+SBIT(IOD0,          0xB0, 0);
+SBIT(IOD1,          0xB0, 1);
+SBIT(IOD2,          0xB0, 2);
+SBIT(IOD3,          0xB0, 3);
+SBIT(IOD4,          0xB0, 4);
+SBIT(IOD5,          0xB0, 5);
+SBIT(IOD6,          0xB0, 6);
+SBIT(IOD7,          0xB0, 7);
+
+SFR(IOE,            0xB1);
+SFR(OEA,            0xB2);
+SFR(OEB,            0xB3);
+SFR(OEC,            0xB4);
+SFR(OED,            0xB5);
+SFR(OEE,            0xB6);
+
+SFR(IP,             0xB8);
+SBIT(PX0,           0xB8, 0);
+SBIT(PT0,           0xB8, 1);
+SBIT(PX1,           0xB8, 2);
+SBIT(PT1,           0xB8, 3);
+SBIT(PS0,           0xB8, 4);
+SBIT(PT2,           0xB8, 5);
+SBIT(PS1,           0xB8, 6);
+/* Bit 7 read-only, always reads '1' */
+
+SFR(EP01STAT,       0xBA);
+SFR(GPIFTRIG,       0xBB);
+#define BMGPIFDONE  bmbit7
+#define BMGPIFREAD  bmbit2
+#define GPIF_EP2    0
+#define GPIF_EP4    1
+#define GPIF_EP6    2
+#define GPIF_EP8    3
+
+SFR(GPIFSGLDATH,    0xBD);
+SFR(GPIFSGLDATLX,   0xBE);
+SFR(GPIFSGLDATLNOX, 0xBF);
+
+SFR(SCON1,          0xC0);
+SBIT(RI_1,          0xC0, 0);
+SBIT(TI_1,          0xC0, 1);
+SBIT(RB8_1,         0xC0, 2);
+SBIT(TB8_1,         0xC0, 3);
+SBIT(REN_1,         0xC0, 4);
+SBIT(SM2_1,         0xC0, 5);
+SBIT(SM1_1,         0xC0, 6);
+SBIT(SM0_1,         0xC0, 7);
+
+SFR(SBUF1,          0xC1);
+SFR(T2CON,          0xC8);
+SBIT(CPRL2,         0xC8, 0);
+SBIT(C_T2,          0xC8, 1);
+SBIT(TR2,           0xC8, 2);
+SBIT(EXEN2,         0xC8, 3);
+SBIT(TCLK,          0xC8, 4);
+SBIT(RCLK,          0xC8, 5);
+SBIT(EXF2,          0xC8, 6);
+SBIT(TF2,           0xC8, 7);
+
+SFR(RCAP2L,         0xCA);
+SFR(RCAP2H,         0xCB);
+SFR(TL2,            0xCC);
+SFR(TH2,            0xCD);
+SFR(PSW,            0xD0);
+SBIT(P,             0xD0, 0);
+SBIT(F1,            0xD0, 1);
+SBIT(OV,            0xD0, 2);
+SBIT(RS0,           0xD0, 3);
+SBIT(RS1,           0xD0, 4);
+SBIT(F0,            0xD0, 5);
+SBIT(AC,            0xD0, 6);
+SBIT(CY,            0xD0, 7);
+
+SFR(EICON,          0xD8);
+/* Bit 0 read-only, always reads '0' */
+/* Bit 1 read-only, always reads '0' */
+/* Bit 2 read-only, always reads '0' */
+SBIT(INT6,          0xD8, 3);
+SBIT(RESI,          0xD8, 4);
+SBIT(ERESI,         0xD8, 5);
+/* Bit 6 read-only, always reads '1' */
+SBIT(SMOD1,         0xD8, 7);
+
+SFR(ACC,            0xE0);
+SFR(EIE,            0xE8);
+SBIT(EUSB,          0xE8, 0);
+SBIT(EI2C,          0xE8, 1);
+SBIT(EX4,           0xE8, 2);
+SBIT(EX5,           0xE8, 3);
+SBIT(EWDI,          0xE8, 4);
+/* Bit 5 read-only, always reads '1' */
+/* Bit 6 read-only, always reads '1' */
+/* Bit 7 read-only, always reads '1' */
+
+SFR(B,              0xF0);
+SFR(EIP,            0xF8);
+SBIT(PUSB,          0xF8, 0);
+SBIT(PI2C,          0xF8, 1);
+SBIT(PX4,           0xF8, 2);
+SBIT(PX5,           0xF8, 3);
+SBIT(PX6,           0xF8, 4);
+/* Bit 5 read-only, always reads '1' */
+/* Bit 6 read-only, always reads '1' */
+/* Bit 7 read-only, always reads '1' */
+
+/**************************************************************************
+ ***************************** XDATA Registers ****************************
+ ***************************************************************************/
+
+SFRX(GPIF_WAVE_DATA,         0xE400);
+SFRX(RES_WAVEDATA_END,       0xE480);
+
+/* General Configuration */
+SFRX(CPUCS,         0xE600);
+#define RES8051     bmbit0
+#define CLKOE       bmbit1
+#define BMCLKINV    bmbit2
+#define bmclkspd0   bmbit3
+#define bmclkspd1   bmbit4
+#define bmclkspd   (bmbit4 | bmbit3)
+#define BMPRTCSTB   bmbit5
+
+/* PCON register */
+#define BMSMOD0     bmbit7
+
+SFRX(IFCONFIG,        0xE601);
+#define BMIFCLKSRC    bmbit7
+#define BM3048MHZ     bmbit6
+#define BMIFCLKOE     bmbit5
+#define BMIFCLKPOL    bmbit4
+#define BMASYNC       bmbit3
+#define BMGSTATE      bmbit2
+#define BMIFCFG1      bmbit1
+#define BMIFCFG0      bmbit0
+#define BMIFCFGMASK   (BMIFCFG0 | BMIFCFG1)
+#define BMIFGPIF      BMIFCFG1
+
+SFRX(PINFLAGSAB,      0xE602);
+SFRX(PINFLAGSCD,      0xE603);
+SFRX(FIFORESET,       0xE604);
+#define BMNAKALL      bmbit7
+
+SFRX(BREAKPT,         0xE605);
+#define BMBREAK       bmbit3
+#define BMBPPULSE     bmbit2
+#define BMBPEN        bmbit1
+
+SFRX(BPADDRH,         0xE606);
+SFRX(BPADDRL,         0xE607);
+SFRX(UART230,         0xE608);
+SFRX(FIFOPINPOLAR,    0xE609);
+SFRX(REVID,           0xE60A);
+SFRX(REVCTL,          0xE60B);
+#define BMNOAUTOARM    bmbit1
+#define BMSKIPCOMMIT   bmbit0
+
+/* Endpoint Configuration */
+SFRX(EP1OUTCFG,       0xE610);
+SFRX(EP1INCFG,        0xE611);
+SFRX(EP2CFG,          0xE612);
+SFRX(EP4CFG,          0xE613);
+SFRX(EP6CFG,          0xE614);
+SFRX(EP8CFG,          0xE615);
+SFRX(EP2FIFOCFG,      0xE618);
+SFRX(EP4FIFOCFG,      0xE619);
+SFRX(EP6FIFOCFG,      0xE61A);
+SFRX(EP8FIFOCFG,      0xE61B);
+#define BMINFM        bmbit6
+#define BMOEP         bmbit5
+#define BMAUTOOUT     bmbit4
+#define BMAUTOIN      bmbit3
+#define BMZEROLENIN   bmbit2
+#define BMWORDWIDE    bmbit0
+
+SFRX(EP2AUTOINLENH,   0xE620);
+SFRX(EP2AUTOINLENL,   0xE621);
+SFRX(EP4AUTOINLENH,   0xE622);
+SFRX(EP4AUTOINLENL,   0xE623);
+SFRX(EP6AUTOINLENH,   0xE612);
+SFRX(EP6AUTOINLENL,   0xE613);
+SFRX(EP8AUTOINLENH,   0xE614);
+SFRX(EP8AUTOINLENL,   0xE615);
+SFRX(EP2FIFOPFH,      0xE630);
+SFRX(EP2FIFOPFL,      0xE631);
+SFRX(EP4FIFOPFH,      0xE632);
+SFRX(EP4FIFOPFL,      0xE633);
+SFRX(EP6FIFOPFH,      0xE634);
+SFRX(EP6FIFOPFL,      0xE635);
+SFRX(EP8FIFOPFH,      0xE636);
+SFRX(EP8FIFOPFL,      0xE637);
+SFRX(EP2ISOINPKTS,    0xE640);
+SFRX(EP4ISOINPKTS,    0xE641);
+SFRX(EP6ISOINPKTS,    0xE642);
+SFRX(EP8ISOINPKTS,    0xE643);
+SFRX(INPKTEND,        0xE648);
+SFRX(OUTPKTEND,       0xE649);
+
+/* Interrupts */
+SFRX(EP2FIFOIE,       0xE650);
+SFRX(EP2FIFOIRQ,      0xE651);
+SFRX(EP4FIFOIE,       0xE652);
+SFRX(EP4FIFOIRQ,      0xE653);
+SFRX(EP6FIFOIE,       0xE654);
+SFRX(EP6FIFOIRQ,      0xE655);
+SFRX(EP8FIFOIE,       0xE656);
+SFRX(EP8FIFOIRQ,      0xE657);
+SFRX(IBNIE,           0xE658);
+SFRX(IBNIRQ,          0xE659);
+#define EP0IBN        bmbit0
+#define EP1IBN        bmbit1
+#define EP2IBN        bmbit2
+#define EP4IBN        bmbit3
+#define EP6IBN        bmbit4
+#define EP8IBN        bmbit5
+
+SFRX(NAKIE,           0xE65A);
+SFRX(NAKIRQ,          0xE65B);
+#define EP8PING       bmbit7
+#define EP6PING       bmbit6
+#define EP4PING       bmbit5
+#define EP2PING       bmbit4
+#define EP1PING       bmbit3
+#define EP0PING       bmbit2
+#define IBN           bmbit0
+
+SFRX(USBIEN,          0xE65C);
+SFRX(USBIRQ,          0xE65D);
+#define SUDAVI        bmbit0
+#define SOFI          bmbit1
+#define SUTOKI        bmbit2
+#define SUSPI         bmbit3
+#define URESI         bmbit4
+#define HSGRANT       bmbit5
+#define EP0ACK        bmbit6
+
+SFRX(EPIE,            0xE65E);
+SFRX(EPIRQ,           0xE65F);
+SFRX(GPIFIE,          0xE660);
+SFRX(GPIFIRQ,         0xE661);
+SFRX(USBERRIE,        0xE662);
+SFRX(USBERRIRQ,       0xE663);
+SFRX(ERRCNTLIM,       0xE664);
+SFRX(CLRERRCNT,       0xE665);
+SFRX(INT2IVEC,        0xE666);
+#define I2V0          bmbit2
+#define I2V1          bmbit3
+#define I2V2          bmbit4
+#define I2V3          bmbit5
+#define I2V4          bmbit6
+
+SFRX(INT4IVEC,        0xE667);
+SFRX(INTSETUP,        0xE668);
+#define AV4EN         bmbit0
+#define INT4IN        bmbit1
+#define AV2EN         bmbit3
+
+/* Input/Output */
+SFRX(PORTACFG,        0xE670);
+#define BMINT0        bmbit0
+#define BMINT1        bmbit1
+#define BMFLAGD       bmbit7
+
+SFRX(PORTCCFG,        0xE671);
+#define BMGPIFA0      bmbit0
+#define BMGPIFA1      bmbit1
+#define BMGPIFA2      bmbit2
+#define BMGPIFA3      bmbit3
+#define BMGPIFA4      bmbit4
+#define BMGPIFA5      bmbit5
+#define BMGPIFA6      bmbit6
+#define BMGPIFA7      bmbit7
+
+SFRX(PORTECFG,        0xE672);
+#define BMT0OUT       bmbit0
+#define BMT1OUT       bmbit1
+#define BMT2OUT       bmbit2
+#define BMRXD0OUT     bmbit3
+#define BMRXD1OUT     bmbit4
+#define BMINT6        bmbit5
+#define BMT2EX        bmbit6
+#define BMGPIFA8      bmbit7
+
+SFRX(I2CS,            0xE678);
+#define BMDONE        bmbit0
+#define BMACK         bmbit1
+#define BMBERR        bmbit2
+#define BMID         (bmbit4 | bmbit3)
+#define BMLASTRD      bmbit5
+#define BMSTOP        bmbit6
+#define BMSTART       bmbit7
+
+SFRX(I2DAT,           0xE679);
+SFRX(I2CTL,           0xE67A);
+#define BMSTOPIE      bmbit1
+#define BM400KHZ      bmbit0
+
+SFRX(XAUTODAT1,       0xE67B);
+SFRX(XAUTODAT2,       0xE67C);
+#define EXTAUTODAT1   XAUTODAT1
+#define EXTAUTODAT2   XAUTODAT2
+
+/* USB Control */
+SFRX(USBCS,           0xE680);
+#define SIGRSUME      bmbit0
+#define RENUM         bmbit1
+#define NOSYNSOF      bmbit2
+#define DISCON        bmbit3
+#define HSM           bmbit7
+
+SFRX(SUSPEND,         0xE681);
+SFRX(WAKEUPCS,        0xE682);
+#define BMWU2         bmbit7
+#define BMWU          bmbit6
+#define BMWU2POL      bmbit5
+#define BMWUPOL       bmbit4
+#define BMDPEN        bmbit2
+#define BMWU2EN       bmbit1
+#define BMWUEN        bmbit0
+
+SFRX(TOGCTL,           0xE683);
+#define BMTOGCTLEPMASK bmbit3 | bmbit2 | bmbit1 | bmbit0
+#define BMRESETTOGGLE  bmbit5
+#define BMSETTOGGLE    bmbit6
+#define BMQUERYTOGGLE  bmbit7
+
+SFRX(USBFRAMEH,        0xE684);
+SFRX(USBFRAMEL,        0xE685);
+SFRX(MICROFRAME,       0xE686);
+SFRX(FNADDR,           0xE687);
+
+/* Endpoints */
+SFRX(EP0BCH,           0xE68A);
+SFRX(EP0BCL,           0xE68B);
+SFRX(EP1OUTBC,         0xE68D);
+SFRX(EP1INBC,          0xE68F);
+SFRX(EP2BCH,           0xE690);
+SFRX(EP2BCL,           0xE691);
+SFRX(EP4BCH,           0xE694);
+SFRX(EP4BCL,           0xE695);
+SFRX(EP6BCH,           0xE698);
+SFRX(EP6BCL,           0xE699);
+SFRX(EP8BCH,           0xE69C);
+SFRX(EP8BCL,           0xE69D);
+SFRX(EP0CS,            0xE6A0);
+#define HSNAK          bmbit7
+
+SFRX(EP1INCS,          0xE6A2);
+SFRX(EP1OUTCS,         0xE6A1);
+#define EPSTALL        bmbit0
+#define EPBSY          bmbit1
+
+SFRX(EP2CS,            0xE6A3);
+SFRX(EP4CS,            0xE6A4);
+SFRX(EP6CS,            0xE6A5);
+SFRX(EP8CS,            0xE6A6);
+#define BMEPEMPTY      bmbit2
+#define BMEPFULL       bmbit3
+#define BMNPAK        (bmbit6 | bmbit5 | bmbit4)
+
+SFRX(EP2FIFOFLGS,      0xE6A7);
+SFRX(EP4FIFOFLGS,      0xE6A8);
+SFRX(EP6FIFOFLGS,      0xE6A9);
+SFRX(EP8FIFOFLGS,      0xE6AA);
+SFRX(EP2FIFOBCH,       0xE6AB);
+SFRX(EP2FIFOBCL,       0xE6AC);
+SFRX(EP4FIFOBCH,       0xE6AD);
+SFRX(EP4FIFOBCL,       0xE6AE);
+SFRX(EP6FIFOBCH,       0xE6AF);
+SFRX(EP6FIFOBCL,       0xE6B0);
+SFRX(EP8FIFOBCH,       0xE6B1);
+SFRX(EP8FIFOBCL,       0xE6B2);
+SFRX(SUDPTRH,          0xE6B3);
+SFRX(SUDPTRL,          0xE6B4);
+
+SFRX(SUDPTRCTL,        0xE6B5);
+#define BMSDPAUTO      bmbit0
+
+SFRX(SETUPDAT[8],      0xE6B8);
+
+/* GPIF */
+SFRX(GPIFWFSELECT,     0xE6C0);
+SFRX(GPIFIDLECS,       0xE6C1);
+SFRX(GPIFIDLECTL,      0xE6C2);
+SFRX(GPIFCTLCFG,       0xE6C3);
+SFRX(GPIFADRH,         0xE6C4);
+SFRX(GPIFADRL,         0xE6C5);
+SFRX(GPIFTCB3,         0xE6CE);
+SFRX(GPIFTCB2,         0xE6CF);
+SFRX(GPIFTCB1,         0xE6D0);
+SFRX(GPIFTCB0,         0xE6D1);
+
+#define EP2GPIFTCH     GPIFTCB1   /* these are here for backwards compatibility */
+#define EP2GPIFTCL     GPIFTCB0
+#define EP4GPIFTCH     GPIFTCB1   /* these are here for backwards compatibility */
+#define EP4GPIFTCL     GPIFTCB0
+#define EP6GPIFTCH     GPIFTCB1   /* these are here for backwards compatibility */
+#define EP6GPIFTCL     GPIFTCB0
+#define EP8GPIFTCH     GPIFTCB1   /* these are here for backwards compatibility */
+#define EP8GPIFTCL     GPIFTCB0
+
+SFRX(EP2GPIFFLGSEL,    0xE6D2);
+SFRX(EP2GPIFPFSTOP,    0xE6D3);
+SFRX(EP2GPIFTRIG,      0xE6D4);
+SFRX(EP4GPIFFLGSEL,    0xE6DA);
+SFRX(EP4GPIFPFSTOP,    0xE6DB);
+SFRX(EP4GPIFTRIG,      0xE6DC);
+SFRX(EP6GPIFFLGSEL,    0xE6E2);
+SFRX(EP6GPIFPFSTOP,    0xE6E3);
+SFRX(EP6GPIFTRIG,      0xE6E4);
+SFRX(EP8GPIFFLGSEL,    0xE6EA);
+SFRX(EP8GPIFPFSTOP,    0xE6EB);
+SFRX(EP8GPIFTRIG,      0xE6EC);
+SFRX(XGPIFSGLDATH,     0xE6F0);
+SFRX(XGPIFSGLDATLX,    0xE6F1);
+SFRX(XGPIFSGLDATLNOX,  0xE6F2);
+SFRX(GPIFREADYCFG,     0xE6F3);
+SFRX(GPIFREADYSTAT,    0xE6F4);
+SFRX(GPIFABORT,        0xE6F5);
+
+// UDMA
+SFRX(FLOWSTATE,        0xE6C6);
+SFRX(FLOWLOGIC,        0xE6C7);
+SFRX(FLOWEQ0CTL,       0xE6C8);
+SFRX(FLOWEQ1CTL,       0xE6C9);
+SFRX(FLOWHOLDOFF,      0xE6CA);
+SFRX(FLOWSTB,          0xE6CB);
+SFRX(FLOWSTBEDGE,      0xE6CC);
+SFRX(FLOWSTBHPERIOD,   0xE6CD);
+SFRX(GPIFHOLDAMOUNT,   0xE60C);
+SFRX(UDMACRCH,         0xE67D);
+SFRX(UDMACRCL,         0xE67E);
+SFRX(UDMACRCQUAL,      0xE67F);
+
+/* Debug/Test
+ * The following registers are for Cypress's internal testing purposes only.
+ * These registers are not documented in the datasheet or the Technical Reference
+ * Manual as they were not designed for end user application usage
+ */
+SFRX(DBUG,             0xE6F8);
+SFRX(TESTCFG,          0xE6F9);
+SFRX(USBTEST,          0xE6FA);
+SFRX(CT1,              0xE6FB);
+SFRX(CT2,              0xE6FC);
+SFRX(CT3,              0xE6FD);
+SFRX(CT4,              0xE6FE);
+
+/* Endpoint Buffers */
+SFRX(EP0BUF[64],        0xE740);
+SFRX(EP1INBUF[64],      0xE7C0);
+SFRX(EP1OUTBUF[64],     0xE780);
+SFRX(EP2FIFOBUF[512],   0xF000);
+SFRX(EP4FIFOBUF[512],   0xF400);
+SFRX(EP6FIFOBUF[512],   0xF800);
+SFRX(EP8FIFOBUF[512],   0xFC00);
+
+/* Error Correction Code (ECC) Registers (FX2LP/FX1 only) */
+SFRX(ECCCFG,            0xE628);
+SFRX(ECCRESET,          0xE629);
+SFRX(ECC1B0,            0xE62A);
+SFRX(ECC1B1,            0xE62B);
+SFRX(ECC1B2,            0xE62C);
+SFRX(ECC2B0,            0xE62D);
+SFRX(ECC2B1,            0xE62E);
+SFRX(ECC2B2,            0xE62F);
+
+/* Feature Registers  (FX2LP/FX1 only) */
+SFRX(GPCR2,         0xE50D);
+#define BMFULLSPEEDONLY    bmbit4
+
+#endif
diff --git a/contrib/firmware/angie/c/include/serial.h b/contrib/firmware/angie/c/include/serial.h
new file mode 100644
index 000000000..548c00560
--- /dev/null
+++ b/contrib/firmware/angie/c/include/serial.h
@@ -0,0 +1,47 @@
+/* SPDX-License-Identifier: LGPL-2.1-or-later */
+
+/**
+ * This code was taken from the fx2lib project from this link:
+ * https://github.com/djmuhlestein/fx2lib
+ *
+ * Copyright (C) 2009 Ubixum, Inc.
+ **/
+
+/** \file serial.h
+ * defines functions to print to a serial console with SIO0
+ **/
+
+#include "fx2macros.h"
+#include <stdint.h>
+/**
+ * This function inits sio0 to use T2CON (timer 2)
+ * See TRM 14.3.4.1 (Table 14-16)
+ * Certain baud rates have too high an error rate to work.  All baud rates are .16%
+ * except:
+ *
+ *          12MHZ      24MHZ
+ *   \li 57600  -6.99%
+ *   \li 38400  -2.34%     -2.34%
+ *   \li 19200  -2.34%
+ *
+ *   Possible Baud rates:
+ *    \li 2400
+ *    \li 4800
+ *    \li 9600
+ *    \li 19200
+ *    \li 28800
+ *    \li 38400
+ *    \li 57600
+ *
+ *    Any of these rates should work except 57600 at 12mhz.  -2.34% is pushing
+ *    most hardware specs for working.  All rates at 48mhz work at .16%
+ **/
+
+void sio0_init(uint32_t baud_rate) __critical; /* baud_rate max should be 57600 since int=2 bytes */
+
+/**
+ * putchar('\\n') or putchar('\\r') both transmit \\r\\n
+ * Just use one or the other. (This makes terminal echo easy)
+ **/
+int putchar(char c);
+int getchar(void);
diff --git a/contrib/firmware/angie/c/include/usb.h b/contrib/firmware/angie/c/include/usb.h
new file mode 100644
index 000000000..0450d1d1c
--- /dev/null
+++ b/contrib/firmware/angie/c/include/usb.h
@@ -0,0 +1,273 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+/****************************************************************************
+	File : usb.h															*
+	Contents : usb communication handling header file for NanoXplore		*
+	USB-JTAG ANGIE adapter hardware.										*
+	Based on openULINK project code by: Martin Schmoelzer.					*
+	Copyright 2023, Ahmed Errached BOUDJELIDA, NanoXplore SAS.				*
+	<abo...@na...>											*
+	<ahm...@gm...>											*
+*****************************************************************************/
+
+#ifndef __USB_H
+#define __USB_H
+
+#include "reg_ezusb.h"
+#include <stdint.h>
+#include <stdbool.h>
+
+/* High and Low byte of a word (uint16_t) */
+#define HI8(word)   (uint8_t)(((uint16_t)(word) >> 8) & 0xff)
+#define LO8(word)   (uint8_t)((uint16_t)(word) & 0xff)
+
+/* Convenience functions */
+#define STALL_EP0()   (EP0CS |= EPSTALL)
+#define CLEAR_IRQ()   (USBINT = 0)
+
+/*********** USB descriptors. See section 9.5 of the USB 1.1 spec **********/
+
+/* USB Descriptor Types. See USB 1.1 spec, page 187, table 9-5 */
+#define DESCRIPTOR_TYPE_DEVICE         0x01
+#define DESCRIPTOR_TYPE_CONFIGURATION  0x02
+#define DESCRIPTOR_TYPE_STRING         0x03
+#define DESCRIPTOR_TYPE_INTERFACE      0x04
+#define DESCRIPTOR_TYPE_ENDPOINT       0x05
+
+#define STR_DESCR(len, ...) { (len) * 2 + 2, DESCRIPTOR_TYPE_STRING, { __VA_ARGS__ } }
+
+/** USB Device Descriptor. See USB 1.1 spec, pp. 196 - 198 */
+struct usb_device_descriptor {
+	uint8_t blength;		/**< Size of this descriptor in bytes. */
+	uint8_t bdescriptortype;	/**< DEVICE Descriptor Type. */
+	uint16_t bcdusb;		/**< USB specification release number (BCD). */
+	uint8_t bdeviceclass;		/**< Class code. */
+	uint8_t bdevicesubclass;	/**< Subclass code. */
+	uint8_t bdeviceprotocol;	/**< Protocol code. */
+	uint8_t bmaxpacketsize0;	/**< Maximum packet size for EP0 (8, 16, 32, 64). */
+	uint16_t idvendor;		/**< USB Vendor ID. */
+	uint16_t idproduct;		/**< USB Product ID. */
+	uint16_t bcddevice;		/**< Device Release Number (BCD). */
+	uint8_t imanufacturer;		/**< Index of manufacturer string descriptor. */
+	uint8_t iproduct;		/**< Index of product string descriptor. */
+	uint8_t iserialnumber;		/**< Index of string descriptor containing serial #. */
+	uint8_t bnumconfigurations;	/**< Number of possible configurations. */
+};
+
+/** USB Configuration Descriptor. See USB 1.1 spec, pp. 199 - 200 */
+struct usb_config_descriptor {
+	uint8_t blength;		/**< Size of this descriptor in bytes. */
+	uint8_t bdescriptortype;	/**< CONFIGURATION descriptor type. */
+	uint16_t wtotallength;		/**< Combined total length of all descriptors. */
+	uint8_t bnuminterfaces;		/**< Number of interfaces in this configuration. */
+	uint8_t bconfigurationvalue;	/**< Value used to select this configuration. */
+	uint8_t iconfiguration;		/**< Index of configuration string descriptor. */
+	uint8_t bmattributes;		/**< Configuration characteristics. */
+	uint8_t maxpower;		/**< Maximum power consumption in 2 mA units. */
+};
+
+/** USB Interface Descriptor. See USB 1.1 spec, pp. 201 - 203 */
+struct usb_interface_descriptor {
+	uint8_t blength;		/**< Size of this descriptor in bytes. */
+	uint8_t bdescriptortype;	/**< INTERFACE descriptor type. */
+	uint8_t binterfacenumber;	/**< Interface number. */
+	uint8_t balternatesetting;	/**< Value used to select alternate setting. */
+	uint8_t bnumendpoints;		/**< Number of endpoints used by this interface. */
+	uint8_t binterfaceclass;	/**< Class code. */
+	uint8_t binterfacesubclass;	/**< Subclass code. */
+	uint8_t binterfaceprotocol;	/**< Protocol code. */
+	uint8_t iinterface;		/**< Index of interface string descriptor. */
+};
+
+/** USB Endpoint Descriptor. See USB 1.1 spec, pp. 203 - 204 */
+struct usb_endpoint_descriptor {
+	uint8_t blength;		/**< Size of this descriptor in bytes. */
+	uint8_t bdescriptortype;	/**< ENDPOINT descriptor type. */
+	uint8_t bendpointaddress;	/**< Endpoint Address: IN/OUT + EP number. */
+	uint8_t bmattributes;		/**< Endpoint Attributes: BULK/INTR/ISO/CTRL. */
+	uint16_t wmaxpacketsize;	/**< Maximum packet size for this endpoint. */
+	uint8_t binterval;		/**< Polling interval (in ms) for this endpoint. */
+};
+
+/** USB Language Descriptor. See USB 1.1 spec, pp. 204 - 205 */
+struct usb_language_descriptor {
+	uint8_t blength;		/**< Size of this descriptor in bytes. */
+	uint8_t bdescriptortype;	/**< STRING descriptor type. */
+	uint16_t wlangid[];		/**< LANGID codes. */
+};
+
+/** USB String Descriptor. See USB 1.1 spec, pp. 204 - 205 */
+struct usb_string_descriptor {
+	uint8_t blength;		/**< Size of this descriptor in bytes. */
+	uint8_t bdescriptortype;	/**< STRING descriptor type. */
+	uint16_t bstring[];		/**< UNICODE encoded string. */
+};
+
+/********************** USB Control Endpoint 0 related *********************/
+
+/** USB Control Setup Data. See USB 1.1 spec, pp. 183 - 185 */
+struct setup_data {
+	uint8_t bmrequesttype;		/**< Characteristics of a request. */
+	uint8_t brequest;		/**< Specific request. */
+	uint16_t wvalue;		/**< Field that varies according to request. */
+	uint16_t windex;		/**< Field that varies according to request. */
+	uint16_t wlength;		/**< Number of bytes to transfer in data stage. */
+};
+
+/* External declarations for variables that need to be accessed outside of
+ * the USB module */
+extern volatile bool ep1_out;
+extern volatile bool ep1_in;
+
+extern volatile __xdata __at 0xE6B8 struct setup_data setup_data;
+
+/*
+ * USB Request Types (bmRequestType): See USB 1.1 spec, page 183, table 9-2
+ *
+ * Bit 7: Data transfer direction
+ *    0 = Host-to-device
+ *    1 = Device-to-host
+ * Bit 6...5: Type
+ *    0 = Standard
+ *    1 = Class
+ *    2 = Vendor
+ *    3 = Reserved
+ * Bit 4...0: Recipient
+ *    0 = Device
+ *    1 = Interface
+ *    2 = Endpoint
+ *    3 = Other
+ *    4...31 = Reserved
+ */
+
+#define USB_DIR_OUT             0x00
+#define USB_DIR_IN              0x80
+
+#define USB_REQ_TYPE_STANDARD   (0x00 << 5)
+#define USB_REQ_TYPE_CLASS      (0x01 << 5)
+#define USB_REQ_TYPE_VENDOR     (0x02 << 5)
+#define USB_REQ_TYPE_RESERVED   (0x03 << 5)
+
+#define USB_RECIP_DEVICE        0x00
+#define USB_RECIP_INTERFACE     0x01
+#define USB_RECIP_ENDPOINT      0x02
+#define USB_RECIP_OTHER         0x03
+
+/* Clear Interface Request */
+#define CF_DEVICE    (USB_DIR_OUT | USB_REQ_TYPE_STANDARD | USB_RECIP_DEVICE)
+#define CF_INTERFACE (USB_DIR_OUT | USB_REQ_TYPE_STANDARD | USB_RECIP_INTERFACE)
+#define CF_ENDPOINT  (USB_DIR_OUT | USB_REQ_TYPE_STANDARD | USB_RECIP_ENDPOINT)
+
+/* Get Configuration Request */
+#define GC_DEVICE    (USB_DIR_IN | USB_REQ_TYPE_STANDARD | USB_RECIP_DEVICE)
+
+/* Get Descriptor Request */
+#define GD_DEVICE    (USB_DIR_IN | USB_REQ_TYPE_STANDARD | USB_RECIP_DEVICE)
+
+/* Get Interface Request */
+#define GI_INTERFACE (USB_DIR_IN | USB_REQ_TYPE_STANDARD | USB_RECIP_INTERFACE)
+
+/* Get Status Request: See USB 1.1 spec, page 190 */
+#define GS_DEVICE    (USB_DIR_IN | USB_REQ_TYPE_STANDARD | USB_RECIP_DEVICE)
+#define GS_INTERFACE (USB_DIR_IN | USB_REQ_TYPE_STANDARD | USB_RECIP_INTERFACE)
+#define GS_ENDPOINT  (USB_DIR_IN | USB_REQ_TYPE_STANDARD | USB_RECIP_ENDPOINT)
+
+/* Set Address Request is handled by EZ-USB core */
+
+/* Set Configuration Request */
+#define SC_DEVICE    (USB_DIR_OUT | USB_REQ_TYPE_STANDARD | USB_RECIP_DEVICE)
+
+/* Set Descriptor Request */
+#define SD_DEVICE    (USB_DIR_OUT | USB_REQ_TYPE_STANDARD | USB_RECIP_DEVICE)
+
+/* Set Feature Request */
+#define SF_DEVICE    (USB_DIR_OUT | USB_REQ_TYPE_STANDARD | USB_RECIP_DEVICE)
+#define SF_INTERFACE (USB_DIR_OUT | USB_REQ_TYPE_STANDARD | USB_RECIP_INTERFACE)
+#define SF_ENDPOINT  (USB_DIR_OUT | USB_REQ_TYPE_STANDARD | USB_RECIP_ENDPOINT)
+
+/* Set Interface Request */
+#define SI_INTERFACE (USB_DIR_OUT | USB_REQ_TYPE_STANDARD | USB_RECIP_INTERFACE)
+
+/* Synch Frame Request */
+#define SY_ENDPOINT  (USB_DIR_IN | USB_REQ_TYPE_STANDARD | USB_RECIP_ENDPOINT)
+
+/* USB Requests (bRequest): See USB 1.1 spec, table 9-4 on page 187 */
+#define GET_STATUS               0
+#define CLEAR_FEATURE            1
+/* Value '2' is reserved for future use */
+#define SET_FEATURE              3
+/* Value '4' is reserved for future use */
+#define SET_ADDRESS              5
+#define GET_DESCRIPTOR           6
+#define SET_DESCRIPTOR           7
+#define GET_CONFIGURATION        8
+#define SET_CONFIGURATION        9
+#define GET_INTERFACE           10
+#define SET_INTERFACE           11
+#define SYNCH_FRAME             12
+
+/* Standard Feature Selectors: See USB 1.1 spec, table 9-6 on page 188 */
+#define DEVICE_REMOTE_WAKEUP     1
+#define ENDPOINT_HALT            0
+
+/************************** EZ-USB specific stuff **************************/
+/** USB Interrupts. See AN2131-TRM, page 9-4 for details */
+enum usb_isr {
+	SUDAV_ISR = 13,
+	SOF_ISR,
+	SUTOK_ISR,
+	SUSPEND_ISR,
+	USBRESET_ISR,
+	HIGHSPEED_ISR,
+	EP0ACK_ISR,
+	STUB_ISR,
+	EP0IN_ISR,
+	EP0OUT_ISR,
+	EP1IN_ISR,
+	EP1OUT_ISR,
+	EP2_ISR,
+	EP4_ISR,
+	EP6_ISR,
+	EP8_ISR,
+	IBN_ISR,
+	EP0PINGNAK_ISR,
+	EP1PINGNAK_ISR,
+	EP2PINGNAK_ISR,
+	EP4PINGNAK_ISR,
+	EP6PINGNAK_ISR,
+	EP8PINGNAK_ISR,
+	ERRORLIMIT_ISR,
+	EP2PIDERROR_ISR,
+	EP4PIDERROR_ISR,
+	EP6PIDERROR_ISR,
+	EP8PIDERROR_ISR,
+	EP2PFLAG_ISR,
+	EP4PFLAG_ISR,
+	EP6PFLAG_ISR,
+	EP8PFLAG_ISR,
+	EP2EFLAG_ISR,
+	EP4EFLAG_ISR,
+	EP6EFLAG_ISR,
+	EP8EFLAG_ISR,
+	EP2FFLAG_ISR,
+	EP4FFLAG_ISR,
+	EP6FFLAG_ISR,
+	EP8FFLAG_ISR,
+	GPIFCOMPLETE_ISR,
+	GPIFWAVEFORM_ISR
+};
+
+/*************************** Function Prototypes ***************************/
+__xdata uint8_t *usb_get_endpoint_cs_reg(uint8_t ep);
+void usb_reset_data_toggle(uint8_t ep);
+bool usb_handle_get_status(void);
+bool usb_handle_clear_feature(void);
+bool usb_handle_set_feature(void);
+bool usb_handle_get_descriptor(void);
+void usb_handle_set_interface(void);
+void usb_handle_setup_data(void);
+
+void ep_init(void);
+void interrupt_init(void);
+void io_init(void);
+
+#endif
diff --git a/contrib/firmware/angie/c/src/USBJmpTb.a51 b/contrib/firmware/angie/c/src/USBJmpTb.a51
new file mode 100644
index 000000000..13b5f7218
--- /dev/null
+++ b/contrib/firmware/angie/c/src/USBJmpTb.a51
@@ -0,0 +1,125 @@
+; SPDX-License-Identifier: GPL-2.0-or-later
+;****************************************************************************
+;	File : USBJmpTb.a51														*
+;	Contents : Interruptions vector configuration.                    		*
+;	Based on openULINK project code by: Martin Schmoelzer.					*
+;	Copyright 2023, Ahmed Errached BOUDJELIDA, NanoXplore SAS.				*
+;	<abo...@na...>											*
+;	<ahm...@gm...>											*
+;****************************************************************************
+.module JUMPTABLE
+
+.globl USB_AutoVector
+.globl USB_Jump_Table
+
+.globl _sudav_isr, _sof_isr, _sutok_isr, _suspend_isr, _usbreset_isr, _highspeed_isr, _ep0ack_isr, _stub_isr, _ep0in_isr, _ep0out_isr, _ep1in_isr, _ep1out_isr, _ep2_isr, _ep4_isr, _ep6_isr, _ep8_isr, _ibn_isr
+.globl _ep0pingnak_isr, _ep1pingnak_isr, _ep2pingnak_isr, _ep4pingnak_isr, _ep6pingnak_isr, _ep8pingnak_isr, _errorlimit_isr, _stub_isr, _stub_isr, _stub_isr, _ep2piderror_isr, _ep4piderror_isr, _ep6piderror_isr, _ep8piderror_isr
+.globl _ep2pflag_isr, _ep4pflag_isr, _ep6pflag_isr, _ep8pflag_isr, _ep2eflag_isr, _ep4eflag_isr, _ep6eflag_isr, _ep8eflag_isr, _ep2fflag_isr, _ep4fflag_isr, _ep6fflag_isr, _ep8fflag_isr, _gpifcomplete_isr, _gpifwaveform_isr
+
+;--------------------------------------------------------------------------;
+; Interrupt Vectors                                                        ;
+;--------------------------------------------------------------------------;
+.area   USB_JV (ABS,OVR)   ; Absolute, Overlay
+.org    0x43               ; USB interrupt (INT2) jumps here
+USB_AutoVector = #. + 2
+    ljmp  USB_Jump_Table    ; Autovector will replace byte 45
+
+;--------------------------------------------------------------------------;
+; USB Jump Table                                                           ;
+;--------------------------------------------------------------------------;
+.area  USB_JT (ABS)        ; Absolute placement
+.org   0x0200              ; Place jump table at 0x0200
+
+USB_Jump_Table:            ; autovector jump table
+    ljmp  _sudav_isr       ; (00) Setup Data Available
+    .db 0
+    ljmp  _sof_isr         ; (04) Start of Frame
+    .db 0
+    ljmp  _sutok_isr       ; (08) Setup Data Loading
+    .db 0
+    ljmp  _suspend_isr     ; (0C) Global Suspend
+    .db 0
+    ljmp  _usbreset_isr    ; (10) USB Reset
+    .db 0
+    ljmp  _highspeed_isr   ; (14) Entered High Speed
+    .db 0
+    ljmp  _ep0ack_isr      ; (18) EP0ACK
+    .db 0
+    ljmp  _stub_isr        ; (1C) Reserved
+    .db 0
+    ljmp  _ep0in_isr       ; (20) EP0 In
+    .db 0
+    ljmp  _ep0out_isr      ; (24) EP0 Out
+    .db 0
+    ljmp  _ep1in_isr       ; (28) EP1 In
+    .db 0
+    ljmp  _ep1out_isr      ; (2C) EP1 Out
+    .db 0
+    ljmp  _ep2_isr         ; (30) EP2 In/Out
+    .db 0
+    ljmp  _ep4_isr         ; (34) EP4 In/Out
+    .db 0
+    ljmp  _ep6_isr         ; (38) EP6 In/Out
+    .db 0
+    ljmp  _ep8_isr         ; (3C) EP8 In/Out
+    .db 0
+    ljmp  _ibn_isr         ; (40) IBN
+    .db 0
+    ljmp  _stub_isr        ; (44) Reserved
+    .db 0
+    ljmp  _ep0pingnak_isr  ; (48) EP0 PING NAK
+    .db 0
+    ljmp  _ep1pingnak_isr  ; (4C) EP1 PING NAK
+    .db 0
+    ljmp  _ep2pingnak_isr  ; (50) EP2 PING NAK
+    .db 0
+    ljmp  _ep4pingnak_isr  ; (54) EP4 PING NAK
+    .db 0
+    ljmp  _ep6pingnak_isr  ; (58) EP6 PING NAK
+    .db 0
+    ljmp  _ep8pingnak_isr  ; (5C) EP8 PING NAK
+    .db 0
+    ljmp  _errorlimit_isr  ; (60) Error Limit
+    .db 0
+    ljmp  _stub_isr        ; (64) Reserved
+    .db 0
+    ljmp  _stub_isr        ; (68) Reserved
+    .db 0
+    ljmp  _stub_isr        ; (6C) Reserved
+    .db 0
+    ljmp  _ep2piderror_isr ; (70) EP2 ISO Pid Sequence Error
...
 
[truncated message content]

[OpenOCD-commit] Main OpenOCD repository branch, master, updated. v0.12.0-281-g3b78b5c1d

[openocd-gerrit <ope...@us...>]

This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".

The branch, master has been updated
       via  3b78b5c1db68841fdc18ee48b6011f4affff2bfd (commit)
      from  51be311f73933d8b51938371a989f1130dec3cfc (commit)

Those revisions listed above that are new to this repository have
not appeared on any other notification email; so we list those
revisions in full, below.

- Log -----------------------------------------------------------------
commit 3b78b5c1db68841fdc18ee48b6011f4affff2bfd
Author: Antonio Borneo <bor...@gm...>
Date:   Sun Jul 2 23:48:42 2023 +0200

    libusb_helper: split error and returned value
    
    The USB control transfer can be executed without any data.
    The libusb API libusb_control_transfer() can thus be called with
    zero 'size', thus returning zero byte transferred when succeed.
    
    The OpenOCD API jtag_libusb_control_transfer() returns zero either
    in case of transfer error and in case of libusb_control_transfer()
    returning zero, making impossible discriminating the two cases.
    
    Extend jtag_libusb_control_transfer() with separate return value
    for error code and explicit parameter's pointer for transferred
    bytes.
    Make the transferred pointer optional, as many callers do not
    properly handle the returned value.
    Use 'int' type pointer for transferred, instead of the 'uint16_t'
    that would have matched the type of 'size'. This can simplify the
    caller's code by using a single 'int transferred' variable shared
    with other jtag_libusb_bulk_read|write, while keeping possible the
    comparison int vs uint16_t without cast.
    
    This change is inspired from commit d612baacaa3f
    ("jtag_libusb_bulk_read|write: return error code instead of size")
    
    Change-Id: I14d9bff3e845675be03465c307a136e69eebc317
    Signed-off-by: Antonio Borneo <bor...@gm...>
    Reviewed-on: https://review.openocd.org/c/openocd/+/7756
    Tested-by: jenkins
    Reviewed-by: ahmed BOUDJELIDA <abo...@na...>

diff --git a/src/jtag/drivers/esp_usb_jtag.c b/src/jtag/drivers/esp_usb_jtag.c
index dd96f4b39..2ed0f58fd 100644
--- a/src/jtag/drivers/esp_usb_jtag.c
+++ b/src/jtag/drivers/esp_usb_jtag.c
@@ -506,11 +506,13 @@ static int esp_usb_jtag_init(void)
 	 * 1- With the minimum size required to get to know the total length of that struct,
 	 * 2- Then exactly the length of that struct. */
 	uint8_t jtag_caps_desc[JTAG_PROTO_CAPS_DATA_LEN];
-	int jtag_caps_read_len = jtag_libusb_control_transfer(priv->usb_device,
+	int jtag_caps_read_len;
+	r = jtag_libusb_control_transfer(priv->usb_device,
 		LIBUSB_ENDPOINT_IN | LIBUSB_REQUEST_TYPE_STANDARD | LIBUSB_RECIPIENT_DEVICE,
 		LIBUSB_REQUEST_GET_DESCRIPTOR, esp_usb_jtag_caps, 0,
-		(char *)jtag_caps_desc, JTAG_PROTO_CAPS_DATA_LEN, LIBUSB_TIMEOUT_MS);
-	if (jtag_caps_read_len <= 0) {
+		(char *)jtag_caps_desc, JTAG_PROTO_CAPS_DATA_LEN, LIBUSB_TIMEOUT_MS,
+		&jtag_caps_read_len);
+	if (r != ERROR_OK) {
 		LOG_ERROR("esp_usb_jtag: could not retrieve jtag_caps descriptor!");
 		goto out;
 	}
@@ -580,7 +582,8 @@ static int esp_usb_jtag_init(void)
 		0,
 		NULL,
 		0,
-		LIBUSB_TIMEOUT_MS);
+		LIBUSB_TIMEOUT_MS,
+		NULL);
 
 	return ERROR_OK;
 
@@ -637,7 +640,7 @@ static int esp_usb_jtag_speed(int divisor)
 
 	LOG_DEBUG("esp_usb_jtag: setting divisor %d", divisor);
 	jtag_libusb_control_transfer(priv->usb_device,
-		LIBUSB_REQUEST_TYPE_VENDOR, VEND_JTAG_SETDIV, divisor, 0, NULL, 0, LIBUSB_TIMEOUT_MS);
+		LIBUSB_REQUEST_TYPE_VENDOR, VEND_JTAG_SETDIV, divisor, 0, NULL, 0, LIBUSB_TIMEOUT_MS, NULL);
 
 	return ERROR_OK;
 }
@@ -648,8 +651,8 @@ COMMAND_HANDLER(esp_usb_jtag_tdo_cmd)
 	if (!priv->usb_device)
 		return ERROR_FAIL;
 	int r = jtag_libusb_control_transfer(priv->usb_device,
-		LIBUSB_ENDPOINT_IN | LIBUSB_REQUEST_TYPE_VENDOR, VEND_JTAG_GETTDO, 0, 0, &tdo, 1, LIBUSB_TIMEOUT_MS);
-	if (r < 1)
+		LIBUSB_ENDPOINT_IN | LIBUSB_REQUEST_TYPE_VENDOR, VEND_JTAG_GETTDO, 0, 0, &tdo, 1, LIBUSB_TIMEOUT_MS, NULL);
+	if (r != ERROR_OK)
 		return r;
 
 	command_print(CMD, "%d", tdo);
@@ -685,7 +688,7 @@ COMMAND_HANDLER(esp_usb_jtag_setio_cmd)
 		d |= VEND_JTAG_SETIO_SRST;
 
 	jtag_libusb_control_transfer(priv->usb_device,
-		0x40, VEND_JTAG_SETIO, d, 0, NULL, 0, LIBUSB_TIMEOUT_MS);
+		0x40, VEND_JTAG_SETIO, d, 0, NULL, 0, LIBUSB_TIMEOUT_MS, NULL);
 
 	return ERROR_OK;
 }
diff --git a/src/jtag/drivers/ft232r.c b/src/jtag/drivers/ft232r.c
index 1d73af4e5..c2ec78ad8 100644
--- a/src/jtag/drivers/ft232r.c
+++ b/src/jtag/drivers/ft232r.c
@@ -235,7 +235,7 @@ static int ft232r_speed(int divisor)
 
 	if (jtag_libusb_control_transfer(adapter,
 		LIBUSB_REQUEST_TYPE_VENDOR | LIBUSB_RECIPIENT_DEVICE | LIBUSB_ENDPOINT_OUT,
-		SIO_SET_BAUD_RATE, divisor, 0, NULL, 0, 1000) != 0) {
+		SIO_SET_BAUD_RATE, divisor, 0, NULL, 0, 1000, NULL) != ERROR_OK) {
 		LOG_ERROR("cannot set baud rate");
 		return ERROR_JTAG_DEVICE_ERROR;
 	}
@@ -266,7 +266,7 @@ static int ft232r_init(void)
 	/* Reset the device. */
 	if (jtag_libusb_control_transfer(adapter,
 		LIBUSB_REQUEST_TYPE_VENDOR | LIBUSB_RECIPIENT_DEVICE | LIBUSB_ENDPOINT_OUT,
-		SIO_RESET, 0, 0, NULL, 0, 1000) != 0) {
+		SIO_RESET, 0, 0, NULL, 0, 1000, NULL) != ERROR_OK) {
 		LOG_ERROR("unable to reset device");
 		return ERROR_JTAG_INIT_FAILED;
 	}
@@ -275,7 +275,7 @@ static int ft232r_init(void)
 	if (jtag_libusb_control_transfer(adapter,
 		LIBUSB_REQUEST_TYPE_VENDOR | LIBUSB_RECIPIENT_DEVICE | LIBUSB_ENDPOINT_OUT,
 		SIO_SET_BITMODE, (1<<tck_gpio) | (1<<tdi_gpio) | (1<<tms_gpio) | (1<<ntrst_gpio) | (1<<nsysrst_gpio) | 0x400,
-		0, NULL, 0, 1000) != 0) {
+		0, NULL, 0, 1000, NULL) != ERROR_OK) {
 		LOG_ERROR("cannot set sync bitbang mode");
 		return ERROR_JTAG_INIT_FAILED;
 	}
@@ -288,13 +288,13 @@ static int ft232r_init(void)
 	if (jtag_libusb_control_transfer(adapter,
 		LIBUSB_REQUEST_TYPE_VENDOR | LIBUSB_RECIPIENT_DEVICE | LIBUSB_ENDPOINT_OUT,
 		SIO_SET_BAUD_RATE, divisor,
-		0, NULL, 0, 1000) != 0) {
+		0, NULL, 0, 1000, NULL) != ERROR_OK) {
 		LOG_ERROR("cannot set baud rate");
 		return ERROR_JTAG_INIT_FAILED;
 	}
 	if (jtag_libusb_control_transfer(adapter,
 		LIBUSB_REQUEST_TYPE_VENDOR | LIBUSB_RECIPIENT_DEVICE | LIBUSB_ENDPOINT_OUT,
-		SIO_SET_LATENCY_TIMER, latency_timer, 0, NULL, 0, 1000) != 0) {
+		SIO_SET_LATENCY_TIMER, latency_timer, 0, NULL, 0, 1000, NULL) != ERROR_OK) {
 		LOG_ERROR("unable to set latency timer");
 		return ERROR_JTAG_INIT_FAILED;
 	}
@@ -315,7 +315,7 @@ static int ft232r_quit(void)
 		if (jtag_libusb_control_transfer(adapter,
 			LIBUSB_REQUEST_TYPE_VENDOR | LIBUSB_RECIPIENT_DEVICE | LIBUSB_ENDPOINT_OUT,
 			SIO_SET_BITMODE, ft232r_restore_bitmode,
-			0, NULL, 0, 1000) != 0) {
+			0, NULL, 0, 1000, NULL) != ERROR_OK) {
 			LOG_ERROR("cannot set bitmode to restore serial port");
 		}
 	}
diff --git a/src/jtag/drivers/kitprog.c b/src/jtag/drivers/kitprog.c
index 0af1ff7a0..b953218b8 100644
--- a/src/jtag/drivers/kitprog.c
+++ b/src/jtag/drivers/kitprog.c
@@ -414,13 +414,13 @@ static int kitprog_set_protocol(uint8_t protocol)
 	int transferred;
 	char status = PROGRAMMER_NOK_NACK;
 
-	transferred = jtag_libusb_control_transfer(kitprog_handle->usb_handle,
+	int retval = jtag_libusb_control_transfer(kitprog_handle->usb_handle,
 		LIBUSB_ENDPOINT_IN | LIBUSB_REQUEST_TYPE_VENDOR | LIBUSB_RECIPIENT_DEVICE,
 		CONTROL_TYPE_WRITE,
 		(CONTROL_MODE_SET_PROGRAMMER_PROTOCOL << 8) | CONTROL_COMMAND_PROGRAM,
-		protocol, &status, 1, 0);
+		protocol, &status, 1, 0, &transferred);
 
-	if (transferred == 0) {
+	if (retval != ERROR_OK || transferred == 0) {
 		LOG_DEBUG("Zero bytes transferred");
 		return ERROR_FAIL;
 	}
@@ -440,11 +440,11 @@ static int kitprog_get_status(void)
 
 	/* Try a maximum of three times */
 	for (int i = 0; (i < 3) && (transferred == 0); i++) {
-		transferred = jtag_libusb_control_transfer(kitprog_handle->usb_handle,
+		jtag_libusb_control_transfer(kitprog_handle->usb_handle,
 			LIBUSB_ENDPOINT_IN | LIBUSB_REQUEST_TYPE_VENDOR | LIBUSB_RECIPIENT_DEVICE,
 			CONTROL_TYPE_READ,
 			(CONTROL_MODE_POLL_PROGRAMMER_STATUS << 8) | CONTROL_COMMAND_PROGRAM,
-			0, &status, 1, 0);
+			0, &status, 1, 0, &transferred);
 		jtag_sleep(1000);
 	}
 
@@ -466,13 +466,13 @@ static int kitprog_set_unknown(void)
 	int transferred;
 	char status = PROGRAMMER_NOK_NACK;
 
-	transferred = jtag_libusb_control_transfer(kitprog_handle->usb_handle,
+	int retval = jtag_libusb_control_transfer(kitprog_handle->usb_handle,
 		LIBUSB_ENDPOINT_IN | LIBUSB_REQUEST_TYPE_VENDOR | LIBUSB_RECIPIENT_DEVICE,
 		CONTROL_TYPE_WRITE,
 		(0x03 << 8) | 0x04,
-		0, &status, 1, 0);
+		0, &status, 1, 0, &transferred);
 
-	if (transferred == 0) {
+	if (retval != ERROR_OK || transferred == 0) {
 		LOG_DEBUG("Zero bytes transferred");
 		return ERROR_FAIL;
 	}
@@ -491,13 +491,13 @@ static int kitprog_acquire_psoc(uint8_t psoc_type, uint8_t acquire_mode,
 	int transferred;
 	char status = PROGRAMMER_NOK_NACK;
 
-	transferred = jtag_libusb_control_transfer(kitprog_handle->usb_handle,
+	int retval = jtag_libusb_control_transfer(kitprog_handle->usb_handle,
 		LIBUSB_ENDPOINT_IN | LIBUSB_REQUEST_TYPE_VENDOR | LIBUSB_RECIPIENT_DEVICE,
 		CONTROL_TYPE_WRITE,
 		(CONTROL_MODE_ACQUIRE_SWD_TARGET << 8) | CONTROL_COMMAND_PROGRAM,
-		(max_attempts << 8) | (acquire_mode << 4) | psoc_type, &status, 1, 0);
+		(max_attempts << 8) | (acquire_mode << 4) | psoc_type, &status, 1, 0, &transferred);
 
-	if (transferred == 0) {
+	if (retval != ERROR_OK || transferred == 0) {
 		LOG_DEBUG("Zero bytes transferred");
 		return ERROR_FAIL;
 	}
@@ -515,13 +515,13 @@ static int kitprog_reset_target(void)
 	int transferred;
 	char status = PROGRAMMER_NOK_NACK;
 
-	transferred = jtag_libusb_control_transfer(kitprog_handle->usb_handle,
+	int retval = jtag_libusb_control_transfer(kitprog_handle->usb_handle,
 		LIBUSB_ENDPOINT_IN | LIBUSB_REQUEST_TYPE_VENDOR | LIBUSB_RECIPIENT_DEVICE,
 		CONTROL_TYPE_WRITE,
 		(CONTROL_MODE_RESET_TARGET << 8) | CONTROL_COMMAND_PROGRAM,
-		0, &status, 1, 0);
+		0, &status, 1, 0, &transferred);
 
-	if (transferred == 0) {
+	if (retval != ERROR_OK || transferred == 0) {
 		LOG_DEBUG("Zero bytes transferred");
 		return ERROR_FAIL;
 	}
@@ -539,13 +539,13 @@ static int kitprog_swd_sync(void)
 	int transferred;
 	char status = PROGRAMMER_NOK_NACK;
 
-	transferred = jtag_libusb_control_transfer(kitprog_handle->usb_handle,
+	int retval = jtag_libusb_control_transfer(kitprog_handle->usb_handle,
 		LIBUSB_ENDPOINT_IN | LIBUSB_REQUEST_TYPE_VENDOR | LIBUSB_RECIPIENT_DEVICE,
 		CONTROL_TYPE_WRITE,
 		(CONTROL_MODE_SYNCHRONIZE_TRANSFER << 8) | CONTROL_COMMAND_PROGRAM,
-		0, &status, 1, 0);
+		0, &status, 1, 0, &transferred);
 
-	if (transferred == 0) {
+	if (retval != ERROR_OK || transferred == 0) {
 		LOG_DEBUG("Zero bytes transferred");
 		return ERROR_FAIL;
 	}
@@ -563,13 +563,13 @@ static int kitprog_swd_seq(uint8_t seq_type)
 	int transferred;
 	char status = PROGRAMMER_NOK_NACK;
 
-	transferred = jtag_libusb_control_transfer(kitprog_handle->usb_handle,
+	int retval = jtag_libusb_control_transfer(kitprog_handle->usb_handle,
 		LIBUSB_ENDPOINT_IN | LIBUSB_REQUEST_TYPE_VENDOR | LIBUSB_RECIPIENT_DEVICE,
 		CONTROL_TYPE_WRITE,
 		(CONTROL_MODE_SEND_SWD_SEQUENCE << 8) | CONTROL_COMMAND_PROGRAM,
-		seq_type, &status, 1, 0);
+		seq_type, &status, 1, 0, &transferred);
 
-	if (transferred == 0) {
+	if (retval != ERROR_OK || transferred == 0) {
 		LOG_DEBUG("Zero bytes transferred");
 		return ERROR_FAIL;
 	}
diff --git a/src/jtag/drivers/libusb_helper.c b/src/jtag/drivers/libusb_helper.c
index 4b098b482..c77fe78c2 100644
--- a/src/jtag/drivers/libusb_helper.c
+++ b/src/jtag/drivers/libusb_helper.c
@@ -216,17 +216,22 @@ void jtag_libusb_close(struct libusb_device_handle *dev)
 
 int jtag_libusb_control_transfer(struct libusb_device_handle *dev, uint8_t request_type,
 		uint8_t request, uint16_t value, uint16_t index, char *bytes,
-		uint16_t size, unsigned int timeout)
+		uint16_t size, unsigned int timeout, int *transferred)
 {
-	int transferred = 0;
-
-	transferred = libusb_control_transfer(dev, request_type, request, value, index,
+	int retval = libusb_control_transfer(dev, request_type, request, value, index,
 				(unsigned char *)bytes, size, timeout);
 
-	if (transferred < 0)
-		transferred = 0;
+	if (retval < 0) {
+		LOG_ERROR("libusb_control_transfer error: %s", libusb_error_name(retval));
+		if (transferred)
+			*transferred = 0;
+		return jtag_libusb_error(retval);
+	}
 
-	return transferred;
+	if (transferred)
+		*transferred = retval;
+
+	return ERROR_OK;
 }
 
 int jtag_libusb_bulk_write(struct libusb_device_handle *dev, int ep, char *bytes,
diff --git a/src/jtag/drivers/libusb_helper.h b/src/jtag/drivers/libusb_helper.h
index 799e3e6a9..75f133519 100644
--- a/src/jtag/drivers/libusb_helper.h
+++ b/src/jtag/drivers/libusb_helper.h
@@ -38,7 +38,8 @@ int jtag_libusb_open(const uint16_t vids[], const uint16_t pids[],
 void jtag_libusb_close(struct libusb_device_handle *dev);
 int jtag_libusb_control_transfer(struct libusb_device_handle *dev,
 		uint8_t request_type, uint8_t request, uint16_t value,
-		uint16_t index, char *bytes, uint16_t size, unsigned int timeout);
+		uint16_t index, char *bytes, uint16_t size, unsigned int timeout,
+		int *transferred);
 int jtag_libusb_bulk_write(struct libusb_device_handle *dev, int ep,
 		char *bytes, int size, int timeout, int *transferred);
 int jtag_libusb_bulk_read(struct libusb_device_handle *dev, int ep,
diff --git a/src/jtag/drivers/opendous.c b/src/jtag/drivers/opendous.c
index ad980bf23..2e1d64814 100644
--- a/src/jtag/drivers/opendous.c
+++ b/src/jtag/drivers/opendous.c
@@ -735,7 +735,7 @@ int opendous_usb_message(struct opendous_jtag *opendous_jtag, int out_length, in
 /* Write data from out_buffer to USB. */
 int opendous_usb_write(struct opendous_jtag *opendous_jtag, int out_length)
 {
-	int result;
+	int result, transferred;
 
 	if (out_length > OPENDOUS_OUT_BUFFER_SIZE) {
 		LOG_ERROR("opendous_jtag_write illegal out_length=%d (max=%d)", out_length, OPENDOUS_OUT_BUFFER_SIZE);
@@ -748,7 +748,11 @@ int opendous_usb_write(struct opendous_jtag *opendous_jtag, int out_length)
 	if (opendous_probe->CONTROL_TRANSFER) {
 		result = jtag_libusb_control_transfer(opendous_jtag->usb_handle,
 			LIBUSB_REQUEST_TYPE_VENDOR | LIBUSB_RECIPIENT_DEVICE | LIBUSB_ENDPOINT_OUT,
-			FUNC_WRITE_DATA, 0, 0, (char *) usb_out_buffer, out_length, OPENDOUS_USB_TIMEOUT);
+			FUNC_WRITE_DATA, 0, 0, (char *)usb_out_buffer, out_length, OPENDOUS_USB_TIMEOUT,
+			&transferred);
+		/* FIXME: propagate error separately from transferred */
+		if (result == ERROR_OK)
+			result = transferred;
 	} else {
 		jtag_libusb_bulk_write(opendous_jtag->usb_handle, OPENDOUS_WRITE_ENDPOINT,
 			(char *)usb_out_buffer, out_length, OPENDOUS_USB_TIMEOUT, &result);
@@ -768,6 +772,8 @@ int opendous_usb_write(struct opendous_jtag *opendous_jtag, int out_length)
 /* Read data from USB into in_buffer. */
 int opendous_usb_read(struct opendous_jtag *opendous_jtag)
 {
+	int transferred;
+
 #ifdef _DEBUG_USB_COMMS_
 	LOG_DEBUG("USB read begin");
 #endif
@@ -775,7 +781,11 @@ int opendous_usb_read(struct opendous_jtag *opendous_jtag)
 	if (opendous_probe->CONTROL_TRANSFER) {
 		result = jtag_libusb_control_transfer(opendous_jtag->usb_handle,
 			LIBUSB_REQUEST_TYPE_VENDOR | LIBUSB_RECIPIENT_DEVICE | LIBUSB_ENDPOINT_IN,
-			FUNC_READ_DATA, 0, 0, (char *) usb_in_buffer, OPENDOUS_IN_BUFFER_SIZE, OPENDOUS_USB_TIMEOUT);
+			FUNC_READ_DATA, 0, 0, (char *)usb_in_buffer, OPENDOUS_IN_BUFFER_SIZE, OPENDOUS_USB_TIMEOUT,
+			&transferred);
+		/* FIXME: propagate error separately from transferred */
+		if (result == ERROR_OK)
+			result = transferred;
 	} else {
 		jtag_libusb_bulk_read(opendous_jtag->usb_handle, OPENDOUS_READ_ENDPOINT,
 			(char *)usb_in_buffer, OPENDOUS_IN_BUFFER_SIZE, OPENDOUS_USB_TIMEOUT, &result);
diff --git a/src/jtag/drivers/openjtag.c b/src/jtag/drivers/openjtag.c
index 12ea46330..fe3a8ff7f 100644
--- a/src/jtag/drivers/openjtag.c
+++ b/src/jtag/drivers/openjtag.c
@@ -239,10 +239,10 @@ static int openjtag_buf_write_cy7c65215(
 
 	ret = jtag_libusb_control_transfer(usbh, CY7C65215_JTAG_REQUEST,
 									   CY7C65215_JTAG_WRITE, size, 0,
-									   NULL, 0, CY7C65215_USB_TIMEOUT);
-	if (ret < 0) {
-		LOG_ERROR("vendor command failed, error %d", ret);
-		return ERROR_JTAG_DEVICE_ERROR;
+									   NULL, 0, CY7C65215_USB_TIMEOUT, NULL);
+	if (ret != ERROR_OK) {
+		LOG_ERROR("vendor command failed");
+		return ret;
 	}
 
 	if (jtag_libusb_bulk_write(usbh, ep_out, (char *)buf, size,
@@ -306,10 +306,10 @@ static int openjtag_buf_read_cy7c65215(
 
 	ret = jtag_libusb_control_transfer(usbh, CY7C65215_JTAG_REQUEST,
 									   CY7C65215_JTAG_READ, qty, 0,
-									   NULL, 0, CY7C65215_USB_TIMEOUT);
-	if (ret < 0) {
-		LOG_ERROR("vendor command failed, error %d", ret);
-		return ERROR_JTAG_DEVICE_ERROR;
+									   NULL, 0, CY7C65215_USB_TIMEOUT, NULL);
+	if (ret != ERROR_OK) {
+		LOG_ERROR("vendor command failed");
+		return ret;
 	}
 
 	if (jtag_libusb_bulk_read(usbh, ep_in, (char *)buf, qty,
@@ -455,8 +455,8 @@ static int openjtag_init_cy7c65215(void)
 	ret = jtag_libusb_control_transfer(usbh,
 									   CY7C65215_JTAG_REQUEST,
 									   CY7C65215_JTAG_ENABLE,
-									   0, 0, NULL, 0, CY7C65215_USB_TIMEOUT);
-	if (ret < 0) {
+									   0, 0, NULL, 0, CY7C65215_USB_TIMEOUT, NULL);
+	if (ret != ERROR_OK) {
 		LOG_ERROR("could not enable JTAG module");
 		goto err;
 	}
@@ -466,7 +466,7 @@ static int openjtag_init_cy7c65215(void)
 err:
 	if (usbh)
 		jtag_libusb_close(usbh);
-	return ERROR_JTAG_INIT_FAILED;
+	return ret;
 }
 
 static int openjtag_init(void)
@@ -508,8 +508,8 @@ static int openjtag_quit_cy7c65215(void)
 	ret = jtag_libusb_control_transfer(usbh,
 									   CY7C65215_JTAG_REQUEST,
 									   CY7C65215_JTAG_DISABLE,
-									   0, 0, NULL, 0, CY7C65215_USB_TIMEOUT);
-	if (ret < 0)
+									   0, 0, NULL, 0, CY7C65215_USB_TIMEOUT, NULL);
+	if (ret != ERROR_OK)
 		LOG_WARNING("could not disable JTAG module");
 
 	jtag_libusb_close(usbh);
diff --git a/src/jtag/drivers/usb_blaster/ublast2_access_libusb.c b/src/jtag/drivers/usb_blaster/ublast2_access_libusb.c
index 7f9781869..f5e0026a7 100644
--- a/src/jtag/drivers/usb_blaster/ublast2_access_libusb.c
+++ b/src/jtag/drivers/usb_blaster/ublast2_access_libusb.c
@@ -103,7 +103,8 @@ static int ublast2_write_firmware_section(struct libusb_device_handle *libusb_de
 					     0,
 					     (char *)data_ptr,
 					     chunk_size,
-					     100);
+					     100,
+					     NULL);
 
 		bytes_remaining -= chunk_size;
 		addr += chunk_size;
@@ -154,7 +155,8 @@ static int load_usb_blaster_firmware(struct libusb_device_handle *libusb_dev,
 				     0,
 				     &value,
 				     1,
-				     100);
+				     100,
+				     NULL);
 
 	/* Download all sections in the image to ULINK */
 	for (unsigned int i = 0; i < ublast2_firmware_image.num_sections; i++) {
@@ -175,7 +177,8 @@ static int load_usb_blaster_firmware(struct libusb_device_handle *libusb_dev,
 				     0,
 				     &value,
 				     1,
-				     100);
+				     100,
+				     NULL);
 
 error_close_firmware:
 	image_close(&ublast2_firmware_image);
@@ -245,7 +248,8 @@ static int ublast2_libusb_init(struct ublast_lowlevel *low)
 				     0,
 				     buffer,
 				     5,
-				     100);
+				     100,
+				     NULL);
 
 	LOG_INFO("Altera USB-Blaster II found (Firm. rev. = %s)", buffer);
 

-----------------------------------------------------------------------

Summary of changes:
 src/jtag/drivers/esp_usb_jtag.c                    | 19 +++++-----
 src/jtag/drivers/ft232r.c                          | 12 +++----
 src/jtag/drivers/kitprog.c                         | 40 +++++++++++-----------
 src/jtag/drivers/libusb_helper.c                   | 19 ++++++----
 src/jtag/drivers/libusb_helper.h                   |  3 +-
 src/jtag/drivers/opendous.c                        | 16 +++++++--
 src/jtag/drivers/openjtag.c                        | 26 +++++++-------
 .../drivers/usb_blaster/ublast2_access_libusb.c    | 12 ++++---
 8 files changed, 85 insertions(+), 62 deletions(-)


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commit 51be311f73933d8b51938371a989f1130dec3cfc
Author: Thomas Gleixner <tg...@li...>
Date:   Sun Jun 18 12:22:07 2023 +0200

    LICENSES: Add the LGPL-2.1 license
    
    Add the full text of the LGPL 2.1 license to OpenOCD. It was
    copied directly from:
    
      https://spdx.org/licenses/LGPL-2.1.html#licenseText
    
    Add the required tags for reference and tooling.
    
    Checkpatch-ignore: FSF_MAILING_ADDRESS
    Change-Id: I081f2197fb3c60e17cd6e3353d38194c720ee8a3
    Signed-off-by: Thomas Gleixner <tg...@li...>
    Signed-off-by: Antonio Borneo <bor...@gm...>
    Reviewed-on: https://review.openocd.org/c/openocd/+/7743
    Tested-by: jenkins
    Reviewed-by: ahmed BOUDJELIDA <abo...@na...>

diff --git a/LICENSES/preferred/LGPL-2.1 b/LICENSES/preferred/LGPL-2.1
new file mode 100644
index 000000000..8738a8d57
--- /dev/null
+++ b/LICENSES/preferred/LGPL-2.1
@@ -0,0 +1,503 @@
+Valid-License-Identifier: LGPL-2.1-only
+Valid-License-Identifier: LGPL-2.1-or-later
+SPDX-URL: https://spdx.org/licenses/LGPL-2.1.html
+Usage-Guide:
+  To use this license in source code, put one of the following SPDX
+  tag/value pairs into a comment according to the placement
+  guidelines in the licensing rules documentation.
+  For 'GNU Lesser General Public License (LGPL) version 2.1 only' use:
+    SPDX-License-Identifier: LGPL-2.1-only
+  For 'GNU Lesser General Public License (LGPL) version 2.1 or any later
+  version' use:
+    SPDX-License-Identifier: LGPL-2.1-or-later
+License-Text:
+
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+Version 2.1, February 1999
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+
+To apply these terms, attach the following notices to the library. It is
+safest to attach them to the start of each source file to most effectively
+convey the exclusion of warranty; and each file should have at least the
+"copyright" line and a pointer to where the full notice is found.
+
+one line to give the library's name and an idea of what it does.
+Copyright (C) year name of author
+
+This library is free software; you can redistribute it and/or modify it
+under the terms of the GNU Lesser General Public License as published by
+the Free Software Foundation; either version 2.1 of the License, or (at
+your option) any later version.
+
+This library is distributed in the hope that it will be useful, but WITHOUT
+ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE. See the GNU Lesser General Public License
+for more details.
+
+You should have received a copy of the GNU Lesser General Public License
+along with this library; if not, write to the Free Software Foundation,
+Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA Also add
+information on how to contact you by electronic and paper mail.
+
+You should also get your employer (if you work as a programmer) or your
+school, if any, to sign a "copyright disclaimer" for the library, if
+necessary. Here is a sample; alter the names:
+
+Yoyodyne, Inc., hereby disclaims all copyright interest in
+the library `Frob' (a library for tweaking knobs) written
+by James Random Hacker.
+
+signature of Ty Coon, 1 April 1990
+Ty Coon, President of Vice
+That's all there is to it!
diff --git a/Makefile.am b/Makefile.am
index fa92da912..a4f77adc2 100644
--- a/Makefile.am
+++ b/Makefile.am
@@ -67,6 +67,7 @@ EXTRA_DIST += \
 	LICENSES/preferred/GFDL-1.2 \
 	LICENSES/preferred/gfdl-1.2.texi.readme \
 	LICENSES/preferred/GPL-2.0 \
+	LICENSES/preferred/LGPL-2.1 \
 	LICENSES/preferred/MIT \
 	LICENSES/stand-alone/GPL-3.0 \
 	tools/logger.pl \

-----------------------------------------------------------------------

Summary of changes:
 LICENSES/preferred/LGPL-2.1 | 503 ++++++++++++++++++++++++++++++++++++++++++++
 Makefile.am                 |   1 +
 2 files changed, 504 insertions(+)
 create mode 100644 LICENSES/preferred/LGPL-2.1


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- Log -----------------------------------------------------------------
commit 2cd8ebf44d1afd59b524b09561a8bd2f90f0c27a
Author: Parshintsev Anatoly <ana...@sy...>
Date:   Fri Jul 28 20:41:32 2023 +0300

    breakpoints: use 64-bit type for watchpoint mask and value
    
    This patch changes data types of watchpoint value and mask to allow for
    64-bit values match that some architectures (like RISCV) allow.
    
    In addition this patch fixes the behavior of watchpoint command to
    zero-out mask if only data value is provided.
    
    Change-Id: I3c7ec1630f03ea9534ec34c0ebe99e08ea56e7f0
    Signed-off-by: Parshintsev Anatoly <ana...@sy...>
    Reviewed-on: https://review.openocd.org/c/openocd/+/7840
    Reviewed-by: Antonio Borneo <bor...@gm...>
    Reviewed-by: Marek Vrbka <mar...@co...>
    Tested-by: jenkins
    Reviewed-by: Tomas Vanek <va...@fb...>

diff --git a/src/server/gdb_server.c b/src/server/gdb_server.c
index 702dbef49..4a4ea53dc 100644
--- a/src/server/gdb_server.c
+++ b/src/server/gdb_server.c
@@ -1779,7 +1779,7 @@ static int gdb_breakpoint_watchpoint_packet(struct connection *connection,
 		case 4:
 		{
 			if (packet[0] == 'Z') {
-				retval = watchpoint_add(target, address, size, wp_type, 0, 0xffffffffu);
+				retval = watchpoint_add(target, address, size, wp_type, 0, WATCHPOINT_IGNORE_DATA_VALUE_MASK);
 				if (retval == ERROR_NOT_IMPLEMENTED) {
 					/* Send empty reply to report that watchpoints of this type are not supported */
 					gdb_put_packet(connection, "", 0);
diff --git a/src/target/arm7_9_common.c b/src/target/arm7_9_common.c
index bbdbc4981..ad814e054 100644
--- a/src/target/arm7_9_common.c
+++ b/src/target/arm7_9_common.c
@@ -451,6 +451,7 @@ static int arm7_9_set_watchpoint(struct target *target, struct watchpoint *watch
 	struct arm7_9_common *arm7_9 = target_to_arm7_9(target);
 	int rw_mask = 1;
 	uint32_t mask;
+	const uint32_t wp_data_mask = watchpoint->mask;
 
 	mask = watchpoint->length - 1;
 
@@ -469,8 +470,8 @@ static int arm7_9_set_watchpoint(struct target *target, struct watchpoint *watch
 			watchpoint->address);
 		embeddedice_set_reg(&arm7_9->eice_cache->reg_list[EICE_W0_ADDR_MASK], mask);
 		embeddedice_set_reg(&arm7_9->eice_cache->reg_list[EICE_W0_DATA_MASK],
-			watchpoint->mask);
-		if (watchpoint->mask != 0xffffffffu)
+			wp_data_mask);
+		if (wp_data_mask != (uint32_t)WATCHPOINT_IGNORE_DATA_VALUE_MASK)
 			embeddedice_set_reg(&arm7_9->eice_cache->reg_list[EICE_W0_DATA_VALUE],
 				watchpoint->value);
 		embeddedice_set_reg(&arm7_9->eice_cache->reg_list[EICE_W0_CONTROL_MASK],
@@ -488,8 +489,8 @@ static int arm7_9_set_watchpoint(struct target *target, struct watchpoint *watch
 			watchpoint->address);
 		embeddedice_set_reg(&arm7_9->eice_cache->reg_list[EICE_W1_ADDR_MASK], mask);
 		embeddedice_set_reg(&arm7_9->eice_cache->reg_list[EICE_W1_DATA_MASK],
-			watchpoint->mask);
-		if (watchpoint->mask != 0xffffffffu)
+			wp_data_mask);
+		if (wp_data_mask != (uint32_t)WATCHPOINT_IGNORE_DATA_VALUE_MASK)
 			embeddedice_set_reg(&arm7_9->eice_cache->reg_list[EICE_W1_DATA_VALUE],
 				watchpoint->value);
 		embeddedice_set_reg(&arm7_9->eice_cache->reg_list[EICE_W1_CONTROL_MASK],
diff --git a/src/target/arm_dpm.c b/src/target/arm_dpm.c
index fd6fb263f..ab9b50e23 100644
--- a/src/target/arm_dpm.c
+++ b/src/target/arm_dpm.c
@@ -918,7 +918,7 @@ static int dpm_watchpoint_setup(struct arm_dpm *dpm, unsigned index_t,
 	uint32_t control;
 
 	/* this hardware doesn't support data value matching or masking */
-	if (wp->value || wp->mask != ~(uint32_t)0) {
+	if (wp->mask != WATCHPOINT_IGNORE_DATA_VALUE_MASK) {
 		LOG_DEBUG("watchpoint values and masking not supported");
 		return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
 	}
diff --git a/src/target/armv8_dpm.c b/src/target/armv8_dpm.c
index d1eefe5b3..9ba6b5453 100644
--- a/src/target/armv8_dpm.c
+++ b/src/target/armv8_dpm.c
@@ -1210,7 +1210,7 @@ static int dpmv8_watchpoint_setup(struct arm_dpm *dpm, unsigned index_t,
 	uint32_t control;
 
 	/* this hardware doesn't support data value matching or masking */
-	if (wp->value || wp->mask != ~(uint32_t)0) {
+	if (wp->mask != WATCHPOINT_IGNORE_DATA_VALUE_MASK) {
 		LOG_DEBUG("watchpoint values and masking not supported");
 		return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
 	}
diff --git a/src/target/breakpoints.c b/src/target/breakpoints.c
index bbaff4e75..4d268cebb 100644
--- a/src/target/breakpoints.c
+++ b/src/target/breakpoints.c
@@ -393,7 +393,7 @@ struct breakpoint *breakpoint_find(struct target *target, target_addr_t address)
 }
 
 static int watchpoint_add_internal(struct target *target, target_addr_t address,
-		uint32_t length, enum watchpoint_rw rw, uint32_t value, uint32_t mask)
+		uint32_t length, enum watchpoint_rw rw, uint64_t value, uint64_t mask)
 {
 	struct watchpoint *watchpoint = target->watchpoints;
 	struct watchpoint **watchpoint_p = &target->watchpoints;
@@ -460,7 +460,7 @@ bye:
 }
 
 int watchpoint_add(struct target *target, target_addr_t address,
-		uint32_t length, enum watchpoint_rw rw, uint32_t value, uint32_t mask)
+		uint32_t length, enum watchpoint_rw rw, uint64_t value, uint64_t mask)
 {
 	if (target->smp) {
 		struct target_list *head;
diff --git a/src/target/breakpoints.h b/src/target/breakpoints.h
index a9ae48435..d447515bf 100644
--- a/src/target/breakpoints.h
+++ b/src/target/breakpoints.h
@@ -36,11 +36,13 @@ struct breakpoint {
 	int linked_brp;
 };
 
+#define WATCHPOINT_IGNORE_DATA_VALUE_MASK (~(uint64_t)0)
+
 struct watchpoint {
 	target_addr_t address;
 	uint32_t length;
-	uint32_t mask;
-	uint32_t value;
+	uint64_t mask;
+	uint64_t value;
 	enum watchpoint_rw rw;
 	bool is_set;
 	unsigned int number;
@@ -69,7 +71,7 @@ static inline void breakpoint_hw_set(struct breakpoint *breakpoint, unsigned int
 void watchpoint_clear_target(struct target *target);
 int watchpoint_add(struct target *target,
 		target_addr_t address, uint32_t length,
-		enum watchpoint_rw rw, uint32_t value, uint32_t mask);
+		enum watchpoint_rw rw, uint64_t value, uint64_t mask);
 void watchpoint_remove(struct target *target, target_addr_t address);
 
 /* report type and address of just hit watchpoint */
diff --git a/src/target/cortex_m.c b/src/target/cortex_m.c
index 9541caa79..987dc9b24 100644
--- a/src/target/cortex_m.c
+++ b/src/target/cortex_m.c
@@ -2046,8 +2046,14 @@ int cortex_m_add_watchpoint(struct target *target, struct watchpoint *watchpoint
 		return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
 	}
 
-	/* hardware doesn't support data value masking */
-	if (watchpoint->mask != ~(uint32_t)0) {
+	/* REVISIT This DWT may well be able to watch for specific data
+	 * values.  Requires comparator #1 to set DATAVMATCH and match
+	 * the data, and another comparator (DATAVADDR0) matching addr.
+	 *
+	 * NOTE: hardware doesn't support data value masking, so we'll need
+	 * to check that mask is zero
+	 */
+	if (watchpoint->mask != WATCHPOINT_IGNORE_DATA_VALUE_MASK) {
 		LOG_TARGET_DEBUG(target, "watchpoint value masks not supported");
 		return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
 	}
@@ -2068,18 +2074,6 @@ int cortex_m_add_watchpoint(struct target *target, struct watchpoint *watchpoint
 		return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
 	}
 
-	/* Caller doesn't seem to be able to describe watching for data
-	 * values of zero; that flags "no value".
-	 *
-	 * REVISIT This DWT may well be able to watch for specific data
-	 * values.  Requires comparator #1 to set DATAVMATCH and match
-	 * the data, and another comparator (DATAVADDR0) matching addr.
-	 */
-	if (watchpoint->value) {
-		LOG_TARGET_DEBUG(target, "data value watchpoint not YET supported");
-		return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
-	}
-
 	cortex_m->dwt_comp_available--;
 	LOG_TARGET_DEBUG(target, "dwt_comp_available: %d", cortex_m->dwt_comp_available);
 
diff --git a/src/target/target.c b/src/target/target.c
index 89eaa23d8..96f4ae7d3 100644
--- a/src/target/target.c
+++ b/src/target/target.c
@@ -4061,8 +4061,8 @@ COMMAND_HANDLER(handle_wp_command)
 		while (watchpoint) {
 			command_print(CMD, "address: " TARGET_ADDR_FMT
 					", len: 0x%8.8" PRIx32
-					", r/w/a: %i, value: 0x%8.8" PRIx32
-					", mask: 0x%8.8" PRIx32,
+					", r/w/a: %i, value: 0x%8.8" PRIx64
+					", mask: 0x%8.8" PRIx64,
 					watchpoint->address,
 					watchpoint->length,
 					(int)watchpoint->rw,
@@ -4076,15 +4076,20 @@ COMMAND_HANDLER(handle_wp_command)
 	enum watchpoint_rw type = WPT_ACCESS;
 	target_addr_t addr = 0;
 	uint32_t length = 0;
-	uint32_t data_value = 0x0;
-	uint32_t data_mask = 0xffffffff;
+	uint64_t data_value = 0x0;
+	uint64_t data_mask = WATCHPOINT_IGNORE_DATA_VALUE_MASK;
+	bool mask_specified = false;
 
 	switch (CMD_ARGC) {
 	case 5:
-		COMMAND_PARSE_NUMBER(u32, CMD_ARGV[4], data_mask);
+		COMMAND_PARSE_NUMBER(u64, CMD_ARGV[4], data_mask);
+		mask_specified = true;
 		/* fall through */
 	case 4:
-		COMMAND_PARSE_NUMBER(u32, CMD_ARGV[3], data_value);
+		COMMAND_PARSE_NUMBER(u64, CMD_ARGV[3], data_value);
+		// if user specified only data value without mask - the mask should be 0
+		if (!mask_specified)
+			data_mask = 0;
 		/* fall through */
 	case 3:
 		switch (CMD_ARGV[2][0]) {
diff --git a/src/target/xscale.c b/src/target/xscale.c
index 03aa5166b..fbf43516d 100644
--- a/src/target/xscale.c
+++ b/src/target/xscale.c
@@ -2296,7 +2296,7 @@ static int xscale_add_watchpoint(struct target *target,
 		return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
 	}
 
-	if (watchpoint->value)
+	if (watchpoint->mask != WATCHPOINT_IGNORE_DATA_VALUE_MASK)
 		LOG_WARNING("xscale does not support value, mask arguments; ignoring");
 
 	/* check that length is a power of two */
diff --git a/src/target/xtensa/xtensa.c b/src/target/xtensa/xtensa.c
index 431be894b..c575b534e 100644
--- a/src/target/xtensa/xtensa.c
+++ b/src/target/xtensa/xtensa.c
@@ -2570,7 +2570,7 @@ int xtensa_watchpoint_add(struct target *target, struct watchpoint *watchpoint)
 		return ERROR_TARGET_NOT_HALTED;
 	}
 
-	if (watchpoint->mask != ~(uint32_t)0) {
+	if (watchpoint->mask != WATCHPOINT_IGNORE_DATA_VALUE_MASK) {
 		LOG_TARGET_ERROR(target, "watchpoint value masks not supported");
 		return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
 	}

-----------------------------------------------------------------------

Summary of changes:
 src/server/gdb_server.c    |  2 +-
 src/target/arm7_9_common.c |  9 +++++----
 src/target/arm_dpm.c       |  2 +-
 src/target/armv8_dpm.c     |  2 +-
 src/target/breakpoints.c   |  4 ++--
 src/target/breakpoints.h   |  8 +++++---
 src/target/cortex_m.c      | 22 ++++++++--------------
 src/target/target.c        | 17 +++++++++++------
 src/target/xscale.c        |  2 +-
 src/target/xtensa/xtensa.c |  2 +-
 10 files changed, 36 insertions(+), 34 deletions(-)


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- Log -----------------------------------------------------------------
commit 2ca6d25eb561d114d3a37ace0922a738e19fcc79
Author: Parshintsev Anatoly <ana...@sy...>
Date:   Wed Aug 2 00:46:32 2023 +0300

    doc: port "0" requests any available port for usage by OpenOCD server
    
    Change-Id: I0d38533748898516dce44e81d0bff6bd35ee4aec
    Signed-off-by: Parshintsev Anatoly <ana...@sy...>
    Reviewed-on: https://review.openocd.org/c/openocd/+/7842
    Reviewed-by: Jan Matyas <jan...@co...>
    Reviewed-by: Antonio Borneo <bor...@gm...>
    Tested-by: jenkins
    Reviewed-by: Tomas Vanek <va...@fb...>

diff --git a/doc/openocd.texi b/doc/openocd.texi
index 12a8ca56d..03c5190ad 100644
--- a/doc/openocd.texi
+++ b/doc/openocd.texi
@@ -2180,6 +2180,9 @@ In such cases, just specify the relevant port number as "disabled".
 If you disable all access through TCP/IP, you will need to
 use the command line @option{-pipe} option.
 
+You can request the operating system to select one of the available
+ports for the server by specifying the relevant port number as "0".
+
 @anchor{gdb_port}
 @deffn {Config Command} {gdb_port} [number]
 @cindex GDB server

-----------------------------------------------------------------------

Summary of changes:
 doc/openocd.texi | 3 +++
 1 file changed, 3 insertions(+)


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- Log -----------------------------------------------------------------
commit a64928c4e7dd36c57e4a137f93a49522c28f547a
Author: Daniel Anselmi <dan...@gm...>
Date:   Mon Jul 24 01:43:58 2023 +0200

    pld/virtex2: allow calling set_instr_codes and set_user_codes before 'init'
    
    Change-Id: Ib21366b2fdbf33ee06a958e52b725989114751f4
    Signed-off-by: Daniel Anselmi <dan...@gm...>
    Reviewed-on: https://review.openocd.org/c/openocd/+/7821
    Tested-by: jenkins
    Reviewed-by: Antonio Borneo <bor...@gm...>

diff --git a/src/pld/virtex2.c b/src/pld/virtex2.c
index a97c7c6d6..5a8cf9d96 100644
--- a/src/pld/virtex2.c
+++ b/src/pld/virtex2.c
@@ -422,14 +422,14 @@ static const struct command_registration virtex2_exec_command_handlers[] = {
 		.usage = "pld_name",
 	}, {
 		.name = "set_instr_codes",
-		.mode = COMMAND_EXEC,
+		.mode = COMMAND_ANY,
 		.handler = virtex2_handle_set_instuction_codes_command,
 		.help = "set instructions codes used for loading the bitstream/refreshing/jtag-hub",
 		.usage = "pld_name cfg_out cfg_in jprogb jstart jshutdown"
 				 " [user1 [user2 [user3 [user4]]]]",
 	}, {
 		.name = "set_user_codes",
-		.mode = COMMAND_EXEC,
+		.mode = COMMAND_ANY,
 		.handler = virtex2_handle_set_user_codes_command,
 		.help = "set instructions codes used for jtag-hub",
 		.usage = "pld_name user1 [user2 [user3 [user4]]]",

-----------------------------------------------------------------------

Summary of changes:
 src/pld/virtex2.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)


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- Log -----------------------------------------------------------------
commit bab8b8c9eb7c0e892eaa375cb1f388a75165c627
Author: Marek Vrbka <mar...@co...>
Date:   Tue Jun 6 15:32:09 2023 +0200

    register: refactor register_cache_invalidate()
    
    register_cache_invalidate() is written a way which uses
    pointer arithmetic, which makes it harder to read. This patch
    replaces it with more readable way to iterate over array of
    structs.
    
    Change-Id: Ia420f70a3bb6998c690c8c600c71301dca9f9dbf
    Signed-off-by: Marek Vrbka <mar...@co...>
    Reviewed-on: https://review.openocd.org/c/openocd/+/7735
    Reviewed-by: Tomas Vanek <va...@fb...>
    Tested-by: jenkins
    Reviewed-by: Jan Matyas <jan...@co...>

diff --git a/src/target/register.c b/src/target/register.c
index 228712586..e4f22f8e9 100644
--- a/src/target/register.c
+++ b/src/target/register.c
@@ -93,9 +93,8 @@ void register_unlink_cache(struct reg_cache **cache_p, const struct reg_cache *c
 /** Marks the contents of the register cache as invalid (and clean). */
 void register_cache_invalidate(struct reg_cache *cache)
 {
-	struct reg *reg = cache->reg_list;
-
-	for (unsigned int n = cache->num_regs; n != 0; n--, reg++) {
+	for (unsigned int n = 0; n < cache->num_regs; n++) {
+		struct reg *reg = &cache->reg_list[n];
 		if (!reg->exist)
 			continue;
 		reg->valid = false;

-----------------------------------------------------------------------

Summary of changes:
 src/target/register.c | 5 ++---
 1 file changed, 2 insertions(+), 3 deletions(-)


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commit a5108240f9e12633fea400f92d96cc75e03c86ca
Author: Tomas Vanek <va...@fb...>
Date:   Thu Jul 20 14:52:54 2023 +0200

    target: fix messages and return values of failed op because not halted
    
    Lot of messages was logged as LOG_WARNING, but the operation failed
    immediately. Sometimes no error message was logged at all.
    Add missing messages, change warnings to errors.
    
    Sometimes ERROR_TARGET_INVALID was returned. Some command handlers
    returned ERROR_OK! Always return ERROR_TARGET_NOT_HALTED.
    
    While on it use LOG_TARGET_ERROR() whenever possible.
    Prefix command_print() message with 'Error:' to get closer
    to LOG_TARGET_ERROR() variant.
    
    Error message was not added to get() and set() methods of
    struct xxx_reg_type - the return value is properly checked and a message
    is logged by the caller in case of ERROR_TARGET_NOT_HALTED.
    
    Signed-off-by: Tomas Vanek <va...@fb...>
    Change-Id: I2fe4187c6025f0038956ab387edbf3f461c69398
    Reviewed-on: https://review.openocd.org/c/openocd/+/7819
    Tested-by: jenkins
    Reviewed-by: Antonio Borneo <bor...@gm...>

diff --git a/src/target/aarch64.c b/src/target/aarch64.c
index 5a16b3a3b..5d8a65273 100644
--- a/src/target/aarch64.c
+++ b/src/target/aarch64.c
@@ -846,8 +846,10 @@ static int aarch64_resume(struct target *target, int current,
 	struct armv8_common *armv8 = target_to_armv8(target);
 	armv8->last_run_control_op = ARMV8_RUNCONTROL_RESUME;
 
-	if (target->state != TARGET_HALTED)
+	if (target->state != TARGET_HALTED) {
+		LOG_TARGET_ERROR(target, "not halted");
 		return ERROR_TARGET_NOT_HALTED;
+	}
 
 	/*
 	 * If this target is part of a SMP group, prepare the others
@@ -1095,7 +1097,7 @@ static int aarch64_step(struct target *target, int current, target_addr_t addres
 	armv8->last_run_control_op = ARMV8_RUNCONTROL_STEP;
 
 	if (target->state != TARGET_HALTED) {
-		LOG_WARNING("target not halted");
+		LOG_TARGET_ERROR(target, "not halted");
 		return ERROR_TARGET_NOT_HALTED;
 	}
 
@@ -2135,7 +2137,7 @@ static int aarch64_write_cpu_memory(struct target *target,
 	uint32_t dscr;
 
 	if (target->state != TARGET_HALTED) {
-		LOG_WARNING("target not halted");
+		LOG_TARGET_ERROR(target, "not halted");
 		return ERROR_TARGET_NOT_HALTED;
 	}
 
@@ -2353,7 +2355,7 @@ static int aarch64_read_cpu_memory(struct target *target,
 			address, size, count);
 
 	if (target->state != TARGET_HALTED) {
-		LOG_WARNING("target not halted");
+		LOG_TARGET_ERROR(target, "not halted");
 		return ERROR_TARGET_NOT_HALTED;
 	}
 
@@ -2790,8 +2792,8 @@ static int aarch64_mmu(struct target *target, int *enabled)
 	struct aarch64_common *aarch64 = target_to_aarch64(target);
 	struct armv8_common *armv8 = &aarch64->armv8_common;
 	if (target->state != TARGET_HALTED) {
-		LOG_ERROR("%s: target %s not halted", __func__, target_name(target));
-		return ERROR_TARGET_INVALID;
+		LOG_TARGET_ERROR(target, "not halted");
+		return ERROR_TARGET_NOT_HALTED;
 	}
 	if (armv8->is_armv8r)
 		*enabled = 0;
@@ -3010,8 +3012,10 @@ COMMAND_HANDLER(aarch64_mcrmrc_command)
 		return ERROR_FAIL;
 	}
 
-	if (target->state != TARGET_HALTED)
+	if (target->state != TARGET_HALTED) {
+		command_print(CMD, "Error: [%s] not halted", target_name(target));
 		return ERROR_TARGET_NOT_HALTED;
+	}
 
 	if (arm->core_state == ARM_STATE_AARCH64) {
 		command_print(CMD, "%s: not 32-bit arm target", target_name(target));
diff --git a/src/target/arc.c b/src/target/arc.c
index a8de6f36b..2ca6be16d 100644
--- a/src/target/arc.c
+++ b/src/target/arc.c
@@ -1258,7 +1258,7 @@ static int arc_resume(struct target *target, int current, target_addr_t address,
 	CHECK_RETVAL(arc_reset_caches_states(target));
 
 	if (target->state != TARGET_HALTED) {
-		LOG_WARNING("target not halted");
+		LOG_TARGET_ERROR(target, "not halted");
 		return ERROR_TARGET_NOT_HALTED;
 	}
 
@@ -1671,7 +1671,7 @@ static int arc_add_breakpoint(struct target *target, struct breakpoint *breakpoi
 		return arc_set_breakpoint(target, breakpoint);
 
 	} else {
-		LOG_WARNING(" > core was not halted, please try again.");
+		LOG_TARGET_ERROR(target, "not halted (add breakpoint)");
 		return ERROR_TARGET_NOT_HALTED;
 	}
 }
@@ -1683,7 +1683,7 @@ static int arc_remove_breakpoint(struct target *target,
 		if (breakpoint->is_set)
 			CHECK_RETVAL(arc_unset_breakpoint(target, breakpoint));
 	} else {
-		LOG_WARNING("target not halted");
+		LOG_TARGET_ERROR(target, "not halted (remove breakpoint)");
 		return ERROR_TARGET_NOT_HALTED;
 	}
 
@@ -1905,7 +1905,7 @@ static int arc_add_watchpoint(struct target *target,
 	struct watchpoint *watchpoint)
 {
 	if (target->state != TARGET_HALTED) {
-		LOG_WARNING("target not halted");
+		LOG_TARGET_ERROR(target, "not halted");
 		return ERROR_TARGET_NOT_HALTED;
 	}
 
@@ -1918,7 +1918,7 @@ static int arc_remove_watchpoint(struct target *target,
 	struct watchpoint *watchpoint)
 {
 	if (target->state != TARGET_HALTED) {
-		LOG_WARNING("target not halted");
+		LOG_TARGET_ERROR(target, "not halted");
 		return ERROR_TARGET_NOT_HALTED;
 	}
 
@@ -2006,7 +2006,7 @@ static int arc_step(struct target *target, int current, target_addr_t address,
 	struct reg *pc = &(arc->core_and_aux_cache->reg_list[arc->pc_index_in_cache]);
 
 	if (target->state != TARGET_HALTED) {
-		LOG_WARNING("target not halted");
+		LOG_TARGET_ERROR(target, "not halted");
 		return ERROR_TARGET_NOT_HALTED;
 	}
 
diff --git a/src/target/arc_mem.c b/src/target/arc_mem.c
index c4814d277..3264b663b 100644
--- a/src/target/arc_mem.c
+++ b/src/target/arc_mem.c
@@ -162,7 +162,7 @@ int arc_mem_write(struct target *target, target_addr_t address, uint32_t size,
 		address, size, count);
 
 	if (target->state != TARGET_HALTED) {
-		LOG_WARNING("target not halted");
+		LOG_TARGET_ERROR(target, "not halted");
 		return ERROR_TARGET_NOT_HALTED;
 	}
 
diff --git a/src/target/arm11.c b/src/target/arm11.c
index e48bcf30b..50aaa86f1 100644
--- a/src/target/arm11.c
+++ b/src/target/arm11.c
@@ -449,7 +449,7 @@ static int arm11_resume(struct target *target, int current,
 
 
 	if (target->state != TARGET_HALTED) {
-		LOG_ERROR("Target not halted");
+		LOG_TARGET_ERROR(target, "not halted");
 		return ERROR_TARGET_NOT_HALTED;
 	}
 
@@ -551,7 +551,7 @@ static int arm11_step(struct target *target, int current,
 		target_state_name(target));
 
 	if (target->state != TARGET_HALTED) {
-		LOG_WARNING("target was not halted");
+		LOG_TARGET_ERROR(target, "not halted");
 		return ERROR_TARGET_NOT_HALTED;
 	}
 
@@ -798,7 +798,7 @@ static int arm11_read_memory_inner(struct target *target,
 	int retval;
 
 	if (target->state != TARGET_HALTED) {
-		LOG_WARNING("target was not halted");
+		LOG_TARGET_ERROR(target, "not halted");
 		return ERROR_TARGET_NOT_HALTED;
 	}
 
@@ -896,7 +896,7 @@ static int arm11_write_memory_inner(struct target *target,
 	int retval;
 
 	if (target->state != TARGET_HALTED) {
-		LOG_WARNING("target was not halted");
+		LOG_TARGET_ERROR(target, "not halted");
 		return ERROR_TARGET_NOT_HALTED;
 	}
 
diff --git a/src/target/arm720t.c b/src/target/arm720t.c
index c330dfff9..beab632c2 100644
--- a/src/target/arm720t.c
+++ b/src/target/arm720t.c
@@ -241,8 +241,8 @@ static int arm720t_arch_state(struct target *target)
 static int arm720_mmu(struct target *target, int *enabled)
 {
 	if (target->state != TARGET_HALTED) {
-		LOG_ERROR("%s: target not halted", __func__);
-		return ERROR_TARGET_INVALID;
+		LOG_TARGET_ERROR(target, "not halted");
+		return ERROR_TARGET_NOT_HALTED;
 	}
 
 	*enabled = target_to_arm720(target)->armv4_5_mmu.mmu_enabled;
diff --git a/src/target/arm7_9_common.c b/src/target/arm7_9_common.c
index f60777dbe..bbdbc4981 100644
--- a/src/target/arm7_9_common.c
+++ b/src/target/arm7_9_common.c
@@ -184,7 +184,7 @@ static int arm7_9_set_breakpoint(struct target *target, struct breakpoint *break
 		breakpoint->type);
 
 	if (target->state != TARGET_HALTED) {
-		LOG_WARNING("target not halted");
+		LOG_TARGET_ERROR(target, "not halted");
 		return ERROR_TARGET_NOT_HALTED;
 	}
 
@@ -455,7 +455,7 @@ static int arm7_9_set_watchpoint(struct target *target, struct watchpoint *watch
 	mask = watchpoint->length - 1;
 
 	if (target->state != TARGET_HALTED) {
-		LOG_WARNING("target not halted");
+		LOG_TARGET_ERROR(target, "not halted");
 		return ERROR_TARGET_NOT_HALTED;
 	}
 
@@ -524,7 +524,7 @@ static int arm7_9_unset_watchpoint(struct target *target, struct watchpoint *wat
 	struct arm7_9_common *arm7_9 = target_to_arm7_9(target);
 
 	if (target->state != TARGET_HALTED) {
-		LOG_WARNING("target not halted");
+		LOG_TARGET_ERROR(target, "not halted");
 		return ERROR_TARGET_NOT_HALTED;
 	}
 
@@ -1259,7 +1259,7 @@ static int arm7_9_debug_entry(struct target *target)
 		return retval;
 
 	if (target->state != TARGET_HALTED) {
-		LOG_WARNING("target not halted");
+		LOG_TARGET_ERROR(target, "not halted");
 		return ERROR_TARGET_NOT_HALTED;
 	}
 
@@ -1390,7 +1390,7 @@ static int arm7_9_full_context(struct target *target)
 	LOG_DEBUG("-");
 
 	if (target->state != TARGET_HALTED) {
-		LOG_WARNING("target not halted");
+		LOG_TARGET_ERROR(target, "not halted");
 		return ERROR_TARGET_NOT_HALTED;
 	}
 
@@ -1506,7 +1506,7 @@ static int arm7_9_restore_context(struct target *target)
 	LOG_DEBUG("-");
 
 	if (target->state != TARGET_HALTED) {
-		LOG_WARNING("target not halted");
+		LOG_TARGET_ERROR(target, "not halted");
 		return ERROR_TARGET_NOT_HALTED;
 	}
 
@@ -1709,7 +1709,7 @@ int arm7_9_resume(struct target *target,
 	LOG_DEBUG("-");
 
 	if (target->state != TARGET_HALTED) {
-		LOG_WARNING("target not halted");
+		LOG_TARGET_ERROR(target, "not halted");
 		return ERROR_TARGET_NOT_HALTED;
 	}
 
@@ -1907,7 +1907,7 @@ int arm7_9_step(struct target *target, int current, target_addr_t address, int h
 	int err, retval;
 
 	if (target->state != TARGET_HALTED) {
-		LOG_WARNING("target not halted");
+		LOG_TARGET_ERROR(target, "not halted");
 		return ERROR_TARGET_NOT_HALTED;
 	}
 
@@ -2118,7 +2118,7 @@ int arm7_9_read_memory(struct target *target,
 		address, size, count);
 
 	if (target->state != TARGET_HALTED) {
-		LOG_WARNING("target not halted");
+		LOG_TARGET_ERROR(target, "not halted");
 		return ERROR_TARGET_NOT_HALTED;
 	}
 
@@ -2291,7 +2291,7 @@ int arm7_9_write_memory(struct target *target,
 #endif
 
 	if (target->state != TARGET_HALTED) {
-		LOG_WARNING("target not halted");
+		LOG_TARGET_ERROR(target, "not halted");
 		return ERROR_TARGET_NOT_HALTED;
 	}
 
diff --git a/src/target/arm920t.c b/src/target/arm920t.c
index f4c3f4250..53b4d9d15 100644
--- a/src/target/arm920t.c
+++ b/src/target/arm920t.c
@@ -533,8 +533,8 @@ int arm920t_arch_state(struct target *target)
 static int arm920_mmu(struct target *target, int *enabled)
 {
 	if (target->state != TARGET_HALTED) {
-		LOG_ERROR("%s: target not halted", __func__);
-		return ERROR_TARGET_INVALID;
+		LOG_TARGET_ERROR(target, "not halted");
+		return ERROR_TARGET_NOT_HALTED;
 	}
 
 	*enabled = target_to_arm920(target)->armv4_5_mmu.mmu_enabled;
@@ -1455,9 +1455,9 @@ COMMAND_HANDLER(arm920t_handle_cp15_command)
 		return retval;
 
 	if (target->state != TARGET_HALTED) {
-		command_print(CMD, "target must be stopped for "
+		command_print(CMD, "Error: target must be stopped for "
 			"\"%s\" command", CMD_NAME);
-		return ERROR_OK;
+		return ERROR_TARGET_NOT_HALTED;
 	}
 
 	/* one argument, read a register.
diff --git a/src/target/arm926ejs.c b/src/target/arm926ejs.c
index 807d21175..add90c997 100644
--- a/src/target/arm926ejs.c
+++ b/src/target/arm926ejs.c
@@ -754,8 +754,8 @@ static int arm926ejs_mmu(struct target *target, int *enabled)
 	struct arm926ejs_common *arm926ejs = target_to_arm926(target);
 
 	if (target->state != TARGET_HALTED) {
-		LOG_ERROR("Target not halted");
-		return ERROR_TARGET_INVALID;
+		LOG_TARGET_ERROR(target, "not halted");
+		return ERROR_TARGET_NOT_HALTED;
 	}
 	*enabled = arm926ejs->armv4_5_mmu.mmu_enabled;
 	return ERROR_OK;
diff --git a/src/target/arm946e.c b/src/target/arm946e.c
index 06dab4e97..03f7e443f 100644
--- a/src/target/arm946e.c
+++ b/src/target/arm946e.c
@@ -574,7 +574,7 @@ COMMAND_HANDLER(arm946e_handle_cp15)
 		return retval;
 
 	if (target->state != TARGET_HALTED) {
-		command_print(CMD, "target must be stopped for \"%s\" command", CMD_NAME);
+		command_print(CMD, "Error: target must be stopped for \"%s\" command", CMD_NAME);
 		return ERROR_TARGET_NOT_HALTED;
 	}
 
@@ -624,7 +624,7 @@ COMMAND_HANDLER(arm946e_handle_idcache)
 		return retval;
 
 	if (target->state != TARGET_HALTED) {
-		command_print(CMD, "target must be stopped for \"%s\" command", CMD_NAME);
+		command_print(CMD, "Error: target must be stopped for \"%s\" command", CMD_NAME);
 		return ERROR_TARGET_NOT_HALTED;
 	}
 
diff --git a/src/target/arm966e.c b/src/target/arm966e.c
index 3e6017203..8598d29d9 100644
--- a/src/target/arm966e.c
+++ b/src/target/arm966e.c
@@ -174,8 +174,8 @@ COMMAND_HANDLER(arm966e_handle_cp15_command)
 		return retval;
 
 	if (target->state != TARGET_HALTED) {
-		command_print(CMD, "target must be stopped for \"%s\" command", CMD_NAME);
-		return ERROR_OK;
+		command_print(CMD, "Error: target must be stopped for \"%s\" command", CMD_NAME);
+		return ERROR_TARGET_NOT_HALTED;
 	}
 
 	/* one or more argument, access a single register (write if second argument is given */
diff --git a/src/target/armv4_5.c b/src/target/armv4_5.c
index f35d67a57..8e3f22417 100644
--- a/src/target/armv4_5.c
+++ b/src/target/armv4_5.c
@@ -578,7 +578,7 @@ static int armv4_5_get_core_reg(struct reg *reg)
 	struct target *target = reg_arch_info->target;
 
 	if (target->state != TARGET_HALTED) {
-		LOG_ERROR("Target not halted");
+		LOG_TARGET_ERROR(target, "not halted");
 		return ERROR_TARGET_NOT_HALTED;
 	}
 
@@ -600,7 +600,7 @@ static int armv4_5_set_core_reg(struct reg *reg, uint8_t *buf)
 	uint32_t value = buf_get_u32(buf, 0, 32);
 
 	if (target->state != TARGET_HALTED) {
-		LOG_ERROR("Target not halted");
+		LOG_TARGET_ERROR(target, "not halted");
 		return ERROR_TARGET_NOT_HALTED;
 	}
 
@@ -817,8 +817,8 @@ COMMAND_HANDLER(handle_armv4_5_reg_command)
 	}
 
 	if (target->state != TARGET_HALTED) {
-		command_print(CMD, "error: target must be halted for register accesses");
-		return ERROR_FAIL;
+		command_print(CMD, "Error: target must be halted for register accesses");
+		return ERROR_TARGET_NOT_HALTED;
 	}
 
 	if (arm->core_type != ARM_CORE_TYPE_STD) {
@@ -833,7 +833,7 @@ COMMAND_HANDLER(handle_armv4_5_reg_command)
 	}
 
 	if (!arm->full_context) {
-		command_print(CMD, "error: target doesn't support %s",
+		command_print(CMD, "Error: target doesn't support %s",
 			CMD_NAME);
 		return ERROR_FAIL;
 	}
@@ -1018,8 +1018,10 @@ COMMAND_HANDLER(handle_armv4_5_mcrmrc)
 		return ERROR_FAIL;
 	}
 
-	if (target->state != TARGET_HALTED)
+	if (target->state != TARGET_HALTED) {
+		command_print(CMD, "Error: [%s] not halted", target_name(target));
 		return ERROR_TARGET_NOT_HALTED;
+	}
 
 	int cpnum;
 	uint32_t op1;
@@ -1307,7 +1309,7 @@ int armv4_5_run_algorithm_inner(struct target *target,
 	}
 
 	if (target->state != TARGET_HALTED) {
-		LOG_WARNING("target not halted");
+		LOG_TARGET_ERROR(target, "not halted (run target algo)");
 		return ERROR_TARGET_NOT_HALTED;
 	}
 
diff --git a/src/target/armv4_5_mmu.c b/src/target/armv4_5_mmu.c
index 9942f49e4..0c09cb4ca 100644
--- a/src/target/armv4_5_mmu.c
+++ b/src/target/armv4_5_mmu.c
@@ -107,8 +107,10 @@ int armv4_5_mmu_read_physical(struct target *target,
 {
 	int retval;
 
-	if (target->state != TARGET_HALTED)
+	if (target->state != TARGET_HALTED) {
+		LOG_TARGET_ERROR(target, "not halted");
 		return ERROR_TARGET_NOT_HALTED;
+	}
 
 	/* disable MMU and data (or unified) cache */
 	retval = armv4_5_mmu->disable_mmu_caches(target, 1, 1, 0);
@@ -135,8 +137,10 @@ int armv4_5_mmu_write_physical(struct target *target,
 {
 	int retval;
 
-	if (target->state != TARGET_HALTED)
+	if (target->state != TARGET_HALTED) {
+		LOG_TARGET_ERROR(target, "not halted");
 		return ERROR_TARGET_NOT_HALTED;
+	}
 
 	/* disable MMU and data (or unified) cache */
 	retval = armv4_5_mmu->disable_mmu_caches(target, 1, 1, 0);
diff --git a/src/target/armv7a_cache.c b/src/target/armv7a_cache.c
index 995a85611..e1f0dfafb 100644
--- a/src/target/armv7a_cache.c
+++ b/src/target/armv7a_cache.c
@@ -22,7 +22,7 @@ static int armv7a_l1_d_cache_sanity_check(struct target *target)
 	struct armv7a_common *armv7a = target_to_armv7a(target);
 
 	if (target->state != TARGET_HALTED) {
-		LOG_ERROR("%s: target not halted", __func__);
+		LOG_TARGET_ERROR(target, "not halted");
 		return ERROR_TARGET_NOT_HALTED;
 	}
 
@@ -40,7 +40,7 @@ static int armv7a_l1_i_cache_sanity_check(struct target *target)
 	struct armv7a_common *armv7a = target_to_armv7a(target);
 
 	if (target->state != TARGET_HALTED) {
-		LOG_ERROR("%s: target not halted", __func__);
+		LOG_TARGET_ERROR(target, "not halted");
 		return ERROR_TARGET_NOT_HALTED;
 	}
 
diff --git a/src/target/armv7m.c b/src/target/armv7m.c
index 8c9ff902e..d508af7bf 100644
--- a/src/target/armv7m.c
+++ b/src/target/armv7m.c
@@ -525,7 +525,7 @@ int armv7m_start_algorithm(struct target *target,
 	}
 
 	if (target->state != TARGET_HALTED) {
-		LOG_WARNING("target not halted");
+		LOG_TARGET_ERROR(target, "not halted (start target algo)");
 		return ERROR_TARGET_NOT_HALTED;
 	}
 
diff --git a/src/target/armv8.c b/src/target/armv8.c
index e647c3b4c..d197477ac 100644
--- a/src/target/armv8.c
+++ b/src/target/armv8.c
@@ -964,7 +964,7 @@ int armv8_mmu_translate_va_pa(struct target *target, target_addr_t va,
 	};
 
 	if (target->state != TARGET_HALTED) {
-		LOG_WARNING("target %s not halted", target_name(target));
+		LOG_TARGET_ERROR(target, "not halted");
 		return ERROR_TARGET_NOT_HALTED;
 	}
 
diff --git a/src/target/avr32_ap7k.c b/src/target/avr32_ap7k.c
index bf1445bf3..bbbf23659 100644
--- a/src/target/avr32_ap7k.c
+++ b/src/target/avr32_ap7k.c
@@ -309,7 +309,7 @@ static int avr32_ap7k_resume(struct target *target, int current,
 	int retval;
 
 	if (target->state != TARGET_HALTED) {
-		LOG_WARNING("target not halted");
+		LOG_TARGET_ERROR(target, "not halted");
 		return ERROR_TARGET_NOT_HALTED;
 	}
 
@@ -431,7 +431,7 @@ static int avr32_ap7k_read_memory(struct target *target, target_addr_t address,
 		count);
 
 	if (target->state != TARGET_HALTED) {
-		LOG_WARNING("target not halted");
+		LOG_TARGET_ERROR(target, "not halted");
 		return ERROR_TARGET_NOT_HALTED;
 	}
 
@@ -471,7 +471,7 @@ static int avr32_ap7k_write_memory(struct target *target, target_addr_t address,
 		count);
 
 	if (target->state != TARGET_HALTED) {
-		LOG_WARNING("target not halted");
+		LOG_TARGET_ERROR(target, "not halted");
 		return ERROR_TARGET_NOT_HALTED;
 	}
 
diff --git a/src/target/cortex_a.c b/src/target/cortex_a.c
index d9688be13..abfd6ac5f 100644
--- a/src/target/cortex_a.c
+++ b/src/target/cortex_a.c
@@ -1147,7 +1147,7 @@ static int cortex_a_step(struct target *target, int current, target_addr_t addre
 	int retval;
 
 	if (target->state != TARGET_HALTED) {
-		LOG_WARNING("target not halted");
+		LOG_TARGET_ERROR(target, "not halted");
 		return ERROR_TARGET_NOT_HALTED;
 	}
 
@@ -2225,7 +2225,7 @@ static int cortex_a_write_cpu_memory(struct target *target,
 	LOG_DEBUG("Writing CPU memory address 0x%" PRIx32 " size %"  PRIu32 " count %"  PRIu32,
 			  address, size, count);
 	if (target->state != TARGET_HALTED) {
-		LOG_WARNING("target not halted");
+		LOG_TARGET_ERROR(target, "not halted");
 		return ERROR_TARGET_NOT_HALTED;
 	}
 
@@ -2542,7 +2542,7 @@ static int cortex_a_read_cpu_memory(struct target *target,
 	LOG_DEBUG("Reading CPU memory address 0x%" PRIx32 " size %"  PRIu32 " count %"  PRIu32,
 			  address, size, count);
 	if (target->state != TARGET_HALTED) {
-		LOG_WARNING("target not halted");
+		LOG_TARGET_ERROR(target, "not halted");
 		return ERROR_TARGET_NOT_HALTED;
 	}
 
@@ -3183,8 +3183,8 @@ static int cortex_a_mmu(struct target *target, int *enabled)
 	struct armv7a_common *armv7a = target_to_armv7a(target);
 
 	if (target->state != TARGET_HALTED) {
-		LOG_ERROR("%s: target not halted", __func__);
-		return ERROR_TARGET_INVALID;
+		LOG_TARGET_ERROR(target, "not halted");
+		return ERROR_TARGET_NOT_HALTED;
 	}
 
 	if (armv7a->is_armv7r)
diff --git a/src/target/cortex_m.c b/src/target/cortex_m.c
index ebc3bac99..9541caa79 100644
--- a/src/target/cortex_m.c
+++ b/src/target/cortex_m.c
@@ -1214,7 +1214,7 @@ static int cortex_m_restore_one(struct target *target, bool current,
 	struct reg *r;
 
 	if (target->state != TARGET_HALTED) {
-		LOG_TARGET_ERROR(target, "target not halted");
+		LOG_TARGET_ERROR(target, "not halted");
 		return ERROR_TARGET_NOT_HALTED;
 	}
 
@@ -1391,7 +1391,7 @@ static int cortex_m_step(struct target *target, int current,
 	bool isr_timed_out = false;
 
 	if (target->state != TARGET_HALTED) {
-		LOG_TARGET_WARNING(target, "target not halted");
+		LOG_TARGET_ERROR(target, "not halted");
 		return ERROR_TARGET_NOT_HALTED;
 	}
 
@@ -2092,7 +2092,7 @@ int cortex_m_remove_watchpoint(struct target *target, struct watchpoint *watchpo
 
 	/* REVISIT why check? DWT can be updated with core running ... */
 	if (target->state != TARGET_HALTED) {
-		LOG_TARGET_WARNING(target, "target not halted");
+		LOG_TARGET_ERROR(target, "not halted");
 		return ERROR_TARGET_NOT_HALTED;
 	}
 
@@ -2948,8 +2948,8 @@ COMMAND_HANDLER(handle_cortex_m_mask_interrupts_command)
 		return retval;
 
 	if (target->state != TARGET_HALTED) {
-		command_print(CMD, "target must be stopped for \"%s\" command", CMD_NAME);
-		return ERROR_OK;
+		command_print(CMD, "Error: target must be stopped for \"%s\" command", CMD_NAME);
+		return ERROR_TARGET_NOT_HALTED;
 	}
 
 	if (CMD_ARGC > 0) {
diff --git a/src/target/dsp563xx.c b/src/target/dsp563xx.c
index 8ea2cb613..578920154 100644
--- a/src/target/dsp563xx.c
+++ b/src/target/dsp563xx.c
@@ -1296,7 +1296,7 @@ static int dsp563xx_step(struct target *target,
 	struct dsp563xx_common *dsp563xx = target_to_dsp563xx(target);
 
 	if (target->state != TARGET_HALTED) {
-		LOG_WARNING("target not halted");
+		LOG_TARGET_ERROR(target, "not halted");
 		return ERROR_TARGET_NOT_HALTED;
 	}
 
@@ -1381,7 +1381,7 @@ static int dsp563xx_run_algorithm(struct target *target,
 	struct dsp563xx_common *dsp563xx = target_to_dsp563xx(target);
 
 	if (target->state != TARGET_HALTED) {
-		LOG_WARNING("target not halted");
+		LOG_TARGET_ERROR(target, "not halted (run target algo)");
 		return ERROR_TARGET_NOT_HALTED;
 	}
 
@@ -1705,7 +1705,7 @@ static int dsp563xx_write_memory_core(struct target *target,
 		count);
 
 	if (target->state != TARGET_HALTED) {
-		LOG_WARNING("target not halted");
+		LOG_TARGET_ERROR(target, "not halted");
 		return ERROR_TARGET_NOT_HALTED;
 	}
 
diff --git a/src/target/esirisc.c b/src/target/esirisc.c
index f86d28d58..561edb255 100644
--- a/src/target/esirisc.c
+++ b/src/target/esirisc.c
@@ -318,8 +318,10 @@ static int esirisc_flush_caches(struct target *target)
 
 	LOG_DEBUG("-");
 
-	if (target->state != TARGET_HALTED)
+	if (target->state != TARGET_HALTED) {
+		LOG_TARGET_ERROR(target, "not halted");
 		return ERROR_TARGET_NOT_HALTED;
+	}
 
 	int retval = esirisc_jtag_flush_caches(jtag_info);
 	if (retval != ERROR_OK) {
@@ -855,8 +857,10 @@ static int esirisc_resume_or_step(struct target *target, int current, target_add
 
 	LOG_DEBUG("-");
 
-	if (target->state != TARGET_HALTED)
+	if (target->state != TARGET_HALTED) {
+		LOG_TARGET_ERROR(target, "not halted");
 		return ERROR_TARGET_NOT_HALTED;
+	}
 
 	if (!debug_execution) {
 		target_free_all_working_areas(target);
diff --git a/src/target/hla_target.c b/src/target/hla_target.c
index 8c35a90cb..c1bda996c 100644
--- a/src/target/hla_target.c
+++ b/src/target/hla_target.c
@@ -449,7 +449,7 @@ static int adapter_resume(struct target *target, int current,
 			address, handle_breakpoints, debug_execution);
 
 	if (target->state != TARGET_HALTED) {
-		LOG_WARNING("target not halted");
+		LOG_TARGET_ERROR(target, "not halted");
 		return ERROR_TARGET_NOT_HALTED;
 	}
 
@@ -538,7 +538,7 @@ static int adapter_step(struct target *target, int current,
 	LOG_DEBUG("%s", __func__);
 
 	if (target->state != TARGET_HALTED) {
-		LOG_WARNING("target not halted");
+		LOG_TARGET_ERROR(target, "not halted");
 		return ERROR_TARGET_NOT_HALTED;
 	}
 
diff --git a/src/target/mips32.c b/src/target/mips32.c
index 1a34f737e..ce16a7b5d 100644
--- a/src/target/mips32.c
+++ b/src/target/mips32.c
@@ -438,7 +438,7 @@ int mips32_run_algorithm(struct target *target, int num_mem_params,
 	}
 
 	if (target->state != TARGET_HALTED) {
-		LOG_WARNING("target not halted");
+		LOG_TARGET_ERROR(target, "not halted (run target algo)");
 		return ERROR_TARGET_NOT_HALTED;
 	}
 
@@ -921,8 +921,8 @@ COMMAND_HANDLER(mips32_handle_cp0_command)
 		return retval;
 
 	if (target->state != TARGET_HALTED) {
-		command_print(CMD, "target must be stopped for \"%s\" command", CMD_NAME);
-		return ERROR_OK;
+		command_print(CMD, "Error: target must be stopped for \"%s\" command", CMD_NAME);
+		return ERROR_TARGET_NOT_HALTED;
 	}
 
 	/* two or more argument, access a single register/select (write if third argument is given) */
diff --git a/src/target/mips_mips64.c b/src/target/mips_mips64.c
index 640b4c838..bf6095358 100644
--- a/src/target/mips_mips64.c
+++ b/src/target/mips_mips64.c
@@ -606,7 +606,7 @@ static int mips_mips64_resume(struct target *target, int current,
 		address = mips64_extend_sign(address);
 
 	if (target->state != TARGET_HALTED) {
-		LOG_WARNING("target not halted %d", target->state);
+		LOG_TARGET_ERROR(target, "not halted");
 		return ERROR_TARGET_NOT_HALTED;
 	}
 
@@ -706,7 +706,7 @@ static int mips_mips64_step(struct target *target, int current,
 	int retval = ERROR_OK;
 
 	if (target->state != TARGET_HALTED) {
-		LOG_WARNING("target not halted");
+		LOG_TARGET_ERROR(target, "not halted");
 		return ERROR_TARGET_NOT_HALTED;
 	}
 
@@ -804,7 +804,7 @@ static int mips_mips64_remove_breakpoint(struct target *target,
 	int retval = ERROR_OK;
 
 	if (target->state != TARGET_HALTED) {
-		LOG_WARNING("target not halted");
+		LOG_TARGET_ERROR(target, "not halted");
 		return ERROR_TARGET_NOT_HALTED;
 	}
 
@@ -865,7 +865,7 @@ static int mips_mips64_remove_watchpoint(struct target *target,
 	int retval = ERROR_OK;
 
 	if (target->state != TARGET_HALTED) {
-		LOG_WARNING("target not halted");
+		LOG_TARGET_ERROR(target, "not halted");
 		return ERROR_TARGET_NOT_HALTED;
 	}
 
@@ -886,7 +886,7 @@ static int mips_mips64_read_memory(struct target *target, uint64_t address,
 	void *t;
 
 	if (target->state != TARGET_HALTED) {
-		LOG_WARNING("target not halted %d", target->state);
+		LOG_TARGET_ERROR(target, "not halted");
 		return ERROR_TARGET_NOT_HALTED;
 	}
 
@@ -1014,7 +1014,7 @@ static int mips_mips64_write_memory(struct target *target, uint64_t address,
 	int retval;
 
 	if (target->state != TARGET_HALTED) {
-		LOG_WARNING("target not halted");
+		LOG_TARGET_ERROR(target, "not halted");
 		return ERROR_TARGET_NOT_HALTED;
 	}
 
diff --git a/src/target/openrisc/or1k.c b/src/target/openrisc/or1k.c
index d73bca210..8c3861080 100644
--- a/src/target/openrisc/or1k.c
+++ b/src/target/openrisc/or1k.c
@@ -789,7 +789,7 @@ static int or1k_resume_or_step(struct target *target, int current,
 		  address, step ? "yes" : "no", handle_breakpoints ? "yes" : "no");
 
 	if (target->state != TARGET_HALTED) {
-		LOG_ERROR("Target not halted");
+		LOG_TARGET_ERROR(target, "not halted");
 		return ERROR_TARGET_NOT_HALTED;
 	}
 
@@ -1026,7 +1026,7 @@ static int or1k_read_memory(struct target *target, target_addr_t address,
 	LOG_DEBUG("Read memory at 0x%08" TARGET_PRIxADDR ", size: %" PRIu32 ", count: 0x%08" PRIx32, address, size, count);
 
 	if (target->state != TARGET_HALTED) {
-		LOG_ERROR("Target not halted");
+		LOG_TARGET_ERROR(target, "not halted");
 		return ERROR_TARGET_NOT_HALTED;
 	}
 
@@ -1053,7 +1053,7 @@ static int or1k_write_memory(struct target *target, target_addr_t address,
 	LOG_DEBUG("Write memory at 0x%08" TARGET_PRIxADDR ", size: %" PRIu32 ", count: 0x%08" PRIx32, address, size, count);
 
 	if (target->state != TARGET_HALTED) {
-		LOG_WARNING("Target not halted");
+		LOG_TARGET_ERROR(target, "not halted");
 		return ERROR_TARGET_NOT_HALTED;
 	}
 
diff --git a/src/target/riscv/riscv.c b/src/target/riscv/riscv.c
index 48391786d..cb8d04f20 100644
--- a/src/target/riscv/riscv.c
+++ b/src/target/riscv/riscv.c
@@ -1840,7 +1840,7 @@ static int riscv_run_algorithm(struct target *target, int num_mem_params,
 	}
 
 	if (target->state != TARGET_HALTED) {
-		LOG_WARNING("target not halted");
+		LOG_TARGET_ERROR(target, "not halted (run target algo)");
 		return ERROR_TARGET_NOT_HALTED;
 	}
 
diff --git a/src/target/stm8.c b/src/target/stm8.c
index 91a59d79c..ad4a45298 100644
--- a/src/target/stm8.c
+++ b/src/target/stm8.c
@@ -994,7 +994,7 @@ static int stm8_resume(struct target *target, int current,
 			handle_breakpoints, debug_execution);
 
 	if (target->state != TARGET_HALTED) {
-		LOG_WARNING("target not halted");
+		LOG_TARGET_ERROR(target, "not halted");
 		return ERROR_TARGET_NOT_HALTED;
 	}
 
@@ -1303,7 +1303,7 @@ static int stm8_step(struct target *target, int current,
 	struct breakpoint *breakpoint = NULL;
 
 	if (target->state != TARGET_HALTED) {
-		LOG_WARNING("target not halted");
+		LOG_TARGET_ERROR(target, "not halted");
 		return ERROR_TARGET_NOT_HALTED;
 	}
 
@@ -1518,7 +1518,7 @@ static int stm8_remove_breakpoint(struct target *target,
 	struct stm8_common *stm8 = target_to_stm8(target);
 
 	if (target->state != TARGET_HALTED) {
-		LOG_WARNING("target not halted");
+		LOG_TARGET_ERROR(target, "not halted");
 		return ERROR_TARGET_NOT_HALTED;
 	}
 
@@ -1654,7 +1654,7 @@ static int stm8_remove_watchpoint(struct target *target,
 	struct stm8_common *stm8 = target_to_stm8(target);
 
 	if (target->state != TARGET_HALTED) {
-		LOG_WARNING("target not halted");
+		LOG_TARGET_ERROR(target, "not halted");
 		return ERROR_TARGET_NOT_HALTED;
 	}
 
diff --git a/src/target/target.c b/src/target/target.c
index 5858aa573..89eaa23d8 100644
--- a/src/target/target.c
+++ b/src/target/target.c
@@ -1325,7 +1325,7 @@ int target_add_breakpoint(struct target *target,
 		struct breakpoint *breakpoint)
 {
 	if ((target->state != TARGET_HALTED) && (breakpoint->type != BKPT_HARD)) {
-		LOG_WARNING("target %s is not halted (add breakpoint)", target_name(target));
+		LOG_TARGET_ERROR(target, "not halted (add breakpoint)");
 		return ERROR_TARGET_NOT_HALTED;
 	}
 	return target->type->add_breakpoint(target, breakpoint);
@@ -1335,7 +1335,7 @@ int target_add_context_breakpoint(struct target *target,
 		struct breakpoint *breakpoint)
 {
 	if (target->state != TARGET_HALTED) {
-		LOG_WARNING("target %s is not halted (add context breakpoint)", target_name(target));
+		LOG_TARGET_ERROR(target, "not halted (add context breakpoint)");
 		return ERROR_TARGET_NOT_HALTED;
 	}
 	return target->type->add_context_breakpoint(target, breakpoint);
@@ -1345,7 +1345,7 @@ int target_add_hybrid_breakpoint(struct target *target,
 		struct breakpoint *breakpoint)
 {
 	if (target->state != TARGET_HALTED) {
-		LOG_WARNING("target %s is not halted (add hybrid breakpoint)", target_name(target));
+		LOG_TARGET_ERROR(target, "not halted (add hybrid breakpoint)");
 		return ERROR_TARGET_NOT_HALTED;
 	}
 	return target->type->add_hybrid_breakpoint(target, breakpoint);
@@ -1361,7 +1361,7 @@ int target_add_watchpoint(struct target *target,
 		struct watchpoint *watchpoint)
 {
 	if (target->state != TARGET_HALTED) {
-		LOG_WARNING("target %s is not halted (add watchpoint)", target_name(target));
+		LOG_TARGET_ERROR(target, "not halted (add watchpoint)");
 		return ERROR_TARGET_NOT_HALTED;
 	}
 	return target->type->add_watchpoint(target, watchpoint);
@@ -1375,7 +1375,7 @@ int target_hit_watchpoint(struct target *target,
 		struct watchpoint **hit_watchpoint)
 {
 	if (target->state != TARGET_HALTED) {
-		LOG_WARNING("target %s is not halted (hit watchpoint)", target->cmd_name);
+		LOG_TARGET_ERROR(target, "not halted (hit watchpoint)");
 		return ERROR_TARGET_NOT_HALTED;
 	}
 
@@ -1457,7 +1457,7 @@ int target_step(struct target *target,
 int target_get_gdb_fileio_info(struct target *target, struct gdb_fileio_info *fileio_info)
 {
 	if (target->state != TARGET_HALTED) {
-		LOG_WARNING("target %s is not halted (gdb fileio)", target->cmd_name);
+		LOG_TARGET_ERROR(target, "not halted (gdb fileio)");
 		return ERROR_TARGET_NOT_HALTED;
 	}
 	return target->type->get_gdb_fileio_info(target, fileio_info);
@@ -1466,7 +1466,7 @@ int target_get_gdb_fileio_info(struct target *target, struct gdb_fileio_info *fi
 int target_gdb_fileio_end(struct target *target, int retcode, int fileio_errno, bool ctrl_c)
 {
 	if (target->state != TARGET_HALTED) {
-		LOG_WARNING("target %s is not halted (gdb fileio end)", target->cmd_name);
+		LOG_TARGET_ERROR(target, "not halted (gdb fileio end)");
 		return ERROR_TARGET_NOT_HALTED;
 	}
 	return target->type->gdb_fileio_end(target, retcode, fileio_errno, ctrl_c);
@@ -6666,8 +6666,8 @@ COMMAND_HANDLER(handle_ps_command)
 	struct target *target = get_current_target(CMD_CTX);
 	char *display;
 	if (target->state != TARGET_HALTED) {
-		LOG_INFO("target not halted !!");
-		return ERROR_OK;
+		command_print(CMD, "Error: [%s] not halted", target_name(target));
+		return ERROR_TARGET_NOT_HALTED;
 	}
 
 	if ((target->rtos) && (target->rtos->type)
@@ -6698,8 +6698,8 @@ COMMAND_HANDLER(handle_test_mem_access_command)
 	int retval = ERROR_OK;
 
 	if (target->state != TARGET_HALTED) {
-		LOG_INFO("target not halted !!");
-		return ERROR_FAIL;
+		command_print(CMD, "Error: [%s] not halted", target_name(target));
+		return ERROR_TARGET_NOT_HALTED;
 	}
 
 	if (CMD_ARGC != 1)
diff --git a/src/target/xscale.c b/src/target/xscale.c
index 066ff8c91..03aa5166b 100644
--- a/src/target/xscale.c
+++ b/src/target/xscale.c
@@ -1118,7 +1118,7 @@ static int xscale_resume(struct target *target, int current,
 	LOG_DEBUG("-");
 
 	if (target->state != TARGET_HALTED) {
-		LOG_WARNING("target not halted");
+		LOG_TARGET_ERROR(target, "not halted");
 		return ERROR_TARGET_NOT_HALTED;
 	}
 
@@ -1382,7 +1382,7 @@ static int xscale_step(struct target *target, int current,
 	int retval;
 
 	if (target->state != TARGET_HALTED) {
-		LOG_WARNING("target not halted");
+		LOG_TARGET_ERROR(target, "not halted");
 		return ERROR_TARGET_NOT_HALTED;
 	}
 
@@ -1632,7 +1632,7 @@ static int xscale_full_context(struct target *target)
 	LOG_DEBUG("-");
 
 	if (target->state != TARGET_HALTED) {
-		LOG_WARNING("target not halted");
+		LOG_TARGET_ERROR(target, "not halted");
 		return ERROR_TARGET_NOT_HALTED;
 	}
 
@@ -1705,7 +1705,7 @@ static int xscale_restore_banked(struct target *target)
 	int i, j;
 
 	if (target->state != TARGET_HALTED) {
-		LOG_WARNING("target not halted");
+		LOG_TARGET_ERROR(target, "not halted");
 		return ERROR_TARGET_NOT_HALTED;
 	}
 
@@ -1781,7 +1781,7 @@ static int xscale_read_memory(struct target *target, target_addr_t address,
 		count);
 
 	if (target->state != TARGET_HALTED) {
-		LOG_WARNING("target not halted");
+		LOG_TARGET_ERROR(target, "not halted");
 		return ERROR_TARGET_NOT_HALTED;
 	}
 
@@ -1880,7 +1880,7 @@ static int xscale_write_memory(struct target *target, target_addr_t address,
 		count);
 
 	if (target->state != TARGET_HALTED) {
-		LOG_WARNING("target not halted");
+		LOG_TARGET_ERROR(target, "not halted");
 		return ERROR_TARGET_NOT_HALTED;
 	}
 
@@ -2073,7 +2073,7 @@ static int xscale_set_breakpoint(struct target *target,
 	struct xscale_common *xscale = target_to_xscale(target);
 
 	if (target->state != TARGET_HALTED) {
-		LOG_WARNING("target not halted");
+		LOG_TARGET_ERROR(target, "not halted");
 		return ERROR_TARGET_NOT_HALTED;
 	}
 
@@ -2163,7 +2163,7 @@ static int xscale_unset_breakpoint(struct target *target,
 	struct xscale_common *xscale = target_to_xscale(target);
 
 	if (target->state != TARGET_HALTED) {
-		LOG_WARNING("target not halted");
+		LOG_TARGET_ERROR(target, "not halted");
 		return ERROR_TARGET_NOT_HALTED;
 	}
 
@@ -2210,7 +2210,7 @@ static int xscale_remove_breakpoint(struct target *target, struct breakpoint *br
 	struct xscale_common *xscale = target_to_xscale(target);
 
 	if (target->state != TARGET_HALTED) {
-		LOG_ERROR("target not halted");
+		LOG_TARGET_ERROR(target, "not halted");
 		return ERROR_TARGET_NOT_HALTED;
 	}
 
@@ -2232,7 +2232,7 @@ static int xscale_set_watchpoint(struct target *target,
 	uint32_t dbcon_value = buf_get_u32(dbcon->value, 0, 32);
 
 	if (target->state != TARGET_HALTED) {
-		LOG_ERROR("target not halted");
+		LOG_TARGET_ERROR(target, "not halted");
 		return ERROR_TARGET_NOT_HALTED;
 	}
 
@@ -2336,7 +2336,7 @@ static int xscale_unset_watchpoint(struct target *target,
 	uint32_t dbcon_value = buf_get_u32(dbcon->value, 0, 32);
 
 	if (target->state != TARGET_HALTED) {
-		LOG_WARNING("target not halted");
+		LOG_TARGET_ERROR(target, "not halted");
 		return ERROR_TARGET_NOT_HALTED;
 	}
 
@@ -2369,7 +2369,7 @@ static int xscale_remove_watchpoint(struct target *target, struct watchpoint *wa
 	struct xscale_common *xscale = target_to_xscale(target);
 
 	if (target->state != TARGET_HALTED) {
-		LOG_ERROR("target not halted");
+		LOG_TARGET_ERROR(target, "not halted");
 		return ERROR_TARGET_NOT_HALTED;
 	}
 
@@ -2490,7 +2490,7 @@ static int xscale_read_trace(struct target *target)
 	unsigned int num_checkpoints = 0;
 
 	if (target->state != TARGET_HALTED) {
-		LOG_WARNING("target must be stopped to read trace data");
+		LOG_TARGET_ERROR(target, "must be stopped to read trace data");
 		return ERROR_TARGET_NOT_HALTED;
 	}
 
@@ -3131,8 +3131,8 @@ static int xscale_mmu(struct target *target, int *enabled)
 	struct xscale_common *xscale = target_to_xscale(target);
 
 	if (target->state != TARGET_HALTED) {
-		LOG_ERROR("Target not halted");
-		return ERROR_TARGET_INVALID;
+		LOG_TARGET_ERROR(target, "not halted");
+		return ERROR_TARGET_NOT_HALTED;
 	}
 	*enabled = xscale->armv4_5_mmu.mmu_enabled;
 	return ERROR_OK;
@@ -3149,8 +3149,8 @@ COMMAND_HANDLER(xscale_handle_mmu_command)
 		return retval;
 
 	if (target->state != TARGET_HALTED) {
-		command_print(CMD, "target must be stopped for \"%s\" command", CMD_NAME);
-		return ERROR_OK;
+		command_print(CMD, "Error: target must be stopped for \"%s\" command", CMD_NAME);
+		return ERROR_TARGET_NOT_HALTED;
 	}
 
 	if (CMD_ARGC >= 1) {
@@ -3179,8 +3179,8 @@ COMMAND_HANDLER(xscale_handle_idcache_command)
 		return retval;
 
 	if (target->state != TARGET_HALTED) {
-		command_print(CMD, "target must be stopped for \"%s\" command", CMD_NAME);
-		return ERROR_OK;
+		command_print(CMD, "Error: target must be stopped for \"%s\" command", CMD_NAME);
+		return ERROR_TARGET_NOT_HALTED;
 	}
 
 	bool icache = false;
@@ -3347,8 +3347,8 @@ COMMAND_HANDLER(xscale_handle_trace_buffer_command)
 		return retval;
 
 	if (target->state != TARGET_HALTED) {
-		command_print(CMD, "target must be stopped for \"%s\" command", CMD_NAME);
-		return ERROR_OK;
+		command_print(CMD, "Error: target must be stopped for \"%s\" command", CMD_NAME);
+		return ERROR_TARGET_NOT_HALTED;
 	}
 
 	if (CMD_ARGC >= 1) {
@@ -3451,8 +3451,8 @@ COMMAND_HANDLER(xscale_handle_dump_trace_command)
 		return retval;
 
 	if (target->state != TARGET_HALTED) {
-		command_print(CMD, "target must be stopped for \"%s\" command", CMD_NAME);
-		return ERROR_OK;
+		command_print(CMD, "Error: target must be stopped for \"%s\" command", CMD_NAME);
+		return ERROR_TARGET_NOT_HALTED;
 	}
 
 	if (CMD_ARGC < 1)
@@ -3514,8 +3514,8 @@ COMMAND_HANDLER(xscale_handle_cp15)
 		return retval;
 
 	if (target->state != TARGET_HALTED) {
-		command_print(CMD, "target must be stopped for \"%s\" command", CMD_NAME);
-		return ERROR_OK;
+		command_print(CMD, "Error: target must be stopped for \"%s\" command", CMD_NAME);
+		return ERROR_TARGET_NOT_HALTED;
 	}
 	uint32_t reg_no = 0;
 	struct reg *reg = NULL;
diff --git a/src/target/xtensa/xtensa.c b/src/target/xtensa/xtensa.c
index 431c36a24..431be894b 100644
--- a/src/target/xtensa/xtensa.c
+++ b/src/target/xtensa/xtensa.c
@@ -1541,7 +1541,7 @@ int xtensa_prepare_resume(struct target *target,
 		debug_execution);
 
 	if (target->state != TARGET_HALTED) {
-		LOG_TARGET_WARNING(target, "target not halted");
+		LOG_TARGET_ERROR(target, "not halted");
 		return ERROR_TARGET_NOT_HALTED;
 	}
 	xtensa->halt_request = false;
@@ -1667,7 +1667,7 @@ int xtensa_do_step(struct target *target, int current, target_addr_t address, in
 		current, address, handle_breakpoints);
 
 	if (target->state != TARGET_HALTED) {
-		LOG_TARGET_WARNING(target, "target not halted");
+		LOG_TARGET_ERROR(target, "not halted");
 		return ERROR_TARGET_NOT_HALTED;
 	}
 
@@ -1941,7 +1941,7 @@ int xtensa_read_memory(struct target *target, target_addr_t address, uint32_t si
 	bool bswap = xtensa->target->endianness == TARGET_BIG_ENDIAN;
 
 	if (target->state != TARGET_HALTED) {
-		LOG_TARGET_WARNING(target, "target not halted");
+		LOG_TARGET_ERROR(target, "not halted");
 		return ERROR_TARGET_NOT_HALTED;
 	}
 
@@ -2037,7 +2037,7 @@ int xtensa_write_memory(struct target *target,
 	bool fill_head_tail = false;
 
 	if (target->state != TARGET_HALTED) {
-		LOG_TARGET_WARNING(target, "target not halted");
+		LOG_TARGET_ERROR(target, "not halted");
 		return ERROR_TARGET_NOT_HALTED;
 	}
 
@@ -2566,7 +2566,7 @@ int xtensa_watchpoint_add(struct target *target, struct watchpoint *watchpoint)
 	xtensa_reg_val_t dbreakcval;
 
 	if (target->state != TARGET_HALTED) {
-		LOG_TARGET_WARNING(target, "target not halted");
+		LOG_TARGET_ERROR(target, "not halted");
 		return ERROR_TARGET_NOT_HALTED;
 	}
 

-----------------------------------------------------------------------

Summary of changes:
 src/target/aarch64.c       | 18 ++++++++++-------
 src/target/arc.c           | 12 +++++------
 src/target/arc_mem.c       |  2 +-
 src/target/arm11.c         |  8 ++++----
 src/target/arm720t.c       |  4 ++--
 src/target/arm7_9_common.c | 20 +++++++++----------
 src/target/arm920t.c       |  8 ++++----
 src/target/arm926ejs.c     |  4 ++--
 src/target/arm946e.c       |  4 ++--
 src/target/arm966e.c       |  4 ++--
 src/target/armv4_5.c       | 16 ++++++++-------
 src/target/armv4_5_mmu.c   |  8 ++++++--
 src/target/armv7a_cache.c  |  4 ++--
 src/target/armv7m.c        |  2 +-
 src/target/armv8.c         |  2 +-
 src/target/avr32_ap7k.c    |  6 +++---
 src/target/cortex_a.c      | 10 +++++-----
 src/target/cortex_m.c      | 10 +++++-----
 src/target/dsp563xx.c      |  6 +++---
 src/target/esirisc.c       |  8 ++++++--
 src/target/hla_target.c    |  4 ++--
 src/target/mips32.c        |  6 +++---
 src/target/mips_mips64.c   | 12 +++++------
 src/target/openrisc/or1k.c |  6 +++---
 src/target/riscv/riscv.c   |  2 +-
 src/target/stm8.c          |  8 ++++----
 src/target/target.c        | 22 ++++++++++----------
 src/target/xscale.c        | 50 +++++++++++++++++++++++-----------------------
 src/target/xtensa/xtensa.c | 10 +++++-----
 29 files changed, 145 insertions(+), 131 deletions(-)


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[OpenOCD-commit] Main OpenOCD repository branch, master, updated. v0.12.0-274-g7023deb06

[openocd-gerrit <ope...@us...>]

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The branch, master has been updated
       via  7023deb06a8cac77fe50d341c9e34b80d4fc68fd (commit)
      from  218f6c0181633057a892a8724c506b10b9f6afaa (commit)

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- Log -----------------------------------------------------------------
commit 7023deb06a8cac77fe50d341c9e34b80d4fc68fd
Author: Tim Newsome <ti...@si...>
Date:   Thu Jul 13 09:38:44 2023 -0700

    jtag/drivers/xds110: Fix compiler warning.
    
    Compiler would complain that `written` was used without being
    initialized.
    
    Simplify the code a little. The number of bytes written is already
    checked in usb_write().
    
    Signed-off-by: Tim Newsome <ti...@si...>
    Change-Id: Ibada85dcccfca6f1269c584cdbc4f2e3b93bb8f3
    Reviewed-on: https://review.openocd.org/c/openocd/+/7813
    Tested-by: jenkins
    Reviewed-by: Tomas Vanek <va...@fb...>
    Reviewed-by: Antonio Borneo <bor...@gm...>
    Reviewed-by: Jan Matyas <jan...@co...>

diff --git a/src/jtag/drivers/xds110.c b/src/jtag/drivers/xds110.c
index 371dc8803..717295c73 100644
--- a/src/jtag/drivers/xds110.c
+++ b/src/jtag/drivers/xds110.c
@@ -579,9 +579,6 @@ static bool usb_get_response(uint32_t *total_bytes_read, uint32_t timeout)
 
 static bool usb_send_command(uint16_t size)
 {
-	int written;
-	bool success = true;
-
 	/* Check the packet length */
 	if (size > USB_PAYLOAD_SIZE)
 		return false;
@@ -596,13 +593,7 @@ static bool usb_send_command(uint16_t size)
 	size += 3;
 
 	/* Send the data via the USB connection */
-	success = usb_write(xds110.write_packet, (int)size, &written);
-
-	/* Check if the correct number of bytes was written */
-	if (written != (int)size)
-		success = false;
-
-	return success;
+	return usb_write(xds110.write_packet, (int)size, NULL);
 }
 
 /***************************************************************************

-----------------------------------------------------------------------

Summary of changes:
 src/jtag/drivers/xds110.c | 11 +----------
 1 file changed, 1 insertion(+), 10 deletions(-)


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