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From: openocd-gerrit <ope...@us...> - 2023-07-22 20:16:40
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".
The branch, master has been updated
via 218f6c0181633057a892a8724c506b10b9f6afaa (commit)
from d57b2448eea7fac0d5ccf8b047adf0a57a557cb5 (commit)
Those revisions listed above that are new to this repository have
not appeared on any other notification email; so we list those
revisions in full, below.
- Log -----------------------------------------------------------------
commit 218f6c0181633057a892a8724c506b10b9f6afaa
Author: eolson <eri...@se...>
Date: Thu Jun 22 13:02:21 2023 -0500
target/riscv: Add null pointer check before right shift for bscan tunneling.
Change-Id: I5d4764c777f33d48705b3e5273eb840c13cfbfb7
Signed-off-by: eolson <eri...@se...>
Reviewed-on: https://review.openocd.org/c/openocd/+/7814
Reviewed-by: Antonio Borneo <bor...@gm...>
Tested-by: jenkins
Reviewed-by: Jan Matyas <jan...@co...>
diff --git a/src/target/riscv/batch.c b/src/target/riscv/batch.c
index 8ec043efb..d39967e4d 100644
--- a/src/target/riscv/batch.c
+++ b/src/target/riscv/batch.c
@@ -115,8 +115,10 @@ int riscv_batch_run(struct riscv_batch *batch)
if (bscan_tunnel_ir_width != 0) {
/* need to right-shift "in" by one bit, because of clock skew between BSCAN TAP and DM TAP */
- for (size_t i = 0; i < batch->used_scans; ++i)
- buffer_shr((batch->fields + i)->in_value, DMI_SCAN_BUF_SIZE, 1);
+ for (size_t i = 0; i < batch->used_scans; ++i) {
+ if ((batch->fields + i)->in_value)
+ buffer_shr((batch->fields + i)->in_value, DMI_SCAN_BUF_SIZE, 1);
+ }
}
for (size_t i = 0; i < batch->used_scans; ++i)
-----------------------------------------------------------------------
Summary of changes:
src/target/riscv/batch.c | 6 ++++--
1 file changed, 4 insertions(+), 2 deletions(-)
hooks/post-receive
--
Main OpenOCD repository
|
|
From: openocd-gerrit <ope...@us...> - 2023-07-22 20:13:03
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".
The branch, master has been updated
via d57b2448eea7fac0d5ccf8b047adf0a57a557cb5 (commit)
from 2c57d11c78108c6547f31ca07f1ff672fa855f10 (commit)
Those revisions listed above that are new to this repository have
not appeared on any other notification email; so we list those
revisions in full, below.
- Log -----------------------------------------------------------------
commit d57b2448eea7fac0d5ccf8b047adf0a57a557cb5
Author: Artemiy Volkov <ar...@sy...>
Date: Wed Jul 5 15:43:08 2023 +0200
target/arc: fix off-by-one error in arc_save_context()
While not affecting the function's main purpose, an error has
crept into arc_save_context() that results in logging wrong register
values when the debug level is 3 or more. For instance, when debugging a
trivial program and halting at entry to main, the following values are
printed to the log:
Debug: 2915 2020 arc.c:894 arc_save_context(): Get core register regnum=0,
name=r0, value=0x0000000
...
Debug: 2947 2020 arc.c:894 arc_save_context(): Get core register regnum=60,
name=lp_count, value=0x900002d8
Debug: 2948 2020 arc.c:894 arc_save_context(): Get core register regnum=63,
name=pcl, value=0xffffffff
Debug: 2949 2020 arc.c:909 arc_save_context(): Get aux register regnum=64,
name=pc, value=0x900000b4
Debug: 2950 2020 arc.c:909 arc_save_context(): Get aux register regnum=65,
name=lp_start, value=0x900000bc
Debug: 2951 2020 arc.c:909 arc_save_context(): Get aux register regnum=66,
name=lp_end, value=0x00080801
Debug: 2952 2020 arc.c:909 arc_save_context(): Get aux register regnum=67,
name=status32, value=0xffffffff
After the change, the register contents make much more sense:
Debug: 2923 3934 arc.c:889 arc_save_context(): Get core register regnum=0,
name=r0, value=0x00000000
...
Debug: 2955 3934 arc.c:889 arc_save_context(): Get core register regnum=60,
name=lp_count, value=0x00000000
Debug: 2956 3934 arc.c:889 arc_save_context(): Get core register regnum=63,
name=pcl, value=0x900002d8
Debug: 2957 3934 arc.c:903 arc_save_context(): Get aux register regnum=64,
name=pc, value=0x900002da
Debug: 2958 3934 arc.c:903 arc_save_context(): Get aux register regnum=65,
name=lp_start, value=0x900000b4
Debug: 2959 3934 arc.c:903 arc_save_context(): Get aux register regnum=66,
name=lp_end, value=0x900000bc
Debug: 2960 3934 arc.c:903 arc_save_context(): Get aux register regnum=67,
name=status32, value=0x00080801
While at it, simplify a couple of expressions.
Change-Id: I8f2d79404707fbac4503af45b393ea73f91e6beb
Signed-off-by: Artemiy Volkov <ar...@sy...>
Reviewed-on: https://review.openocd.org/c/openocd/+/7765
Tested-by: jenkins
Reviewed-by: Evgeniy Didin <di...@sy...>
Reviewed-by: Antonio Borneo <bor...@gm...>
diff --git a/src/target/arc.c b/src/target/arc.c
index 9ae3ae610..a8de6f36b 100644
--- a/src/target/arc.c
+++ b/src/target/arc.c
@@ -846,21 +846,17 @@ static int arc_save_context(struct target *target)
memset(aux_addrs, 0xff, aux_regs_size);
for (i = 0; i < MIN(arc->num_core_regs, regs_to_scan); i++) {
- struct reg *reg = &(reg_list[i]);
+ struct reg *reg = reg_list + i;
struct arc_reg_desc *arc_reg = reg->arch_info;
- if (!reg->valid && reg->exist) {
- core_addrs[core_cnt] = arc_reg->arch_num;
- core_cnt += 1;
- }
+ if (!reg->valid && reg->exist)
+ core_addrs[core_cnt++] = arc_reg->arch_num;
}
for (i = arc->num_core_regs; i < regs_to_scan; i++) {
- struct reg *reg = &(reg_list[i]);
+ struct reg *reg = reg_list + i;
struct arc_reg_desc *arc_reg = reg->arch_info;
- if (!reg->valid && reg->exist) {
- aux_addrs[aux_cnt] = arc_reg->arch_num;
- aux_cnt += 1;
- }
+ if (!reg->valid && reg->exist)
+ aux_addrs[aux_cnt++] = arc_reg->arch_num;
}
/* Read data from target. */
@@ -884,30 +880,30 @@ static int arc_save_context(struct target *target)
/* Parse core regs */
core_cnt = 0;
for (i = 0; i < MIN(arc->num_core_regs, regs_to_scan); i++) {
- struct reg *reg = &(reg_list[i]);
+ struct reg *reg = reg_list + i;
struct arc_reg_desc *arc_reg = reg->arch_info;
if (!reg->valid && reg->exist) {
target_buffer_set_u32(target, reg->value, core_values[core_cnt]);
- core_cnt += 1;
reg->valid = true;
reg->dirty = false;
LOG_DEBUG("Get core register regnum=%u, name=%s, value=0x%08" PRIx32,
i, arc_reg->name, core_values[core_cnt]);
+ core_cnt++;
}
}
/* Parse aux regs */
aux_cnt = 0;
for (i = arc->num_core_regs; i < regs_to_scan; i++) {
- struct reg *reg = &(reg_list[i]);
+ struct reg *reg = reg_list + i;
struct arc_reg_desc *arc_reg = reg->arch_info;
if (!reg->valid && reg->exist) {
target_buffer_set_u32(target, reg->value, aux_values[aux_cnt]);
- aux_cnt += 1;
reg->valid = true;
reg->dirty = false;
LOG_DEBUG("Get aux register regnum=%u, name=%s, value=0x%08" PRIx32,
i, arc_reg->name, aux_values[aux_cnt]);
+ aux_cnt++;
}
}
-----------------------------------------------------------------------
Summary of changes:
src/target/arc.c | 24 ++++++++++--------------
1 file changed, 10 insertions(+), 14 deletions(-)
hooks/post-receive
--
Main OpenOCD repository
|
|
From: openocd-gerrit <ope...@us...> - 2023-07-14 16:52:03
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".
The branch, master has been updated
via 2c57d11c78108c6547f31ca07f1ff672fa855f10 (commit)
from 1107af09f1179241224ff0045441caaeeec70b13 (commit)
Those revisions listed above that are new to this repository have
not appeared on any other notification email; so we list those
revisions in full, below.
- Log -----------------------------------------------------------------
commit 2c57d11c78108c6547f31ca07f1ff672fa855f10
Author: Erhan Kurubas <erh...@es...>
Date: Sun Jun 18 13:05:35 2023 +0200
tcl/board: add esp32s3-builtin.cfg file
Board config file for ESP32-S3, to allow communication with
the builtin USB-JTAG adapter.
Signed-off-by: Erhan Kurubas <erh...@es...>
Change-Id: I1310f5db30f7df38fe9344f7ba2334611b53863e
Reviewed-on: https://review.openocd.org/c/openocd/+/7749
Reviewed-by: Antonio Borneo <bor...@gm...>
Tested-by: jenkins
diff --git a/tcl/board/esp32s3-builtin.cfg b/tcl/board/esp32s3-builtin.cfg
new file mode 100644
index 000000000..353099c98
--- /dev/null
+++ b/tcl/board/esp32s3-builtin.cfg
@@ -0,0 +1,15 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+#
+# Example OpenOCD configuration file for ESP32-S3 connected via builtin USB-JTAG adapter.
+#
+# For example, OpenOCD can be started for ESP32-S3 debugging on
+#
+# openocd -f board/esp32s3-builtin.cfg
+#
+
+# Source the JTAG interface configuration file
+source [find interface/esp_usb_jtag.cfg]
+# Source the ESP32-S3 configuration file
+source [find target/esp32s3.cfg]
+
+adapter speed 40000
-----------------------------------------------------------------------
Summary of changes:
tcl/board/{esp32s3-bridge.cfg => esp32s3-builtin.cfg} | 10 +++++-----
1 file changed, 5 insertions(+), 5 deletions(-)
copy tcl/board/{esp32s3-bridge.cfg => esp32s3-builtin.cfg} (62%)
hooks/post-receive
--
Main OpenOCD repository
|
|
From: openocd-gerrit <ope...@us...> - 2023-07-14 16:51:56
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".
The branch, master has been updated
via 1107af09f1179241224ff0045441caaeeec70b13 (commit)
from 698adc0c62edf12a5dad25a672e46e9a2e442be3 (commit)
Those revisions listed above that are new to this repository have
not appeared on any other notification email; so we list those
revisions in full, below.
- Log -----------------------------------------------------------------
commit 1107af09f1179241224ff0045441caaeeec70b13
Author: Erhan Kurubas <erh...@es...>
Date: Sun Jun 18 12:59:19 2023 +0200
tcl/interface: add Espressif builtin usb_jtag config file.
This config file enables communication over USB-JTAG with
ESP32-C3, ESP32-S3, ESP32-H2 and ESP32-C6 chips
Signed-off-by: Erhan Kurubas <erh...@es...>
Change-Id: Iceea26972588d8c4919d1f3248684ece48ca9121
Reviewed-on: https://review.openocd.org/c/openocd/+/7748
Tested-by: jenkins
Reviewed-by: Antonio Borneo <bor...@gm...>
diff --git a/tcl/interface/esp_usb_jtag.cfg b/tcl/interface/esp_usb_jtag.cfg
new file mode 100644
index 000000000..40427d0e3
--- /dev/null
+++ b/tcl/interface/esp_usb_jtag.cfg
@@ -0,0 +1,9 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+#
+# Espressif builtin USB-JTAG adapter
+#
+
+adapter driver esp_usb_jtag
+
+espusbjtag vid_pid 0x303a 0x1001
+espusbjtag caps_descriptor 0x2000
-----------------------------------------------------------------------
Summary of changes:
tcl/interface/esp_usb_jtag.cfg | 9 +++++++++
1 file changed, 9 insertions(+)
create mode 100644 tcl/interface/esp_usb_jtag.cfg
hooks/post-receive
--
Main OpenOCD repository
|
|
From: openocd-gerrit <ope...@us...> - 2023-07-14 16:50:47
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".
The branch, master has been updated
via 698adc0c62edf12a5dad25a672e46e9a2e442be3 (commit)
from 9fd754ca4da4111c84385d9b080fb839eac9bc30 (commit)
Those revisions listed above that are new to this repository have
not appeared on any other notification email; so we list those
revisions in full, below.
- Log -----------------------------------------------------------------
commit 698adc0c62edf12a5dad25a672e46e9a2e442be3
Author: Erhan Kurubas <erh...@es...>
Date: Tue Jul 4 23:22:22 2023 +0200
target/espressif: cleanup unused macro definitions
Memory region addresses are not in use for now.
Signed-off-by: Erhan Kurubas <erh...@es...>
Change-Id: I9a2189e956ae59b56245ec914ab16719df857b2d
Reviewed-on: https://review.openocd.org/c/openocd/+/7762
Tested-by: jenkins
Reviewed-by: Antonio Borneo <bor...@gm...>
diff --git a/src/target/espressif/esp32.c b/src/target/espressif/esp32.c
index 5cc236c36..b510f287c 100644
--- a/src/target/espressif/esp32.c
+++ b/src/target/espressif/esp32.c
@@ -24,20 +24,8 @@ implementation.
*/
/* ESP32 memory map */
-#define ESP32_DRAM_LOW 0x3ffae000
-#define ESP32_DRAM_HIGH 0x40000000
-#define ESP32_IROM_MASK_LOW 0x40000000
-#define ESP32_IROM_MASK_HIGH 0x40064f00
-#define ESP32_IRAM_LOW 0x40070000
-#define ESP32_IRAM_HIGH 0x400a0000
-#define ESP32_RTC_IRAM_LOW 0x400c0000
-#define ESP32_RTC_IRAM_HIGH 0x400c2000
-#define ESP32_RTC_DRAM_LOW 0x3ff80000
-#define ESP32_RTC_DRAM_HIGH 0x3ff82000
#define ESP32_RTC_DATA_LOW 0x50000000
#define ESP32_RTC_DATA_HIGH 0x50002000
-#define ESP32_EXTRAM_DATA_LOW 0x3f800000
-#define ESP32_EXTRAM_DATA_HIGH 0x3fc00000
#define ESP32_DR_REG_LOW 0x3ff00000
#define ESP32_DR_REG_HIGH 0x3ff71000
#define ESP32_SYS_RAM_LOW 0x60000000UL
diff --git a/src/target/espressif/esp32s2.c b/src/target/espressif/esp32s2.c
index 3628cc093..dadc130c1 100644
--- a/src/target/espressif/esp32s2.c
+++ b/src/target/espressif/esp32s2.c
@@ -17,33 +17,12 @@
#include "esp_xtensa.h"
#include "esp_xtensa_semihosting.h"
-/* Overall memory map
- * TODO: read memory configuration from target registers */
-#define ESP32_S2_IROM_MASK_LOW 0x40000000
-#define ESP32_S2_IROM_MASK_HIGH 0x40020000
-#define ESP32_S2_IRAM_LOW 0x40020000
-#define ESP32_S2_IRAM_HIGH 0x40070000
-#define ESP32_S2_DRAM_LOW 0x3ffb0000
-#define ESP32_S2_DRAM_HIGH 0x40000000
-#define ESP32_S2_RTC_IRAM_LOW 0x40070000
-#define ESP32_S2_RTC_IRAM_HIGH 0x40072000
-#define ESP32_S2_RTC_DRAM_LOW 0x3ff9e000
-#define ESP32_S2_RTC_DRAM_HIGH 0x3ffa0000
#define ESP32_S2_RTC_DATA_LOW 0x50000000
#define ESP32_S2_RTC_DATA_HIGH 0x50002000
-#define ESP32_S2_EXTRAM_DATA_LOW 0x3f500000
-#define ESP32_S2_EXTRAM_DATA_HIGH 0x3ff80000
#define ESP32_S2_DR_REG_LOW 0x3f400000
#define ESP32_S2_DR_REG_HIGH 0x3f4d3FFC
#define ESP32_S2_SYS_RAM_LOW 0x60000000UL
#define ESP32_S2_SYS_RAM_HIGH (ESP32_S2_SYS_RAM_LOW + 0x20000000UL)
-/* ESP32-S2 DROM mapping is not contiguous. */
-/* IDF declares this as 0x3F000000..0x3FF80000, but there are peripheral registers mapped to
- * 0x3f400000..0x3f4d3FFC. */
-#define ESP32_S2_DROM0_LOW ESP32_S2_DROM_LOW
-#define ESP32_S2_DROM0_HIGH ESP32_S2_DR_REG_LOW
-#define ESP32_S2_DROM1_LOW ESP32_S2_DR_REG_HIGH
-#define ESP32_S2_DROM1_HIGH ESP32_S2_DROM_HIGH
/* ESP32 WDT */
#define ESP32_S2_WDT_WKEY_VALUE 0x50d83aa1
diff --git a/src/target/espressif/esp32s3.c b/src/target/espressif/esp32s3.c
index 074155f6a..5036956ee 100644
--- a/src/target/espressif/esp32s3.c
+++ b/src/target/espressif/esp32s3.c
@@ -24,16 +24,6 @@ implementation.
*/
/* ESP32_S3 memory map */
-#define ESP32_S3_IRAM_LOW 0x40370000
-#define ESP32_S3_IRAM_HIGH 0x403E0000
-#define ESP32_S3_IROM_MASK_LOW 0x40000000
-#define ESP32_S3_IROM_MASK_HIGH 0x40060000
-#define ESP32_S3_DRAM_LOW 0x3FC88000
-#define ESP32_S3_DRAM_HIGH 0x3FD00000
-#define ESP32_S3_RTC_IRAM_LOW 0x600FE000
-#define ESP32_S3_RTC_IRAM_HIGH 0x60100000
-#define ESP32_S3_RTC_DRAM_LOW 0x600FE000
-#define ESP32_S3_RTC_DRAM_HIGH 0x60100000
#define ESP32_S3_RTC_DATA_LOW 0x50000000
#define ESP32_S3_RTC_DATA_HIGH 0x50002000
#define ESP32_S3_EXTRAM_DATA_LOW 0x3D000000
-----------------------------------------------------------------------
Summary of changes:
src/target/espressif/esp32.c | 12 ------------
src/target/espressif/esp32s2.c | 21 ---------------------
src/target/espressif/esp32s3.c | 10 ----------
3 files changed, 43 deletions(-)
hooks/post-receive
--
Main OpenOCD repository
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From: openocd-gerrit <ope...@us...> - 2023-07-14 16:48:14
|
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- Log -----------------------------------------------------------------
commit 9fd754ca4da4111c84385d9b080fb839eac9bc30
Author: Erhan Kurubas <erh...@es...>
Date: Mon Jul 3 23:16:52 2023 +0200
target/espressif: read entry addresses of pre-defined stub functions
Debug stubs functionality provided by ESP IDF allows executing
target function in any address. e.g; esp32_cmd_gcov()
Signed-off-by: Erhan Kurubas <erh...@es...>
Change-Id: I56d844e5a862c9bf33fdb991b01abb7a76047ca7
Reviewed-on: https://review.openocd.org/c/openocd/+/7758
Tested-by: jenkins
Reviewed-by: Antonio Borneo <bor...@gm...>
diff --git a/src/target/espressif/Makefile.am b/src/target/espressif/Makefile.am
index 14625d4b3..776818ff4 100644
--- a/src/target/espressif/Makefile.am
+++ b/src/target/espressif/Makefile.am
@@ -2,21 +2,23 @@
noinst_LTLIBRARIES += %D%/libespressif.la
%C%_libespressif_la_SOURCES = \
- %D%/esp_xtensa.c \
- %D%/esp_xtensa.h \
- %D%/esp_xtensa_smp.c \
- %D%/esp_xtensa_smp.h \
- %D%/esp_xtensa_semihosting.c \
- %D%/esp_xtensa_semihosting.h \
- %D%/esp_xtensa_apptrace.c \
- %D%/esp_xtensa_apptrace.h \
- %D%/esp32_apptrace.c \
- %D%/esp32_apptrace.h \
- %D%/esp32.c \
- %D%/esp32s2.c \
- %D%/esp32s3.c \
- %D%/esp32_sysview.c \
- %D%/esp32_sysview.h \
- %D%/segger_sysview.h \
- %D%/esp_semihosting.c \
- %D%/esp_semihosting.h
+ %D%/esp_xtensa.c \
+ %D%/esp_xtensa.h \
+ %D%/esp_xtensa_smp.c \
+ %D%/esp_xtensa_smp.h \
+ %D%/esp_xtensa_semihosting.c \
+ %D%/esp_xtensa_semihosting.h \
+ %D%/esp_xtensa_apptrace.c \
+ %D%/esp_xtensa_apptrace.h \
+ %D%/esp32_apptrace.c \
+ %D%/esp32_apptrace.h \
+ %D%/esp32.c \
+ %D%/esp32s2.c \
+ %D%/esp32s3.c \
+ %D%/esp.c \
+ %D%/esp.h \
+ %D%/esp32_sysview.c \
+ %D%/esp32_sysview.h \
+ %D%/segger_sysview.h \
+ %D%/esp_semihosting.c \
+ %D%/esp_semihosting.h
diff --git a/src/target/espressif/esp.c b/src/target/espressif/esp.c
new file mode 100644
index 000000000..9583d6493
--- /dev/null
+++ b/src/target/espressif/esp.c
@@ -0,0 +1,77 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
+/***************************************************************************
+ * Espressif chips common target API for OpenOCD *
+ * Copyright (C) 2021 Espressif Systems Ltd. *
+ ***************************************************************************/
+
+#ifdef HAVE_CONFIG_H
+#include "config.h"
+#endif
+
+#include <helper/log.h>
+#include <helper/binarybuffer.h>
+#include "target/target.h"
+#include "esp.h"
+
+int esp_dbgstubs_table_read(struct target *target, struct esp_dbg_stubs *dbg_stubs)
+{
+ uint32_t table_size, table_start_id, desc_entry_id, gcov_entry_id;
+ uint32_t entries[ESP_DBG_STUB_ENTRY_MAX] = {0};
+ uint8_t entry_buff[sizeof(entries)] = {0}; /* to avoid endiannes issues */
+
+ LOG_TARGET_DEBUG(target, "Read debug stubs info %" PRIx32 " / %d", dbg_stubs->base, dbg_stubs->entries_count);
+
+ /* First of, read 2 entries to get magic num and table size */
+ int res = target_read_buffer(target, dbg_stubs->base, sizeof(uint32_t) * 2, entry_buff);
+ if (res != ERROR_OK) {
+ LOG_ERROR("%s: Failed to read first debug stub entry!", target_name(target));
+ return res;
+ }
+ entries[0] = target_buffer_get_u32(target, entry_buff);
+ entries[1] = target_buffer_get_u32(target, entry_buff + sizeof(uint32_t));
+
+ if (entries[0] != ESP_DBG_STUB_MAGIC_NUM_VAL) {
+ /* idf with the old table entry structure */
+ table_size = 2;
+ table_start_id = 0;
+ desc_entry_id = 0;
+ gcov_entry_id = 1;
+ } else {
+ table_size = entries[1];
+ table_start_id = ESP_DBG_STUB_TABLE_START;
+ desc_entry_id = ESP_DBG_STUB_TABLE_START;
+ gcov_entry_id = ESP_DBG_STUB_ENTRY_FIRST;
+
+ /* discard unsupported entries */
+ if (table_size > ESP_DBG_STUB_ENTRY_MAX)
+ table_size = ESP_DBG_STUB_ENTRY_MAX;
+
+ /* now read the remaining entries */
+ res = target_read_buffer(target, dbg_stubs->base + 2 * sizeof(uint32_t), sizeof(uint32_t) * table_size - 2,
+ entry_buff + sizeof(uint32_t) * 2);
+ if (res != ERROR_OK) {
+ LOG_TARGET_ERROR(target, "Failed to read debug stubs info!");
+ return res;
+ }
+ for (unsigned int i = 2; i < table_size; ++i)
+ entries[i] = target_buffer_get_u32(target, entry_buff + sizeof(uint32_t) * i);
+
+ dbg_stubs->entries[ESP_DBG_STUB_CAPABILITIES] = entries[ESP_DBG_STUB_CAPABILITIES];
+ }
+
+ dbg_stubs->entries[ESP_DBG_STUB_DESC] = entries[desc_entry_id];
+ dbg_stubs->entries[ESP_DBG_STUB_ENTRY_GCOV] = entries[gcov_entry_id];
+
+ for (enum esp_dbg_stub_id i = ESP_DBG_STUB_DESC; i < ESP_DBG_STUB_ENTRY_MAX; i++) {
+ LOG_DEBUG("Check dbg stub %d - %x", i, dbg_stubs->entries[i]);
+ if (dbg_stubs->entries[i]) {
+ LOG_DEBUG("New dbg stub %d at %x", dbg_stubs->entries_count, dbg_stubs->entries[i]);
+ dbg_stubs->entries_count++;
+ }
+ }
+ if (dbg_stubs->entries_count < table_size - table_start_id)
+ LOG_WARNING("Not full dbg stub table %d of %d", dbg_stubs->entries_count, table_size - table_start_id);
+
+ return ERROR_OK;
+}
diff --git a/src/target/espressif/esp.h b/src/target/espressif/esp.h
new file mode 100644
index 000000000..3ba2b8bcf
--- /dev/null
+++ b/src/target/espressif/esp.h
@@ -0,0 +1,85 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
+/***************************************************************************
+ * Espressif chips common target API for OpenOCD *
+ * Copyright (C) 2021 Espressif Systems Ltd. *
+ ***************************************************************************/
+
+#ifndef OPENOCD_TARGET_ESP_H
+#define OPENOCD_TARGET_ESP_H
+
+#include <stdint.h>
+#include <helper/bits.h>
+
+/* must be in sync with ESP-IDF version */
+/** Size of the pre-compiled target buffer for stub trampoline.
+ * @note Must be in sync with ESP-IDF version */
+#define ESP_DBG_STUBS_CODE_BUF_SIZE 32 /* TODO: move this info to esp_dbg_stubs_desc */
+/** Size of the pre-compiled target buffer for stack.
+ * @note Must be in sync with ESP-IDF version */
+#define ESP_DBG_STUBS_STACK_MIN_SIZE 2048/* TODO: move this info to esp_dbg_stubs_desc */
+
+/**
+ * Debug stubs table entries IDs
+ *
+ * @note Must be in sync with ESP-IDF version
+ */
+enum esp_dbg_stub_id {
+ ESP_DBG_STUB_ENTRY_MAGIC_NUM,
+ ESP_DBG_STUB_TABLE_SIZE,
+ ESP_DBG_STUB_TABLE_START,
+ ESP_DBG_STUB_DESC = ESP_DBG_STUB_TABLE_START, /*< Stubs descriptor ID */
+ ESP_DBG_STUB_ENTRY_FIRST,
+ ESP_DBG_STUB_ENTRY_GCOV = ESP_DBG_STUB_ENTRY_FIRST, /*< GCOV stub ID */
+ ESP_DBG_STUB_CAPABILITIES,
+ /* add new stub entries here */
+ ESP_DBG_STUB_ENTRY_MAX,
+};
+
+#define ESP_DBG_STUB_MAGIC_NUM_VAL 0xFEEDBEEF
+#define ESP_DBG_STUB_CAP_GCOV_THREAD BIT(0)
+
+/**
+ * Debug stubs descriptor. ID: ESP_DBG_STUB_DESC
+ *
+ * @note Must be in sync with ESP-IDF version
+ */
+struct esp_dbg_stubs_desc {
+ /** Address of pre-compiled target buffer for stub trampoline.
+ * Size of the buffer is ESP_DBG_STUBS_CODE_BUF_SIZE
+ */
+ uint32_t tramp_addr;
+ /** Pre-compiled target buffer's addr for stack. The size of the buffer is ESP_DBG_STUBS_STACK_MIN_SIZE.
+ * Target has the buffer which is used for the stack of onboard algorithms.
+ * If stack size required by algorithm exceeds ESP_DBG_STUBS_STACK_MIN_SIZE,
+ * it should be allocated using onboard function pointed by 'data_alloc' and
+ * freed by 'data_free'. They fit to the minimal stack. See below.
+ */
+ uint32_t min_stack_addr;
+ /** Address of malloc-like function to allocate buffer on target. */
+ uint32_t data_alloc;
+ /** Address of free-like function to free buffer allocated with data_alloc. */
+ uint32_t data_free;
+};
+
+/**
+ * Debug stubs info.
+ */
+struct esp_dbg_stubs {
+ /** Address. */
+ uint32_t base;
+ /** Table contents. */
+ uint32_t entries[ESP_DBG_STUB_ENTRY_MAX];
+ /** Number of table entries. */
+ uint32_t entries_count;
+ /** Debug stubs decsriptor. */
+ struct esp_dbg_stubs_desc desc;
+};
+
+struct esp_common {
+ struct esp_dbg_stubs dbg_stubs;
+};
+
+int esp_dbgstubs_table_read(struct target *target, struct esp_dbg_stubs *dbg_stubs);
+
+#endif /* OPENOCD_TARGET_ESP_H */
diff --git a/src/target/espressif/esp_xtensa.c b/src/target/espressif/esp_xtensa.c
index 3dfcc0fb2..0bd2cdd9d 100644
--- a/src/target/espressif/esp_xtensa.c
+++ b/src/target/espressif/esp_xtensa.c
@@ -17,9 +17,46 @@
#include "esp_xtensa.h"
#include "esp_semihosting.h"
+#define ESP_XTENSA_DBGSTUBS_UPDATE_DATA_ENTRY(_e_) \
+ do { \
+ uint32_t __internal_val = (_e_); \
+ if (!xtensa_data_addr_valid(target, __internal_val)) { \
+ LOG_ERROR("No valid stub data entry found (0x%" PRIx32 ")!", __internal_val); \
+ return; \
+ } \
+ } while (0)
+
+#define ESP_XTENSA_DBGSTUBS_UPDATE_CODE_ENTRY(_e_) \
+ do { \
+ uint32_t __internal_val = (_e_); \
+ if (__internal_val == 0) { \
+ LOG_ERROR("No valid stub code entry found (0x%" PRIx32 ")!", __internal_val); \
+ return; \
+ } \
+ } while (0)
+
+static void esp_xtensa_dbgstubs_info_update(struct target *target);
+static void esp_xtensa_dbgstubs_addr_check(struct target *target);
+
+static int esp_xtensa_dbgstubs_restore(struct target *target)
+{
+ struct esp_xtensa_common *esp_xtensa = target_to_esp_xtensa(target);
+
+ if (esp_xtensa->esp.dbg_stubs.base == 0)
+ return ERROR_OK;
+
+ LOG_TARGET_INFO(target, "Restore debug stubs address %" PRIx32, esp_xtensa->esp.dbg_stubs.base);
+ int res = esp_xtensa_apptrace_status_reg_write(target, esp_xtensa->esp.dbg_stubs.base);
+ if (res != ERROR_OK) {
+ LOG_ERROR("Failed to write trace status (%d)!", res);
+ return res;
+ }
+ return ERROR_OK;
+}
int esp_xtensa_on_halt(struct target *target)
{
- /* will be used in the next patches */
+ /* debug stubs can be used in HALTED state only, so it is OK to get info about them here */
+ esp_xtensa_dbgstubs_info_update(target);
return ERROR_OK;
}
@@ -45,6 +82,11 @@ void esp_xtensa_target_deinit(struct target *target)
{
LOG_DEBUG("start");
+ if (target_was_examined(target)) {
+ int ret = esp_xtensa_dbgstubs_restore(target);
+ if (ret != ERROR_OK)
+ return;
+ }
xtensa_target_deinit(target);
free(target_to_esp_xtensa(target)); /* same as free(xtensa) */
}
@@ -56,7 +98,68 @@ int esp_xtensa_arch_state(struct target *target)
int esp_xtensa_poll(struct target *target)
{
- return xtensa_poll(target);
+ struct xtensa *xtensa = target_to_xtensa(target);
+ struct esp_xtensa_common *esp_xtensa_common = target_to_esp_xtensa(target);
+
+ int ret = xtensa_poll(target);
+
+ if (xtensa_dm_power_status_get(&xtensa->dbg_mod) & PWRSTAT_COREWASRESET(xtensa)) {
+ LOG_TARGET_DEBUG(target, "Clear debug stubs info");
+ memset(&esp_xtensa_common->esp.dbg_stubs, 0, sizeof(esp_xtensa_common->esp.dbg_stubs));
+ }
+ if (target->state != TARGET_DEBUG_RUNNING)
+ esp_xtensa_dbgstubs_addr_check(target);
+ return ret;
+}
+
+static void esp_xtensa_dbgstubs_addr_check(struct target *target)
+{
+ struct esp_xtensa_common *esp_xtensa = target_to_esp_xtensa(target);
+ uint32_t vec_addr = 0;
+
+ if (esp_xtensa->esp.dbg_stubs.base != 0)
+ return;
+
+ int res = esp_xtensa_apptrace_status_reg_read(target, &vec_addr);
+ if (res != ERROR_OK) {
+ LOG_ERROR("Failed to read debug stubs address location (%d)!", res);
+ return;
+ }
+ if (xtensa_data_addr_valid(target, vec_addr)) {
+ LOG_TARGET_INFO(target, "Detected debug stubs @ %" PRIx32, vec_addr);
+ res = esp_xtensa_apptrace_status_reg_write(target, 0);
+ if (res != ERROR_OK)
+ LOG_ERROR("Failed to clear debug stubs address location (%d)!", res);
+ esp_xtensa->esp.dbg_stubs.base = vec_addr;
+ }
+}
+
+static void esp_xtensa_dbgstubs_info_update(struct target *target)
+{
+ struct esp_xtensa_common *esp_xtensa = target_to_esp_xtensa(target);
+
+ if (esp_xtensa->esp.dbg_stubs.base == 0 || esp_xtensa->esp.dbg_stubs.entries_count != 0)
+ return;
+
+ int res = esp_dbgstubs_table_read(target, &esp_xtensa->esp.dbg_stubs);
+ if (res != ERROR_OK)
+ return;
+ if (esp_xtensa->esp.dbg_stubs.entries_count == 0)
+ return;
+
+ /* read debug stubs descriptor */
+ ESP_XTENSA_DBGSTUBS_UPDATE_DATA_ENTRY(esp_xtensa->esp.dbg_stubs.entries[ESP_DBG_STUB_DESC]);
+ res = target_read_buffer(target, esp_xtensa->esp.dbg_stubs.entries[ESP_DBG_STUB_DESC],
+ sizeof(struct esp_dbg_stubs_desc),
+ (uint8_t *)&esp_xtensa->esp.dbg_stubs.desc);
+ if (res != ERROR_OK) {
+ LOG_ERROR("Failed to read debug stubs descriptor (%d)!", res);
+ return;
+ }
+ ESP_XTENSA_DBGSTUBS_UPDATE_CODE_ENTRY(esp_xtensa->esp.dbg_stubs.desc.tramp_addr);
+ ESP_XTENSA_DBGSTUBS_UPDATE_DATA_ENTRY(esp_xtensa->esp.dbg_stubs.desc.min_stack_addr);
+ ESP_XTENSA_DBGSTUBS_UPDATE_CODE_ENTRY(esp_xtensa->esp.dbg_stubs.desc.data_alloc);
+ ESP_XTENSA_DBGSTUBS_UPDATE_CODE_ENTRY(esp_xtensa->esp.dbg_stubs.desc.data_free);
}
int esp_xtensa_breakpoint_add(struct target *target, struct breakpoint *breakpoint)
diff --git a/src/target/espressif/esp_xtensa.h b/src/target/espressif/esp_xtensa.h
index 0b06b0395..00f67a370 100644
--- a/src/target/espressif/esp_xtensa.h
+++ b/src/target/espressif/esp_xtensa.h
@@ -10,12 +10,13 @@
#include <target/target.h>
#include <target/xtensa/xtensa.h>
-#include "esp_xtensa.h"
#include "esp_semihosting.h"
+#include "esp.h"
#include "esp_xtensa_apptrace.h"
struct esp_xtensa_common {
struct xtensa xtensa; /* must be the first element */
+ struct esp_common esp;
struct esp_semihost_data semihost;
struct esp_xtensa_apptrace_info apptrace;
};
diff --git a/src/target/espressif/esp_xtensa_smp.c b/src/target/espressif/esp_xtensa_smp.c
index 93c53f15b..1d70be9e3 100644
--- a/src/target/espressif/esp_xtensa_smp.c
+++ b/src/target/espressif/esp_xtensa_smp.c
@@ -146,6 +146,7 @@ int esp_xtensa_smp_poll(struct target *target)
enum target_state old_state = target->state;
struct esp_xtensa_smp_common *esp_xtensa_smp = target_to_esp_xtensa_smp(target);
struct esp_xtensa_common *esp_xtensa = target_to_esp_xtensa(target);
+ uint32_t old_dbg_stubs_base = esp_xtensa->esp.dbg_stubs.base;
struct target_list *head;
struct target *curr;
bool other_core_resume_req = false;
@@ -163,6 +164,16 @@ int esp_xtensa_smp_poll(struct target *target)
if (ret != ERROR_OK)
return ret;
+ if (esp_xtensa->esp.dbg_stubs.base && old_dbg_stubs_base != esp_xtensa->esp.dbg_stubs.base) {
+ /* debug stubs base is set only in PRO-CPU TRAX register, so sync this info */
+ foreach_smp_target(head, target->smp_targets) {
+ curr = head->target;
+ if (curr == target)
+ continue;
+ target_to_esp_xtensa(curr)->esp.dbg_stubs.base = esp_xtensa->esp.dbg_stubs.base;
+ }
+ }
+
if (target->smp) {
if (target->state == TARGET_RESET) {
esp_xtensa_smp->examine_other_cores = ESP_XTENSA_SMP_EXAMINE_OTHER_CORES;
-----------------------------------------------------------------------
Summary of changes:
src/target/espressif/Makefile.am | 38 ++++++------
src/target/espressif/esp.c | 77 ++++++++++++++++++++++++
src/target/espressif/esp.h | 85 +++++++++++++++++++++++++++
src/target/espressif/esp_xtensa.c | 107 +++++++++++++++++++++++++++++++++-
src/target/espressif/esp_xtensa.h | 3 +-
src/target/espressif/esp_xtensa_smp.c | 11 ++++
6 files changed, 300 insertions(+), 21 deletions(-)
create mode 100644 src/target/espressif/esp.c
create mode 100644 src/target/espressif/esp.h
hooks/post-receive
--
Main OpenOCD repository
|
|
From: openocd-gerrit <ope...@us...> - 2023-07-14 16:44:49
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".
The branch, master has been updated
via 29b02402ffdcb4fcf04492e4228a303cc02e9658 (commit)
from 78daf24a5c29664669bb1d9d7851cbbb90dbc444 (commit)
Those revisions listed above that are new to this repository have
not appeared on any other notification email; so we list those
revisions in full, below.
- Log -----------------------------------------------------------------
commit 29b02402ffdcb4fcf04492e4228a303cc02e9658
Author: Erhan Kurubas <erh...@es...>
Date: Tue Jul 4 18:40:36 2023 +0200
target/esp_xtensa: add xtensa on_halt handler
Right after target halt, some activities needs to be done
such as printing exception reason, disable wdts and reading
debug stubs information.
Missing activities will be submitted in the next patches.
Signed-off-by: Erhan Kurubas <erh...@es...>
Change-Id: I27aad5614d903f4bd7c8d6dba6bfb0bdb93ed8dc
Reviewed-on: https://review.openocd.org/c/openocd/+/7757
Reviewed-by: Antonio Borneo <bor...@gm...>
Tested-by: jenkins
diff --git a/src/target/espressif/esp32.c b/src/target/espressif/esp32.c
index 74bbe50bd..5cc236c36 100644
--- a/src/target/espressif/esp32.c
+++ b/src/target/espressif/esp32.c
@@ -266,7 +266,10 @@ static int esp32_disable_wdts(struct target *target)
static int esp32_on_halt(struct target *target)
{
- return esp32_disable_wdts(target);
+ int ret = esp32_disable_wdts(target);
+ if (ret == ERROR_OK)
+ ret = esp_xtensa_smp_on_halt(target);
+ return ret;
}
static int esp32_arch_state(struct target *target)
diff --git a/src/target/espressif/esp32s2.c b/src/target/espressif/esp32s2.c
index a11d05f0f..3628cc093 100644
--- a/src/target/espressif/esp32s2.c
+++ b/src/target/espressif/esp32s2.c
@@ -385,7 +385,10 @@ static int esp32s2_arch_state(struct target *target)
static int esp32s2_on_halt(struct target *target)
{
- return esp32s2_disable_wdts(target);
+ int ret = esp32s2_disable_wdts(target);
+ if (ret == ERROR_OK)
+ ret = esp_xtensa_on_halt(target);
+ return ret;
}
static int esp32s2_step(struct target *target, int current, target_addr_t address, int handle_breakpoints)
diff --git a/src/target/espressif/esp32s3.c b/src/target/espressif/esp32s3.c
index 485567836..074155f6a 100644
--- a/src/target/espressif/esp32s3.c
+++ b/src/target/espressif/esp32s3.c
@@ -283,7 +283,10 @@ static int esp32s3_disable_wdts(struct target *target)
static int esp32s3_on_halt(struct target *target)
{
- return esp32s3_disable_wdts(target);
+ int ret = esp32s3_disable_wdts(target);
+ if (ret == ERROR_OK)
+ ret = esp_xtensa_smp_on_halt(target);
+ return ret;
}
static int esp32s3_arch_state(struct target *target)
diff --git a/src/target/espressif/esp_xtensa.c b/src/target/espressif/esp_xtensa.c
index 44764aeca..3dfcc0fb2 100644
--- a/src/target/espressif/esp_xtensa.c
+++ b/src/target/espressif/esp_xtensa.c
@@ -17,6 +17,12 @@
#include "esp_xtensa.h"
#include "esp_semihosting.h"
+int esp_xtensa_on_halt(struct target *target)
+{
+ /* will be used in the next patches */
+ return ERROR_OK;
+}
+
int esp_xtensa_init_arch_info(struct target *target,
struct esp_xtensa_common *esp_xtensa,
struct xtensa_debug_module_config *dm_cfg,
diff --git a/src/target/espressif/esp_xtensa.h b/src/target/espressif/esp_xtensa.h
index 8807f0c32..0b06b0395 100644
--- a/src/target/espressif/esp_xtensa.h
+++ b/src/target/espressif/esp_xtensa.h
@@ -36,5 +36,6 @@ void esp_xtensa_queue_tdi_idle(struct target *target);
int esp_xtensa_breakpoint_add(struct target *target, struct breakpoint *breakpoint);
int esp_xtensa_breakpoint_remove(struct target *target, struct breakpoint *breakpoint);
int esp_xtensa_poll(struct target *target);
+int esp_xtensa_on_halt(struct target *target);
#endif /* OPENOCD_TARGET_ESP_XTENSA_H */
diff --git a/src/target/espressif/esp_xtensa_smp.c b/src/target/espressif/esp_xtensa_smp.c
index 1d037741d..93c53f15b 100644
--- a/src/target/espressif/esp_xtensa_smp.c
+++ b/src/target/espressif/esp_xtensa_smp.c
@@ -112,6 +112,21 @@ int esp_xtensa_smp_soft_reset_halt(struct target *target)
return ERROR_OK;
}
+int esp_xtensa_smp_on_halt(struct target *target)
+{
+ struct target_list *head;
+
+ if (!target->smp)
+ return esp_xtensa_on_halt(target);
+
+ foreach_smp_target(head, target->smp_targets) {
+ int res = esp_xtensa_on_halt(head->target);
+ if (res != ERROR_OK)
+ return res;
+ }
+ return ERROR_OK;
+}
+
static struct target *get_halted_esp_xtensa_smp(struct target *target, int32_t coreid)
{
struct target_list *head;
diff --git a/src/target/espressif/esp_xtensa_smp.h b/src/target/espressif/esp_xtensa_smp.h
index aeb1d61f5..4e4f3b332 100644
--- a/src/target/espressif/esp_xtensa_smp.h
+++ b/src/target/espressif/esp_xtensa_smp.h
@@ -37,6 +37,7 @@ int esp_xtensa_smp_step(struct target *target,
int esp_xtensa_smp_assert_reset(struct target *target);
int esp_xtensa_smp_deassert_reset(struct target *target);
int esp_xtensa_smp_soft_reset_halt(struct target *target);
+int esp_xtensa_smp_on_halt(struct target *target);
int esp_xtensa_smp_watchpoint_add(struct target *target, struct watchpoint *watchpoint);
int esp_xtensa_smp_watchpoint_remove(struct target *target, struct watchpoint *watchpoint);
int esp_xtensa_smp_handle_target_event(struct target *target, enum target_event event, void *priv);
-----------------------------------------------------------------------
Summary of changes:
src/target/espressif/esp32.c | 5 ++++-
src/target/espressif/esp32s2.c | 5 ++++-
src/target/espressif/esp32s3.c | 5 ++++-
src/target/espressif/esp_xtensa.c | 6 ++++++
src/target/espressif/esp_xtensa.h | 1 +
src/target/espressif/esp_xtensa_smp.c | 15 +++++++++++++++
src/target/espressif/esp_xtensa_smp.h | 1 +
7 files changed, 35 insertions(+), 3 deletions(-)
hooks/post-receive
--
Main OpenOCD repository
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|
From: openocd-gerrit <ope...@us...> - 2023-07-14 16:44:02
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".
The branch, master has been updated
via 78daf24a5c29664669bb1d9d7851cbbb90dbc444 (commit)
from 93002a86cde9cf95a894bdc099b67d6379e22cd3 (commit)
Those revisions listed above that are new to this repository have
not appeared on any other notification email; so we list those
revisions in full, below.
- Log -----------------------------------------------------------------
commit 78daf24a5c29664669bb1d9d7851cbbb90dbc444
Author: Erhan Kurubas <erh...@es...>
Date: Sun Jun 18 11:00:22 2023 +0200
tcl/target: update esp32s3.cfg to reference shared functions in the esp_common.cfg
This commit enhances code reusability, simplifies maintenance, and ensures
consistency across all chip configurations by consolidating commonly used
commands and variables into the common config file.
Signed-off-by: Erhan Kurubas <erh...@es...>
Change-Id: Ifb0122f3b98a767f27746409499733b70fb7d0e8
Reviewed-on: https://review.openocd.org/c/openocd/+/7747
Tested-by: jenkins
Reviewed-by: Antonio Borneo <bor...@gm...>
diff --git a/tcl/target/esp32s3.cfg b/tcl/target/esp32s3.cfg
index 42b219963..12c166c46 100644
--- a/tcl/target/esp32s3.cfg
+++ b/tcl/target/esp32s3.cfg
@@ -1,44 +1,20 @@
# SPDX-License-Identifier: GPL-2.0-or-later
#
-# The ESP32-S3 only supports JTAG.
-transport select jtag
-set CPU_MAX_ADDRESS 0xFFFFFFFF
-source [find bitsbytes.tcl]
-source [find memory.tcl]
-source [find mmr_helpers.tcl]
-# Source the ESP common configuration file
+# Source the ESP common configuration file.
source [find target/esp_common.cfg]
-
-if { [info exists CHIPNAME] } {
- set _CHIPNAME $CHIPNAME
-} else {
- set _CHIPNAME esp32s3
-}
-
-if { [info exists CPUTAPID] } {
- set _CPUTAPID $CPUTAPID
-} else {
- set _CPUTAPID 0x120034e5
-}
+# Target specific global variables
+set _CHIPNAME "esp32s3"
+set _CPUTAPID 0x120034e5
+set _ESP_ARCH "xtensa"
+set _ONLYCPU 3
+set _ESP_SMP_TARGET 1
+set _ESP_SMP_BREAK 1
+set _ESP_EFUSE_MAC_ADDR_REG 0x60007044
if { [info exists ESP32_S3_ONLYCPU] } {
set _ONLYCPU $ESP32_S3_ONLYCPU
-} else {
- set _ONLYCPU 2
-}
-
-set _CPU0NAME cpu0
-set _CPU1NAME cpu1
-set _TARGETNAME_0 $_CHIPNAME.$_CPU0NAME
-set _TARGETNAME_1 $_CHIPNAME.$_CPU1NAME
-
-jtag newtap $_CHIPNAME $_CPU0NAME -irlen 5 -expected-id $_CPUTAPID
-if { $_ONLYCPU != 1 } {
- jtag newtap $_CHIPNAME $_CPU1NAME -irlen 5 -expected-id $_CPUTAPID
-} else {
- jtag newtap $_CHIPNAME $_CPU1NAME -irlen 5 -disable -expected-id $_CPUTAPID
}
proc esp32s3_memprot_is_enabled { } {
@@ -89,66 +65,10 @@ proc esp32s3_memprot_is_enabled { } {
return 0
}
-# PRO-CPU
-target create $_TARGETNAME_0 $_CHIPNAME -endian little -chain-position $_TARGETNAME_0 -coreid 0
-# APP-CPU
-if { $_ONLYCPU != 1 } {
- target create $_TARGETNAME_1 $_CHIPNAME -endian little -chain-position $_TARGETNAME_1 -coreid 1
- target smp $_TARGETNAME_0 $_TARGETNAME_1
-}
-
-$_TARGETNAME_0 xtensa maskisr on
-$_TARGETNAME_0 xtensa smpbreak BreakIn BreakOut
-$_TARGETNAME_0 configure -event examine-end {
- # Need to enable to set 'semihosting_basedir'
- arm semihosting enable
- arm semihosting_resexit enable
- if { [info exists _SEMIHOST_BASEDIR] } {
- if { $_SEMIHOST_BASEDIR != "" } {
- arm semihosting_basedir $_SEMIHOST_BASEDIR
- }
- }
-}
-
-if { $_ONLYCPU != 1 } {
- $_TARGETNAME_1 configure -event examine-end {
- # Need to enable to set 'semihosting_basedir'
- arm semihosting enable
- arm semihosting_resexit enable
- if { [info exists _SEMIHOST_BASEDIR] } {
- if { $_SEMIHOST_BASEDIR != "" } {
- arm semihosting_basedir $_SEMIHOST_BASEDIR
- }
- }
- }
-}
-
-$_TARGETNAME_0 configure -event gdb-attach {
- $_TARGETNAME_0 xtensa smpbreak BreakIn BreakOut
- # necessary to auto-probe flash bank when GDB is connected and generate proper memory map
- halt 1000
- if { [esp32s3_memprot_is_enabled] } {
- # 'reset halt' to disable memory protection and allow flasher to work correctly
- echo "Memory protection is enabled. Reset target to disable it..."
- reset halt
- }
-}
-$_TARGETNAME_0 configure -event reset-assert-post { soft_reset_halt }
-
-if { $_ONLYCPU != 1 } {
- $_TARGETNAME_1 configure -event gdb-attach {
- $_TARGETNAME_1 xtensa smpbreak BreakIn BreakOut
- # necessary to auto-probe flash bank when GDB is connected
- halt 1000
- if { [esp32s3_memprot_is_enabled] } {
- # 'reset halt' to disable memory protection and allow flasher to work correctly
- echo "Memory protection is enabled. Reset target to disable it..."
- reset halt
- }
- }
- $_TARGETNAME_1 configure -event reset-assert-post { soft_reset_halt }
+proc esp32s3_soc_reset { } {
+ soft_reset_halt
}
-gdb_breakpoint_override hard
+create_esp_target $_ESP_ARCH
source [find target/xtensa-core-esp32s3.cfg]
-----------------------------------------------------------------------
Summary of changes:
tcl/target/esp32s3.cfg | 104 ++++++-------------------------------------------
1 file changed, 12 insertions(+), 92 deletions(-)
hooks/post-receive
--
Main OpenOCD repository
|
|
From: openocd-gerrit <ope...@us...> - 2023-07-14 16:43:36
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".
The branch, master has been updated
via 93002a86cde9cf95a894bdc099b67d6379e22cd3 (commit)
from d70fd7c5be74f5f524130c95985670eb57f5d5fa (commit)
Those revisions listed above that are new to this repository have
not appeared on any other notification email; so we list those
revisions in full, below.
- Log -----------------------------------------------------------------
commit 93002a86cde9cf95a894bdc099b67d6379e22cd3
Author: Erhan Kurubas <erh...@es...>
Date: Sun Jun 18 11:18:31 2023 +0200
tcl/target: update esp32s2.cfg to reference shared functions in the esp_common.cfg
This commit enhances code reusability, simplifies maintenance, and ensures
consistency across all chip configurations by consolidating commonly used
commands and variables into the common config file.
Signed-off-by: Erhan Kurubas <erh...@es...>
Change-Id: I36c86fe4ebc99928ce48a5bff8cb9580a0fa3ac0
Reviewed-on: https://review.openocd.org/c/openocd/+/7746
Tested-by: jenkins
Reviewed-by: Antonio Borneo <bor...@gm...>
diff --git a/tcl/target/esp32s2.cfg b/tcl/target/esp32s2.cfg
index e478a6d39..4c1362a34 100644
--- a/tcl/target/esp32s2.cfg
+++ b/tcl/target/esp32s2.cfg
@@ -1,32 +1,17 @@
# SPDX-License-Identifier: GPL-2.0-or-later
#
-# The ESP32-S2 only supports JTAG.
-transport select jtag
-set CPU_MAX_ADDRESS 0xFFFFFFFF
-source [find bitsbytes.tcl]
-source [find memory.tcl]
-source [find mmr_helpers.tcl]
-# Source the ESP common configuration file
+# Source the ESP common configuration file.
source [find target/esp_common.cfg]
-if { [info exists CHIPNAME] } {
- set _CHIPNAME $CHIPNAME
-} else {
- set _CHIPNAME esp32s2
-}
-
-if { [info exists CPUTAPID] } {
- set _CPUTAPID $CPUTAPID
-} else {
- set _CPUTAPID 0x120034e5
-}
-
-set _TARGETNAME $_CHIPNAME
-set _CPUNAME cpu
-set _TAPNAME $_CHIPNAME.$_CPUNAME
-
-jtag newtap $_CHIPNAME $_CPUNAME -irlen 5 -expected-id $_CPUTAPID
+# Target specific global variables
+set _CHIPNAME "esp32s2"
+set _CPUTAPID 0x120034e5
+set _ESP_ARCH "xtensa"
+set _ONLYCPU 1
+set _ESP_SMP_TARGET 0
+set _ESP_SMP_BREAK 1
+set _ESP_EFUSE_MAC_ADDR_REG 0x3f41A004
proc esp32s2_memprot_is_enabled { } {
# IRAM0, DPORT_PMS_PRO_IRAM0_0_REG
@@ -48,33 +33,10 @@ proc esp32s2_memprot_is_enabled { } {
return 0
}
-target create $_TARGETNAME esp32s2 -endian little -chain-position $_TAPNAME
-
-$_TARGETNAME configure -event gdb-attach {
- # necessary to auto-probe flash bank when GDB is connected and generate proper memory map
- halt 1000
- if { [esp32s2_memprot_is_enabled] } {
- # 'reset halt' to disable memory protection and allow flasher to work correctly
- echo "Memory protection is enabled. Reset target to disable it..."
- reset halt
- }
-}
-
-xtensa maskisr on
-
-$_TARGETNAME configure -event examine-end {
- # Need to enable to set 'semihosting_basedir'
- arm semihosting enable
- arm semihosting_resexit enable
- if { [info exists _SEMIHOST_BASEDIR] } {
- if { $_SEMIHOST_BASEDIR != "" } {
- arm semihosting_basedir $_SEMIHOST_BASEDIR
- }
- }
+proc esp32s2_soc_reset { } {
+ soft_reset_halt
}
-$_TARGETNAME configure -event reset-assert-post { soft_reset_halt }
-
-gdb_breakpoint_override hard
+create_esp_target $_ESP_ARCH
source [find target/xtensa-core-esp32s2.cfg]
-----------------------------------------------------------------------
Summary of changes:
tcl/target/esp32s2.cfg | 62 ++++++++++----------------------------------------
1 file changed, 12 insertions(+), 50 deletions(-)
hooks/post-receive
--
Main OpenOCD repository
|
|
From: openocd-gerrit <ope...@us...> - 2023-07-14 16:43:18
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".
The branch, master has been updated
via d70fd7c5be74f5f524130c95985670eb57f5d5fa (commit)
from c97b9054d9f52516b529bea58f09e14a4e0d82fd (commit)
Those revisions listed above that are new to this repository have
not appeared on any other notification email; so we list those
revisions in full, below.
- Log -----------------------------------------------------------------
commit d70fd7c5be74f5f524130c95985670eb57f5d5fa
Author: Erhan Kurubas <erh...@es...>
Date: Sun Jun 18 10:25:07 2023 +0200
tcl/target: update esp32.cfg to reference shared functions in the esp_common.cfg
This commit enhances code reusability, simplifies maintenance, and ensures
consistency across all chip configurations by consolidating commonly used
commands and variables into the common config file.
Signed-off-by: Erhan Kurubas <erh...@es...>
Change-Id: I9181737d83eeba4e983b6a455b8a1523f2576dd2
Reviewed-on: https://review.openocd.org/c/openocd/+/7745
Reviewed-by: Antonio Borneo <bor...@gm...>
Tested-by: jenkins
diff --git a/tcl/target/esp32.cfg b/tcl/target/esp32.cfg
index f4c13aa5b..b30a17024 100644
--- a/tcl/target/esp32.cfg
+++ b/tcl/target/esp32.cfg
@@ -1,99 +1,35 @@
# SPDX-License-Identifier: GPL-2.0-or-later
#
-# The ESP32 only supports JTAG.
-transport select jtag
-# Source the ESP common configuration file
+# Source the ESP common configuration file.
source [find target/esp_common.cfg]
-if { [info exists CHIPNAME] } {
- set _CHIPNAME $CHIPNAME
-} else {
- set _CHIPNAME esp32
-}
-
-if { [info exists CPUTAPID] } {
- set _CPUTAPID $CPUTAPID
-} else {
- set _CPUTAPID 0x120034e5
-}
+# Target specific global variables
+set _CHIPNAME "esp32"
+set _CPUTAPID 0x120034e5
+set _ESP_ARCH "xtensa"
+set _ONLYCPU 3
+set _FLASH_VOLTAGE 3.3
+set _ESP_SMP_TARGET 1
+set _ESP_SMP_BREAK 1
+set _ESP_EFUSE_MAC_ADDR_REG 0x3ff5A004
if { [info exists ESP32_ONLYCPU] } {
set _ONLYCPU $ESP32_ONLYCPU
-} else {
- set _ONLYCPU 2
}
if { [info exists ESP32_FLASH_VOLTAGE] } {
set _FLASH_VOLTAGE $ESP32_FLASH_VOLTAGE
-} else {
- set _FLASH_VOLTAGE 3.3
-}
-
-set _CPU0NAME cpu0
-set _CPU1NAME cpu1
-set _TARGETNAME_0 $_CHIPNAME.$_CPU0NAME
-set _TARGETNAME_1 $_CHIPNAME.$_CPU1NAME
-
-jtag newtap $_CHIPNAME $_CPU0NAME -irlen 5 -expected-id $_CPUTAPID
-if { $_ONLYCPU != 1 } {
- jtag newtap $_CHIPNAME $_CPU1NAME -irlen 5 -expected-id $_CPUTAPID
-} else {
- jtag newtap $_CHIPNAME $_CPU1NAME -irlen 5 -disable -expected-id $_CPUTAPID
-}
-
-# PRO-CPU
-target create $_TARGETNAME_0 $_CHIPNAME -endian little -chain-position $_TARGETNAME_0 -coreid 0
-# APP-CPU
-if { $_ONLYCPU != 1 } {
- target create $_TARGETNAME_1 $_CHIPNAME -endian little -chain-position $_TARGETNAME_1 -coreid 1
- target smp $_TARGETNAME_0 $_TARGETNAME_1
-}
-
-$_TARGETNAME_0 esp32 flashbootstrap $_FLASH_VOLTAGE
-$_TARGETNAME_0 xtensa maskisr on
-$_TARGETNAME_0 xtensa smpbreak BreakIn BreakOut
-$_TARGETNAME_0 configure -event reset-assert-post { soft_reset_halt }
-
-$_TARGETNAME_0 configure -event gdb-attach {
- $_TARGETNAME_0 xtensa smpbreak BreakIn BreakOut
- # necessary to auto-probe flash bank when GDB is connected
- halt 1000
-}
-
-if { $_ONLYCPU != 1 } {
- $_TARGETNAME_1 configure -event gdb-attach {
- $_TARGETNAME_1 xtensa smpbreak BreakIn BreakOut
- # necessary to auto-probe flash bank when GDB is connected
- halt 1000
- }
- $_TARGETNAME_1 configure -event reset-assert-post { soft_reset_halt }
}
-$_TARGETNAME_0 configure -event examine-end {
- # Need to enable to set 'semihosting_basedir'
- arm semihosting enable
- arm semihosting_resexit enable
- if { [info exists _SEMIHOST_BASEDIR] } {
- if { $_SEMIHOST_BASEDIR != "" } {
- arm semihosting_basedir $_SEMIHOST_BASEDIR
- }
- }
+proc esp32_memprot_is_enabled { } {
+ return 0
}
-if { $_ONLYCPU != 1 } {
- $_TARGETNAME_1 configure -event examine-end {
- # Need to enable to set 'semihosting_basedir'
- arm semihosting enable
- arm semihosting_resexit enable
- if { [info exists _SEMIHOST_BASEDIR] } {
- if { $_SEMIHOST_BASEDIR != "" } {
- arm semihosting_basedir $_SEMIHOST_BASEDIR
- }
- }
- }
+proc esp32_soc_reset { } {
+ soft_reset_halt
}
-gdb_breakpoint_override hard
+create_esp_target $_ESP_ARCH
source [find target/xtensa-core-esp32.cfg]
-----------------------------------------------------------------------
Summary of changes:
tcl/target/esp32.cfg | 94 +++++++++-------------------------------------------
1 file changed, 15 insertions(+), 79 deletions(-)
hooks/post-receive
--
Main OpenOCD repository
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From: openocd-gerrit <ope...@us...> - 2023-07-14 16:41:26
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".
The branch, master has been updated
via c97b9054d9f52516b529bea58f09e14a4e0d82fd (commit)
from 886d6c3cbcc4c831d48790c9f1fdb02c8036f79e (commit)
Those revisions listed above that are new to this repository have
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- Log -----------------------------------------------------------------
commit c97b9054d9f52516b529bea58f09e14a4e0d82fd
Author: Erhan Kurubas <erh...@es...>
Date: Sun Jun 18 10:17:33 2023 +0200
tcl/target: move Espressif shared functions to esp_common.cfg
Consolidate commonly used commands and variables from
chip config files into functions in esp_common.cfg.
This includes "jtag newtap," "target create,"and "configure -event."
Enhances code reusability and simplifies maintenance.
Signed-off-by: Erhan Kurubas <erh...@es...>
Change-Id: I9e8bf07a4a15d4544ceb564607dea66837381d70
Reviewed-on: https://review.openocd.org/c/openocd/+/7744
Tested-by: jenkins
Reviewed-by: Antonio Borneo <bor...@gm...>
diff --git a/tcl/target/esp_common.cfg b/tcl/target/esp_common.cfg
index 424c0cdff..ac8cd6a19 100644
--- a/tcl/target/esp_common.cfg
+++ b/tcl/target/esp_common.cfg
@@ -1,10 +1,189 @@
# SPDX-License-Identifier: GPL-2.0-or-later
#
+
+set CPU_MAX_ADDRESS 0xFFFFFFFF
+source [find bitsbytes.tcl]
+source [find memory.tcl]
+source [find mmr_helpers.tcl]
+
# Common ESP chips definitions
+# Espressif supports only NuttX in the upstream.
+#Â FreeRTOS support is not upstreamed yet.
+set _RTOS "hwthread"
+if { [info exists ESP_RTOS] } {
+ set _RTOS "$ESP_RTOS"
+}
+
+# by default current dir (when OOCD has been started)
+set _SEMIHOST_BASEDIR "."
if { [info exists ESP_SEMIHOST_BASEDIR] } {
set _SEMIHOST_BASEDIR $ESP_SEMIHOST_BASEDIR
-} else {
- # by default current dir (when OOCD has been started)
- set _SEMIHOST_BASEDIR "."
+}
+
+proc set_esp_common_variables { } {
+ global _CHIPNAME _ONLYCPU _ESP_SMP_TARGET
+ global _CPUNAME_0 _CPUNAME_1 _TARGETNAME_0 _TARGETNAME_1 _TAPNAME_0 _TAPNAME_1
+ global _ESP_WDT_DISABLE _ESP_SOC_RESET _ESP_MEMPROT_IS_ENABLED
+
+ # For now we support dual core at most.
+ if { $_ONLYCPU == 1 && $_ESP_SMP_TARGET == 0} {
+ set _TARGETNAME_0 $_CHIPNAME
+ set _CPUNAME_0 cpu
+ set _TAPNAME_0 $_CHIPNAME.$_CPUNAME_0
+ } else {
+ set _CPUNAME_0 cpu0
+ set _CPUNAME_1 cpu1
+ set _TARGETNAME_0 $_CHIPNAME.$_CPUNAME_0
+ set _TARGETNAME_1 $_CHIPNAME.$_CPUNAME_1
+ set _TAPNAME_0 $_TARGETNAME_0
+ set _TAPNAME_1 $_TARGETNAME_1
+ }
+
+ set _ESP_WDT_DISABLE "${_CHIPNAME}_wdt_disable"
+ set _ESP_SOC_RESET "${_CHIPNAME}_soc_reset"
+ set _ESP_MEMPROT_IS_ENABLED "${_CHIPNAME}_memprot_is_enabled"
+}
+
+proc create_esp_jtag { } {
+ global _CHIPNAME _CPUNAME_0 _CPUNAME_1 _CPUTAPID _ONLYCPU
+ jtag newtap $_CHIPNAME $_CPUNAME_0 -irlen 5 -expected-id $_CPUTAPID
+ if { $_ONLYCPU != 1 } {
+ jtag newtap $_CHIPNAME $_CPUNAME_1 -irlen 5 -expected-id $_CPUTAPID
+ } elseif [info exists _CPUNAME_1] {
+ jtag newtap $_CHIPNAME $_CPUNAME_1 -irlen 5 -disable -expected-id $_CPUTAPID
+ }
+}
+
+proc create_openocd_targets { } {
+ global _TARGETNAME_0 _TARGETNAME_1 _TAPNAME_0 _TAPNAME_1 _RTOS _CHIPNAME _ONLYCPU
+
+ target create $_TARGETNAME_0 $_CHIPNAME -chain-position $_TAPNAME_0 -coreid 0 -rtos $_RTOS
+ if { $_ONLYCPU != 1 } {
+ target create $_TARGETNAME_1 $_CHIPNAME -chain-position $_TAPNAME_1 -coreid 1 -rtos $_RTOS
+ target smp $_TARGETNAME_0 $_TARGETNAME_1
+ }
+}
+
+proc create_esp_target { ARCH } {
+ set_esp_common_variables
+ create_esp_jtag
+ create_openocd_targets
+ configure_openocd_events
+
+ if { $ARCH == "xtensa"} {
+ configure_esp_xtensa_default_settings
+ } else {
+ #Â riscv targets are not upstreamed yet.
+ # they can be found at the official Espressif fork.
+ }
+}
+
+#################### Set event handlers and default settings ####################
+
+proc configure_event_examine_end { } {
+ global _TARGETNAME_0 _TARGETNAME_1 _ONLYCPU
+
+ $_TARGETNAME_0 configure -event examine-end {
+ # Need to enable to set 'semihosting_basedir'
+ arm semihosting enable
+ arm semihosting_resexit enable
+ if { [info exists _SEMIHOST_BASEDIR] } {
+ if { $_SEMIHOST_BASEDIR != "" } {
+ arm semihosting_basedir $_SEMIHOST_BASEDIR
+ }
+ }
+ }
+
+ if { $_ONLYCPU != 1 } {
+ $_TARGETNAME_1 configure -event examine-end {
+ # Need to enable to set 'semihosting_basedir'
+ arm semihosting enable
+ arm semihosting_resexit enable
+ if { [info exists _SEMIHOST_BASEDIR] } {
+ if { $_SEMIHOST_BASEDIR != "" } {
+ arm semihosting_basedir $_SEMIHOST_BASEDIR
+ }
+ }
+ }
+ }
+}
+
+proc configure_event_reset_assert_post { } {
+ global _TARGETNAME_0 _TARGETNAME_1 _ONLYCPU
+
+ $_TARGETNAME_0 configure -event reset-assert-post {
+ global _ESP_SOC_RESET
+ $_ESP_SOC_RESET
+ }
+
+ if { $_ONLYCPU != 1 } {
+ $_TARGETNAME_1 configure -event reset-assert-post {
+ global _ESP_SOC_RESET
+ $_ESP_SOC_RESET
+ }
+ }
+}
+
+proc configure_event_halted { } {
+ global _TARGETNAME_0
+
+ $_TARGETNAME_0 configure -event halted {
+ global _ESP_WDT_DISABLE
+ $_ESP_WDT_DISABLE
+ esp halted_event_handler
+ }
+}
+
+proc configure_event_gdb_attach { } {
+ global _TARGETNAME_0 _TARGETNAME_1 _ONLYCPU
+
+ $_TARGETNAME_0 configure -event gdb-attach {
+ if { $_ESP_SMP_BREAK != 0 } {
+ $_TARGETNAME_0 xtensa smpbreak BreakIn BreakOut
+ }
+ # necessary to auto-probe flash bank when GDB is connected and generate proper memory map
+ halt 1000
+ if { [$_ESP_MEMPROT_IS_ENABLED] } {
+ # 'reset halt' to disable memory protection and allow flasher to work correctly
+ echo "Memory protection is enabled. Reset target to disable it..."
+ reset halt
+ }
+ }
+
+ if { $_ONLYCPU != 1 } {
+ $_TARGETNAME_1 configure -event gdb-attach {
+ if { $_ESP_SMP_BREAK != 0 } {
+ $_TARGETNAME_1 xtensa smpbreak BreakIn BreakOut
+ }
+ # necessary to auto-probe flash bank when GDB is connected
+ halt 1000
+ if { [$_ESP_MEMPROT_IS_ENABLED] } {
+ # 'reset halt' to disable memory protection and allow flasher to work correctly
+ echo "Memory protection is enabled. Reset target to disable it..."
+ reset halt
+ }
+ }
+ }
+}
+
+proc configure_openocd_events { } {
+ configure_event_examine_end
+ configure_event_reset_assert_post
+ configure_event_gdb_attach
+}
+
+proc configure_esp_xtensa_default_settings { } {
+ global _TARGETNAME_0 _ESP_SMP_BREAK _FLASH_VOLTAGE _CHIPNAME
+
+ $_TARGETNAME_0 xtensa maskisr on
+ if { $_ESP_SMP_BREAK != 0 } {
+ $_TARGETNAME_0 xtensa smpbreak BreakIn BreakOut
+ }
+
+ gdb_breakpoint_override hard
+
+ if { [info exists _FLASH_VOLTAGE] } {
+ $_TARGETNAME_0 $_CHIPNAME flashbootstrap $_FLASH_VOLTAGE
+ }
}
-----------------------------------------------------------------------
Summary of changes:
tcl/target/esp_common.cfg | 185 +++++++++++++++++++++++++++++++++++++++++++++-
1 file changed, 182 insertions(+), 3 deletions(-)
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From: openocd-gerrit <ope...@us...> - 2023-07-14 14:02:13
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".
The branch, master has been updated
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- Log -----------------------------------------------------------------
commit 886d6c3cbcc4c831d48790c9f1fdb02c8036f79e
Author: Antonio Borneo <bor...@gm...>
Date: Mon Jul 10 11:59:27 2023 +0200
doc:usb_adapters: add lsusb dump of STLINK-V3PWR
Add USB VID:PID 0483:3755 and 0483:3757.
Change-Id: Iace29fa97f1b8e9d86078b9775561ca525635523
Signed-off-by: Antonio Borneo <bor...@gm...>
Reviewed-on: https://review.openocd.org/c/openocd/+/7768
Tested-by: jenkins
diff --git a/doc/usb_adapters/stlink/0483_3755_stlinkv3pwr.txt b/doc/usb_adapters/stlink/0483_3755_stlinkv3pwr.txt
new file mode 100644
index 000000000..6c7cd6fbf
--- /dev/null
+++ b/doc/usb_adapters/stlink/0483_3755_stlinkv3pwr.txt
@@ -0,0 +1,71 @@
+# SPDX-License-Identifier: GPL-2.0-or-later OR GFDL-1.2-no-invariants-or-later
+
+# STLINK-V3PWR standalone in firmware update mode
+
+Bus 003 Device 054: ID 0483:3755 STMicroelectronics USB2.0 Hub
+Device Descriptor:
+ bLength 18
+ bDescriptorType 1
+ bcdUSB 2.00
+ bDeviceClass 0
+ bDeviceSubClass 0
+ bDeviceProtocol 0
+ bMaxPacketSize0 64
+ idVendor 0x0483 STMicroelectronics
+ idProduct 0x3755
+ bcdDevice 1.00
+ iManufacturer 1 STMicroelectronics
+ iProduct 2 STLINK-V3PWR
+ iSerial 3 123456780000
+ bNumConfigurations 1
+ Configuration Descriptor:
+ bLength 9
+ bDescriptorType 2
+ wTotalLength 0x0020
+ bNumInterfaces 1
+ bConfigurationValue 1
+ iConfiguration 4 DFU Config
+ bmAttributes 0x80
+ (Bus Powered)
+ MaxPower 100mA
+ Interface Descriptor:
+ bLength 9
+ bDescriptorType 4
+ bInterfaceNumber 0
+ bAlternateSetting 0
+ bNumEndpoints 2
+ bInterfaceClass 255 Vendor Specific Class
+ bInterfaceSubClass 255 Vendor Specific Subclass
+ bInterfaceProtocol 255 Vendor Specific Protocol
+ iInterface 5 ST-Link Usbloader
+ Endpoint Descriptor:
+ bLength 7
+ bDescriptorType 5
+ bEndpointAddress 0x81 EP 1 IN
+ bmAttributes 2
+ Transfer Type Bulk
+ Synch Type None
+ Usage Type Data
+ wMaxPacketSize 0x0200 1x 512 bytes
+ bInterval 0
+ Endpoint Descriptor:
+ bLength 7
+ bDescriptorType 5
+ bEndpointAddress 0x01 EP 1 OUT
+ bmAttributes 2
+ Transfer Type Bulk
+ Synch Type None
+ Usage Type Data
+ wMaxPacketSize 0x0200 1x 512 bytes
+ bInterval 0
+Device Qualifier (for other device speed):
+ bLength 10
+ bDescriptorType 6
+ bcdUSB 2.00
+ bDeviceClass 0
+ bDeviceSubClass 0
+ bDeviceProtocol 0
+ bMaxPacketSize0 64
+ bNumConfigurations 1
+Device Status: 0x0000
+ (Bus Powered)
diff --git a/doc/usb_adapters/stlink/0483_3757_stlinkv3pwr.txt b/doc/usb_adapters/stlink/0483_3757_stlinkv3pwr.txt
new file mode 100644
index 000000000..0cfd6cf58
--- /dev/null
+++ b/doc/usb_adapters/stlink/0483_3757_stlinkv3pwr.txt
@@ -0,0 +1,253 @@
+# SPDX-License-Identifier: GPL-2.0-or-later OR GFDL-1.2-no-invariants-or-later
+
+# STLINK-V3PWR standalone
+
+Bus 003 Device 053: ID 0483:3757 STMicroelectronics USB2.0 Hub
+Device Descriptor:
+ bLength 18
+ bDescriptorType 1
+ bcdUSB 2.00
+ bDeviceClass 239 Miscellaneous Device
+ bDeviceSubClass 2
+ bDeviceProtocol 1 Interface Association
+ bMaxPacketSize0 64
+ idVendor 0x0483 STMicroelectronics
+ idProduct 0x3757
+ bcdDevice 1.00
+ iManufacturer 1 STMicroelectronics
+ iProduct 2 STLINK-V3PWR
+ iSerial 3 123456780000
+ bNumConfigurations 1
+ Configuration Descriptor:
+ bLength 9
+ bDescriptorType 2
+ wTotalLength 0x00c2
+ bNumInterfaces 6
+ bConfigurationValue 1
+ iConfiguration 4 Default Config
+ bmAttributes 0x80
+ (Bus Powered)
+ MaxPower 500mA
+ Interface Descriptor:
+ bLength 9
+ bDescriptorType 4
+ bInterfaceNumber 0
+ bAlternateSetting 0
+ bNumEndpoints 3
+ bInterfaceClass 255 Vendor Specific Class
+ bInterfaceSubClass 255 Vendor Specific Subclass
+ bInterfaceProtocol 255 Vendor Specific Protocol
+ iInterface 5 ST-Link Debug
+ Endpoint Descriptor:
+ bLength 7
+ bDescriptorType 5
+ bEndpointAddress 0x81 EP 1 IN
+ bmAttributes 2
+ Transfer Type Bulk
+ Synch Type None
+ Usage Type Data
+ wMaxPacketSize 0x0200 1x 512 bytes
+ bInterval 0
+ Endpoint Descriptor:
+ bLength 7
+ bDescriptorType 5
+ bEndpointAddress 0x01 EP 1 OUT
+ bmAttributes 2
+ Transfer Type Bulk
+ Synch Type None
+ Usage Type Data
+ wMaxPacketSize 0x0200 1x 512 bytes
+ bInterval 0
+ Endpoint Descriptor:
+ bLength 7
+ bDescriptorType 5
+ bEndpointAddress 0x82 EP 2 IN
+ bmAttributes 2
+ Transfer Type Bulk
+ Synch Type None
+ Usage Type Data
+ wMaxPacketSize 0x0200 1x 512 bytes
+ bInterval 0
+ Interface Association:
+ bLength 8
+ bDescriptorType 11
+ bFirstInterface 1
+ bInterfaceCount 2
+ bFunctionClass 2 Communications
+ bFunctionSubClass 2 Abstract (modem)
+ bFunctionProtocol 1 AT-commands (v.25ter)
+ iFunction 6 ST-Link VCP Ctrl
+ Interface Descriptor:
+ bLength 9
+ bDescriptorType 4
+ bInterfaceNumber 1
+ bAlternateSetting 0
+ bNumEndpoints 1
+ bInterfaceClass 2 Communications
+ bInterfaceSubClass 2 Abstract (modem)
+ bInterfaceProtocol 1 AT-commands (v.25ter)
+ iInterface 6 ST-Link VCP Ctrl
+ CDC Header:
+ bcdCDC 1.10
+ CDC Call Management:
+ bmCapabilities 0x00
+ bDataInterface 2
+ CDC ACM:
+ bmCapabilities 0x06
+ sends break
+ line coding and serial state
+ CDC Union:
+ bMasterInterface 1
+ bSlaveInterface 2
+ Endpoint Descriptor:
+ bLength 7
+ bDescriptorType 5
+ bEndpointAddress 0x84 EP 4 IN
+ bmAttributes 3
+ Transfer Type Interrupt
+ Synch Type None
+ Usage Type Data
+ wMaxPacketSize 0x000a 1x 10 bytes
+ bInterval 16
+ Interface Descriptor:
+ bLength 9
+ bDescriptorType 4
+ bInterfaceNumber 2
+ bAlternateSetting 0
+ bNumEndpoints 2
+ bInterfaceClass 10 CDC Data
+ bInterfaceSubClass 0
+ bInterfaceProtocol 0
+ iInterface 7 ST-Link VCP Data
+ Endpoint Descriptor:
+ bLength 7
+ bDescriptorType 5
+ bEndpointAddress 0x05 EP 5 OUT
+ bmAttributes 2
+ Transfer Type Bulk
+ Synch Type None
+ Usage Type Data
+ wMaxPacketSize 0x0200 1x 512 bytes
+ bInterval 0
+ Endpoint Descriptor:
+ bLength 7
+ bDescriptorType 5
+ bEndpointAddress 0x85 EP 5 IN
+ bmAttributes 2
+ Transfer Type Bulk
+ Synch Type None
+ Usage Type Data
+ wMaxPacketSize 0x0200 1x 512 bytes
+ bInterval 0
+ Interface Descriptor:
+ bLength 9
+ bDescriptorType 4
+ bInterfaceNumber 3
+ bAlternateSetting 0
+ bNumEndpoints 2
+ bInterfaceClass 255 Vendor Specific Class
+ bInterfaceSubClass 255 Vendor Specific Subclass
+ bInterfaceProtocol 255 Vendor Specific Protocol
+ iInterface 8 ST-Link Bridge
+ Endpoint Descriptor:
+ bLength 7
+ bDescriptorType 5
+ bEndpointAddress 0x86 EP 6 IN
+ bmAttributes 2
+ Transfer Type Bulk
+ Synch Type None
+ Usage Type Data
+ wMaxPacketSize 0x0200 1x 512 bytes
+ bInterval 0
+ Endpoint Descriptor:
+ bLength 7
+ bDescriptorType 5
+ bEndpointAddress 0x06 EP 6 OUT
+ bmAttributes 2
+ Transfer Type Bulk
+ Synch Type None
+ Usage Type Data
+ wMaxPacketSize 0x0200 1x 512 bytes
+ bInterval 0
+ Interface Association:
+ bLength 8
+ bDescriptorType 11
+ bFirstInterface 4
+ bInterfaceCount 2
+ bFunctionClass 2 Communications
+ bFunctionSubClass 2 Abstract (modem)
+ bFunctionProtocol 1 AT-commands (v.25ter)
+ iFunction 9 ST-Link VCP-PWR Ctrl
+ Interface Descriptor:
+ bLength 9
+ bDescriptorType 4
+ bInterfaceNumber 4
+ bAlternateSetting 0
+ bNumEndpoints 1
+ bInterfaceClass 2 Communications
+ bInterfaceSubClass 2 Abstract (modem)
+ bInterfaceProtocol 1 AT-commands (v.25ter)
+ iInterface 9 ST-Link VCP-PWR Ctrl
+ CDC Header:
+ bcdCDC 1.10
+ CDC Call Management:
+ bmCapabilities 0x00
+ bDataInterface 5
+ CDC ACM:
+ bmCapabilities 0x06
+ sends break
+ line coding and serial state
+ CDC Union:
+ bMasterInterface 4
+ bSlaveInterface 5
+ Endpoint Descriptor:
+ bLength 7
+ bDescriptorType 5
+ bEndpointAddress 0x87 EP 7 IN
+ bmAttributes 3
+ Transfer Type Interrupt
+ Synch Type None
+ Usage Type Data
+ wMaxPacketSize 0x000a 1x 10 bytes
+ bInterval 16
+ Interface Descriptor:
+ bLength 9
+ bDescriptorType 4
+ bInterfaceNumber 5
+ bAlternateSetting 0
+ bNumEndpoints 2
+ bInterfaceClass 10 CDC Data
+ bInterfaceSubClass 0
+ bInterfaceProtocol 0
+ iInterface 10 ST-Link VCP-PWR Data
+ Endpoint Descriptor:
+ bLength 7
+ bDescriptorType 5
+ bEndpointAddress 0x03 EP 3 OUT
+ bmAttributes 2
+ Transfer Type Bulk
+ Synch Type None
+ Usage Type Data
+ wMaxPacketSize 0x0200 1x 512 bytes
+ bInterval 0
+ Endpoint Descriptor:
+ bLength 7
+ bDescriptorType 5
+ bEndpointAddress 0x83 EP 3 IN
+ bmAttributes 2
+ Transfer Type Bulk
+ Synch Type None
+ Usage Type Data
+ wMaxPacketSize 0x0200 1x 512 bytes
+ bInterval 0
+Device Qualifier (for other device speed):
+ bLength 10
+ bDescriptorType 6
+ bcdUSB 2.00
+ bDeviceClass 0
+ bDeviceSubClass 0
+ bDeviceProtocol 0
+ bMaxPacketSize0 64
+ bNumConfigurations 1
+Device Status: 0x0000
+ (Bus Powered)
-----------------------------------------------------------------------
Summary of changes:
...374d_stlinkv3.txt => 0483_3755_stlinkv3pwr.txt} | 18 ++++++------
...3753_stlinkv3.txt => 0483_3757_stlinkv3pwr.txt} | 34 +++++++++++-----------
2 files changed, 26 insertions(+), 26 deletions(-)
copy doc/usb_adapters/stlink/{0483_374d_stlinkv3.txt => 0483_3755_stlinkv3pwr.txt} (85%)
copy doc/usb_adapters/stlink/{0483_3753_stlinkv3.txt => 0483_3757_stlinkv3pwr.txt} (92%)
hooks/post-receive
--
Main OpenOCD repository
|
|
From: openocd-gerrit <ope...@us...> - 2023-07-14 13:59:59
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".
The branch, master has been updated
via 965730dda9e1bbb18b9b954ef63ce9ed22fef73f (commit)
from 05da04acdaabad77cb0ec0caf1edafd516bb79fa (commit)
Those revisions listed above that are new to this repository have
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- Log -----------------------------------------------------------------
commit 965730dda9e1bbb18b9b954ef63ce9ed22fef73f
Author: Daniel Anselmi <dan...@gm...>
Date: Mon Jul 10 21:03:10 2023 +0200
ipdbg: fix 'double free' in case of failed start
Change-Id: Id241d9dd0793095106fea000422617fbef462669
Signed-off-by: Daniel Anselmi <dan...@gm...>
Reviewed-on: https://review.openocd.org/c/openocd/+/7770
Reviewed-by: Antonio Borneo <bor...@gm...>
Tested-by: jenkins
diff --git a/src/server/ipdbg.c b/src/server/ipdbg.c
index 3fae0a98d..c1bdb2939 100644
--- a/src/server/ipdbg.c
+++ b/src/server/ipdbg.c
@@ -632,10 +632,8 @@ static int ipdbg_start(uint16_t port, struct jtag_tap *tap, uint32_t user_instru
}
} else {
int retval = ipdbg_create_hub(tap, user_instruction, data_register_length, virtual_ir, &hub);
- if (retval != ERROR_OK) {
- free(virtual_ir);
+ if (retval != ERROR_OK)
return retval;
- }
}
struct ipdbg_service *service = NULL;
-----------------------------------------------------------------------
Summary of changes:
src/server/ipdbg.c | 4 +---
1 file changed, 1 insertion(+), 3 deletions(-)
hooks/post-receive
--
Main OpenOCD repository
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From: openocd-gerrit <ope...@us...> - 2023-07-14 13:58:07
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".
The branch, master has been updated
via 05da04acdaabad77cb0ec0caf1edafd516bb79fa (commit)
from ddf5e3f90ddf25021cebd95b908491b233c44c59 (commit)
Those revisions listed above that are new to this repository have
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- Log -----------------------------------------------------------------
commit 05da04acdaabad77cb0ec0caf1edafd516bb79fa
Author: Marc Schink <de...@za...>
Date: Wed Jul 5 15:25:12 2023 +0200
flash/nor/stm32l4x: Add revision 'V' for STM32L4R/S devices
See section 57.6.1 in RM0432.
Change-Id: Ic4977aee74d1838f420c1d9ff19925d09f8f6e2b
Signed-off-by: Marc Schink <de...@za...>
Reviewed-on: https://review.openocd.org/c/openocd/+/7763
Tested-by: jenkins
Reviewed-by: Antonio Borneo <bor...@gm...>
diff --git a/src/flash/nor/stm32l4x.c b/src/flash/nor/stm32l4x.c
index 934deec9f..77a89f53c 100644
--- a/src/flash/nor/stm32l4x.c
+++ b/src/flash/nor/stm32l4x.c
@@ -326,6 +326,7 @@ static const struct stm32l4_rev stm32g47_g48xx_revs[] = {
static const struct stm32l4_rev stm32l4r_l4sxx_revs[] = {
{ 0x1000, "A" }, { 0x1001, "Z" }, { 0x1003, "Y" }, { 0x100F, "W" },
+ { 0x101F, "V" },
};
static const struct stm32l4_rev stm32l4p_l4qxx_revs[] = {
-----------------------------------------------------------------------
Summary of changes:
src/flash/nor/stm32l4x.c | 1 +
1 file changed, 1 insertion(+)
hooks/post-receive
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Main OpenOCD repository
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From: openocd-gerrit <ope...@us...> - 2023-07-14 13:50:44
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".
The branch, master has been updated
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from 659f2e062d2fa2196465d2c3197da316b23285ae (commit)
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- Log -----------------------------------------------------------------
commit ddf5e3f90ddf25021cebd95b908491b233c44c59
Author: Daniel Anselmi <dan...@gm...>
Date: Sat Apr 15 01:13:12 2023 +0200
tcl/ultrascale: add more ultrascale devices
Add more ultrascale devices. Set instruction codes for SSI devices
such that refresh/program read_stat and user registers will work.
Change-Id: Id0a0706f4016eb8a4732725a5b72ae61efd73421
Signed-off-by: Daniel Anselmi <dan...@gm...>
Reviewed-on: https://review.openocd.org/c/openocd/+/7716
Tested-by: jenkins
Reviewed-by: Antonio Borneo <bor...@gm...>
diff --git a/tcl/cpld/xilinx-xcu.cfg b/tcl/cpld/xilinx-xcu.cfg
index 2d74695ed..4d7f26c88 100644
--- a/tcl/cpld/xilinx-xcu.cfg
+++ b/tcl/cpld/xilinx-xcu.cfg
@@ -12,32 +12,61 @@ if { [info exists CHIPNAME] } {
# The various chips in the Ultrascale family have different IR length.
# Set $CHIP before including this file to determine the device.
array set _XCU_DATA {
- XCKU025 {0x03824093 6}
- XCKU035 {0x03823093 6}
- XCKU040 {0x03822093 6}
- XCKU060 {0x03919093 6}
- XCKU095 {0x03844093 6}
- XCKU3P {0x04A63093 6}
- XCKU5P {0x04A62093 6}
- XCKU9P {0x0484A093 6}
- XCKU11P {0x04A4E093 6}
- XCKU13P {0x04A52093 6}
- XCKU15P {0x04A56093 6}
- XCVU065 {0x03939093 6}
- XCVU080 {0x03843093 6}
- XCVU095 {0x03842093 6}
- XCVU3P {0x04B39093 6}
- XCKU085 {0x0380F093 12}
- XCKU115 {0x0390D093 12}
- XCVU125 {0x0392D093 12}
- XCVU5P {0x04B2B093 12}
- XCVU7P {0x04B29093 12}
- XCVU160 {0x03933093 18}
- XCVU190 {0x03931093 18}
- XCVU440 {0x0396D093 18}
- XCVU9P {0x04B31093 18}
- XCVU11P {0x04B49093 18}
- XCVU13P {0x04B51093 24}
+ XCKU025 {0x03824093 6}
+ XCKU035 {0x03823093 6}
+ XCKU040 {0x03822093 6}
+ XCKU060 {0x03919093 6}
+ XCKU060_CIV {0x0381b093 6}
+ XCKU095 {0x03844093 6}
+ XCKU095_CIV {0x03845093 6}
+ XCKU3P {0x04A63093 6}
+ XCKU5P {0x04A62093 6}
+ XCKU9P {0x0484A093 6}
+ XCKU11P {0x04A4E093 6}
+ XCKU11P_CIV {0x04A51093 6}
+ XCKU13P {0x04A52093 6}
+ XCKU15P {0x04A56093 6}
+ XCKU15P_CIV {0x04A59093 6}
+ XCVU065 {0x03939093 6}
+ XCVU065_CIV {0x0393b093 6}
+ XCVU080 {0x03843093 6}
+ XCVU080_CIV {0x03845093 6}
+ XCVU095 {0x03842093 6}
+ XCVU2P {0x04aea093 6}
+ XCVU3P {0x04B39093 6}
+ XCVU3P_CIV {0x04b3d093 6}
+ XCAU10P {0x04AC4033 6}
+ XCAU10P_FFVB676 {0x04AC4093 6}
+ XCAU15P {0x04AC2033 6}
+ XCAU15P_FFVB676 {0x04AC2093 6}
+ XCAU20P {0x04A65093 6}
+ XCAU25P {0x04A64093 6}
+ XCKU5P_CIV {0x04A64093 6}
+ XCKU19P {0x04ACF093 6}
+ XCKU19P_CIV {0x04AD3093 6}
+ XCKU085 {0x0380F093 12}
+ XCKU115 {0x0390D093 12}
+ XCVU125 {0x0392D093 12}
+ XCVU125_CIV {0x0392f093 12}
+ XCVU5P {0x04B2B093 12}
+ XCVU5P_CIV {0x04b2f093 12}
+ XCVU7P {0x04B29093 12}
+ XCVU7P_CIV {0x04b2d093 12}
+ XCVU160 {0x03933093 18}
+ XCVU190 {0x03931093 18}
+ XCVU440 {0x0396D093 18}
+ XCVU440_CIV {0x0396f093 18}
+ XCVU9P {0x04B31093 18}
+ XCVU9P_CIV {0x04b35093 18}
+ XCVU11P {0x04B49093 18}
+ XCVU11P_CIV {0x04b4f093 18}
+ XCU200_FSGD2104 {0x04b37093 18}
+ XCU250 {0x04b57093 24}
+ XCVU13P {0x04B51093 24}
+ XCVU13P_CIV {0x04b55093 24}
+ XCVU15P {0x04ba3093 24}
+ XCVU19P {0x04ba1093 24}
+ XCVU19P_CIV {0x04ba5093 24}
}
if { ![info exists CHIP] } {
@@ -56,6 +85,24 @@ jtag newtap $_CHIPNAME tap -irlen $_IRLEN -ignore-version -expected-id $_EXPID
pld create $_CHIPNAME.pld virtex2 -chain-position $_CHIPNAME.tap -no_jstart
+# set the correct instruction codes for jtag hub and
+# at least the right code for jprogb, jstart and jshutdown for SSI devices
+if { $_IRLEN == 6 } {
+ virtex2 set_user_codes $_CHIPNAME.pld 0x2 0x3 0x22 0x23
+} elseif {$_IRLEN == 12 } {
+ puts "loading bitstream through jtag will not work, but reprogram (refresh)"
+ virtex2 set_instr_codes $_CHIPNAME.pld 0x905 0x904 0x2cb 0x30c 0x34d
+ virtex2 set_user_codes $_CHIPNAME.pld 0x0a4 0x0e4 0x8a4 0x8e4
+} elseif {$_IRLEN == 18 } {
+ puts "loading bitstream through jtag will not work, but reprogram (refresh)"
+ virtex2 set_instr_codes $_CHIPNAME.pld 0x24905 0x24904 0x0b2cb 0x0c30c 0x0d34d
+ virtex2 set_user_codes $_CHIPNAME.pld 0x000a4 0x000e4 0x008a4 0x008e4
+} else {
+ puts "loading bitstream through jtag will not work, but reprogram (refresh)"
+ virtex2 set_instr_codes $_CHIPNAME.pld 0x924905 0x924904 0x2cb2cb 0x30c30c 0x34d34d
+ virtex2 set_user_codes $_CHIPNAME.pld 0x0a4924 0x0e4924 0x8a4924 0x8e4924
+}
+
set XCU_JSHUTDOWN 0x0d
set XCU_JPROGRAM 0x0b
set XCU_JSTART 0x0c
-----------------------------------------------------------------------
Summary of changes:
tcl/cpld/xilinx-xcu.cfg | 99 ++++++++++++++++++++++++++++++++++++-------------
1 file changed, 73 insertions(+), 26 deletions(-)
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commit 659f2e062d2fa2196465d2c3197da316b23285ae
Author: Daniel Anselmi <dan...@gm...>
Date: Sat Apr 15 01:13:12 2023 +0200
tcl/cpld: add config files for virtex-7 devices with ir-length > 6
Adding a single file for each different ir-length.
Change-Id: Iba3dd55b91c28fdb4d0cafa1ededd939fe61a267
Signed-off-by: Daniel Anselmi <dan...@gm...>
Reviewed-on: https://review.openocd.org/c/openocd/+/7715
Reviewed-by: Antonio Borneo <bor...@gm...>
Tested-by: jenkins
diff --git a/tcl/cpld/xilinx-xc7.cfg b/tcl/cpld/xilinx-xc7.cfg
index ebd76ff6b..f5b073374 100644
--- a/tcl/cpld/xilinx-xc7.cfg
+++ b/tcl/cpld/xilinx-xc7.cfg
@@ -40,15 +40,6 @@ jtag newtap $_CHIPNAME tap -irlen 6 -ignore-version \
-expected-id 0x03691093 \
-expected-id 0x03696093
-#jtag newtap $_CHIPNAME tap -irlen 24 -ignore-version \
-# -expected-id 0x036B3093 -expected-id 0x036B7093 \
-# -expected-id 0x036BB093 -expected-id 0x036BF093 \
-# -expected-id 0x036D5093
-
-#jtag newtap $_CHIPNAME tap -irlen 22 -ignore-version -expected-id 0x036D9093
-
-#jtag newtap $_CHIPNAME tap -irlen 38 -ignore-version -expected-id 0x036DB093
-
pld create $_CHIPNAME.pld virtex2 -chain-position $_CHIPNAME.tap -no_jstart
virtex2 set_user_codes $_CHIPNAME.pld 0x02 0x03 0x22 0x23
diff --git a/tcl/cpld/xilinx-xc7v.cfg b/tcl/cpld/xilinx-xc7v.cfg
new file mode 100644
index 000000000..838594832
--- /dev/null
+++ b/tcl/cpld/xilinx-xc7v.cfg
@@ -0,0 +1,37 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
+# xilinx series 7 (artix, kintex, virtex)
+# http://www.xilinx.com/support/documentation/user_guides/ug470_7Series_Config.pdf
+# https://bsdl.info/view.htm?sid=08e275a0cd3ac38988ca59b002289d77
+# https://bsdl.info/view.htm?sid=44dae65d3cf9593188ca59b002289d77
+#
+# this config file is for XC7VX1140T and XC7V2000T only.
+# for other virtex-7 devices use xilinx-xc7vh580t.cfg or xilinx-xc7vh870t.cfg or xilinx-xc7.cfg
+
+if { [info exists CHIPNAME] } {
+ set _CHIPNAME $CHIPNAME
+} else {
+ set _CHIPNAME xc7v
+}
+
+#0x036D5093: XC7VX1140T
+#0x036By093: XC7V2000T
+#y = xx11 = 3, 7, B or F
+
+jtag newtap $_CHIPNAME tap -irlen 24 -ignore-version \
+ -expected-id 0x036B3093 -expected-id 0x036B7093 \
+ -expected-id 0x036BB093 -expected-id 0x036BF093 \
+ -expected-id 0x036D5093
+
+#CFG_OUT_SLR0 0x124924
+#CFG_IN_SLR0 0x164924
+#CFG_OUT_SLR1 0x904924
+#CFG_IN_SLR1 0x905924
+#CFG_OUT_SLR2 0x924124
+#CFG_IN_SLR2 0x924164
+#CFG_OUT_SLR3 0x924904
+#CFG_IN_SLR3 0x924905
+
+pld create $_CHIPNAME.pld virtex2 -chain-position $_CHIPNAME.tap -no_jstart
+# cfg_out cfg_in jprogb jstart jshutdown
+virtex2 set_instr_codes $_CHIPNAME.pld 0x3FFFFF 0x3FFFFF 0x2CB2CB 0x30C30C 0x34D34D
diff --git a/tcl/cpld/xilinx-xc7vh580t.cfg b/tcl/cpld/xilinx-xc7vh580t.cfg
new file mode 100644
index 000000000..374804980
--- /dev/null
+++ b/tcl/cpld/xilinx-xc7vh580t.cfg
@@ -0,0 +1,25 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
+# xilinx series 7 (artix, kintex, virtex)
+# http://www.xilinx.com/support/documentation/user_guides/ug470_7Series_Config.pdf
+# https://bsdl.info/view.htm?sid=65c6b2cfe1467b4988ca59b002289d77
+#
+# this config file is for xc7vh580t only.
+# for other virtex-7 devices use xilinx-xc7vh870t.cfg or xilinx-xc7v.cfg or xilinx-xc7.cfg
+
+if { [info exists CHIPNAME] } {
+ set _CHIPNAME $CHIPNAME
+} else {
+ set _CHIPNAME xc7vh580t
+}
+
+jtag newtap $_CHIPNAME tap -irlen 22 -ignore-version -expected-id 0x036D9093
+
+#CFG_OUT_SLR0 0x0492A0
+#CFG_IN_SLR0 0x0592A0
+#CFG_OUT_SLR1 0x2412A0
+#CFG_IN_SLR1 0x2416A0
+
+pld create $_CHIPNAME.pld virtex2 -chain-position $_CHIPNAME.tap -no_jstart
+# cfg_out cfg_in jprogb jstart jshutdown
+virtex2 set_instr_codes $_CHIPNAME.pld 0x3FFFFF 0x3FFFFF 0x0B2EA0 0x0C32A0 0x0D36A0
diff --git a/tcl/cpld/xilinx-xc7vh870t.cfg b/tcl/cpld/xilinx-xc7vh870t.cfg
new file mode 100644
index 000000000..25e2e6361
--- /dev/null
+++ b/tcl/cpld/xilinx-xc7vh870t.cfg
@@ -0,0 +1,28 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
+# xilinx series 7 (artix, kintex, virtex)
+# http://www.xilinx.com/support/documentation/user_guides/ug470_7Series_Config.pdf
+# https://bsdl.info/view.htm?sid=d9ff0bb764df004588ca59b002289d77
+#
+# this config file is for xc7vh870t only.
+# for other virtex-7 devices use xilinx-xc7vh580t.cfg or xilinx-xc7v.cfg or xilinx-xc7.cfg
+#
+
+if { [info exists CHIPNAME] } {
+ set _CHIPNAME $CHIPNAME
+} else {
+ set _CHIPNAME xc7vh870t
+}
+
+jtag newtap $_CHIPNAME tap -irlen 38 -ignore-version -expected-id 0x036DB093
+
+#CFG_OUT_SLR0 0x0492A092A0
+#CFG_IN_SLR0 0x0592A092A0
+#CFG_OUT_SLR1 0x2412A092A0
+#CFG_IN_SLR1 0x2416A092A0
+#CFG_OUT_SLR2 0x2492A012A0
+#CFG_IN_SLR2 0x2492A016A0
+
+pld create $_CHIPNAME.pld virtex2 -chain-position $_CHIPNAME.tap -no_jstart
+# cfg_out cfg_in jprogb jstart jshutdown
+virtex2 set_instr_codes $_CHIPNAME.pld 0x3FFFFFFFFF 0x3FFFFFFFFF 0x0B2EA02EA0 0x0C32A032A0 0x0D36A036A0
-----------------------------------------------------------------------
Summary of changes:
tcl/cpld/xilinx-xc7.cfg | 9 ---------
tcl/cpld/xilinx-xc7v.cfg | 37 +++++++++++++++++++++++++++++++++++++
tcl/cpld/xilinx-xc7vh580t.cfg | 25 +++++++++++++++++++++++++
tcl/cpld/xilinx-xc7vh870t.cfg | 28 ++++++++++++++++++++++++++++
4 files changed, 90 insertions(+), 9 deletions(-)
create mode 100644 tcl/cpld/xilinx-xc7v.cfg
create mode 100644 tcl/cpld/xilinx-xc7vh580t.cfg
create mode 100644 tcl/cpld/xilinx-xc7vh870t.cfg
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From: openocd-gerrit <ope...@us...> - 2023-07-13 21:38:16
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commit 1a3bd45a61626c5184f9d815ad3cbbb050739f25
Author: Erhan Kurubas <erh...@es...>
Date: Thu Jul 13 23:06:14 2023 +0200
target/espressif: fix build issue with older gcc versions
Compilation on old gcc 4.8.4 fails:
error: missing braces around initializer [-Werror=missing-braces]
Signed-off-by: Erhan Kurubas <erh...@es...>
Change-Id: Ie8b5747f9e23ba5a82bd7f666846e7286284a338
Reviewed-on: https://review.openocd.org/c/openocd/+/7815
Tested-by: jenkins
Reviewed-by: Tomas Vanek <va...@fb...>
diff --git a/src/target/espressif/esp32_apptrace.c b/src/target/espressif/esp32_apptrace.c
index 884224116..125f36632 100644
--- a/src/target/espressif/esp32_apptrace.c
+++ b/src/target/espressif/esp32_apptrace.c
@@ -1252,7 +1252,7 @@ static int esp32_sysview_start(struct esp32_apptrace_cmd_ctx *ctx)
{
uint8_t cmds[] = { SEGGER_SYSVIEW_COMMAND_ID_START };
uint32_t fired_target_num = 0;
- struct esp32_apptrace_target_state target_state[ESP32_APPTRACE_MAX_CORES_NUM] = {0};
+ struct esp32_apptrace_target_state target_state[ESP32_APPTRACE_MAX_CORES_NUM] = {{0}};
struct esp32_sysview_cmd_data *cmd_data = ctx->cmd_priv;
/* get current block id */
-----------------------------------------------------------------------
Summary of changes:
src/target/espressif/esp32_apptrace.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
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commit 4a96776178676963a179879624190acea1e26158
Author: Laurent LEMELE <lau...@st...>
Date: Tue Dec 13 16:12:08 2022 +0100
jtag/stlink: add STLINK-V3PWR support
STLINK-V3PWR is both a standalone debugger probe compatible with
STLINK-V3 and a source measurement unit (SMU).
Link: http://www.st.com/stlink-v3pwr
This code adds support for the debugger probe functionality.
Change-Id: Ib056e55722528f922c5574bb6fbf77e2f2b2b0c1
Signed-off-by: Laurent LEMELE <lau...@st...>
Signed-off-by: Antonio Borneo <bor...@gm...>
Reviewed-on: https://review.openocd.org/c/openocd/+/7755
Tested-by: jenkins
diff --git a/contrib/60-openocd.rules b/contrib/60-openocd.rules
index bb6f478a1..fc35fb9b9 100644
--- a/contrib/60-openocd.rules
+++ b/contrib/60-openocd.rules
@@ -99,6 +99,8 @@ ATTRS{idVendor}=="0483", ATTRS{idProduct}=="374e", MODE="660", GROUP="plugdev",
ATTRS{idVendor}=="0483", ATTRS{idProduct}=="374f", MODE="660", GROUP="plugdev", TAG+="uaccess"
ATTRS{idVendor}=="0483", ATTRS{idProduct}=="3753", MODE="660", GROUP="plugdev", TAG+="uaccess"
ATTRS{idVendor}=="0483", ATTRS{idProduct}=="3754", MODE="660", GROUP="plugdev", TAG+="uaccess"
+ATTRS{idVendor}=="0483", ATTRS{idProduct}=="3755", MODE="660", GROUP="plugdev", TAG+="uaccess"
+ATTRS{idVendor}=="0483", ATTRS{idProduct}=="3757", MODE="660", GROUP="plugdev", TAG+="uaccess"
# Cypress SuperSpeed Explorer Kit
ATTRS{idVendor}=="04b4", ATTRS{idProduct}=="0007", MODE="660", GROUP="plugdev", TAG+="uaccess"
diff --git a/doc/openocd.texi b/doc/openocd.texi
index d99917e0d..12a8ca56d 100644
--- a/doc/openocd.texi
+++ b/doc/openocd.texi
@@ -463,6 +463,12 @@ They only work with STMicroelectronics chips, notably STM32 and STM8.
@item @b{STLINK-V3}
@* This is available standalone and as part of some kits.
@* Link: @url{http://www.st.com/stlink-v3}
+@item @b{STLINK-V3PWR}
+@* This is available standalone.
+Beside the debugger functionality, the probe includes a SMU (source
+measurement unit) aimed at analyzing power consumption during code
+execution. The SMU is not supported by OpenOCD.
+@* Link: @url{http://www.st.com/stlink-v3pwr}
@end itemize
For info the original ST-LINK enumerates using the mass storage usb class; however,
@@ -3184,7 +3190,7 @@ passed as is to the underlying adapter layout handler.
@anchor{st_link_dap_interface}
@deffn {Interface Driver} {st-link}
This is a driver that supports STMicroelectronics adapters ST-LINK/V2
-(from firmware V2J24) and STLINK-V3, thanks to a new API that provides
+(from firmware V2J24), STLINK-V3 and STLINK-V3PWR, thanks to a new API that provides
directly access the arm ADIv5 DAP.
The new API provide access to multiple AP on the same DAP, but the
diff --git a/src/jtag/drivers/stlink_usb.c b/src/jtag/drivers/stlink_usb.c
index ee629542b..2c5b63dd6 100644
--- a/src/jtag/drivers/stlink_usb.c
+++ b/src/jtag/drivers/stlink_usb.c
@@ -84,6 +84,8 @@
#define STLINK_V3S_PID (0x374F)
#define STLINK_V3_2VCP_PID (0x3753)
#define STLINK_V3E_NO_MSD_PID (0x3754)
+#define STLINK_V3P_USBLOADER_PID (0x3755)
+#define STLINK_V3P_PID (0x3757)
/*
* ST-Link/V1, ST-Link/V2 and ST-Link/V2.1 are full-speed USB devices and
@@ -1297,8 +1299,8 @@ static int stlink_usb_version(void *handle)
break;
}
- /* STLINK-V3 requires a specific command */
- if (v == 3 && x == 0 && y == 0) {
+ /* STLINK-V3 & STLINK-V3P require a specific command */
+ if (v >= 3 && x == 0 && y == 0) {
stlink_usb_init_buffer(handle, h->rx_ep, 16);
h->cmdbuf[h->cmdidx++] = STLINK_APIV3_GET_VERSION_EX;
@@ -1414,6 +1416,41 @@ static int stlink_usb_version(void *handle)
if (h->version.jtag >= 6)
flags |= STLINK_F_HAS_RW8_512BYTES;
+ break;
+ case 4:
+ /* STLINK-V3P use api-v3 */
+ h->version.jtag_api = STLINK_JTAG_API_V3;
+
+ /* STLINK-V3P is a superset of ST-LINK/V3 */
+
+ /* API for trace */
+ /* API for target voltage */
+ flags |= STLINK_F_HAS_TRACE;
+
+ /* preferred API to get last R/W status */
+ flags |= STLINK_F_HAS_GETLASTRWSTATUS2;
+
+ /* API to access DAP registers */
+ flags |= STLINK_F_HAS_DAP_REG;
+
+ /* API to read/write memory at 16 bit */
+ /* API to write memory without address increment */
+ flags |= STLINK_F_HAS_MEM_16BIT;
+
+ /* API required to init AP before any AP access */
+ flags |= STLINK_F_HAS_AP_INIT;
+
+ /* API required to return proper error code on close AP */
+ flags |= STLINK_F_FIX_CLOSE_AP;
+
+ /* Banked regs (DPv1 & DPv2) support */
+ /* API to read memory without address increment */
+ /* Memory R/W supports CSW */
+ flags |= STLINK_F_HAS_DPBANKSEL;
+
+ /* 8bit read/write max packet size 512 bytes */
+ flags |= STLINK_F_HAS_RW8_512BYTES;
+
break;
default:
break;
@@ -3402,6 +3439,8 @@ static int stlink_usb_usb_open(void *handle, struct hl_interface_param_s *param)
case STLINK_V3S_PID:
case STLINK_V3_2VCP_PID:
case STLINK_V3E_NO_MSD_PID:
+ case STLINK_V3P_USBLOADER_PID:
+ case STLINK_V3P_PID:
h->version.stlink = 3;
h->tx_ep = STLINK_V2_1_TX_EP;
h->trace_ep = STLINK_V2_1_TRACE_EP;
@@ -3820,7 +3859,7 @@ static int stlink_config_trace(void *handle, bool enabled,
return ERROR_FAIL;
}
- unsigned int max_trace_freq = (h->version.stlink == 3) ?
+ unsigned int max_trace_freq = (h->version.stlink >= 3) ?
STLINK_V3_TRACE_MAX_HZ : STLINK_TRACE_MAX_HZ;
/* Only concern ourselves with the frequency if the STlink is processing it. */
diff --git a/tcl/interface/stlink-dap.cfg b/tcl/interface/stlink-dap.cfg
index 5c24cbdab..99c81c180 100644
--- a/tcl/interface/stlink-dap.cfg
+++ b/tcl/interface/stlink-dap.cfg
@@ -11,7 +11,7 @@
#
adapter driver st-link
-st-link vid_pid 0x0483 0x3744 0x0483 0x3748 0x0483 0x374b 0x0483 0x374d 0x0483 0x374e 0x0483 0x374f 0x0483 0x3752 0x0483 0x3753 0x0483 0x3754
+st-link vid_pid 0x0483 0x3744 0x0483 0x3748 0x0483 0x374b 0x0483 0x374d 0x0483 0x374e 0x0483 0x374f 0x0483 0x3752 0x0483 0x3753 0x0483 0x3754 0x0483 0x3755 0x0483 0x3757
# transport select dapdirect_jtag
# transport select dapdirect_swd
diff --git a/tcl/interface/stlink.cfg b/tcl/interface/stlink.cfg
index e4906b74e..8578bf219 100644
--- a/tcl/interface/stlink.cfg
+++ b/tcl/interface/stlink.cfg
@@ -8,7 +8,7 @@
adapter driver hla
hla_layout stlink
hla_device_desc "ST-LINK"
-hla_vid_pid 0x0483 0x3744 0x0483 0x3748 0x0483 0x374b 0x0483 0x374d 0x0483 0x374e 0x0483 0x374f 0x0483 0x3752 0x0483 0x3753 0x0483 0x3754
+hla_vid_pid 0x0483 0x3744 0x0483 0x3748 0x0483 0x374b 0x0483 0x374d 0x0483 0x374e 0x0483 0x374f 0x0483 0x3752 0x0483 0x3753 0x0483 0x3754 0x0483 0x3755 0x0483 0x3757
# Optionally specify the serial number of ST-LINK/V2 usb device. ST-LINK/V2
# devices seem to have serial numbers with unreadable characters. ST-LINK/V2
-----------------------------------------------------------------------
Summary of changes:
contrib/60-openocd.rules | 2 ++
doc/openocd.texi | 8 +++++++-
src/jtag/drivers/stlink_usb.c | 45 ++++++++++++++++++++++++++++++++++++++++---
tcl/interface/stlink-dap.cfg | 2 +-
tcl/interface/stlink.cfg | 2 +-
5 files changed, 53 insertions(+), 6 deletions(-)
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From: openocd-gerrit <ope...@us...> - 2023-07-08 18:05:02
|
This is an automated email from the git hooks/post-receive script. It was
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The branch, master has been updated
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commit a27907aed1cd26bcbaac834343f08146fc8fa1fe
Author: Daniel Anselmi <dan...@gm...>
Date: Sat Apr 15 01:13:12 2023 +0200
ipdbg/pld: ipdbg can get tap and hub/ir from pld driver.
To start a ipdbg server one needs to know the tap and the
instruction code to reach the IPDBG-Hub. This instruction is
vendor/family specific. Knowledge which can be provided by the
pld driver.
Change-Id: I13eeb9fee895d65cd48544da4704fcc9b528b869
Signed-off-by: Daniel Anselmi <dan...@gm...>
Reviewed-on: https://review.openocd.org/c/openocd/+/7369
Tested-by: jenkins
Reviewed-by: Antonio Borneo <bor...@gm...>
diff --git a/doc/openocd.texi b/doc/openocd.texi
index ee67e7582..d99917e0d 100644
--- a/doc/openocd.texi
+++ b/doc/openocd.texi
@@ -8674,9 +8674,10 @@ The load command for the FPGA @var{pld_name} will use a length for the preload o
@end deffn
-@deffn {FPGA Driver} {efinix}
+@deffn {FPGA Driver} {efinix} [@option{-family} <name>]
Both families (Trion and Titanium) sold by Efinix are supported as both use the same protocol for In-System Configuration.
This driver can be used to load the bitstream into the FPGA.
+For the option @option{-family} @var{name} is one of @var{trion|titanium}.
@end deffn
@@ -11834,7 +11835,7 @@ In a session using JTAG for its transport protocol, OpenOCD supports the functio
of a JTAG-Host. The JTAG-Host is needed to connect the circuit over JTAG to the
control-software. For more details see @url{http://ipdbg.org}.
-@deffn {Command} {ipdbg} [@option{-start|-stop}] @option{-tap @var{tapname}} @option{-hub @var{ir_value} [@var{dr_length}]} [@option{-port @var{number}}] [@option{-tool @var{number}}] [@option{-vir [@var{vir_value} [@var{length} [@var{instr_code}]]]}]
+@deffn {Command} {ipdbg} [@option{-start|-stop}] @option{-tap @var{tapname}} @option{-hub @var{ir_value} [@var{dr_length}]} [@option{-vir [@var{vir_value} [@var{length} [@var{instr_code}]]]}] [@option{-port @var{number}}] [@option{-tool @var{number}}]
Starts or stops a IPDBG JTAG-Host server. Arguments can be specified in any order.
Command options:
@@ -11843,15 +11844,28 @@ Command options:
@item @option{-tap @var{tapname}} targeting the TAP @var{tapname}.
@item @option{-hub @var{ir_value}} states that the JTAG hub is
reachable with dr-scans while the JTAG instruction register has the value @var{ir_value}.
-@item @option{-port @var{number}} tcp port number where the JTAG-Host is listening.
-@item @option{-tool @var{number}} number of the tool/feature. These corresponds to the ports "data_(up/down)_(0..6)" at the JtagHub.
-@item @option{-vir [@var{vir_value} [@var{length} [@var{instr_code}]]]} On some devices, the user data-register is only reachable if there is a
+@item @option{-port @var{number}} tcp port number where the JTAG-Host will listen. The default is 4242 which is used when the option is not given.
+@item @option{-tool @var{number}} number of the tool/feature. These corresponds to the ports "data_(up/down)_(0..6)" at the JtagHub. The default is 1 which is used when the option is not given.
+@item @option{-vir [@var{vir_value} [@var{length} [@var{instr_code}]]]} On some devices, the user data-register is reachable if there is a
specific value in a second dr. This second dr is called vir (virtual ir). With this parameter given, the IPDBG satisfies this condition prior an
access to the IPDBG-Hub. The value shifted into the vir is given by the first parameter @var{vir_value} (default: 0x11). The second
parameter @var{length} is the length of the vir data register (default: 5). With the @var{instr_code} (default: 0x00e) parameter the ir value to
shift data through vir can be configured.
@end itemize
@end deffn
+or
+@deffn {Command} {ipdbg} [@option{-start|-stop}] @option{-pld @var{name} [@var{user}]} [@option{-port @var{number}}] [@option{-tool @var{number}}]
+Also starts or stops a IPDBG JTAG-Host server. The pld drivers are able to provide the tap and hub/IR for the IPDBG JTAG-Host server.
+With the @option{-pld @var{name} [@var{user}]} the information from the pld-driver is used and the options @option{-tap} and @option{-hub} are not required.
+The defined driver for the pld @var{name} gets selected. (The pld devices names can be shown by the command @command{pld devices}).
+
+The @verb{|USERx|} instructions are vendor specific and don't change between families of the same vendor.
+So if there's a pld driver for your vendor it should work with your FPGA even when the driver is not compatible with your device for the remaining features. If your device/vendor is not supported you have to use the previous command.
+
+With [@var{user}] one can select a different @verb{|USERx|}-Instruction. If the IPDBG JTAG-Hub is used without modification the default value of 1 which selects the first @verb{|USERx|} instruction is adequate.
+
+The remaining options are described in the previous command.
+@end deffn
Examples:
@example
@@ -11866,6 +11880,13 @@ ipdbg -start -tap 10m50.tap -hub 0x00C -vir -port 60000 -tool 1
Starts a server listening on tcp-port 60000 which connects to tool 1 (data_up_1/data_down_1).
The connection is through the TAP of a Intel MAX10 virtual jtag component (sld_instance_index is 0; sld_ir_width is smaller than 5).
+@example
+ipdbg -start -pld xc7.pld -port 5555 -tool 0
+@end example
+Starts a server listening on tcp-port 5555 which connects to tool 0 (data_up_0/data_down_0).
+The TAP and ir value used to reach the JTAG Hub is given by the pld driver.
+
+
@node Utility Commands
@chapter Utility Commands
@cindex Utility Commands
diff --git a/src/pld/efinix.c b/src/pld/efinix.c
index 370f18426..8350cb1a2 100644
--- a/src/pld/efinix.c
+++ b/src/pld/efinix.c
@@ -16,13 +16,29 @@
#define PROGRAM 0x4
#define ENTERUSER 0x7
+#define USER1 0x8
+#define USER2 0x9
+#define USER3 0xa
+#define USER4 0xb
+
+enum efinix_family_e {
+ EFINIX_TRION,
+ EFINIX_TITANIUM,
+ EFINIX_UNKNOWN
+};
#define TRAILING_ZEROS 4000
#define RUNTEST_START_CYCLES 100
#define RUNTEST_FINISH_CYCLES 100
+struct efinix_device {
+ uint32_t idcode;
+ int num_user;
+};
+
struct efinix_pld_device {
struct jtag_tap *tap;
+ enum efinix_family_e family;
};
static int efinix_read_bit_file(struct raw_bit_file *bit_file, const char *filename)
@@ -188,9 +204,54 @@ static int efinix_load(struct pld_device *pld_device, const char *filename)
return retval;
}
+static int efinix_get_ipdbg_hub(int user_num, struct pld_device *pld_device, struct pld_ipdbg_hub *hub)
+{
+ if (!pld_device)
+ return ERROR_FAIL;
+
+ struct efinix_pld_device *pld_device_info = pld_device->driver_priv;
+
+ if (!pld_device_info || !pld_device_info->tap)
+ return ERROR_FAIL;
+
+ hub->tap = pld_device_info->tap;
+
+ if (pld_device_info->family == EFINIX_UNKNOWN) {
+ LOG_ERROR("family unknown, please specify for 'pld create'");
+ return ERROR_FAIL;
+ }
+ int num_user = 2; /* trion */
+ if (pld_device_info->family == EFINIX_TITANIUM)
+ num_user = 4;
+
+ if (user_num > num_user) {
+ LOG_ERROR("Devices has only user register 1 to %d", num_user);
+ return ERROR_FAIL;
+ }
+
+ switch (user_num) {
+ case 1:
+ hub->user_ir_code = USER1;
+ break;
+ case 2:
+ hub->user_ir_code = USER2;
+ break;
+ case 3:
+ hub->user_ir_code = USER3;
+ break;
+ case 4:
+ hub->user_ir_code = USER4;
+ break;
+ default:
+ LOG_ERROR("efinix devices only have user register 1 to %d", num_user);
+ return ERROR_FAIL;
+ }
+ return ERROR_OK;
+}
+
PLD_CREATE_COMMAND_HANDLER(efinix_pld_create_command)
{
- if (CMD_ARGC != 4)
+ if (CMD_ARGC != 4 && CMD_ARGC != 6)
return ERROR_COMMAND_SYNTAX_ERROR;
if (strcmp(CMD_ARGV[2], "-chain-position") != 0)
@@ -202,12 +263,28 @@ PLD_CREATE_COMMAND_HANDLER(efinix_pld_create_command)
return ERROR_FAIL;
}
+ enum efinix_family_e family = EFINIX_UNKNOWN;
+ if (CMD_ARGC == 6) {
+ if (strcmp(CMD_ARGV[4], "-family") != 0)
+ return ERROR_COMMAND_SYNTAX_ERROR;
+
+ if (strcmp(CMD_ARGV[5], "trion") == 0) {
+ family = EFINIX_TRION;
+ } else if (strcmp(CMD_ARGV[5], "titanium") == 0) {
+ family = EFINIX_TITANIUM;
+ } else {
+ command_print(CMD, "unknown family");
+ return ERROR_FAIL;
+ }
+ }
+
struct efinix_pld_device *efinix_info = malloc(sizeof(struct efinix_pld_device));
if (!efinix_info) {
LOG_ERROR("Out of memory");
return ERROR_FAIL;
}
efinix_info->tap = tap;
+ efinix_info->family = family;
pld->driver_priv = efinix_info;
@@ -218,4 +295,5 @@ struct pld_driver efinix_pld = {
.name = "efinix",
.pld_create_command = &efinix_pld_create_command,
.load = &efinix_load,
+ .get_ipdbg_hub = efinix_get_ipdbg_hub,
};
diff --git a/src/pld/gowin.c b/src/pld/gowin.c
index ab3582c4c..c42b2f22c 100644
--- a/src/pld/gowin.c
+++ b/src/pld/gowin.c
@@ -29,6 +29,9 @@
#define ERASE_FLASH 0x75
#define ENABLE_2ND_FLASH 0x78
+#define USER1 0x42
+#define USER2 0x43
+
#define STAUS_MASK_MEMORY_ERASE BIT(5)
#define STAUS_MASK_SYSTEM_EDIT_MODE BIT(7)
@@ -449,6 +452,29 @@ static int gowin_reload_command(struct pld_device *pld_device)
return gowin_reload(gowin_info->tap);
}
+static int gowin_get_ipdbg_hub(int user_num, struct pld_device *pld_device, struct pld_ipdbg_hub *hub)
+{
+ if (!pld_device)
+ return ERROR_FAIL;
+
+ struct gowin_pld_device *pld_device_info = pld_device->driver_priv;
+
+ if (!pld_device_info || !pld_device_info->tap)
+ return ERROR_FAIL;
+
+ hub->tap = pld_device_info->tap;
+
+ if (user_num == 1) {
+ hub->user_ir_code = USER1;
+ } else if (user_num == 2) {
+ hub->user_ir_code = USER2;
+ } else {
+ LOG_ERROR("gowin devices only have user register 1 & 2");
+ return ERROR_FAIL;
+ }
+ return ERROR_OK;
+}
+
COMMAND_HANDLER(gowin_read_status_command_handler)
{
if (CMD_ARGC != 1)
@@ -568,4 +594,5 @@ struct pld_driver gowin_pld = {
.commands = gowin_command_handler,
.pld_create_command = &gowin_pld_create_command,
.load = &gowin_load_to_sram,
+ .get_ipdbg_hub = gowin_get_ipdbg_hub,
};
diff --git a/src/pld/intel.c b/src/pld/intel.c
index 92a790b54..e5c927306 100644
--- a/src/pld/intel.c
+++ b/src/pld/intel.c
@@ -18,6 +18,8 @@
#include "raw_bit.h"
#define BYPASS 0x3FF
+#define USER0 0x00C
+#define USER1 0x00E
enum intel_family_e {
INTEL_CYCLONEIII,
@@ -337,6 +339,29 @@ static int intel_load(struct pld_device *pld_device, const char *filename)
return jtag_execute_queue();
}
+static int intel_get_ipdbg_hub(int user_num, struct pld_device *pld_device, struct pld_ipdbg_hub *hub)
+{
+ if (!pld_device)
+ return ERROR_FAIL;
+
+ struct intel_pld_device *pld_device_info = pld_device->driver_priv;
+
+ if (!pld_device_info || !pld_device_info->tap)
+ return ERROR_FAIL;
+
+ hub->tap = pld_device_info->tap;
+
+ if (user_num == 0) {
+ hub->user_ir_code = USER0;
+ } else if (user_num == 1) {
+ hub->user_ir_code = USER1;
+ } else {
+ LOG_ERROR("intel devices only have user register 0 & 1");
+ return ERROR_FAIL;
+ }
+ return ERROR_OK;
+}
+
COMMAND_HANDLER(intel_set_bscan_command_handler)
{
unsigned int boundary_scan_length;
@@ -472,4 +497,5 @@ struct pld_driver intel_pld = {
.commands = intel_command_handler,
.pld_create_command = &intel_pld_create_command,
.load = &intel_load,
+ .get_ipdbg_hub = intel_get_ipdbg_hub,
};
diff --git a/src/pld/lattice.c b/src/pld/lattice.c
index 63d730677..2075f4490 100644
--- a/src/pld/lattice.c
+++ b/src/pld/lattice.c
@@ -18,6 +18,9 @@
#include "certus.h"
#define PRELOAD 0x1C
+#define USER1 0x32
+#define USER2 0x38
+
struct lattice_devices_elem {
uint32_t id;
@@ -316,6 +319,29 @@ static int lattice_load_command(struct pld_device *pld_device, const char *filen
return retval;
}
+int lattice_get_ipdbg_hub(int user_num, struct pld_device *pld_device, struct pld_ipdbg_hub *hub)
+{
+ if (!pld_device)
+ return ERROR_FAIL;
+
+ struct lattice_pld_device *pld_device_info = pld_device->driver_priv;
+
+ if (!pld_device_info || !pld_device_info->tap)
+ return ERROR_FAIL;
+
+ hub->tap = pld_device_info->tap;
+
+ if (user_num == 1) {
+ hub->user_ir_code = USER1;
+ } else if (user_num == 2) {
+ hub->user_ir_code = USER2;
+ } else {
+ LOG_ERROR("lattice devices only have user register 1 & 2");
+ return ERROR_FAIL;
+ }
+ return ERROR_OK;
+}
+
PLD_CREATE_COMMAND_HANDLER(lattice_pld_create_command)
{
if (CMD_ARGC != 4 && CMD_ARGC != 6)
@@ -524,4 +550,5 @@ struct pld_driver lattice_pld = {
.commands = lattice_command_handler,
.pld_create_command = &lattice_pld_create_command,
.load = &lattice_load_command,
+ .get_ipdbg_hub = lattice_get_ipdbg_hub,
};
diff --git a/src/pld/pld.h b/src/pld/pld.h
index 8a2a11831..b736e6ae2 100644
--- a/src/pld/pld.h
+++ b/src/pld/pld.h
@@ -15,11 +15,17 @@ struct pld_device;
#define __PLD_CREATE_COMMAND(name) \
COMMAND_HELPER(name, struct pld_device *pld)
+struct pld_ipdbg_hub {
+ struct jtag_tap *tap;
+ unsigned int user_ir_code;
+};
+
struct pld_driver {
const char *name;
__PLD_CREATE_COMMAND((*pld_create_command));
const struct command_registration *commands;
int (*load)(struct pld_device *pld_device, const char *filename);
+ int (*get_ipdbg_hub)(int user_num, struct pld_device *pld_device, struct pld_ipdbg_hub *hub);
};
#define PLD_CREATE_COMMAND_HANDLER(name) \
diff --git a/src/pld/virtex2.c b/src/pld/virtex2.c
index 9007a55d2..a97c7c6d6 100644
--- a/src/pld/virtex2.c
+++ b/src/pld/virtex2.c
@@ -306,6 +306,26 @@ COMMAND_HANDLER(virtex2_handle_read_stat_command)
return ERROR_OK;
}
+static int xilinx_get_ipdbg_hub(int user_num, struct pld_device *pld_device, struct pld_ipdbg_hub *hub)
+{
+ if (!pld_device)
+ return ERROR_FAIL;
+
+ struct virtex2_pld_device *pld_device_info = pld_device->driver_priv;
+
+ if (!pld_device_info || !pld_device_info->tap)
+ return ERROR_FAIL;
+
+ hub->tap = pld_device_info->tap;
+ if (user_num < 1 || (unsigned int)user_num > pld_device_info->command_set.num_user) {
+ LOG_ERROR("device has only user register 1 to %d", pld_device_info->command_set.num_user);
+ return ERROR_FAIL;
+ }
+
+ hub->user_ir_code = pld_device_info->command_set.user[user_num - 1];
+ return ERROR_OK;
+}
+
COMMAND_HANDLER(virtex2_handle_set_instuction_codes_command)
{
if (CMD_ARGC < 6 || CMD_ARGC > (6 + VIRTEX2_MAX_USER_INSTRUCTIONS))
@@ -439,4 +459,5 @@ struct pld_driver virtex2_pld = {
.commands = virtex2_command_handler,
.pld_create_command = &virtex2_pld_create_command,
.load = &virtex2_load,
+ .get_ipdbg_hub = xilinx_get_ipdbg_hub,
};
diff --git a/src/server/ipdbg.c b/src/server/ipdbg.c
index 69d0f5755..3fae0a98d 100644
--- a/src/server/ipdbg.c
+++ b/src/server/ipdbg.c
@@ -10,11 +10,12 @@
#include <jtag/jtag.h>
#include <server/server.h>
#include <target/target.h>
+#include <pld/pld.h>
#include "ipdbg.h"
#define IPDBG_BUFFER_SIZE 16384
-#define IPDBG_MIN_NUM_OF_OPTIONS 4
+#define IPDBG_MIN_NUM_OF_OPTIONS 2
#define IPDBG_MAX_NUM_OF_OPTIONS 14
#define IPDBG_MIN_DR_LENGTH 11
#define IPDBG_MAX_DR_LENGTH 13
@@ -716,6 +717,7 @@ COMMAND_HANDLER(handle_ipdbg_command)
uint32_t virtual_ir_length = 5;
uint32_t virtual_ir_value = 0x11;
struct ipdbg_virtual_ir_info *virtual_ir = NULL;
+ int user_num = 1;
if ((CMD_ARGC < IPDBG_MIN_NUM_OF_OPTIONS) || (CMD_ARGC > IPDBG_MAX_NUM_OF_OPTIONS))
return ERROR_COMMAND_SYNTAX_ERROR;
@@ -742,6 +744,34 @@ COMMAND_HANDLER(handle_ipdbg_command)
IPDBG_MIN_DR_LENGTH, IPDBG_MAX_DR_LENGTH);
return ERROR_FAIL;
}
+ } else if (strcmp(CMD_ARGV[i], "-pld") == 0) {
+ ++i;
+ if (i >= CMD_ARGC || CMD_ARGV[i][0] == '-')
+ return ERROR_COMMAND_SYNTAX_ERROR;
+ struct pld_device *device = get_pld_device_by_name_or_numstr(CMD_ARGV[i]);
+ if (!device || !device->driver) {
+ command_print(CMD, "pld device '#%s' is out of bounds or unknown", CMD_ARGV[i]);
+ return ERROR_FAIL;
+ }
+ COMMAND_PARSE_OPTIONAL_NUMBER(int, i, user_num);
+ struct pld_ipdbg_hub pld_hub;
+ struct pld_driver *driver = device->driver;
+ if (!driver->get_ipdbg_hub) {
+ command_print(CMD, "pld driver has no ipdbg support");
+ return ERROR_FAIL;
+ }
+ if (driver->get_ipdbg_hub(user_num, device, &pld_hub) != ERROR_OK) {
+ command_print(CMD, "unable to retrieve hub from pld driver");
+ return ERROR_FAIL;
+ }
+ if (!pld_hub.tap) {
+ command_print(CMD, "no tap received from pld driver");
+ return ERROR_FAIL;
+ }
+ hub_configured = true;
+ user_instruction = pld_hub.user_ir_code;
+ tap = pld_hub.tap;
+
} else if (strcmp(CMD_ARGV[i], "-vir") == 0) {
COMMAND_PARSE_OPTIONAL_NUMBER(u32, i, virtual_ir_value);
COMMAND_PARSE_OPTIONAL_NUMBER(u32, i, virtual_ir_length);
diff --git a/tcl/fpga/efinix_titanium.cfg b/tcl/fpga/efinix_titanium.cfg
index 8b356cb85..3c2cdd71f 100644
--- a/tcl/fpga/efinix_titanium.cfg
+++ b/tcl/fpga/efinix_titanium.cfg
@@ -20,4 +20,4 @@ jtag newtap $_CHIPNAME tap -irlen 5 -ignore-version \
-expected-id 0x00680A79 \
-expected-id 0x00684A79
-pld create $_CHIPNAME.pld efinix -chain-position $_CHIPNAME.tap
+pld create $_CHIPNAME.pld efinix -chain-position $_CHIPNAME.tap -family titanium
diff --git a/tcl/fpga/efinix_trion.cfg b/tcl/fpga/efinix_trion.cfg
index 2b50d8c5d..1c789f564 100644
--- a/tcl/fpga/efinix_trion.cfg
+++ b/tcl/fpga/efinix_trion.cfg
@@ -14,4 +14,4 @@ jtag newtap $_CHIPNAME tap -irlen 4 -ignore-version \
-expected-id 0x00240A79 \
-expected-id 0x00220A79
-pld create $_CHIPNAME.pld efinix -chain-position $_CHIPNAME.tap
+pld create $_CHIPNAME.pld efinix -chain-position $_CHIPNAME.tap -family trion
-----------------------------------------------------------------------
Summary of changes:
doc/openocd.texi | 31 ++++++++++++++---
src/pld/efinix.c | 80 +++++++++++++++++++++++++++++++++++++++++++-
src/pld/gowin.c | 27 +++++++++++++++
src/pld/intel.c | 26 ++++++++++++++
src/pld/lattice.c | 27 +++++++++++++++
src/pld/pld.h | 6 ++++
src/pld/virtex2.c | 21 ++++++++++++
src/server/ipdbg.c | 32 +++++++++++++++++-
tcl/fpga/efinix_titanium.cfg | 2 +-
tcl/fpga/efinix_trion.cfg | 2 +-
10 files changed, 245 insertions(+), 9 deletions(-)
hooks/post-receive
--
Main OpenOCD repository
|
|
From: openocd-gerrit <ope...@us...> - 2023-07-08 18:03:50
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".
The branch, master has been updated
via 373d7eaa706b4895cb94e5f563526aec865c8814 (commit)
from e95f8e2b25c36fd290c29b4b553da5d16dfc620f (commit)
Those revisions listed above that are new to this repository have
not appeared on any other notification email; so we list those
revisions in full, below.
- Log -----------------------------------------------------------------
commit 373d7eaa706b4895cb94e5f563526aec865c8814
Author: Daniel Anselmi <dan...@gm...>
Date: Sat Apr 15 01:13:12 2023 +0200
pld/virtex2: add program/refresh command
Change-Id: If6d237a6f27c4232849f73d08e7ca74276e6d464
Signed-off-by: Daniel Anselmi <dan...@gm...>
Reviewed-on: https://review.openocd.org/c/openocd/+/7714
Reviewed-by: Antonio Borneo <bor...@gm...>
Tested-by: jenkins
diff --git a/doc/openocd.texi b/doc/openocd.texi
index cab30c6af..ee67e7582 100644
--- a/doc/openocd.texi
+++ b/doc/openocd.texi
@@ -8638,6 +8638,10 @@ SSI devices are using different values.
Change values for boundary scan instructions selecting the registers USER1 to USER4.
Description of the arguments can be found at command @command{virtex2 set_instr_codes}.
@end deffn
+
+@deffn {Command} {virtex2 program} pld_name
+Load the bitstream from external memory for FPGA @var{pld_name}. A.k.a. refresh.
+@end deffn
@end deffn
diff --git a/src/pld/virtex2.c b/src/pld/virtex2.c
index dfcf4cf34..9007a55d2 100644
--- a/src/pld/virtex2.c
+++ b/src/pld/virtex2.c
@@ -143,6 +143,35 @@ static int virtex2_read_stat(struct pld_device *pld_device, uint32_t *status)
return retval;
}
+static int virtex2_program(struct pld_device *pld_device)
+{
+ struct virtex2_pld_device *virtex2_info = pld_device->driver_priv;
+ if (!virtex2_info)
+ return ERROR_FAIL;
+
+ int retval = virtex2_set_instr(virtex2_info->tap, virtex2_info->command_set.jshutdown);
+ if (retval != ERROR_OK)
+ return retval;
+
+ retval = virtex2_set_instr(virtex2_info->tap, virtex2_info->command_set.jprog_b);
+ if (retval != ERROR_OK)
+ return retval;
+
+ jtag_add_runtest(62000, TAP_IDLE);
+ if (!(virtex2_info->no_jstart)) {
+ retval = virtex2_set_instr(virtex2_info->tap, virtex2_info->command_set.jstart);
+ if (retval != ERROR_OK)
+ return retval;
+ }
+
+ retval = virtex2_set_instr(virtex2_info->tap, virtex2_info->command_set.bypass);
+ if (retval != ERROR_OK)
+ return retval;
+ jtag_add_runtest(2000, TAP_IDLE);
+
+ return jtag_execute_queue();
+}
+
static int virtex2_load_prepare(struct pld_device *pld_device)
{
struct virtex2_pld_device *virtex2_info = pld_device->driver_priv;
@@ -236,6 +265,22 @@ static int virtex2_load(struct pld_device *pld_device, const char *filename)
return retval;
}
+COMMAND_HANDLER(virtex2_handle_program_command)
+{
+ struct pld_device *device;
+
+ if (CMD_ARGC != 1)
+ return ERROR_COMMAND_SYNTAX_ERROR;
+
+ device = get_pld_device_by_name_or_numstr(CMD_ARGV[0]);
+ if (!device) {
+ command_print(CMD, "pld device '#%s' is out of bounds or unknown", CMD_ARGV[0]);
+ return ERROR_FAIL;
+ }
+
+ return virtex2_program(device);
+}
+
COMMAND_HANDLER(virtex2_handle_read_stat_command)
{
struct pld_device *device;
@@ -368,6 +413,12 @@ static const struct command_registration virtex2_exec_command_handlers[] = {
.handler = virtex2_handle_set_user_codes_command,
.help = "set instructions codes used for jtag-hub",
.usage = "pld_name user1 [user2 [user3 [user4]]]",
+ }, {
+ .name = "program",
+ .mode = COMMAND_EXEC,
+ .handler = virtex2_handle_program_command,
+ .help = "start loading of configuration (refresh)",
+ .usage = "pld_name",
},
COMMAND_REGISTRATION_DONE
};
diff --git a/tcl/cpld/xilinx-xc6s.cfg b/tcl/cpld/xilinx-xc6s.cfg
index 7e32094d4..92b260577 100644
--- a/tcl/cpld/xilinx-xc6s.cfg
+++ b/tcl/cpld/xilinx-xc6s.cfg
@@ -35,6 +35,7 @@ set XC6S_JSTART 0x0c
set XC6S_BYPASS 0x3f
proc xc6s_program {tap} {
+ echo "DEPRECATED! use 'virtex2 program ...' not 'xc6s_program'"
global XC6S_JSHUTDOWN XC6S_JPROGRAM XC6S_JSTART XC6S_BYPASS
irscan $tap $XC6S_JSHUTDOWN
irscan $tap $XC6S_JPROGRAM
@@ -44,6 +45,7 @@ proc xc6s_program {tap} {
#xtp038 and xc3sprog approach
proc xc6s_program_iprog {tap} {
+ echo "DEPRECATED! use 'virtex2 program ...' not 'xc6s_program_iprog'"
global XC6S_JSHUTDOWN XC6S_JSTART XC6S_BYPASS XC6S_CFG_IN
irscan $tap $XC6S_JSHUTDOWN
runtest 16
diff --git a/tcl/cpld/xilinx-xc7.cfg b/tcl/cpld/xilinx-xc7.cfg
index 93ec04990..ebd76ff6b 100644
--- a/tcl/cpld/xilinx-xc7.cfg
+++ b/tcl/cpld/xilinx-xc7.cfg
@@ -58,6 +58,7 @@ set XC7_JSTART 0x0c
set XC7_BYPASS 0x3f
proc xc7_program {tap} {
+ echo "DEPRECATED! use 'virtex2 program ...' not 'xc7_program'"
global XC7_JSHUTDOWN XC7_JPROGRAM XC7_JSTART XC7_BYPASS
irscan $tap $XC7_JSHUTDOWN
irscan $tap $XC7_JPROGRAM
diff --git a/tcl/cpld/xilinx-xcu.cfg b/tcl/cpld/xilinx-xcu.cfg
index 8518e96d7..2d74695ed 100644
--- a/tcl/cpld/xilinx-xcu.cfg
+++ b/tcl/cpld/xilinx-xcu.cfg
@@ -62,6 +62,7 @@ set XCU_JSTART 0x0c
set XCU_BYPASS 0x3f
proc xcu_program {tap} {
+ echo "DEPRECATED! use 'virtex2 program ...' not 'xcu_program'"
global XCU_JSHUTDOWN XCU_JPROGRAM XCU_JSTART XCU_BYPASS
irscan $tap $XCU_JSHUTDOWN
irscan $tap $XCU_JPROGRAM
diff --git a/tcl/target/zynq_7000.cfg b/tcl/target/zynq_7000.cfg
index 593abd792..f5b4478ff 100644
--- a/tcl/target/zynq_7000.cfg
+++ b/tcl/target/zynq_7000.cfg
@@ -55,6 +55,7 @@ set XC7_JSTART 0x0c
set XC7_BYPASS 0x3f
proc zynqpl_program {tap} {
+ echo "DEPRECATED! use 'virtex2 program ...' not 'zynqpl_program'"
global XC7_JSHUTDOWN XC7_JPROGRAM XC7_JSTART XC7_BYPASS
irscan $tap $XC7_JSHUTDOWN
irscan $tap $XC7_JPROGRAM
-----------------------------------------------------------------------
Summary of changes:
doc/openocd.texi | 4 ++++
src/pld/virtex2.c | 51 ++++++++++++++++++++++++++++++++++++++++++++++++
tcl/cpld/xilinx-xc6s.cfg | 2 ++
tcl/cpld/xilinx-xc7.cfg | 1 +
tcl/cpld/xilinx-xcu.cfg | 1 +
tcl/target/zynq_7000.cfg | 1 +
6 files changed, 60 insertions(+)
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From: openocd-gerrit <ope...@us...> - 2023-07-08 18:02:56
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
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The branch, master has been updated
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commit e95f8e2b25c36fd290c29b4b553da5d16dfc620f
Author: Daniel Anselmi <dan...@gm...>
Date: Wed Jun 7 01:11:49 2023 +0200
pld/gowin: add missing documentation
Add short description for gowin {read_status/read_user/reload}
commands.
Change-Id: Ib441f3a2c0f00346decdeb505c27afa2630e9b5d
Signed-off-by: Daniel Anselmi <dan...@gm...>
Reviewed-on: https://review.openocd.org/c/openocd/+/7736
Reviewed-by: Antonio Borneo <bor...@gm...>
Tested-by: jenkins
diff --git a/doc/openocd.texi b/doc/openocd.texi
index 05951bbdf..cab30c6af 100644
--- a/doc/openocd.texi
+++ b/doc/openocd.texi
@@ -8709,6 +8709,21 @@ With a value of -1 for @var{pos} the check will be omitted.
This driver can be used to load the bitstream into FPGAs from Gowin.
It is possible to program the SRAM. Programming the flash is not supported.
The files @verb{|.fs|} and @verb{|.bin|} generated by Gowin FPGA Designer are supported.
+
+@deffn {Command} {gowin read_status} pld_name
+Reads and displays the status register
+for FPGA @var{pld_name}.
+@end deffn
+
+@deffn {Command} {gowin read_user} pld_name
+Reads and displays the user register
+for FPGA @var{pld_name}.
+@end deffn
+
+@deffn {Command} {gowin reload} pld_name
+Load the bitstream from external memory for
+FPGA @var{pld_name}. A.k.a. refresh.
+@end deffn
@end deffn
-----------------------------------------------------------------------
Summary of changes:
doc/openocd.texi | 15 +++++++++++++++
1 file changed, 15 insertions(+)
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commit d654e523babd26fc8d62a8fa0814c9de84826e0d
Author: Daniel Anselmi <dan...@gm...>
Date: Thu Nov 17 02:01:04 2022 +0100
tcl/cpld: add config files for more xilinx fpga families
Use configurable virtex pld driver to add support for more
xilinx fpga families.
Change-Id: Iff10c8c511787734fa289bdba15f03131d51e071
Signed-off-by: Daniel Anselmi <dan...@gm...>
Reviewed-on: https://review.openocd.org/c/openocd/+/7352
Reviewed-by: Antonio Borneo <bor...@gm...>
Tested-by: jenkins
diff --git a/tcl/cpld/xilinx-xc3s.cfg b/tcl/cpld/xilinx-xc3s.cfg
new file mode 100644
index 000000000..a8867395b
--- /dev/null
+++ b/tcl/cpld/xilinx-xc3s.cfg
@@ -0,0 +1,40 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
+# xilinx spartan3
+# https://docs.xilinx.com/v/u/en-US/ug332
+
+if { [info exists CHIPNAME] } {
+ set _CHIPNAME $CHIPNAME
+} else {
+ set _CHIPNAME xc3s
+}
+
+# the 4 top bits (28:31) are the die stepping. ignore it.
+jtag newtap $_CHIPNAME tap -irlen 6 -ignore-version \
+ -expected-id 0x01414093 \
+ -expected-id 0x0141C093 \
+ -expected-id 0x01428093 \
+ -expected-id 0x01434093 \
+ -expected-id 0x01440093 \
+ -expected-id 0x01448093 \
+ -expected-id 0x01450093 \
+ -expected-id 0x01C10093 \
+ -expected-id 0x01C1A093 \
+ -expected-id 0x01C22093 \
+ -expected-id 0x01C2E093 \
+ -expected-id 0x01C3A093 \
+ -expected-id 0x0140C093 \
+ -expected-id 0x02210093 \
+ -expected-id 0x02218093 \
+ -expected-id 0x02220093 \
+ -expected-id 0x02228093 \
+ -expected-id 0x02230093 \
+ -expected-id 0x02610093 \
+ -expected-id 0x02618093 \
+ -expected-id 0x02620093 \
+ -expected-id 0x02628093 \
+ -expected-id 0x02630093 \
+ -expected-id 0x03840093 \
+ -expected-id 0x0384e093
+
+pld create $_CHIPNAME.pld virtex2 -chain-position $_CHIPNAME.tap
diff --git a/tcl/cpld/xilinx-xc4v.cfg b/tcl/cpld/xilinx-xc4v.cfg
new file mode 100644
index 000000000..3eb46ebc4
--- /dev/null
+++ b/tcl/cpld/xilinx-xc4v.cfg
@@ -0,0 +1,31 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
+# xilinx virtex 4
+# https://docs.xilinx.com/v/u/en-US/ug071
+
+if { [info exists CHIPNAME] } {
+ set _CHIPNAME $CHIPNAME
+} else {
+ set _CHIPNAME xc4v
+}
+
+# the 4 top bits (28:31) are the die stepping. ignore it.
+jtag newtap $_CHIPNAME tap -irlen 10 -ignore-version \
+ -expected-id 0x01658093 \
+ -expected-id 0x01E58093 \
+ -expected-id 0x0167C093 \
+ -expected-id 0x02068093 \
+ -expected-id 0x01E64093 \
+ -expected-id 0x016A4093 \
+ -expected-id 0x02088093 \
+ -expected-id 0x016B4093 \
+ -expected-id 0x020B0093 \
+ -expected-id 0x016D8093 \
+ -expected-id 0x01700093 \
+ -expected-id 0x01718093 \
+ -expected-id 0x01734093
+
+pld create $_CHIPNAME.pld virtex2 -chain-position $_CHIPNAME.tap
+# cfg_out cfg_in jprogb jstart jshutdown user1-4
+virtex2 set_instr_codes $_CHIPNAME.pld 0x3C4 0x3C5 0x3CB 0x3CC 0x3CD
+virtex2 set_user_codes $_CHIPNAME.pld 0x3C2 0x3C3 0x3E2 0x3E3
diff --git a/tcl/cpld/xilinx-xc4vfx_40_60_100_140.cfg b/tcl/cpld/xilinx-xc4vfx_40_60_100_140.cfg
new file mode 100644
index 000000000..14dde0270
--- /dev/null
+++ b/tcl/cpld/xilinx-xc4vfx_40_60_100_140.cfg
@@ -0,0 +1,22 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
+# xilinx virtex 4
+# https://docs.xilinx.com/v/u/en-US/ug071
+
+if { [info exists CHIPNAME] } {
+ set _CHIPNAME $CHIPNAME
+} else {
+ set _CHIPNAME xc4vfx
+}
+
+# the 4 top bits (28:31) are the die stepping. ignore it.
+jtag newtap $_CHIPNAME tap -irlen 14 -ignore-version \
+ -expected-id 0x01E8C093 \
+ -expected-id 0x01EB4093 \
+ -expected-id 0x01EE4093 \
+ -expected-id 0x01F14093 \
+
+pld create $_CHIPNAME.pld virtex2 -chain-position $_CHIPNAME.tap
+# cfg_out cfg_in jprogb jstart jshutdown user1-4
+virtex2 set_instr_codes $_CHIPNAME.pld 0x3FC4 0x3FC5 0x3FCB 0x3FCC 0x3FCD
+virtex2 set_user_codes $_CHIPNAME.pld 0x3FC2 0x3FC3 0x3FE2 0x3FE3
diff --git a/tcl/cpld/xilinx-xc5v.cfg b/tcl/cpld/xilinx-xc5v.cfg
new file mode 100644
index 000000000..f88bbc1e8
--- /dev/null
+++ b/tcl/cpld/xilinx-xc5v.cfg
@@ -0,0 +1,41 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
+# xilinx virtex 5
+# https://docs.xilinx.com/v/u/en-US/ug191
+
+if { [info exists CHIPNAME] } {
+ set _CHIPNAME $CHIPNAME
+} else {
+ set _CHIPNAME xc5v
+}
+
+# the 4 top bits (28:31) are the die stepping. ignore it.
+jtag newtap $_CHIPNAME tap -irlen 10 -ignore-version \
+ -expected-id 0x0286E093 \
+ -expected-id 0x02896093 \
+ -expected-id 0x028AE093 \
+ -expected-id 0x028D6093 \
+ -expected-id 0x028EC093 \
+ -expected-id 0x0290C093 \
+ -expected-id 0x0295C093 \
+ -expected-id 0x02A56093 \
+ -expected-id 0x02A6E093 \
+ -expected-id 0x02A96093 \
+ -expected-id 0x02AAE093 \
+ -expected-id 0x02AD6093 \
+ -expected-id 0x02AEC093 \
+ -expected-id 0x02B0C093 \
+ -expected-id 0x02B5C093 \
+ -expected-id 0x02E72093 \
+ -expected-id 0x02E9A093 \
+ -expected-id 0x02ECE093 \
+ -expected-id 0x02F3E093 \
+ -expected-id 0x03276093 \
+ -expected-id 0x032C6093 \
+ -expected-id 0x04502093 \
+ -expected-id 0x0453E093
+
+pld create $_CHIPNAME.pld virtex2 -chain-position $_CHIPNAME.tap
+# cfg_out cfg_in jprogb jstart jshutdown user1-4
+virtex2 set_instr_codes $_CHIPNAME.pld 0x3C4 0x3C5 0x3CB 0x3CC 0x3CD
+virtex2 set_user_codes $_CHIPNAME.pld 0x3C2 0x3C3 0x3E2 0x3E3
diff --git a/tcl/cpld/xilinx-xc5vfx_100_130_200.cfg b/tcl/cpld/xilinx-xc5vfx_100_130_200.cfg
new file mode 100644
index 000000000..7420233f4
--- /dev/null
+++ b/tcl/cpld/xilinx-xc5vfx_100_130_200.cfg
@@ -0,0 +1,21 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
+# xilinx virtex 5
+# https://docs.xilinx.com/v/u/en-US/ug191
+
+if { [info exists CHIPNAME] } {
+ set _CHIPNAME $CHIPNAME
+} else {
+ set _CHIPNAME xc5vfx
+}
+
+# the 4 top bits (28:31) are the die stepping. ignore it.
+jtag newtap $_CHIPNAME tap -irlen 14 -ignore-version \
+ -expected-id 0x032D8093 \
+ -expected-id 0x03300093 \
+ -expected-id 0x03334093
+
+pld create $_CHIPNAME.pld virtex2 -chain-position $_CHIPNAME.tap
+# cfg_out cfg_in jprogb jstart jshutdown user1-4
+virtex2 set_instr_codes $_CHIPNAME.pld 0x3FC4 0x3FC5 0x3FCB 0x3FCC 0x3FCD
+virtex2 set_user_codes $_CHIPNAME.pld 0x3FC2 0x3FC3 0x3FE2 0x3FE3
diff --git a/tcl/cpld/xilinx-xc6s.cfg b/tcl/cpld/xilinx-xc6s.cfg
index 33b6d71bb..7e32094d4 100644
--- a/tcl/cpld/xilinx-xc6s.cfg
+++ b/tcl/cpld/xilinx-xc6s.cfg
@@ -26,6 +26,7 @@ jtag newtap $_CHIPNAME tap -irlen 6 -ignore-version \
-expected-id 0x0403D093
pld create $_CHIPNAME.pld virtex2 -chain-position $_CHIPNAME.tap
+virtex2 set_user_codes $_CHIPNAME.pld 0x02 0x03 0x1A 0x1B
set XC6S_CFG_IN 0x05
set XC6S_JSHUTDOWN 0x0d
diff --git a/tcl/cpld/xilinx-xc6v.cfg b/tcl/cpld/xilinx-xc6v.cfg
new file mode 100644
index 000000000..d37439c98
--- /dev/null
+++ b/tcl/cpld/xilinx-xc6v.cfg
@@ -0,0 +1,35 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
+# xilinx virtex 6
+# https://www.xilinx.com/support/documentation/user_guides/ug360.pdf
+
+if { [info exists CHIPNAME] } {
+ set _CHIPNAME $CHIPNAME
+} else {
+ set _CHIPNAME xc6v
+}
+
+# the 4 top bits (28:31) are the die stepping. ignore it.
+jtag newtap $_CHIPNAME tap -irlen 10 -ignore-version \
+ -expected-id 0x042A2093 \
+ -expected-id 0x042A4093 \
+ -expected-id 0x042A8093 \
+ -expected-id 0x042AC093 \
+ -expected-id 0x04244093 \
+ -expected-id 0x0424A093 \
+ -expected-id 0x0424C093 \
+ -expected-id 0x04250093 \
+ -expected-id 0x04252093 \
+ -expected-id 0x04256093 \
+ -expected-id 0x0423A093 \
+ -expected-id 0x04286093 \
+ -expected-id 0x04288093 \
+ -expected-id 0x042C4093 \
+ -expected-id 0x042CA093 \
+ -expected-id 0x042CC093 \
+ -expected-id 0x042D0093
+
+pld create $_CHIPNAME.pld virtex2 -chain-position $_CHIPNAME.tap
+# cfg_out cfg_in jprogb jstart jshutdown user1-4
+virtex2 set_instr_codes $_CHIPNAME.pld 0x3C4 0x3C5 0x3CB 0x3CC 0x3CD
+virtex2 set_user_codes $_CHIPNAME.pld 0x3C2 0x3C3 0x3E2 0x3E3
diff --git a/tcl/cpld/xilinx-xc7.cfg b/tcl/cpld/xilinx-xc7.cfg
index 1b1cb8076..93ec04990 100644
--- a/tcl/cpld/xilinx-xc7.cfg
+++ b/tcl/cpld/xilinx-xc7.cfg
@@ -1,6 +1,6 @@
# SPDX-License-Identifier: GPL-2.0-or-later
-# xilinx series 7 (artix, kintex, virtex)
+# xilinx series 7 (spartan, artix, kintex, virtex)
# http://www.xilinx.com/support/documentation/user_guides/ug470_7Series_Config.pdf
if { [info exists CHIPNAME] } {
@@ -50,6 +50,7 @@ jtag newtap $_CHIPNAME tap -irlen 6 -ignore-version \
#jtag newtap $_CHIPNAME tap -irlen 38 -ignore-version -expected-id 0x036DB093
pld create $_CHIPNAME.pld virtex2 -chain-position $_CHIPNAME.tap -no_jstart
+virtex2 set_user_codes $_CHIPNAME.pld 0x02 0x03 0x22 0x23
set XC7_JSHUTDOWN 0x0d
set XC7_JPROGRAM 0x0b
diff --git a/tcl/target/zynq_7000.cfg b/tcl/target/zynq_7000.cfg
index 014c4283a..593abd792 100644
--- a/tcl/target/zynq_7000.cfg
+++ b/tcl/target/zynq_7000.cfg
@@ -47,6 +47,7 @@ ${_TARGETNAME}0 configure -event reset-assert-post "cortex_a dbginit"
${_TARGETNAME}1 configure -event reset-assert-post "cortex_a dbginit"
pld create zynq_pl.pld virtex2 -chain-position zynq_pl.bs -no_jstart
+virtex2 set_user_codes $zynq_pl.pld 0x02 0x03 0x22 0x23
set XC7_JSHUTDOWN 0x0d
set XC7_JPROGRAM 0x0b
-----------------------------------------------------------------------
Summary of changes:
tcl/cpld/xilinx-xc3s.cfg | 40 +++++++++++++++++++++++++++++++
tcl/cpld/xilinx-xc4v.cfg | 31 ++++++++++++++++++++++++
tcl/cpld/xilinx-xc4vfx_40_60_100_140.cfg | 22 +++++++++++++++++
tcl/cpld/xilinx-xc5v.cfg | 41 ++++++++++++++++++++++++++++++++
tcl/cpld/xilinx-xc5vfx_100_130_200.cfg | 21 ++++++++++++++++
tcl/cpld/xilinx-xc6s.cfg | 1 +
tcl/cpld/xilinx-xc6v.cfg | 35 +++++++++++++++++++++++++++
tcl/cpld/xilinx-xc7.cfg | 3 ++-
tcl/target/zynq_7000.cfg | 1 +
9 files changed, 194 insertions(+), 1 deletion(-)
create mode 100644 tcl/cpld/xilinx-xc3s.cfg
create mode 100644 tcl/cpld/xilinx-xc4v.cfg
create mode 100644 tcl/cpld/xilinx-xc4vfx_40_60_100_140.cfg
create mode 100644 tcl/cpld/xilinx-xc5v.cfg
create mode 100644 tcl/cpld/xilinx-xc5vfx_100_130_200.cfg
create mode 100644 tcl/cpld/xilinx-xc6v.cfg
hooks/post-receive
--
Main OpenOCD repository
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From: openocd-gerrit <ope...@us...> - 2023-07-08 18:01:53
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".
The branch, master has been updated
via 9cb09f8cfe4c041333f70be5a6b44a5d7c5be4e0 (commit)
from 5ae0264055b2d5e5cea024aba2dd291a4d1d4ada (commit)
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- Log -----------------------------------------------------------------
commit 9cb09f8cfe4c041333f70be5a6b44a5d7c5be4e0
Author: Daniel Anselmi <dan...@gm...>
Date: Sat Apr 15 01:13:12 2023 +0200
pld/xilinx: make instruction codes configurable
Change-Id: I4d2c1fbd4d6007ba8d5c8c687a7c13e25fb6a474
Signed-off-by: Daniel Anselmi <dan...@gm...>
Reviewed-on: https://review.openocd.org/c/openocd/+/7713
Tested-by: jenkins
Reviewed-by: Antonio Borneo <bor...@gm...>
diff --git a/doc/openocd.texi b/doc/openocd.texi
index 7c579e30c..05951bbdf 100644
--- a/doc/openocd.texi
+++ b/doc/openocd.texi
@@ -8621,6 +8621,23 @@ openocd -f board/digilent_zedboard.cfg -c "init" \
Reads and displays the Virtex-II status register (STAT)
for FPGA @var{pld_name}.
@end deffn
+
+@deffn {Command} {virtex2 set_instr_codes} pld_name cfg_out cfg_in jprogb jstart jshutdown [user1 [user2 [user3 [user4]]]]
+Change values for boundary scan instructions. Default are values for Virtex 2, devices Virtex 4/5/6 and
+SSI devices are using different values.
+@var{pld_name} is the name of the pld device.
+@var{cfg_out} is the value used to select CFG_OUT instruction.
+@var{cfg_in} is the value used to select CFG_IN instruction.
+@var{jprogb} is the value used to select JPROGRAM instruction.
+@var{jstart} is the value used to select JSTART instruction.
+@var{jshutdown} is the value used to select JSHUTDOWN instruction.
+@var{user1} to @var{user4} are the intruction used to select the user registers USER1 to USER4.
+@end deffn
+
+@deffn {Command} {virtex2 set_user_codes} pld_name user1 [user2 [user3 [user4]]]
+Change values for boundary scan instructions selecting the registers USER1 to USER4.
+Description of the arguments can be found at command @command{virtex2 set_instr_codes}.
+@end deffn
@end deffn
diff --git a/src/pld/virtex2.c b/src/pld/virtex2.c
index f044bdae9..dfcf4cf34 100644
--- a/src/pld/virtex2.c
+++ b/src/pld/virtex2.c
@@ -13,12 +13,23 @@
#include "xilinx_bit.h"
#include "pld.h"
-static int virtex2_set_instr(struct jtag_tap *tap, uint32_t new_instr)
+static const struct virtex2_command_set virtex2_default_commands = {
+ .cfg_out = 0x04,
+ .cfg_in = 0x05,
+ .jprog_b = 0x0b,
+ .jstart = 0x0c,
+ .jshutdown = 0x0d,
+ .bypass = 0x3f,
+ .user = {0x02, 0x03},
+ .num_user = 2, /* virtex II has only 2 user instructions */
+};
+
+static int virtex2_set_instr(struct jtag_tap *tap, uint64_t new_instr)
{
if (!tap)
return ERROR_FAIL;
- if (buf_get_u32(tap->cur_instr, 0, tap->ir_length) != new_instr) {
+ if (buf_get_u64(tap->cur_instr, 0, tap->ir_length) != new_instr) {
struct scan_field field;
field.num_bits = tap->ir_length;
@@ -28,7 +39,7 @@ static int virtex2_set_instr(struct jtag_tap *tap, uint32_t new_instr)
return ERROR_FAIL;
}
field.out_value = t;
- buf_set_u32(t, 0, field.num_bits, new_instr);
+ buf_set_u64(t, 0, field.num_bits, new_instr);
field.in_value = NULL;
jtag_add_ir_scan(tap, &field, TAP_IDLE);
@@ -60,7 +71,7 @@ static int virtex2_send_32(struct pld_device *pld_device,
for (i = 0; i < num_words; i++)
buf_set_u32(values + 4 * i, 0, 32, flip_u32(*words++, 32));
- int retval = virtex2_set_instr(virtex2_info->tap, 0x5); /* CFG_IN */
+ int retval = virtex2_set_instr(virtex2_info->tap, virtex2_info->command_set.cfg_in);
if (retval != ERROR_OK) {
free(values);
return retval;
@@ -89,7 +100,7 @@ static int virtex2_receive_32(struct pld_device *pld_device,
scan_field.out_value = NULL;
scan_field.in_value = NULL;
- int retval = virtex2_set_instr(virtex2_info->tap, 0x4); /* CFG_OUT */
+ int retval = virtex2_set_instr(virtex2_info->tap, virtex2_info->command_set.cfg_out);
if (retval != ERROR_OK)
return retval;
@@ -137,7 +148,7 @@ static int virtex2_load_prepare(struct pld_device *pld_device)
struct virtex2_pld_device *virtex2_info = pld_device->driver_priv;
int retval;
- retval = virtex2_set_instr(virtex2_info->tap, 0xb); /* JPROG_B */
+ retval = virtex2_set_instr(virtex2_info->tap, virtex2_info->command_set.jprog_b);
if (retval != ERROR_OK)
return retval;
@@ -146,7 +157,7 @@ static int virtex2_load_prepare(struct pld_device *pld_device)
return retval;
jtag_add_sleep(1000);
- retval = virtex2_set_instr(virtex2_info->tap, 0x5); /* CFG_IN */
+ retval = virtex2_set_instr(virtex2_info->tap, virtex2_info->command_set.cfg_in);
if (retval != ERROR_OK)
return retval;
@@ -161,24 +172,24 @@ static int virtex2_load_cleanup(struct pld_device *pld_device)
jtag_add_tlr();
if (!(virtex2_info->no_jstart)) {
- retval = virtex2_set_instr(virtex2_info->tap, 0xc); /* JSTART */
+ retval = virtex2_set_instr(virtex2_info->tap, virtex2_info->command_set.jstart);
if (retval != ERROR_OK)
return retval;
}
jtag_add_runtest(13, TAP_IDLE);
- retval = virtex2_set_instr(virtex2_info->tap, 0x3f); /* BYPASS */
+ retval = virtex2_set_instr(virtex2_info->tap, virtex2_info->command_set.bypass);
if (retval != ERROR_OK)
return retval;
- retval = virtex2_set_instr(virtex2_info->tap, 0x3f); /* BYPASS */
+ retval = virtex2_set_instr(virtex2_info->tap, virtex2_info->command_set.bypass);
if (retval != ERROR_OK)
return retval;
if (!(virtex2_info->no_jstart)) {
- retval = virtex2_set_instr(virtex2_info->tap, 0xc); /* JSTART */
+ retval = virtex2_set_instr(virtex2_info->tap, virtex2_info->command_set.jstart);
if (retval != ERROR_OK)
return retval;
}
jtag_add_runtest(13, TAP_IDLE);
- retval = virtex2_set_instr(virtex2_info->tap, 0x3f); /* BYPASS */
+ retval = virtex2_set_instr(virtex2_info->tap, virtex2_info->command_set.bypass);
if (retval != ERROR_OK)
return retval;
@@ -250,6 +261,62 @@ COMMAND_HANDLER(virtex2_handle_read_stat_command)
return ERROR_OK;
}
+COMMAND_HANDLER(virtex2_handle_set_instuction_codes_command)
+{
+ if (CMD_ARGC < 6 || CMD_ARGC > (6 + VIRTEX2_MAX_USER_INSTRUCTIONS))
+ return ERROR_COMMAND_SYNTAX_ERROR;
+
+ struct pld_device *device = get_pld_device_by_name(CMD_ARGV[0]);
+ if (!device) {
+ command_print(CMD, "pld device '#%s' is unknown", CMD_ARGV[0]);
+ return ERROR_FAIL;
+ }
+
+ struct virtex2_pld_device *virtex2_info = device->driver_priv;
+ if (!virtex2_info)
+ return ERROR_FAIL;
+
+ struct virtex2_command_set instr_codes;
+ COMMAND_PARSE_NUMBER(u64, CMD_ARGV[1], instr_codes.cfg_out);
+ COMMAND_PARSE_NUMBER(u64, CMD_ARGV[2], instr_codes.cfg_in);
+ COMMAND_PARSE_NUMBER(u64, CMD_ARGV[3], instr_codes.jprog_b);
+ COMMAND_PARSE_NUMBER(u64, CMD_ARGV[4], instr_codes.jstart);
+ COMMAND_PARSE_NUMBER(u64, CMD_ARGV[5], instr_codes.jshutdown);
+ instr_codes.bypass = 0xffffffffffffffff;
+
+ unsigned int num_user = CMD_ARGC - 6;
+ for (unsigned int i = 0; i < num_user; ++i)
+ COMMAND_PARSE_NUMBER(u64, CMD_ARGV[6 + i], instr_codes.user[i]);
+ instr_codes.num_user = num_user;
+
+ virtex2_info->command_set = instr_codes;
+ return ERROR_OK;
+}
+
+COMMAND_HANDLER(virtex2_handle_set_user_codes_command)
+{
+ if (CMD_ARGC < 2 || CMD_ARGC > (1 + VIRTEX2_MAX_USER_INSTRUCTIONS))
+ return ERROR_COMMAND_SYNTAX_ERROR;
+
+ struct pld_device *device = get_pld_device_by_name(CMD_ARGV[0]);
+ if (!device) {
+ command_print(CMD, "pld device '#%s' is unknown", CMD_ARGV[0]);
+ return ERROR_FAIL;
+ }
+
+ struct virtex2_pld_device *virtex2_info = device->driver_priv;
+ if (!virtex2_info)
+ return ERROR_FAIL;
+
+ uint64_t user[VIRTEX2_MAX_USER_INSTRUCTIONS];
+ unsigned int num_user = CMD_ARGC - 1;
+ for (unsigned int i = 0; i < num_user; ++i)
+ COMMAND_PARSE_NUMBER(u64, CMD_ARGV[1 + i], user[i]);
+ virtex2_info->command_set.num_user = num_user;
+ memcpy(virtex2_info->command_set.user, user, num_user * sizeof(uint64_t));
+ return ERROR_OK;
+}
+
PLD_CREATE_COMMAND_HANDLER(virtex2_pld_create_command)
{
if (CMD_ARGC < 4)
@@ -270,6 +337,7 @@ PLD_CREATE_COMMAND_HANDLER(virtex2_pld_create_command)
return ERROR_FAIL;
}
virtex2_info->tap = tap;
+ virtex2_info->command_set = virtex2_default_commands;
virtex2_info->no_jstart = 0;
if (CMD_ARGC >= 5 && strcmp(CMD_ARGV[4], "-no_jstart") == 0)
@@ -287,9 +355,23 @@ static const struct command_registration virtex2_exec_command_handlers[] = {
.handler = virtex2_handle_read_stat_command,
.help = "read status register",
.usage = "pld_name",
+ }, {
+ .name = "set_instr_codes",
+ .mode = COMMAND_EXEC,
+ .handler = virtex2_handle_set_instuction_codes_command,
+ .help = "set instructions codes used for loading the bitstream/refreshing/jtag-hub",
+ .usage = "pld_name cfg_out cfg_in jprogb jstart jshutdown"
+ " [user1 [user2 [user3 [user4]]]]",
+ }, {
+ .name = "set_user_codes",
+ .mode = COMMAND_EXEC,
+ .handler = virtex2_handle_set_user_codes_command,
+ .help = "set instructions codes used for jtag-hub",
+ .usage = "pld_name user1 [user2 [user3 [user4]]]",
},
COMMAND_REGISTRATION_DONE
};
+
static const struct command_registration virtex2_command_handler[] = {
{
.name = "virtex2",
diff --git a/src/pld/virtex2.h b/src/pld/virtex2.h
index 05558f709..b69e3c97a 100644
--- a/src/pld/virtex2.h
+++ b/src/pld/virtex2.h
@@ -10,9 +10,23 @@
#include <jtag/jtag.h>
+#define VIRTEX2_MAX_USER_INSTRUCTIONS 4
+
+struct virtex2_command_set {
+ uint64_t cfg_out;
+ uint64_t cfg_in;
+ uint64_t jprog_b;
+ uint64_t jstart;
+ uint64_t jshutdown;
+ uint64_t bypass;
+ uint64_t user[VIRTEX2_MAX_USER_INSTRUCTIONS];
+ unsigned int num_user;
+};
+
struct virtex2_pld_device {
struct jtag_tap *tap;
int no_jstart;
+ struct virtex2_command_set command_set;
};
#endif /* OPENOCD_PLD_VIRTEX2_H */
-----------------------------------------------------------------------
Summary of changes:
doc/openocd.texi | 17 +++++++++
src/pld/virtex2.c | 106 +++++++++++++++++++++++++++++++++++++++++++++++-------
src/pld/virtex2.h | 14 ++++++++
3 files changed, 125 insertions(+), 12 deletions(-)
hooks/post-receive
--
Main OpenOCD repository
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From: openocd-gerrit <ope...@us...> - 2023-07-08 18:01:19
|
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generated because a ref change was pushed to the repository containing
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The branch, master has been updated
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- Log -----------------------------------------------------------------
commit 5ae0264055b2d5e5cea024aba2dd291a4d1d4ada
Author: Daniel Anselmi <dan...@gm...>
Date: Sat Jun 3 20:16:19 2023 +0200
pld: give devices a name for referencing in scripts
Change-Id: I05e8596ffacdb6cd8da4dd8a40bb460183f4930a
Signed-off-by: Daniel Anselmi <dan...@gm...>
Reviewed-on: https://review.openocd.org/c/openocd/+/7728
Tested-by: jenkins
Reviewed-by: Antonio Borneo <bor...@gm...>
diff --git a/doc/openocd.texi b/doc/openocd.texi
index 832047f0e..7c579e30c 100644
--- a/doc/openocd.texi
+++ b/doc/openocd.texi
@@ -8575,22 +8575,24 @@ As it does for JTAG TAPs, debug targets, and flash chips (both NOR and NAND),
OpenOCD maintains a list of PLDs available for use in various commands.
Also, each such PLD requires a driver.
-They are referenced by the number shown by the @command{pld devices} command,
-and new PLDs are defined by @command{pld device driver_name}.
-
-@deffn {Config Command} {pld device} driver_name tap_name [driver_options]
-Defines a new PLD device, supported by driver @var{driver_name},
-using the TAP named @var{tap_name}.
-The driver may make use of any @var{driver_options} to configure its
-behavior.
+They are referenced by the name which was given when the pld was created or
+the number shown by the @command{pld devices} command.
+New PLDs are defined by @command{pld create pld_name driver_name -chain-position tap_name [driver_options]}.
+
+@deffn {Config Command} {pld create} pld_name driver_name -chain-position tap_name [driver_options]
+Creates a new PLD device, supported by driver @var{driver_name},
+assigning @var{pld_name} for further reference.
+@code{-chain-position} @var{tap_name} names the TAP
+used to access this target.
+The driver may make use of any @var{driver_options} to configure its behavior.
@end deffn
@deffn {Command} {pld devices}
-Lists the PLDs and their numbers.
+List the known PLDs with their name.
@end deffn
-@deffn {Command} {pld load} num filename
-Loads the file @file{filename} into the PLD identified by @var{num}.
+@deffn {Command} {pld load} pld_name filename
+Loads the file @file{filename} into the PLD identified by @var{pld_name}.
The file format must be inferred by the driver.
@end deffn
@@ -8600,12 +8602,12 @@ Drivers may support PLD-specific options to the @command{pld device}
definition command, and may also define commands usable only with
that particular type of PLD.
-@deffn {FPGA Driver} {virtex2} [no_jstart]
+@deffn {FPGA Driver} {virtex2} [@option{-no_jstart}]
Virtex-II is a family of FPGAs sold by Xilinx.
This driver can also be used to load Series3, Series6, Series7 and Zynq 7000 devices.
It supports the IEEE 1532 standard for In-System Configuration (ISC).
-If @var{no_jstart} is non-zero, the JSTART instruction is not used after
+If @var{-no_jstart} is given, the JSTART instruction is not used after
loading the bitstream. While required for Series2, Series3, and Series6, it
breaks bitstream loading on Series7.
@@ -8615,38 +8617,38 @@ openocd -f board/digilent_zedboard.cfg -c "init" \
@end example
-@deffn {Command} {virtex2 read_stat} num
+@deffn {Command} {virtex2 read_stat} pld_name
Reads and displays the Virtex-II status register (STAT)
-for FPGA @var{num}.
+for FPGA @var{pld_name}.
@end deffn
@end deffn
-@deffn {FPGA Driver} {lattice} [family]
+@deffn {FPGA Driver} {lattice} [@option{-family} <name>]
The FGPA families ECP2, ECP3, ECP5, Certus and CertusPro by Lattice are supported.
This driver can be used to load the bitstream into the FPGA or read the status register and read/write the usercode register.
-The option @option{family} is one of @var{ecp2 ecp3 ecp5 certus}. This is needed when the JTAG ID of the device is not known by openocd (newer NX devices).
+For the option @option{-family} @var{name} is one of @var{ecp2 ecp3 ecp5 certus}. This is needed when the JTAG ID of the device is not known by openocd (newer NX devices).
-@deffn {Command} {lattice read_status} num
+@deffn {Command} {lattice read_status} pld_name
Reads and displays the status register
-for FPGA @var{num}.
+for FPGA @var{pld_name}.
@end deffn
-@deffn {Command} {lattice read_user} num
+@deffn {Command} {lattice read_user} pld_name
Reads and displays the user register
-for FPGA @var{num}.
+for FPGA @var{pld_name}.
@end deffn
-@deffn {Command} {lattice write_user} num val
+@deffn {Command} {lattice write_user} pld_name val
Writes the user register.
-for FPGA @var{num} with value @var{val}.
+for FPGA @var{pld_name} with value @var{val}.
@end deffn
-@deffn {Command} {lattice set_preload} num length
+@deffn {Command} {lattice set_preload} pld_name length
Set the length of the register for the preload. This is needed when the JTAG ID of the device is not known by openocd (newer NX devices).
-The load command for the FPGA @var{num} will use a length for the preload of @var{length}.
+The load command for the FPGA @var{pld_name} will use a length for the preload of @var{length}.
@end deffn
@end deffn
@@ -8657,28 +8659,28 @@ This driver can be used to load the bitstream into the FPGA.
@end deffn
-@deffn {FPGA Driver} {intel} [@option{family}]
+@deffn {FPGA Driver} {intel} [@option{-family} <name>]
This driver can be used to load the bitstream into Intel (former Altera) FPGAs.
The families Cyclone III, Cyclone IV, Cyclone V, Cyclone 10, Arria II are supported.
@c Arria V and Arria 10, MAX II, MAX V, MAX10)
-The option @option{family} is one of @var{cycloneiii cycloneiv cyclonev cyclone10 arriaii}.
+For the option @option{-family} @var{name} is one of @var{cycloneiii cycloneiv cyclonev cyclone10 arriaii}.
This is needed when the JTAG ID of the device is ambiguous (same ID is used for chips in different families).
As input file format the driver supports a '.rbf' (raw bitstream file) file. The '.rbf' file can be generated
from a '.sof' file with @verb{|quartus_cpf -c blinker.sof blinker.rbf|}
-Defines a new PLD device, an FPGA of the Cyclone III family, using the TAP named @verb{|cycloneiii.tap|}:
+Creates a new PLD device, an FPGA of the Cyclone III family, using the TAP named @verb{|cycloneiii.tap|}:
@example
-pld device intel cycloneiii.tap cycloneiii
+pld create cycloneiii.pld intel -chain-position cycloneiii.tap -family cycloneiii
@end example
-@deffn {Command} {intel set_bscan} num len
-Set boundary scan register length of FPGA @var{num} to @var{len}. This is needed because the
+@deffn {Command} {intel set_bscan} pld_name len
+Set boundary scan register length of FPGA @var{pld_name} to @var{len}. This is needed because the
length can vary between chips with the same JTAG ID.
@end deffn
-@deffn {Command} {intel set_check_pos} num pos
+@deffn {Command} {intel set_check_pos} pld_name pos
Selects the position @var{pos} in the boundary-scan register. The bit at this
position is checked after loading the bitstream and must be '1', which is the case when no error occurred.
With a value of -1 for @var{pos} the check will be omitted.
diff --git a/src/jtag/startup.tcl b/src/jtag/startup.tcl
index b74775a74..085c89ba1 100644
--- a/src/jtag/startup.tcl
+++ b/src/jtag/startup.tcl
@@ -1108,4 +1108,18 @@ proc "am335xgpio led_on_state" {state} {
}
}
+lappend _telnet_autocomplete_skip "pld device"
+proc "pld device" {driver tap_name {opt 0}} {
+ echo "DEPRECATED! use 'pld create ...', not 'pld device ...'"
+ if {[string is integer -strict $opt]} {
+ if {$opt == 0} {
+ eval pld create [lindex [split $tap_name .] 0].pld $driver -chain-position $tap_name
+ } else {
+ eval pld create [lindex [split $tap_name .] 0].pld $driver -chain-position $tap_name -no_jstart
+ }
+ } else {
+ eval pld create [lindex [split $tap_name .] 0].pld $driver -chain-position $tap_name -family $opt
+ }
+}
+
# END MIGRATION AIDS
diff --git a/src/pld/efinix.c b/src/pld/efinix.c
index f08439476..370f18426 100644
--- a/src/pld/efinix.c
+++ b/src/pld/efinix.c
@@ -188,14 +188,17 @@ static int efinix_load(struct pld_device *pld_device, const char *filename)
return retval;
}
-PLD_DEVICE_COMMAND_HANDLER(efinix_pld_device_command)
+PLD_CREATE_COMMAND_HANDLER(efinix_pld_create_command)
{
- if (CMD_ARGC != 2)
+ if (CMD_ARGC != 4)
return ERROR_COMMAND_SYNTAX_ERROR;
- struct jtag_tap *tap = jtag_tap_by_string(CMD_ARGV[1]);
+ if (strcmp(CMD_ARGV[2], "-chain-position") != 0)
+ return ERROR_COMMAND_SYNTAX_ERROR;
+
+ struct jtag_tap *tap = jtag_tap_by_string(CMD_ARGV[3]);
if (!tap) {
- command_print(CMD, "Tap: %s does not exist", CMD_ARGV[1]);
+ command_print(CMD, "Tap: %s does not exist", CMD_ARGV[3]);
return ERROR_FAIL;
}
@@ -213,6 +216,6 @@ PLD_DEVICE_COMMAND_HANDLER(efinix_pld_device_command)
struct pld_driver efinix_pld = {
.name = "efinix",
- .pld_device_command = &efinix_pld_device_command,
+ .pld_create_command = &efinix_pld_create_command,
.load = &efinix_load,
};
diff --git a/src/pld/gatemate.c b/src/pld/gatemate.c
index 43b3f02d1..4ad2665c6 100644
--- a/src/pld/gatemate.c
+++ b/src/pld/gatemate.c
@@ -209,22 +209,21 @@ static int gatemate_load(struct pld_device *pld_device, const char *filename)
return retval;
}
-PLD_DEVICE_COMMAND_HANDLER(gatemate_pld_device_command)
+PLD_CREATE_COMMAND_HANDLER(gatemate_pld_create_command)
{
- struct jtag_tap *tap;
-
- struct gatemate_pld_device *gatemate_info;
+ if (CMD_ARGC != 4)
+ return ERROR_COMMAND_SYNTAX_ERROR;
- if (CMD_ARGC != 2)
+ if (strcmp(CMD_ARGV[2], "-chain-position") != 0)
return ERROR_COMMAND_SYNTAX_ERROR;
- tap = jtag_tap_by_string(CMD_ARGV[1]);
+ struct jtag_tap *tap = jtag_tap_by_string(CMD_ARGV[3]);
if (!tap) {
- command_print(CMD, "Tap: %s does not exist", CMD_ARGV[1]);
+ command_print(CMD, "Tap: %s does not exist", CMD_ARGV[3]);
return ERROR_FAIL;
}
- gatemate_info = malloc(sizeof(struct gatemate_pld_device));
+ struct gatemate_pld_device *gatemate_info = malloc(sizeof(struct gatemate_pld_device));
if (!gatemate_info) {
LOG_ERROR("Out of memory");
return ERROR_FAIL;
@@ -238,6 +237,6 @@ PLD_DEVICE_COMMAND_HANDLER(gatemate_pld_device_command)
struct pld_driver gatemate_pld = {
.name = "gatemate",
- .pld_device_command = &gatemate_pld_device_command,
+ .pld_create_command = &gatemate_pld_create_command,
.load = &gatemate_load,
};
diff --git a/src/pld/gowin.c b/src/pld/gowin.c
index 467b79937..ab3582c4c 100644
--- a/src/pld/gowin.c
+++ b/src/pld/gowin.c
@@ -451,15 +451,12 @@ static int gowin_reload_command(struct pld_device *pld_device)
COMMAND_HANDLER(gowin_read_status_command_handler)
{
- int dev_id;
-
if (CMD_ARGC != 1)
return ERROR_COMMAND_SYNTAX_ERROR;
- COMMAND_PARSE_NUMBER(int, CMD_ARGV[0], dev_id);
- struct pld_device *device = get_pld_device_by_num(dev_id);
+ struct pld_device *device = get_pld_device_by_name_or_numstr(CMD_ARGV[0]);
if (!device) {
- command_print(CMD, "pld device '#%s' is out of bounds", CMD_ARGV[0]);
+ command_print(CMD, "pld device '#%s' is out of bounds or unknown", CMD_ARGV[0]);
return ERROR_FAIL;
}
@@ -474,15 +471,12 @@ COMMAND_HANDLER(gowin_read_status_command_handler)
COMMAND_HANDLER(gowin_read_user_register_command_handler)
{
- int dev_id;
-
if (CMD_ARGC != 1)
return ERROR_COMMAND_SYNTAX_ERROR;
- COMMAND_PARSE_NUMBER(int, CMD_ARGV[0], dev_id);
- struct pld_device *device = get_pld_device_by_num(dev_id);
+ struct pld_device *device = get_pld_device_by_name_or_numstr(CMD_ARGV[0]);
if (!device) {
- command_print(CMD, "pld device '#%s' is out of bounds", CMD_ARGV[0]);
+ command_print(CMD, "pld device '#%s' is out of bounds or unknown", CMD_ARGV[0]);
return ERROR_FAIL;
}
@@ -497,15 +491,12 @@ COMMAND_HANDLER(gowin_read_user_register_command_handler)
COMMAND_HANDLER(gowin_reload_command_handler)
{
- int dev_id;
-
if (CMD_ARGC != 1)
return ERROR_COMMAND_SYNTAX_ERROR;
- COMMAND_PARSE_NUMBER(int, CMD_ARGV[0], dev_id);
- struct pld_device *device = get_pld_device_by_num(dev_id);
+ struct pld_device *device = get_pld_device_by_name_or_numstr(CMD_ARGV[0]);
if (!device) {
- command_print(CMD, "pld device '#%s' is out of bounds", CMD_ARGV[0]);
+ command_print(CMD, "pld device '#%s' is out of bounds or unknown", CMD_ARGV[0]);
return ERROR_FAIL;
}
@@ -518,19 +509,19 @@ static const struct command_registration gowin_exec_command_handlers[] = {
.mode = COMMAND_EXEC,
.handler = gowin_read_status_command_handler,
.help = "reading status register from FPGA",
- .usage = "num_pld",
+ .usage = "pld_name",
}, {
.name = "read_user",
.mode = COMMAND_EXEC,
.handler = gowin_read_user_register_command_handler,
.help = "reading user register from FPGA",
- .usage = "num_pld",
+ .usage = "pld_name",
}, {
.name = "reload",
.mode = COMMAND_EXEC,
.handler = gowin_reload_command_handler,
.help = "reloading bitstream from flash to SRAM",
- .usage = "num_pld",
+ .usage = "pld_name",
},
COMMAND_REGISTRATION_DONE
};
@@ -546,22 +537,21 @@ static const struct command_registration gowin_command_handler[] = {
COMMAND_REGISTRATION_DONE
};
-PLD_DEVICE_COMMAND_HANDLER(gowin_pld_device_command)
+PLD_CREATE_COMMAND_HANDLER(gowin_pld_create_command)
{
- struct jtag_tap *tap;
-
- struct gowin_pld_device *gowin_info;
+ if (CMD_ARGC != 4)
+ return ERROR_COMMAND_SYNTAX_ERROR;
- if (CMD_ARGC != 2)
+ if (strcmp(CMD_ARGV[2], "-chain-position") != 0)
return ERROR_COMMAND_SYNTAX_ERROR;
- tap = jtag_tap_by_string(CMD_ARGV[1]);
+ struct jtag_tap *tap = jtag_tap_by_string(CMD_ARGV[3]);
if (!tap) {
- command_print(CMD, "Tap: %s does not exist", CMD_ARGV[1]);
+ command_print(CMD, "Tap: %s does not exist", CMD_ARGV[3]);
return ERROR_FAIL;
}
- gowin_info = malloc(sizeof(struct gowin_pld_device));
+ struct gowin_pld_device *gowin_info = malloc(sizeof(struct gowin_pld_device));
if (!gowin_info) {
LOG_ERROR("Out of memory");
return ERROR_FAIL;
@@ -576,6 +566,6 @@ PLD_DEVICE_COMMAND_HANDLER(gowin_pld_device_command)
struct pld_driver gowin_pld = {
.name = "gowin",
.commands = gowin_command_handler,
- .pld_device_command = &gowin_pld_device_command,
+ .pld_create_command = &gowin_pld_create_command,
.load = &gowin_load_to_sram,
};
diff --git a/src/pld/intel.c b/src/pld/intel.c
index 119a5695d..92a790b54 100644
--- a/src/pld/intel.c
+++ b/src/pld/intel.c
@@ -339,16 +339,14 @@ static int intel_load(struct pld_device *pld_device, const char *filename)
COMMAND_HANDLER(intel_set_bscan_command_handler)
{
- int dev_id;
unsigned int boundary_scan_length;
if (CMD_ARGC != 2)
return ERROR_COMMAND_SYNTAX_ERROR;
- COMMAND_PARSE_NUMBER(int, CMD_ARGV[0], dev_id);
- struct pld_device *pld_device = get_pld_device_by_num(dev_id);
+ struct pld_device *pld_device = get_pld_device_by_name_or_numstr(CMD_ARGV[0]);
if (!pld_device) {
- command_print(CMD, "pld device '#%s' is out of bounds", CMD_ARGV[0]);
+ command_print(CMD, "pld device '#%s' is out of bounds or unknown", CMD_ARGV[0]);
return ERROR_FAIL;
}
@@ -366,16 +364,14 @@ COMMAND_HANDLER(intel_set_bscan_command_handler)
COMMAND_HANDLER(intel_set_check_pos_command_handler)
{
- int dev_id;
int checkpos;
if (CMD_ARGC != 2)
return ERROR_COMMAND_SYNTAX_ERROR;
- COMMAND_PARSE_NUMBER(int, CMD_ARGV[0], dev_id);
- struct pld_device *pld_device = get_pld_device_by_num(dev_id);
+ struct pld_device *pld_device = get_pld_device_by_name_or_numstr(CMD_ARGV[0]);
if (!pld_device) {
- command_print(CMD, "pld device '#%s' is out of bounds", CMD_ARGV[0]);
+ command_print(CMD, "pld device '#%s' is out of bounds or unknown", CMD_ARGV[0]);
return ERROR_FAIL;
}
@@ -392,42 +388,47 @@ COMMAND_HANDLER(intel_set_check_pos_command_handler)
}
-PLD_DEVICE_COMMAND_HANDLER(intel_pld_device_command)
+PLD_CREATE_COMMAND_HANDLER(intel_pld_create_command)
{
- if (CMD_ARGC < 2 || CMD_ARGC > 3)
+ if (CMD_ARGC != 4 && CMD_ARGC != 6)
return ERROR_COMMAND_SYNTAX_ERROR;
- struct jtag_tap *tap = jtag_tap_by_string(CMD_ARGV[1]);
- if (!tap) {
- command_print(CMD, "Tap: %s does not exist", CMD_ARGV[1]);
- return ERROR_FAIL;
- }
+ if (strcmp(CMD_ARGV[2], "-chain-position") != 0)
+ return ERROR_COMMAND_SYNTAX_ERROR;
- struct intel_pld_device *intel_info = malloc(sizeof(struct intel_pld_device));
- if (!intel_info) {
- LOG_ERROR("Out of memory");
+ struct jtag_tap *tap = jtag_tap_by_string(CMD_ARGV[3]);
+ if (!tap) {
+ command_print(CMD, "Tap: %s does not exist", CMD_ARGV[3]);
return ERROR_FAIL;
}
enum intel_family_e family = INTEL_UNKNOWN;
+ if (CMD_ARGC == 6) {
+ if (strcmp(CMD_ARGV[4], "-family") != 0)
+ return ERROR_COMMAND_SYNTAX_ERROR;
- if (CMD_ARGC == 3) {
- if (strcmp(CMD_ARGV[2], "cycloneiii") == 0) {
+ if (strcmp(CMD_ARGV[5], "cycloneiii") == 0) {
family = INTEL_CYCLONEIII;
- } else if (strcmp(CMD_ARGV[2], "cycloneiv") == 0) {
+ } else if (strcmp(CMD_ARGV[5], "cycloneiv") == 0) {
family = INTEL_CYCLONEIV;
- } else if (strcmp(CMD_ARGV[2], "cyclonev") == 0) {
+ } else if (strcmp(CMD_ARGV[5], "cyclonev") == 0) {
family = INTEL_CYCLONEV;
- } else if (strcmp(CMD_ARGV[2], "cyclone10") == 0) {
+ } else if (strcmp(CMD_ARGV[5], "cyclone10") == 0) {
family = INTEL_CYCLONE10;
- } else if (strcmp(CMD_ARGV[2], "arriaii") == 0) {
+ } else if (strcmp(CMD_ARGV[5], "arriaii") == 0) {
family = INTEL_ARRIAII;
} else {
command_print(CMD, "unknown family");
- free(intel_info);
return ERROR_FAIL;
}
}
+
+ struct intel_pld_device *intel_info = malloc(sizeof(struct intel_pld_device));
+ if (!intel_info) {
+ LOG_ERROR("Out of memory");
+ return ERROR_FAIL;
+ }
+
intel_info->tap = tap;
intel_info->boundary_scan_length = 0;
intel_info->checkpos = -1;
@@ -444,13 +445,13 @@ static const struct command_registration intel_exec_command_handlers[] = {
.mode = COMMAND_EXEC,
.handler = intel_set_bscan_command_handler,
.help = "set boundary scan register length of FPGA",
- .usage = "num_pld len",
+ .usage = "pld_name len",
}, {
.name = "set_check_pos",
.mode = COMMAND_EXEC,
.handler = intel_set_check_pos_command_handler,
.help = "set check_pos of FPGA",
- .usage = "num_pld pos",
+ .usage = "pld_name pos",
},
COMMAND_REGISTRATION_DONE
};
@@ -469,6 +470,6 @@ static const struct command_registration intel_command_handler[] = {
struct pld_driver intel_pld = {
.name = "intel",
.commands = intel_command_handler,
- .pld_device_command = &intel_pld_device_command,
+ .pld_create_command = &intel_pld_create_command,
.load = &intel_load,
};
diff --git a/src/pld/lattice.c b/src/pld/lattice.c
index 4ab5f63c0..63d730677 100644
--- a/src/pld/lattice.c
+++ b/src/pld/lattice.c
@@ -316,39 +316,46 @@ static int lattice_load_command(struct pld_device *pld_device, const char *filen
return retval;
}
-PLD_DEVICE_COMMAND_HANDLER(lattice_pld_device_command)
+PLD_CREATE_COMMAND_HANDLER(lattice_pld_create_command)
{
- if (CMD_ARGC < 2 || CMD_ARGC > 3)
+ if (CMD_ARGC != 4 && CMD_ARGC != 6)
return ERROR_COMMAND_SYNTAX_ERROR;
- struct jtag_tap *tap = jtag_tap_by_string(CMD_ARGV[1]);
+ if (strcmp(CMD_ARGV[2], "-chain-position") != 0)
+ return ERROR_COMMAND_SYNTAX_ERROR;
+
+ struct jtag_tap *tap = jtag_tap_by_string(CMD_ARGV[3]);
if (!tap) {
- command_print(CMD, "Tap: %s does not exist", CMD_ARGV[1]);
+ command_print(CMD, "Tap: %s does not exist", CMD_ARGV[3]);
return ERROR_FAIL;
}
- struct lattice_pld_device *lattice_device = malloc(sizeof(struct lattice_pld_device));
- if (!lattice_device) {
- LOG_ERROR("Out of memory");
- return ERROR_FAIL;
- }
/* id is not known yet -> postpone lattice_check_device_family() */
enum lattice_family_e family = LATTICE_UNKNOWN;
- if (CMD_ARGC == 3) {
- if (strcasecmp(CMD_ARGV[2], "ecp2") == 0) {
+ if (CMD_ARGC == 6) {
+ if (strcmp(CMD_ARGV[4], "-family") != 0)
+ return ERROR_COMMAND_SYNTAX_ERROR;
+
+ if (strcasecmp(CMD_ARGV[5], "ecp2") == 0) {
family = LATTICE_ECP2;
- } else if (strcasecmp(CMD_ARGV[2], "ecp3") == 0) {
+ } else if (strcasecmp(CMD_ARGV[5], "ecp3") == 0) {
family = LATTICE_ECP3;
- } else if (strcasecmp(CMD_ARGV[2], "ecp5") == 0) {
+ } else if (strcasecmp(CMD_ARGV[5], "ecp5") == 0) {
family = LATTICE_ECP5;
- } else if (strcasecmp(CMD_ARGV[2], "certus") == 0) {
+ } else if (strcasecmp(CMD_ARGV[5], "certus") == 0) {
family = LATTICE_CERTUS;
} else {
command_print(CMD, "unknown family");
- free(lattice_device);
return ERROR_FAIL;
}
}
+
+ struct lattice_pld_device *lattice_device = malloc(sizeof(struct lattice_pld_device));
+ if (!lattice_device) {
+ LOG_ERROR("Out of memory");
+ return ERROR_FAIL;
+ }
+
lattice_device->tap = tap;
lattice_device->family = family;
lattice_device->preload_length = 0;
@@ -360,16 +367,14 @@ PLD_DEVICE_COMMAND_HANDLER(lattice_pld_device_command)
COMMAND_HANDLER(lattice_read_usercode_register_command_handler)
{
- int dev_id;
uint32_t usercode;
if (CMD_ARGC != 1)
return ERROR_COMMAND_SYNTAX_ERROR;
- COMMAND_PARSE_NUMBER(int, CMD_ARGV[0], dev_id);
- struct pld_device *device = get_pld_device_by_num(dev_id);
+ struct pld_device *device = get_pld_device_by_name_or_numstr(CMD_ARGV[0]);
if (!device) {
- command_print(CMD, "pld device '#%s' is out of bounds", CMD_ARGV[0]);
+ command_print(CMD, "pld device '#%s' is out of bounds or unknown", CMD_ARGV[0]);
return ERROR_FAIL;
}
@@ -390,16 +395,14 @@ COMMAND_HANDLER(lattice_read_usercode_register_command_handler)
COMMAND_HANDLER(lattice_set_preload_command_handler)
{
- int dev_id;
unsigned int preload_length;
if (CMD_ARGC != 2)
return ERROR_COMMAND_SYNTAX_ERROR;
- COMMAND_PARSE_NUMBER(int, CMD_ARGV[0], dev_id);
- struct pld_device *device = get_pld_device_by_num(dev_id);
+ struct pld_device *device = get_pld_device_by_name_or_numstr(CMD_ARGV[0]);
if (!device) {
- command_print(CMD, "pld device '#%s' is out of bounds", CMD_ARGV[0]);
+ command_print(CMD, "pld device '#%s' is out of bounds or unknown", CMD_ARGV[0]);
return ERROR_FAIL;
}
@@ -417,16 +420,14 @@ COMMAND_HANDLER(lattice_set_preload_command_handler)
COMMAND_HANDLER(lattice_write_usercode_register_command_handler)
{
- int dev_id;
uint32_t usercode;
if (CMD_ARGC != 2)
return ERROR_COMMAND_SYNTAX_ERROR;
- COMMAND_PARSE_NUMBER(int, CMD_ARGV[0], dev_id);
- struct pld_device *device = get_pld_device_by_num(dev_id);
+ struct pld_device *device = get_pld_device_by_name_or_numstr(CMD_ARGV[0]);
if (!device) {
- command_print(CMD, "pld device '#%s' is out of bounds", CMD_ARGV[0]);
+ command_print(CMD, "pld device '#%s' is out of bounds or unknown", CMD_ARGV[0]);
return ERROR_FAIL;
}
@@ -445,15 +446,12 @@ COMMAND_HANDLER(lattice_write_usercode_register_command_handler)
COMMAND_HANDLER(lattice_read_status_command_handler)
{
- int dev_id;
-
if (CMD_ARGC != 1)
return ERROR_COMMAND_SYNTAX_ERROR;
- COMMAND_PARSE_NUMBER(int, CMD_ARGV[0], dev_id);
- struct pld_device *device = get_pld_device_by_num(dev_id);
+ struct pld_device *device = get_pld_device_by_name_or_numstr(CMD_ARGV[0]);
if (!device) {
- command_print(CMD, "pld device '#%s' is out of bounds", CMD_ARGV[0]);
+ command_print(CMD, "pld device '#%s' is out of bounds or unknown", CMD_ARGV[0]);
return ERROR_FAIL;
}
@@ -487,25 +485,25 @@ static const struct command_registration lattice_exec_command_handlers[] = {
.mode = COMMAND_EXEC,
.handler = lattice_read_status_command_handler,
.help = "reading status register from FPGA",
- .usage = "num_pld",
+ .usage = "pld_name",
}, {
.name = "read_user",
.mode = COMMAND_EXEC,
.handler = lattice_read_usercode_register_command_handler,
.help = "reading usercode register from FPGA",
- .usage = "num_pld",
+ .usage = "pld_name",
}, {
.name = "write_user",
.mode = COMMAND_EXEC,
.handler = lattice_write_usercode_register_command_handler,
.help = "writing usercode register to FPGA",
- .usage = "num_pld value",
+ .usage = "pld_name value",
}, {
.name = "set_preload",
.mode = COMMAND_EXEC,
.handler = lattice_set_preload_command_handler,
.help = "set length for preload (device specific)",
- .usage = "num_pld value",
+ .usage = "pld_name value",
},
COMMAND_REGISTRATION_DONE
};
@@ -524,6 +522,6 @@ static const struct command_registration lattice_command_handler[] = {
struct pld_driver lattice_pld = {
.name = "lattice",
.commands = lattice_command_handler,
- .pld_device_command = &lattice_pld_device_command,
+ .pld_create_command = &lattice_pld_create_command,
.load = &lattice_load_command,
};
diff --git a/src/pld/pld.c b/src/pld/pld.c
index 07b575f94..c375418a9 100644
--- a/src/pld/pld.c
+++ b/src/pld/pld.c
@@ -34,68 +34,110 @@ struct pld_device *get_pld_device_by_num(int num)
int i = 0;
for (p = pld_devices; p; p = p->next) {
- if (i++ == num)
+ if (i++ == num) {
+ LOG_WARNING("DEPRECATED: use pld name \"%s\" instead of number %d", p->name, num);
return p;
+ }
}
return NULL;
}
-/* pld device <driver> [driver_options ...]
- */
-COMMAND_HANDLER(handle_pld_device_command)
+struct pld_device *get_pld_device_by_name(const char *name)
{
- int i;
- int found = 0;
+ for (struct pld_device *p = pld_devices; p; p = p->next) {
+ if (strcmp(p->name, name) == 0)
+ return p;
+ }
+
+ return NULL;
+}
- if (CMD_ARGC < 1)
+struct pld_device *get_pld_device_by_name_or_numstr(const char *str)
+{
+ struct pld_device *dev = get_pld_device_by_name(str);
+ if (dev)
+ return dev;
+
+ char *end;
+ unsigned long dev_num = strtoul(str, &end, 0);
+ if (*end || dev_num > INT_MAX) {
+ LOG_ERROR("Invalid argument");
+ return NULL;
+ }
+
+ return get_pld_device_by_num(dev_num);
+}
+
+/* @deffn {Config Command} {pld create} pld_name driver -chain-position tap_name [options]
+*/
+COMMAND_HANDLER(handle_pld_create_command)
+{
+ if (CMD_ARGC < 2)
return ERROR_COMMAND_SYNTAX_ERROR;
- for (i = 0; pld_drivers[i]; i++) {
- if (strcmp(CMD_ARGV[0], pld_drivers[i]->name) == 0) {
- struct pld_device *p, *c;
-
- /* register pld specific commands */
- int retval;
- if (pld_drivers[i]->commands) {
- retval = register_commands(CMD_CTX, NULL, pld_drivers[i]->commands);
- if (retval != ERROR_OK) {
- LOG_ERROR("couldn't register '%s' commands", CMD_ARGV[0]);
- return ERROR_FAIL;
- }
- }
-
- c = malloc(sizeof(struct pld_device));
- c->driver = pld_drivers[i];
- c->next = NULL;
-
- retval = CALL_COMMAND_HANDLER(
- pld_drivers[i]->pld_device_command, c);
- if (retval != ERROR_OK) {
- LOG_ERROR("'%s' driver rejected pld device",
- CMD_ARGV[0]);
- free(c);
- return ERROR_OK;
- }
-
- /* put pld device in linked list */
- if (pld_devices) {
- /* find last pld device */
- for (p = pld_devices; p && p->next; p = p->next)
- ;
- if (p)
- p->next = c;
- } else
- pld_devices = c;
-
- found = 1;
+ struct pld_driver *pld_driver = NULL;
+
+ for (int i = 0; pld_drivers[i]; i++) {
+ if (strcmp(CMD_ARGV[1], pld_drivers[i]->name) == 0) {
+ pld_driver = pld_drivers[i];
+ break;
+ }
+ }
+
+ if (!pld_driver) {
+ LOG_ERROR("pld driver '%s' not found", CMD_ARGV[1]);
+ return ERROR_FAIL; /* exit(-1); */
+ }
+
+ if (get_pld_device_by_name(CMD_ARGV[0])) {
+ LOG_ERROR("pld device with name '%s' already exists", CMD_ARGV[0]);
+ return ERROR_FAIL;
+ }
+
+ struct pld_device *pld_device = malloc(sizeof(struct pld_device));
+ if (!pld_device) {
+ LOG_ERROR("Out of memory");
+ return ERROR_FAIL;
+ }
+
+ pld_device->driver = pld_driver;
+ pld_device->next = NULL;
+
+ int retval = CALL_COMMAND_HANDLER(pld_driver->pld_create_command, pld_device);
+ if (retval != ERROR_OK) {
+ LOG_ERROR("'%s' driver rejected pld device",
+ CMD_ARGV[1]);
+ free(pld_device);
+ return ERROR_OK;
+ }
+ pld_device->name = strdup(CMD_ARGV[0]);
+ if (!pld_device->name) {
+ LOG_ERROR("Out of memory");
+ free(pld_device);
+ return ERROR_FAIL;
+ }
+
+ /* register pld specific commands */
+ if (pld_driver->commands) {
+ retval = register_commands(CMD_CTX, NULL, pld_driver->commands);
+ if (retval != ERROR_OK) {
+ LOG_ERROR("couldn't register '%s' commands", CMD_ARGV[1]);
+ free(pld_device->name);
+ free(pld_device);
+ return ERROR_FAIL;
}
}
- /* no matching pld driver found */
- if (!found) {
- LOG_ERROR("pld driver '%s' not found", CMD_ARGV[0]);
- exit(-1);
+ if (pld_devices) {
+ /* find last pld device */
+ struct pld_device *p = pld_devices;
+ for (; p && p->next; p = p->next)
+ ;
+ if (p)
+ p->next = pld_device;
+ } else {
+ pld_devices = pld_device;
}
return ERROR_OK;
@@ -112,7 +154,7 @@ COMMAND_HANDLER(handle_pld_devices_command)
}
for (p = pld_devices; p; p = p->next)
- command_print(CMD, "#%i: %s", i++, p->driver->name);
+ command_print(CMD, "#%i: %s (driver: %s)", i++, p->name, p->driver->name);
return ERROR_OK;
}
@@ -128,11 +170,9 @@ COMMAND_HANDLER(handle_pld_load_command)
if (CMD_ARGC < 2)
return ERROR_COMMAND_SYNTAX_ERROR;
- unsigned dev_id;
- COMMAND_PARSE_NUMBER(uint, CMD_ARGV[0], dev_id);
- p = get_pld_device_by_num(dev_id);
+ p = get_pld_device_by_name_or_numstr(CMD_ARGV[0]);
if (!p) {
- command_print(CMD, "pld device '#%s' is out of bounds", CMD_ARGV[0]);
+ command_print(CMD, "pld device '#%s' is out of bounds or unknown", CMD_ARGV[0]);
return ERROR_OK;
}
@@ -154,15 +194,15 @@ COMMAND_HANDLER(handle_pld_load_command)
retval = p->driver->load(p, CMD_ARGV[1]);
if (retval != ERROR_OK) {
- command_print(CMD, "failed loading file %s to pld device %u",
- CMD_ARGV[1], dev_id);
+ command_print(CMD, "failed loading file %s to pld device %s",
+ CMD_ARGV[1], CMD_ARGV[0]);
return retval;
} else {
gettimeofday(&end, NULL);
timeval_subtract(&duration, &end, &start);
- command_print(CMD, "loaded file %s to pld device %u in %jis %jius",
- CMD_ARGV[1], dev_id,
+ command_print(CMD, "loaded file %s to pld device %s in %jis %jius",
+ CMD_ARGV[1], CMD_ARGV[0],
(intmax_t)duration.tv_sec, (intmax_t)duration.tv_usec);
}
@@ -182,7 +222,7 @@ static const struct command_registration pld_exec_command_handlers[] = {
.handler = handle_pld_load_command,
.mode = COMMAND_EXEC,
.help = "load configuration file into PLD",
- .usage = "pld_num filename",
+ .usage = "pld_name filename",
},
COMMAND_REGISTRATION_DONE
};
@@ -213,11 +253,11 @@ COMMAND_HANDLER(handle_pld_init_command)
static const struct command_registration pld_config_command_handlers[] = {
{
- .name = "device",
+ .name = "create",
.mode = COMMAND_CONFIG,
- .handler = handle_pld_device_command,
- .help = "configure a PLD device",
- .usage = "driver_name [driver_args ... ]",
+ .handler = handle_pld_create_command,
+ .help = "create a PLD device",
+ .usage = "name.pld driver_name [driver_args ... ]",
},
{
.name = "init",
diff --git a/src/pld/pld.h b/src/pld/pld.h
index 322b96ec6..8a2a11831 100644
--- a/src/pld/pld.h
+++ b/src/pld/pld.h
@@ -12,28 +12,31 @@
struct pld_device;
-#define __PLD_DEVICE_COMMAND(name) \
+#define __PLD_CREATE_COMMAND(name) \
COMMAND_HELPER(name, struct pld_device *pld)
struct pld_driver {
const char *name;
- __PLD_DEVICE_COMMAND((*pld_device_command));
+ __PLD_CREATE_COMMAND((*pld_create_command));
const struct command_registration *commands;
int (*load)(struct pld_device *pld_device, const char *filename);
};
-#define PLD_DEVICE_COMMAND_HANDLER(name) \
- static __PLD_DEVICE_COMMAND(name)
+#define PLD_CREATE_COMMAND_HANDLER(name) \
+ static __PLD_CREATE_COMMAND(name)
struct pld_device {
struct pld_driver *driver;
void *driver_priv;
struct pld_device *next;
+ char *name;
};
int pld_register_commands(struct command_context *cmd_ctx);
struct pld_device *get_pld_device_by_num(int num);
+struct pld_device *get_pld_device_by_name(const char *name);
+struct pld_device *get_pld_device_by_name_or_numstr(const char *str);
#define ERROR_PLD_DEVICE_INVALID (-1000)
#define ERROR_PLD_FILE_LOAD_FAILED (-1001)
diff --git a/src/pld/virtex2.c b/src/pld/virtex2.c
index fd0725a63..f044bdae9 100644
--- a/src/pld/virtex2.c
+++ b/src/pld/virtex2.c
@@ -233,11 +233,9 @@ COMMAND_HANDLER(virtex2_handle_read_stat_command)
if (CMD_ARGC < 1)
return ERROR_COMMAND_SYNTAX_ERROR;
- unsigned dev_id;
- COMMAND_PARSE_NUMBER(uint, CMD_ARGV[0], dev_id);
- device = get_pld_device_by_num(dev_id);
+ device = get_pld_device_by_name_or_numstr(CMD_ARGV[0]);
if (!device) {
- command_print(CMD, "pld device '#%s' is out of bounds", CMD_ARGV[0]);
+ command_print(CMD, "pld device '#%s' is out of bounds or unknown", CMD_ARGV[0]);
return ERROR_FAIL;
}
@@ -252,22 +250,21 @@ COMMAND_HANDLER(virtex2_handle_read_stat_command)
return ERROR_OK;
}
-PLD_DEVICE_COMMAND_HANDLER(virtex2_pld_device_command)
+PLD_CREATE_COMMAND_HANDLER(virtex2_pld_create_command)
{
- struct jtag_tap *tap;
-
- struct virtex2_pld_device *virtex2_info;
+ if (CMD_ARGC < 4)
+ return ERROR_COMMAND_SYNTAX_ERROR;
- if (CMD_ARGC < 2)
+ if (strcmp(CMD_ARGV[2], "-chain-position") != 0)
return ERROR_COMMAND_SYNTAX_ERROR;
- tap = jtag_tap_by_string(CMD_ARGV[1]);
+ struct jtag_tap *tap = jtag_tap_by_string(CMD_ARGV[3]);
if (!tap) {
- command_print(CMD, "Tap: %s does not exist", CMD_ARGV[1]);
+ command_print(CMD, "Tap: %s does not exist", CMD_ARGV[3]);
return ERROR_FAIL;
}
- virtex2_info = malloc(sizeof(struct virtex2_pld_device));
+ struct virtex2_pld_device *virtex2_info = malloc(sizeof(struct virtex2_pld_device));
if (!virtex2_info) {
LOG_ERROR("Out of memory");
return ERROR_FAIL;
@@ -275,8 +272,8 @@ PLD_DEVICE_COMMAND_HANDLER(virtex2_pld_device_command)
virtex2_info->tap = tap;
virtex2_info->no_jstart = 0;
- if (CMD_ARGC >= 3)
- COMMAND_PARSE_NUMBER(int, CMD_ARGV[2], virtex2_info->no_jstart);
+ if (CMD_ARGC >= 5 && strcmp(CMD_ARGV[4], "-no_jstart") == 0)
+ virtex2_info->no_jstart = 1;
pld->driver_priv = virtex2_info;
@@ -289,7 +286,7 @@ static const struct command_registration virtex2_exec_command_handlers[] = {
.mode = COMMAND_EXEC,
.handler = virtex2_handle_read_stat_command,
.help = "read status register",
- .usage = "pld_num",
+ .usage = "pld_name",
},
COMMAND_REGISTRATION_DONE
};
@@ -307,6 +304,6 @@ static const struct command_registration virtex2_command_handler[] = {
struct pld_driver virtex2_pld = {
.name = "virtex2",
.commands = virtex2_command_handler,
- .pld_device_command = &virtex2_pld_device_command,
+ .pld_create_command = &virtex2_pld_create_command,
.load = &virtex2_load,
};
diff --git a/tcl/cpld/xilinx-xc6s.cfg b/tcl/cpld/xilinx-xc6s.cfg
index 82b87fb41..33b6d71bb 100644
--- a/tcl/cpld/xilinx-xc6s.cfg
+++ b/tcl/cpld/xilinx-xc6s.cfg
@@ -25,7 +25,7 @@ jtag newtap $_CHIPNAME tap -irlen 6 -ignore-version \
-expected-id 0x0401D093 \
-expected-id 0x0403D093
-pld device virtex2 $_CHIPNAME.tap
+pld create $_CHIPNAME.pld virtex2 -chain-position $_CHIPNAME.tap
set XC6S_CFG_IN 0x05
set XC6S_JSHUTDOWN 0x0d
diff --git a/tcl/cpld/xilinx-xc7.cfg b/tcl/cpld/xilinx-xc7.cfg
index 91a07f9eb..1b1cb8076 100644
--- a/tcl/cpld/xilinx-xc7.cfg
+++ b/tcl/cpld/xilinx-xc7.cfg
@@ -49,7 +49,7 @@ jtag newtap $_CHIPNAME tap -irlen 6 -ignore-version \
#jtag newtap $_CHIPNAME tap -irlen 38 -ignore-version -expected-id 0x036DB093
-pld device virtex2 $_CHIPNAME.tap 1
+pld create $_CHIPNAME.pld virtex2 -chain-position $_CHIPNAME.tap -no_jstart
set XC7_JSHUTDOWN 0x0d
set XC7_JPROGRAM 0x0b
diff --git a/tcl/cpld/xilinx-xcu.cfg b/tcl/cpld/xilinx-xcu.cfg
index 9df696d4c..8518e96d7 100644
--- a/tcl/cpld/xilinx-xcu.cfg
+++ b/tcl/cpld/xilinx-xcu.cfg
@@ -54,7 +54,7 @@ set _IRLEN [lindex $_XCU_DATA($CHIP) 1]
# the 4 top bits (28:31) are the die stepping/revisions. ignore it.
jtag newtap $_CHIPNAME tap -irlen $_IRLEN -ignore-version -expected-id $_EXPID
-pld device virtex2 $_CHIPNAME.tap 1
+pld create $_CHIPNAME.pld virtex2 -chain-position $_CHIPNAME.tap -no_jstart
set XCU_JSHUTDOWN 0x0d
set XCU_JPROGRAM 0x0b
diff --git a/tcl/fpga/altera-arriaii.cfg b/tcl/fpga/altera-arriaii.cfg
index ae752dfb1..d59c18207 100644
--- a/tcl/fpga/altera-arriaii.cfg
+++ b/tcl/fpga/altera-arriaii.cfg
@@ -28,4 +28,4 @@ jtag newtap $_CHIPNAME tap -irlen 10 \
-expected-id 0x025030dd -expected-id 0x024820dd \
-expected-id 0x025140dd
-pld device intel $_CHIPNAME.tap arriaii
+pld create $_CHIPNAME.pld intel -chain-position $_CHIPNAME.tap -family arriaii
diff --git a/tcl/fpga/altera-cycloneiii.cfg b/tcl/fpga/altera-cycloneiii.cfg
index e14357245..d9be6455d 100644
--- a/tcl/fpga/altera-cycloneiii.cfg
+++ b/tcl/fpga/altera-cycloneiii.cfg
@@ -32,4 +32,4 @@ jtag newtap $_CHIPNAME tap -irlen 10 \
-expected-id 0x027000dd -expected-id 0x027030dd \
-expected-id 0x027020dd
-pld device intel $_CHIPNAME.tap cycloneiii
+pld create $_CHIPNAME.pld intel -chain-position $_CHIPNAME.tap -family cycloneiii
diff --git a/tcl/fpga/altera-cycloneiv.cfg b/tcl/fpga/altera-cycloneiv.cfg
index 59243cfd0..6a908e8af 100644
--- a/tcl/fpga/altera-cycloneiv.cfg
+++ b/tcl/fpga/altera-cycloneiv.cfg
@@ -38,4 +38,4 @@ jtag newtap $_CHIPNAME tap -irlen 10 \
-expected-id 0x028030dd -expected-id 0x028140dd \
-expected-id 0x028040dd
-pld device intel $_CHIPNAME.tap cycloneiv
+pld create $_CHIPNAME.pld intel -chain-position $_CHIPNAME.tap -family cycloneiv
diff --git a/tcl/fpga/altera-cyclonev.cfg b/tcl/fpga/altera-cyclonev.cfg
index 1e9c9c405..46532a556 100644
--- a/tcl/fpga/altera-cyclonev.cfg
+++ b/tcl/fpga/altera-cyclonev.cfg
@@ -44,4 +44,4 @@ jtag newtap $_CHIPNAME tap -irlen 10 \
-expected-id 0x02d110dd -expected-id 0x02d010dd \
-expected-id 0x02d120dd -expected-id 0x02d020dd
-pld device intel $_CHIPNAME.tap cyclonev
+pld create $_CHIPNAME.pld intel -chain-position $_CHIPNAME.tap -family cyclonev
diff --git a/tcl/fpga/efinix_titanium.cfg b/tcl/fpga/efinix_titanium.cfg
index 681b58fc8..8b356cb85 100644
--- a/tcl/fpga/efinix_titanium.cfg
+++ b/tcl/fpga/efinix_titanium.cfg
@@ -20,4 +20,4 @@ jtag newtap $_CHIPNAME tap -irlen 5 -ignore-version \
-expected-id 0x00680A79 \
-expected-id 0x00684A79
-pld device efinix $_CHIPNAME.tap
+pld create $_CHIPNAME.pld efinix -chain-position $_CHIPNAME.tap
diff --git a/tcl/fpga/efinix_trion.cfg b/tcl/fpga/efinix_trion.cfg
index ecd2edad4..2b50d8c5d 100644
--- a/tcl/fpga/efinix_trion.cfg
+++ b/tcl/fpga/efinix_trion.cfg
@@ -14,4 +14,4 @@ jtag newtap $_CHIPNAME tap -irlen 4 -ignore-version \
-expected-id 0x00240A79 \
-expected-id 0x00220A79
-pld device efinix $_CHIPNAME.tap
+pld create $_CHIPNAME.pld efinix -chain-position $_CHIPNAME.tap
diff --git a/tcl/fpga/gatemate.cfg b/tcl/fpga/gatemate.cfg
index cc19fd4c2..e8f338236 100644
--- a/tcl/fpga/gatemate.cfg
+++ b/tcl/fpga/gatemate.cfg
@@ -13,4 +13,4 @@ if { [info exists CHIPNAME] } {
jtag newtap $_CHIPNAME tap -irlen 6 -ignore-version \
-expected-id 0x20000001
-pld device gatemate $_CHIPNAME.tap
+pld create $_CHIPNAME.pld gatemate -chain-position $_CHIPNAME.tap
diff --git a/tcl/fpga/gowin_gw1n.cfg b/tcl/fpga/gowin_gw1n.cfg
index 43d66b70e..5e85066f9 100644
--- a/tcl/fpga/gowin_gw1n.cfg
+++ b/tcl/fpga/gowin_gw1n.cfg
@@ -26,4 +26,4 @@ jtag newtap $_CHIPNAME tap -irlen 8 -ignore-version \
-expected-id 0x1100181B \
-expected-id 0x0100481B
-pld device gowin $_CHIPNAME.tap
+pld create $_CHIPNAME.pld gowin -chain-position $_CHIPNAME.tap
diff --git a/tcl/fpga/lattice_certus.cfg b/tcl/fpga/lattice_certus.cfg
index 95b6e59d8..9ddb7d843 100644
--- a/tcl/fpga/lattice_certus.cfg
+++ b/tcl/fpga/lattice_certus.cfg
@@ -15,4 +15,4 @@ if { [info exists CHIPNAME] } {
jtag newtap $_CHIPNAME tap -irlen 8 -irmask 0x83 -ircapture 0x1 \
-expected-id 0x310F1043 -expected-id 0x310F0043
-pld device lattice $_CHIPNAME.tap
+pld create $_CHIPNAME.pld lattice -chain-position $_CHIPNAME.tap
diff --git a/tcl/fpga/lattice_certuspro.cfg b/tcl/fpga/lattice_certuspro.cfg
index c15a379ae..acaaa5739 100644
--- a/tcl/fpga/lattice_certuspro.cfg
+++ b/tcl/fpga/lattice_certuspro.cfg
@@ -15,4 +15,4 @@ jtag newtap $_CHIPNAME tap -irlen 8 -irmask 0x83 -ircapture 0x1 \
-expected-id 0x010f4043
# -expected-id 0x01112043
-pld device lattice $_CHIPNAME.tap
+pld create $_CHIPNAME.pld lattice -chain-position $_CHIPNAME.tap
diff --git a/tcl/fpga/lattice_ecp2.cfg b/tcl/fpga/lattice_ecp2.cfg
index a1aa2eff1..5b01787bd 100644
--- a/tcl/fpga/lattice_ecp2.cfg
+++ b/tcl/fpga/lattice_ecp2.cfg
@@ -28,4 +28,4 @@ jtag newtap $_CHIPNAME tap -irlen 8 \
-expected-id 0x01271043 -expected-id 0x01272043 -expected-id 0x01274043 \
-expected-id 0x01273043 -expected-id 0x01275043
-pld device lattice $_CHIPNAME.tap
+pld create $_CHIPNAME.pld lattice -chain-position $_CHIPNAME.tap
diff --git a/tcl/fpga/lattice_ecp3.cfg b/tcl/fpga/lattice_ecp3.cfg
index 7cd570649..21c8ffa84 100644
--- a/tcl/fpga/lattice_ecp3.cfg
+++ b/tcl/fpga/lattice_ecp3.cfg
@@ -19,4 +19,4 @@ jtag newtap $_CHIPNAME tap -irlen 8 \
-expected-id 0x01010043 -expected-id 0x01012043 \
-expected-id 0x01014043 -expected-id 0x01015043
-pld device lattice $_CHIPNAME.tap
+pld create $_CHIPNAME.pld lattice -chain-position $_CHIPNAME.tap
diff --git a/tcl/fpga/lattice_ecp5.cfg b/tcl/fpga/lattice_ecp5.cfg
index 41442492e..cdc63f0c1 100644
--- a/tcl/fpga/lattice_ecp5.cfg
+++ b/tcl/fpga/lattice_ecp5.cfg
@@ -27,4 +27,4 @@ jtag newtap $_CHIPNAME tap -irlen 8 -irmask 0x83 -ircapture 0x1 \
-expected-id 0x41113043 -expected-id 0x81111043 -expected-id 0x81112043 \
-expected-id 0x81113043
-pld device lattice $_CHIPNAME.tap
+pld create $_CHIPNAME.pld lattice -chain-position $_CHIPNAME.tap
diff --git a/tcl/target/zynq_7000.cfg b/tcl/target/zynq_7000.cfg
index a6f899541..014c4283a 100644
--- a/tcl/target/zynq_7000.cfg
+++ b/tcl/target/zynq_7000.cfg
@@ -46,7 +46,7 @@ adapter speed 1000
${_TARGETNAME}0 configure -event reset-assert-post "cortex_a dbginit"
${_TARGETNAME}1 configure -event reset-assert-post "cortex_a dbginit"
-pld device virtex2 zynq_pl.bs 1
+pld create zynq_pl.pld virtex2 -chain-position zynq_pl.bs -no_jstart
set XC7_JSHUTDOWN 0x0d
set XC7_JPROGRAM 0x0b
-----------------------------------------------------------------------
Summary of changes:
doc/openocd.texi | 66 ++++++++--------
src/jtag/startup.tcl | 14 ++++
src/pld/efinix.c | 13 ++--
src/pld/gatemate.c | 17 ++---
src/pld/gowin.c | 44 +++++------
src/pld/intel.c | 57 +++++++-------
src/pld/lattice.c | 72 +++++++++---------
src/pld/pld.c | 166 +++++++++++++++++++++++++----------------
src/pld/pld.h | 11 ++-
src/pld/virtex2.c | 29 ++++---
tcl/cpld/xilinx-xc6s.cfg | 2 +-
tcl/cpld/xilinx-xc7.cfg | 2 +-
tcl/cpld/xilinx-xcu.cfg | 2 +-
tcl/fpga/altera-arriaii.cfg | 2 +-
tcl/fpga/altera-cycloneiii.cfg | 2 +-
tcl/fpga/altera-cycloneiv.cfg | 2 +-
tcl/fpga/altera-cyclonev.cfg | 2 +-
tcl/fpga/efinix_titanium.cfg | 2 +-
tcl/fpga/efinix_trion.cfg | 2 +-
tcl/fpga/gatemate.cfg | 2 +-
tcl/fpga/gowin_gw1n.cfg | 2 +-
tcl/fpga/lattice_certus.cfg | 2 +-
tcl/fpga/lattice_certuspro.cfg | 2 +-
tcl/fpga/lattice_ecp2.cfg | 2 +-
tcl/fpga/lattice_ecp3.cfg | 2 +-
tcl/fpga/lattice_ecp5.cfg | 2 +-
tcl/target/zynq_7000.cfg | 2 +-
27 files changed, 285 insertions(+), 238 deletions(-)
hooks/post-receive
--
Main OpenOCD repository
|
|
From: openocd-gerrit <ope...@us...> - 2023-07-08 18:01:00
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".
The branch, master has been updated
via 7335fbdbda6ff353ec878bf740721f2b13dde7ce (commit)
from 56fd04832abc0ebadc21ee6127be4be9c7b46e15 (commit)
Those revisions listed above that are new to this repository have
not appeared on any other notification email; so we list those
revisions in full, below.
- Log -----------------------------------------------------------------
commit 7335fbdbda6ff353ec878bf740721f2b13dde7ce
Author: Daniel Anselmi <dan...@gm...>
Date: Mon Jun 19 23:37:08 2023 +0200
tcl/board/bemicro: source cycloneiii.cfg from correct path
Change-Id: Ib1d1be1067107633949a202a05f7fd06831ba84b
Signed-off-by: Daniel Anselmi <dan...@gm...>
Reviewed-on: https://review.openocd.org/c/openocd/+/7751
Tested-by: jenkins
Reviewed-by: Antonio Borneo <bor...@gm...>
diff --git a/tcl/board/bemicro_cycloneiii.cfg b/tcl/board/bemicro_cycloneiii.cfg
index 7781bd5c7..95dd394fd 100644
--- a/tcl/board/bemicro_cycloneiii.cfg
+++ b/tcl/board/bemicro_cycloneiii.cfg
@@ -12,7 +12,7 @@ transport select jtag
adapter speed 10000
-source [find cpld/altera-cycloneiii.cfg]
+source [find fpga/altera-cycloneiii.cfg]
#quartus_cpf --option=bitstream_compression=off -c output_files\cycloneiii_blinker.sof cycloneiii_blinker.rbf
-----------------------------------------------------------------------
Summary of changes:
tcl/board/bemicro_cycloneiii.cfg | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
hooks/post-receive
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Main OpenOCD repository
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