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|
From: openocd-gerrit <ope...@us...> - 2023-12-30 13:15:15
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".
The branch, master has been updated
via b0f99dfed0d0f95d3f9190f1767b4f2f6969f5bc (commit)
from 7f3aba13191debc68742f70580de7cf8465d3611 (commit)
Those revisions listed above that are new to this repository have
not appeared on any other notification email; so we list those
revisions in full, below.
- Log -----------------------------------------------------------------
commit b0f99dfed0d0f95d3f9190f1767b4f2f6969f5bc
Author: Marc Schink <de...@za...>
Date: Wed Nov 8 10:27:36 2023 +0100
tcl/target: Add Geehy APM32F1x config
Tested with APM32F103CBT6 using JTAG and SWD transport. All flash
operations, including sector and device protection, work as expected.
Change-Id: Ibefe1a65d710aea87b86ab7ff8a4153512a0ea4f
Signed-off-by: Marc Schink <de...@za...>
Reviewed-on: https://review.openocd.org/c/openocd/+/8017
Tested-by: jenkins
Reviewed-by: Antonio Borneo <bor...@gm...>
Reviewed-by: Tomas Vanek <va...@fb...>
diff --git a/tcl/target/geehy/apm32f1x.cfg b/tcl/target/geehy/apm32f1x.cfg
new file mode 100644
index 000000000..dc42e060a
--- /dev/null
+++ b/tcl/target/geehy/apm32f1x.cfg
@@ -0,0 +1,57 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
+#
+# Geehy APM32F1x target
+#
+# https://global.geehy.com/MCU
+#
+
+#
+# APM32F1x devices support JTAG and SWD transport.
+#
+source [find target/swj-dp.tcl]
+
+if { [info exists CHIPNAME] } {
+ set _CHIPNAME $CHIPNAME
+} else {
+ set _CHIPNAME apm32f1x
+}
+
+# Work-area is a space in RAM used for flash programming, by default use 4 KiB.
+if { [info exists WORKAREASIZE] } {
+ set _WORKAREASIZE $WORKAREASIZE
+} else {
+ set _WORKAREASIZE 0x1000
+}
+
+if { [info exists CPUTAPID] } {
+ set _CPUTAPID $CPUTAPID
+} else {
+ if { [using_jtag] } {
+ set _CPUTAPID 0x4ba00477
+ } {
+ set _CPUTAPID 0x2ba01477
+ }
+}
+
+swj_newdap $_CHIPNAME cpu -irlen 4 -expected-id $_CPUTAPID
+dap create $_CHIPNAME.dap -chain-position $_CHIPNAME.cpu
+
+if {[using_jtag]} {
+ jtag newtap $_CHIPNAME bs -irlen 5
+}
+
+set _TARGETNAME $_CHIPNAME.cpu
+target create $_TARGETNAME cortex_m -endian little -dap $_CHIPNAME.dap
+
+$_TARGETNAME configure -work-area-phys 0x20000000 -work-area-size $_WORKAREASIZE -work-area-backup 0
+
+set _FLASHNAME $_CHIPNAME.flash
+flash bank $_FLASHNAME stm32f1x 0 0 0 0 $_TARGETNAME
+
+adapter speed 1000
+
+if {![using_hla]} {
+ # if srst is not fitted use SYSRESETREQ to perform a soft reset.
+ cortex_m reset_config sysresetreq
+}
-----------------------------------------------------------------------
Summary of changes:
tcl/target/geehy/{apm32f4x.cfg => apm32f1x.cfg} | 18 +++++++++---------
1 file changed, 9 insertions(+), 9 deletions(-)
copy tcl/target/geehy/{apm32f4x.cfg => apm32f1x.cfg} (74%)
hooks/post-receive
--
Main OpenOCD repository
|
|
From: openocd-gerrit <ope...@us...> - 2023-12-30 13:15:00
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".
The branch, master has been updated
via 7f3aba13191debc68742f70580de7cf8465d3611 (commit)
from d46a3d635e3d41e2c531a20c97bde217431b5f76 (commit)
Those revisions listed above that are new to this repository have
not appeared on any other notification email; so we list those
revisions in full, below.
- Log -----------------------------------------------------------------
commit 7f3aba13191debc68742f70580de7cf8465d3611
Author: Marc Schink <de...@za...>
Date: Sun May 14 15:03:07 2023 +0200
tcl/target: Add Geehy APM32F4x config
Tested with APM32407RGT6 using JTAG and SWD transport. All flash
operations, including sector and device protection, work as expected.
Revision identifier (0x0009) is not updated due to missing documentation.
Change-Id: I33f4630fd00096656369ecc923aea2dcad77c7d3
Signed-off-by: Marc Schink <de...@za...>
Reviewed-on: https://review.openocd.org/c/openocd/+/8016
Reviewed-by: Tomas Vanek <va...@fb...>
Tested-by: jenkins
Reviewed-by: Antonio Borneo <bor...@gm...>
diff --git a/tcl/target/geehy/apm32f4x.cfg b/tcl/target/geehy/apm32f4x.cfg
new file mode 100644
index 000000000..3ed58d15b
--- /dev/null
+++ b/tcl/target/geehy/apm32f4x.cfg
@@ -0,0 +1,57 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
+#
+# Geehy APM32F4x target
+#
+# https://global.geehy.com/MCU
+#
+
+#
+# APM32F4x devices support JTAG and SWD transport.
+#
+source [find target/swj-dp.tcl]
+
+if { [info exists CHIPNAME] } {
+ set _CHIPNAME $CHIPNAME
+} else {
+ set _CHIPNAME apm32f4x
+}
+
+# Work-area is a space in RAM used for flash programming, by default use 4 KiB.
+if { [info exists WORKAREASIZE] } {
+ set _WORKAREASIZE $WORKAREASIZE
+} else {
+ set _WORKAREASIZE 0x1000
+}
+
+if { [info exists CPUTAPID] } {
+ set _CPUTAPID $CPUTAPID
+} else {
+ if { [using_jtag] } {
+ set _CPUTAPID 0x4ba00477
+ } else {
+ set _CPUTAPID 0x2ba01477
+ }
+}
+
+swj_newdap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
+dap create $_CHIPNAME.dap -chain-position $_CHIPNAME.cpu
+
+if { [using_jtag] } {
+ jtag newtap $_CHIPNAME bs -irlen 5
+}
+
+set _TARGETNAME $_CHIPNAME.cpu
+target create $_TARGETNAME cortex_m -endian little -dap $_CHIPNAME.dap
+
+$_TARGETNAME configure -work-area-phys 0x20000000 -work-area-size $_WORKAREASIZE -work-area-backup 0
+
+set _FLASHNAME $_CHIPNAME.flash
+flash bank $_FLASHNAME stm32f2x 0 0 0 0 $_TARGETNAME
+
+adapter speed 1000
+
+if {![using_hla]} {
+ # if srst is not fitted use SYSRESETREQ to perform a soft reset.
+ cortex_m reset_config sysresetreq
+}
-----------------------------------------------------------------------
Summary of changes:
tcl/target/geehy/{apm32f0x.cfg => apm32f4x.cfg} | 24 ++++++++++++++++--------
1 file changed, 16 insertions(+), 8 deletions(-)
copy tcl/target/geehy/{apm32f0x.cfg => apm32f4x.cfg} (65%)
hooks/post-receive
--
Main OpenOCD repository
|
|
From: openocd-gerrit <ope...@us...> - 2023-12-30 13:14:38
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".
The branch, master has been updated
via d46a3d635e3d41e2c531a20c97bde217431b5f76 (commit)
from a90b1642ec1c5dc12c7d9d2af806efee582f7b19 (commit)
Those revisions listed above that are new to this repository have
not appeared on any other notification email; so we list those
revisions in full, below.
- Log -----------------------------------------------------------------
commit d46a3d635e3d41e2c531a20c97bde217431b5f76
Author: Marc Schink <de...@za...>
Date: Sat May 13 12:37:12 2023 +0200
tcl/target: Add Geehy APM32F0x config
Tested with APM32F030C8T using SWD transport. All flash operations,
including sector and device protection, work as expected.
Revision identifier (0x0011) is not updated due to missing documentation.
Introduce a new directory structure that contains the manufacturer for
the sake of clarity.
Change-Id: I679387943b09fef640f8f8b6904e542f4e4b29aa
Signed-off-by: Marc Schink <de...@za...>
Reviewed-on: https://review.openocd.org/c/openocd/+/8015
Reviewed-by: Tomas Vanek <va...@fb...>
Reviewed-by: Antonio Borneo <bor...@gm...>
Tested-by: jenkins
diff --git a/tcl/target/geehy/apm32f0x.cfg b/tcl/target/geehy/apm32f0x.cfg
new file mode 100644
index 000000000..502c09275
--- /dev/null
+++ b/tcl/target/geehy/apm32f0x.cfg
@@ -0,0 +1,49 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
+#
+# Geehy APM32F0x target
+#
+# https://global.geehy.com/MCU
+#
+
+#
+# APM32F0x devices support SWD transport only.
+#
+source [find target/swj-dp.tcl]
+
+if { [info exists CHIPNAME] } {
+ set _CHIPNAME $CHIPNAME
+} else {
+ set _CHIPNAME apm32f0x
+}
+
+# Work-area is a space in RAM used for flash programming, by default use 1 KiB.
+if { [info exists WORKAREASIZE] } {
+ set _WORKAREASIZE $WORKAREASIZE
+} else {
+ set _WORKAREASIZE 0x400
+}
+
+if { [info exists CPUTAPID] } {
+ set _CPUTAPID $CPUTAPID
+} else {
+ set _CPUTAPID 0x0bc11477
+}
+
+swj_newdap $_CHIPNAME cpu -expected-id $_CPUTAPID
+dap create $_CHIPNAME.dap -chain-position $_CHIPNAME.cpu
+
+set _TARGETNAME $_CHIPNAME.cpu
+target create $_TARGETNAME cortex_m -endian little -dap $_CHIPNAME.dap
+
+$_TARGETNAME configure -work-area-phys 0x20000000 -work-area-size $_WORKAREASIZE -work-area-backup 0
+
+set _FLASHNAME $_CHIPNAME.flash
+flash bank $_FLASHNAME stm32f1x 0x08000000 0 0 0 $_TARGETNAME
+
+adapter speed 1000
+
+if {![using_hla]} {
+ # if srst is not fitted use SYSRESETREQ to perform a soft reset.
+ cortex_m reset_config sysresetreq
+}
-----------------------------------------------------------------------
Summary of changes:
tcl/target/geehy/apm32f0x.cfg | 49 +++++++++++++++++++++++++++++++++++++++++++
1 file changed, 49 insertions(+)
create mode 100644 tcl/target/geehy/apm32f0x.cfg
hooks/post-receive
--
Main OpenOCD repository
|
|
From: openocd-gerrit <ope...@us...> - 2023-12-30 13:13:57
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".
The branch, master has been updated
via a90b1642ec1c5dc12c7d9d2af806efee582f7b19 (commit)
from 5394e5b762ec01bef6bd5b00faa63b3361599e24 (commit)
Those revisions listed above that are new to this repository have
not appeared on any other notification email; so we list those
revisions in full, below.
- Log -----------------------------------------------------------------
commit a90b1642ec1c5dc12c7d9d2af806efee582f7b19
Author: Marc Schink <de...@za...>
Date: Sat May 13 12:24:04 2023 +0200
flash/nor/stm32f1x: Add support for Geehy APM32F0 series
Tested with APM32F030C8T.
Change-Id: I63cd8b66424135dae481a96ba560e6f0b1f9544e
Suggested-by: Christian U <in...@cu...>
Signed-off-by: Marc Schink <de...@za...>
Reviewed-on: https://review.openocd.org/c/openocd/+/8014
Tested-by: jenkins
Reviewed-by: Tomas Vanek <va...@fb...>
Reviewed-by: Antonio Borneo <bor...@gm...>
diff --git a/doc/openocd.texi b/doc/openocd.texi
index 7467e6ad9..395d03ca2 100644
--- a/doc/openocd.texi
+++ b/doc/openocd.texi
@@ -7707,12 +7707,10 @@ applied to all of them.
@end deffn
@deffn {Flash Driver} {stm32f1x}
-All members of the STM32F0, STM32F1 and STM32F3 microcontroller families
-from STMicroelectronics and all members of the GD32F1x0, GD32F3x0 and GD32E23x microcontroller
-families from GigaDevice include internal flash and use ARM Cortex-M0/M3/M4/M23 cores.
-The driver also works with GD32VF103 powered by RISC-V core.
-The driver automatically recognizes a number of these chips using
-the chip identification register, and autoconfigures itself.
+This driver supports the STM32F0, STM32F1 and STM32F3 microcontroller series from STMicroelectronics.
+The driver is also compatible with the GD32F1, GD32VF103 (RISC-V core), GD32F3 and GD32E23 microcontroller series from GigaDevice.
+The driver also supports the APM32F0 series from Geehy Semiconductor.
+The driver automatically recognizes a number of these chips using the chip identification register, and autoconfigures itself.
@example
flash bank $_FLASHNAME stm32f1x 0 0 0 0 $_TARGETNAME
diff --git a/src/flash/nor/stm32f1x.c b/src/flash/nor/stm32f1x.c
index b3bb84335..5a3c2da66 100644
--- a/src/flash/nor/stm32f1x.c
+++ b/src/flash/nor/stm32f1x.c
@@ -745,6 +745,7 @@ static int stm32x_get_property_addr(struct target *target, struct stm32x_propert
switch (cortex_m_get_impl_part(target)) {
case CORTEX_M0_PARTNO: /* STM32F0x devices */
+ case CORTEX_M0P_PARTNO: /* APM32F0x devices */
addr->device_id = 0x40015800;
addr->flash_size = 0x1FFFF7CC;
return ERROR_OK;
-----------------------------------------------------------------------
Summary of changes:
doc/openocd.texi | 10 ++++------
src/flash/nor/stm32f1x.c | 1 +
2 files changed, 5 insertions(+), 6 deletions(-)
hooks/post-receive
--
Main OpenOCD repository
|
|
From: openocd-gerrit <ope...@us...> - 2023-12-30 13:12:19
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".
The branch, master has been updated
via 5394e5b762ec01bef6bd5b00faa63b3361599e24 (commit)
from 8df529fa663cef2004a6a26e8f147b8c96e03de9 (commit)
Those revisions listed above that are new to this repository have
not appeared on any other notification email; so we list those
revisions in full, below.
- Log -----------------------------------------------------------------
commit 5394e5b762ec01bef6bd5b00faa63b3361599e24
Author: Marc Schink <de...@za...>
Date: Mon Dec 11 16:28:17 2023 +0100
target/cortex_m: Add Cortex-M85 part
Change-Id: I91d4c05307d9611ecab11eb52218ab1cb7ed65e3
Signed-off-by: Marc Schink <de...@za...>
Reviewed-on: https://review.openocd.org/c/openocd/+/8048
Reviewed-by: Tomas Vanek <va...@fb...>
Tested-by: jenkins
Reviewed-by: Antonio Borneo <bor...@gm...>
Reviewed-by: Tarek BOCHKATI <tar...@gm...>
diff --git a/src/target/cortex_m.c b/src/target/cortex_m.c
index 3eafee0a1..d9e8b538f 100644
--- a/src/target/cortex_m.c
+++ b/src/target/cortex_m.c
@@ -105,6 +105,12 @@ static const struct cortex_m_part_info cortex_m_parts[] = {
.arch = ARM_ARCH_V8M,
.flags = CORTEX_M_F_HAS_FPV5,
},
+ {
+ .impl_part = CORTEX_M85_PARTNO,
+ .name = "Cortex-M85",
+ .arch = ARM_ARCH_V8M,
+ .flags = CORTEX_M_F_HAS_FPV5,
+ },
{
.impl_part = STAR_MC1_PARTNO,
.name = "STAR-MC1",
diff --git a/src/target/cortex_m.h b/src/target/cortex_m.h
index 0bc139911..a585b786b 100644
--- a/src/target/cortex_m.h
+++ b/src/target/cortex_m.h
@@ -56,6 +56,7 @@ enum cortex_m_impl_part {
CORTEX_M33_PARTNO = ARM_MAKE_CPUID(ARM_IMPLEMENTOR_ARM, 0xD21),
CORTEX_M35P_PARTNO = ARM_MAKE_CPUID(ARM_IMPLEMENTOR_ARM, 0xD31),
CORTEX_M55_PARTNO = ARM_MAKE_CPUID(ARM_IMPLEMENTOR_ARM, 0xD22),
+ CORTEX_M85_PARTNO = ARM_MAKE_CPUID(ARM_IMPLEMENTOR_ARM, 0xD23),
INFINEON_SLX2_PARTNO = ARM_MAKE_CPUID(ARM_IMPLEMENTOR_INFINEON, 0xDB0),
REALTEK_M200_PARTNO = ARM_MAKE_CPUID(ARM_IMPLEMENTOR_REALTEK, 0xd20),
REALTEK_M300_PARTNO = ARM_MAKE_CPUID(ARM_IMPLEMENTOR_REALTEK, 0xd22),
-----------------------------------------------------------------------
Summary of changes:
src/target/cortex_m.c | 6 ++++++
src/target/cortex_m.h | 1 +
2 files changed, 7 insertions(+)
hooks/post-receive
--
Main OpenOCD repository
|
|
From: openocd-gerrit <ope...@us...> - 2023-12-30 13:10:39
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".
The branch, master has been updated
via 8df529fa663cef2004a6a26e8f147b8c96e03de9 (commit)
from 65fc586d6ee18813937ec0fdb264b9e0d4bc1c76 (commit)
Those revisions listed above that are new to this repository have
not appeared on any other notification email; so we list those
revisions in full, below.
- Log -----------------------------------------------------------------
commit 8df529fa663cef2004a6a26e8f147b8c96e03de9
Author: Aleksey Shargalin <myo...@gm...>
Date: Tue Oct 31 17:23:40 2017 +0300
bitbang: Add flush before sleep
Some bitbang interfaces have no speed regulation and work as fast as
they can. Only the sequence of execuded commands is guaranteed but
not the timing. It works most of time with one exception: when the
JTAG_SLEEP command is executed, we expect that all previous commands
already finished so that the sleep interval is guaranteed.
For now there may be situations when the sleep time has passed but
previous commands are not actually executed.
This patch adds a flush command to the bitbang interface, connects it
to the existing implementation for remote_bitbang, and runs it when
the JTAG_SLEEP command is executed.
Change-Id: If40894a63d29a260a4ded134b008df6dd1e89c46
Signed-off-by: Aleksey Shargalin <myo...@gm...>
Signed-off-by: David Ryskalczyk <dav...@gm...>
Reviewed-on: https://review.openocd.org/c/openocd/+/4284
Reviewed-by: Antonio Borneo <bor...@gm...>
Tested-by: jenkins
diff --git a/src/jtag/drivers/bitbang.c b/src/jtag/drivers/bitbang.c
index 6e97d1584..186d2098a 100644
--- a/src/jtag/drivers/bitbang.c
+++ b/src/jtag/drivers/bitbang.c
@@ -360,6 +360,8 @@ int bitbang_execute_queue(void)
break;
case JTAG_SLEEP:
LOG_DEBUG_IO("sleep %" PRIu32, cmd->cmd.sleep->us);
+ if (bitbang_interface->flush && (bitbang_interface->flush() != ERROR_OK))
+ return ERROR_FAIL;
bitbang_sleep(cmd->cmd.sleep->us);
break;
case JTAG_TMS:
diff --git a/src/jtag/drivers/bitbang.h b/src/jtag/drivers/bitbang.h
index e3714df9c..097a5c0d1 100644
--- a/src/jtag/drivers/bitbang.h
+++ b/src/jtag/drivers/bitbang.h
@@ -57,6 +57,9 @@ struct bitbang_interface {
/** Sleep for some number of microseconds. **/
int (*sleep)(unsigned int microseconds);
+
+ /** Force a flush. */
+ int (*flush)(void);
};
extern const struct swd_driver bitbang_swd;
diff --git a/src/jtag/drivers/remote_bitbang.c b/src/jtag/drivers/remote_bitbang.c
index c488f8334..6d0fba2e4 100644
--- a/src/jtag/drivers/remote_bitbang.c
+++ b/src/jtag/drivers/remote_bitbang.c
@@ -281,6 +281,7 @@ static struct bitbang_interface remote_bitbang_bitbang = {
.swd_write = &remote_bitbang_swd_write,
.blink = &remote_bitbang_blink,
.sleep = &remote_bitbang_sleep,
+ .flush = &remote_bitbang_flush,
};
static int remote_bitbang_init_tcp(void)
-----------------------------------------------------------------------
Summary of changes:
src/jtag/drivers/bitbang.c | 2 ++
src/jtag/drivers/bitbang.h | 3 +++
src/jtag/drivers/remote_bitbang.c | 1 +
3 files changed, 6 insertions(+)
hooks/post-receive
--
Main OpenOCD repository
|
|
From: openocd-gerrit <ope...@us...> - 2023-12-30 13:09:44
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".
The branch, master has been updated
via 65fc586d6ee18813937ec0fdb264b9e0d4bc1c76 (commit)
from 8d3728f931888d2e9a9bc5a31d26c8327649e676 (commit)
Those revisions listed above that are new to this repository have
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- Log -----------------------------------------------------------------
commit 65fc586d6ee18813937ec0fdb264b9e0d4bc1c76
Author: Henrik Nordström <hen...@ad...>
Date: Sun Dec 17 17:39:50 2023 +0100
tcl/target: add Marvell Octeon TX2 CN9130 target
This has a quite complex JTAG router chain requiring both a custom
BYPASS instruction to access child taps, and JTAG configuration to
enable individual DAP nodes.
Change-Id: I6f5345764e1566d70c8526a7e8ec5d250185bd2c
Signed-off-by: Henrik Nordström <hen...@ad...>
Reviewed-on: https://review.openocd.org/c/openocd/+/8042
Tested-by: jenkins
Reviewed-by: Antonio Borneo <bor...@gm...>
diff --git a/tcl/target/marvell/cn9130.cfg b/tcl/target/marvell/cn9130.cfg
new file mode 100644
index 000000000..23e472f28
--- /dev/null
+++ b/tcl/target/marvell/cn9130.cfg
@@ -0,0 +1,178 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
+# cn9130 -- support for the Marvell Octeon TX2 / CN9130 CPU family
+#
+# hen...@ad..., Nov 2023
+
+if { [info exists CHIPNAME] } {
+ set _CHIPNAME $CHIPNAME
+} else {
+ set _CHIPNAME cn9130
+}
+
+if { [info exists MASTERTAPID] } {
+ set _MASTERTAPID $MASTERTAPID
+} else {
+ set _MASTERTAPID 0x07025357
+}
+
+if { [info exists APTAPID] } {
+ set _APTAPID $APTAPID
+} else {
+ set _APTAPID 0x4ba00477
+}
+
+if { [info exists SBTAPID] } {
+ set _SBTAPID $SBTAPID
+} else {
+ set _SBTAPID 0x4ba00477
+}
+
+if { [info exists CORES] } {
+ set _CORES $CORES
+} else {
+ set _CORES 4
+}
+
+# CTI base address should be possible to read from the CoreSight
+# ROM table like how the DBG base address is when not specified.
+if { [info exists CTIBASE] } {
+ set _CTIBASE $CTIBASE
+} else {
+ set _CTIBASE {0x80420000 0x80520000 0x80620000 0x80720000}
+}
+
+# CN9130 is a multi-die chip and has a multi level hierarchical
+# JTAG TAP, where all the DAPs are disabled at reset, requiring
+# both configuration to enable access to the chip DAPs, and a
+# vendor specific bypass IR instruction to access the slave TAPs
+# via the master TAP. In addition there is a number of sample
+# bits that should be ignored.
+#
+# The default BYPASS instruction in the master TAP bypasses the
+# whole chip and not only the master TAP. And similarly on
+# IDCODE the master TAP only responds with it's own ID and
+# bypasses the other TAPs on the chip, while OpenOCD expects
+# ID from all enabled TAPs in the chain.
+
+# Bootstrap with the default boundary scan oriented TAP configuration
+# where the master,ap,sb TAPs are seen as one big fat TAP, which matches
+# what OpenOCD expects from IDCODE and BYPASS.
+
+jtag newtap $_CHIPNAME bs -irlen 19 -enable -expected-id $_MASTERTAPID
+
+# Declare the full JTAG chain, but in disabled state during setup
+
+jtag newtap $_CHIPNAME sample4 -irlen 1 -disable
+jtag newtap $_CHIPNAME sample3 -irlen 1 -disable
+jtag newtap $_CHIPNAME sample2 -irlen 1 -disable
+jtag newtap $_CHIPNAME ap.cpu -irlen 4 -disable -expected-id $_APTAPID
+jtag newtap $_CHIPNAME ap -irlen 5 -disable
+jtag newtap $_CHIPNAME sample1 -irlen 1 -disable
+jtag newtap $_CHIPNAME sb.cpu -irlen 4 -disable -expected-id $_SBTAPID
+jtag newtap $_CHIPNAME sb -irlen 5 -disable
+jtag newtap $_CHIPNAME master -irlen 5 -disable -ir-bypass 0x11 -expected-id $_MASTERTAPID
+
+# Once the iniial IDCODE scan has completed switch to more detailed
+# scan chain giving access to the individual chip TAPs.
+
+jtag configure $_CHIPNAME.bs -event setup "cn9130_enable_full_chain $_CHIPNAME"
+
+proc cn9130_enable_full_chain { _CHIPNAME } {
+ # Switch to detailed TAP declaration
+ jtag tapdisable $_CHIPNAME.bs
+ jtag tapenable $_CHIPNAME.master
+ jtag tapenable $_CHIPNAME.sb
+ jtag tapenable $_CHIPNAME.sample1
+ jtag tapenable $_CHIPNAME.ap
+ jtag tapenable $_CHIPNAME.sample2
+ jtag tapenable $_CHIPNAME.sample3
+ jtag tapenable $_CHIPNAME.sample4
+}
+
+# AP & SB TAPs have a config register to enable/disable access to
+# the auxilary DAP TAP. Default off which hides the DAP TAP from
+# the scan chain.
+proc cn9130_dap_config { chip tap state } {
+ irscan $chip.$tap 0x12
+ drscan $chip.$tap 32 $state
+}
+
+jtag configure $_CHIPNAME.bs -event tap-disable ""
+jtag configure $_CHIPNAME.bs -event tap-enable ""
+jtag configure $_CHIPNAME.sample4 -event tap-enable ""
+jtag configure $_CHIPNAME.sample3 -event tap-enable ""
+jtag configure $_CHIPNAME.sample2 -event tap-enable ""
+jtag configure $_CHIPNAME.ap.cpu -event tap-disable "cn9130_dap_config $_CHIPNAME ap 0"
+jtag configure cn9130.ap.cpu -event tap-enable "cn9130_dap_config $_CHIPNAME ap 1"
+jtag configure $_CHIPNAME.ap -event tap-enable ""
+jtag configure $_CHIPNAME.sample1 -event tap-enable ""
+jtag configure $_CHIPNAME.sb.cpu -event tap-disable "cn9130_dap_config $_CHIPNAME sb 0"
+jtag configure cn9130.sb.cpu -event tap-enable "cn9130_dap_config $_CHIPNAME sb 1"
+jtag configure $_CHIPNAME.sb -event tap-enable ""
+jtag configure $_CHIPNAME.master -event tap-enable ""
+
+dap create $_CHIPNAME.ap.dap -chain-position $_CHIPNAME.ap.cpu
+
+# Main bus
+target create $_CHIPNAME.ap.axi mem_ap \
+ -dap $_CHIPNAME.ap.dap \
+ -ap-num 0
+
+# Periperials bus
+target create $_CHIPNAME.ap.apb mem_ap \
+ -dap $_CHIPNAME.ap.dap \
+ -ap-num 1
+
+# MSS bus
+target create $_CHIPNAME.ap.ahb mem_ap \
+ -dap $_CHIPNAME.ap.dap \
+ -ap-num 2
+
+# AP A72 CPU cores
+set _smp_command ""
+for { set _core 0 } { $_core < $_CORES } { incr _core 1 } {
+ cti create $_CHIPNAME.ap.cti.$_core \
+ -dap $_CHIPNAME.ap.dap \
+ -baseaddr [ lindex $_CTIBASE $_core ] \
+ -ap-num 1
+
+ if { $_core == 0 } {
+ target create $_CHIPNAME.ap.a72.$_core aarch64 \
+ -dap $_CHIPNAME.ap.dap \
+ -ap-num 1 \
+ -cti $_CHIPNAME.ap.cti.$_core \
+ -coreid $_core \
+ -rtos hwthread
+ set _smp_command "target smp $_CHIPNAME.ap.a72.$_core"
+ } else {
+ # Defer non-boot cores. Held hard in reset until
+ # SMP is activated.
+ target create $_CHIPNAME.ap.a72.$_core aarch64 \
+ -dap $_CHIPNAME.ap.dap \
+ -ap-num 1 \
+ -cti $_CHIPNAME.ap.cti.$_core \
+ -coreid $_core \
+ -defer-examine
+ set _smp_command "$_smp_command $_CHIPNAME.ap.a72.$_core"
+ }
+
+}
+
+# Set up the A72 cluster as SMP
+# Note: Only the boot core is active by default. The other core DAPs can
+# be enabled by arp_examine after they have been released from hard reset.
+eval $_smp_command
+
+# AP MSS M3 CPU core. Defer as it is held in reset until firmware is loaded.
+target create $_CHIPNAME.ap.mss cortex_m -dap $_CHIPNAME.ap.dap -ap-num 2 -defer-examine
+
+# Why is this needed? reset fails with "Debug regions are unpowered" otherwise
+$_CHIPNAME.ap.axi configure -event examine-start "dap init"
+
+# Automate enabling the AP A72 DAP once the full scan chain is enabled
+proc cn9130_ap_setup { _CHIPNAME } {
+ jtag tapenable $_CHIPNAME.ap.cpu
+ targets $_CHIPNAME.ap.a72.0
+}
+jtag configure $_CHIPNAME.ap -event setup "cn9130_ap_setup $_CHIPNAME"
-----------------------------------------------------------------------
Summary of changes:
tcl/target/marvell/cn9130.cfg | 178 ++++++++++++++++++++++++++++++++++++++++++
1 file changed, 178 insertions(+)
create mode 100644 tcl/target/marvell/cn9130.cfg
hooks/post-receive
--
Main OpenOCD repository
|
|
From: openocd-gerrit <ope...@us...> - 2023-12-30 13:09:13
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".
The branch, master has been updated
via 8d3728f931888d2e9a9bc5a31d26c8327649e676 (commit)
from fc268f83261e08cfb1751f8e8f9a20900bf0e360 (commit)
Those revisions listed above that are new to this repository have
not appeared on any other notification email; so we list those
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- Log -----------------------------------------------------------------
commit 8d3728f931888d2e9a9bc5a31d26c8327649e676
Author: Henrik Nordström <hen...@ad...>
Date: Sun Dec 17 23:14:37 2023 +0100
jtag: add -ir-bypass option to newtap
Some devices with an internal multi-tap JTAG router require a vendor
specific bypass instruction to bypass the master TAP when addressing
slave taps internal to the same device. On these devices the standard
bypass instruction bypasses the whole device.
Change-Id: I4506f0e67c9e4dfe39b7fa18c63d67900313e594
Signed-off-by: Henrik Nordström <hen...@ad...>
Reviewed-on: https://review.openocd.org/c/openocd/+/8041
Reviewed-by: Antonio Borneo <bor...@gm...>
Tested-by: jenkins
diff --git a/doc/openocd.texi b/doc/openocd.texi
index ec7c9964a..7467e6ad9 100644
--- a/doc/openocd.texi
+++ b/doc/openocd.texi
@@ -4424,6 +4424,10 @@ there seems to be no problems with JTAG scan chain operations.
register during initial examination and when checking the sticky error bit.
This bit is normally checked after setting the CSYSPWRUPREQ bit, but some
devices do not set the ack bit until sometime later.
+@item @code{-ir-bypass} @var{NUMBER}
+@*Vendor specific bypass instruction, required by some hierarchical JTAG
+routers where the normal BYPASS instruction bypasses the whole router and
+a vendor specific bypass instruction is required to access child nodes.
@end itemize
@end deffn
diff --git a/src/jtag/drivers/driver.c b/src/jtag/drivers/driver.c
index 773231500..fae2aad22 100644
--- a/src/jtag/drivers/driver.c
+++ b/src/jtag/drivers/driver.c
@@ -85,7 +85,13 @@ int interface_jtag_add_ir_scan(struct jtag_tap *active,
tap->bypass = true;
field->num_bits = tap->ir_length;
- field->out_value = buf_set_ones(cmd_queue_alloc(DIV_ROUND_UP(tap->ir_length, 8)), tap->ir_length);
+ if (tap->ir_bypass_value) {
+ uint8_t *v = cmd_queue_alloc(DIV_ROUND_UP(tap->ir_length, 8));
+ buf_set_u64(v, 0, tap->ir_length, tap->ir_bypass_value);
+ field->out_value = v;
+ } else {
+ field->out_value = buf_set_ones(cmd_queue_alloc(DIV_ROUND_UP(tap->ir_length, 8)), tap->ir_length);
+ }
field->in_value = NULL; /* do not collect input for tap's in bypass */
}
diff --git a/src/jtag/hla/hla_transport.c b/src/jtag/hla/hla_transport.c
index 08ee18f36..c0443d835 100644
--- a/src/jtag/hla/hla_transport.c
+++ b/src/jtag/hla/hla_transport.c
@@ -45,6 +45,7 @@ static const struct command_registration hl_swd_transport_subcommand_handlers[]
"['-ignore-version'] "
"['-ignore-bypass'] "
"['-ircapture' number] "
+ "['-ir-bypass' number] "
"['-mask' number]",
},
COMMAND_REGISTRATION_DONE
@@ -74,6 +75,7 @@ static const struct command_registration hl_transport_jtag_subcommand_handlers[]
"['-ignore-version'] "
"['-ignore-bypass'] "
"['-ircapture' number] "
+ "['-ir-bypass' number] "
"['-mask' number]",
},
{
diff --git a/src/jtag/jtag.h b/src/jtag/jtag.h
index 1d1c495cf..470ae1833 100644
--- a/src/jtag/jtag.h
+++ b/src/jtag/jtag.h
@@ -133,6 +133,9 @@ struct jtag_tap {
/** Bypass register selected */
bool bypass;
+ /** Bypass instruction value */
+ uint64_t ir_bypass_value;
+
struct jtag_tap_event_action *event_action;
struct jtag_tap *next_tap;
diff --git a/src/jtag/tcl.c b/src/jtag/tcl.c
index 85a66aaf6..407aeb1d8 100644
--- a/src/jtag/tcl.c
+++ b/src/jtag/tcl.c
@@ -386,6 +386,7 @@ static int jtag_tap_configure_cmd(struct jim_getopt_info *goi, struct jtag_tap *
#define NTAP_OPT_EXPECTED_ID 5
#define NTAP_OPT_VERSION 6
#define NTAP_OPT_BYPASS 7
+#define NTAP_OPT_IRBYPASS 8
static const struct nvp jtag_newtap_opts[] = {
{ .name = "-irlen", .value = NTAP_OPT_IRLEN },
@@ -396,6 +397,7 @@ static const struct nvp jtag_newtap_opts[] = {
{ .name = "-expected-id", .value = NTAP_OPT_EXPECTED_ID },
{ .name = "-ignore-version", .value = NTAP_OPT_VERSION },
{ .name = "-ignore-bypass", .value = NTAP_OPT_BYPASS },
+ { .name = "-ir-bypass", .value = NTAP_OPT_IRBYPASS },
{ .name = NULL, .value = -1 },
};
@@ -499,6 +501,15 @@ static COMMAND_HELPER(handle_jtag_newtap_args, struct jtag_tap *tap)
tap->ignore_bypass = true;
break;
+ case NTAP_OPT_IRBYPASS:
+ if (!CMD_ARGC)
+ return ERROR_COMMAND_ARGUMENT_INVALID;
+
+ COMMAND_PARSE_NUMBER(u64, CMD_ARGV[0], tap->ir_bypass_value);
+ CMD_ARGC--;
+ CMD_ARGV++;
+ break;
+
default:
nvp_unknown_command_print(CMD, jtag_newtap_opts, NULL, CMD_ARGV[-1]);
return ERROR_COMMAND_ARGUMENT_INVALID;
@@ -752,6 +763,7 @@ static const struct command_registration jtag_subcommand_handlers[] = {
"['-ignore-version'] "
"['-ignore-bypass'] "
"['-ircapture' number] "
+ "['-ir-bypass' number] "
"['-mask' number]",
},
{
diff --git a/src/target/adi_v5_dapdirect.c b/src/target/adi_v5_dapdirect.c
index 575092cbf..f3a90c0b1 100644
--- a/src/target/adi_v5_dapdirect.c
+++ b/src/target/adi_v5_dapdirect.c
@@ -66,6 +66,7 @@ static const struct command_registration dapdirect_jtag_subcommand_handlers[] =
"['-ignore-version'] "
"['-ignore-bypass'] "
"['-ircapture' number] "
+ "['-ir-bypass' number] "
"['-mask' number]",
},
{
@@ -156,6 +157,7 @@ static const struct command_registration dapdirect_swd_subcommand_handlers[] = {
"['-ignore-version'] "
"['-ignore-bypass'] "
"['-ircapture' number] "
+ "['-ir-bypass' number] "
"['-mask' number]",
},
COMMAND_REGISTRATION_DONE
diff --git a/src/target/adi_v5_swd.c b/src/target/adi_v5_swd.c
index edcad741e..6d6f287b0 100644
--- a/src/target/adi_v5_swd.c
+++ b/src/target/adi_v5_swd.c
@@ -705,6 +705,7 @@ static const struct command_registration swd_commands[] = {
"['-ignore-version'] "
"['-ignore-bypass'] "
"['-ircapture' number] "
+ "['-ir-bypass' number] "
"['-mask' number]",
},
COMMAND_REGISTRATION_DONE
-----------------------------------------------------------------------
Summary of changes:
doc/openocd.texi | 4 ++++
src/jtag/drivers/driver.c | 8 +++++++-
src/jtag/hla/hla_transport.c | 2 ++
src/jtag/jtag.h | 3 +++
src/jtag/tcl.c | 12 ++++++++++++
src/target/adi_v5_dapdirect.c | 2 ++
src/target/adi_v5_swd.c | 1 +
7 files changed, 31 insertions(+), 1 deletion(-)
hooks/post-receive
--
Main OpenOCD repository
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|
From: openocd-gerrit <ope...@us...> - 2023-12-30 13:07:59
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".
The branch, master has been updated
via fc268f83261e08cfb1751f8e8f9a20900bf0e360 (commit)
from 357996d99626170c11cb896be91c4cdc2afbca8d (commit)
Those revisions listed above that are new to this repository have
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- Log -----------------------------------------------------------------
commit fc268f83261e08cfb1751f8e8f9a20900bf0e360
Author: Peter Collingbourne <pc...@go...>
Date: Fri Dec 8 13:57:44 2023 -0800
target/armv8: Add more support for decoding memory attributes
Change-Id: I7ac7b06d67ec806a9ebffc26a7c6b9c24f024478
Signed-off-by: Peter Collingbourne <pc...@go...>
Reviewed-on: https://review.openocd.org/c/openocd/+/8043
Reviewed-by: Antonio Borneo <bor...@gm...>
Tested-by: jenkins
diff --git a/src/target/armv8.c b/src/target/armv8.c
index d197477ac..daf1ffca3 100644
--- a/src/target/armv8.c
+++ b/src/target/armv8.c
@@ -943,6 +943,81 @@ int armv8_mmu_translate_va(struct target *target, target_addr_t va, target_addr
return ERROR_OK;
}
+static void armv8_decode_cacheability(int attr)
+{
+ if (attr == 0) {
+ LOG_USER_N("UNPREDICTABLE");
+ return;
+ }
+ if (attr == 4) {
+ LOG_USER_N("Non-cacheable");
+ return;
+ }
+ switch (attr & 0xC) {
+ case 0:
+ LOG_USER_N("Write-Through Transient");
+ break;
+ case 0x4:
+ LOG_USER_N("Write-Back Transient");
+ break;
+ case 0x8:
+ LOG_USER_N("Write-Through Non-transient");
+ break;
+ case 0xC:
+ LOG_USER_N("Write-Back Non-transient");
+ break;
+ }
+ if (attr & 2)
+ LOG_USER_N(" Read-Allocate");
+ else
+ LOG_USER_N(" No-Read Allocate");
+ if (attr & 1)
+ LOG_USER_N(" Write-Allocate");
+ else
+ LOG_USER_N(" No-Write Allocate");
+}
+
+static void armv8_decode_memory_attr(int attr)
+{
+ if (attr == 0x40) {
+ LOG_USER("Normal Memory, Inner Non-cacheable, "
+ "Outer Non-cacheable, XS=0");
+ } else if (attr == 0xA0) {
+ LOG_USER("Normal Memory, Inner Write-through Cacheable, "
+ "Outer Write-through Cacheable, Read-Allocate, "
+ "No-Write Allocate, Non-transient, XS=0");
+ } else if (attr == 0xF0) {
+ LOG_USER("Tagged Normal Memory, Inner Write-Back, "
+ "Outer Write-Back, Read-Allocate, Write-Allocate, "
+ "Non-transient");
+ } else if ((attr & 0xF0) == 0) {
+ switch (attr & 0xC) {
+ case 0:
+ LOG_USER_N("Device-nGnRnE Memory");
+ break;
+ case 0x4:
+ LOG_USER_N("Device-nGnRE Memory");
+ break;
+ case 0x8:
+ LOG_USER_N("Device-nGRE Memory");
+ break;
+ case 0xC:
+ LOG_USER_N("Device-GRE Memory");
+ break;
+ }
+ if (attr & 1)
+ LOG_USER(", XS=0");
+ else
+ LOG_USER_N("\n");
+ } else {
+ LOG_USER_N("Normal Memory, Inner ");
+ armv8_decode_cacheability(attr & 0xF);
+ LOG_USER_N(", Outer ");
+ armv8_decode_cacheability(attr >> 4);
+ LOG_USER_N("\n");
+ }
+}
+
/* V8 method VA TO PA */
int armv8_mmu_translate_va_pa(struct target *target, target_addr_t va,
target_addr_t *val, int meminfo)
@@ -1025,11 +1100,9 @@ int armv8_mmu_translate_va_pa(struct target *target, target_addr_t va,
int NS = (par >> 9) & 1;
int ATTR = (par >> 56) & 0xFF;
- char *memtype = (ATTR & 0xF0) == 0 ? "Device Memory" : "Normal Memory";
-
LOG_USER("%sshareable, %s",
shared_name[SH], secure_name[NS]);
- LOG_USER("%s", memtype);
+ armv8_decode_memory_attr(ATTR);
}
}
-----------------------------------------------------------------------
Summary of changes:
src/target/armv8.c | 79 +++++++++++++++++++++++++++++++++++++++++++++++++++---
1 file changed, 76 insertions(+), 3 deletions(-)
hooks/post-receive
--
Main OpenOCD repository
|
|
From: openocd-gerrit <ope...@us...> - 2023-12-29 14:35:50
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".
The branch, master has been updated
via 357996d99626170c11cb896be91c4cdc2afbca8d (commit)
from bfc12522395af86ba634aa8e085a8051ca6fd43c (commit)
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not appeared on any other notification email; so we list those
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- Log -----------------------------------------------------------------
commit 357996d99626170c11cb896be91c4cdc2afbca8d
Author: Tomas Vanek <va...@fb...>
Date: Wed Mar 15 14:12:47 2023 +0100
target/adi_v5_swd: optimize sequences in swd_connect_multidrop()
swd_connect_multidrop() sent DORMANT_TO_SWD and called
swd_multidrop_select_inner(). DORMANT_TO_SWD sequence ends
with a LINE_RESET sequence.
swd_multidrop_select_inner() sent LINE_RESET sequence again.
It was useless in this case.
swd_connect_multidrop() emited JTAG_TO_DORMANT and DORMANT_TO_SWD
sequences before connecting each DAP in SWD multidrop bus.
It is sufficient to emit JTAG_TO_DORMANT and DORMANT_TO_SWD
just once and emit the shorter LINE_RESET instead for subsequent DAPs.
Introduce a global variable swd_multidrop_in_swd_state
and use it to control what sequence is emitted.
In case of reconnect after an error, always use the full switch
JTAG_TO_DORMANT and DORMANT_TO_SWD.
Change-Id: Iba21620f6a9680793208bf398960ed0eb59df3b1
Signed-off-by: Tomas Vanek <va...@fb...>
Reviewed-on: https://review.openocd.org/c/openocd/+/7218
Tested-by: jenkins
Reviewed-by: Antonio Borneo <bor...@gm...>
diff --git a/src/target/adi_v5_swd.c b/src/target/adi_v5_swd.c
index 968798b32..edcad741e 100644
--- a/src/target/adi_v5_swd.c
+++ b/src/target/adi_v5_swd.c
@@ -48,6 +48,8 @@ static bool do_sync;
static struct adiv5_dap *swd_multidrop_selected_dap;
+static bool swd_multidrop_in_swd_state;
+
static int swd_queue_dp_write_inner(struct adiv5_dap *dap, unsigned int reg,
uint32_t data);
@@ -187,7 +189,15 @@ static int swd_multidrop_select_inner(struct adiv5_dap *dap, uint32_t *dpidr_ptr
assert(dap_is_multidrop(dap));
- swd_send_sequence(dap, LINE_RESET);
+ /* Send JTAG_TO_DORMANT and DORMANT_TO_SWD just once
+ * and then use shorter LINE_RESET until communication fails */
+ if (!swd_multidrop_in_swd_state) {
+ swd_send_sequence(dap, JTAG_TO_DORMANT);
+ swd_send_sequence(dap, DORMANT_TO_SWD);
+ } else {
+ swd_send_sequence(dap, LINE_RESET);
+ }
+
/*
* Zero dap->select and set dap->select_dpbanksel_valid
* to skip the write to DP_SELECT before DPIDR read, avoiding
@@ -245,6 +255,7 @@ static int swd_multidrop_select_inner(struct adiv5_dap *dap, uint32_t *dpidr_ptr
LOG_DEBUG_IO("Selected DP_TARGETSEL 0x%08" PRIx32, dap->multidrop_targetsel);
swd_multidrop_selected_dap = dap;
+ swd_multidrop_in_swd_state = true;
if (dpidr_ptr)
*dpidr_ptr = dpidr;
@@ -294,8 +305,9 @@ static int swd_connect_multidrop(struct adiv5_dap *dap)
int64_t timeout = timeval_ms() + 500;
do {
- swd_send_sequence(dap, JTAG_TO_DORMANT);
- swd_send_sequence(dap, DORMANT_TO_SWD);
+ /* Do not make any assumptions about SWD state in case of reconnect */
+ if (dap->do_reconnect)
+ swd_multidrop_in_swd_state = false;
/* Clear link state, including the SELECT cache. */
dap->do_reconnect = false;
@@ -306,6 +318,7 @@ static int swd_connect_multidrop(struct adiv5_dap *dap)
if (retval == ERROR_OK)
break;
+ swd_multidrop_in_swd_state = false;
alive_sleep(1);
} while (timeval_ms() < timeout);
@@ -316,6 +329,7 @@ static int swd_connect_multidrop(struct adiv5_dap *dap)
return retval;
}
+ swd_multidrop_in_swd_state = true;
LOG_INFO("SWD DPIDR 0x%08" PRIx32 ", DLPIDR 0x%08" PRIx32,
dpidr, dlpidr);
@@ -392,6 +406,13 @@ static int swd_connect_single(struct adiv5_dap *dap)
return retval;
}
+static int swd_pre_connect(struct adiv5_dap *dap)
+{
+ swd_multidrop_in_swd_state = false;
+
+ return ERROR_OK;
+}
+
static int swd_connect(struct adiv5_dap *dap)
{
int status;
@@ -627,7 +648,12 @@ static void swd_quit(struct adiv5_dap *dap)
done = true;
if (dap_is_multidrop(dap)) {
+ /* Emit the switch seq to dormant state regardless the state mirrored
+ * in swd_multidrop_in_swd_state. Doing so ensures robust operation
+ * in the case the variable is out of sync.
+ * Sending SWD_TO_DORMANT makes no change if the DP is already dormant. */
swd->switch_seq(SWD_TO_DORMANT);
+ swd_multidrop_in_swd_state = false;
/* Revisit!
* Leaving DPs in dormant state was tested and offers some safety
* against DPs mismatch in case of unintentional use of non-multidrop SWD.
@@ -648,6 +674,7 @@ static void swd_quit(struct adiv5_dap *dap)
}
const struct dap_ops swd_dap_ops = {
+ .pre_connect_init = swd_pre_connect,
.connect = swd_connect,
.send_sequence = swd_send_sequence,
.queue_dp_read = swd_queue_dp_read,
-----------------------------------------------------------------------
Summary of changes:
src/target/adi_v5_swd.c | 33 ++++++++++++++++++++++++++++++---
1 file changed, 30 insertions(+), 3 deletions(-)
hooks/post-receive
--
Main OpenOCD repository
|
|
From: openocd-gerrit <ope...@us...> - 2023-12-29 14:35:24
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".
The branch, master has been updated
via bfc12522395af86ba634aa8e085a8051ca6fd43c (commit)
from ee3fb5a0eacb42e8e881239194485d79d128d246 (commit)
Those revisions listed above that are new to this repository have
not appeared on any other notification email; so we list those
revisions in full, below.
- Log -----------------------------------------------------------------
commit bfc12522395af86ba634aa8e085a8051ca6fd43c
Author: Tomas Vanek <va...@fb...>
Date: Wed Mar 15 13:58:52 2023 +0100
target/arm_adi_v5,arm_dap: introduce pre_connect_init() dap operation
SWD multidrop requires some initialization once before connecting
all daps. Provide an optional pre-connect dap operation.
Change-Id: I778215c512c56423a425dda80ab19a739f22f285
Signed-off-by: Tomas Vanek <va...@fb...>
Reviewed-on: https://review.openocd.org/c/openocd/+/7542
Tested-by: jenkins
Reviewed-by: Antonio Borneo <bor...@gm...>
diff --git a/src/target/arm_adi_v5.h b/src/target/arm_adi_v5.h
index e07b577af..fc7fdafd8 100644
--- a/src/target/arm_adi_v5.h
+++ b/src/target/arm_adi_v5.h
@@ -420,6 +420,9 @@ struct adiv5_dap {
* available until run().
*/
struct dap_ops {
+ /** Optional; called once on the first enabled dap before connecting */
+ int (*pre_connect_init)(struct adiv5_dap *dap);
+
/** connect operation for SWD */
int (*connect)(struct adiv5_dap *dap);
diff --git a/src/target/arm_dap.c b/src/target/arm_dap.c
index 84cc6c743..9f4afae74 100644
--- a/src/target/arm_dap.c
+++ b/src/target/arm_dap.c
@@ -91,6 +91,7 @@ static int dap_init_all(void)
{
struct arm_dap_object *obj;
int retval;
+ bool pre_connect = true;
LOG_DEBUG("Initializing all DAPs ...");
@@ -123,6 +124,14 @@ static int dap_init_all(void)
is_adiv6(dap) ? "ADIv6" : "ADIv5");
}
+ if (pre_connect && dap->ops->pre_connect_init) {
+ retval = dap->ops->pre_connect_init(dap);
+ if (retval != ERROR_OK)
+ return retval;
+
+ pre_connect = false;
+ }
+
retval = dap->ops->connect(dap);
if (retval != ERROR_OK)
return retval;
-----------------------------------------------------------------------
Summary of changes:
src/target/arm_adi_v5.h | 3 +++
src/target/arm_dap.c | 9 +++++++++
2 files changed, 12 insertions(+)
hooks/post-receive
--
Main OpenOCD repository
|
|
From: openocd-gerrit <ope...@us...> - 2023-12-29 14:34:29
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".
The branch, master has been updated
via ee3fb5a0eacb42e8e881239194485d79d128d246 (commit)
from 492dc7c537d5685e5e6d41757b73eea2365b96ee (commit)
Those revisions listed above that are new to this repository have
not appeared on any other notification email; so we list those
revisions in full, below.
- Log -----------------------------------------------------------------
commit ee3fb5a0eacb42e8e881239194485d79d128d246
Author: Tomas Vanek <va...@fb...>
Date: Tue Mar 14 18:40:25 2023 +0100
target/arm_adi_v5: fix DP SELECT logic
The original code supported ADIv5 only, just one SELECT register
with some reserved bits - the pseudo value DP_SELECT_INVALID was
just fine to indicate the DP SELECT register is in an unknown state.
Added ADIv6 support required DP SELECT and SELECT1 registers
without reserved bits. Therefore DP_SELECT_INVALID value became
reachable as a (fortunately not really used) ADIv6 AP ADDR.
JTAG DPBANKSEL setting support introduced with ADIv6 does not
honor DP_SELECT_INVALID correctly: required select value
gets compared to DP_SELECT_INVALID value and the most common zero
bank does not trigger DP SELECT write.
DP banked registers need just to set DP SELECT. ADIv6 AP register
addressing scheme may use both DP SELECT and SELECT1. This further
complicates using a single invalid value.
Moreover the difference how the SWD line reset influences
DPBANKSEL field between ADIv5 and ADIv6 deserves better handling
than setting select cache to zero and then to DP_SELECT_INVALID
in a very specific code positions.
Introduce bool flags indicating the validity of each SELECT
register and one SWD specific for DPBANKSEL field.
Use the latter to prevent selecting DP BANK before taking
the connection out of reset by reading DPIDR.
Treat DP SELECT and SELECT1 individually in ADIv6 64-bit mode.
Update comments to reflect the difference between ADIv5 and ADIv6
in SWD line reset.
Change-Id: Ibbb0b06cb592be072571218b666566a13d8dff0e
Signed-off-by: Tomas Vanek <va...@fb...>
Reviewed-on: https://review.openocd.org/c/openocd/+/7541
Tested-by: jenkins
Reviewed-by: Antonio Borneo <bor...@gm...>
diff --git a/src/target/adi_v5_jtag.c b/src/target/adi_v5_jtag.c
index afdc0e577..8d54a50fb 100644
--- a/src/target/adi_v5_jtag.c
+++ b/src/target/adi_v5_jtag.c
@@ -353,17 +353,25 @@ static int adi_jtag_dp_scan_u32(struct adiv5_dap *dap,
uint64_t sel = (reg_addr >> 4) & DP_SELECT_DPBANK;
/* No need to change SELECT or RDBUFF as they are not banked */
- if (instr == JTAG_DP_DPACC && reg_addr != DP_SELECT && reg_addr != DP_RDBUFF &&
- sel != (dap->select & 0xf)) {
- if (dap->select != DP_SELECT_INVALID)
- sel |= dap->select & ~0xfull;
- dap->select = sel;
- LOG_DEBUG("DP BANKSEL: %x", (uint32_t)sel);
+ if (instr == JTAG_DP_DPACC && reg_addr != DP_SELECT && reg_addr != DP_RDBUFF
+ && (!dap->select_valid || sel != (dap->select & DP_SELECT_DPBANK))) {
+ /* Use the AP part of dap->select regardless of dap->select_valid:
+ * if !dap->select_valid
+ * dap->select contains a speculative value likely going to be used
+ * in the following swd_queue_ap_bankselect() */
+ sel |= dap->select & SELECT_AP_MASK;
+
+ LOG_DEBUG_IO("DP BANK SELECT: %" PRIx32, (uint32_t)sel);
+
buf_set_u32(out_value_buf, 0, 32, (uint32_t)sel);
+
retval = adi_jtag_dp_scan(dap, JTAG_DP_DPACC,
DP_SELECT, DPAP_WRITE, out_value_buf, NULL, 0, NULL);
if (retval != ERROR_OK)
return retval;
+
+ dap->select = sel;
+ dap->select_valid = true;
}
buf_set_u32(out_value_buf, 0, 32, outvalue);
@@ -520,7 +528,10 @@ static int jtagdp_overrun_check(struct adiv5_dap *dap)
/* timeout happened */
if (tmp->ack == JTAG_ACK_WAIT) {
LOG_ERROR("Timeout during WAIT recovery");
- dap->select = DP_SELECT_INVALID;
+ dap->select_valid = false;
+ dap->select1_valid = false;
+ /* Keep dap->select unchanged, the same AP and AP bank
+ * is likely going to be used further */
jtag_ap_q_abort(dap, NULL);
/* clear the sticky overrun condition */
adi_jtag_scan_inout_check_u32(dap, JTAG_DP_DPACC,
@@ -580,7 +591,7 @@ static int jtagdp_overrun_check(struct adiv5_dap *dap)
/* TODO: ADIv6 DP SELECT1 handling */
- dap->select = DP_SELECT_INVALID;
+ dap->select_valid = false;
}
list_for_each_entry_safe(el, tmp, &replay_list, lh) {
@@ -615,7 +626,10 @@ static int jtagdp_overrun_check(struct adiv5_dap *dap)
if (retval == ERROR_OK) {
if (el->ack == JTAG_ACK_WAIT) {
LOG_ERROR("Timeout during WAIT recovery");
- dap->select = DP_SELECT_INVALID;
+ dap->select_valid = false;
+ dap->select1_valid = false;
+ /* Keep dap->select unchanged, the same AP and AP bank
+ * is likely going to be used further */
jtag_ap_q_abort(dap, NULL);
/* clear the sticky overrun condition */
adi_jtag_scan_inout_check_u32(dap, JTAG_DP_DPACC,
@@ -748,41 +762,60 @@ static int jtag_dp_q_write(struct adiv5_dap *dap, unsigned reg,
return retval;
}
-/** Select the AP register bank matching bits 7:4 of reg. */
+/** Select the AP register bank */
static int jtag_ap_q_bankselect(struct adiv5_ap *ap, unsigned reg)
{
int retval;
struct adiv5_dap *dap = ap->dap;
uint64_t sel;
- if (is_adiv6(dap)) {
+ if (is_adiv6(dap))
sel = ap->ap_num | (reg & 0x00000FF0);
- if (sel == (dap->select & ~0xfull))
- return ERROR_OK;
+ else
+ sel = (ap->ap_num << 24) | (reg & ADIV5_DP_SELECT_APBANK);
- if (dap->select != DP_SELECT_INVALID)
- sel |= dap->select & 0xf;
- dap->select = sel;
- LOG_DEBUG("AP BANKSEL: %" PRIx64, sel);
+ uint64_t sel_diff = (sel ^ dap->select) & SELECT_AP_MASK;
+
+ bool set_select = !dap->select_valid || (sel_diff & 0xffffffffull);
+ bool set_select1 = is_adiv6(dap) && dap->asize > 32
+ && (!dap->select1_valid
+ || sel_diff & (0xffffffffull << 32));
+
+ if (set_select && set_select1) {
+ /* Prepare DP bank for DP_SELECT1 now to save one write */
+ sel |= (DP_SELECT1 >> 4) & DP_SELECT_DPBANK;
+ } else {
+ /* Use the DP part of dap->select regardless of dap->select_valid:
+ * if !dap->select_valid
+ * dap->select contains a speculative value likely going to be used
+ * in the following swd_queue_dp_bankselect().
+ * Moreover dap->select_valid should never be false here as a DP bank
+ * is always selected before selecting an AP bank */
+ sel |= dap->select & DP_SELECT_DPBANK;
+ }
+
+ if (set_select) {
+ LOG_DEBUG_IO("AP BANK SELECT: %" PRIx32, (uint32_t)sel);
retval = jtag_dp_q_write(dap, DP_SELECT, (uint32_t)sel);
- if (retval != ERROR_OK)
+ if (retval != ERROR_OK) {
+ dap->select_valid = false;
return retval;
-
- if (dap->asize > 32)
- return jtag_dp_q_write(dap, DP_SELECT1, (uint32_t)(sel >> 32));
- return ERROR_OK;
+ }
}
- /* ADIv5 */
- sel = (ap->ap_num << 24) | (reg & ADIV5_DP_SELECT_APBANK);
+ if (set_select1) {
+ LOG_DEBUG_IO("AP BANK SELECT1: %" PRIx32, (uint32_t)(sel >> 32));
- if (sel == dap->select)
- return ERROR_OK;
+ retval = jtag_dp_q_write(dap, DP_SELECT1, (uint32_t)(sel >> 32));
+ if (retval != ERROR_OK) {
+ dap->select1_valid = false;
+ return retval;
+ }
+ }
dap->select = sel;
-
- return jtag_dp_q_write(dap, DP_SELECT, (uint32_t)sel);
+ return ERROR_OK;
}
static int jtag_ap_q_read(struct adiv5_ap *ap, unsigned reg,
diff --git a/src/target/adi_v5_swd.c b/src/target/adi_v5_swd.c
index 1b743657c..968798b32 100644
--- a/src/target/adi_v5_swd.c
+++ b/src/target/adi_v5_swd.c
@@ -99,27 +99,31 @@ static inline int check_sync(struct adiv5_dap *dap)
return do_sync ? swd_run_inner(dap) : ERROR_OK;
}
-/** Select the DP register bank matching bits 7:4 of reg. */
+/** Select the DP register bank */
static int swd_queue_dp_bankselect(struct adiv5_dap *dap, unsigned int reg)
{
- /* Only register address 0 and 4 are banked. */
+ /* Only register address 0 (ADIv6 only) and 4 are banked. */
if ((reg & 0xf) > 4)
return ERROR_OK;
- uint64_t sel = (reg & 0x000000F0) >> 4;
- if (dap->select != DP_SELECT_INVALID)
- sel |= dap->select & ~0xfULL;
+ uint32_t sel = (reg >> 4) & DP_SELECT_DPBANK;
- if (sel == dap->select)
+ /* DP register 0 is not mapped according to ADIv5
+ * whereas ADIv6 ensures DPBANKSEL = 0 after line reset */
+ if ((dap->select_valid || ((reg & 0xf) == 0 && dap->select_dpbanksel_valid))
+ && (sel == (dap->select & DP_SELECT_DPBANK)))
return ERROR_OK;
- dap->select = sel;
+ /* Use the AP part of dap->select regardless of dap->select_valid:
+ * if !dap->select_valid
+ * dap->select contains a speculative value likely going to be used
+ * in the following swd_queue_ap_bankselect() */
+ sel |= (uint32_t)(dap->select & SELECT_AP_MASK);
- int retval = swd_queue_dp_write_inner(dap, DP_SELECT, (uint32_t)sel);
- if (retval != ERROR_OK)
- dap->select = DP_SELECT_INVALID;
+ LOG_DEBUG_IO("DP BANK SELECT: %" PRIx32, sel);
- return retval;
+ /* dap->select cache gets updated in the following call */
+ return swd_queue_dp_write_inner(dap, DP_SELECT, sel);
}
static int swd_queue_dp_read_inner(struct adiv5_dap *dap, unsigned int reg,
@@ -147,24 +151,31 @@ static int swd_queue_dp_write_inner(struct adiv5_dap *dap, unsigned int reg,
swd_finish_read(dap);
if (reg == DP_SELECT) {
- dap->select = data & (ADIV5_DP_SELECT_APSEL | ADIV5_DP_SELECT_APBANK | DP_SELECT_DPBANK);
+ dap->select = data | (dap->select & (0xffffffffull << 32));
swd->write_reg(swd_cmd(false, false, reg), data, 0);
retval = check_sync(dap);
- if (retval != ERROR_OK)
- dap->select = DP_SELECT_INVALID;
+ dap->select_valid = (retval == ERROR_OK);
+ dap->select_dpbanksel_valid = dap->select_valid;
return retval;
}
+ if (reg == DP_SELECT1)
+ dap->select = ((uint64_t)data << 32) | (dap->select & 0xffffffffull);
+
retval = swd_queue_dp_bankselect(dap, reg);
- if (retval != ERROR_OK)
- return retval;
+ if (retval == ERROR_OK) {
+ swd->write_reg(swd_cmd(false, false, reg), data, 0);
+
+ retval = check_sync(dap);
+ }
- swd->write_reg(swd_cmd(false, false, reg), data, 0);
+ if (reg == DP_SELECT1)
+ dap->select1_valid = (retval == ERROR_OK);
- return check_sync(dap);
+ return retval;
}
@@ -177,19 +188,17 @@ static int swd_multidrop_select_inner(struct adiv5_dap *dap, uint32_t *dpidr_ptr
assert(dap_is_multidrop(dap));
swd_send_sequence(dap, LINE_RESET);
- /* From ARM IHI 0074C ADIv6.0, chapter B4.3.3 "Connection and line reset
- * sequence":
- * - line reset sets DP_SELECT_DPBANK to zero;
- * - read of DP_DPIDR takes the connection out of reset;
- * - write of DP_TARGETSEL keeps the connection in reset;
- * - other accesses return protocol error (SWDIO not driven by target).
- *
- * Read DP_DPIDR to get out of reset. Initialize dap->select to zero to
- * skip the write to DP_SELECT, avoiding the protocol error. Set again
- * dap->select to DP_SELECT_INVALID because the rest of the register is
- * unknown after line reset.
+ /*
+ * Zero dap->select and set dap->select_dpbanksel_valid
+ * to skip the write to DP_SELECT before DPIDR read, avoiding
+ * the protocol error.
+ * Clear the other validity flags because the rest of the DP
+ * SELECT and SELECT1 registers is unknown after line reset.
*/
dap->select = 0;
+ dap->select_dpbanksel_valid = true;
+ dap->select_valid = false;
+ dap->select1_valid = false;
retval = swd_queue_dp_write_inner(dap, DP_TARGETSEL, dap->multidrop_targetsel);
if (retval != ERROR_OK)
@@ -209,8 +218,6 @@ static int swd_multidrop_select_inner(struct adiv5_dap *dap, uint32_t *dpidr_ptr
return retval;
}
- dap->select = DP_SELECT_INVALID;
-
retval = swd_queue_dp_read_inner(dap, DP_DLPIDR, &dlpidr);
if (retval != ERROR_OK)
return retval;
@@ -335,19 +342,20 @@ static int swd_connect_single(struct adiv5_dap *dap)
/* The sequences to enter in SWD (JTAG_TO_SWD and DORMANT_TO_SWD) end
* with a SWD line reset sequence (50 clk with SWDIO high).
- * From ARM IHI 0074C ADIv6.0, chapter B4.3.3 "Connection and line reset
- * sequence":
- * - line reset sets DP_SELECT_DPBANK to zero;
+ * From ARM IHI 0031F ADIv5.2 and ARM IHI 0074C ADIv6.0,
+ * chapter B4.3.3 "Connection and line reset sequence":
+ * - DPv3 (ADIv6) only: line reset sets DP_SELECT_DPBANK to zero;
* - read of DP_DPIDR takes the connection out of reset;
* - write of DP_TARGETSEL keeps the connection in reset;
* - other accesses return protocol error (SWDIO not driven by target).
*
- * Read DP_DPIDR to get out of reset. Initialize dap->select to zero to
- * skip the write to DP_SELECT, avoiding the protocol error. Set again
- * dap->select to DP_SELECT_INVALID because the rest of the register is
- * unknown after line reset.
+ * dap_invalidate_cache() sets dap->select to zero and all validity
+ * flags to invalid. Set dap->select_dpbanksel_valid only
+ * to skip the write to DP_SELECT, avoiding the protocol error.
+ * Read DP_DPIDR to get out of reset.
*/
- dap->select = 0;
+ dap->select_dpbanksel_valid = true;
+
retval = swd_queue_dp_read_inner(dap, DP_DPIDR, &dpidr);
if (retval == ERROR_OK) {
retval = swd_run_inner(dap);
@@ -360,8 +368,6 @@ static int swd_connect_single(struct adiv5_dap *dap)
dap->switch_through_dormant = !dap->switch_through_dormant;
} while (timeval_ms() < timeout);
- dap->select = DP_SELECT_INVALID;
-
if (retval != ERROR_OK) {
LOG_ERROR("Error connecting DP: cannot read IDR");
return retval;
@@ -494,49 +500,55 @@ static int swd_queue_dp_write(struct adiv5_dap *dap, unsigned reg,
return swd_queue_dp_write_inner(dap, reg, data);
}
-/** Select the AP register bank matching bits 7:4 of reg. */
+/** Select the AP register bank */
static int swd_queue_ap_bankselect(struct adiv5_ap *ap, unsigned reg)
{
int retval;
struct adiv5_dap *dap = ap->dap;
uint64_t sel;
- if (is_adiv6(dap)) {
+ if (is_adiv6(dap))
sel = ap->ap_num | (reg & 0x00000FF0);
- if (sel == (dap->select & ~0xfULL))
- return ERROR_OK;
-
- if (dap->select != DP_SELECT_INVALID)
- sel |= dap->select & 0xf;
- dap->select = sel;
- LOG_DEBUG("AP BANKSEL: %" PRIx64, sel);
-
- retval = swd_queue_dp_write(dap, DP_SELECT, (uint32_t)sel);
+ else
+ sel = (ap->ap_num << 24) | (reg & ADIV5_DP_SELECT_APBANK);
- if (retval == ERROR_OK && dap->asize > 32)
- retval = swd_queue_dp_write(dap, DP_SELECT1, (uint32_t)(sel >> 32));
+ uint64_t sel_diff = (sel ^ dap->select) & SELECT_AP_MASK;
- if (retval != ERROR_OK)
- dap->select = DP_SELECT_INVALID;
+ bool set_select = !dap->select_valid || (sel_diff & 0xffffffffull);
+ bool set_select1 = is_adiv6(dap) && dap->asize > 32
+ && (!dap->select1_valid
+ || sel_diff & (0xffffffffull << 32));
- return retval;
+ if (set_select && set_select1) {
+ /* Prepare DP bank for DP_SELECT1 now to save one write */
+ sel |= (DP_SELECT1 & 0x000000f0) >> 4;
+ } else {
+ /* Use the DP part of dap->select regardless of dap->select_valid:
+ * if !dap->select_valid
+ * dap->select contains a speculative value likely going to be used
+ * in the following swd_queue_dp_bankselect().
+ * Moreover dap->select_valid should never be false here as a DP bank
+ * is always selected before selecting an AP bank */
+ sel |= dap->select & DP_SELECT_DPBANK;
}
- /* ADIv5 */
- sel = (ap->ap_num << 24) | (reg & ADIV5_DP_SELECT_APBANK);
- if (dap->select != DP_SELECT_INVALID)
- sel |= dap->select & DP_SELECT_DPBANK;
+ if (set_select) {
+ LOG_DEBUG_IO("AP BANK SELECT: %" PRIx32, (uint32_t)sel);
- if (sel == dap->select)
- return ERROR_OK;
+ retval = swd_queue_dp_write(dap, DP_SELECT, (uint32_t)sel);
+ if (retval != ERROR_OK)
+ return retval;
+ }
- dap->select = sel;
+ if (set_select1) {
+ LOG_DEBUG_IO("AP BANK SELECT1: %" PRIx32, (uint32_t)(sel >> 32));
- retval = swd_queue_dp_write_inner(dap, DP_SELECT, sel);
- if (retval != ERROR_OK)
- dap->select = DP_SELECT_INVALID;
+ retval = swd_queue_dp_write(dap, DP_SELECT1, (uint32_t)(sel >> 32));
+ if (retval != ERROR_OK)
+ return retval;
+ }
- return retval;
+ return ERROR_OK;
}
static int swd_queue_ap_read(struct adiv5_ap *ap, unsigned reg,
diff --git a/src/target/arm_adi_v5.c b/src/target/arm_adi_v5.c
index da5da3197..434bf50fe 100644
--- a/src/target/arm_adi_v5.c
+++ b/src/target/arm_adi_v5.c
@@ -655,7 +655,11 @@ int mem_ap_write_buf_noincr(struct adiv5_ap *ap,
*/
void dap_invalidate_cache(struct adiv5_dap *dap)
{
- dap->select = DP_SELECT_INVALID;
+ dap->select = 0; /* speculate the first AP access will select AP 0, bank 0 */
+ dap->select_valid = false;
+ dap->select1_valid = false;
+ dap->select_dpbanksel_valid = false;
+
dap->last_read = NULL;
int i;
diff --git a/src/target/arm_adi_v5.h b/src/target/arm_adi_v5.h
index e21589363..e07b577af 100644
--- a/src/target/arm_adi_v5.h
+++ b/src/target/arm_adi_v5.h
@@ -100,7 +100,11 @@
#define ADIV5_DP_SELECT_APSEL 0xFF000000
#define ADIV5_DP_SELECT_APBANK 0x000000F0
#define DP_SELECT_DPBANK 0x0000000F
-#define DP_SELECT_INVALID 0x00FFFF00 /* Reserved bits one */
+/*
+ * Mask of AP ADDR in select cache, concatenating DP SELECT and DP_SELECT1.
+ * In case of ADIv5, the mask contains both APSEL and APBANKSEL fields.
+ */
+#define SELECT_AP_MASK (~(uint64_t)DP_SELECT_DPBANK)
#define DP_APSEL_MAX (255) /* Strict limit for ADIv5, number of AP buffers for ADIv6 */
#define DP_APSEL_INVALID 0xF00 /* more than DP_APSEL_MAX and not ADIv6 aligned 4k */
@@ -338,11 +342,21 @@ struct adiv5_dap {
/* The current manually selected AP by the "dap apsel" command */
uint64_t apsel;
+ /** Cache for DP SELECT and SELECT1 (ADIv6) register. */
+ uint64_t select;
+ /** Validity of DP SELECT cache. false will force register rewrite */
+ bool select_valid;
+ bool select1_valid; /* ADIv6 only */
/**
- * Cache for DP_SELECT register. A value of DP_SELECT_INVALID
- * indicates no cached value and forces rewrite of the register.
+ * Partial DPBANKSEL validity for SWD only.
+ * ADIv6 line reset sets DP SELECT DPBANKSEL to zero,
+ * ADIv5 does not.
+ * We can rely on it for the banked DP register 0 also on ADIv5
+ * as ADIv5 has no mapping for DP reg 0 - it is always DPIDR.
+ * It is important to avoid setting DP SELECT in connection
+ * reset state before reading DPIDR.
*/
- uint64_t select;
+ bool select_dpbanksel_valid;
/* information about current pending SWjDP-AHBAP transaction */
uint8_t ack;
-----------------------------------------------------------------------
Summary of changes:
src/target/adi_v5_jtag.c | 89 +++++++++++++++++++---------
src/target/adi_v5_swd.c | 148 +++++++++++++++++++++++++----------------------
src/target/arm_adi_v5.c | 6 +-
src/target/arm_adi_v5.h | 22 +++++--
4 files changed, 164 insertions(+), 101 deletions(-)
hooks/post-receive
--
Main OpenOCD repository
|
|
From: openocd-gerrit <ope...@us...> - 2023-12-24 14:27:55
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".
The branch, master has been updated
via 492dc7c537d5685e5e6d41757b73eea2365b96ee (commit)
from 49489747d26d4dcd679fb16afec61d90d7ca3586 (commit)
Those revisions listed above that are new to this repository have
not appeared on any other notification email; so we list those
revisions in full, below.
- Log -----------------------------------------------------------------
commit 492dc7c537d5685e5e6d41757b73eea2365b96ee
Author: Antonio Borneo <bor...@gm...>
Date: Thu Dec 14 22:05:52 2023 +0100
helper/bin2char: drop trailing empty line
For unknown reasons, the coreutils tool 'od' on MacOS outputs an
extra empty line, which appears in the new auto-generated files.
Modify the script bin2char.sh to drop every empty line.
Change-Id: Id835fecadb58ad4ddfc11ef9f9a2e8d75c5dffe9
Signed-off-by: Antonio Borneo <bor...@gm...>
Reviewed-on: https://review.openocd.org/c/openocd/+/8051
Reviewed-by: Erhan Kurubas <erh...@es...>
Tested-by: jenkins
Reviewed-by: Henrik Nordström <hen...@ad...>
diff --git a/src/helper/bin2char.sh b/src/helper/bin2char.sh
index b89433d86..cf94bee29 100755
--- a/src/helper/bin2char.sh
+++ b/src/helper/bin2char.sh
@@ -12,4 +12,4 @@
}
echo "/* Autogenerated with $0 */"
-od -v -A n -t x1 | sed 's/ *\(..\) */0x\1,/g'
+od -v -A n -t x1 | sed 's/ *\(..\) */0x\1,/g;/^$/d'
-----------------------------------------------------------------------
Summary of changes:
src/helper/bin2char.sh | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
hooks/post-receive
--
Main OpenOCD repository
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|
From: openocd-gerrit <ope...@us...> - 2023-12-24 14:27:29
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".
The branch, master has been updated
via 49489747d26d4dcd679fb16afec61d90d7ca3586 (commit)
from b8422b076daab0797a24a6aec50104bb739aa949 (commit)
Those revisions listed above that are new to this repository have
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- Log -----------------------------------------------------------------
commit 49489747d26d4dcd679fb16afec61d90d7ca3586
Author: Antonio Borneo <bor...@gm...>
Date: Sun Dec 10 22:26:44 2023 +0100
doc: usb_adapters: fix HID report in lsusb dump of few adapters
Real dumps from adapters I have access to.
Serial numbers have been manually edited but are still consistent.
While there, rename a file to correct the USB PID.
Change-Id: I4fd0b6661d55294c2ce0ecbead765def1143880c
Signed-off-by: Antonio Borneo <bor...@gm...>
Fixes: e0059dfffae4 ("doc: usb_adapters: add lsusb dump of few adapters")
Reviewed-on: https://review.openocd.org/c/openocd/+/8047
Tested-by: jenkins
diff --git a/doc/usb_adapters/cmsis_dap/0d28_0204_nxp_daplink.txt b/doc/usb_adapters/cmsis_dap/0d28_0204_nxp_daplink.txt
index 2ec0d58e2..5141a1b6b 100644
--- a/doc/usb_adapters/cmsis_dap/0d28_0204_nxp_daplink.txt
+++ b/doc/usb_adapters/cmsis_dap/0d28_0204_nxp_daplink.txt
@@ -76,8 +76,35 @@ Device Descriptor:
bNumDescriptors 1
bDescriptorType 34 Report
wDescriptorLength 33
- Report Descriptors:
- ** UNAVAILABLE **
+ Report Descriptor: (length is 33)
+ Item(Global): Usage Page, data= [ 0x00 0xff ] 65280
+ (null)
+ Item(Local ): Usage, data= [ 0x01 ] 1
+ (null)
+ Item(Main ): Collection, data= [ 0x01 ] 1
+ Application
+ Item(Global): Logical Minimum, data= [ 0x00 ] 0
+ Item(Global): Logical Maximum, data= [ 0xff 0x00 ] 255
+ Item(Global): Report Size, data= [ 0x08 ] 8
+ Item(Global): Report Count, data= [ 0x40 ] 64
+ Item(Local ): Usage, data= [ 0x01 ] 1
+ (null)
+ Item(Main ): Input, data= [ 0x02 ] 2
+ Data Variable Absolute No_Wrap Linear
+ Preferred_State No_Null_Position Non_Volatile Bitfield
+ Item(Global): Report Count, data= [ 0x40 ] 64
+ Item(Local ): Usage, data= [ 0x01 ] 1
+ (null)
+ Item(Main ): Output, data= [ 0x02 ] 2
+ Data Variable Absolute No_Wrap Linear
+ Preferred_State No_Null_Position Non_Volatile Bitfield
+ Item(Global): Report Count, data= [ 0x01 ] 1
+ Item(Local ): Usage, data= [ 0x01 ] 1
+ (null)
+ Item(Main ): Feature, data= [ 0x02 ] 2
+ Data Variable Absolute No_Wrap Linear
+ Preferred_State No_Null_Position Non_Volatile Bitfield
+ Item(Main ): End Collection, data=none
Endpoint Descriptor:
bLength 7
bDescriptorType 5
diff --git a/doc/usb_adapters/cmsis_dap/c251_2722_keil_ulink2.txt b/doc/usb_adapters/cmsis_dap/c251_2722_keil_ulink2.txt
index 520f7c553..65903b353 100644
--- a/doc/usb_adapters/cmsis_dap/c251_2722_keil_ulink2.txt
+++ b/doc/usb_adapters/cmsis_dap/c251_2722_keil_ulink2.txt
@@ -46,8 +46,35 @@ Device Descriptor:
bNumDescriptors 1
bDescriptorType 34 Report
wDescriptorLength 33
- Report Descriptors:
- ** UNAVAILABLE **
+ Report Descriptor: (length is 33)
+ Item(Global): Usage Page, data= [ 0x00 0xff ] 65280
+ (null)
+ Item(Local ): Usage, data= [ 0x01 ] 1
+ (null)
+ Item(Main ): Collection, data= [ 0x01 ] 1
+ Application
+ Item(Global): Logical Minimum, data= [ 0x00 ] 0
+ Item(Global): Logical Maximum, data= [ 0xff 0x00 ] 255
+ Item(Global): Report Size, data= [ 0x08 ] 8
+ Item(Global): Report Count, data= [ 0x40 ] 64
+ Item(Local ): Usage, data= [ 0x01 ] 1
+ (null)
+ Item(Main ): Input, data= [ 0x02 ] 2
+ Data Variable Absolute No_Wrap Linear
+ Preferred_State No_Null_Position Non_Volatile Bitfield
+ Item(Global): Report Count, data= [ 0x40 ] 64
+ Item(Local ): Usage, data= [ 0x01 ] 1
+ (null)
+ Item(Main ): Output, data= [ 0x02 ] 2
+ Data Variable Absolute No_Wrap Linear
+ Preferred_State No_Null_Position Non_Volatile Bitfield
+ Item(Global): Report Count, data= [ 0x01 ] 1
+ Item(Local ): Usage, data= [ 0x01 ] 1
+ (null)
+ Item(Main ): Feature, data= [ 0x02 ] 2
+ Data Variable Absolute No_Wrap Linear
+ Preferred_State No_Null_Position Non_Volatile Bitfield
+ Item(Main ): End Collection, data=none
Endpoint Descriptor:
bLength 7
bDescriptorType 5
diff --git a/doc/usb_adapters/nulink/0416_511d_nuvoton_nulink.txt b/doc/usb_adapters/nulink/0416_511d_nuvoton_nulink.txt
index fb4392351..2ac9a44a0 100644
--- a/doc/usb_adapters/nulink/0416_511d_nuvoton_nulink.txt
+++ b/doc/usb_adapters/nulink/0416_511d_nuvoton_nulink.txt
@@ -47,8 +47,32 @@ Device Descriptor:
bNumDescriptors 1
bDescriptorType 34 Report
wDescriptorLength 28
- Report Descriptors:
- ** UNAVAILABLE **
+ Report Descriptor: (length is 28)
+ Item(Global): Usage Page, data= [ 0x01 ] 1
+ Generic Desktop Controls
+ Item(Local ): Usage, data= [ 0x00 ] 0
+ Undefined
+ Item(Main ): Collection, data= [ 0x01 ] 1
+ Application
+ Item(Global): Logical Minimum, data= [ 0x00 ] 0
+ Item(Global): Logical Maximum, data= [ 0xff 0x00 ] 255
+ Item(Local ): Usage Minimum, data= [ 0x00 ] 0
+ Undefined
+ Item(Local ): Usage Maximum, data= [ 0x00 ] 0
+ Undefined
+ Item(Global): Report Size, data= [ 0x08 ] 8
+ Item(Global): Report Count, data= [ 0x40 ] 64
+ Item(Main ): Input, data= [ 0x02 ] 2
+ Data Variable Absolute No_Wrap Linear
+ Preferred_State No_Null_Position Non_Volatile Bitfield
+ Item(Local ): Usage Minimum, data= [ 0x00 ] 0
+ Undefined
+ Item(Local ): Usage Maximum, data= [ 0x00 ] 0
+ Undefined
+ Item(Main ): Output, data= [ 0x02 ] 2
+ Data Variable Absolute No_Wrap Linear
+ Preferred_State No_Null_Position Non_Volatile Bitfield
+ Item(Main ): End Collection, data=none
Endpoint Descriptor:
bLength 7
bDescriptorType 5
diff --git a/doc/usb_adapters/nulink/0416_5200_nuvoton_nulink.txt b/doc/usb_adapters/nulink/0416_5200_nuvoton_nulink.txt
index 1d8661f18..5735d3bd2 100644
--- a/doc/usb_adapters/nulink/0416_5200_nuvoton_nulink.txt
+++ b/doc/usb_adapters/nulink/0416_5200_nuvoton_nulink.txt
@@ -16,7 +16,7 @@ Device Descriptor:
idProduct 0x5200 Nuvoton Nu-Link2-ME ICE/MSC/VCOM
bcdDevice 0.00
iManufacturer 1 Nuvoton
- iProduct 2 Nu-Link2 Bulk
+ iProduct 9 Nu-Link2
iSerial 6 13010000AAAAAAAAAAAAAAAAAAAAAAAA
bNumConfigurations 1
Configuration Descriptor:
@@ -38,7 +38,7 @@ Device Descriptor:
bInterfaceClass 255 Vendor Specific Class
bInterfaceSubClass 0
bInterfaceProtocol 0
- iInterface 0
+ iInterface 2 Nu-Link2 Bulk
Endpoint Descriptor:
bLength 7
bDescriptorType 5
@@ -146,8 +146,35 @@ Device Descriptor:
bNumDescriptors 1
bDescriptorType 34 Report
wDescriptorLength 35
- Report Descriptors:
- ** UNAVAILABLE **
+ Report Descriptor: (length is 35)
+ Item(Global): Usage Page, data= [ 0x06 0xff ] 65286
+ (null)
+ Item(Local ): Usage, data= [ 0x01 ] 1
+ (null)
+ Item(Main ): Collection, data= [ 0x01 ] 1
+ Application
+ Item(Global): Logical Minimum, data= [ 0x00 ] 0
+ Item(Global): Logical Maximum, data= [ 0xff 0x00 ] 255
+ Item(Global): Report Size, data= [ 0x08 ] 8
+ Item(Global): Report Count, data= [ 0x00 0x04 ] 1024
+ Item(Local ): Usage, data= [ 0x01 ] 1
+ (null)
+ Item(Main ): Input, data= [ 0x02 ] 2
+ Data Variable Absolute No_Wrap Linear
+ Preferred_State No_Null_Position Non_Volatile Bitfield
+ Item(Global): Report Count, data= [ 0x00 0x04 ] 1024
+ Item(Local ): Usage, data= [ 0x01 ] 1
+ (null)
+ Item(Main ): Output, data= [ 0x02 ] 2
+ Data Variable Absolute No_Wrap Linear
+ Preferred_State No_Null_Position Non_Volatile Bitfield
+ Item(Global): Report Count, data= [ 0x08 ] 8
+ Item(Local ): Usage, data= [ 0x01 ] 1
+ (null)
+ Item(Main ): Feature, data= [ 0x02 ] 2
+ Data Variable Absolute No_Wrap Linear
+ Preferred_State No_Null_Position Non_Volatile Bitfield
+ Item(Main ): End Collection, data=none
Endpoint Descriptor:
bLength 7
bDescriptorType 5
diff --git a/doc/usb_adapters/xds110/0451_0451_ti_xds110.txt b/doc/usb_adapters/xds110/0451_bef3_ti_xds110.txt
similarity index 89%
rename from doc/usb_adapters/xds110/0451_0451_ti_xds110.txt
rename to doc/usb_adapters/xds110/0451_bef3_ti_xds110.txt
index 9ad9b7dbf..628b529e2 100644
--- a/doc/usb_adapters/xds110/0451_0451_ti_xds110.txt
+++ b/doc/usb_adapters/xds110/0451_bef3_ti_xds110.txt
@@ -220,8 +220,28 @@ Device Descriptor:
bNumDescriptors 1
bDescriptorType 34 Report
wDescriptorLength 24
- Report Descriptors:
- ** UNAVAILABLE **
+ Report Descriptor: (length is 24)
+ Item(Global): Usage Page, data= [ 0x00 0xff ] 65280
+ (null)
+ Item(Local ): Usage, data= [ 0x01 ] 1
+ (null)
+ Item(Main ): Collection, data= [ 0x01 ] 1
+ Application
+ Item(Local ): Usage, data= [ 0x03 ] 3
+ (null)
+ Item(Global): Report Size, data= [ 0x08 ] 8
+ Item(Global): Report Count, data= [ 0x40 ] 64
+ Item(Main ): Input, data= [ 0x02 ] 2
+ Data Variable Absolute No_Wrap Linear
+ Preferred_State No_Null_Position Non_Volatile Bitfield
+ Item(Local ): Usage, data= [ 0x04 ] 4
+ (null)
+ Item(Global): Report Size, data= [ 0x08 ] 8
+ Item(Global): Report Count, data= [ 0x40 ] 64
+ Item(Main ): Output, data= [ 0x02 ] 2
+ Data Variable Absolute No_Wrap Linear
+ Preferred_State No_Null_Position Non_Volatile Bitfield
+ Item(Main ): End Collection, data=none
Endpoint Descriptor:
bLength 7
bDescriptorType 5
-----------------------------------------------------------------------
Summary of changes:
.../cmsis_dap/0d28_0204_nxp_daplink.txt | 31 +++++++++++++++++--
.../cmsis_dap/c251_2722_keil_ulink2.txt | 31 +++++++++++++++++--
.../nulink/0416_511d_nuvoton_nulink.txt | 28 +++++++++++++++--
.../nulink/0416_5200_nuvoton_nulink.txt | 35 +++++++++++++++++++---
..._0451_ti_xds110.txt => 0451_bef3_ti_xds110.txt} | 24 +++++++++++++--
5 files changed, 137 insertions(+), 12 deletions(-)
rename doc/usb_adapters/xds110/{0451_0451_ti_xds110.txt => 0451_bef3_ti_xds110.txt} (89%)
hooks/post-receive
--
Main OpenOCD repository
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|
From: openocd-gerrit <ope...@us...> - 2023-12-24 14:26:09
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".
The branch, master has been updated
via b8422b076daab0797a24a6aec50104bb739aa949 (commit)
from 33749a7fbeb5e6054ea5b9c6a15578302fe512e0 (commit)
Those revisions listed above that are new to this repository have
not appeared on any other notification email; so we list those
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- Log -----------------------------------------------------------------
commit b8422b076daab0797a24a6aec50104bb739aa949
Author: Nishanth Menon <nm...@ti...>
Date: Wed Nov 29 06:37:14 2023 -0600
tcl/board: Add TI j722sevm config
Add basic connection details with j722s EVM
For further details, see: https://www.ti.com/lit/zip/sprr495
Change-Id: Ic69d85d69c773c7fad2184561267391fef7a98bc
Signed-off-by: Nishanth Menon <nm...@ti...>
Reviewed-on: https://review.openocd.org/c/openocd/+/8050
Reviewed-by: Bryan Brattlof <he...@br...>
Reviewed-by: Antonio Borneo <bor...@gm...>
Tested-by: jenkins
diff --git a/tcl/board/ti_j722sevm.cfg b/tcl/board/ti_j722sevm.cfg
new file mode 100644
index 000000000..6a5c2d9cd
--- /dev/null
+++ b/tcl/board/ti_j722sevm.cfg
@@ -0,0 +1,24 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+# Copyright (C) 2023 Texas Instruments Incorporated - https://www.ti.com/
+#
+# Texas Instruments EVM-J722S: https://www.ti.com/lit/zip/sprr495
+#
+
+# J722S EVM has an xds110 onboard.
+source [find interface/xds110.cfg]
+
+transport select jtag
+
+# default JTAG configuration has only SRST and no TRST
+reset_config srst_only srst_push_pull
+
+# delay after SRST goes inactive
+adapter srst delay 20
+
+if { ![info exists SOC] } {
+ set SOC j722s
+}
+
+source [find target/ti_k3.cfg]
+
+adapter speed 2500
-----------------------------------------------------------------------
Summary of changes:
tcl/board/{ti_j721evm.cfg => ti_j722sevm.cfg} | 8 ++++----
1 file changed, 4 insertions(+), 4 deletions(-)
copy tcl/board/{ti_j721evm.cfg => ti_j722sevm.cfg} (64%)
hooks/post-receive
--
Main OpenOCD repository
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|
From: openocd-gerrit <ope...@us...> - 2023-12-24 14:25:45
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".
The branch, master has been updated
via 33749a7fbeb5e6054ea5b9c6a15578302fe512e0 (commit)
from 2e920a212fbe2de705811d547c169c1ae1611a02 (commit)
Those revisions listed above that are new to this repository have
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- Log -----------------------------------------------------------------
commit 33749a7fbeb5e6054ea5b9c6a15578302fe512e0
Author: Nishanth Menon <nm...@ti...>
Date: Wed Nov 29 06:32:53 2023 -0600
tcl/target/ti_k3: Add J722S SoC
Add support for the TI K3 family J722S SoC. This SoC is a variant of
AM62P chassis with a different JTAG ID, additional R5 added in (along
with C7x and few other peripheral changes). Reuse existing definition.
For further details, see https://www.ti.com/lit/zip/sprujb3
Change-Id: I754e6be8df3a26212437ea955f6a791d7c99b0c8
Signed-off-by: Nishanth Menon <nm...@ti...>
Reviewed-on: https://review.openocd.org/c/openocd/+/8049
Reviewed-by: Bryan Brattlof <he...@br...>
Reviewed-by: Antonio Borneo <bor...@gm...>
Tested-by: jenkins
diff --git a/tcl/target/ti_k3.cfg b/tcl/target/ti_k3.cfg
index 23825b86b..ebea82179 100644
--- a/tcl/target/ti_k3.cfg
+++ b/tcl/target/ti_k3.cfg
@@ -24,6 +24,8 @@
# Has 2 ARMV8 Cores and 6 R5 Cores and an M3
# * J721S2: https://www.ti.com/lit/pdf/spruj28
# Has 2 ARMV8 Cores and 6 R5 Cores and an M4F
+# * J722S: https://www.ti.com/lit/zip/sprujb3
+# Has 4 ARMV8 Cores and 3 R5 Cores
# * J784S4/AM69: http://www.ti.com/lit/zip/spruj52
# Has 8 ARMV8 Cores and 8 R5 Cores
#
@@ -185,6 +187,7 @@ switch $_soc {
set _dmem_emu_base_address_map_to 0x1d500000
set _dmem_emu_ap_list 1
}
+ j722s -
am62p -
am62a7 {
set _K3_DAP_TAPID 0x0bb8d02f
@@ -211,6 +214,14 @@ switch $_soc {
set _K3_DAP_TAPID 0x0bb9d02f
set R5_NAMES {wkup0_r5.0 mcu0_r5.0}
}
+ # Overrides for j722s
+ if { "$_soc" == "j722s" } {
+ set _K3_DAP_TAPID 0x0bba002f
+ set _r5_cores 3
+ set R5_NAMES {wkup0_r5.0 main0_r5.0 mcu0_r5.0}
+ set R5_DBGBASE {0x9d410000 0x9d510000 0x9d810000}
+ set R5_CTIBASE {0x9d418000 0x9d518000 0x9d818000}
+ }
}
j721e {
set _K3_DAP_TAPID 0x0bb6402f
-----------------------------------------------------------------------
Summary of changes:
tcl/target/ti_k3.cfg | 11 +++++++++++
1 file changed, 11 insertions(+)
hooks/post-receive
--
Main OpenOCD repository
|
|
From: openocd-gerrit <ope...@us...> - 2023-12-24 14:25:16
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".
The branch, master has been updated
via 2e920a212fbe2de705811d547c169c1ae1611a02 (commit)
from e8e09b1b5513f0decf31aaa25151858fae126e1e (commit)
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- Log -----------------------------------------------------------------
commit 2e920a212fbe2de705811d547c169c1ae1611a02
Author: Evgeniy Naydanov <evg...@sy...>
Date: Wed Nov 22 18:10:27 2023 +0300
break from long loops on shutdown request
In loops that typically take longer time to complete, check if there is
a pending shutdown request. If so, terminate the loop.
This allows to respond to a signal requesting a shutdown during some
loops which do not return control to main OpenOCD loop.
Change-Id: Iace0b58eddde1237832d0f9333a7c7b930565674
Signed-off-by: Evgeniy Naydanov <evg...@sy...>
Reviewed-on: https://review.openocd.org/c/openocd/+/8032
Reviewed-by: Jan Matyas <jan...@co...>
Tested-by: jenkins
Reviewed-by: Antonio Borneo <bor...@gm...>
diff --git a/src/server/server.h b/src/server/server.h
index c9d4698af..ea1e94ec5 100644
--- a/src/server/server.h
+++ b/src/server/server.h
@@ -118,5 +118,6 @@ COMMAND_HELPER(server_port_command, unsigned short *out);
#define ERROR_SERVER_REMOTE_CLOSED (-400)
#define ERROR_CONNECTION_REJECTED (-401)
+#define ERROR_SERVER_INTERRUPTED (-402)
#endif /* OPENOCD_SERVER_SERVER_H */
diff --git a/src/target/image.c b/src/target/image.c
index 9175c200a..440fe17d1 100644
--- a/src/target/image.c
+++ b/src/target/image.c
@@ -24,6 +24,7 @@
#include "image.h"
#include "target.h"
#include <helper/log.h>
+#include <server/server.h>
/* convert ELF header field to host endianness */
#define field16(elf, field) \
@@ -1295,6 +1296,8 @@ int image_calculate_checksum(const uint8_t *buffer, uint32_t nbytes, uint32_t *c
crc = (crc << 8) ^ crc32_table[((crc >> 24) ^ *buffer++) & 255];
}
keep_alive();
+ if (openocd_is_shutdown_pending())
+ return ERROR_SERVER_INTERRUPTED;
}
LOG_DEBUG("Calculating checksum done; checksum=0x%" PRIx32, crc);
diff --git a/src/target/target.c b/src/target/target.c
index bb773f6a5..5605d2920 100644
--- a/src/target/target.c
+++ b/src/target/target.c
@@ -1204,6 +1204,10 @@ int target_run_read_async_algorithm(struct target *target,
/* Avoid GDB timeouts */
keep_alive();
+ if (openocd_is_shutdown_pending()) {
+ retval = ERROR_SERVER_INTERRUPTED;
+ break;
+ }
}
if (retval != ERROR_OK) {
@@ -3224,8 +3228,11 @@ int target_wait_state(struct target *target, enum target_state state, unsigned i
nvp_value2name(nvp_target_state, state)->name);
}
- if (cur-then > 500)
+ if (cur - then > 500) {
keep_alive();
+ if (openocd_is_shutdown_pending())
+ return ERROR_SERVER_INTERRUPTED;
+ }
if ((cur-then) > ms) {
LOG_ERROR("timed out while waiting for target %s",
@@ -3507,6 +3514,11 @@ static int target_fill_mem(struct target *target,
break;
/* avoid GDB timeouts */
keep_alive();
+
+ if (openocd_is_shutdown_pending()) {
+ retval = ERROR_SERVER_INTERRUPTED;
+ break;
+ }
}
free(target_buf);
@@ -3849,6 +3861,12 @@ static COMMAND_HELPER(handle_verify_image_command_internal, enum verify_mode ver
}
}
keep_alive();
+ if (openocd_is_shutdown_pending()) {
+ retval = ERROR_SERVER_INTERRUPTED;
+ free(data);
+ free(buffer);
+ goto done;
+ }
}
}
free(data);
-----------------------------------------------------------------------
Summary of changes:
src/server/server.h | 1 +
src/target/image.c | 3 +++
src/target/target.c | 20 +++++++++++++++++++-
3 files changed, 23 insertions(+), 1 deletion(-)
hooks/post-receive
--
Main OpenOCD repository
|
|
From: openocd-gerrit <ope...@us...> - 2023-12-16 07:56:14
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".
The branch, master has been updated
via e8e09b1b5513f0decf31aaa25151858fae126e1e (commit)
from 16e9b9c44fa62ea6eec99d1fb7bc43a8f1cc2f7e (commit)
Those revisions listed above that are new to this repository have
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- Log -----------------------------------------------------------------
commit e8e09b1b5513f0decf31aaa25151858fae126e1e
Author: Jeremy Herbert <jer...@gm...>
Date: Tue Feb 7 12:02:31 2023 +1000
remote_bitbang: add use_remote_sleep option to send delays to remote
If the remote_bitbang host does not execute requests immediately,
delays performed inside OpenOCD can be lost. This option allows
the delays to be sent to the remote host so that they can be
queued and executed in order.
Signed-off-by: Jeremy Herbert <jer...@gm...>
Signed-off-by: David Ryskalczyk <dav...@gm...>
Change-Id: Ie1b09e09ea132dd528139618e4305154819cbc9e
Reviewed-on: https://review.openocd.org/c/openocd/+/7472
Tested-by: jenkins
Reviewed-by: Antonio Borneo <bor...@gm...>
diff --git a/doc/manual/jtag/drivers/remote_bitbang.txt b/doc/manual/jtag/drivers/remote_bitbang.txt
index 7c8eee289..94d603816 100644
--- a/doc/manual/jtag/drivers/remote_bitbang.txt
+++ b/doc/manual/jtag/drivers/remote_bitbang.txt
@@ -37,12 +37,16 @@ swdio_read
swd_write
Set the value of swclk (tck) and swdio (tms).
+(optional) sleep
+ Instructs the remote host to sleep/idle for some period of time before
+ executing the next request
+
An additional function, quit, is added to the remote_bitbang interface to
indicate there will be no more requests and the connection with the remote
driver should be closed.
-These eight functions are encoded in ASCII by assigning a single character to
-each possible request. The assignments are:
+The eight mandatory functions are encoded in ASCII by assigning a single
+character to each possible request. The assignments are:
B - Blink on
b - Blink off
@@ -70,4 +74,10 @@ each possible request. The assignments are:
The read responses are encoded in ASCII as either digit 0 or 1.
+If the use_remote_sleep option is set to 'yes', two additional requests may
+be sent:
+
+ D - Sleep for 1 millisecond
+ d - Sleep for 1 microsecond
+
*/
diff --git a/doc/openocd.texi b/doc/openocd.texi
index 6c6519d62..ec7c9964a 100644
--- a/doc/openocd.texi
+++ b/doc/openocd.texi
@@ -2839,6 +2839,15 @@ Specifies the hostname of the remote process to connect to using TCP, or the
name of the UNIX socket to use if remote_bitbang port is 0.
@end deffn
+@deffn {Config Command} {remote_bitbang use_remote_sleep} (on|off)
+If this option is enabled, delays will not be executed locally but instead
+forwarded to the remote host. This is useful if the remote host performs its
+own request queuing rather than executing requests immediately.
+
+This is disabled by default. This option must only be enabled if the given
+remote_bitbang host supports receiving the delay information.
+@end deffn
+
For example, to connect remotely via TCP to the host foobar you might have
something like:
@@ -2848,6 +2857,15 @@ remote_bitbang port 3335
remote_bitbang host foobar
@end example
+And if you also wished to enable remote sleeping:
+
+@example
+adapter driver remote_bitbang
+remote_bitbang port 3335
+remote_bitbang host foobar
+remote_bitbang use_remote_sleep on
+@end example
+
To connect to another process running locally via UNIX sockets with socket
named mysocket:
diff --git a/src/jtag/drivers/bitbang.c b/src/jtag/drivers/bitbang.c
index 665dbf329..6e97d1584 100644
--- a/src/jtag/drivers/bitbang.c
+++ b/src/jtag/drivers/bitbang.c
@@ -278,6 +278,15 @@ static int bitbang_scan(bool ir_scan, enum scan_type type, uint8_t *buffer,
return ERROR_OK;
}
+static void bitbang_sleep(unsigned int microseconds)
+{
+ if (bitbang_interface->sleep) {
+ bitbang_interface->sleep(microseconds);
+ } else {
+ jtag_sleep(microseconds);
+ }
+}
+
int bitbang_execute_queue(void)
{
struct jtag_command *cmd = jtag_command_queue; /* currently processed command */
@@ -351,7 +360,7 @@ int bitbang_execute_queue(void)
break;
case JTAG_SLEEP:
LOG_DEBUG_IO("sleep %" PRIu32, cmd->cmd.sleep->us);
- jtag_sleep(cmd->cmd.sleep->us);
+ bitbang_sleep(cmd->cmd.sleep->us);
break;
case JTAG_TMS:
retval = bitbang_execute_tms(cmd);
diff --git a/src/jtag/drivers/bitbang.h b/src/jtag/drivers/bitbang.h
index 4ea1cc045..e3714df9c 100644
--- a/src/jtag/drivers/bitbang.h
+++ b/src/jtag/drivers/bitbang.h
@@ -54,6 +54,9 @@ struct bitbang_interface {
/** Set SWCLK and SWDIO to the given value. */
int (*swd_write)(int swclk, int swdio);
+
+ /** Sleep for some number of microseconds. **/
+ int (*sleep)(unsigned int microseconds);
};
extern const struct swd_driver bitbang_swd;
diff --git a/src/jtag/drivers/remote_bitbang.c b/src/jtag/drivers/remote_bitbang.c
index 261c30df2..c488f8334 100644
--- a/src/jtag/drivers/remote_bitbang.c
+++ b/src/jtag/drivers/remote_bitbang.c
@@ -31,6 +31,8 @@ static int remote_bitbang_fd;
static uint8_t remote_bitbang_send_buf[512];
static unsigned int remote_bitbang_send_buf_used;
+static bool use_remote_sleep;
+
/* Circular buffer. When start == end, the buffer is empty. */
static char remote_bitbang_recv_buf[256];
static unsigned int remote_bitbang_recv_buf_start;
@@ -216,6 +218,32 @@ static int remote_bitbang_reset(int trst, int srst)
return remote_bitbang_queue(c, FLUSH_SEND_BUF);
}
+static int remote_bitbang_sleep(unsigned int microseconds)
+{
+ if (!use_remote_sleep) {
+ jtag_sleep(microseconds);
+ return ERROR_OK;
+ }
+
+ int tmp;
+ unsigned int ms = microseconds / 1000;
+ unsigned int us = microseconds % 1000;
+
+ for (unsigned int i = 0; i < ms; i++) {
+ tmp = remote_bitbang_queue('D', NO_FLUSH);
+ if (tmp != ERROR_OK)
+ return tmp;
+ }
+
+ for (unsigned int i = 0; i < us; i++) {
+ tmp = remote_bitbang_queue('d', NO_FLUSH);
+ if (tmp != ERROR_OK)
+ return tmp;
+ }
+
+ return remote_bitbang_flush();
+}
+
static int remote_bitbang_blink(int on)
{
char c = on ? 'B' : 'b';
@@ -252,6 +280,7 @@ static struct bitbang_interface remote_bitbang_bitbang = {
.swdio_drive = &remote_bitbang_swdio_drive,
.swd_write = &remote_bitbang_swd_write,
.blink = &remote_bitbang_blink,
+ .sleep = &remote_bitbang_sleep,
};
static int remote_bitbang_init_tcp(void)
@@ -377,6 +406,16 @@ COMMAND_HANDLER(remote_bitbang_handle_remote_bitbang_host_command)
static const char * const remote_bitbang_transports[] = { "jtag", "swd", NULL };
+COMMAND_HANDLER(remote_bitbang_handle_remote_bitbang_use_remote_sleep_command)
+{
+ if (CMD_ARGC != 1)
+ return ERROR_COMMAND_SYNTAX_ERROR;
+
+ COMMAND_PARSE_ON_OFF(CMD_ARGV[0], use_remote_sleep);
+
+ return ERROR_OK;
+}
+
static const struct command_registration remote_bitbang_subcommand_handlers[] = {
{
.name = "port",
@@ -394,7 +433,15 @@ static const struct command_registration remote_bitbang_subcommand_handlers[] =
" if port is 0 or unset, this is the name of the unix socket to use.",
.usage = "host_name",
},
- COMMAND_REGISTRATION_DONE,
+ {
+ .name = "use_remote_sleep",
+ .handler = remote_bitbang_handle_remote_bitbang_use_remote_sleep_command,
+ .mode = COMMAND_CONFIG,
+ .help = "Rather than executing sleep locally, include delays in the "
+ "instruction stream for the remote host.",
+ .usage = "(on|off)",
+ },
+ COMMAND_REGISTRATION_DONE
};
static const struct command_registration remote_bitbang_command_handlers[] = {
-----------------------------------------------------------------------
Summary of changes:
doc/manual/jtag/drivers/remote_bitbang.txt | 14 +++++++--
doc/openocd.texi | 18 +++++++++++
src/jtag/drivers/bitbang.c | 11 ++++++-
src/jtag/drivers/bitbang.h | 3 ++
src/jtag/drivers/remote_bitbang.c | 49 +++++++++++++++++++++++++++++-
5 files changed, 91 insertions(+), 4 deletions(-)
hooks/post-receive
--
Main OpenOCD repository
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|
From: openocd-gerrit <ope...@us...> - 2023-12-16 07:53:49
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".
The branch, master has been updated
via 16e9b9c44fa62ea6eec99d1fb7bc43a8f1cc2f7e (commit)
from d2b34b474024926811989d75b6a8faf04c1810d6 (commit)
Those revisions listed above that are new to this repository have
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- Log -----------------------------------------------------------------
commit 16e9b9c44fa62ea6eec99d1fb7bc43a8f1cc2f7e
Author: Tomas Vanek <va...@fb...>
Date: Wed Dec 6 15:05:03 2023 +0100
doc/usb_adapters: add dumps of two versions of Atmel EDBG
USB HS based CMSIS-DAP v1 (HID) adapters found
on Atmel/Microchip Xplained Pro development boards.
Signed-off-by: Tomas Vanek <va...@fb...>
Change-Id: I62a4b656dc6dce27da386e906d87088befc2bcbf
Reviewed-on: https://review.openocd.org/c/openocd/+/8038
Reviewed-by: Antonio Borneo <bor...@gm...>
Tested-by: jenkins
diff --git a/doc/usb_adapters/cmsis_dap/03eb_2111_atmel_edbg.txt b/doc/usb_adapters/cmsis_dap/03eb_2111_atmel_edbg.txt
new file mode 100644
index 000000000..e4dd6cee0
--- /dev/null
+++ b/doc/usb_adapters/cmsis_dap/03eb_2111_atmel_edbg.txt
@@ -0,0 +1,211 @@
+# SPDX-License-Identifier: GPL-2.0-or-later OR GFDL-1.2-no-invariants-or-later
+
+# Optional comment
+
+Bus 001 Device 006: ID 03eb:2111 Atmel Corp. Xplained Pro board debugger and programmer
+Device Descriptor:
+ bLength 18
+ bDescriptorType 1
+ bcdUSB 2.00
+ bDeviceClass 239 Miscellaneous Device
+ bDeviceSubClass 2
+ bDeviceProtocol 1 Interface Association
+ bMaxPacketSize0 64
+ idVendor 0x03eb Atmel Corp.
+ idProduct 0x2111 Xplained Pro board debugger and programmer
+ bcdDevice 1.01
+ iManufacturer 1 Atmel Corp.
+ iProduct 2 EDBG CMSIS-DAP
+ iSerial 3 ATMLxxxxxxxxxxxxxxxx
+ bNumConfigurations 1
+ Configuration Descriptor:
+ bLength 9
+ bDescriptorType 2
+ wTotalLength 0x0082
+ bNumInterfaces 4
+ bConfigurationValue 1
+ iConfiguration 0
+ bmAttributes 0x80
+ (Bus Powered)
+ MaxPower 500mA
+ Interface Descriptor:
+ bLength 9
+ bDescriptorType 4
+ bInterfaceNumber 0
+ bAlternateSetting 0
+ bNumEndpoints 2
+ bInterfaceClass 3 Human Interface Device
+ bInterfaceSubClass 0
+ bInterfaceProtocol 0
+ iInterface 4 EDBG CMSIS-DAP
+ HID Device Descriptor:
+ bLength 9
+ bDescriptorType 33
+ bcdHID 1.11
+ bCountryCode 0 Not supported
+ bNumDescriptors 1
+ bDescriptorType 34 Report
+ wDescriptorLength 35
+ Report Descriptor: (length is 35)
+ Item(Global): Usage Page, data= [ 0x00 0xff ] 65280
+ (null)
+ Item(Local ): Usage, data= [ 0x01 ] 1
+ (null)
+ Item(Main ): Collection, data= [ 0x01 ] 1
+ Application
+ Item(Global): Logical Minimum, data= [ 0x00 ] 0
+ Item(Global): Logical Maximum, data= [ 0xff 0x00 ] 255
+ Item(Global): Report Size, data= [ 0x08 ] 8
+ Item(Global): Report Count, data= [ 0x00 0x02 ] 512
+ Item(Local ): Usage, data= [ 0x01 ] 1
+ (null)
+ Item(Main ): Input, data= [ 0x02 ] 2
+ Data Variable Absolute No_Wrap Linear
+ Preferred_State No_Null_Position Non_Volatile Bitfield
+ Item(Global): Report Count, data= [ 0x00 0x02 ] 512
+ Item(Local ): Usage, data= [ 0x01 ] 1
+ (null)
+ Item(Main ): Output, data= [ 0x02 ] 2
+ Data Variable Absolute No_Wrap Linear
+ Preferred_State No_Null_Position Non_Volatile Bitfield
+ Item(Global): Report Count, data= [ 0x04 ] 4
+ Item(Local ): Usage, data= [ 0x01 ] 1
+ (null)
+ Item(Main ): Feature, data= [ 0x02 ] 2
+ Data Variable Absolute No_Wrap Linear
+ Preferred_State No_Null_Position Non_Volatile Bitfield
+ Item(Main ): End Collection, data=none
+ Endpoint Descriptor:
+ bLength 7
+ bDescriptorType 5
+ bEndpointAddress 0x01 EP 1 OUT
+ bmAttributes 3
+ Transfer Type Interrupt
+ Synch Type None
+ Usage Type Data
+ wMaxPacketSize 0x0200 1x 512 bytes
+ bInterval 1
+ Endpoint Descriptor:
+ bLength 7
+ bDescriptorType 5
+ bEndpointAddress 0x82 EP 2 IN
+ bmAttributes 3
+ Transfer Type Interrupt
+ Synch Type None
+ Usage Type Data
+ wMaxPacketSize 0x0200 1x 512 bytes
+ bInterval 1
+ Interface Association:
+ bLength 8
+ bDescriptorType 11
+ bFirstInterface 1
+ bInterfaceCount 2
+ bFunctionClass 2 Communications
+ bFunctionSubClass 2 Abstract (modem)
+ bFunctionProtocol 1 AT-commands (v.25ter)
+ iFunction 6 EDBG Virtual COM Port
+ Interface Descriptor:
+ bLength 9
+ bDescriptorType 4
+ bInterfaceNumber 1
+ bAlternateSetting 0
+ bNumEndpoints 1
+ bInterfaceClass 2 Communications
+ bInterfaceSubClass 2 Abstract (modem)
+ bInterfaceProtocol 1 AT-commands (v.25ter)
+ iInterface 0
+ CDC Header:
+ bcdCDC 1.10
+ CDC ACM:
+ bmCapabilities 0x06
+ sends break
+ line coding and serial state
+ CDC Union:
+ bMasterInterface 1
+ bSlaveInterface 2
+ CDC Call Management:
+ bmCapabilities 0x03
+ call management
+ use DataInterface
+ bDataInterface 2
+ Endpoint Descriptor:
+ bLength 7
+ bDescriptorType 5
+ bEndpointAddress 0x83 EP 3 IN
+ bmAttributes 3
+ Transfer Type Interrupt
+ Synch Type None
+ Usage Type Data
+ wMaxPacketSize 0x0040 1x 64 bytes
+ bInterval 8
+ Interface Descriptor:
+ bLength 9
+ bDescriptorType 4
+ bInterfaceNumber 2
+ bAlternateSetting 0
+ bNumEndpoints 2
+ bInterfaceClass 10 CDC Data
+ bInterfaceSubClass 0
+ bInterfaceProtocol 0
+ iInterface 0
+ Endpoint Descriptor:
+ bLength 7
+ bDescriptorType 5
+ bEndpointAddress 0x84 EP 4 IN
+ bmAttributes 2
+ Transfer Type Bulk
+ Synch Type None
+ Usage Type Data
+ wMaxPacketSize 0x0040 1x 64 bytes
+ bInterval 0
+ Endpoint Descriptor:
+ bLength 7
+ bDescriptorType 5
+ bEndpointAddress 0x05 EP 5 OUT
+ bmAttributes 2
+ Transfer Type Bulk
+ Synch Type None
+ Usage Type Data
+ wMaxPacketSize 0x0040 1x 64 bytes
+ bInterval 0
+ Interface Descriptor:
+ bLength 9
+ bDescriptorType 4
+ bInterfaceNumber 3
+ bAlternateSetting 0
+ bNumEndpoints 2
+ bInterfaceClass 255 Vendor Specific Class
+ bInterfaceSubClass 255 Vendor Specific Subclass
+ bInterfaceProtocol 255 Vendor Specific Protocol
+ iInterface 5 EDBG Data Gateway
+ Endpoint Descriptor:
+ bLength 7
+ bDescriptorType 5
+ bEndpointAddress 0x87 EP 7 IN
+ bmAttributes 2
+ Transfer Type Bulk
+ Synch Type None
+ Usage Type Data
+ wMaxPacketSize 0x0200 1x 512 bytes
+ bInterval 255
+ Endpoint Descriptor:
+ bLength 7
+ bDescriptorType 5
+ bEndpointAddress 0x06 EP 6 OUT
+ bmAttributes 2
+ Transfer Type Bulk
+ Synch Type None
+ Usage Type Data
+ wMaxPacketSize 0x0200 1x 512 bytes
+ bInterval 255
+Device Qualifier (for other device speed):
+ bLength 10
+ bDescriptorType 6
+ bcdUSB 2.00
+ bDeviceClass 239 Miscellaneous Device
+ bDeviceSubClass 2
+ bDeviceProtocol 1 Interface Association
+ bMaxPacketSize0 64
+ bNumConfigurations 1
+Device Status: 0x0000
+ (Bus Powered)
diff --git a/doc/usb_adapters/cmsis_dap/03eb_2169_atmel_edbg.txt b/doc/usb_adapters/cmsis_dap/03eb_2169_atmel_edbg.txt
new file mode 100644
index 000000000..1f7f26efd
--- /dev/null
+++ b/doc/usb_adapters/cmsis_dap/03eb_2169_atmel_edbg.txt
@@ -0,0 +1,211 @@
+# SPDX-License-Identifier: GPL-2.0-or-later OR GFDL-1.2-no-invariants-or-later
+
+# Optional comment
+
+Bus 001 Device 005: ID 03eb:2169 Atmel Corp. EDBG CMSIS-DAP
+Device Descriptor:
+ bLength 18
+ bDescriptorType 1
+ bcdUSB 2.00
+ bDeviceClass 239 Miscellaneous Device
+ bDeviceSubClass 2
+ bDeviceProtocol 1 Interface Association
+ bMaxPacketSize0 64
+ idVendor 0x03eb Atmel Corp.
+ idProduct 0x2169
+ bcdDevice 1.01
+ iManufacturer 1 Atmel Corp.
+ iProduct 2 EDBG CMSIS-DAP
+ iSerial 3 ATMLxxxxxxxxxxxxxxxx
+ bNumConfigurations 1
+ Configuration Descriptor:
+ bLength 9
+ bDescriptorType 2
+ wTotalLength 0x0082
+ bNumInterfaces 4
+ bConfigurationValue 1
+ iConfiguration 0
+ bmAttributes 0x80
+ (Bus Powered)
+ MaxPower 500mA
+ Interface Descriptor:
+ bLength 9
+ bDescriptorType 4
+ bInterfaceNumber 0
+ bAlternateSetting 0
+ bNumEndpoints 2
+ bInterfaceClass 3 Human Interface Device
+ bInterfaceSubClass 0
+ bInterfaceProtocol 0
+ iInterface 4 EDBG CMSIS-DAP
+ HID Device Descriptor:
+ bLength 9
+ bDescriptorType 33
+ bcdHID 1.11
+ bCountryCode 0 Not supported
+ bNumDescriptors 1
+ bDescriptorType 34 Report
+ wDescriptorLength 35
+ Report Descriptor: (length is 35)
+ Item(Global): Usage Page, data= [ 0x00 0xff ] 65280
+ (null)
+ Item(Local ): Usage, data= [ 0x01 ] 1
+ (null)
+ Item(Main ): Collection, data= [ 0x01 ] 1
+ Application
+ Item(Global): Logical Minimum, data= [ 0x00 ] 0
+ Item(Global): Logical Maximum, data= [ 0xff 0x00 ] 255
+ Item(Global): Report Size, data= [ 0x08 ] 8
+ Item(Global): Report Count, data= [ 0x00 0x02 ] 512
+ Item(Local ): Usage, data= [ 0x01 ] 1
+ (null)
+ Item(Main ): Input, data= [ 0x02 ] 2
+ Data Variable Absolute No_Wrap Linear
+ Preferred_State No_Null_Position Non_Volatile Bitfield
+ Item(Global): Report Count, data= [ 0x00 0x02 ] 512
+ Item(Local ): Usage, data= [ 0x01 ] 1
+ (null)
+ Item(Main ): Output, data= [ 0x02 ] 2
+ Data Variable Absolute No_Wrap Linear
+ Preferred_State No_Null_Position Non_Volatile Bitfield
+ Item(Global): Report Count, data= [ 0x04 ] 4
+ Item(Local ): Usage, data= [ 0x01 ] 1
+ (null)
+ Item(Main ): Feature, data= [ 0x02 ] 2
+ Data Variable Absolute No_Wrap Linear
+ Preferred_State No_Null_Position Non_Volatile Bitfield
+ Item(Main ): End Collection, data=none
+ Endpoint Descriptor:
+ bLength 7
+ bDescriptorType 5
+ bEndpointAddress 0x01 EP 1 OUT
+ bmAttributes 3
+ Transfer Type Interrupt
+ Synch Type None
+ Usage Type Data
+ wMaxPacketSize 0x0200 1x 512 bytes
+ bInterval 1
+ Endpoint Descriptor:
+ bLength 7
+ bDescriptorType 5
+ bEndpointAddress 0x82 EP 2 IN
+ bmAttributes 3
+ Transfer Type Interrupt
+ Synch Type None
+ Usage Type Data
+ wMaxPacketSize 0x0200 1x 512 bytes
+ bInterval 1
+ Interface Association:
+ bLength 8
+ bDescriptorType 11
+ bFirstInterface 1
+ bInterfaceCount 2
+ bFunctionClass 2 Communications
+ bFunctionSubClass 2 Abstract (modem)
+ bFunctionProtocol 1 AT-commands (v.25ter)
+ iFunction 6 EDBG Virtual COM Port
+ Interface Descriptor:
+ bLength 9
+ bDescriptorType 4
+ bInterfaceNumber 1
+ bAlternateSetting 0
+ bNumEndpoints 1
+ bInterfaceClass 2 Communications
+ bInterfaceSubClass 2 Abstract (modem)
+ bInterfaceProtocol 1 AT-commands (v.25ter)
+ iInterface 0
+ CDC Header:
+ bcdCDC 1.10
+ CDC ACM:
+ bmCapabilities 0x06
+ sends break
+ line coding and serial state
+ CDC Union:
+ bMasterInterface 1
+ bSlaveInterface 2
+ CDC Call Management:
+ bmCapabilities 0x03
+ call management
+ use DataInterface
+ bDataInterface 2
+ Endpoint Descriptor:
+ bLength 7
+ bDescriptorType 5
+ bEndpointAddress 0x83 EP 3 IN
+ bmAttributes 3
+ Transfer Type Interrupt
+ Synch Type None
+ Usage Type Data
+ wMaxPacketSize 0x0040 1x 64 bytes
+ bInterval 8
+ Interface Descriptor:
+ bLength 9
+ bDescriptorType 4
+ bInterfaceNumber 2
+ bAlternateSetting 0
+ bNumEndpoints 2
+ bInterfaceClass 10 CDC Data
+ bInterfaceSubClass 0
+ bInterfaceProtocol 0
+ iInterface 0
+ Endpoint Descriptor:
+ bLength 7
+ bDescriptorType 5
+ bEndpointAddress 0x84 EP 4 IN
+ bmAttributes 2
+ Transfer Type Bulk
+ Synch Type None
+ Usage Type Data
+ wMaxPacketSize 0x0040 1x 64 bytes
+ bInterval 0
+ Endpoint Descriptor:
+ bLength 7
+ bDescriptorType 5
+ bEndpointAddress 0x05 EP 5 OUT
+ bmAttributes 2
+ Transfer Type Bulk
+ Synch Type None
+ Usage Type Data
+ wMaxPacketSize 0x0040 1x 64 bytes
+ bInterval 0
+ Interface Descriptor:
+ bLength 9
+ bDescriptorType 4
+ bInterfaceNumber 3
+ bAlternateSetting 0
+ bNumEndpoints 2
+ bInterfaceClass 8 Mass Storage
+ bInterfaceSubClass 6 SCSI
+ bInterfaceProtocol 80 Bulk-Only
+ iInterface 0
+ Endpoint Descriptor:
+ bLength 7
+ bDescriptorType 5
+ bEndpointAddress 0x87 EP 7 IN
+ bmAttributes 2
+ Transfer Type Bulk
+ Synch Type None
+ Usage Type Data
+ wMaxPacketSize 0x0200 1x 512 bytes
+ bInterval 0
+ Endpoint Descriptor:
+ bLength 7
+ bDescriptorType 5
+ bEndpointAddress 0x06 EP 6 OUT
+ bmAttributes 2
+ Transfer Type Bulk
+ Synch Type None
+ Usage Type Data
+ wMaxPacketSize 0x0200 1x 512 bytes
+ bInterval 0
+Device Qualifier (for other device speed):
+ bLength 10
+ bDescriptorType 6
+ bcdUSB 2.00
+ bDeviceClass 239 Miscellaneous Device
+ bDeviceSubClass 2
+ bDeviceProtocol 1 Interface Association
+ bMaxPacketSize0 64
+ bNumConfigurations 1
+Device Status: 0x0000
+ (Bus Powered)
-----------------------------------------------------------------------
Summary of changes:
...04_nxp_daplink.txt => 03eb_2111_atmel_edbg.txt} | 154 +++++++++++++--------
...04_nxp_daplink.txt => 03eb_2169_atmel_edbg.txt} | 154 +++++++++++++--------
2 files changed, 190 insertions(+), 118 deletions(-)
copy doc/usb_adapters/cmsis_dap/{0d28_0204_nxp_daplink.txt => 03eb_2111_atmel_edbg.txt} (61%)
copy doc/usb_adapters/cmsis_dap/{0d28_0204_nxp_daplink.txt => 03eb_2169_atmel_edbg.txt} (64%)
hooks/post-receive
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Main OpenOCD repository
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From: openocd-gerrit <ope...@us...> - 2023-12-16 07:53:03
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".
The branch, master has been updated
via d2b34b474024926811989d75b6a8faf04c1810d6 (commit)
from f018cd7d90243ab29c3cad25caf6932d1f1b83ea (commit)
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- Log -----------------------------------------------------------------
commit d2b34b474024926811989d75b6a8faf04c1810d6
Author: Marc Schink <de...@za...>
Date: Wed Dec 6 18:11:11 2023 +0100
jtag/core: Use 'bool' data type for 'bypass'
Change-Id: I918fd5ce674e808ad6a96634a11046d2b3f6a05c
Signed-off-by: Marc Schink <de...@za...>
Reviewed-on: https://review.openocd.org/c/openocd/+/8040
Reviewed-by: Antonio Borneo <bor...@gm...>
Tested-by: jenkins
diff --git a/src/jtag/core.c b/src/jtag/core.c
index 665a93219..e2af6c53d 100644
--- a/src/jtag/core.c
+++ b/src/jtag/core.c
@@ -1049,7 +1049,7 @@ static int jtag_reset_callback(enum jtag_event event, void *priv)
/* current instruction is either BYPASS or IDCODE */
buf_set_ones(tap->cur_instr, tap->ir_length);
- tap->bypass = 1;
+ tap->bypass = true;
}
return ERROR_OK;
@@ -1464,7 +1464,7 @@ void jtag_tap_init(struct jtag_tap *tap)
buf_set_u32(tap->expected_mask, 0, ir_len_bits, tap->ir_capture_mask);
/* TAP will be in bypass mode after jtag_validate_ircapture() */
- tap->bypass = 1;
+ tap->bypass = true;
buf_set_ones(tap->cur_instr, tap->ir_length);
/* register the reset callback for the TAP */
diff --git a/src/jtag/drivers/driver.c b/src/jtag/drivers/driver.c
index 409b80087..773231500 100644
--- a/src/jtag/drivers/driver.c
+++ b/src/jtag/drivers/driver.c
@@ -76,13 +76,13 @@ int interface_jtag_add_ir_scan(struct jtag_tap *active,
if (tap == active) {
/* if TAP is listed in input fields, copy the value */
- tap->bypass = 0;
+ tap->bypass = false;
jtag_scan_field_clone(field, in_fields);
} else {
/* if a TAP isn't listed in input fields, set it to BYPASS */
- tap->bypass = 1;
+ tap->bypass = true;
field->num_bits = tap->ir_length;
field->out_value = buf_set_ones(cmd_queue_alloc(DIV_ROUND_UP(tap->ir_length, 8)), tap->ir_length);
diff --git a/src/jtag/jtag.h b/src/jtag/jtag.h
index 7353104f0..1d1c495cf 100644
--- a/src/jtag/jtag.h
+++ b/src/jtag/jtag.h
@@ -131,7 +131,7 @@ struct jtag_tap {
/** current instruction */
uint8_t *cur_instr;
/** Bypass register selected */
- int bypass;
+ bool bypass;
struct jtag_tap_event_action *event_action;
-----------------------------------------------------------------------
Summary of changes:
src/jtag/core.c | 4 ++--
src/jtag/drivers/driver.c | 4 ++--
src/jtag/jtag.h | 2 +-
3 files changed, 5 insertions(+), 5 deletions(-)
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--
Main OpenOCD repository
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From: openocd-gerrit <ope...@us...> - 2023-12-16 07:52:27
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".
The branch, master has been updated
via f018cd7d90243ab29c3cad25caf6932d1f1b83ea (commit)
from d3d287bf676573fcbb6d6df3becfb4b3392df3db (commit)
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- Log -----------------------------------------------------------------
commit f018cd7d90243ab29c3cad25caf6932d1f1b83ea
Author: Marc Schink <de...@za...>
Date: Wed Dec 6 18:08:50 2023 +0100
jtag: Rename 'hasidcode' to 'has_idcode'
While at it, fix some coding style issues.
Change-Id: I8196045f46ce043ed0d28cb95470132b3a7de1bb
Signed-off-by: Marc Schink <de...@za...>
Reviewed-on: https://review.openocd.org/c/openocd/+/8039
Tested-by: jenkins
Reviewed-by: Antonio Borneo <bor...@gm...>
diff --git a/src/flash/nor/xcf.c b/src/flash/nor/xcf.c
index 287072551..c253b2264 100644
--- a/src/flash/nor/xcf.c
+++ b/src/flash/nor/xcf.c
@@ -597,7 +597,7 @@ static int xcf_probe(struct flash_bank *bank)
}
/* check idcode and alloc memory for sector table */
- if (!bank->target->tap->hasidcode)
+ if (!bank->target->tap->has_idcode)
return ERROR_FLASH_OPERATION_FAILED;
/* guess number of blocks using chip ID */
diff --git a/src/jtag/core.c b/src/jtag/core.c
index 574801187..665a93219 100644
--- a/src/jtag/core.c
+++ b/src/jtag/core.c
@@ -1177,7 +1177,7 @@ static bool jtag_examine_chain_end(uint8_t *idcodes, unsigned count, unsigned ma
static bool jtag_examine_chain_match_tap(const struct jtag_tap *tap)
{
- if (tap->expected_ids_cnt == 0 || !tap->hasidcode)
+ if (tap->expected_ids_cnt == 0 || !tap->has_idcode)
return true;
/* optionally ignore the JTAG version field - bits 28-31 of IDCODE */
@@ -1283,13 +1283,13 @@ static int jtag_examine_chain(void)
/* Zero for LSB indicates a device in bypass */
LOG_INFO("TAP %s does not have valid IDCODE (idcode=0x%" PRIx32 ")",
tap->dotted_name, idcode);
- tap->hasidcode = false;
+ tap->has_idcode = false;
tap->idcode = 0;
bit_count += 1;
} else {
/* Friendly devices support IDCODE */
- tap->hasidcode = true;
+ tap->has_idcode = true;
tap->idcode = idcode;
jtag_examine_chain_display(LOG_LVL_INFO, "tap/device found", tap->dotted_name, idcode);
diff --git a/src/jtag/hla/hla_interface.c b/src/jtag/hla/hla_interface.c
index f4bfeb1a1..9c8d0fade 100644
--- a/src/jtag/hla/hla_interface.c
+++ b/src/jtag/hla/hla_interface.c
@@ -100,7 +100,7 @@ int hl_interface_init_target(struct target *t)
}
t->tap->priv = &hl_if;
- t->tap->hasidcode = 1;
+ t->tap->has_idcode = true;
return ERROR_OK;
}
diff --git a/src/jtag/jtag.h b/src/jtag/jtag.h
index 04d1b4a2b..7353104f0 100644
--- a/src/jtag/jtag.h
+++ b/src/jtag/jtag.h
@@ -115,7 +115,7 @@ struct jtag_tap {
uint32_t idcode; /**< device identification code */
/** not all devices have idcode,
* we'll discover this during chain examination */
- bool hasidcode;
+ bool has_idcode;
/** Array of expected identification codes */
uint32_t *expected_ids;
diff --git a/src/pld/intel.c b/src/pld/intel.c
index 8422c94c4..a39e16c21 100644
--- a/src/pld/intel.c
+++ b/src/pld/intel.c
@@ -157,7 +157,7 @@ static int intel_check_for_unique_id(struct intel_pld_device *intel_info)
static int intel_check_config(struct intel_pld_device *intel_info)
{
- if (!intel_info->tap->hasidcode) {
+ if (!intel_info->tap->has_idcode) {
LOG_ERROR("no IDCODE");
return ERROR_FAIL;
}
diff --git a/src/pld/lattice.c b/src/pld/lattice.c
index cd72d3cb5..2997cdc39 100644
--- a/src/pld/lattice.c
+++ b/src/pld/lattice.c
@@ -81,7 +81,7 @@ static int lattice_check_device_family(struct lattice_pld_device *lattice_device
if (lattice_device->family != LATTICE_UNKNOWN && lattice_device->preload_length != 0)
return ERROR_OK;
- if (!lattice_device->tap || !lattice_device->tap->hasidcode)
+ if (!lattice_device->tap || !lattice_device->tap->has_idcode)
return ERROR_FAIL;
for (size_t i = 0; i < ARRAY_SIZE(lattice_devices); ++i) {
@@ -280,7 +280,7 @@ static int lattice_load_command(struct pld_device *pld_device, const char *filen
return ERROR_FAIL;
struct jtag_tap *tap = lattice_device->tap;
- if (!tap || !tap->hasidcode)
+ if (!tap || !tap->has_idcode)
return ERROR_FAIL;
int retval = lattice_check_device_family(lattice_device);
diff --git a/src/target/dsp563xx.c b/src/target/dsp563xx.c
index 578920154..80cca1ed5 100644
--- a/src/target/dsp563xx.c
+++ b/src/target/dsp563xx.c
@@ -912,7 +912,7 @@ static int dsp563xx_examine(struct target *target)
{
uint32_t chip;
- if (target->tap->hasidcode == false) {
+ if (!target->tap->has_idcode) {
LOG_ERROR("no IDCODE present on device");
return ERROR_COMMAND_SYNTAX_ERROR;
}
-----------------------------------------------------------------------
Summary of changes:
src/flash/nor/xcf.c | 2 +-
src/jtag/core.c | 6 +++---
src/jtag/hla/hla_interface.c | 2 +-
src/jtag/jtag.h | 2 +-
src/pld/intel.c | 2 +-
src/pld/lattice.c | 4 ++--
src/target/dsp563xx.c | 2 +-
7 files changed, 10 insertions(+), 10 deletions(-)
hooks/post-receive
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Main OpenOCD repository
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|
From: openocd-gerrit <ope...@us...> - 2023-12-16 07:51:49
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".
The branch, master has been updated
via d3d287bf676573fcbb6d6df3becfb4b3392df3db (commit)
from 49348f1ce10049c3102bf23b2af9d4965423faa1 (commit)
Those revisions listed above that are new to this repository have
not appeared on any other notification email; so we list those
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- Log -----------------------------------------------------------------
commit d3d287bf676573fcbb6d6df3becfb4b3392df3db
Author: Antonio Borneo <bor...@gm...>
Date: Mon Dec 4 00:29:56 2023 +0100
helper: nvp: minor fixes
Fix incorrect reference for original file.
Fix copy-paste example.
Change-Id: I1ea7909ca241611122f93ca11a4c94c97674b430
Signed-off-by: Antonio Borneo <bor...@gm...>
Reviewed-on: https://review.openocd.org/c/openocd/+/8037
Tested-by: jenkins
Reviewed-by: Henrik Nordström <hen...@ad...>
diff --git a/src/helper/nvp.c b/src/helper/nvp.c
index 7a8abc2e2..a938716ae 100644
--- a/src/helper/nvp.c
+++ b/src/helper/nvp.c
@@ -14,7 +14,7 @@
* Copyright 2009 David Brownell
* Copyright (c) 2005-2011 Jim Tcl Project. All rights reserved.
*
- * This file is extracted from jim_nvp.c, originally part of jim TCL code.
+ * This file is extracted from jim-nvp.c, originally part of jim TCL code.
*/
#ifdef HAVE_CONFIG_H
diff --git a/src/helper/nvp.h b/src/helper/nvp.h
index 14bd9b028..1f4e3d1b4 100644
--- a/src/helper/nvp.h
+++ b/src/helper/nvp.h
@@ -14,7 +14,7 @@
* Copyright 2009 David Brownell
* Copyright (c) 2005-2011 Jim Tcl Project. All rights reserved.
*
- * This file is extracted from jim_nvp.h, originally part of jim TCL code.
+ * This file is extracted from jim-nvp.h, originally part of jim TCL code.
*/
#ifndef OPENOCD_HELPER_NVP_H
@@ -51,7 +51,7 @@
* returns &yn[0];
* result = nvp_name2value(yn, "no");
* returns &yn[1];
- * result = jim_nvp_name2value(yn, "Blah");
+ * result = nvp_name2value(yn, "Blah");
* returns &yn[4];
* \endcode
*
-----------------------------------------------------------------------
Summary of changes:
src/helper/nvp.c | 2 +-
src/helper/nvp.h | 4 ++--
2 files changed, 3 insertions(+), 3 deletions(-)
hooks/post-receive
--
Main OpenOCD repository
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From: openocd-gerrit <ope...@us...> - 2023-12-16 07:51:21
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".
The branch, master has been updated
via 49348f1ce10049c3102bf23b2af9d4965423faa1 (commit)
from 3413ae67ae4b886f240c57af8bf562fb0ba8ce76 (commit)
Those revisions listed above that are new to this repository have
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- Log -----------------------------------------------------------------
commit 49348f1ce10049c3102bf23b2af9d4965423faa1
Author: Antonio Borneo <bor...@gm...>
Date: Sun Dec 3 11:34:03 2023 +0100
target: use bool for backup_working_area
The field backup_working_area is always used as a boolean value.
Use bool type for backup_working_area.
Change-Id: I55c68d717dbbe9e5caf60fd1db368527c6d1b995
Signed-off-by: Antonio Borneo <bor...@gm...>
Reviewed-on: https://review.openocd.org/c/openocd/+/8036
Tested-by: jenkins
Reviewed-by: zapb <de...@za...>
diff --git a/src/target/target.c b/src/target/target.c
index d7283324f..bb773f6a5 100644
--- a/src/target/target.c
+++ b/src/target/target.c
@@ -5450,13 +5450,13 @@ no_params:
e = jim_getopt_wide(goi, &w);
if (e != JIM_OK)
return e;
- /* make this exactly 1 or 0 */
- target->backup_working_area = (!!w);
+ /* make this boolean */
+ target->backup_working_area = (w != 0);
} else {
if (goi->argc != 0)
goto no_params;
}
- Jim_SetResult(goi->interp, Jim_NewIntObj(goi->interp, target->backup_working_area));
+ Jim_SetResult(goi->interp, Jim_NewIntObj(goi->interp, target->backup_working_area ? 1 : 0));
/* loop for more e*/
break;
@@ -6181,7 +6181,7 @@ static int target_create(struct jim_getopt_info *goi)
target->working_area = 0x0;
target->working_area_size = 0x0;
target->working_areas = NULL;
- target->backup_working_area = 0;
+ target->backup_working_area = false;
target->state = TARGET_UNKNOWN;
target->debug_reason = DBG_REASON_UNDEFINED;
diff --git a/src/target/target.h b/src/target/target.h
index 28a200807..6caf59887 100644
--- a/src/target/target.h
+++ b/src/target/target.h
@@ -148,7 +148,7 @@ struct target {
bool working_area_phys_spec; /* physical address specified? */
target_addr_t working_area_phys; /* physical address */
uint32_t working_area_size; /* size in bytes */
- uint32_t backup_working_area; /* whether the content of the working area has to be preserved */
+ bool backup_working_area; /* whether the content of the working area has to be preserved */
struct working_area *working_areas;/* list of allocated working areas */
enum target_debug_reason debug_reason;/* reason why the target entered debug state */
enum target_endianness endianness; /* target endianness */
-----------------------------------------------------------------------
Summary of changes:
src/target/target.c | 8 ++++----
src/target/target.h | 2 +-
2 files changed, 5 insertions(+), 5 deletions(-)
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Main OpenOCD repository
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From: openocd-gerrit <ope...@us...> - 2023-12-15 05:57:05
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".
The branch, master has been updated
via 3413ae67ae4b886f240c57af8bf562fb0ba8ce76 (commit)
from c1ae95f6f55168a15a7cf359c1d4c5f1d4b04c01 (commit)
Those revisions listed above that are new to this repository have
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- Log -----------------------------------------------------------------
commit 3413ae67ae4b886f240c57af8bf562fb0ba8ce76
Author: Samuel Dewan <sam...@me...>
Date: Fri Dec 1 14:16:22 2023 -0500
cmsis_dap_usb_hid: improve detection of probes with unusual report sizes
Currently all Atmel CMSIS-DAP interfaces are assumed to have 512 byte
reports except for the mEDBG (found on Xplained Mini boards) and the nEDBG
(found on Curiosity Nano boards). This check is far from exaustive and it
results in some Microchip programmers (like the MPLAB Snap and PICkit 4)
not working correctly with OpenOCD.
Instead of assuming that Atmel programmers have 512 byte reports unless we
know otherwise, this commit flips the logic around. Only the older "third
generation" EDBG based programmers have 512 byte report sizes, and that 64
bytes will be more common in Microchip tools going forward.
The list of PIDs for 3rd generation Microchip programmers comes from
toolinfo.py from Microchip's pyedbglib.
This commit adds a more generic "quirks" list that will allow programmers
with unusual report sizes to be added easily in the future.
Change-Id: Ic39a4bdcd67c4c93d5707657c6ee5d216bc4437a
Signed-off-by: Samuel Dewan <sam...@me...>
Reviewed-on: https://review.openocd.org/c/openocd/+/8033
Tested-by: jenkins
Reviewed-by: Tomas Vanek <va...@fb...>
diff --git a/src/jtag/drivers/cmsis_dap_usb_hid.c b/src/jtag/drivers/cmsis_dap_usb_hid.c
index 1decc7156..98ccc3e38 100644
--- a/src/jtag/drivers/cmsis_dap_usb_hid.c
+++ b/src/jtag/drivers/cmsis_dap_usb_hid.c
@@ -34,6 +34,36 @@ struct cmsis_dap_backend_data {
hid_device *dev_handle;
};
+struct cmsis_dap_report_size {
+ unsigned short vid;
+ unsigned short pid;
+ unsigned int report_size;
+};
+
+static const struct cmsis_dap_report_size report_size_quirks[] = {
+ /* Third gen Atmel tools use a report size of 512 */
+ /* This list of PIDs comes from toolinfo.py in Microchip's pyedbglib. */
+ // Atmel JTAG-ICE 3
+ { .vid = 0x03eb, .pid = 0x2140, .report_size = 512 },
+ // Atmel-ICE
+ { .vid = 0x03eb, .pid = 0x2141, .report_size = 512 },
+ // Atmel Power Debugger
+ { .vid = 0x03eb, .pid = 0x2144, .report_size = 512 },
+ // EDBG (found on Xplained Pro boards)
+ { .vid = 0x03eb, .pid = 0x2111, .report_size = 512 },
+ // Zero (???)
+ { .vid = 0x03eb, .pid = 0x2157, .report_size = 512 },
+ // EDBG with Mass Storage (found on Xplained Pro boards)
+ { .vid = 0x03eb, .pid = 0x2169, .report_size = 512 },
+ // Commercially available EDBG (for third-party use)
+ { .vid = 0x03eb, .pid = 0x216a, .report_size = 512 },
+ // Kraken (???)
+ { .vid = 0x03eb, .pid = 0x2170, .report_size = 512 },
+
+ { .vid = 0, .pid = 0, .report_size = 0 }
+};
+
+
static void cmsis_dap_hid_close(struct cmsis_dap *dap);
static int cmsis_dap_hid_alloc(struct cmsis_dap *dap, unsigned int pkt_sz);
static void cmsis_dap_hid_free(struct cmsis_dap *dap);
@@ -139,13 +169,15 @@ static int cmsis_dap_hid_open(struct cmsis_dap *dap, uint16_t vids[], uint16_t p
unsigned int packet_size = 64;
- /* atmel cmsis-dap uses 512 byte reports */
- /* except when it doesn't e.g. with mEDBG on SAMD10 Xplained
- * board */
+ /* Check for adapters that are known to have unusual report lengths. */
+ for (i = 0; report_size_quirks[i].vid != 0; i++) {
+ if (report_size_quirks[i].vid == target_vid &&
+ report_size_quirks[i].pid == target_pid) {
+ packet_size = report_size_quirks[i].report_size;
+ }
+ }
/* TODO: HID report descriptor should be parsed instead of
- * hardcoding a match by VID */
- if (target_vid == 0x03eb && target_pid != 0x2145 && target_pid != 0x2175)
- packet_size = 512;
+ * hardcoding a match by VID/PID */
dap->bdata->dev_handle = dev;
-----------------------------------------------------------------------
Summary of changes:
src/jtag/drivers/cmsis_dap_usb_hid.c | 44 +++++++++++++++++++++++++++++++-----
1 file changed, 38 insertions(+), 6 deletions(-)
hooks/post-receive
--
Main OpenOCD repository
|
|
From: openocd-gerrit <ope...@us...> - 2023-12-10 13:37:42
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".
The branch, master has been updated
via c1ae95f6f55168a15a7cf359c1d4c5f1d4b04c01 (commit)
from 5f6b25aa91eb81903aed128ee304ffc69e0492f3 (commit)
Those revisions listed above that are new to this repository have
not appeared on any other notification email; so we list those
revisions in full, below.
- Log -----------------------------------------------------------------
commit c1ae95f6f55168a15a7cf359c1d4c5f1d4b04c01
Author: Antonio Borneo <bor...@gm...>
Date: Fri Dec 1 23:49:35 2023 +0100
HACKING: fix how to retrieve hooks/commit-msg
Probably due to new version of gerrit, the download of the gerrit
hooks via scp is not working anymore.
Also the instructions available, after login, in
https://review.openocd.org/admin/repos/openocd,general
report that the hook file has to be downloaded via https also when
the user want to use ssh for gerrit access.
Drop scp in the suggestions to download the hook file and keep
https download only.
Change-Id: I0c8e5bb61ed8c7423a42a0d5d92866e071a814bb
Signed-off-by: Antonio Borneo <bor...@gm...>
Reported-by: Rolf Nooteboom <ro...@On...>
Reviewed-on: https://review.openocd.org/c/openocd/+/8034
Tested-by: jenkins
Reviewed-by: Paul Fertser <fer...@gm...>
diff --git a/HACKING b/HACKING
index fbc0eae93..74cbe02e7 100644
--- a/HACKING
+++ b/HACKING
@@ -155,10 +155,6 @@ topics. It is possible because @c for/master is not a traditional Git
branch.
-# You will need to install this hook, we will look into a better solution:
@code
-scp -p -P 29418 USE...@re...:hooks/commit-msg .git/hooks/
-@endcode
- Or with http only:
-@code
wget https://review.openocd.org/tools/hooks/commit-msg
mv commit-msg .git/hooks
chmod +x .git/hooks/commit-msg
-----------------------------------------------------------------------
Summary of changes:
HACKING | 4 ----
1 file changed, 4 deletions(-)
hooks/post-receive
--
Main OpenOCD repository
|
