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[OpenOCD-commit] Main OpenOCD repository branch, master, updated. v0.12.0-407-gacc171797

From: openocd-gerrit <ope...@us...> - 2023-11-18 11:31:54

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The branch, master has been updated
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- Log -----------------------------------------------------------------
commit acc1717970d42344812542f72ab7b17349e71242
Author: Marc Schink <de...@za...>
Date:   Thu Nov 9 10:11:34 2023 +0100

    jtag/drivers/ftdi: Use correct command error
    
    Change-Id: I625acdd8a226528de86f113582e31755d679e68e
    Signed-off-by: Marc Schink <de...@za...>
    Reviewed-on: https://review.openocd.org/c/openocd/+/7970
    Tested-by: jenkins
    Reviewed-by: Tomas Vanek <va...@fb...>
    Reviewed-by: Antonio Borneo <bor...@gm...>

diff --git a/src/jtag/drivers/ftdi.c b/src/jtag/drivers/ftdi.c
index 7175925e4..da5911ac9 100644
--- a/src/jtag/drivers/ftdi.c
+++ b/src/jtag/drivers/ftdi.c
@@ -837,7 +837,7 @@ COMMAND_HANDLER(ftdi_handle_set_signal_command)
 		/* fallthrough */
 	default:
 		LOG_ERROR("unknown signal level '%s', use 0, 1 or z", CMD_ARGV[1]);
-		return ERROR_COMMAND_SYNTAX_ERROR;
+		return ERROR_COMMAND_ARGUMENT_INVALID;
 	}
 
 	return mpsse_flush(mpsse_ctx);

-----------------------------------------------------------------------

Summary of changes:
 src/jtag/drivers/ftdi.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)


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[OpenOCD-commit] Main OpenOCD repository branch, master, updated. v0.12.0-406-ga23c69de3

From: openocd-gerrit <ope...@us...> - 2023-11-18 11:31:35

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- Log -----------------------------------------------------------------
commit a23c69de3dcb4c0934a2bcdf3f7b00541fe139b1
Author: Marc Schink <de...@za...>
Date:   Thu Nov 9 09:55:27 2023 +0100

    jtag/drivers/jlink: Use correct command errors
    
    While at it, remove the syntax error messages as the correct
    syntax is already suggested due to the return value used.
    
    Change-Id: I9310ba96ed3f8a85c37cee9193e481ad3df02e77
    Signed-off-by: Marc Schink <de...@za...>
    Reviewed-on: https://review.openocd.org/c/openocd/+/7969
    Reviewed-by: Antonio Borneo <bor...@gm...>
    Tested-by: jenkins
    Reviewed-by: Tomas Vanek <va...@fb...>

diff --git a/src/jtag/drivers/jlink.c b/src/jtag/drivers/jlink.c
index 243d1a46b..5743d8d6e 100644
--- a/src/jtag/drivers/jlink.c
+++ b/src/jtag/drivers/jlink.c
@@ -966,19 +966,17 @@ COMMAND_HANDLER(jlink_usb_command)
 {
 	int tmp;
 
-	if (CMD_ARGC != 1) {
-		command_print(CMD, "Need exactly one argument for jlink usb");
+	if (CMD_ARGC != 1)
 		return ERROR_COMMAND_SYNTAX_ERROR;
-	}
 
 	if (sscanf(CMD_ARGV[0], "%i", &tmp) != 1) {
 		command_print(CMD, "Invalid USB address: %s", CMD_ARGV[0]);
-		return ERROR_FAIL;
+		return ERROR_COMMAND_ARGUMENT_INVALID;
 	}
 
 	if (tmp < JAYLINK_USB_ADDRESS_0 || tmp > JAYLINK_USB_ADDRESS_3) {
 		command_print(CMD, "Invalid USB address: %s", CMD_ARGV[0]);
-		return ERROR_FAIL;
+		return ERROR_COMMAND_ARGUMENT_INVALID;
 	}
 
 	usb_address = tmp;
@@ -1059,7 +1057,7 @@ COMMAND_HANDLER(jlink_handle_jlink_jtag_command)
 	} else if (CMD_ARGC == 1) {
 		if (sscanf(CMD_ARGV[0], "%i", &tmp) != 1) {
 			command_print(CMD, "Invalid argument: %s", CMD_ARGV[0]);
-			return ERROR_COMMAND_SYNTAX_ERROR;
+			return ERROR_COMMAND_ARGUMENT_INVALID;
 		}
 
 		switch (tmp) {
@@ -1071,10 +1069,9 @@ COMMAND_HANDLER(jlink_handle_jlink_jtag_command)
 				break;
 			default:
 				command_print(CMD, "Invalid argument: %s", CMD_ARGV[0]);
-				return ERROR_COMMAND_SYNTAX_ERROR;
+				return ERROR_COMMAND_ARGUMENT_INVALID;
 		}
 	} else {
-		command_print(CMD, "Need exactly one argument for jlink jtag");
 		return ERROR_COMMAND_SYNTAX_ERROR;
 	}
 
@@ -1086,10 +1083,8 @@ COMMAND_HANDLER(jlink_handle_target_power_command)
 	int ret;
 	int enable;
 
-	if (CMD_ARGC != 1) {
-		command_print(CMD, "Need exactly one argument for jlink targetpower");
+	if (CMD_ARGC != 1)
 		return ERROR_COMMAND_SYNTAX_ERROR;
-	}
 
 	if (!jaylink_has_cap(caps, JAYLINK_DEV_CAP_SET_TARGET_POWER)) {
 		command_print(CMD, "Target power supply is not supported by the "
@@ -1428,17 +1423,16 @@ COMMAND_HANDLER(jlink_handle_config_usb_address_command)
 	} else if (CMD_ARGC == 1) {
 		if (sscanf(CMD_ARGV[0], "%" SCNd8, &tmp) != 1) {
 			command_print(CMD, "Invalid USB address: %s", CMD_ARGV[0]);
-			return ERROR_FAIL;
+			return ERROR_COMMAND_ARGUMENT_INVALID;
 		}
 
 		if (tmp > JAYLINK_USB_ADDRESS_3) {
 			command_print(CMD, "Invalid USB address: %u", tmp);
-			return ERROR_FAIL;
+			return ERROR_COMMAND_ARGUMENT_INVALID;
 		}
 
 		tmp_config.usb_address = tmp;
 	} else {
-		command_print(CMD, "Need exactly one argument for jlink config usb");
 		return ERROR_COMMAND_SYNTAX_ERROR;
 	}
 
@@ -1470,13 +1464,11 @@ COMMAND_HANDLER(jlink_handle_config_target_power_command)
 			enable = false;
 		} else {
 			command_print(CMD, "Invalid argument: %s", CMD_ARGV[0]);
-			return ERROR_FAIL;
+			return ERROR_COMMAND_ARGUMENT_INVALID;
 		}
 
 		tmp_config.target_power = enable;
 	} else {
-		command_print(CMD, "Need exactly one argument for jlink config "
-			"targetpower");
 		return ERROR_COMMAND_SYNTAX_ERROR;
 	}
 
@@ -1510,7 +1502,7 @@ COMMAND_HANDLER(jlink_handle_config_mac_address_command)
 		if ((strlen(str) != 17) || (str[2] != ':' || str[5] != ':' ||
 				str[8] != ':' || str[11] != ':' || str[14] != ':')) {
 			command_print(CMD, "Invalid MAC address format");
-			return ERROR_COMMAND_SYNTAX_ERROR;
+			return ERROR_COMMAND_ARGUMENT_INVALID;
 		}
 
 		for (i = 5; i >= 0; i--) {
@@ -1520,17 +1512,16 @@ COMMAND_HANDLER(jlink_handle_config_mac_address_command)
 
 		if (!(addr[0] | addr[1] | addr[2] | addr[3] | addr[4] | addr[5])) {
 			command_print(CMD, "Invalid MAC address: zero address");
-			return ERROR_COMMAND_SYNTAX_ERROR;
+			return ERROR_COMMAND_ARGUMENT_INVALID;
 		}
 
 		if (!(0x01 & addr[0])) {
 			command_print(CMD, "Invalid MAC address: multicast address");
-			return ERROR_COMMAND_SYNTAX_ERROR;
+			return ERROR_COMMAND_ARGUMENT_INVALID;
 		}
 
 		memcpy(tmp_config.mac_address, addr, sizeof(addr));
 	} else {
-		command_print(CMD, "Need exactly one argument for jlink config mac");
 		return ERROR_COMMAND_SYNTAX_ERROR;
 	}
 
@@ -1592,20 +1583,26 @@ COMMAND_HANDLER(jlink_handle_config_ip_address_command)
 	if (!CMD_ARGC) {
 		show_config_ip_address(CMD);
 	} else {
-		if (!string_to_ip(CMD_ARGV[0], ip_address, &i))
-			return ERROR_COMMAND_SYNTAX_ERROR;
+		if (!string_to_ip(CMD_ARGV[0], ip_address, &i)) {
+			command_print(CMD, "invalid IPv4 address");
+			return ERROR_COMMAND_ARGUMENT_INVALID;
+		}
 
 		len = strlen(CMD_ARGV[0]);
 
 		/* Check for format A.B.C.D/E. */
 		if (i < len) {
-			if (CMD_ARGV[0][i] != '/')
-				return ERROR_COMMAND_SYNTAX_ERROR;
+			if (CMD_ARGV[0][i] != '/') {
+				command_print(CMD, "missing network mask");
+				return ERROR_COMMAND_ARGUMENT_INVALID;
+			}
 
 			COMMAND_PARSE_NUMBER(u8, CMD_ARGV[0] + i + 1, subnet_bits);
 		} else if (CMD_ARGC > 1) {
-			if (!string_to_ip(CMD_ARGV[1], (uint8_t *)&subnet_mask, &i))
-				return ERROR_COMMAND_SYNTAX_ERROR;
+			if (!string_to_ip(CMD_ARGV[1], (uint8_t *)&subnet_mask, &i)) {
+				command_print(CMD, "invalid subnet mask");
+				return ERROR_COMMAND_ARGUMENT_INVALID;
+			}
 		}
 
 		if (!subnet_mask)

-----------------------------------------------------------------------

Summary of changes:
 src/jtag/drivers/jlink.c | 51 +++++++++++++++++++++++-------------------------
 1 file changed, 24 insertions(+), 27 deletions(-)


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Main OpenOCD repository

[OpenOCD-commit] Main OpenOCD repository branch, master, updated. v0.12.0-405-g62b526dbb

From: openocd-gerrit <ope...@us...> - 2023-11-18 11:30:24

This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".

The branch, master has been updated
       via  62b526dbbdec073cdcf95bf5cdf622401aa55e78 (commit)
      from  f55b122b42c212fcb3219e372a7361d6573bd6a3 (commit)

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- Log -----------------------------------------------------------------
commit 62b526dbbdec073cdcf95bf5cdf622401aa55e78
Author: Tobias Diedrich <ran...@td...>
Date:   Mon Aug 1 20:29:41 2016 +0200

    mips32: MIPS32_OP_SRL was using SRA opcode.
    
    The mips opcode macro for the SRL opcode was using the wrong constant
    value:
    
    SRA -- Shift right arithmetic
    Encoding: 0000 00-- ---t tttt dddd dhhh hh00 0011
    
    SRL -- Shift right logical
    Encoding: 0000 00-- ---t tttt dddd dhhh hh00 0010
    
    This corrects the opcode constant for SRL and adds the SRA opcode for
    completeness.
    
    There is only one user of MIPS32_OP_SRL in src/flash/nor/cfi.c:
    Since the mask constant (0x00000080 for the DQ7 mask) shifted in this
    case would never have the sign bit set, it worked fine even though it
    was accidentally using the SRA opcode instead of SRL.
    
    Change-Id: I0a80746e2075c7df1ce35b9db00d9d0b997a3feb
    Signed-off-by: Tobias Diedrich <ran...@td...>
    Reviewed-on: https://review.openocd.org/c/openocd/+/3613
    Tested-by: jenkins
    Reviewed-by: Antonio Borneo <bor...@gm...>
    Reviewed-by: Oleksij Rempel <li...@re...>

diff --git a/src/target/mips32.h b/src/target/mips32.h
index d072eb99a..fc896248b 100644
--- a/src/target/mips32.h
+++ b/src/target/mips32.h
@@ -380,7 +380,8 @@ struct mips32_algorithm {
 #define MIPS32_OP_XORI	0x0Eu
 #define MIPS32_OP_XOR	0x26u
 #define MIPS32_OP_SLTU	0x2Bu
-#define MIPS32_OP_SRL	0x03u
+#define MIPS32_OP_SRL	0x02u
+#define MIPS32_OP_SRA	0x03u
 #define MIPS32_OP_SYNCI	0x1Fu
 #define MIPS32_OP_SLL	0x00u
 #define MIPS32_OP_SLTI	0x0Au
@@ -439,7 +440,8 @@ struct mips32_algorithm {
 #define MIPS32_ISA_SLL(dst, src, sa)		MIPS32_R_INST(MIPS32_OP_SPECIAL, 0, src, dst, sa, MIPS32_OP_SLL)
 #define MIPS32_ISA_SLTI(tar, src, val)		MIPS32_I_INST(MIPS32_OP_SLTI, src, tar, val)
 #define MIPS32_ISA_SLTU(dst, src, tar)		MIPS32_R_INST(MIPS32_OP_SPECIAL, src, tar, dst, 0, MIPS32_OP_SLTU)
-#define MIPS32_ISA_SRL(reg, src, off)		MIPS32_R_INST(0, 0, src, reg, off, MIPS32_OP_SRL)
+#define MIPS32_ISA_SRA(reg, src, off)		MIPS32_R_INST(MIPS32_OP_SPECIAL, 0, src, reg, off, MIPS32_OP_SRA)
+#define MIPS32_ISA_SRL(reg, src, off)		MIPS32_R_INST(MIPS32_OP_SPECIAL, 0, src, reg, off, MIPS32_OP_SRL)
 #define MIPS32_ISA_SYNC				0xFu
 #define MIPS32_ISA_SYNCI(off, base)		MIPS32_I_INST(MIPS32_OP_REGIMM, base, MIPS32_OP_SYNCI, off)
 

-----------------------------------------------------------------------

Summary of changes:
 src/target/mips32.h | 6 ++++--
 1 file changed, 4 insertions(+), 2 deletions(-)


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[OpenOCD-commit] Main OpenOCD repository branch, master, updated. v0.12.0-404-gf55b122b4

From: openocd-gerrit <ope...@us...> - 2023-11-18 11:29:39

This is an automated email from the git hooks/post-receive script. It was
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The branch, master has been updated
       via  f55b122b42c212fcb3219e372a7361d6573bd6a3 (commit)
      from  1c9f4ac181f6d5716f392a9e2d9167e797c390c7 (commit)

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- Log -----------------------------------------------------------------
commit f55b122b42c212fcb3219e372a7361d6573bd6a3
Author: Marc Schink <de...@za...>
Date:   Tue Nov 7 17:14:09 2023 +0100

    jtag/drivers/kitprog: Restructure commands
    
    Use a command group 'kitprog' with subcommands instead of individual
    commands with 'kitprog_' prefix.
    
    The old command is still available to ensure backwards compatibility,
    but is marked as deprecated.
    
    Change-Id: I7f0d447939819ffc488a3d7a8de672b58887127f
    Signed-off-by: Marc Schink <de...@za...>
    Reviewed-on: https://review.openocd.org/c/openocd/+/7967
    Reviewed-by: Bohdan Tymkiv <boh...@gm...>
    Tested-by: jenkins
    Reviewed-by: Antonio Borneo <bor...@gm...>

diff --git a/doc/openocd.texi b/doc/openocd.texi
index 40b3c5d1d..5d73fd174 100644
--- a/doc/openocd.texi
+++ b/doc/openocd.texi
@@ -2991,7 +2991,7 @@ This driver is for Cypress Semiconductor's KitProg adapters. The KitProg is an
 SWD-only adapter that is designed to be used with Cypress's PSoC and PRoC device
 families, but it is possible to use it with some other devices. If you are using
 this adapter with a PSoC or a PRoC, you may need to add
-@command{kitprog_init_acquire_psoc} or @command{kitprog acquire_psoc} to your
+@command{kitprog init_acquire_psoc} or @command{kitprog acquire_psoc} to your
 configuration script.
 
 Note that this driver is for the proprietary KitProg protocol, not the CMSIS-DAP
@@ -3012,14 +3012,14 @@ versions only implement "SWD line reset". Second, due to a firmware quirk, an
 SWD sequence must be sent after every target reset in order to re-establish
 communications with the target.
 @item Due in part to the limitation above, KitProg devices with firmware below
-version 2.14 will need to use @command{kitprog_init_acquire_psoc} in order to
+version 2.14 will need to use @command{kitprog init_acquire_psoc} in order to
 communicate with PSoC 5LP devices. This is because, assuming debug is not
 disabled on the PSoC, the PSoC 5LP needs its JTAG interface switched to SWD
 mode before communication can begin, but prior to firmware 2.14, "JTAG to SWD"
 could only be sent with an acquisition sequence.
 @end itemize
 
-@deffn {Config Command} {kitprog_init_acquire_psoc}
+@deffn {Config Command} {kitprog init_acquire_psoc}
 Indicate that a PSoC acquisition sequence needs to be run during adapter init.
 Please be aware that the acquisition sequence hard-resets the target.
 @end deffn
diff --git a/src/jtag/drivers/kitprog.c b/src/jtag/drivers/kitprog.c
index e126a9c22..c0d2adc10 100644
--- a/src/jtag/drivers/kitprog.c
+++ b/src/jtag/drivers/kitprog.c
@@ -879,6 +879,13 @@ static const struct command_registration kitprog_subcommand_handlers[] = {
 		.usage = "",
 		.help = "try to acquire a PSoC",
 	},
+	{
+		.name = "init_acquire_psoc",
+		.handler = &kitprog_handle_init_acquire_psoc_command,
+		.mode = COMMAND_CONFIG,
+		.help = "try to acquire a PSoC during init",
+		.usage = "",
+	},
 	COMMAND_REGISTRATION_DONE
 };
 
@@ -890,13 +897,6 @@ static const struct command_registration kitprog_command_handlers[] = {
 		.usage = "<cmd>",
 		.chain = kitprog_subcommand_handlers,
 	},
-	{
-		.name = "kitprog_init_acquire_psoc",
-		.handler = &kitprog_handle_init_acquire_psoc_command,
-		.mode = COMMAND_CONFIG,
-		.help = "try to acquire a PSoC during init",
-		.usage = "",
-	},
 	COMMAND_REGISTRATION_DONE
 };
 
diff --git a/src/jtag/startup.tcl b/src/jtag/startup.tcl
index 597a49e95..4eca67771 100644
--- a/src/jtag/startup.tcl
+++ b/src/jtag/startup.tcl
@@ -1126,6 +1126,12 @@ proc "cmsis_dap_usb" {args} {
 	eval cmsis-dap usb $args
 }
 
+lappend _telnet_autocomplete_skip "kitprog_init_acquire_psoc"
+proc "kitprog_init_acquire_psoc" {} {
+	echo "DEPRECATED! use 'kitprog init_acquire_psoc', not 'kitprog_init_acquire_psoc'"
+	eval kitprog init_acquire_psoc
+}
+
 lappend _telnet_autocomplete_skip "pld device"
 proc "pld device" {driver tap_name {opt 0}} {
 	echo "DEPRECATED! use 'pld create ...', not 'pld device ...'"

-----------------------------------------------------------------------

Summary of changes:
 doc/openocd.texi           |  6 +++---
 src/jtag/drivers/kitprog.c | 14 +++++++-------
 src/jtag/startup.tcl       |  6 ++++++
 3 files changed, 16 insertions(+), 10 deletions(-)


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[OpenOCD-commit] Main OpenOCD repository branch, master, updated. v0.12.0-403-g1c9f4ac18

From: openocd-gerrit <ope...@us...> - 2023-11-18 11:27:54

This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".

The branch, master has been updated
       via  1c9f4ac181f6d5716f392a9e2d9167e797c390c7 (commit)
      from  ba79d503bb4f1e92e91a4c300a036819fe91c6d3 (commit)

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- Log -----------------------------------------------------------------
commit 1c9f4ac181f6d5716f392a9e2d9167e797c390c7
Author: Tomas Vanek <va...@fb...>
Date:   Tue Nov 7 13:23:14 2023 +0100

    drivers/cmsis_dap: drop unused variable
    
    The variable 'mode' was introduced in
    commit 4dc8cd201c66 ("cmsis-dap: add initial cmsis-dap support")
    but never has been used (just cleared)
    
    Change-Id: Ia741d181ee8006bd0d872f3358a57e045235741a
    Signed-off-by: Tomas Vanek <va...@fb...>
    Reviewed-on: https://review.openocd.org/c/openocd/+/7965
    Reviewed-by: zapb <de...@za...>
    Reviewed-by: Antonio Borneo <bor...@gm...>
    Tested-by: jenkins

diff --git a/src/jtag/drivers/cmsis_dap.h b/src/jtag/drivers/cmsis_dap.h
index 16885a51d..a8554de80 100644
--- a/src/jtag/drivers/cmsis_dap.h
+++ b/src/jtag/drivers/cmsis_dap.h
@@ -52,7 +52,7 @@ struct cmsis_dap {
 	unsigned int pending_fifo_block_count;
 
 	uint16_t caps;
-	uint8_t mode;
+
 	uint32_t swo_buf_sz;
 	bool trace_enabled;
 };

-----------------------------------------------------------------------

Summary of changes:
 src/jtag/drivers/cmsis_dap.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)


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From: openocd-gerrit <ope...@us...> - 2023-11-18 11:27:12

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commit ba79d503bb4f1e92e91a4c300a036819fe91c6d3
Author: Marc Schink <de...@za...>
Date:   Mon Nov 6 16:22:53 2023 +0100

    jtag/drivers/cmsis-dap: Return error in 'backend' command
    
    Change-Id: Ib9bf7ab50cbe193e9e726efb3cb58e53723a6dd1
    Signed-off-by: Marc Schink <de...@za...>
    Reviewed-on: https://review.openocd.org/c/openocd/+/7964
    Reviewed-by: Tomas Vanek <va...@fb...>
    Tested-by: jenkins
    Reviewed-by: Antonio Borneo <bor...@gm...>

diff --git a/src/jtag/drivers/cmsis_dap.c b/src/jtag/drivers/cmsis_dap.c
index 52e4fadeb..03832431d 100644
--- a/src/jtag/drivers/cmsis_dap.c
+++ b/src/jtag/drivers/cmsis_dap.c
@@ -2148,10 +2148,11 @@ COMMAND_HANDLER(cmsis_dap_handle_backend_command)
 				}
 			}
 
-			LOG_ERROR("invalid backend argument to cmsis-dap backend <backend>");
+			command_print(CMD, "invalid backend argument to cmsis-dap backend <backend>");
+			return ERROR_COMMAND_ARGUMENT_INVALID;
 		}
 	} else {
-		LOG_ERROR("expected exactly one argument to cmsis-dap backend <backend>");
+		return ERROR_COMMAND_SYNTAX_ERROR;
 	}
 
 	return ERROR_OK;

-----------------------------------------------------------------------

Summary of changes:
 src/jtag/drivers/cmsis_dap.c | 5 +++--
 1 file changed, 3 insertions(+), 2 deletions(-)


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From: openocd-gerrit <ope...@us...> - 2023-11-18 11:26:34

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commit b25e5322eea66eb76232da06fa435d2f11097c86
Author: Marc Schink <de...@za...>
Date:   Mon Nov 6 15:50:40 2023 +0100

    jtag/drivers/cmsis-dap: Restructure commands
    
    Use a command group 'cmsis-dap' with subcommands instead of individual
    commands with 'cmsis_dap_' prefix.
    
    The old commands are still available to ensure backwards compatibility,
    but are marked as deprecated.
    
    Change-Id: I75facb7572a86354c2ce6144aa7fadf3b5a6db4e
    Signed-off-by: Marc Schink <de...@za...>
    Reviewed-on: https://review.openocd.org/c/openocd/+/7963
    Reviewed-by: Tomas Vanek <va...@fb...>
    Tested-by: jenkins
    Reviewed-by: Bohdan Tymkiv <boh...@gm...>
    Reviewed-by: Antonio Borneo <bor...@gm...>

diff --git a/doc/openocd.texi b/doc/openocd.texi
index b03da4f83..40b3c5d1d 100644
--- a/doc/openocd.texi
+++ b/doc/openocd.texi
@@ -2543,27 +2543,27 @@ and a specific set of GPIOs is used.
 ARM CMSIS-DAP compliant based adapter v1 (USB HID based)
 or v2 (USB bulk).
 
-@deffn {Config Command} {cmsis_dap_vid_pid} [vid pid]+
+@deffn {Config Command} {cmsis-dap vid_pid} [vid pid]+
 The vendor ID and product ID of the CMSIS-DAP device. If not specified
 the driver will attempt to auto detect the CMSIS-DAP device.
 Currently, up to eight [@var{vid}, @var{pid}] pairs may be given, e.g.
 @example
-cmsis_dap_vid_pid 0xc251 0xf001 0x0d28 0x0204
+cmsis-dap vid_pid 0xc251 0xf001 0x0d28 0x0204
 @end example
 @end deffn
 
-@deffn {Config Command} {cmsis_dap_backend} [@option{auto}|@option{usb_bulk}|@option{hid}]
+@deffn {Config Command} {cmsis-dap backend} [@option{auto}|@option{usb_bulk}|@option{hid}]
 Specifies how to communicate with the adapter:
 
 @itemize @minus
 @item @option{hid} Use HID generic reports - CMSIS-DAP v1
 @item @option{usb_bulk} Use USB bulk - CMSIS-DAP v2
 @item @option{auto} First try USB bulk CMSIS-DAP v2, if not found try HID CMSIS-DAP v1.
-This is the default if @command{cmsis_dap_backend} is not specified.
+This is the default if @command{cmsis-dap backend} is not specified.
 @end itemize
 @end deffn
 
-@deffn {Config Command} {cmsis_dap_usb interface} [number]
+@deffn {Config Command} {cmsis-dap usb interface} [number]
 Specifies the @var{number} of the USB interface to use in v2 mode (USB bulk).
 In most cases need not to be specified and interfaces are searched by
 interface string or for user class interface.
diff --git a/src/jtag/drivers/cmsis_dap.c b/src/jtag/drivers/cmsis_dap.c
index 1e7a851e4..52e4fadeb 100644
--- a/src/jtag/drivers/cmsis_dap.c
+++ b/src/jtag/drivers/cmsis_dap.c
@@ -2108,12 +2108,12 @@ COMMAND_HANDLER(cmsis_dap_handle_cmd_command)
 COMMAND_HANDLER(cmsis_dap_handle_vid_pid_command)
 {
 	if (CMD_ARGC > MAX_USB_IDS * 2) {
-		LOG_WARNING("ignoring extra IDs in cmsis_dap_vid_pid "
+		LOG_WARNING("ignoring extra IDs in cmsis-dap vid_pid "
 			"(maximum is %d pairs)", MAX_USB_IDS);
 		CMD_ARGC = MAX_USB_IDS * 2;
 	}
 	if (CMD_ARGC < 2 || (CMD_ARGC & 1)) {
-		LOG_WARNING("incomplete cmsis_dap_vid_pid configuration directive");
+		LOG_WARNING("incomplete cmsis-dap vid_pid configuration directive");
 		if (CMD_ARGC < 2)
 			return ERROR_COMMAND_SYNTAX_ERROR;
 		/* remove the incomplete trailing id */
@@ -2148,10 +2148,10 @@ COMMAND_HANDLER(cmsis_dap_handle_backend_command)
 				}
 			}
 
-			LOG_ERROR("invalid backend argument to cmsis_dap_backend <backend>");
+			LOG_ERROR("invalid backend argument to cmsis-dap backend <backend>");
 		}
 	} else {
-		LOG_ERROR("expected exactly one argument to cmsis_dap_backend <backend>");
+		LOG_ERROR("expected exactly one argument to cmsis-dap backend <backend>");
 	}
 
 	return ERROR_OK;
@@ -2172,27 +2172,15 @@ static const struct command_registration cmsis_dap_subcommand_handlers[] = {
 		.usage = "",
 		.help = "issue cmsis-dap command",
 	},
-	COMMAND_REGISTRATION_DONE
-};
-
-
-static const struct command_registration cmsis_dap_command_handlers[] = {
-	{
-		.name = "cmsis-dap",
-		.mode = COMMAND_ANY,
-		.help = "perform CMSIS-DAP management",
-		.usage = "<cmd>",
-		.chain = cmsis_dap_subcommand_handlers,
-	},
 	{
-		.name = "cmsis_dap_vid_pid",
+		.name = "vid_pid",
 		.handler = &cmsis_dap_handle_vid_pid_command,
 		.mode = COMMAND_CONFIG,
 		.help = "the vendor ID and product ID of the CMSIS-DAP device",
 		.usage = "(vid pid)*",
 	},
 	{
-		.name = "cmsis_dap_backend",
+		.name = "backend",
 		.handler = &cmsis_dap_handle_backend_command,
 		.mode = COMMAND_CONFIG,
 		.help = "set the communication backend to use (USB bulk or HID).",
@@ -2200,7 +2188,7 @@ static const struct command_registration cmsis_dap_command_handlers[] = {
 	},
 #if BUILD_CMSIS_DAP_USB
 	{
-		.name = "cmsis_dap_usb",
+		.name = "usb",
 		.chain = cmsis_dap_usb_subcommand_handlers,
 		.mode = COMMAND_ANY,
 		.help = "USB bulk backend-specific commands",
@@ -2210,6 +2198,18 @@ static const struct command_registration cmsis_dap_command_handlers[] = {
 	COMMAND_REGISTRATION_DONE
 };
 
+
+static const struct command_registration cmsis_dap_command_handlers[] = {
+	{
+		.name = "cmsis-dap",
+		.mode = COMMAND_ANY,
+		.help = "perform CMSIS-DAP management",
+		.usage = "<cmd>",
+		.chain = cmsis_dap_subcommand_handlers,
+	},
+	COMMAND_REGISTRATION_DONE
+};
+
 static const struct swd_driver cmsis_dap_swd_driver = {
 	.init = cmsis_dap_swd_init,
 	.switch_seq = cmsis_dap_swd_switch_seq,
diff --git a/src/jtag/startup.tcl b/src/jtag/startup.tcl
index 085c89ba1..597a49e95 100644
--- a/src/jtag/startup.tcl
+++ b/src/jtag/startup.tcl
@@ -1108,6 +1108,24 @@ proc "am335xgpio led_on_state" {state} {
 	}
 }
 
+lappend _telnet_autocomplete_skip "cmsis_dap_backend"
+proc "cmsis_dap_backend" {backend} {
+	echo "DEPRECATED! use 'cmsis-dap backend', not 'cmsis_dap_backend'"
+	eval cmsis-dap backend $backend
+}
+
+lappend _telnet_autocomplete_skip "cmsis_dap_vid_pid"
+proc "cmsis_dap_vid_pid" {args} {
+	echo "DEPRECATED! use 'cmsis-dap vid_pid', not 'cmsis_dap_vid_pid'"
+	eval cmsis-dap vid_pid $args
+}
+
+lappend _telnet_autocomplete_skip "cmsis_dap_usb"
+proc "cmsis_dap_usb" {args} {
+	echo "DEPRECATED! use 'cmsis-dap usb', not 'cmsis_dap_usb'"
+	eval cmsis-dap usb $args
+}
+
 lappend _telnet_autocomplete_skip "pld device"
 proc "pld device" {driver tap_name {opt 0}} {
 	echo "DEPRECATED! use 'pld create ...', not 'pld device ...'"

-----------------------------------------------------------------------

Summary of changes:
 doc/openocd.texi             | 10 +++++-----
 src/jtag/drivers/cmsis_dap.c | 38 +++++++++++++++++++-------------------
 src/jtag/startup.tcl         | 18 ++++++++++++++++++
 3 files changed, 42 insertions(+), 24 deletions(-)


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From: openocd-gerrit <ope...@us...> - 2023-11-18 11:25:09

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- Log -----------------------------------------------------------------
commit bb2767721945fa3496f777aa95eaab0137795137
Author: Ahmed BOUDJELIDA <abo...@na...>
Date:   Mon Oct 16 11:05:59 2023 +0200

    contrib/firmware: add 'send not acknowledged' function to the i2c bit-banging implementation
    
    Change-Id: I60597ebc126da4acb00654513b96f52261253e12
    Signed-off-by: Ahmed BOUDJELIDA <abo...@na...>
    Reviewed-on: https://review.openocd.org/c/openocd/+/7811
    Tested-by: jenkins
    Reviewed-by: Antonio Borneo <bor...@gm...>

diff --git a/contrib/firmware/angie/c/include/i2c.h b/contrib/firmware/angie/c/include/i2c.h
index 06185efb4..d0404923b 100644
--- a/contrib/firmware/angie/c/include/i2c.h
+++ b/contrib/firmware/angie/c/include/i2c.h
@@ -19,6 +19,7 @@ void repeated_start(void);
 void stop_cd(void);
 void clock_cd(void);
 void send_ack(void);
+void send_nack(void);
 bool get_ack(void);
 
 uint8_t get_address(uint8_t adr, uint8_t rdwr);
diff --git a/contrib/firmware/angie/c/src/i2c.c b/contrib/firmware/angie/c/src/i2c.c
index a7004bfac..53840100b 100644
--- a/contrib/firmware/angie/c/src/i2c.c
+++ b/contrib/firmware/angie/c/src/i2c.c
@@ -60,6 +60,16 @@ void send_ack(void)
 	delay_us(1);
 }
 
+void send_nack(void)
+{
+	PIN_SDA = 1;
+	delay_us(1);
+	PIN_SCL = 1;
+	delay_us(1);
+	PIN_SCL = 0;
+	delay_us(1);
+}
+
 bool get_ack(void)
 {
 	PIN_SDA_DIR = 1;
diff --git a/contrib/firmware/angie/c/src/usb.c b/contrib/firmware/angie/c/src/usb.c
index 0a43ff9f6..1b7aa4765 100644
--- a/contrib/firmware/angie/c/src/usb.c
+++ b/contrib/firmware/angie/c/src/usb.c
@@ -798,6 +798,9 @@ void i2c_recieve(void)
 
 		EP8FIFOBUF[count - 1] = receive_byte();
 
+		/*  send Nack:  */
+		send_nack();
+
 		/*   stop   */
 		stop_cd();
 

-----------------------------------------------------------------------

Summary of changes:
 contrib/firmware/angie/c/include/i2c.h |  1 +
 contrib/firmware/angie/c/src/i2c.c     | 10 ++++++++++
 contrib/firmware/angie/c/src/usb.c     |  3 +++
 3 files changed, 14 insertions(+)


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From: openocd-gerrit <ope...@us...> - 2023-11-18 11:24:32

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- Log -----------------------------------------------------------------
commit a69a4e23f4630fb21daea6f8264881c0546e340b
Author: Ahmed BOUDJELIDA <abo...@na...>
Date:   Mon Oct 16 11:04:16 2023 +0200

    contrib/firmware: extend the number of bytes to be sent in the i2c bit-banging read operation
    
    Change-Id: Iaeb3d5ba37da1bd77d36ad0ebbc6b45c46860dec
    Signed-off-by: Ahmed BOUDJELIDA <abo...@na...>
    Reviewed-on: https://review.openocd.org/c/openocd/+/7810
    Tested-by: jenkins
    Reviewed-by: Antonio Borneo <bor...@gm...>

diff --git a/contrib/firmware/angie/c/src/usb.c b/contrib/firmware/angie/c/src/usb.c
index e284efdf5..0a43ff9f6 100644
--- a/contrib/firmware/angie/c/src/usb.c
+++ b/contrib/firmware/angie/c/src/usb.c
@@ -757,14 +757,13 @@ void i2c_recieve(void)
 	PIN_SDA_DIR = 0;
 	if (EP6FIFOBUF[0] == 1) {
 		uint8_t rdwr = EP6FIFOBUF[0];   //read
-		uint8_t reg_adr_check = EP6FIFOBUF[1];
-		uint8_t count = EP6FIFOBUF[2];  //request data count
+		uint8_t data_count = EP6FIFOBUF[1]; //data sent count
+		uint8_t count = EP6FIFOBUF[2];  //requested data count
 		uint8_t adr = EP6FIFOBUF[3];    //address
-		uint8_t reg_adr = EP6FIFOBUF[4];
 		uint8_t address = get_address(adr, rdwr);   //address byte (read command)
 		uint8_t address_2 = get_address(adr, 0);   //address byte 2 (write command)
 
-		printf("%d\n", address);
+		printf("%d\n", address - 1);
 
 		/*  start:   */
 		start_cd();
@@ -774,10 +773,12 @@ void i2c_recieve(void)
 		uint8_t ack = get_ack();
 
 		/*   send data   */
-		if (reg_adr_check) { //if there is a byte reg
-			send_byte(reg_adr);
-			/*  ack():  */
-			ack = get_ack();
+		if (data_count) { //if there is a byte reg
+			for (uint8_t i = 0; i < data_count; i++) {
+				send_byte(EP6FIFOBUF[i + 4]);
+				/*  ack():  */
+				ack = get_ack();
+			}
 		}
 
 		/*  repeated start:  */
@@ -788,13 +789,15 @@ void i2c_recieve(void)
 		ack = get_ack();
 
 		/*   receive data   */
-		for (uint8_t i = 0; i < count; i++) {
+		for (uint8_t i = 0; i < count - 1; i++) {
 			EP8FIFOBUF[i] = receive_byte();
 
-			/*  send ack:  */
+			/*  send ack: */
 			send_ack();
 		}
 
+		EP8FIFOBUF[count - 1] = receive_byte();
+
 		/*   stop   */
 		stop_cd();
 

-----------------------------------------------------------------------

Summary of changes:
 contrib/firmware/angie/c/src/usb.c | 23 +++++++++++++----------
 1 file changed, 13 insertions(+), 10 deletions(-)


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From: openocd-gerrit <ope...@us...> - 2023-11-18 11:24:06

This is an automated email from the git hooks/post-receive script. It was
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The branch, master has been updated
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      from  393da819b14c62d267cf5ec86bc511c187e1af18 (commit)

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- Log -----------------------------------------------------------------
commit 8bf7f603ae8c441c7734c9dcdc5ee2805a620fb4
Author: Ahmed BOUDJELIDA <abo...@na...>
Date:   Mon Oct 16 11:00:28 2023 +0200

    contrib/firmware: remove unnecessary delay commands in the i2c bit-banging implementation
    
    Change-Id: I741244be7a1bf186cfcb66a5b93e2a1a2ab0fde5
    Signed-off-by: Ahmed BOUDJELIDA <abo...@na...>
    Reviewed-on: https://review.openocd.org/c/openocd/+/7809
    Tested-by: jenkins
    Reviewed-by: Antonio Borneo <bor...@gm...>

diff --git a/contrib/firmware/angie/c/src/usb.c b/contrib/firmware/angie/c/src/usb.c
index 747fef124..e284efdf5 100644
--- a/contrib/firmware/angie/c/src/usb.c
+++ b/contrib/firmware/angie/c/src/usb.c
@@ -773,8 +773,6 @@ void i2c_recieve(void)
 		/*  ack:  */
 		uint8_t ack = get_ack();
 
-		delay_us(10);
-
 		/*   send data   */
 		if (reg_adr_check) { //if there is a byte reg
 			send_byte(reg_adr);
@@ -782,8 +780,6 @@ void i2c_recieve(void)
 			ack = get_ack();
 		}
 
-		delay_us(10);
-
 		/*  repeated start:  */
 		repeated_start();
 		/*  address:   */
@@ -791,8 +787,6 @@ void i2c_recieve(void)
 		/*  get ack:  */
 		ack = get_ack();
 
-		delay_us(10);
-
 		/*   receive data   */
 		for (uint8_t i = 0; i < count; i++) {
 			EP8FIFOBUF[i] = receive_byte();
@@ -801,13 +795,9 @@ void i2c_recieve(void)
 			send_ack();
 		}
 
-		delay_ms(1);
-
 		/*   stop   */
 		stop_cd();
 
-		delay_us(10);
-
 		EP8BCH = 0; //EP8
 		syncdelay(3);
 		EP8BCL = count; //EP8

-----------------------------------------------------------------------

Summary of changes:
 contrib/firmware/angie/c/src/usb.c | 10 ----------
 1 file changed, 10 deletions(-)


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From: openocd-gerrit <ope...@us...> - 2023-11-18 11:22:13

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- Log -----------------------------------------------------------------
commit 393da819b14c62d267cf5ec86bc511c187e1af18
Author: Peter Collingbourne <pc...@go...>
Date:   Tue Oct 17 19:04:00 2023 -0700

    aarch64: Use 64-bit reads/writes to access SCTLR_EL1
    
    We were previously inadvertently clearing the top 32 bits of SCTLR_EL1
    during read_memory/write_memory as a result of using 32-bit operations
    to access the register and because the fields used to temporarily
    store the register were 32-bit. Fix it.
    
    Change-Id: I657d7f949e1f7ab6bf90609e3f91cae09cade31a
    Signed-off-by: Peter Collingbourne <pc...@go...>
    Reviewed-on: https://review.openocd.org/c/openocd/+/7939
    Tested-by: jenkins
    Reviewed-by: Antonio Borneo <bor...@gm...>

diff --git a/src/target/aarch64.c b/src/target/aarch64.c
index db602435c..1c056a015 100644
--- a/src/target/aarch64.c
+++ b/src/target/aarch64.c
@@ -105,7 +105,7 @@ static int aarch64_restore_system_control_reg(struct target *target)
 		if (target_mode != ARM_MODE_ANY)
 			armv8_dpm_modeswitch(&armv8->dpm, target_mode);
 
-		retval = armv8->dpm.instr_write_data_r0(&armv8->dpm, instr, aarch64->system_control_reg);
+		retval = armv8->dpm.instr_write_data_r0_64(&armv8->dpm, instr, aarch64->system_control_reg);
 		if (retval != ERROR_OK)
 			return retval;
 
@@ -182,7 +182,7 @@ static int aarch64_mmu_modify(struct target *target, int enable)
 	if (target_mode != ARM_MODE_ANY)
 		armv8_dpm_modeswitch(&armv8->dpm, target_mode);
 
-	retval = armv8->dpm.instr_write_data_r0(&armv8->dpm, instr,
+	retval = armv8->dpm.instr_write_data_r0_64(&armv8->dpm, instr,
 				aarch64->system_control_reg_curr);
 
 	if (target_mode != ARM_MODE_ANY)
@@ -1055,14 +1055,14 @@ static int aarch64_post_debug_entry(struct target *target)
 	if (target_mode != ARM_MODE_ANY)
 		armv8_dpm_modeswitch(&armv8->dpm, target_mode);
 
-	retval = armv8->dpm.instr_read_data_r0(&armv8->dpm, instr, &aarch64->system_control_reg);
+	retval = armv8->dpm.instr_read_data_r0_64(&armv8->dpm, instr, &aarch64->system_control_reg);
 	if (retval != ERROR_OK)
 		return retval;
 
 	if (target_mode != ARM_MODE_ANY)
 		armv8_dpm_modeswitch(&armv8->dpm, ARM_MODE_ANY);
 
-	LOG_DEBUG("System_register: %8.8" PRIx32, aarch64->system_control_reg);
+	LOG_DEBUG("System_register: %8.8" PRIx64, aarch64->system_control_reg);
 	aarch64->system_control_reg_curr = aarch64->system_control_reg;
 
 	if (armv8->armv8_mmu.armv8_cache.info == -1) {
diff --git a/src/target/aarch64.h b/src/target/aarch64.h
index 2721fe747..b265e8249 100644
--- a/src/target/aarch64.h
+++ b/src/target/aarch64.h
@@ -43,8 +43,8 @@ struct aarch64_common {
 	struct armv8_common armv8_common;
 
 	/* Context information */
-	uint32_t system_control_reg;
-	uint32_t system_control_reg_curr;
+	uint64_t system_control_reg;
+	uint64_t system_control_reg_curr;
 
 	/* Breakpoint register pairs */
 	int brp_num_context;

-----------------------------------------------------------------------

Summary of changes:
 src/target/aarch64.c | 8 ++++----
 src/target/aarch64.h | 4 ++--
 2 files changed, 6 insertions(+), 6 deletions(-)


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From: openocd-gerrit <ope...@us...> - 2023-11-18 11:21:43

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- Log -----------------------------------------------------------------
commit ee96a95d44322aa109847e35b86aed5ad3066cf8
Author: Peter Collingbourne <pc...@go...>
Date:   Wed Sep 27 17:02:03 2023 -0700

    openocd: src/target: Correctly handle CCSIDR_EL1.Associativity=0
    
    Associativity=0 means that only one CMO is needed for all ways.
    It could also mean that the cache is 1-way, but this is less likely.
    
    Currently Associativity=0 causes us to hang in the while loop in
    decode_cache_reg. Fix it by skipping the loop in this case. We can let
    way_shift be set to the arbitrary value of 0 because in the case where
    Associativity=0 we only ever shift 0 by it before ORing it into the
    CMO operand.
    
    Change-Id: I7c1de68d33f6b3ed627cbb1e2401d43185e4c1e3
    Signed-off-by: Peter Collingbourne <pc...@go...>
    Reviewed-on: https://review.openocd.org/c/openocd/+/7916
    Tested-by: jenkins
    Reviewed-by: Antonio Borneo <bor...@gm...>

diff --git a/src/target/armv8_cache.c b/src/target/armv8_cache.c
index cf7111950..98f4b3f04 100644
--- a/src/target/armv8_cache.c
+++ b/src/target/armv8_cache.c
@@ -286,8 +286,9 @@ static struct armv8_cachesize decode_cache_reg(uint32_t cache_reg)
 	size.index = (cache_reg >> 13) & 0x7fff;
 	size.way = ((cache_reg >> 3) & 0x3ff);
 
-	while (((size.way << i) & 0x80000000) == 0)
-		i++;
+	if (size.way != 0)
+		while (((size.way << i) & 0x80000000) == 0)
+			i++;
 	size.way_shift = i;
 
 	return size;

-----------------------------------------------------------------------

Summary of changes:
 src/target/armv8_cache.c | 5 +++--
 1 file changed, 3 insertions(+), 2 deletions(-)


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- Log -----------------------------------------------------------------
commit 851d1ad87a6e9f1ae1b44b8ac395138031290488
Author: Marek Vrbka <mar...@co...>
Date:   Fri Sep 29 13:14:10 2023 +0200

    breakpoints: Add target logging to breakpoints and watchpoints
    
    This patch adds target logging to breakpoint
    handling code. This makes it easier to
    debug multicore/multithread systems.
    
    Change-Id: I6bea8079a457070a8f63d0ce381a4ece6f5a190a
    Signed-off-by: Marek Vrbka <mar...@co...>
    Reviewed-on: https://review.openocd.org/c/openocd/+/7922
    Tested-by: jenkins
    Reviewed-by: Antonio Borneo <bor...@gm...>
    Reviewed-by: Tomas Vanek <va...@fb...>

diff --git a/src/target/breakpoints.c b/src/target/breakpoints.c
index d4662c4de..c39a98057 100644
--- a/src/target/breakpoints.c
+++ b/src/target/breakpoints.c
@@ -52,7 +52,7 @@ static int breakpoint_add_internal(struct target *target,
 			 * breakpoint" ... check all the parameters before
 			 * succeeding.
 			 */
-			LOG_ERROR("Duplicate Breakpoint address: " TARGET_ADDR_FMT " (BP %" PRIu32 ")",
+			LOG_TARGET_ERROR(target, "Duplicate Breakpoint address: " TARGET_ADDR_FMT " (BP %" PRIu32 ")",
 				address, breakpoint->unique_id);
 			return ERROR_TARGET_DUPLICATE_BREAKPOINT;
 		}
@@ -83,16 +83,15 @@ static int breakpoint_add_internal(struct target *target,
 		default:
 			reason = "unknown reason";
 fail:
-			LOG_ERROR("can't add breakpoint: %s", reason);
+			LOG_TARGET_ERROR(target, "can't add breakpoint: %s", reason);
 			free((*breakpoint_p)->orig_instr);
 			free(*breakpoint_p);
 			*breakpoint_p = NULL;
 			return retval;
 	}
 
-	LOG_DEBUG("[%d] added %s breakpoint at " TARGET_ADDR_FMT
+	LOG_TARGET_DEBUG(target, "added %s breakpoint at " TARGET_ADDR_FMT
 			" of length 0x%8.8x, (BPID: %" PRIu32 ")",
-		target->coreid,
 		breakpoint_type_strings[(*breakpoint_p)->type],
 		(*breakpoint_p)->address, (*breakpoint_p)->length,
 		(*breakpoint_p)->unique_id);
@@ -134,14 +133,14 @@ static int context_breakpoint_add_internal(struct target *target,
 	(*breakpoint_p)->unique_id = bpwp_unique_id++;
 	retval = target_add_context_breakpoint(target, *breakpoint_p);
 	if (retval != ERROR_OK) {
-		LOG_ERROR("could not add breakpoint");
+		LOG_TARGET_ERROR(target, "could not add breakpoint");
 		free((*breakpoint_p)->orig_instr);
 		free(*breakpoint_p);
 		*breakpoint_p = NULL;
 		return retval;
 	}
 
-	LOG_DEBUG("added %s Context breakpoint at 0x%8.8" PRIx32 " of length 0x%8.8x, (BPID: %" PRIu32 ")",
+	LOG_TARGET_DEBUG(target, "added %s Context breakpoint at 0x%8.8" PRIx32 " of length 0x%8.8x, (BPID: %" PRIu32 ")",
 		breakpoint_type_strings[(*breakpoint_p)->type],
 		(*breakpoint_p)->asid, (*breakpoint_p)->length,
 		(*breakpoint_p)->unique_id);
@@ -165,11 +164,11 @@ static int hybrid_breakpoint_add_internal(struct target *target,
 			 * breakpoint" ... check all the parameters before
 			 * succeeding.
 			 */
-			LOG_ERROR("Duplicate Hybrid Breakpoint asid: 0x%08" PRIx32 " (BP %" PRIu32 ")",
+			LOG_TARGET_ERROR(target, "Duplicate Hybrid Breakpoint asid: 0x%08" PRIx32 " (BP %" PRIu32 ")",
 				asid, breakpoint->unique_id);
 			return ERROR_TARGET_DUPLICATE_BREAKPOINT;
 		} else if ((breakpoint->address == address) && (breakpoint->asid == 0)) {
-			LOG_ERROR("Duplicate Breakpoint IVA: " TARGET_ADDR_FMT " (BP %" PRIu32 ")",
+			LOG_TARGET_ERROR(target, "Duplicate Breakpoint IVA: " TARGET_ADDR_FMT " (BP %" PRIu32 ")",
 				address, breakpoint->unique_id);
 			return ERROR_TARGET_DUPLICATE_BREAKPOINT;
 
@@ -190,13 +189,13 @@ static int hybrid_breakpoint_add_internal(struct target *target,
 
 	retval = target_add_hybrid_breakpoint(target, *breakpoint_p);
 	if (retval != ERROR_OK) {
-		LOG_ERROR("could not add breakpoint");
+		LOG_TARGET_ERROR(target, "could not add breakpoint");
 		free((*breakpoint_p)->orig_instr);
 		free(*breakpoint_p);
 		*breakpoint_p = NULL;
 		return retval;
 	}
-	LOG_DEBUG(
+	LOG_TARGET_DEBUG(target,
 		"added %s Hybrid breakpoint at address " TARGET_ADDR_FMT " of length 0x%8.8x, (BPID: %" PRIu32 ")",
 		breakpoint_type_strings[(*breakpoint_p)->type],
 		(*breakpoint_p)->address,
@@ -298,7 +297,7 @@ static int breakpoint_free(struct target *target, struct breakpoint *breakpoint_
 		return retval;
 	}
 
-	LOG_DEBUG("free BPID: %" PRIu32 " --> %d", breakpoint->unique_id, retval);
+	LOG_TARGET_DEBUG(target, "free BPID: %" PRIu32 " --> %d", breakpoint->unique_id, retval);
 	(*breakpoint_p) = breakpoint->next;
 	free(breakpoint->orig_instr);
 	free(breakpoint);
@@ -404,7 +403,7 @@ static int watchpoint_free(struct target *target, struct watchpoint *watchpoint_
 		return retval;
 	}
 
-	LOG_DEBUG("free WPID: %d --> %d", watchpoint->unique_id, retval);
+	LOG_TARGET_DEBUG(target, "free WPID: %d --> %d", watchpoint->unique_id, retval);
 	(*watchpoint_p) = watchpoint->next;
 	free(watchpoint);
 
@@ -514,7 +513,7 @@ static int watchpoint_add_internal(struct target *target, target_addr_t address,
 				|| watchpoint->value != value
 				|| watchpoint->mask != mask
 				|| watchpoint->rw != rw) {
-				LOG_ERROR("address " TARGET_ADDR_FMT
+				LOG_TARGET_ERROR(target, "address " TARGET_ADDR_FMT
 					" already has watchpoint %d",
 					address, watchpoint->unique_id);
 				return ERROR_FAIL;
@@ -548,7 +547,7 @@ static int watchpoint_add_internal(struct target *target, target_addr_t address,
 		default:
 			reason = "unrecognized error";
 bye:
-			LOG_ERROR("can't add %s watchpoint at " TARGET_ADDR_FMT ", %s",
+			LOG_TARGET_ERROR(target, "can't add %s watchpoint at " TARGET_ADDR_FMT ", %s",
 				watchpoint_rw_strings[(*watchpoint_p)->rw],
 				address, reason);
 			free(*watchpoint_p);
@@ -556,9 +555,8 @@ bye:
 			return retval;
 	}
 
-	LOG_DEBUG("[%d] added %s watchpoint at " TARGET_ADDR_FMT
+	LOG_TARGET_DEBUG(target, "added %s watchpoint at " TARGET_ADDR_FMT
 			" of length 0x%8.8" PRIx32 " (WPID: %d)",
-		target->coreid,
 		watchpoint_rw_strings[(*watchpoint_p)->rw],
 		(*watchpoint_p)->address,
 		(*watchpoint_p)->length,
@@ -674,7 +672,7 @@ int watchpoint_hit(struct target *target, enum watchpoint_rw *rw,
 	*rw = hit_watchpoint->rw;
 	*address = hit_watchpoint->address;
 
-	LOG_DEBUG("Found hit watchpoint at " TARGET_ADDR_FMT " (WPID: %d)",
+	LOG_TARGET_DEBUG(target, "Found hit watchpoint at " TARGET_ADDR_FMT " (WPID: %d)",
 		hit_watchpoint->address,
 		hit_watchpoint->unique_id);
 
diff --git a/src/target/target.c b/src/target/target.c
index 30f7029a5..9f43e2f91 100644
--- a/src/target/target.c
+++ b/src/target/target.c
@@ -3974,7 +3974,7 @@ static int handle_bp_command_set(struct command_invocation *cmd,
 
 	} else if (addr == 0) {
 		if (!target->type->add_context_breakpoint) {
-			LOG_ERROR("Context breakpoint not available");
+			LOG_TARGET_ERROR(target, "Context breakpoint not available");
 			return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
 		}
 		retval = context_breakpoint_add(target, asid, length, hw);
@@ -3984,7 +3984,7 @@ static int handle_bp_command_set(struct command_invocation *cmd,
 
 	} else {
 		if (!target->type->add_hybrid_breakpoint) {
-			LOG_ERROR("Hybrid breakpoint not available");
+			LOG_TARGET_ERROR(target, "Hybrid breakpoint not available");
 			return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
 		}
 		retval = hybrid_breakpoint_add(target, addr, asid, length, hw);
@@ -4121,7 +4121,7 @@ COMMAND_HANDLER(handle_wp_command)
 			type = WPT_ACCESS;
 			break;
 		default:
-			LOG_ERROR("invalid watchpoint mode ('%c')", CMD_ARGV[2][0]);
+			LOG_TARGET_ERROR(target, "invalid watchpoint mode ('%c')", CMD_ARGV[2][0]);
 			return ERROR_COMMAND_SYNTAX_ERROR;
 		}
 		/* fall through */
@@ -4137,7 +4137,7 @@ COMMAND_HANDLER(handle_wp_command)
 	int retval = watchpoint_add(target, addr, length, type,
 			data_value, data_mask);
 	if (retval != ERROR_OK)
-		LOG_ERROR("Failure setting watchpoints");
+		LOG_TARGET_ERROR(target, "Failure setting watchpoints");
 
 	return retval;
 }

-----------------------------------------------------------------------

Summary of changes:
 src/target/breakpoints.c | 32 +++++++++++++++-----------------
 src/target/target.c      |  8 ++++----
 2 files changed, 19 insertions(+), 21 deletions(-)


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From: openocd-gerrit <ope...@us...> - 2023-11-18 11:20:18

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- Log -----------------------------------------------------------------
commit 7c60f6593edd692cff90b8486412a9b8adba28d2
Author: Kirill Radkin <kir...@sy...>
Date:   Wed Oct 18 19:13:25 2023 +0300

    breakpoints: Fix endless loop in bp/wp_clear_target
    
    If we can't remove bp/wp, we will stuck in endless loop
    
    Change-Id: I44c0a164db1d15c0a0637d33c75087a49cf5c0f4
    Signed-off-by: Kirill Radkin <kir...@sy...>
    Reviewed-on: https://review.openocd.org/c/openocd/+/7940
    Tested-by: jenkins
    Reviewed-by: Anatoly P <kup...@gm...>
    Reviewed-by: Tim Newsome <ti...@si...>
    Reviewed-by: Jan Matyas <jan...@co...>
    Reviewed-by: Antonio Borneo <bor...@gm...>

diff --git a/src/target/breakpoints.c b/src/target/breakpoints.c
index d9c12f523..d4662c4de 100644
--- a/src/target/breakpoints.c
+++ b/src/target/breakpoints.c
@@ -326,6 +326,8 @@ static int breakpoint_remove_internal(struct target *target, target_addr_t addre
 
 static int breakpoint_remove_all_internal(struct target *target)
 {
+	LOG_TARGET_DEBUG(target, "Delete all breakpoints");
+
 	struct breakpoint *breakpoint = target->breakpoints;
 	int retval = ERROR_OK;
 
@@ -464,22 +466,6 @@ int watchpoint_remove_all(struct target *target)
 	return breakpoint_watchpoint_remove_all(target, WATCHPOINT);
 }
 
-static int breakpoint_clear_target_internal(struct target *target)
-{
-	LOG_DEBUG("Delete all breakpoints for target: %s",
-		target_name(target));
-
-	int retval = ERROR_OK;
-
-	while (target->breakpoints) {
-		int status = breakpoint_free(target, target->breakpoints);
-		if (status != ERROR_OK)
-			retval = status;
-	}
-
-	return retval;
-}
-
 int breakpoint_clear_target(struct target *target)
 {
 	int retval = ERROR_OK;
@@ -489,13 +475,13 @@ int breakpoint_clear_target(struct target *target)
 
 		foreach_smp_target(head, target->smp_targets) {
 			struct target *curr = head->target;
-			int status = breakpoint_clear_target_internal(curr);
+			int status = breakpoint_remove_all_internal(curr);
 
 			if (status != ERROR_OK)
 				retval = status;
 		}
 	} else {
-		retval = breakpoint_clear_target_internal(target);
+		retval = breakpoint_remove_all_internal(target);
 	}
 
 	return retval;
@@ -659,16 +645,19 @@ int watchpoint_remove(struct target *target, target_addr_t address)
 
 int watchpoint_clear_target(struct target *target)
 {
-	int retval = ERROR_OK;
-
 	LOG_DEBUG("Delete all watchpoints for target: %s",
 		target_name(target));
-	while (target->watchpoints) {
-		int status = watchpoint_free(target, target->watchpoints);
+
+	struct watchpoint *watchpoint = target->watchpoints;
+	int retval = ERROR_OK;
+
+	while (watchpoint) {
+		struct watchpoint *tmp = watchpoint;
+		watchpoint = watchpoint->next;
+		int status = watchpoint_free(target, tmp);
 		if (status != ERROR_OK)
 			retval = status;
 	}
-
 	return retval;
 }
 

-----------------------------------------------------------------------

Summary of changes:
 src/target/breakpoints.c | 35 ++++++++++++-----------------------
 1 file changed, 12 insertions(+), 23 deletions(-)


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- Log -----------------------------------------------------------------
commit f8096ce68724d15d0ef9a7edfd6d2aaa0f83a6e5
Author: ianst <ia...@ca...>
Date:   Thu Nov 9 07:28:50 2023 -0800

    xtensa: update XDM register map for TRAX support
    
    - Include additional debug module registers
    - Add translation function for DM reg addr -> ID
    - Add DM read/write commands
    
    Signed-off-by: ianst <ia...@ca...>
    Change-Id: If95419d24a9f27a40fa695c8c15326cdfd127ef1
    Reviewed-on: https://review.openocd.org/c/openocd/+/7973
    Reviewed-by: Antonio Borneo <bor...@gm...>
    Tested-by: jenkins

diff --git a/doc/openocd.texi b/doc/openocd.texi
index 4eb911c3c..b03da4f83 100644
--- a/doc/openocd.texi
+++ b/doc/openocd.texi
@@ -11487,6 +11487,12 @@ Execute arbitrary instruction(s) provided as an ascii string.  The string repres
 number of instruction bytes, thus its length must be even.
 @end deffn
 
+@deffn {Command} {xtensa dm} (address) [value]
+Read or write Xtensa Debug Module (DM) registers.  @var{address} is required for both reads
+and writes and is a 4-byte-aligned value typically between 0 and 0x3ffc.  @var{value} is specified
+only for write accesses.
+@end deffn
+
 @subsection Xtensa Performance Monitor Configuration
 
 @deffn {Command} {xtensa perfmon_enable} <counter_id> <select> [mask] [kernelcnt] [tracelevel]
diff --git a/src/target/xtensa/xtensa.c b/src/target/xtensa/xtensa.c
index c575b534e..2aacc3620 100644
--- a/src/target/xtensa/xtensa.c
+++ b/src/target/xtensa/xtensa.c
@@ -3978,6 +3978,38 @@ COMMAND_HANDLER(xtensa_cmd_smpbreak)
 		get_current_target(CMD_CTX));
 }
 
+COMMAND_HELPER(xtensa_cmd_dm_rw_do, struct xtensa *xtensa)
+{
+	if (CMD_ARGC == 1) {
+		// read: xtensa dm addr
+		uint32_t addr = strtoul(CMD_ARGV[0], NULL, 0);
+		uint32_t val;
+		int res = xtensa_dm_read(&xtensa->dbg_mod, addr, &val);
+		if (res == ERROR_OK)
+			command_print(CMD, "xtensa DM(0x%08" PRIx32 ") -> 0x%08" PRIx32, addr, val);
+		else
+			command_print(CMD, "xtensa DM(0x%08" PRIx32 ") : read ERROR %" PRId32, addr, res);
+		return res;
+	} else if (CMD_ARGC == 2) {
+		// write: xtensa dm addr value
+		uint32_t addr = strtoul(CMD_ARGV[0], NULL, 0);
+		uint32_t val = strtoul(CMD_ARGV[1], NULL, 0);
+		int res = xtensa_dm_write(&xtensa->dbg_mod, addr, val);
+		if (res == ERROR_OK)
+			command_print(CMD, "xtensa DM(0x%08" PRIx32 ") <- 0x%08" PRIx32, addr, val);
+		else
+			command_print(CMD, "xtensa DM(0x%08" PRIx32 ") : write ERROR %" PRId32, addr, res);
+		return res;
+	}
+	return ERROR_COMMAND_SYNTAX_ERROR;
+}
+
+COMMAND_HANDLER(xtensa_cmd_dm_rw)
+{
+	return CALL_COMMAND_HANDLER(xtensa_cmd_dm_rw_do,
+		target_to_xtensa(get_current_target(CMD_CTX)));
+}
+
 COMMAND_HELPER(xtensa_cmd_tracestart_do, struct xtensa *xtensa)
 {
 	struct xtensa_trace_status trace_status;
@@ -4234,6 +4266,13 @@ static const struct command_registration xtensa_any_command_handlers[] = {
 		.help = "Set the way the CPU chains OCD breaks",
 		.usage = "[none|breakinout|runstall] | [BreakIn] [BreakOut] [RunStallIn] [DebugModeOut]",
 	},
+	{
+		.name = "dm",
+		.handler = xtensa_cmd_dm_rw,
+		.mode = COMMAND_ANY,
+		.help = "Xtensa DM read/write",
+		.usage = "addr [value]"
+	},
 	{
 		.name = "perfmon_enable",
 		.handler = xtensa_cmd_perfmon_enable,
diff --git a/src/target/xtensa/xtensa_debug_module.c b/src/target/xtensa/xtensa_debug_module.c
index 31d7a9435..8045779b8 100644
--- a/src/target/xtensa/xtensa_debug_module.c
+++ b/src/target/xtensa/xtensa_debug_module.c
@@ -34,6 +34,16 @@ static const struct xtensa_dm_pwr_reg_offsets xdm_pwr_regs[XDMREG_PWRNUM] =
 static const struct xtensa_dm_reg_offsets xdm_regs[XDMREG_NUM] =
 	XTENSA_DM_REG_OFFSETS;
 
+static enum xtensa_dm_reg xtensa_dm_regaddr_to_id(uint32_t addr)
+{
+	enum xtensa_dm_reg id;
+	uint32_t addr_masked = (addr & (XTENSA_DM_APB_ALIGN - 1));
+	for (id = XDMREG_TRAXID; id < XDMREG_NUM; id++)
+		if (xdm_regs[id].apb == addr_masked)
+			break;
+	return id;
+}
+
 static void xtensa_dm_add_set_ir(struct xtensa_debug_module *dm, uint8_t value)
 {
 	struct scan_field field;
@@ -285,6 +295,34 @@ int xtensa_dm_core_status_clear(struct xtensa_debug_module *dm, xtensa_dsr_t bit
 	return xtensa_dm_queue_execute(dm);
 }
 
+int xtensa_dm_read(struct xtensa_debug_module *dm, uint32_t addr, uint32_t *val)
+{
+	enum xtensa_dm_reg reg = xtensa_dm_regaddr_to_id(addr);
+	uint8_t buf[sizeof(uint32_t)];
+	if (reg < XDMREG_NUM) {
+		xtensa_dm_queue_enable(dm);
+		dm->dbg_ops->queue_reg_read(dm, reg, buf);
+		xtensa_dm_queue_tdi_idle(dm);
+		int res = xtensa_dm_queue_execute(dm);
+		if (res == ERROR_OK && val)
+			*val = buf_get_u32(buf, 0, 32);
+		return res;
+	}
+	return ERROR_FAIL;
+}
+
+int xtensa_dm_write(struct xtensa_debug_module *dm, uint32_t addr, uint32_t val)
+{
+	enum xtensa_dm_reg reg = xtensa_dm_regaddr_to_id(addr);
+	if (reg < XDMREG_NUM) {
+		xtensa_dm_queue_enable(dm);
+		dm->dbg_ops->queue_reg_write(dm, reg, val);
+		xtensa_dm_queue_tdi_idle(dm);
+		return xtensa_dm_queue_execute(dm);
+	}
+	return ERROR_FAIL;
+}
+
 int xtensa_dm_trace_start(struct xtensa_debug_module *dm, struct xtensa_trace_start_config *cfg)
 {
 	/*Turn off trace unit so we can start a new trace. */
diff --git a/src/target/xtensa/xtensa_debug_module.h b/src/target/xtensa/xtensa_debug_module.h
index 46b29354c..495da2a64 100644
--- a/src/target/xtensa/xtensa_debug_module.h
+++ b/src/target/xtensa/xtensa_debug_module.h
@@ -75,6 +75,22 @@ enum xtensa_dm_reg {
 	XDMREG_DELAYCNT,
 	XDMREG_MEMADDRSTART,
 	XDMREG_MEMADDREND,
+	XDMREG_EXTTIMELO,
+	XDMREG_EXTTIMEHI,
+	XDMREG_TRAXRSVD48,
+	XDMREG_TRAXRSVD4C,
+	XDMREG_TRAXRSVD50,
+	XDMREG_TRAXRSVD54,
+	XDMREG_TRAXRSVD58,
+	XDMREG_TRAXRSVD5C,
+	XDMREG_TRAXRSVD60,
+	XDMREG_TRAXRSVD64,
+	XDMREG_TRAXRSVD68,
+	XDMREG_TRAXRSVD6C,
+	XDMREG_TRAXRSVD70,
+	XDMREG_TRAXRSVD74,
+	XDMREG_CONFIGID0,
+	XDMREG_CONFIGID1,
 
 	/* Performance Monitor Registers */
 	XDMREG_PMG,
@@ -168,6 +184,22 @@ struct xtensa_dm_reg_offsets {
 	{ .nar = 0x07, .apb = 0x001c },	/* XDMREG_DELAYCNT */		\
 	{ .nar = 0x08, .apb = 0x0020 },	/* XDMREG_MEMADDRSTART */	\
 	{ .nar = 0x09, .apb = 0x0024 },	/* XDMREG_MEMADDREND */		\
+	{ .nar = 0x10, .apb = 0x0040 },	/* XDMREG_EXTTIMELO */		\
+	{ .nar = 0x11, .apb = 0x0044 },	/* XDMREG_EXTTIMEHI */		\
+	{ .nar = 0x12, .apb = 0x0048 },	/* XDMREG_TRAXRSVD48 */		\
+	{ .nar = 0x13, .apb = 0x004c },	/* XDMREG_TRAXRSVD4C */		\
+	{ .nar = 0x14, .apb = 0x0050 },	/* XDMREG_TRAXRSVD50 */		\
+	{ .nar = 0x15, .apb = 0x0054 },	/* XDMREG_TRAXRSVD54 */		\
+	{ .nar = 0x16, .apb = 0x0058 },	/* XDMREG_TRAXRSVD58 */		\
+	{ .nar = 0x17, .apb = 0x005c },	/* XDMREG_TRAXRSVD5C */		\
+	{ .nar = 0x18, .apb = 0x0060 },	/* XDMREG_TRAXRSVD60 */		\
+	{ .nar = 0x19, .apb = 0x0064 },	/* XDMREG_TRAXRSVD64 */		\
+	{ .nar = 0x1a, .apb = 0x0068 },	/* XDMREG_TRAXRSVD68 */		\
+	{ .nar = 0x1b, .apb = 0x006c },	/* XDMREG_TRAXRSVD6C */		\
+	{ .nar = 0x1c, .apb = 0x0070 },	/* XDMREG_TRAXRSVD70 */		\
+	{ .nar = 0x1d, .apb = 0x0074 },	/* XDMREG_TRAXRSVD74 */		\
+	{ .nar = 0x1e, .apb = 0x0078 },	/* XDMREG_CONFIGID0 */		\
+	{ .nar = 0x1f, .apb = 0x007c },	/* XDMREG_CONFIGID1 */		\
 																\
 	/* Performance Monitor Registers */							\
 	{ .nar = 0x20, .apb = 0x1000 },	/* XDMREG_PMG */			\
@@ -297,6 +329,11 @@ struct xtensa_dm_reg_offsets {
 #define DEBUGCAUSE_DI               BIT(5)	/* Debug Interrupt */
 #define DEBUGCAUSE_VALID            BIT(31)	/* Pseudo-value to trigger reread (NX only) */
 
+/* TRAXID */
+#define TRAXID_PRODNO_TRAX          0		/* TRAXID.PRODNO value for TRAX module */
+#define TRAXID_PRODNO_SHIFT         28
+#define TRAXID_PRODNO_MASK          0xf
+
 #define TRAXCTRL_TREN               BIT(0)	/* Trace enable. Tracing starts on 0->1 */
 #define TRAXCTRL_TRSTP              BIT(1)	/* Trace Stop. Make 1 to stop trace. */
 #define TRAXCTRL_PCMEN              BIT(2)	/* PC match enable */
@@ -512,6 +549,9 @@ static inline xtensa_dsr_t xtensa_dm_core_status_get(struct xtensa_debug_module
 	return dm->core_status.dsr;
 }
 
+int xtensa_dm_read(struct xtensa_debug_module *dm, uint32_t addr, uint32_t *val);
+int xtensa_dm_write(struct xtensa_debug_module *dm, uint32_t addr, uint32_t val);
+
 int xtensa_dm_device_id_read(struct xtensa_debug_module *dm);
 static inline xtensa_ocdid_t xtensa_dm_device_id_get(struct xtensa_debug_module *dm)
 {

-----------------------------------------------------------------------

Summary of changes:
 doc/openocd.texi                        |  6 +++++
 src/target/xtensa/xtensa.c              | 39 ++++++++++++++++++++++++++++++++
 src/target/xtensa/xtensa_debug_module.c | 38 +++++++++++++++++++++++++++++++
 src/target/xtensa/xtensa_debug_module.h | 40 +++++++++++++++++++++++++++++++++
 4 files changed, 123 insertions(+)


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- Log -----------------------------------------------------------------
commit 9ebc2a65191308d3677a84ebbbdad97a93eae7de
Author: ianst <ia...@ca...>
Date:   Fri Oct 20 13:00:41 2023 -0700

    doc: xtensa architecture clarifications/fixes
    
    - Fix Xtensa .cfg file references for NXP EVK
    - Add clarification note for "xtensa xtmem" command
    - Resolve TEX build warnings
    
    Signed-off-by: ianst <ia...@ca...>
    Change-Id: I0f2b56d0d084d86f557fadf3ac35fd04bf99650c
    Reviewed-on: https://review.openocd.org/c/openocd/+/7972
    Tested-by: jenkins
    Reviewed-by: Erhan Kurubas <erh...@es...>
    Reviewed-by: Antonio Borneo <bor...@gm...>

diff --git a/doc/openocd.texi b/doc/openocd.texi
index 45c2e4df5..4eb911c3c 100644
--- a/doc/openocd.texi
+++ b/doc/openocd.texi
@@ -11364,16 +11364,18 @@ NOTE: @file{xtensa-core-XXX.cfg} must match the target Xtensa hardware
 connected to OpenOCD.
 
 Some example Xtensa configurations are bundled with OpenOCD for reference:
-@itemize @bullet
+@enumerate
 @item Cadence Palladium VDebug emulation target. The user can combine their
 @file{xtensa-core-XXX.cfg} with the provided
 @file{board/xtensa-palladium-vdebug.cfg} to debug an emulated Xtensa RTL design.
-@item NXP MIMXRT685-EVK evaluation kit. The relevant configuration files are
-@file{board/xtensa-rt685-jlink.cfg} and @file{board/xtensa-core-nxp_rt600.cfg}.
-Additional information is provided by
-@uref{https://www.nxp.com/design/development-boards/i-mx-evaluation-and-development-boards/i-mx-rt600-evaluation-kit:MIMXRT685-EVK,
-NXP}.
+@item NXP MIMXRT685-EVK evaluation kit. The relevant configuration files are:
+@itemize @bullet
+@item @file{board/xtensa-rt685-ext.cfg}
+@item @file{target/xtensa-core-nxp_rt600.cfg}
 @end itemize
+Additional information is available by searching for "i.MX RT600 Evaluation Kit"
+on @url{https://www.nxp.com}.
+@end enumerate
 
 @subsection Xtensa Configuration Commands
 
@@ -11398,6 +11400,11 @@ others may be common to both but have different valid ranges.
 Configure Xtensa target memory. Memory type determines access rights,
 where RAMs are read/write while ROMs are read-only. @var{baseaddr} and
 @var{bytes} are both integers, typically hexadecimal and decimal, respectively.
+
+NOTE: Some Xtensa memory types, such as system RAM/ROM or MMIO/device regions,
+can be added or modified after the Xtensa core has been generated. Additional
+@code{xtensa xtmem} definitions should be manually added to xtensa-core-XXX.cfg
+to keep OpenOCD's target address map consistent with the Xtensa configuration.
 @end deffn
 
 @deffn {Config Command} {xtensa xtmem} (@option{icache}|@option{dcache}) linebytes cachebytes ways [writeback]

-----------------------------------------------------------------------

Summary of changes:
 doc/openocd.texi | 19 +++++++++++++------
 1 file changed, 13 insertions(+), 6 deletions(-)


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- Log -----------------------------------------------------------------
commit 3862e07688ea68298841891145deddd226c3c7e5
Author: Marc Schink <de...@za...>
Date:   Wed Nov 1 09:27:05 2023 +0100

    target: Remove break/watchpoints in target_destroy()
    
    Break- and watchpoints are not removed when a target is destroyed
    which introduces a memory leak.
    
    Change-Id: I6143d48f7efd765b7752a12fdc337da3496d896f
    Signed-off-by: Marc Schink <de...@za...>
    Reviewed-on: https://review.openocd.org/c/openocd/+/7956
    Reviewed-by: Marek Vrbka <mar...@co...>
    Reviewed-by: Tomas Vanek <va...@fb...>
    Tested-by: jenkins
    Reviewed-by: Antonio Borneo <bor...@gm...>

diff --git a/src/target/target.c b/src/target/target.c
index 148bc9fb7..30f7029a5 100644
--- a/src/target/target.c
+++ b/src/target/target.c
@@ -2212,6 +2212,9 @@ uint32_t target_get_working_area_avail(struct target *target)
 
 static void target_destroy(struct target *target)
 {
+	breakpoint_remove_all(target);
+	watchpoint_remove_all(target);
+
 	if (target->type->deinit_target)
 		target->type->deinit_target(target);
 

-----------------------------------------------------------------------

Summary of changes:
 src/target/target.c | 3 +++
 1 file changed, 3 insertions(+)


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commit d4575b647a3603200a9bb4a784d170f792ab88d0
Author: Antonio Borneo <bor...@gm...>
Date:   Sun Nov 5 17:02:26 2023 +0100

    target: fix segmentation fault on target create
    
    In the unusual (and even incorrect) case of running the command
    target create ...
    before defining an adapter and the associated transport, the
    command causes a segmentation fault. E.g.:
            openocd -c 'target create cpu cortex-m -endian little'
    
    Check that get_current_transport() returns a valid pointer before
    referencing it.
    
    Change-Id: I9796a7e92196ef3df5c7152b27c34102045dc9e7
    Signed-off-by: Antonio Borneo <bor...@gm...>
    Reviewed-on: https://review.openocd.org/c/openocd/+/7962
    Reviewed-by: Tomas Vanek <va...@fb...>
    Tested-by: jenkins

diff --git a/src/target/target.c b/src/target/target.c
index d368cb515..148bc9fb7 100644
--- a/src/target/target.c
+++ b/src/target/target.c
@@ -6143,7 +6143,7 @@ static int target_create(struct jim_getopt_info *goi)
 	if (e != JIM_OK)
 		return e;
 	struct transport *tr = get_current_transport();
-	if (tr->override_target) {
+	if (tr && tr->override_target) {
 		e = tr->override_target(&cp);
 		if (e != ERROR_OK) {
 			LOG_ERROR("The selected transport doesn't support this target");

-----------------------------------------------------------------------

Summary of changes:
 src/target/target.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)


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commit b39072f2ef72f02601b40931d3a38c465804a906
Author: Antonio Borneo <bor...@gm...>
Date:   Sun Nov 5 12:55:27 2023 +0100

    target: use boolean values for 'valid' and 'dirty' flags
    
    Convert to boolean the remaining numeric assignment and comparison
    
    Change-Id: Idc25221d93e85236185aab9ee36f0a379939c89c
    Signed-off-by: Antonio Borneo <bor...@gm...>
    Reviewed-on: https://review.openocd.org/c/openocd/+/7961
    Reviewed-by: zapb <de...@za...>
    Tested-by: jenkins

diff --git a/src/target/arc.c b/src/target/arc.c
index 45005b29b..0f7b11025 100644
--- a/src/target/arc.c
+++ b/src/target/arc.c
@@ -1265,8 +1265,8 @@ static int arc_resume(struct target *target, int current, target_addr_t address,
 	/* current = 1: continue on current PC, otherwise continue at <address> */
 	if (!current) {
 		target_buffer_set_u32(target, pc->value, address);
-		pc->dirty = 1;
-		pc->valid = 1;
+		pc->dirty = true;
+		pc->valid = true;
 		LOG_DEBUG("Changing the value of current PC to 0x%08" TARGET_PRIxADDR, address);
 	}
 
@@ -1281,7 +1281,7 @@ static int arc_resume(struct target *target, int current, target_addr_t address,
 		resume_pc, pc->dirty, pc->valid);
 
 	/* check if GDB tells to set our PC where to continue from */
-	if ((pc->valid == 1) && (resume_pc == target_buffer_get_u32(target, pc->value))) {
+	if (pc->valid && resume_pc == target_buffer_get_u32(target, pc->value)) {
 		value = target_buffer_get_u32(target, pc->value);
 		LOG_DEBUG("resume Core (when start-core) with PC @:0x%08" PRIx32, value);
 		CHECK_RETVAL(arc_jtag_write_aux_reg_one(&arc->jtag_info, AUX_PC_REG, value));
@@ -2007,8 +2007,8 @@ static int arc_step(struct target *target, int current, target_addr_t address,
 	/* current = 1: continue on current pc, otherwise continue at <address> */
 	if (!current) {
 		buf_set_u32(pc->value, 0, 32, address);
-		pc->dirty = 1;
-		pc->valid = 1;
+		pc->dirty = true;
+		pc->valid = true;
 	}
 
 	LOG_DEBUG("Target steps one instruction from PC=0x%" PRIx32,
diff --git a/src/target/etm.c b/src/target/etm.c
index 6718875ee..d083017f7 100644
--- a/src/target/etm.c
+++ b/src/target/etm.c
@@ -552,8 +552,8 @@ static int etm_set_reg(struct reg *reg, uint32_t value)
 	}
 
 	buf_set_u32(reg->value, 0, reg->size, value);
-	reg->valid = 1;
-	reg->dirty = 0;
+	reg->valid = true;
+	reg->dirty = false;
 
 	return ERROR_OK;
 }
diff --git a/src/target/mips64.c b/src/target/mips64.c
index 37f36855c..48f4563dc 100644
--- a/src/target/mips64.c
+++ b/src/target/mips64.c
@@ -247,8 +247,8 @@ static int mips64_set_core_reg(struct reg *reg, uint8_t *buf)
 		return ERROR_TARGET_NOT_HALTED;
 
 	buf_set_u64(reg->value, 0, 64, value);
-	reg->dirty = 1;
-	reg->valid = 1;
+	reg->dirty = true;
+	reg->valid = true;
 
 	return ERROR_OK;
 }
@@ -265,8 +265,8 @@ static int mips64_read_core_reg(struct target *target, int num)
 
 	reg_value = mips64->core_regs[num];
 	buf_set_u64(mips64->core_cache->reg_list[num].value, 0, 64, reg_value);
-	mips64->core_cache->reg_list[num].valid = 1;
-	mips64->core_cache->reg_list[num].dirty = 0;
+	mips64->core_cache->reg_list[num].valid = true;
+	mips64->core_cache->reg_list[num].dirty = false;
 
 	return ERROR_OK;
 }
@@ -284,8 +284,8 @@ static int mips64_write_core_reg(struct target *target, int num)
 	reg_value = buf_get_u64(mips64->core_cache->reg_list[num].value, 0, 64);
 	mips64->core_regs[num] = reg_value;
 	LOG_DEBUG("write core reg %i value 0x%" PRIx64 "", num, reg_value);
-	mips64->core_cache->reg_list[num].valid = 1;
-	mips64->core_cache->reg_list[num].dirty = 0;
+	mips64->core_cache->reg_list[num].valid = true;
+	mips64->core_cache->reg_list[num].dirty = false;
 
 	return ERROR_OK;
 }
@@ -297,8 +297,8 @@ int mips64_invalidate_core_regs(struct target *target)
 	unsigned int i;
 
 	for (i = 0; i < mips64->core_cache->num_regs; i++) {
-		mips64->core_cache->reg_list[i].valid = 0;
-		mips64->core_cache->reg_list[i].dirty = 0;
+		mips64->core_cache->reg_list[i].valid = false;
+		mips64->core_cache->reg_list[i].dirty = false;
 	}
 
 	return ERROR_OK;
diff --git a/src/target/mips_mips64.c b/src/target/mips_mips64.c
index bf6095358..9921e9380 100644
--- a/src/target/mips_mips64.c
+++ b/src/target/mips_mips64.c
@@ -625,8 +625,8 @@ static int mips_mips64_resume(struct target *target, int current,
 	/* current = 1: continue on current pc, otherwise continue at <address> */
 	if (!current) {
 		buf_set_u64(pc->value, 0, 64, address);
-		pc->dirty = 1;
-		pc->valid = 1;
+		pc->dirty = true;
+		pc->valid = true;
 	}
 
 	resume_pc = buf_get_u64(pc->value, 0, 64);
@@ -717,8 +717,8 @@ static int mips_mips64_step(struct target *target, int current,
 	 * <address> */
 	if (!current) {
 		buf_set_u64(pc->value, 0, 64, address);
-		pc->dirty = 1;
-		pc->valid = 1;
+		pc->dirty = true;
+		pc->valid = true;
 	}
 
 	/* the front-end may request us not to handle breakpoints */

-----------------------------------------------------------------------

Summary of changes:
 src/target/arc.c         | 10 +++++-----
 src/target/etm.c         |  4 ++--
 src/target/mips64.c      | 16 ++++++++--------
 src/target/mips_mips64.c |  8 ++++----
 4 files changed, 19 insertions(+), 19 deletions(-)


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- Log -----------------------------------------------------------------
commit 5587710c1a0537df78d87bcc0472e25a974d91c1
Author: Antonio Borneo <bor...@gm...>
Date:   Sat Nov 4 15:55:24 2023 +0100

    nor: rsl10: fix minor coding style
    
    I use a script to compare the commands in the code with the ones
    in the documentation.
    Fix the style of the data to simplify the parsing.
    
    Change-Id: I0f1d7e9ff5e2928312ca1a2f3424f82d2910580a
    Signed-off-by: Antonio Borneo <bor...@gm...>
    Reviewed-on: https://review.openocd.org/c/openocd/+/7960
    Tested-by: jenkins
    Reviewed-by: zapb <de...@za...>

diff --git a/src/flash/nor/rsl10.c b/src/flash/nor/rsl10.c
index 5f0ac9b8f..c286e9ac8 100644
--- a/src/flash/nor/rsl10.c
+++ b/src/flash/nor/rsl10.c
@@ -815,7 +815,8 @@ static const struct command_registration rsl10_exec_command_handlers[] = {
 		.help    = "Mass erase all unprotected flash areas",
 		.usage   = "",
 	},
-	COMMAND_REGISTRATION_DONE};
+	COMMAND_REGISTRATION_DONE
+};
 
 static const struct command_registration rsl10_command_handlers[] = {
 	{
@@ -825,7 +826,8 @@ static const struct command_registration rsl10_command_handlers[] = {
 		.usage = "",
 		.chain = rsl10_exec_command_handlers,
 	},
-	COMMAND_REGISTRATION_DONE};
+	COMMAND_REGISTRATION_DONE
+};
 
 const struct flash_driver rsl10_flash = {
 	.name               = "rsl10",

-----------------------------------------------------------------------

Summary of changes:
 src/flash/nor/rsl10.c | 6 ++++--
 1 file changed, 4 insertions(+), 2 deletions(-)


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commit 9fcf33da8e09fb93a1f3f1eb0409e64a820698b4
Author: Antonio Borneo <bor...@gm...>
Date:   Thu Nov 9 15:15:10 2023 +0100

    contrib/rtos-helpers/FreeRTOS-openocd: change license to CC0-1.0
    
    This file is intended to be included in any user's project that
    plans to use OpenOCD awareness for FreeRTOS.
    It is supposed to be distributed under a permissive license to not
    impact the original license of the user's project.
    
    Distribute it under Creative Commons Zero v1.0 Universal license.
    
    Change-Id: I7ac90e8b742517bcafc08c00662625671c8159c4
    Signed-off-by: Antonio Borneo <bor...@gm...>
    Reviewed-on: https://review.openocd.org/c/openocd/+/7995
    Reviewed-by: Karl Palsson <ka...@tw...>
    Reviewed-by: Paul Fertser <fer...@gm...>
    Tested-by: jenkins

diff --git a/contrib/rtos-helpers/FreeRTOS-openocd.c b/contrib/rtos-helpers/FreeRTOS-openocd.c
index 000453d5d..5f82ac7a2 100644
--- a/contrib/rtos-helpers/FreeRTOS-openocd.c
+++ b/contrib/rtos-helpers/FreeRTOS-openocd.c
@@ -1,4 +1,4 @@
-// SPDX-License-Identifier: GPL-2.0-or-later
+// SPDX-License-Identifier: CC0-1.0
 
 /*
  * Since at least FreeRTOS V7.5.3 uxTopUsedPriority is no longer

commit edf8e916a266b5df15f456fcec748caf6b2b350c
Author: Antonio Borneo <bor...@gm...>
Date:   Thu Nov 9 15:12:08 2023 +0100

    LICENSES: Add the CC0-1.0 license
    
    Add the full text of the CC0-1.0 license to the OpenOCD tree. It
    was copied directly from:
    
      https://spdx.org/licenses/CC0-1.0.html#licenseText
    
    Add the required tags for reference and tooling.
    
    Change-Id: Iae9c1431b6ffdd68ad5780deb78a257edb0b67f3
    Signed-off-by: Antonio Borneo <bor...@gm...>
    Reviewed-on: https://review.openocd.org/c/openocd/+/7994
    Tested-by: jenkins
    Reviewed-by: Karl Palsson <ka...@tw...>

diff --git a/LICENSES/preferred/CC0-1.0 b/LICENSES/preferred/CC0-1.0
new file mode 100644
index 000000000..ba3c8c795
--- /dev/null
+++ b/LICENSES/preferred/CC0-1.0
@@ -0,0 +1,130 @@
+Valid-License-Identifier: CC0-1.0
+SPDX-URL: https://spdx.org/licenses/CC0-1.0.html
+Usage-Guide:
+  To use the Creative Commons Zero v1.0 Universal License put the following
+  SPDX tag/value pair into a comment according to the placement guidelines in
+  the licensing rules documentation:
+    SPDX-License-Identifier: CC0-1.0
+License-Text:
+
+Creative Commons Legal Code
+
+CC0 1.0 Universal
+
+    CREATIVE COMMONS CORPORATION IS NOT A LAW FIRM AND DOES NOT PROVIDE
+    LEGAL SERVICES. DISTRIBUTION OF THIS DOCUMENT DOES NOT CREATE AN
+    ATTORNEY-CLIENT RELATIONSHIP. CREATIVE COMMONS PROVIDES THIS
+    INFORMATION ON AN "AS-IS" BASIS. CREATIVE COMMONS MAKES NO WARRANTIES
+    REGARDING THE USE OF THIS DOCUMENT OR THE INFORMATION OR WORKS
+    PROVIDED HEREUNDER, AND DISCLAIMS LIABILITY FOR DAMAGES RESULTING FROM
+    THE USE OF THIS DOCUMENT OR THE INFORMATION OR WORKS PROVIDED
+    HEREUNDER.
+
+Statement of Purpose
+
+The laws of most jurisdictions throughout the world automatically confer
+exclusive Copyright and Related Rights (defined below) upon the creator
+and subsequent owner(s) (each and all, an "owner") of an original work of
+authorship and/or a database (each, a "Work").
+
+Certain owners wish to permanently relinquish those rights to a Work for
+the purpose of contributing to a commons of creative, cultural and
+scientific works ("Commons") that the public can reliably and without fear
+of later claims of infringement build upon, modify, incorporate in other
+works, reuse and redistribute as freely as possible in any form whatsoever
+and for any purposes, including without limitation commercial purposes.
+These owners may contribute to the Commons to promote the ideal of a free
+culture and the further production of creative, cultural and scientific
+works, or to gain reputation or greater distribution for their Work in
+part through the use and efforts of others.
+
+For these and/or other purposes and motivations, and without any
+expectation of additional consideration or compensation, the person
+associating CC0 with a Work (the "Affirmer"), to the extent that he or she
+is an owner of Copyright and Related Rights in the Work, voluntarily
+elects to apply CC0 to the Work and publicly distribute the Work under its
+terms, with knowledge of his or her Copyright and Related Rights in the
+Work and the meaning and intended legal effect of CC0 on those rights.
+
+1. Copyright and Related Rights. A Work made available under CC0 may be
+protected by copyright and related or neighboring rights ("Copyright and
+Related Rights"). Copyright and Related Rights include, but are not
+limited to, the following:
+
+  i. the right to reproduce, adapt, distribute, perform, display,
+     communicate, and translate a Work;
+ ii. moral rights retained by the original author(s) and/or performer(s);
+iii. publicity and privacy rights pertaining to a person's image or
+     likeness depicted in a Work;
+ iv. rights protecting against unfair competition in regards to a Work,
+     subject to the limitations in paragraph 4(a), below;
+  v. rights protecting the extraction, dissemination, use and reuse of data
+     in a Work;
+ vi. database rights (such as those arising under Directive 96/9/EC of the
+     European Parliament and of the Council of 11 March 1996 on the legal
+     protection of databases, and under any national implementation
+     thereof, including any amended or successor version of such
+     directive); and
+vii. other similar, equivalent or corresponding rights throughout the
+     world based on applicable law or treaty, and any national
+     implementations thereof.
+
+2. Waiver. To the greatest extent permitted by, but not in contravention
+of, applicable law, Affirmer hereby overtly, fully, permanently,
+irrevocably and unconditionally waives, abandons, and surrenders all of
+Affirmer's Copyright and Related Rights and associated claims and causes
+of action, whether now known or unknown (including existing as well as
+future claims and causes of action), in the Work (i) in all territories
+worldwide, (ii) for the maximum duration provided by applicable law or
+treaty (including future time extensions), (iii) in any current or future
+medium and for any number of copies, and (iv) for any purpose whatsoever,
+including without limitation commercial, advertising or promotional
+purposes (the "Waiver"). Affirmer makes the Waiver for the benefit of each
+member of the public at large and to the detriment of Affirmer's heirs and
+successors, fully intending that such Waiver shall not be subject to
+revocation, rescission, cancellation, termination, or any other legal or
+equitable action to disrupt the quiet enjoyment of the Work by the public
+as contemplated by Affirmer's express Statement of Purpose.
+
+3. Public License Fallback. Should any part of the Waiver for any reason
+be judged legally invalid or ineffective under applicable law, then the
+Waiver shall be preserved to the maximum extent permitted taking into
+account Affirmer's express Statement of Purpose. In addition, to the
+extent the Waiver is so judged Affirmer hereby grants to each affected
+person a royalty-free, non transferable, non sublicensable, non exclusive,
+irrevocable and unconditional license to exercise Affirmer's Copyright and
+Related Rights in the Work (i) in all territories worldwide, (ii) for the
+maximum duration provided by applicable law or treaty (including future
+time extensions), (iii) in any current or future medium and for any number
+of copies, and (iv) for any purpose whatsoever, including without
+limitation commercial, advertising or promotional purposes (the
+"License"). The License shall be deemed effective as of the date CC0 was
+applied by Affirmer to the Work. Should any part of the License for any
+reason be judged legally invalid or ineffective under applicable law, such
+partial invalidity or ineffectiveness shall not invalidate the remainder
+of the License, and in such case Affirmer hereby affirms that he or she
+will not (i) exercise any of his or her remaining Copyright and Related
+Rights in the Work or (ii) assert any associated claims and causes of
+action with respect to the Work, in either case contrary to Affirmer's
+express Statement of Purpose.
+
+4. Limitations and Disclaimers.
+
+ a. No trademark or patent rights held by Affirmer are waived, abandoned,
+    surrendered, licensed or otherwise affected by this document.
+ b. Affirmer offers the Work as-is and makes no representations or
+    warranties of any kind concerning the Work, express, implied,
+    statutory or otherwise, including without limitation warranties of
+    title, merchantability, fitness for a particular purpose, non
+    infringement, or the absence of latent or other defects, accuracy, or
+    the present or absence of errors, whether or not discoverable, all to
+    the greatest extent permissible under applicable law.
+ c. Affirmer disclaims responsibility for clearing rights of other persons
+    that may apply to the Work or any use thereof, including without
+    limitation any person's Copyright and Related Rights in the Work.
+    Further, Affirmer disclaims responsibility for obtaining any necessary
+    consents, permissions or other rights required for any use of the
+    Work.
+ d. Affirmer understands and acknowledges that Creative Commons is not a
+    party to this document and has no duty or obligation with respect to
+    this CC0 or use of the Work.
diff --git a/Makefile.am b/Makefile.am
index a4f77adc2..153c471a9 100644
--- a/Makefile.am
+++ b/Makefile.am
@@ -64,6 +64,7 @@ EXTRA_DIST += \
 	LICENSES/preferred/BSD-2-Clause-Views \
 	LICENSES/preferred/BSD-3-Clause \
 	LICENSES/preferred/BSD-Source-Code \
+	LICENSES/preferred/CC0-1.0 \
 	LICENSES/preferred/GFDL-1.2 \
 	LICENSES/preferred/gfdl-1.2.texi.readme \
 	LICENSES/preferred/GPL-2.0 \

commit d378c3a1d637b61afd4c4f9c2c075cc05be2cb9d
Author: Daniel Anselmi <dan...@gm...>
Date:   Mon Sep 25 00:05:38 2023 +0200

    pld/certus: fix crash when loading bitstream
    
    Loading a bitstream to cetrus device crashed due to
    missing initialization.
    
    Change-Id: Ibd9a04b84e514f9635af01a2b73bae478e534eb7
    Signed-off-by: Daniel Anselmi <dan...@gm...>
    Reviewed-on: https://review.openocd.org/c/openocd/+/7908
    Tested-by: jenkins
    Reviewed-by: Antonio Borneo <bor...@gm...>

diff --git a/src/pld/certus.c b/src/pld/certus.c
index a49501f54..ccb3feb90 100644
--- a/src/pld/certus.c
+++ b/src/pld/certus.c
@@ -121,6 +121,7 @@ static int lattice_certus_enable_programming(struct jtag_tap *tap)
 	uint8_t buffer = 0;
 	field.num_bits = 8;
 	field.out_value = &buffer;
+	field.in_value = NULL;
 	jtag_add_dr_scan(tap, 1, &field, TAP_IDLE);
 	jtag_add_runtest(2, TAP_IDLE);
 	return jtag_execute_queue();

-----------------------------------------------------------------------

Summary of changes:
 LICENSES/preferred/CC0-1.0              | 130 ++++++++++++++++++++++++++++++++
 Makefile.am                             |   1 +
 contrib/rtos-helpers/FreeRTOS-openocd.c |   2 +-
 src/pld/certus.c                        |   1 +
 4 files changed, 133 insertions(+), 1 deletion(-)
 create mode 100644 LICENSES/preferred/CC0-1.0


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- Log -----------------------------------------------------------------
commit 5b878b6e8b23d4c4b7aa3bf157c262e4f8620882
Author: Nishanth Menon <nm...@ti...>
Date:   Tue Oct 17 16:10:17 2023 -0500

    tcl/board: Add TI AM273 launchpad config
    
    Add basic connection details with AM273 Launchpad
    
    For further details, see: https://www.ti.com/tool/LP-AM273
    
    Change-Id: I88a02cdbccb65c185e808503d080cc1f12c909ae
    Signed-off-by: Nishanth Menon <nm...@ti...>
    Reviewed-on: https://review.openocd.org/c/openocd/+/7951
    Tested-by: jenkins
    Reviewed-by: Antonio Borneo <bor...@gm...>

diff --git a/tcl/board/ti_am273_launchpad.cfg b/tcl/board/ti_am273_launchpad.cfg
new file mode 100644
index 000000000..c17170bf1
--- /dev/null
+++ b/tcl/board/ti_am273_launchpad.cfg
@@ -0,0 +1,25 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+# Copyright (C) 2023 Texas Instruments Incorporated - http://www.ti.com/
+#
+# Texas Instruments AM273 Launchpad
+# https://www.ti.com/tool/LP-AM273
+#
+
+# AM273 Launchpad has an xds110 onboard.
+source [find interface/xds110.cfg]
+
+transport select jtag
+
+# default JTAG configuration has only SRST and no TRST
+reset_config srst_only srst_push_pull
+
+# delay after SRST goes inactive
+adapter srst delay 20
+
+if { ![info exists SOC] } {
+	set SOC am273
+}
+
+source [find target/ti_k3.cfg]
+
+adapter speed 250

commit cb60f75a56ba54b5a52da00add5312f94bb67c86
Author: Nishanth Menon <nm...@ti...>
Date:   Tue Oct 17 16:07:41 2023 -0500

    tcl/target/ti_k3: Add AM273 SoC
    
    Add support for the TI K3 family AM273 SoC.
    
    For further details, see https://www.ti.com/lit/pdf/spruiu0
    
    Change-Id: Ifa21d0760831f4f525ecd976fb8d086ffdbc9e9f
    Signed-off-by: Nishanth Menon <nm...@ti...>
    Reviewed-on: https://review.openocd.org/c/openocd/+/7950
    Reviewed-by: Antonio Borneo <bor...@gm...>
    Tested-by: jenkins

diff --git a/tcl/target/ti_k3.cfg b/tcl/target/ti_k3.cfg
index 24b3fae87..23825b86b 100644
--- a/tcl/target/ti_k3.cfg
+++ b/tcl/target/ti_k3.cfg
@@ -6,6 +6,8 @@
 #  Has 4 R5 Cores, M4F and an M3
 # * AM263: https://www.ti.com/lit/pdf/spruj17
 #  Has 4 R5 Cores and an M3
+# * AM273: https://www.ti.com/lit/pdf/spruiu0
+#  Has 2 R5 Cores and an M3
 # * AM625: https://www.ti.com/lit/pdf/spruiv7a
 #  Has 4 ARMV8 Cores and 1 R5 Core and an M4F
 # * AM62A7: https://www.ti.com/lit/pdf/spruj16a
@@ -91,6 +93,25 @@ switch $_soc {
 		set R5_CTIBASE {0x90038000 0x90039000 0x90058000 0x90059000}
 		set _r5_ap_num 5
 	}
+	am273 {
+		set _K3_DAP_TAPID 0x1bb6a02f
+
+		# Mem-ap port
+		set _mem_ap_num 6
+
+		# system controller is on AP0
+		set _sysctrl_ap_num 0
+
+		# AM273 has 0 ARMV8 CPUs
+		set _armv8_cores 0
+
+		# AM273 has 1 cluster of 2 R5s cores.
+		set _r5_cores 2
+		set R5_NAMES {main0_r5.0 main0_r5.1}
+		set R5_DBGBASE {0x90030000 0x90032000}
+		set R5_CTIBASE {0x90038000 0x90039000}
+		set _r5_ap_num 5
+	}
 	am654 {
 		set _K3_DAP_TAPID 0x0bb5a02f
 

commit 17f34355e550900c6563431c35517c8e082cd5e2
Author: Nishanth Menon <nm...@ti...>
Date:   Tue Oct 17 16:02:44 2023 -0500

    tcl/board: Add TI AM263 launchpad config
    
    Add basic connection details with AM263 Launchpad
    
    For further details, see: https://www.ti.com/tool/LP-AM263
    
    Change-Id: I94c7a9ca70734ae89c6df3f02137d5bd32fde774
    Signed-off-by: Nishanth Menon <nm...@ti...>
    Reviewed-on: https://review.openocd.org/c/openocd/+/7949
    Reviewed-by: Antonio Borneo <bor...@gm...>
    Tested-by: jenkins

diff --git a/tcl/board/ti_am263_launchpad.cfg b/tcl/board/ti_am263_launchpad.cfg
new file mode 100644
index 000000000..a07a21b3d
--- /dev/null
+++ b/tcl/board/ti_am263_launchpad.cfg
@@ -0,0 +1,25 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+# Copyright (C) 2023 Texas Instruments Incorporated - http://www.ti.com/
+#
+# Texas Instruments AM263 Launchpad
+# https://www.ti.com/tool/LP-AM263
+#
+
+# AM263 Launchpad has an xds110 onboard.
+source [find interface/xds110.cfg]
+
+transport select jtag
+
+# default JTAG configuration has only SRST and no TRST
+reset_config srst_only srst_push_pull
+
+# delay after SRST goes inactive
+adapter srst delay 20
+
+if { ![info exists SOC] } {
+	set SOC am263
+}
+
+source [find target/ti_k3.cfg]
+
+adapter speed 250

commit e4e94a355d4cfd79a98df8ceefa8432a3a14d076
Author: Nishanth Menon <nm...@ti...>
Date:   Tue Oct 17 16:00:27 2023 -0500

    tcl/target/ti_k3: Add AM263 SoC
    
    Add support for the TI K3 family AM263 SoC.
    
    For further details, see https://www.ti.com/lit/pdf/spruim2
    
    Change-Id: I9a91b3d675511661dfc2710a7183bd59b98da133
    Signed-off-by: Nishanth Menon <nm...@ti...>
    Reviewed-on: https://review.openocd.org/c/openocd/+/7948
    Tested-by: jenkins
    Reviewed-by: Antonio Borneo <bor...@gm...>

diff --git a/tcl/target/ti_k3.cfg b/tcl/target/ti_k3.cfg
index e4a235b29..24b3fae87 100644
--- a/tcl/target/ti_k3.cfg
+++ b/tcl/target/ti_k3.cfg
@@ -4,6 +4,8 @@
 # Texas Instruments K3 devices:
 # * AM243: https://www.ti.com/lit/pdf/spruim2
 #  Has 4 R5 Cores, M4F and an M3
+# * AM263: https://www.ti.com/lit/pdf/spruj17
+#  Has 4 R5 Cores and an M3
 # * AM625: https://www.ti.com/lit/pdf/spruiv7a
 #  Has 4 ARMV8 Cores and 1 R5 Core and an M4F
 # * AM62A7: https://www.ti.com/lit/pdf/spruj16a
@@ -73,6 +75,22 @@ set _mem_ap_num 2
 
 # Set configuration overrides for each SOC
 switch $_soc {
+	am263 {
+		set _K3_DAP_TAPID 0x2bb7d02f
+
+		# Mem-ap port
+		set _mem_ap_num 6
+
+		# AM263 has 0 ARMV8 CPUs
+		set _armv8_cores 0
+
+		# AM263 has 2 cluster of 2 R5s cores.
+		set _r5_cores 4
+		set R5_NAMES {main0_r5.0 main0_r5.1 main1_r5.0 main1_r5.1}
+		set R5_DBGBASE {0x90030000 0x90032000 0x90050000 0x90052000}
+		set R5_CTIBASE {0x90038000 0x90039000 0x90058000 0x90059000}
+		set _r5_ap_num 5
+	}
 	am654 {
 		set _K3_DAP_TAPID 0x0bb5a02f
 

commit ba39343e3d5e1c8878f314e496172d829c22e231
Author: Nishanth Menon <nm...@ti...>
Date:   Tue Oct 17 15:53:59 2023 -0500

    tcl/board: Add TI AM243 launchpad config
    
    Add basic connection details with AM243 Launchpad
    
    For further details, see: https://www.ti.com/tool/LP-AM243
    
    Change-Id: Id8cec6675a222888b0007484209558d6503dbcda
    Signed-off-by: Nishanth Menon <nm...@ti...>
    Reviewed-on: https://review.openocd.org/c/openocd/+/7947
    Tested-by: jenkins
    Reviewed-by: Antonio Borneo <bor...@gm...>

diff --git a/tcl/board/ti_am243_launchpad.cfg b/tcl/board/ti_am243_launchpad.cfg
new file mode 100644
index 000000000..aa75dda88
--- /dev/null
+++ b/tcl/board/ti_am243_launchpad.cfg
@@ -0,0 +1,25 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+# Copyright (C) 2023 Texas Instruments Incorporated - http://www.ti.com/
+#
+# Texas Instruments AM243 Launchpad
+# https://www.ti.com/tool/LP-AM243
+#
+
+# AM243 Launchpad has an xds110 onboard.
+source [find interface/xds110.cfg]
+
+transport select jtag
+
+# default JTAG configuration has only SRST and no TRST
+reset_config srst_only srst_push_pull
+
+# delay after SRST goes inactive
+adapter srst delay 20
+
+if { ![info exists SOC] } {
+	set SOC am243
+}
+
+source [find target/ti_k3.cfg]
+
+adapter speed 250

commit a646057c7eaf52e077afac98405c2aa2fa7d96bb
Author: Nishanth Menon <nm...@ti...>
Date:   Tue Oct 17 15:50:49 2023 -0500

    tcl/target/ti_k3: Add AM243 SoC
    
    Add support for the TI K3 family AM243 SoC. This SoC is built on the
    same base of AM642, so reuse the configuration with the exception of
    Cortex-A53 which is not available on this device.
    
    For further details, see https://www.ti.com/lit/pdf/spruim2
    
    Change-Id: I971ba878b0f503e5120f6853634776eb61d05080
    Signed-off-by: Nishanth Menon <nm...@ti...>
    Reviewed-on: https://review.openocd.org/c/openocd/+/7946
    Tested-by: jenkins
    Reviewed-by: Antonio Borneo <bor...@gm...>

diff --git a/tcl/target/ti_k3.cfg b/tcl/target/ti_k3.cfg
index f1f8994f1..e4a235b29 100644
--- a/tcl/target/ti_k3.cfg
+++ b/tcl/target/ti_k3.cfg
@@ -2,6 +2,8 @@
 # Copyright (C) 2019-2021 Texas Instruments Incorporated - http://www.ti.com/
 #
 # Texas Instruments K3 devices:
+# * AM243: https://www.ti.com/lit/pdf/spruim2
+#  Has 4 R5 Cores, M4F and an M3
 # * AM625: https://www.ti.com/lit/pdf/spruiv7a
 #  Has 4 ARMV8 Cores and 1 R5 Core and an M4F
 # * AM62A7: https://www.ti.com/lit/pdf/spruj16a
@@ -85,6 +87,7 @@ switch $_soc {
 		# Sysctrl power-ap unlock offsets
 		set _sysctrl_ap_unlock_offsets {0xf0 0x50}
 	}
+	am243 -
 	am642 {
 		set _K3_DAP_TAPID 0x0bb3802f
 
@@ -102,6 +105,12 @@ switch $_soc {
 
 		# M4 processor
 		set _gp_mcu_cores 1
+
+		# Overrides for am243
+		if { "$_soc" == "am243" } {
+			# Uses the same JTAG ID
+			set _armv8_cores 0
+		}
 	}
 	am625 {
 		set _K3_DAP_TAPID 0x0bb7e02f

commit 7919b0965b1b75a9e1a8fe33defb83528196683e
Author: Nishanth Menon <nm...@ti...>
Date:   Tue Oct 17 15:47:12 2023 -0500

    tcl/target/ti_k3: Sort the SoC documentation alphabetically
    
    Sort the documentation for the TI K3 parts alphabetically.
    
    Change-Id: I2c40714ad590e3d9232a6f915c157d677e0c3610
    Signed-off-by: Nishanth Menon <nm...@ti...>
    Reviewed-on: https://review.openocd.org/c/openocd/+/7945
    Reviewed-by: Antonio Borneo <bor...@gm...>
    Tested-by: jenkins

diff --git a/tcl/target/ti_k3.cfg b/tcl/target/ti_k3.cfg
index 4e563f2be..f1f8994f1 100644
--- a/tcl/target/ti_k3.cfg
+++ b/tcl/target/ti_k3.cfg
@@ -2,24 +2,24 @@
 # Copyright (C) 2019-2021 Texas Instruments Incorporated - http://www.ti.com/
 #
 # Texas Instruments K3 devices:
+# * AM625: https://www.ti.com/lit/pdf/spruiv7a
+#  Has 4 ARMV8 Cores and 1 R5 Core and an M4F
+# * AM62A7: https://www.ti.com/lit/pdf/spruj16a
+#  Has 4 ARMV8 Cores and 2 R5 Cores
+# * AM62P: https://www.ti.com/lit/pdf/spruj83
+#  Has 4 ARMV8 Cores and 2 R5 Cores
+# * AM642: https://www.ti.com/lit/pdf/spruim2
+#  Has 2 ARMV8 Cores and 4 R5 Cores, M4F and an M3
 # * AM654x: https://www.ti.com/lit/pdf/spruid7
 #  Has 4 ARMV8 Cores and 2 R5 Cores and an M3
-# * J721E: https://www.ti.com/lit/pdf/spruil1
-#  Has 2 ARMV8 Cores and 6 R5 Cores and an M3
 # * J7200: https://www.ti.com/lit/pdf/spruiu1
 #  Has 2 ARMV8 Cores and 4 R5 Cores and an M3
+# * J721E: https://www.ti.com/lit/pdf/spruil1
+#  Has 2 ARMV8 Cores and 6 R5 Cores and an M3
 # * J721S2: https://www.ti.com/lit/pdf/spruj28
 #  Has 2 ARMV8 Cores and 6 R5 Cores and an M4F
 # * J784S4/AM69: http://www.ti.com/lit/zip/spruj52
 #  Has 8 ARMV8 Cores and 8 R5 Cores
-# * AM642: https://www.ti.com/lit/pdf/spruim2
-#  Has 2 ARMV8 Cores and 4 R5 Cores, M4F and an M3
-# * AM625: https://www.ti.com/lit/pdf/spruiv7a
-#  Has 4 ARMV8 Cores and 1 R5 Core and an M4F
-# * AM62a7: https://www.ti.com/lit/pdf/spruj16a
-#  Has 4 ARMV8 Cores and 2 R5 Cores
-# * AM62P: https://www.ti.com/lit/pdf/spruj83
-#  Has 4 ARMV8 Cores and 2 R5 Cores
 #
 
 source [find target/swj-dp.tcl]

commit 9a79dfb709ad84d243cb866928b4253c7ea45078
Author: Nishanth Menon <nm...@ti...>
Date:   Tue Oct 17 15:36:55 2023 -0500

    tcl/target/ti_k3: Make Cortex-A processors optional
    
    The AM2x family of K3 SoCs typically do not contain a Cortex-A53 or
    A72 processor. So, make the cpu "up" functions available when armv8
    processor count > 0.
    
    Change-Id: I985b194fe7cc63e4134ad84ccd921cc456eb412f
    Signed-off-by: Nishanth Menon <nm...@ti...>
    Reviewed-on: https://review.openocd.org/c/openocd/+/7944
    Tested-by: jenkins
    Reviewed-by: Antonio Borneo <bor...@gm...>

diff --git a/tcl/target/ti_k3.cfg b/tcl/target/ti_k3.cfg
index bb2a991ce..4e563f2be 100644
--- a/tcl/target/ti_k3.cfg
+++ b/tcl/target/ti_k3.cfg
@@ -341,24 +341,26 @@ for { set _core 0 } { $_core < $_armv8_cores } { incr _core } {
 	}
 }
 
-# Setup ARMV8 proc commands based on CPU to prevent people confusing SoCs
-set _armv8_up_cmd "$_armv8_cpu_name"_up
-# Available if V8_SMP_DEBUG is set to non-zero value
-set _armv8_smp_cmd "$_armv8_cpu_name"_smp
-
-if { $_v8_smp_debug == 0 } {
-	proc $_armv8_up_cmd { args } {
-		foreach _core $args {
-			targets $_core
-			_cpu_no_smp_up
+if { $_armv8_cores > 0 } {
+	# Setup ARMV8 proc commands based on CPU to prevent people confusing SoCs
+	set _armv8_up_cmd "$_armv8_cpu_name"_up
+	# Available if V8_SMP_DEBUG is set to non-zero value
+	set _armv8_smp_cmd "$_armv8_cpu_name"_smp
+
+	if { $_v8_smp_debug == 0 } {
+		proc $_armv8_up_cmd { args } {
+			foreach _core $args {
+				targets $_core
+				_cpu_no_smp_up
+			}
 		}
+	} else {
+		proc $_armv8_smp_cmd { args } {
+			_armv8_smp_up
+		}
+		# Declare SMP
+		target smp {*}$_v8_smp_targets
 	}
-} else {
-	proc $_armv8_smp_cmd { args } {
-		_armv8_smp_up
-	}
-	# Declare SMP
-	target smp {*}$_v8_smp_targets
 }
 
 for { set _core 0 } { $_core < $_r5_cores } { incr _core } {

-----------------------------------------------------------------------

Summary of changes:
 .../{ti_am62pevm.cfg => ti_am243_launchpad.cfg}    |   9 +-
 .../{ti_am62pevm.cfg => ti_am263_launchpad.cfg}    |   9 +-
 .../{ti_am62pevm.cfg => ti_am273_launchpad.cfg}    |   9 +-
 tcl/target/ti_k3.cfg                               | 100 +++++++++++++++------
 4 files changed, 90 insertions(+), 37 deletions(-)
 copy tcl/board/{ti_am62pevm.cfg => ti_am243_launchpad.cfg} (73%)
 copy tcl/board/{ti_am62pevm.cfg => ti_am263_launchpad.cfg} (73%)
 copy tcl/board/{ti_am62pevm.cfg => ti_am273_launchpad.cfg} (73%)


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From: openocd-gerrit <ope...@us...> - 2023-11-11 18:44:55

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- Log -----------------------------------------------------------------
commit 5ea20d7ed99e252947a85f93db870109cc094efc
Author: Nishanth Menon <nm...@ti...>
Date:   Wed Oct 18 13:45:39 2023 -0500

    tcl/target/ti_k3: Convert memory access ap port num as a variable
    
    Convert the memory access ap port num as a variable to allow support
    for the AM2x family of K3 SoCs.
    
    Change-Id: Ibd96c94055721f60d95179dab21d014c15b0f562
    Signed-off-by: Nishanth Menon <nm...@ti...>
    Reviewed-on: https://review.openocd.org/c/openocd/+/7943
    Reviewed-by: Antonio Borneo <bor...@gm...>
    Tested-by: jenkins

diff --git a/tcl/target/ti_k3.cfg b/tcl/target/ti_k3.cfg
index e05b81a17..bb2a991ce 100644
--- a/tcl/target/ti_k3.cfg
+++ b/tcl/target/ti_k3.cfg
@@ -66,6 +66,9 @@ set _gp_mcu_cores 0
 # General Purpose MCU power-ap unlock offsets
 set _gp_mcu_ap_unlock_offsets {0xf0 0x60}
 
+# Generic mem-ap port number
+set _mem_ap_num 2
+
 # Set configuration overrides for each SOC
 switch $_soc {
 	am654 {
@@ -423,5 +426,5 @@ if { 0 == [string compare [adapter name] dmem ] } {
 	}
 } else {
 	# AXI AP access port for SoC address map
-	target create $_CHIPNAME.axi_ap mem_ap -dap $_CHIPNAME.dap -ap-num 2
+	target create $_CHIPNAME.axi_ap mem_ap -dap $_CHIPNAME.dap -ap-num $_mem_ap_num
 }

commit 4b879bb01737f11a11f05c3b4feb09e6ddc85a5d
Author: Nishanth Menon <nm...@ti...>
Date:   Tue Oct 17 13:56:00 2023 -0500

    tcl/target/ti_k3: Convert Cortex-R5 ap port num as a variable
    
    Convert the Cortex-R5 ap port num as a variable to allow support for
    the AM2x family of K3 SoCs.
    
    Change-Id: I7dc8b459dca8b5f21395230b5cb782b14538bd48
    Signed-off-by: Nishanth Menon <nm...@ti...>
    Reviewed-on: https://review.openocd.org/c/openocd/+/7942
    Reviewed-by: Antonio Borneo <bor...@gm...>
    Tested-by: jenkins

diff --git a/tcl/target/ti_k3.cfg b/tcl/target/ti_k3.cfg
index 78ee8b2ca..e05b81a17 100644
--- a/tcl/target/ti_k3.cfg
+++ b/tcl/target/ti_k3.cfg
@@ -56,6 +56,7 @@ set ARMV8_CTIBASE {0x90420000 0x90520000 0x90820000 0x90920000}
 set R5_DBGBASE {0x9d010000 0x9d012000 0x9d410000 0x9d412000 0x9d510000 0x9d512000}
 set R5_CTIBASE {0x9d018000 0x9d019000 0x9d418000 0x9d419000 0x9d518000 0x9d519000}
 set R5_NAMES {mcu_r5.0 mcu_r5.1 main0_r5.0 main0_r5.1 main1_r5.0 main1_r5.1}
+set _r5_ap_num 1
 
 # Finally an General Purpose(GP) MCU
 set CM4_CTIBASE		{0x20001000}
@@ -359,12 +360,12 @@ if { $_v8_smp_debug == 0 } {
 
 for { set _core 0 } { $_core < $_r5_cores } { incr _core } {
 	set _r5_name [lindex $R5_NAMES $_core]
-	cti create $_CTINAME.$_r5_name -dap $_CHIPNAME.dap -ap-num 1 \
+	cti create $_CTINAME.$_r5_name -dap $_CHIPNAME.dap -ap-num $_r5_ap_num \
 		-baseaddr [lindex $R5_CTIBASE $_core]
 
 	# inactive core examination will fail - wait till startup of additional core
 	target create $_TARGETNAME.$_r5_name cortex_r4 -dap $_CHIPNAME.dap \
-		-dbgbase [lindex $R5_DBGBASE $_core] -ap-num 1 -defer-examine \
+		-dbgbase [lindex $R5_DBGBASE $_core] -ap-num $_r5_ap_num -defer-examine \
 		-rtos [_get_rtos_type_for_cpu $_TARGETNAME.$_r5_name]
 
 	$_TARGETNAME.$_r5_name configure -event gdb-attach {

-----------------------------------------------------------------------

Summary of changes:
 tcl/target/ti_k3.cfg | 10 +++++++---
 1 file changed, 7 insertions(+), 3 deletions(-)


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From: openocd-gerrit <ope...@us...> - 2023-11-11 18:44:41

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The branch, master has been updated
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- Log -----------------------------------------------------------------
commit 00b07390826f7cd5f72bc036e3907a87c6cbc33d
Author: Nishanth Menon <nm...@ti...>
Date:   Tue Oct 17 13:51:51 2023 -0500

    tcl/target/ti_k3: Convert sysctrl ap port num as a variable
    
    Convert the sysctrl ap port num as a variable to allow support for the
    AM2x family of K3 SoCs.
    
    Change-Id: I1b5b55e48240e6654779dd636fdf07bca055e192
    Signed-off-by: Nishanth Menon <nm...@ti...>
    Reviewed-on: https://review.openocd.org/c/openocd/+/7941
    Tested-by: jenkins
    Reviewed-by: Antonio Borneo <bor...@gm...>

diff --git a/tcl/target/ti_k3.cfg b/tcl/target/ti_k3.cfg
index 1cd85eec3..78ee8b2ca 100644
--- a/tcl/target/ti_k3.cfg
+++ b/tcl/target/ti_k3.cfg
@@ -44,6 +44,7 @@ set CM3_CTIBASE		{0x3C016000}
 
 # sysctrl power-ap unlock offsets
 set _sysctrl_ap_unlock_offsets {0xf0 0x44}
+set _sysctrl_ap_num 7
 
 # All the ARMV8s are the next processors.
 #		   CL0,CORE0  CL0,CORE1  CL1,CORE0  CL1,CORE1
@@ -266,9 +267,11 @@ set _TARGETNAME $_CHIPNAME.cpu
 set _CTINAME $_CHIPNAME.cti
 
 # sysctrl is always present
-cti create $_CTINAME.sysctrl -dap $_CHIPNAME.dap -ap-num 7 -baseaddr [lindex $CM3_CTIBASE 0]
+cti create $_CTINAME.sysctrl -dap $_CHIPNAME.dap \
+	-ap-num $_sysctrl_ap_num -baseaddr [lindex $CM3_CTIBASE 0]
 
-target create $_TARGETNAME.sysctrl cortex_m -dap $_CHIPNAME.dap -ap-num 7 -defer-examine \
+target create $_TARGETNAME.sysctrl cortex_m -dap $_CHIPNAME.dap \
+	-ap-num $_sysctrl_ap_num -defer-examine \
 	-rtos [_get_rtos_type_for_cpu $_TARGETNAME.sysctrl]
 
 $_TARGETNAME.sysctrl configure -event reset-assert { }

-----------------------------------------------------------------------

Summary of changes:
 tcl/target/ti_k3.cfg | 7 +++++--
 1 file changed, 5 insertions(+), 2 deletions(-)


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commit 42441fd96cf86ffca61f77afe24aae21fb00bb89
Author: Peter Collingbourne <pc...@go...>
Date:   Thu Oct 19 19:07:29 2023 -0700

    target: Add a debug_reason command
    
    This allows programmatically determining the debug reason.
    
    Change-Id: I0c3e85cebb6dc28fc0fc212beca84a484ac654a5
    Signed-off-by: Peter Collingbourne <pc...@go...>
    Reviewed-on: https://review.openocd.org/c/openocd/+/7952
    Reviewed-by: Jan Matyas <jan...@co...>
    Reviewed-by: Tomas Vanek <va...@fb...>
    Reviewed-by: Antonio Borneo <bor...@gm...>
    Tested-by: jenkins

diff --git a/doc/openocd.texi b/doc/openocd.texi
index a2965189f..45c2e4df5 100644
--- a/doc/openocd.texi
+++ b/doc/openocd.texi
@@ -5296,6 +5296,18 @@ Displays the current target state:
 (Also, @pxref{eventpolling,,Event Polling}.)
 @end deffn
 
+@deffn {Command} {$target_name debug_reason}
+Displays the current debug reason:
+@code{debug-request},
+@code{breakpoint},
+@code{watchpoint},
+@code{watchpoint-and-breakpoint},
+@code{single-step},
+@code{target-not-halted},
+@code{program-exit},
+@code{exception-catch} or @code{undefined}.
+@end deffn
+
 @deffn {Command} {$target_name eventlist}
 Displays a table listing all event handlers
 currently associated with this target.
diff --git a/src/target/target.c b/src/target/target.c
index 61c243510..d368cb515 100644
--- a/src/target/target.c
+++ b/src/target/target.c
@@ -5874,6 +5874,18 @@ COMMAND_HANDLER(handle_target_current_state)
 	return ERROR_OK;
 }
 
+COMMAND_HANDLER(handle_target_debug_reason)
+{
+	if (CMD_ARGC != 0)
+		return ERROR_COMMAND_SYNTAX_ERROR;
+
+	struct target *target = get_current_target(CMD_CTX);
+
+	command_print(CMD, "%s", debug_reason_name(target));
+
+	return ERROR_OK;
+}
+
 static int jim_target_invoke_event(Jim_Interp *interp, int argc, Jim_Obj *const *argv)
 {
 	struct jim_getopt_info goi;
@@ -6025,6 +6037,13 @@ static const struct command_registration target_instance_command_handlers[] = {
 		.help = "displays the current state of this target",
 		.usage = "",
 	},
+	{
+		.name = "debug_reason",
+		.mode = COMMAND_EXEC,
+		.handler = handle_target_debug_reason,
+		.help = "displays the debug reason of this target",
+		.usage = "",
+	},
 	{
 		.name = "arp_examine",
 		.mode = COMMAND_EXEC,

-----------------------------------------------------------------------

Summary of changes:
 doc/openocd.texi    | 12 ++++++++++++
 src/target/target.c | 19 +++++++++++++++++++
 2 files changed, 31 insertions(+)


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