openocd-commit — OpenOCD commit maling list - read only

[Openocd-svn] r2789 - trunk/src/target

[<ml...@ma...>]

Author: mlu
Date: 2009-10-01 19:39:13 +0200 (Thu, 01 Oct 2009)
New Revision: 2789

Modified:
   trunk/src/target/armv7a.c
Log:
ARMv7A: Report fault status registers when in Abort state

Modified: trunk/src/target/armv7a.c
===================================================================
--- trunk/src/target/armv7a.c	2009-09-30 23:20:52 UTC (rev 2788)
+++ trunk/src/target/armv7a.c	2009-10-01 17:39:13 UTC (rev 2789)
@@ -173,6 +173,26 @@
 			0, 1, 96, NULL, 0, NULL, 0
 };
 
+void armv7a_show_fault_registers(target_t *target)
+{
+	uint32_t dfsr, ifsr, dfar, ifar;
+	
+	/* get pointers to arch-specific information */
+	armv4_5_common_t *armv4_5 = target->arch_info;
+	armv7a_common_t *armv7a = armv4_5->arch_info;
+
+	armv7a->read_cp15(target, 0, 0, 5, 0, &dfsr);
+	armv7a->read_cp15(target, 0, 1, 5, 0, &ifsr);
+	armv7a->read_cp15(target, 0, 0, 6, 0, &dfar);
+	armv7a->read_cp15(target, 0, 2, 6, 0, &ifar);
+
+	LOG_USER("Data fault registers        DFSR: %8.8" PRIx32 
+			", DFAR: %8.8" PRIx32, dfsr, dfar);
+	LOG_USER("Instruction fault registers IFSR: %8.8" PRIx32 
+			", IFAR: %8.8" PRIx32, ifsr, ifar);
+
+}
+
 int armv7a_arch_state(struct target_s *target)
 {
 	static const char *state[] =
@@ -206,6 +226,9 @@
 		 state[armv7a->armv4_5_mmu.armv4_5_cache.d_u_cache_enabled],
 		 state[armv7a->armv4_5_mmu.armv4_5_cache.i_cache_enabled]);
 
+	if (armv4_5->core_mode == ARMV7A_MODE_ABT)
+		armv7a_show_fault_registers(target);
+
 	return ERROR_OK;
 }
 

[Openocd-svn] r2788 - trunk/doc/manual

[<zw...@ma...>]

Author: zwelch
Date: 2009-10-01 01:20:52 +0200 (Thu, 01 Oct 2009)
New Revision: 2788

Modified:
   trunk/doc/manual/release.txt
Log:
Update release process documentation.
- Improve and clarify the wording of the introduction.
- Add section on version taggging.
- Some other minor corrections.


Modified: trunk/doc/manual/release.txt
===================================================================
--- trunk/doc/manual/release.txt	2009-09-30 23:20:43 UTC (rev 2787)
+++ trunk/doc/manual/release.txt	2009-09-30 23:20:52 UTC (rev 2788)
@@ -14,35 +14,35 @@
 
 @section releasewhy Why Produce Releases?
 
-The OpenOCD maintainers should produce <i>releases</i> periodically.  This
-section gives several reasons to explain the reasons for making releases
-on a regular basis.  These reasons lead to motivation for developing and
-following a set of <i>release processes</i>.  The actual processes are
-described in the remainder of the @ref releases sections.
+The OpenOCD maintainers produce <i>releases</i> periodically for many
+reasons.  This section provides the key reasons for making releases on a
+regular basis and why a set of <i>release processes</i> should be used
+to produce them.
 
-At any time, a "source archives" can be produced by running 'make dist'
-in the OpenOCD project tree.  With the 0.2.0 release, this command will
-produce openocd-\<version\>.{tar.gz,tar.bz2,zip} archives.  These files
-will be suitable for being released when produced properly.
+At any time, <i>source archives</i> can be produced by running
+<code>make dist</code> in the OpenOCD project tree.  With the 0.2.0
+release, this command will package the tree into several popular archive
+formats: <code>openocd-\<version\>.{tar.gz,tar.bz2,zip}</code>.  If
+produced properly, these files are suitable for release to the public.
 
 When released for users, these archives present several important
-advantages when contrasted to using the Subversion repository:
+advantages when contrasted to using the Subversion repository trunk:
 
--# They allow others to package and distribute the code to users.
+-# They allow others to package and distribute the code.
 -# They build easier for developers, because they contain
    a working configure script that was produced by the Release Manager.
 -# They prevent users from trying a random HEAD revision of the trunk.
 -# They free developers from answering questions about trunk breakage.
 
 Hopefully, this shows several good reasons to produce regular releases,
-but these release processes were developed with some additional design
+but the release processes were developed with some additional design
 goals in mind.  Specifically, the releases processes should have the
 following properties:
 
--# Produce successive sets of release archives cleanly and consistently.
--# Implementable as a script that automates the critical release steps.
--# Prevent human operators from producing bad releases, when possible.
--# Allow scheduling and automation of release process milestones.
+-# Produce successive sets of archives cleanly and consistently.
+-# Implementable as a script that automates the critical steps.
+-# Prevent human operators from producing broken packages, when possible.
+-# Allow scheduling and automation of building and publishing milestones.
 
 The current release processes are documented in the following sections.
 They attempt to meet these design goals, but there may improvements
@@ -59,6 +59,11 @@
 number will be zero (<code>z = 0</code>).  For a <i>major releases</i>,
 the minor version will @a also be zero (<code>y = 0, z = 0</code>).
 
+@subsection releaseversiontags Version Tags
+
+After these required numeric components, the version string may contain
+one or more <i>version tags</i>, such as '-rc1' or '-in-development'.
+
 The trunk and all branches should have the tag '-in-development' in
 their version number.  This tag helps developers identify reports
 created from the Subversion repository, and it can be detected and
@@ -66,20 +71,38 @@
 removed and re-added during the release process; it should never be
 manipulated by developers in submitted patches.
 
-@subsection releaseversionsdist Patched Versions
+The 'rc' tags indicate a "release candidate" version of the package.
+This tag will also be manipulated by the automated release process.
 
-Distributors of patched versions of OpenOCD are encouraged to extend
-the version string when producing external releases, as this helps to
-identify your particular distribution series.
+Additional tags may be used as necessary.
 
-@subsection releaseversionsdist Version Processes
+@subsection releaseversionsdist Packager Versions
 
+Distributors of patched versions of OpenOCD are encouraged to extend the
+version string with a unique version tag when producing external
+releases, as this helps to identify your particular distribution series.
+
+For example, the following command will add a 'foo1' tag to the
+configure.in script of a local copy of the source tree:
+
+@code
+tools/release.sh version bump tag foo
+@endcode
+
+This command will modify the configure.in script in your working copy
+only.  After running the @c bootstrap sequence, the tree can be patched
+and used to produce your own derived versions.  The same command can be
+used each time the derived package is released, incrementing the tag's
+version to facilitate tracking the changes you have distributed.
+
+@subsection releaseversionhow Version Processes
+
 The release process includes version number manipulations to the tree
 being released, ensuring that all numbers are incremented at the right
 time and in the proper locations of the repository.
 
-The version numbers for any branch should monotonically
-increase to the next successive integer, except when reset to zero
+The version numbers for any branch should increase monotonically
+to the next successive integer, except when reset to zero
 during major or minor releases.  The community should decide when
 major and minor milestones will be released.
 
@@ -169,7 +192,7 @@
 
 Despite any assurances this schedule may appear to give, the Release
 Manager cannot schedule the work that will be done on the project,
-when it will be submitted, review, and deemed suitable to be committed.
+when it will be submitted, reviewed, and deemed suitable to be committed.
 In this way, the RM cannot act as a priest in a cathedral; OpenOCD uses
 the bazaar development model.  The release schedule must adapt
 continuously in response to changes in the rate of churn.
@@ -179,7 +202,7 @@
 required if developers contribute less patches, and more releases may be
 desirable if the project continues to grow and experience high rates of
 community contribution.  During each cycle, the RM should be tracking
-the situation and gathering feedback from the community .
+the situation and gathering feedback from the community.
 
 @section releasehow Release Process: Step-by-Step
 
@@ -304,7 +327,7 @@
 
 Run <code>tools/release.sh help</code> for current command support.
 
-@subsection releasescriptenv Release Script Options
+@subsection releasescriptopts Release Script Options
 
 The @c release.sh script recognizes some command-line options that
 affect its behavior:

[Openocd-svn] r2787 - trunk/tools

[<zw...@ma...>]

Author: zwelch
Date: 2009-10-01 01:20:43 +0200 (Thu, 01 Oct 2009)
New Revision: 2787

Modified:
   trunk/tools/release.sh
Log:
Improve release script version tag management commands.


Modified: trunk/tools/release.sh
===================================================================
--- trunk/tools/release.sh	2009-09-30 23:20:36 UTC (rev 2786)
+++ trunk/tools/release.sh	2009-09-30 23:20:43 UTC (rev 2787)
@@ -282,9 +282,10 @@
 usage: $0 version <command>
 Version Commands:
   tag {add|remove} <label>     Add or remove the specified tag.
-  bump {major|minor|micro|rc}  Bump the specified version number;
-                               resets less-significant numbers to zero.
-			       All but 'rc' releases drop that tag.
+  bump {major|minor|micro}     Bump the specified version number, and
+                               reset less-significant numbers to zero.
+  bump tag <label>             Add or bump a versioned tag (e.g. -rcN).
+  bump final <label>           Remove a versioned tag (e.g. -rcN).
 USAGE
 }
 
@@ -319,7 +320,7 @@
 	[ "${TAG}" ] || die "TAG argument is missing"
 	local TAGS="${PACKAGE_VERSION_TAGS}"
 	if has_version_tag "${TAG}"; then
-		local RC=$(echo ${TAGS} | perl -ne "/-${TAG}"'(\d+)/ && print $1')
+		local RC=$(do_version_tag_value "${TAG}")
 		RC=$((${RC} + 1))
 		TAGS=$(echo ${TAGS} | perl -npe "s/-${TAG}[\\d]*/-${TAG}${RC}/")
 	else
@@ -328,12 +329,17 @@
 	PACKAGE_VERSION_TAGS="${TAGS}"
 	do_version_bump_sed "${PACKAGE_VERSION_BASE}"
 }
-do_version_bump_rc() { do_version_bump_tag 'rc'; }
+do_version_bump_final() {
+	local TAG="$1"
+	[ "${TAG}" ] || die "TAG argument is missing"
+	has_version_tag "${TAG}" || die "-${TAG} tag is missing"
+	do_version_tag_remove "${TAG}$(do_version_tag_value "${TAG}")"
+}
 do_version_bump() {
 	CMD="$1"
 	shift
 	case "${CMD}" in
-	major|minor|micro|rc|tag)
+	major|minor|micro|final|tag)
 		eval "do_version_bump_${CMD}" "$@"
 		;;
 	*)
@@ -345,7 +351,10 @@
 has_version_tag() {
 	test "${PACKAGE_VERSION/-${1}/}" != "${PACKAGE_VERSION}"
 }
-
+do_version_tag_value() {
+	local TAG="$1"
+	echo ${PACKAGE_VERSION_TAGS} | perl -ne "/-${TAG}"'(\d+)/ && print $1'
+}
 do_version_tag_add() {
 	local TAG="$1"
 	has_version_tag "${TAG}" && \

[Openocd-svn] r2786 - trunk/tools

[<zw...@ma...>]

Author: zwelch
Date: 2009-10-01 01:20:36 +0200 (Thu, 01 Oct 2009)
New Revision: 2786

Modified:
   trunk/tools/release.sh
Log:
Add numeric version tag support to release script.

The release process itself does not use this support yet, but it allows
packagers to automate the process of managing their own tags, if they
patch the source code before releasing binaries.  The release processes
should be revised to incorporate this feature to support -rc packages.


Modified: trunk/tools/release.sh
===================================================================
--- trunk/tools/release.sh	2009-09-30 23:20:20 UTC (rev 2785)
+++ trunk/tools/release.sh	2009-09-30 23:20:36 UTC (rev 2786)
@@ -314,15 +314,27 @@
 do_version_bump_micro() {
 	do_version_bump_sed "${PACKAGE_MAJOR_AND_MINOR}.$((PACKAGE_MICRO + 1))"
 }
-do_version_bump_rc() {
-	die "patch missing: -rc support is not implemented"
+do_version_bump_tag() {
+	local TAG="$1"
+	[ "${TAG}" ] || die "TAG argument is missing"
+	local TAGS="${PACKAGE_VERSION_TAGS}"
+	if has_version_tag "${TAG}"; then
+		local RC=$(echo ${TAGS} | perl -ne "/-${TAG}"'(\d+)/ && print $1')
+		RC=$((${RC} + 1))
+		TAGS=$(echo ${TAGS} | perl -npe "s/-${TAG}[\\d]*/-${TAG}${RC}/")
+	else
+		TAGS="-${TAG}1${PACKAGE_VERSION_TAGS}"
+	fi
+	PACKAGE_VERSION_TAGS="${TAGS}"
+	do_version_bump_sed "${PACKAGE_VERSION_BASE}"
 }
+do_version_bump_rc() { do_version_bump_tag 'rc'; }
 do_version_bump() {
 	CMD="$1"
 	shift
 	case "${CMD}" in
-	major|minor|micro|rc)
-		eval "do_version_bump_${CMD}"
+	major|minor|micro|rc|tag)
+		eval "do_version_bump_${CMD}" "$@"
 		;;
 	*)
 		do_version_usage

[Openocd-svn] r2785 - trunk/tools

[<zw...@ma...>]

Author: zwelch
Date: 2009-10-01 01:20:20 +0200 (Thu, 01 Oct 2009)
New Revision: 2785

Modified:
   trunk/tools/release.sh
Log:
Improve release script version handling commands.


Modified: trunk/tools/release.sh
===================================================================
--- trunk/tools/release.sh	2009-09-30 23:20:13 UTC (rev 2784)
+++ trunk/tools/release.sh	2009-09-30 23:20:20 UTC (rev 2785)
@@ -212,19 +212,6 @@
 maybe_build() { [ -f "src/openocd" ] || do_build; }
 do_build_clean() { [ -f Makefile ] && make maintainer-clean >/dev/null; }
 
-maybe_rebuild() {
-	if [ -f "configure" ]; then
-		echo "Re-running autoconf..."
-		autoconf
-		echo "Re-running automake..."
-		automake
-	fi
-	if [ -f "Makefile" ]; then
-		do_configure
-		do_build
-	fi
-}
-
 do_changelog() {
 	echo "Updating working copy to HEAD..."
 	do_svn update
@@ -319,7 +306,6 @@
 		"Bump ${CMD} package version number"
 }
 do_version_bump_major() {
-	has_version_tag 'rc\d' do_version_
 	do_version_bump_sed "$((PACKAGE_MAJOR + 1)).0.0"
 }
 do_version_bump_minor() {
@@ -345,18 +331,20 @@
 }
 
 has_version_tag() {
-	test "${PACKAGE_VERSION/-${TAG}/}" != "${PACKAGE_VERSION}"
+	test "${PACKAGE_VERSION/-${1}/}" != "${PACKAGE_VERSION}"
 }
 
 do_version_tag_add() {
 	local TAG="$1"
-	has_version_tag && die "error: tag '-${TAG}' exists in '${PACKAGE_VERSION}'"
+	has_version_tag "${TAG}" && \
+		die "error: tag '-${TAG}' exists in '${PACKAGE_VERSION}'"
 	do_version_sed "${PACKAGE_VERSION}-${TAG}" \
 		"Add '-${TAG}' version tag"
 }
 do_version_tag_remove() {
 	local TAG="$1"
-	has_version_tag || die "error: tag '-${TAG}' missing from '${PACKAGE_VERSION}'"
+	has_version_tag "${TAG}" || \
+		die "error: tag '-${TAG}' missing from '${PACKAGE_VERSION}'"
 	do_version_sed "${PACKAGE_VERSION/-${TAG}/}" \
 		"Remove '-${TAG}' version tag"
 }
@@ -389,13 +377,11 @@
 	case "${CMD}" in
 	tag|bump)
 		do_version_commit "$(eval "do_version_${CMD}" "$@")"
-		maybe_rebuild
 		;;
 	commit)
 		local MSG="$1"
 		[ "${MSG}" ] || die "usage: $0 version commit <message>"
 		do_version_commit "${MSG}"
-		maybe_rebuild
 		;;
 	*)
 		do_version_usage

[Openocd-svn] r2784 - trunk/tools

[<zw...@ma...>]

Author: zwelch
Date: 2009-10-01 01:20:13 +0200 (Thu, 01 Oct 2009)
New Revision: 2784

Modified:
   trunk/tools/release.sh
Log:
Add workaround to release script to update source code URL keyword.


Modified: trunk/tools/release.sh
===================================================================
--- trunk/tools/release.sh	2009-09-30 23:20:06 UTC (rev 2783)
+++ trunk/tools/release.sh	2009-09-30 23:20:13 UTC (rev 2784)
@@ -495,10 +495,17 @@
 	local A=${PACKAGE_TAG}
 	local B=${A/https/http}
 	local PACKAGE_BUILD=${B/${USER}@/}
+
 	do_svn_switch "${PACKAGE_TAG}"
 	do_svn_switch --relocate "${PACKAGE_TAG}" "${PACKAGE_BUILD}"
+
+	# required to force SVN to update the in-source URL keyword
+	[ "${RELEASE_DRY_RUN}" ] || rm -v -f src/openocd.c
+	do_svn revert src/openocd.c
+
 	do_stage
 	do_clean
+
 	do_svn_switch --relocate "${PACKAGE_BUILD}" "${PACKAGE_TAG}"
 	do_svn_switch "${SVN_URL}"
 }

[Openocd-svn] r2783 - in trunk: doc/manual tools

[<zw...@ma...>]

Author: zwelch
Date: 2009-10-01 01:20:06 +0200 (Thu, 01 Oct 2009)
New Revision: 2783

Modified:
   trunk/doc/manual/release.txt
   trunk/tools/release.sh
Log:
Document and automate signature creation for the release archives.


Modified: trunk/doc/manual/release.txt
===================================================================
--- trunk/doc/manual/release.txt	2009-09-30 23:19:53 UTC (rev 2782)
+++ trunk/doc/manual/release.txt	2009-09-30 23:20:06 UTC (rev 2783)
@@ -224,10 +224,11 @@
 -# Produce the package source archives:
   -# Start with a clean working copy, used for producing releases only.
   -# Switch to release tag branch: svn switch .../${RELEASE_TAG}
-  -# produce a ChangeLog for the release (using svn2cl).
+  -# Produce a ChangeLog for the release (using svn2cl).
   -# @c bootstrap, @c configure, and @c make the package.
   -# Run <code>make distcheck</code> to produce the distribution archives.
   -# Run <code>make maintainer-clean</code> verify the repository is empty.
+  -# Create signature files using md5sum, sha1sum, etc.
 -# Publish documentation for the release:
   - Allow users to access the documentation for each of our releases.
   - Place static copies of the following files on the project website:

Modified: trunk/tools/release.sh
===================================================================
--- trunk/tools/release.sh	2009-09-30 23:19:53 UTC (rev 2782)
+++ trunk/tools/release.sh	2009-09-30 23:20:06 UTC (rev 2783)
@@ -262,7 +262,14 @@
 	echo "Staging package archives:"
 	mkdir -p archives
 	for EXT in tar.gz tar.bz2 zip; do
-		mv -v "${PACKAGE_RELEASE}.${EXT}" archives/
+		local FILE="${PACKAGE_RELEASE}.${EXT}"
+		# create archive signatures
+		for HASH in md5 sha1; do
+			echo "sign: ${FILE}.${HASH}"
+			${HASH}sum "${FILE}" > "archives/${FILE}.${HASH}"
+		done
+		# save archive
+		mv -v "${FILE}" archives/
 	done
 	cp -a NEWS archives/
 	cp -a ChangeLog archives/

[Openocd-svn] r2782 - trunk/tools

[<zw...@ma...>]

Author: zwelch
Date: 2009-10-01 01:19:53 +0200 (Thu, 01 Oct 2009)
New Revision: 2782

Modified:
   trunk/tools/release.sh
Log:
Fix release script bugs after experience from 0.2.0:
- The NEWS step failed due to an empty commit comment.
- The final release step would have failed, because the steps to switch
  from the secure to insecure repository (and back again) require both
  switch and a URL relocation steps


Modified: trunk/tools/release.sh
===================================================================
--- trunk/tools/release.sh	2009-09-30 23:02:15 UTC (rev 2781)
+++ trunk/tools/release.sh	2009-09-30 23:19:53 UTC (rev 2782)
@@ -75,7 +75,7 @@
 	[ "${RELEASE_DRY_RUN}" ] || svn "$@"
 }
 do_svn_switch() {
-	do_svn switch "$1"
+	do_svn switch "$@"
 	package_info_load
 }
 
@@ -440,14 +440,13 @@
 	do_version_commit "$(do_release_step_branch_bump micro)"
 	do_svn_switch "${SVN_URL}"
 }
-do_release_step_bump() {
-	# major and minor releases require branch version update too
-	[ "${RELEASE_TYPE}" = "micro" ] || do_release_step_branch
-	# bump the current tree version as required.
-	do_version_commit "$(do_release_step_branch_bump "${RELEASE_TYPE}")"
-
-	[ "${RELEASE_TYPE}" = "micro" ] && return
-
+do_release_step_news_msg() {
+	cat <<MSG
+Archive released NEWS file: NEWS -> NEWS-${RELEASE_VERSION}
+Create new NEWS file from relesse script template.
+MSG
+}
+do_release_step_news() {
 	# archive NEWS and create new one from template
 	do_svn move "NEWS" "NEWS-${RELEASE_VERSION}"
 
@@ -472,20 +471,28 @@
 features and device support, please read the new Developer Manual (or
 the BUGS and PATCHES files in the source archive).
 NEWS
+	do_svn add NEWS
 
-	MSG=<<MSG
-Archive released NEWS file: NEWS -> NEWS-${RELEASE_VERSION}
-Create new NEWS file from relesse script template.
-MSG
+	local MSG="$(do_release_step_news_msg)"
 	do_svn commit -m "${MSG}" NEWS NEWS-${RELEASE_VERSION}
 }
+do_release_step_bump() {
+	# major and minor releases require branch version update too
+	[ "${RELEASE_TYPE}" = "micro" ] || do_release_step_branch
+	# bump the current tree version as required.
+	do_version_commit "$(do_release_step_branch_bump "${RELEASE_TYPE}")"
+
+	[ "${RELEASE_TYPE}" = "micro" ] || do_release_step_news
+}
 do_release_step_package() {
 	local A=${PACKAGE_TAG}
 	local B=${A/https/http}
 	local PACKAGE_BUILD=${B/${USER}@/}
-	do_svn_switch "${PACKAGE_BUILD}"
+	do_svn_switch "${PACKAGE_TAG}"
+	do_svn_switch --relocate "${PACKAGE_TAG}" "${PACKAGE_BUILD}"
 	do_stage
 	do_clean
+	do_svn_switch --relocate "${PACKAGE_BUILD}" "${PACKAGE_TAG}"
 	do_svn_switch "${SVN_URL}"
 }
 

[Openocd-svn] r2781 - in trunk/tcl: board target

[dbrownell at B. <dbr...@ma...>]

Author: dbrownell
Date: 2009-10-01 01:02:15 +0200 (Thu, 01 Oct 2009)
New Revision: 2781

Modified:
   trunk/tcl/board/telo.cfg
   trunk/tcl/board/topas910.cfg
   trunk/tcl/board/topasa900.cfg
   trunk/tcl/target/c100config.tcl
   trunk/tcl/target/telo.cfg
   trunk/tcl/target/tmpa900.cfg
   trunk/tcl/target/tmpa910.cfg
Log:
Remove annoying EOL whitespace (again, sigh).


Modified: trunk/tcl/board/telo.cfg
===================================================================
--- trunk/tcl/board/telo.cfg	2009-09-30 17:24:43 UTC (rev 2780)
+++ trunk/tcl/board/telo.cfg	2009-09-30 23:02:15 UTC (rev 2781)
@@ -11,7 +11,7 @@
 # Note that libftd2xx.so tries to assert srst
 # which break this script
 # use libftdi.so library instead with this script
-# make the reset asserted to 
+# make the reset asserted to
 # allow RC circuit to discharge for: [ms]
 jtag_nsrst_assert_width 100
 jtag_ntrst_assert_width 100
@@ -39,7 +39,7 @@
 	# Force target into ARM state.
 #	soft_reset_halt # not implemented on ARM11
 	puts "Detected SRSRT asserted on C100.CPU"
-	
+
 }
 
 $_TARGETNAME configure -event reset-assert-post {
@@ -47,7 +47,7 @@
   #sleep 10
 }
 
-proc power_restore {} { puts "Sensed power restore. No action." } 
+proc power_restore {} { puts "Sensed power restore. No action." }
 proc srst_deasserted {} { puts "Sensed nSRST deasserted. No action." }
 
 

Modified: trunk/tcl/board/topas910.cfg
===================================================================
--- trunk/tcl/board/topas910.cfg	2009-09-30 17:24:43 UTC (rev 2780)
+++ trunk/tcl/board/topas910.cfg	2009-09-30 23:02:15 UTC (rev 2781)
@@ -53,7 +53,7 @@
 #  //
 #  // Configure SDRAM type parameter
 #  _DMC_MEMORY_CFG  = 0x00008011;
-#  _DMC_USER_CONFIG = 0x00000011;   
+#  _DMC_USER_CONFIG = 0x00000011;
 #  // 32 bit memory interface
 #
 #
@@ -101,7 +101,7 @@
 	sleep 10
 #	jtag_speed 10000
 
-# remap off in case of IROM boot 
+# remap off in case of IROM boot
 	mww 0xf0000004 0x00000001
 
 }

Modified: trunk/tcl/board/topasa900.cfg
===================================================================
--- trunk/tcl/board/topasa900.cfg	2009-09-30 17:24:43 UTC (rev 2780)
+++ trunk/tcl/board/topasa900.cfg	2009-09-30 23:02:15 UTC (rev 2781)
@@ -1,4 +1,4 @@
-# Thanks to Pieter Conradie for this script! 
+# Thanks to Pieter Conradie for this script!
 # Target:    Toshiba TOPAS900 -- TMPA900 Starterkit
 ######################################
 
@@ -107,7 +107,7 @@
 	sleep 10
 #	jtag_speed 10000
 
-# remap off in case of IROM boot 
+# remap off in case of IROM boot
 	mww 0xf0000004 0x00000001
 
 }

Modified: trunk/tcl/target/c100config.tcl
===================================================================
--- trunk/tcl/target/c100config.tcl	2009-09-30 17:24:43 UTC (rev 2780)
+++ trunk/tcl/target/c100config.tcl	2009-09-30 23:02:15 UTC (rev 2781)
@@ -3,7 +3,7 @@
 
 # set CFG_REFCLKFREQ [configC100 CFG_REFCLKFREQ]
 proc config {label} {
-    return [dict get [configC100] $label ]	
+    return [dict get [configC100] $label ]
 }
 
 # show the value for the param. with label
@@ -15,7 +15,7 @@
 # when there are more then one board config
 # use soft links to c100board-config.tcl
 # so that only the right board-config gets
-# included (just like include/configs/board-configs.h 
+# included (just like include/configs/board-configs.h
 # in u-boot.
 proc configC100 {} {
     # xtal freq. 24MHz
@@ -28,7 +28,7 @@
     # y = amba_clk * (w+1)*(x+1)*2/xtal_clk
     dict set configC100 y_amba [expr ([dict get $configC100 CONFIG_SYS_HZ_CLOCK] * ( ([dict get $configC100 w_amba]+1 ) * ([dict get $configC100 x_amba]+1 ) *2 ) / [dict get $configC100 CFG_REFCLKFREQ]) ]
 
-    # Arm Clk 450MHz, must be a multiple of 25 MHz 
+    # Arm Clk 450MHz, must be a multiple of 25 MHz
     dict set configC100 CFG_ARM_CLOCK      450000000
     dict set configC100 w_arm 0
     dict set configC100 x_arm 1
@@ -44,7 +44,7 @@
     # setup GPIO used as control signals for C100
     setupGPIO
     # This will allow acces to lower 8MB or NOR
-    lowGPIO5 
+    lowGPIO5
     # setup NOR size,timing,etc.
     setupNOR
     # setup internals + PLL + DDR2
@@ -55,17 +55,17 @@
 proc setupNOR {} {
     puts "Setting up NOR: 16MB, 16-bit wide bus, CS0"
     # this is taken from u-boot/boards/mindspeed/ooma-darwin/board.c:nor_hw_init()
-    set EX_CSEN_REG	    [regs EX_CSEN_REG ]	
-    set EX_CS0_SEG_REG	    [regs EX_CS0_SEG_REG ]	
-    set EX_CS0_CFG_REG	    [regs EX_CS0_CFG_REG ]	
-    set EX_CS0_TMG1_REG	    [regs EX_CS0_TMG1_REG ]	
-    set EX_CS0_TMG2_REG	    [regs EX_CS0_TMG2_REG ]	
-    set EX_CS0_TMG3_REG	    [regs EX_CS0_TMG3_REG ]	
+    set EX_CSEN_REG	    [regs EX_CSEN_REG ]
+    set EX_CS0_SEG_REG	    [regs EX_CS0_SEG_REG ]
+    set EX_CS0_CFG_REG	    [regs EX_CS0_CFG_REG ]
+    set EX_CS0_TMG1_REG	    [regs EX_CS0_TMG1_REG ]
+    set EX_CS0_TMG2_REG	    [regs EX_CS0_TMG2_REG ]
+    set EX_CS0_TMG3_REG	    [regs EX_CS0_TMG3_REG ]
     set EX_CLOCK_DIV_REG    [regs EX_CLOCK_DIV_REG ]
-    set EX_MFSM_REG	    [regs EX_MFSM_REG ]	
-    set EX_CSFSM_REG	    [regs EX_CSFSM_REG ]	
-    set EX_WRFSM_REG	    [regs EX_WRFSM_REG ]	
-    set EX_RDFSM_REG	    [regs EX_RDFSM_REG ]	
+    set EX_MFSM_REG	    [regs EX_MFSM_REG ]
+    set EX_CSFSM_REG	    [regs EX_CSFSM_REG ]
+    set EX_WRFSM_REG	    [regs EX_WRFSM_REG ]
+    set EX_RDFSM_REG	    [regs EX_RDFSM_REG ]
 
     # enable Expansion Bus Clock + CS0 (NOR)
     mww $EX_CSEN_REG 0x3
@@ -76,7 +76,7 @@
     # set timings to NOR
     mww $EX_CS0_TMG1_REG 0x03034006
     mww $EX_CS0_TMG2_REG 0x04040002
-    #mww $EX_CS0_TMG3_REG 
+    #mww $EX_CS0_TMG3_REG
     # set EBUS clock 165/5=33MHz
     mww $EX_CLOCK_DIV_REG 0x5
     # everthing else is OK with default
@@ -86,7 +86,7 @@
     set EXP_CS0_BASEADDR       [regs EXP_CS0_BASEADDR]
     set BLOCK_RESET_REG	       [regs BLOCK_RESET_REG]
     set DDR_RST		       [regs DDR_RST]
- 
+
     # put DDR controller in reset (so that it comes reset in u-boot)
     mmw $BLOCK_RESET_REG 0x0 $DDR_RST
     # setup CS0 controller for NOR
@@ -107,8 +107,8 @@
     #GPIO17 reset for DECT module.
     #GPIO29 CS_n for NAND
 
-    set GPIO_OUTPUT_REG		    [regs GPIO_OUTPUT_REG]	
-    set GPIO_OE_REG		    [regs GPIO_OE_REG]	
+    set GPIO_OUTPUT_REG		    [regs GPIO_OUTPUT_REG]
+    set GPIO_OE_REG		    [regs GPIO_OE_REG]
 
     # set GPIO29=GPIO17=1, GPIO5=0
     mww $GPIO_OUTPUT_REG [expr 1<<29 | 1<<17]
@@ -118,14 +118,14 @@
 
 proc highGPIO5 {} {
     puts "GPIO5 high"
-    set GPIO_OUTPUT_REG		    [regs GPIO_OUTPUT_REG]	
+    set GPIO_OUTPUT_REG		    [regs GPIO_OUTPUT_REG]
     # set GPIO5=1
     mmw $GPIO_OUTPUT_REG [expr 1 << 5] 0x0
 }
 
 proc lowGPIO5 {} {
     puts "GPIO5 low"
-    set GPIO_OUTPUT_REG		    [regs GPIO_OUTPUT_REG]	
+    set GPIO_OUTPUT_REG		    [regs GPIO_OUTPUT_REG]
     # set GPIO5=0
     mmw $GPIO_OUTPUT_REG 0x0 [expr 1 << 5]
 }
@@ -133,21 +133,21 @@
 proc boardID {id} {
     # so far built:
     # 4'b1111
-    dict set boardID 15 name "EVT1"		
+    dict set boardID 15 name "EVT1"
     dict set boardID 15 ddr2size 128M
     # dict set boardID 15 nandsize 1G
     # dict set boardID 15 norsize 16M
     # 4'b0000
-    dict set boardID 0 name "EVT2"		
+    dict set boardID 0 name "EVT2"
     dict set boardID 0 ddr2size 128M
     # 4'b0001
-    dict set boardID 1 name "EVT3"		
+    dict set boardID 1 name "EVT3"
     dict set boardID 1 ddr2size 256M
     # 4'b1110
     dict set boardID 14 name "EVT3_old"
     dict set boardID 14 ddr2size 128M
     # 4'b0010
-    dict set boardID 2 name "EVT4"		
+    dict set boardID 2 name "EVT4"
     dict set boardID 2 ddr2size 256M
 
     return $boardID
@@ -155,10 +155,10 @@
 
 
 # converted from u-boot/boards/mindspeed/ooma-darwin/board.c:ooma_board_detect()
-# figure out what board revision this is, uses BOOTSTRAP register to read stuffed resistors 
+# figure out what board revision this is, uses BOOTSTRAP register to read stuffed resistors
 proc ooma_board_detect {} {
     set GPIO_BOOTSTRAP_REG	[regs GPIO_BOOTSTRAP_REG]
-    
+
     # read the current value of the BOOTSRAP pins
     set tmp [mrw $GPIO_BOOTSTRAP_REG]
     puts [format "GPIO_BOOTSTRAP_REG  (0x%x): 0x%x" $GPIO_BOOTSTRAP_REG $tmp]
@@ -174,7 +174,7 @@
 }
 
 proc configureDDR2regs_256M {} {
-    
+
     set DENALI_CTL_00_DATA    [regs DENALI_CTL_00_DATA]
     set DENALI_CTL_01_DATA    [regs DENALI_CTL_01_DATA]
     set DENALI_CTL_02_DATA    [regs DENALI_CTL_02_DATA]
@@ -208,7 +208,7 @@
     mw64bit $DENALI_CTL_04_DATA  0x0000010100000001
     mw64bit $DENALI_CTL_05_DATA  0x0203010300010101
     mw64bit $DENALI_CTL_06_DATA  0x060a020200020202
-    mw64bit $DENALI_CTL_07_DATA  0x0000000300000206 
+    mw64bit $DENALI_CTL_07_DATA  0x0000000300000206
     mw64bit $DENALI_CTL_08_DATA  0x6400003f3f0a0209
     mw64bit $DENALI_CTL_09_DATA  0x1a000000001a1a1a
     mw64bit $DENALI_CTL_10_DATA  0x0120202020191a18
@@ -222,15 +222,15 @@
     mw64bit $DENALI_CTL_17_DATA  0x0000000000000000
     mw64bit $DENALI_CTL_18_DATA  0x0302000000000000
     mw64bit $DENALI_CTL_19_DATA  0x00001300c8030600
-    mw64bit $DENALI_CTL_20_DATA  0x0000000081fe00c8 
-    
+    mw64bit $DENALI_CTL_20_DATA  0x0000000081fe00c8
+
     set wr_dqs_shift 0x40
     # start DDRC
     mw64bit $DENALI_CTL_02_DATA [expr $DENALI_CTL_02_VAL | (1 << 32)]
     # wait int_status[2] (DRAM init complete)
     puts -nonewline "Waiting for DDR2 controller to init..."
     set tmp [mrw [expr $DENALI_CTL_08_DATA + 4]]
-    while { [expr $tmp & 0x040000] == 0 } { 
+    while { [expr $tmp & 0x040000] == 0 } {
 	sleep 1
 	set tmp [mrw [expr $DENALI_CTL_08_DATA + 4]]
     }
@@ -267,9 +267,9 @@
     set DENALI_CTL_20_DATA    [regs DENALI_CTL_20_DATA]
 
 
-    set DENALI_CTL_02_VAL 0x0100010000010100 
+    set DENALI_CTL_02_VAL 0x0100010000010100
     set DENALI_CTL_11_VAL 0x433A42124A650A37
-    # set some default values     
+    # set some default values
     mw64bit $DENALI_CTL_00_DATA  0x0100000101010101
     mw64bit $DENALI_CTL_01_DATA  0x0100000100000101
     mw64bit $DENALI_CTL_02_DATA  $DENALI_CTL_02_VAL
@@ -298,7 +298,7 @@
     # wait int_status[2] (DRAM init complete)
     puts -nonewline "Waiting for DDR2 controller to init..."
     set tmp [mrw [expr $DENALI_CTL_08_DATA + 4]]
-    while { [expr $tmp & 0x040000] == 0 } { 
+    while { [expr $tmp & 0x040000] == 0 } {
 	sleep 1
 	set tmp [mrw [expr $DENALI_CTL_08_DATA + 4]]
     }
@@ -318,18 +318,18 @@
     set GPIO_IOCTRL_REG    [regs GPIO_IOCTRL_REG]
     set GPIO_IOCTRL_VAL    [regs GPIO_IOCTRL_VAL]
     set GPIO_IOCTRL_UART0  [regs GPIO_IOCTRL_UART0]
-    set UART0_LCR	            [regs UART0_LCR]	
-    set LCR_DLAB		    [regs LCR_DLAB]	
-    set UART0_DLL		    [regs UART0_DLL]		
-    set UART0_DLH		    [regs UART0_DLH]	
-    set UART0_IIR		    [regs UART0_IIR]	
-    set UART0_IER		    [regs UART0_IER]	
-    set LCR_ONE_STOP		    [regs LCR_ONE_STOP]		
-    set LCR_CHAR_LEN_8		    [regs LCR_CHAR_LEN_8]		
+    set UART0_LCR	            [regs UART0_LCR]
+    set LCR_DLAB		    [regs LCR_DLAB]
+    set UART0_DLL		    [regs UART0_DLL]
+    set UART0_DLH		    [regs UART0_DLH]
+    set UART0_IIR		    [regs UART0_IIR]
+    set UART0_IER		    [regs UART0_IER]
+    set LCR_ONE_STOP		    [regs LCR_ONE_STOP]
+    set LCR_CHAR_LEN_8		    [regs LCR_CHAR_LEN_8]
     set FCR_XMITRES		    [regs FCR_XMITRES]
-    set FCR_RCVRRES		    [regs FCR_RCVRRES]	
-    set FCR_FIFOEN		    [regs FCR_FIFOEN]	
-    set IER_UUE			    [regs IER_UUE]		
+    set FCR_RCVRRES		    [regs FCR_RCVRRES]
+    set FCR_FIFOEN		    [regs FCR_FIFOEN]
+    set IER_UUE			    [regs IER_UUE]
 
     # unlock writing to IOCTRL register
     mww $GPIO_LOCK_REG $GPIO_IOCTRL_VAL
@@ -355,7 +355,7 @@
 
 proc putcUART0 {char} {
 
-    set UART0_LSR	    [regs UART0_LSR]	
+    set UART0_LSR	    [regs UART0_LSR]
     set UART0_THR	    [regs UART0_THR]
     set LSR_TEMT	    [regs LSR_TEMT]
 
@@ -392,7 +392,7 @@
 proc flashUBOOT {file} {
     # this will update uboot on NOR partition
     set EXP_CS0_BASEADDR       [regs EXP_CS0_BASEADDR]
-    
+
     # setup CS0 controller for NOR
     setupNOR
     # make sure we are accessing the lower part of NOR

Modified: trunk/tcl/target/telo.cfg
===================================================================
--- trunk/tcl/target/telo.cfg	2009-09-30 17:24:43 UTC (rev 2780)
+++ trunk/tcl/target/telo.cfg	2009-09-30 23:02:15 UTC (rev 2781)
@@ -11,7 +11,7 @@
 # Note that libftd2xx.so tries to assert srst
 # which break this script
 # use libftdi.so library instead with this script
-# make the reset asserted to 
+# make the reset asserted to
 # allow RC circuit to discharge for: [ms]
 jtag_nsrst_assert_width 100
 jtag_ntrst_assert_width 100
@@ -39,7 +39,7 @@
 	# Force target into ARM state.
 #	soft_reset_halt # not implemented on ARM11
 	puts "Detected SRSRT asserted on C100.CPU"
-	
+
 }
 
 $_TARGETNAME configure -event reset-assert-post {
@@ -47,7 +47,7 @@
   #sleep 10
 }
 
-proc power_restore {} { puts "Sensed power restore. No action." } 
+proc power_restore {} { puts "Sensed power restore. No action." }
 proc srst_deasserted {} { puts "Sensed nSRST deasserted. No action." }
 
 

Modified: trunk/tcl/target/tmpa900.cfg
===================================================================
--- trunk/tcl/target/tmpa900.cfg	2009-09-30 17:24:43 UTC (rev 2780)
+++ trunk/tcl/target/tmpa900.cfg	2009-09-30 23:02:15 UTC (rev 2781)
@@ -2,15 +2,15 @@
 # Target:    Toshiba TMPA910
 ######################################
 
-if { [info exists CHIPNAME] } {	
-   set  _CHIPNAME $CHIPNAME    
-} else {	 
+if { [info exists CHIPNAME] } {
+   set  _CHIPNAME $CHIPNAME
+} else {
    set  _CHIPNAME tmpa910
 }
 
-if { [info exists ENDIAN] } {	
-   set  _ENDIAN $ENDIAN    
-} else {	 
+if { [info exists ENDIAN] } {
+   set  _ENDIAN $ENDIAN
+} else {
    set  _ENDIAN little
 }
 

Modified: trunk/tcl/target/tmpa910.cfg
===================================================================
--- trunk/tcl/target/tmpa910.cfg	2009-09-30 17:24:43 UTC (rev 2780)
+++ trunk/tcl/target/tmpa910.cfg	2009-09-30 23:02:15 UTC (rev 2781)
@@ -2,15 +2,15 @@
 # Target:    Toshiba TMPA910
 ######################################
 
-if { [info exists CHIPNAME] } {	
-   set  _CHIPNAME $CHIPNAME    
-} else {	 
+if { [info exists CHIPNAME] } {
+   set  _CHIPNAME $CHIPNAME
+} else {
    set  _CHIPNAME tmpa910
 }
 
-if { [info exists ENDIAN] } {	
-   set  _ENDIAN $ENDIAN    
-} else {	 
+if { [info exists ENDIAN] } {
+   set  _ENDIAN $ENDIAN
+} else {
    set  _ENDIAN little
 }
 

[Openocd-svn] r2780 - trunk/src/target

[<ml...@ma...>]

Author: mlu
Date: 2009-09-30 19:24:43 +0200 (Wed, 30 Sep 2009)
New Revision: 2780

Modified:
   trunk/src/target/cortex_a8.h
Log:
Add DSCR_DTR_RX_FULL bit define

Modified: trunk/src/target/cortex_a8.h
===================================================================
--- trunk/src/target/cortex_a8.h	2009-09-30 05:40:40 UTC (rev 2779)
+++ trunk/src/target/cortex_a8.h	2009-09-30 17:24:43 UTC (rev 2780)
@@ -80,6 +80,7 @@
 #define DSCR_MON_DBG_MODE 		15
 #define DSCR_INSTR_COMP 		24
 #define DSCR_DTR_TX_FULL 		29
+#define DSCR_DTR_RX_FULL 		30
 
 typedef struct  cortex_a8_brp_s
 {

[Openocd-svn] r2779 - in trunk/tcl: board target

[oharboe at B. <oh...@ma...>]

Author: oharboe
Date: 2009-09-30 07:40:40 +0200 (Wed, 30 Sep 2009)
New Revision: 2779

Modified:
   trunk/tcl/board/mini2440.cfg
   trunk/tcl/target/at91sam3uXX.cfg
Log:
strip gdb config options

Modified: trunk/tcl/board/mini2440.cfg
===================================================================
--- trunk/tcl/board/mini2440.cfg	2009-09-30 05:37:32 UTC (rev 2778)
+++ trunk/tcl/board/mini2440.cfg	2009-09-30 05:40:40 UTC (rev 2779)
@@ -123,11 +123,7 @@
 # GDB Setup
 #-------------------------------------------------------------------------
 
-    gdb_port 3333
-    gdb_detach resume
     gdb_breakpoint_override hard
-    gdb_memory_map enable
-    gdb_flash_program enable
 
 #------------------------------------------------
 # ARM SPECIFIC

Modified: trunk/tcl/target/at91sam3uXX.cfg
===================================================================
--- trunk/tcl/target/at91sam3uXX.cfg	2009-09-30 05:37:32 UTC (rev 2778)
+++ trunk/tcl/target/at91sam3uXX.cfg	2009-09-30 05:40:40 UTC (rev 2779)
@@ -37,11 +37,6 @@
 
 reset_config srst_only
 
-# GDB can use this
-gdb_memory_map enable
-# And GDB can flash the chip
-gdb_flash_program enable
-
 $_TARGETNAME configure -event gdb-flash-erase-start {
     halt
 }

[Openocd-svn] r2778 - in trunk/tcl: board target

[oharboe at B. <oh...@ma...>]

Author: oharboe
Date: 2009-09-30 07:37:32 +0200 (Wed, 30 Sep 2009)
New Revision: 2778

Modified:
   trunk/tcl/board/telo.cfg
   trunk/tcl/target/c100config.tcl
   trunk/tcl/target/telo.cfg
Log:
michal smulski <mic...@oo...> reset now works

Modified: trunk/tcl/board/telo.cfg
===================================================================
--- trunk/tcl/board/telo.cfg	2009-09-29 19:28:08 UTC (rev 2777)
+++ trunk/tcl/board/telo.cfg	2009-09-30 05:37:32 UTC (rev 2778)
@@ -1,33 +1,34 @@
-source [find target/c100.cfg]
+source [find c100.cfg]
 # basic register defintion for C100
-source [find target/c100regs.tcl]
+source [find c100regs.tcl]
 # board-config info
-source [find target/c100config.tcl]
+source [find c100config.tcl]
 # C100 helper functions
-source [find target/c100helper.tcl]
+source [find c100helper.tcl]
 
 
 # Telo board & C100 support trst and srst
-# however openocd does not support
-# 1. setting srst reset pulse width
-# 2. setting delay between srst pulse and JTAG access
-# This really makes the srst useless for now.
+# Note that libftd2xx.so tries to assert srst
+# which break this script
+# use libftdi.so library instead with this script
+# make the reset asserted to 
+# allow RC circuit to discharge for: [ms]
+jtag_nsrst_assert_width 100
+jtag_ntrst_assert_width 100
+# don't talk to JTAG after reset for: [ms]
+jtag_nsrst_delay 100
+jtag_ntrst_delay 100
 reset_config trst_and_srst separate
 
 
 
+
 # issue telnet: reset init
 # issue gdb: monitor reset init
 $_TARGETNAME configure -event reset-init {
 	jtag_khz 100
-	# setup GPIO used as control signals for C100
-	setupGPIO
-	# This will allow acces to lower 8MB or NOR
-	lowGPIO5
-	# setup NOR size,timing,etc.
-	setupNOR
-	# setup internals + PLL + DDR2
-	initC100
+	# this will setup Telo board
+	setupTelo
 	#turn up the JTAG speed
 	jtag_khz 3000
 	puts "JTAG speek now 3MHz"
@@ -38,10 +39,15 @@
 	# Force target into ARM state.
 #	soft_reset_halt # not implemented on ARM11
 	puts "Detected SRSRT asserted on C100.CPU"
+	
+}
 
+$_TARGETNAME configure -event reset-assert-post {
+  puts "Assering reset"
+  #sleep 10
 }
 
-proc power_restore {} { puts "Sensed power restore. No action." }
+proc power_restore {} { puts "Sensed power restore. No action." } 
 proc srst_deasserted {} { puts "Sensed nSRST deasserted. No action." }
 
 

Modified: trunk/tcl/target/c100config.tcl
===================================================================
--- trunk/tcl/target/c100config.tcl	2009-09-29 19:28:08 UTC (rev 2777)
+++ trunk/tcl/target/c100config.tcl	2009-09-30 05:37:32 UTC (rev 2778)
@@ -3,7 +3,7 @@
 
 # set CFG_REFCLKFREQ [configC100 CFG_REFCLKFREQ]
 proc config {label} {
-    return [dict get [configC100] $label ]
+    return [dict get [configC100] $label ]	
 }
 
 # show the value for the param. with label
@@ -15,7 +15,7 @@
 # when there are more then one board config
 # use soft links to c100board-config.tcl
 # so that only the right board-config gets
-# included (just like include/configs/board-configs.h
+# included (just like include/configs/board-configs.h 
 # in u-boot.
 proc configC100 {} {
     # xtal freq. 24MHz
@@ -28,7 +28,7 @@
     # y = amba_clk * (w+1)*(x+1)*2/xtal_clk
     dict set configC100 y_amba [expr ([dict get $configC100 CONFIG_SYS_HZ_CLOCK] * ( ([dict get $configC100 w_amba]+1 ) * ([dict get $configC100 x_amba]+1 ) *2 ) / [dict get $configC100 CFG_REFCLKFREQ]) ]
 
-    # Arm Clk 450MHz, must be a multiple of 25 MHz
+    # Arm Clk 450MHz, must be a multiple of 25 MHz 
     dict set configC100 CFG_ARM_CLOCK      450000000
     dict set configC100 w_arm 0
     dict set configC100 x_arm 1
@@ -38,20 +38,34 @@
 
 }
 
+# This should be called for reset init event handler
+proc setupTelo {} {
+
+    # setup GPIO used as control signals for C100
+    setupGPIO
+    # This will allow acces to lower 8MB or NOR
+    lowGPIO5 
+    # setup NOR size,timing,etc.
+    setupNOR
+    # setup internals + PLL + DDR2
+    initC100
+}
+
+
 proc setupNOR {} {
     puts "Setting up NOR: 16MB, 16-bit wide bus, CS0"
     # this is taken from u-boot/boards/mindspeed/ooma-darwin/board.c:nor_hw_init()
-    set EX_CSEN_REG	    [regs EX_CSEN_REG ]
-    set EX_CS0_SEG_REG	    [regs EX_CS0_SEG_REG ]
-    set EX_CS0_CFG_REG	    [regs EX_CS0_CFG_REG ]
-    set EX_CS0_TMG1_REG	    [regs EX_CS0_TMG1_REG ]
-    set EX_CS0_TMG2_REG	    [regs EX_CS0_TMG2_REG ]
-    set EX_CS0_TMG3_REG	    [regs EX_CS0_TMG3_REG ]
+    set EX_CSEN_REG	    [regs EX_CSEN_REG ]	
+    set EX_CS0_SEG_REG	    [regs EX_CS0_SEG_REG ]	
+    set EX_CS0_CFG_REG	    [regs EX_CS0_CFG_REG ]	
+    set EX_CS0_TMG1_REG	    [regs EX_CS0_TMG1_REG ]	
+    set EX_CS0_TMG2_REG	    [regs EX_CS0_TMG2_REG ]	
+    set EX_CS0_TMG3_REG	    [regs EX_CS0_TMG3_REG ]	
     set EX_CLOCK_DIV_REG    [regs EX_CLOCK_DIV_REG ]
-    set EX_MFSM_REG	    [regs EX_MFSM_REG ]
-    set EX_CSFSM_REG	    [regs EX_CSFSM_REG ]
-    set EX_WRFSM_REG	    [regs EX_WRFSM_REG ]
-    set EX_RDFSM_REG	    [regs EX_RDFSM_REG ]
+    set EX_MFSM_REG	    [regs EX_MFSM_REG ]	
+    set EX_CSFSM_REG	    [regs EX_CSFSM_REG ]	
+    set EX_WRFSM_REG	    [regs EX_WRFSM_REG ]	
+    set EX_RDFSM_REG	    [regs EX_RDFSM_REG ]	
 
     # enable Expansion Bus Clock + CS0 (NOR)
     mww $EX_CSEN_REG 0x3
@@ -62,7 +76,7 @@
     # set timings to NOR
     mww $EX_CS0_TMG1_REG 0x03034006
     mww $EX_CS0_TMG2_REG 0x04040002
-    #mww $EX_CS0_TMG3_REG
+    #mww $EX_CS0_TMG3_REG 
     # set EBUS clock 165/5=33MHz
     mww $EX_CLOCK_DIV_REG 0x5
     # everthing else is OK with default
@@ -72,7 +86,7 @@
     set EXP_CS0_BASEADDR       [regs EXP_CS0_BASEADDR]
     set BLOCK_RESET_REG	       [regs BLOCK_RESET_REG]
     set DDR_RST		       [regs DDR_RST]
-
+ 
     # put DDR controller in reset (so that it comes reset in u-boot)
     mmw $BLOCK_RESET_REG 0x0 $DDR_RST
     # setup CS0 controller for NOR
@@ -93,8 +107,8 @@
     #GPIO17 reset for DECT module.
     #GPIO29 CS_n for NAND
 
-    set GPIO_OUTPUT_REG		    [regs GPIO_OUTPUT_REG]
-    set GPIO_OE_REG		    [regs GPIO_OE_REG]
+    set GPIO_OUTPUT_REG		    [regs GPIO_OUTPUT_REG]	
+    set GPIO_OE_REG		    [regs GPIO_OE_REG]	
 
     # set GPIO29=GPIO17=1, GPIO5=0
     mww $GPIO_OUTPUT_REG [expr 1<<29 | 1<<17]
@@ -104,14 +118,14 @@
 
 proc highGPIO5 {} {
     puts "GPIO5 high"
-    set GPIO_OUTPUT_REG		    [regs GPIO_OUTPUT_REG]
+    set GPIO_OUTPUT_REG		    [regs GPIO_OUTPUT_REG]	
     # set GPIO5=1
     mmw $GPIO_OUTPUT_REG [expr 1 << 5] 0x0
 }
 
 proc lowGPIO5 {} {
     puts "GPIO5 low"
-    set GPIO_OUTPUT_REG		    [regs GPIO_OUTPUT_REG]
+    set GPIO_OUTPUT_REG		    [regs GPIO_OUTPUT_REG]	
     # set GPIO5=0
     mmw $GPIO_OUTPUT_REG 0x0 [expr 1 << 5]
 }
@@ -119,31 +133,32 @@
 proc boardID {id} {
     # so far built:
     # 4'b1111
-    dict set boardID 15 name "EVT1"
+    dict set boardID 15 name "EVT1"		
     dict set boardID 15 ddr2size 128M
     # dict set boardID 15 nandsize 1G
     # dict set boardID 15 norsize 16M
     # 4'b0000
-    dict set boardID 0 name "EVT2"
+    dict set boardID 0 name "EVT2"		
     dict set boardID 0 ddr2size 128M
     # 4'b0001
-    dict set boardID 1 name "EVT3"
+    dict set boardID 1 name "EVT3"		
     dict set boardID 1 ddr2size 256M
     # 4'b1110
     dict set boardID 14 name "EVT3_old"
     dict set boardID 14 ddr2size 128M
     # 4'b0010
-    dict set boardID 2 name "EVT4"
+    dict set boardID 2 name "EVT4"		
     dict set boardID 2 ddr2size 256M
 
     return $boardID
 }
 
+
 # converted from u-boot/boards/mindspeed/ooma-darwin/board.c:ooma_board_detect()
-# figure out what board revision this is, uses BOOTSTRAP register to read stuffed resistors
+# figure out what board revision this is, uses BOOTSTRAP register to read stuffed resistors 
 proc ooma_board_detect {} {
     set GPIO_BOOTSTRAP_REG	[regs GPIO_BOOTSTRAP_REG]
-
+    
     # read the current value of the BOOTSRAP pins
     set tmp [mrw $GPIO_BOOTSTRAP_REG]
     puts [format "GPIO_BOOTSTRAP_REG  (0x%x): 0x%x" $GPIO_BOOTSTRAP_REG $tmp]
@@ -152,12 +167,77 @@
 
     # display board ID
     puts [format "This is %s (0x%x)" [dict get [boardID $gpbt] $gpbt name] $gpbt]
+    # show it on serial console
+    putsUART0 [format "This is %s (0x%x)\n" [dict get [boardID $gpbt] $gpbt name] $gpbt]
     # return the ddr2 size, used to configure DDR2 on a given board.
     return [dict get [boardID $gpbt] $gpbt ddr2size]
 }
 
 proc configureDDR2regs_256M {} {
-    puts "ConfigureDDR2regs_256M TBD"
+    
+    set DENALI_CTL_00_DATA    [regs DENALI_CTL_00_DATA]
+    set DENALI_CTL_01_DATA    [regs DENALI_CTL_01_DATA]
+    set DENALI_CTL_02_DATA    [regs DENALI_CTL_02_DATA]
+    set DENALI_CTL_03_DATA    [regs DENALI_CTL_03_DATA]
+    set DENALI_CTL_04_DATA    [regs DENALI_CTL_04_DATA]
+    set DENALI_CTL_05_DATA    [regs DENALI_CTL_05_DATA]
+    set DENALI_CTL_06_DATA    [regs DENALI_CTL_06_DATA]
+    set DENALI_CTL_07_DATA    [regs DENALI_CTL_07_DATA]
+    set DENALI_CTL_08_DATA    [regs DENALI_CTL_08_DATA]
+    set DENALI_CTL_09_DATA    [regs DENALI_CTL_09_DATA]
+    set DENALI_CTL_10_DATA    [regs DENALI_CTL_10_DATA]
+    set DENALI_CTL_11_DATA    [regs DENALI_CTL_11_DATA]
+    set DENALI_CTL_12_DATA    [regs DENALI_CTL_12_DATA]
+    set DENALI_CTL_13_DATA    [regs DENALI_CTL_13_DATA]
+    set DENALI_CTL_14_DATA    [regs DENALI_CTL_14_DATA]
+    set DENALI_CTL_15_DATA    [regs DENALI_CTL_15_DATA]
+    set DENALI_CTL_16_DATA    [regs DENALI_CTL_16_DATA]
+    set DENALI_CTL_17_DATA    [regs DENALI_CTL_17_DATA]
+    set DENALI_CTL_18_DATA    [regs DENALI_CTL_18_DATA]
+    set DENALI_CTL_19_DATA    [regs DENALI_CTL_19_DATA]
+    set DENALI_CTL_20_DATA    [regs DENALI_CTL_20_DATA]
+
+    set DENALI_CTL_02_VAL 0x0100000000010100
+    set DENALI_CTL_11_VAL 0x433a32164a560a00
+
+    mw64bit $DENALI_CTL_00_DATA  0x0100000101010101
+    # 01_DATA mod [40]=1, enable BA2
+    mw64bit $DENALI_CTL_01_DATA  0x0100010100000001
+    mw64bit $DENALI_CTL_02_DATA  $DENALI_CTL_02_VAL
+    mw64bit $DENALI_CTL_03_DATA  0x0102020202020201
+    mw64bit $DENALI_CTL_04_DATA  0x0000010100000001
+    mw64bit $DENALI_CTL_05_DATA  0x0203010300010101
+    mw64bit $DENALI_CTL_06_DATA  0x060a020200020202
+    mw64bit $DENALI_CTL_07_DATA  0x0000000300000206 
+    mw64bit $DENALI_CTL_08_DATA  0x6400003f3f0a0209
+    mw64bit $DENALI_CTL_09_DATA  0x1a000000001a1a1a
+    mw64bit $DENALI_CTL_10_DATA  0x0120202020191a18
+    # 11_DATA mod [39-32]=16,more refresh
+    mw64bit $DENALI_CTL_11_DATA  $DENALI_CTL_11_VAL
+    mw64bit $DENALI_CTL_12_DATA  0x0000000000000800
+    mw64bit $DENALI_CTL_13_DATA  0x0010002000100040
+    mw64bit $DENALI_CTL_14_DATA  0x0010004000100040
+    mw64bit $DENALI_CTL_15_DATA  0x04f8000000000000
+    mw64bit $DENALI_CTL_16_DATA  0x000000002cca0000
+    mw64bit $DENALI_CTL_17_DATA  0x0000000000000000
+    mw64bit $DENALI_CTL_18_DATA  0x0302000000000000
+    mw64bit $DENALI_CTL_19_DATA  0x00001300c8030600
+    mw64bit $DENALI_CTL_20_DATA  0x0000000081fe00c8 
+    
+    set wr_dqs_shift 0x40
+    # start DDRC
+    mw64bit $DENALI_CTL_02_DATA [expr $DENALI_CTL_02_VAL | (1 << 32)]
+    # wait int_status[2] (DRAM init complete)
+    puts -nonewline "Waiting for DDR2 controller to init..."
+    set tmp [mrw [expr $DENALI_CTL_08_DATA + 4]]
+    while { [expr $tmp & 0x040000] == 0 } { 
+	sleep 1
+	set tmp [mrw [expr $DENALI_CTL_08_DATA + 4]]
+    }
+    puts "done."
+
+    # do ddr2 training sequence
+    # TBD (for now, if you need it, run trainDDR command)
 }
 
 # converted from u-boot/cpu/arm1136/comcerto/bsp100.c:config_board99()
@@ -187,9 +267,9 @@
     set DENALI_CTL_20_DATA    [regs DENALI_CTL_20_DATA]
 
 
-    set DENALI_CTL_02_VAL 0x0100010000010100
+    set DENALI_CTL_02_VAL 0x0100010000010100 
     set DENALI_CTL_11_VAL 0x433A42124A650A37
-    # set some default values
+    # set some default values     
     mw64bit $DENALI_CTL_00_DATA  0x0100000101010101
     mw64bit $DENALI_CTL_01_DATA  0x0100000100000101
     mw64bit $DENALI_CTL_02_DATA  $DENALI_CTL_02_VAL
@@ -218,11 +298,12 @@
     # wait int_status[2] (DRAM init complete)
     puts -nonewline "Waiting for DDR2 controller to init..."
     set tmp [mrw [expr $DENALI_CTL_08_DATA + 4]]
-    while { [expr $tmp & 0x040000] == 0 } {
+    while { [expr $tmp & 0x040000] == 0 } { 
 	sleep 1
 	set tmp [mrw [expr $DENALI_CTL_08_DATA + 4]]
     }
-   mw64bit $DENALI_CTL_11_DATA [expr ($DENALI_CTL_11_VAL  & ~0x00007F0000000000) | ($wr_dqs_shift << 40) ]
+    # This is not necessary
+    #mw64bit $DENALI_CTL_11_DATA [expr ($DENALI_CTL_11_VAL  & ~0x00007F0000000000) | ($wr_dqs_shift << 40) ]
     puts "done."
 
     # do ddr2 training sequence
@@ -237,18 +318,18 @@
     set GPIO_IOCTRL_REG    [regs GPIO_IOCTRL_REG]
     set GPIO_IOCTRL_VAL    [regs GPIO_IOCTRL_VAL]
     set GPIO_IOCTRL_UART0  [regs GPIO_IOCTRL_UART0]
-    set UART0_LCR	            [regs UART0_LCR]
-    set LCR_DLAB		    [regs LCR_DLAB]
-    set UART0_DLL		    [regs UART0_DLL]
-    set UART0_DLH		    [regs UART0_DLH]
-    set UART0_IIR		    [regs UART0_IIR]
-    set UART0_IER		    [regs UART0_IER]
-    set LCR_ONE_STOP		    [regs LCR_ONE_STOP]
-    set LCR_CHAR_LEN_8		    [regs LCR_CHAR_LEN_8]
+    set UART0_LCR	            [regs UART0_LCR]	
+    set LCR_DLAB		    [regs LCR_DLAB]	
+    set UART0_DLL		    [regs UART0_DLL]		
+    set UART0_DLH		    [regs UART0_DLH]	
+    set UART0_IIR		    [regs UART0_IIR]	
+    set UART0_IER		    [regs UART0_IER]	
+    set LCR_ONE_STOP		    [regs LCR_ONE_STOP]		
+    set LCR_CHAR_LEN_8		    [regs LCR_CHAR_LEN_8]		
     set FCR_XMITRES		    [regs FCR_XMITRES]
-    set FCR_RCVRRES		    [regs FCR_RCVRRES]
-    set FCR_FIFOEN		    [regs FCR_FIFOEN]
-    set IER_UUE			    [regs IER_UUE]
+    set FCR_RCVRRES		    [regs FCR_RCVRRES]	
+    set FCR_FIFOEN		    [regs FCR_FIFOEN]	
+    set IER_UUE			    [regs IER_UUE]		
 
     # unlock writing to IOCTRL register
     mww $GPIO_LOCK_REG $GPIO_IOCTRL_VAL
@@ -274,7 +355,7 @@
 
 proc putcUART0 {char} {
 
-    set UART0_LSR	    [regs UART0_LSR]
+    set UART0_LSR	    [regs UART0_LSR]	
     set UART0_THR	    [regs UART0_THR]
     set LSR_TEMT	    [regs LSR_TEMT]
 
@@ -308,17 +389,24 @@
     resume
 }
 
-proc flashUBOOT {} {
+proc flashUBOOT {file} {
     # this will update uboot on NOR partition
     set EXP_CS0_BASEADDR       [regs EXP_CS0_BASEADDR]
-
+    
     # setup CS0 controller for NOR
     setupNOR
     # make sure we are accessing the lower part of NOR
     lowGPIO5
     flash probe 0
     puts "Erasing sectors 0-3 for uboot"
+    putsUART0 "Erasing sectors 0-3 for uboot\n"
     flash erase_sector 0 0 3
-    puts "Programming u-boot, takes about 4-5 min for 256kb"
-    flash write_image ./images/u-boot.bin $EXP_CS0_BASEADDR
+    puts "Programming u-boot"
+    putsUART0 "Programming u-boot..."
+    memwrite burst enable
+    flash write_image $file $EXP_CS0_BASEADDR
+    memwrite burst disable
+    putsUART0 "done.\n"
+    putsUART0 "Rebooting, please wait!\n"
+    reboot
 }
\ No newline at end of file

Modified: trunk/tcl/target/telo.cfg
===================================================================
--- trunk/tcl/target/telo.cfg	2009-09-29 19:28:08 UTC (rev 2777)
+++ trunk/tcl/target/telo.cfg	2009-09-30 05:37:32 UTC (rev 2778)
@@ -1,9 +1,60 @@
 source [find c100.cfg]
+# basic register defintion for C100
+source [find c100regs.tcl]
+# board-config info
+source [find c100config.tcl]
+# C100 helper functions
+source [find c100helper.tcl]
 
+
+# Telo board & C100 support trst and srst
+# Note that libftd2xx.so tries to assert srst
+# which break this script
+# use libftdi.so library instead with this script
+# make the reset asserted to 
+# allow RC circuit to discharge for: [ms]
+jtag_nsrst_assert_width 100
+jtag_ntrst_assert_width 100
+# don't talk to JTAG after reset for: [ms]
+jtag_nsrst_delay 100
+jtag_ntrst_delay 100
+reset_config trst_and_srst separate
+
+
+
+
+# issue telnet: reset init
+# issue gdb: monitor reset init
+$_TARGETNAME configure -event reset-init {
+	jtag_khz 100
+	# this will setup Telo board
+	setupTelo
+	#turn up the JTAG speed
+	jtag_khz 3000
+	puts "JTAG speek now 3MHz"
+	puts "type helpC100 to get help on C100"
+}
+
+$_TARGETNAME configure -event reset-deassert-post {
+	# Force target into ARM state.
+#	soft_reset_halt # not implemented on ARM11
+	puts "Detected SRSRT asserted on C100.CPU"
+	
+}
+
+$_TARGETNAME configure -event reset-assert-post {
+  puts "Assering reset"
+  #sleep 10
+}
+
+proc power_restore {} { puts "Sensed power restore. No action." } 
+proc srst_deasserted {} { puts "Sensed nSRST deasserted. No action." }
+
+
 # boots from NOR on CS0:  8 MBytes CFI flash, 16-bit bus
-# it's really 16MB but the upper 8mb is controller via gpio?
+# it's really 16MB but the upper 8mb is controller via gpio
+# openocd does not support 'complex reads/writes' to NOR
 flash bank cfi 0x20000000 0x01000000 2 2 $_TARGETNAME
 
-#
-gdb_memory_map enable
-
+# writing data to memory does not work without this
+memwrite burst disable
\ No newline at end of file

[Openocd-svn] r2777 - trunk/src/jtag

[dbrownell at B. <dbr...@ma...>]

Author: dbrownell
Date: 2009-09-29 21:28:08 +0200 (Tue, 29 Sep 2009)
New Revision: 2777

Modified:
   trunk/src/jtag/core.c
Log:
Streamline Capture-IR validation code

 - Don't issue needless JTAG resets ... only do them after
   errors. Normal exit now leaves every TAP in BYPASS.
   
 - Fix an unlikely memory leak on one fault path.

 - Remove the oddball limitation that invalid capture LSBs 
   trigger errors only for TAPs that support IDCODE.

Re the JTAG reset:  there are too many of them, and they can
(and do!) change system state.  So the needless ones should
get removed.  This one was especially pointless.


Modified: trunk/src/jtag/core.c
===================================================================
--- trunk/src/jtag/core.c	2009-09-29 18:30:06 UTC (rev 2776)
+++ trunk/src/jtag/core.c	2009-09-29 19:28:08 UTC (rev 2777)
@@ -1058,6 +1058,9 @@
  * Validate the date loaded by entry to the Capture-IR state, to help
  * find errors related to scan chain configuration (wrong IR lengths)
  * or communication.
+ *
+ * Entry state can be anything.  On non-error exit, all TAPs are in
+ * bypass mode.  On error exits, the scan chain is reset.
  */
 static int jtag_validate_ircapture(void)
 {
@@ -1066,23 +1069,21 @@
 	uint8_t *ir_test = NULL;
 	scan_field_t field;
 	int chain_pos = 0;
+	int retval;
 
-	tap = NULL;
-	total_ir_length = 0;
-	for (;;) {
-		tap = jtag_tap_next_enabled(tap);
-		if (tap == NULL) {
-			break;
-		}
-		total_ir_length += tap->ir_length;
-	}
+	for (tap = NULL, total_ir_length = 0;
+			(tap = jtag_tap_next_enabled(tap)) != NULL;
+			total_ir_length += tap->ir_length)
+		continue;
 
+	/* increase length to add 2 bit sentinel after scan */
 	total_ir_length += 2;
 
 	ir_test = malloc(CEIL(total_ir_length, 8));
 	if (ir_test == NULL)
 		return ERROR_FAIL;
 
+	/* after this scan, all TAPs will capture BYPASS instructions */
 	buf_set_ones(ir_test, total_ir_length);
 
 	field.tap = NULL;
@@ -1090,14 +1091,12 @@
 	field.out_value = ir_test;
 	field.in_value = ir_test;
 
+	jtag_add_plain_ir_scan(1, &field, TAP_IDLE);
 
-	jtag_add_plain_ir_scan(1, &field, TAP_IRPAUSE);
-	jtag_add_tlr();
-
-	int retval;
+	LOG_DEBUG("IR capture validation scan");
 	retval = jtag_execute_queue();
 	if (retval != ERROR_OK)
-		return retval;
+		goto done;
 
 	tap = NULL;
 	chain_pos = 0;
@@ -1119,14 +1118,9 @@
 			LOG_ERROR("%s: IR capture error; saw 0x%s not 0x..1",
 					jtag_tap_name(tap), cbuf);
 
-			/* Fail only if we have IDCODE for this device.
-			 * REVISIT -- why not fail-always?
-			 */
-			if (tap->hasidcode) {
-				free(cbuf);
-				free(ir_test);
-				return ERROR_JTAG_INIT_FAILED;
-			}
+			free(cbuf);
+			retval = ERROR_JTAG_INIT_FAILED;
+			goto done;
 		}
 		chain_pos += tap->ir_length;
 	}
@@ -1140,13 +1134,16 @@
 		LOG_ERROR("IR capture error at bit %d, saw 0x%s not 0x...3",
 				chain_pos, cbuf);
 		free(cbuf);
-		free(ir_test);
-		return ERROR_JTAG_INIT_FAILED;
+		retval = ERROR_JTAG_INIT_FAILED;
 	}
 
+done:
 	free(ir_test);
-
-	return ERROR_OK;
+	if (retval != ERROR_OK) {
+		jtag_add_tlr();
+		jtag_execute_queue();
+	}
+	return retval;
 }
 
 

[Openocd-svn] r2776 - in trunk: doc src/target

[dbrownell at B. <dbr...@ma...>]

Author: dbrownell
Date: 2009-09-29 20:30:06 +0200 (Tue, 29 Sep 2009)
New Revision: 2776

Modified:
   trunk/doc/openocd.texi
   trunk/src/target/arm11.c
Log:
ARM11 command handling fixes

 - Commands were supposed to have been "arm11 memwrite ..."
   not "memwrite ..."
 - Get rid of obfuscatory macros
 - Re-alphabetize
 - Add docs for "arm11 vcr"


Modified: trunk/doc/openocd.texi
===================================================================
--- trunk/doc/openocd.texi	2009-09-29 18:26:18 UTC (rev 2775)
+++ trunk/doc/openocd.texi	2009-09-29 18:30:06 UTC (rev 2776)
@@ -5496,10 +5496,23 @@
 @deffn Command {arm11 step_irq_enable}  [value]
 Displays the value of the flag controlling whether
 IRQs are enabled during single stepping;
-they is disabled by default.
+they are disabled by default.
 If @var{value} is defined, first assigns that.
 @end deffn
 
+@deffn Command {arm11 vcr} [value]
+@cindex vector_catch
+Displays the value of the @emph{Vector Catch Register (VCR)},
+coprocessor 14 register 7.
+If @var{value} is defined, first assigns that.
+
+Vector Catch hardware provides dedicated breakpoints
+for certain hardware events.
+The specific bit values are core-specific (as in fact is using
+coprocessor 14 register 7 itself) but all current ARM11
+cores @emph{except the ARM1176} use the same six bits.
+@end deffn
+
 @section ARMv7 Architecture
 @cindex ARMv7
 

Modified: trunk/src/target/arm11.c
===================================================================
--- trunk/src/target/arm11.c	2009-09-29 18:26:18 UTC (rev 2775)
+++ trunk/src/target/arm11.c	2009-09-29 18:30:06 UTC (rev 2776)
@@ -1905,19 +1905,6 @@
 	return arm11_handle_bool(cmd_ctx, cmd, args, argc, &arm11_config_##name, print_name); \
 }
 
-#define RC_TOP(name, descr, more)  \
-{ \
-	command_t * new_cmd = register_command(cmd_ctx, top_cmd, name, NULL, COMMAND_ANY, descr);  \
-	command_t * top_cmd = new_cmd; \
-	more \
-}
-
-#define RC_FINAL(name, descr, handler)	\
-	register_command(cmd_ctx, top_cmd, name, handler, COMMAND_ANY, descr);
-
-#define RC_FINAL_BOOL(name, descr, var)  \
-	register_command(cmd_ctx, top_cmd, name, arm11_handle_bool_##var, COMMAND_ANY, descr);
-
 BOOL_WRAPPER(memwrite_burst,			"memory write burst mode")
 BOOL_WRAPPER(memwrite_error_fatal,		"fatal error mode for memory writes")
 BOOL_WRAPPER(memrw_no_increment,		"\"no increment\" mode for memory transfers")
@@ -2069,36 +2056,49 @@
 {
 	FNC_INFO;
 
-	command_t * top_cmd = NULL;
+	command_t *top_cmd, *mw_cmd;
 
-	RC_TOP("arm11",				"arm11 specific commands",
+	top_cmd = register_command(cmd_ctx, NULL, "arm11",
+			NULL, COMMAND_ANY, NULL);
 
-	RC_TOP("memwrite",				"Control memory write transfer mode",
+	/* "hardware_step" is only here to check if the default
+	 * simulate + breakpoint implementation is broken.
+	 * TEMPORARY! NOT DOCUMENTED!
+	 */
+	register_command(cmd_ctx, top_cmd, "hardware_step",
+			arm11_handle_bool_hardware_step, COMMAND_ANY,
+			"DEBUG ONLY - Hardware single stepping"
+				" (default: disabled)");
 
-		RC_FINAL_BOOL("burst",				"Enable/Disable non-standard but fast burst mode (default: enabled)",
-						memwrite_burst)
+	register_command(cmd_ctx, top_cmd, "mcr",
+			arm11_handle_mcr, COMMAND_ANY,
+			"Write Coprocessor register");
 
-		RC_FINAL_BOOL("error_fatal",			"Terminate program if transfer error was found (default: enabled)",
-						memwrite_error_fatal)
-) /* memwrite */
+	mw_cmd = register_command(cmd_ctx, top_cmd, "memwrite",
+			NULL, COMMAND_ANY, NULL);
+	register_command(cmd_ctx, mw_cmd, "burst",
+			arm11_handle_bool_memwrite_burst, COMMAND_ANY,
+			"Enable/Disable non-standard but fast burst mode"
+				" (default: enabled)");
+	register_command(cmd_ctx, mw_cmd, "error_fatal",
+			arm11_handle_bool_memwrite_error_fatal, COMMAND_ANY,
+			"Terminate program if transfer error was found"
+				" (default: enabled)");
 
-	RC_FINAL_BOOL("no_increment",			"Don't increment address on multi-read/-write (default: disabled)",
-						memrw_no_increment)
+	register_command(cmd_ctx, top_cmd, "mrc",
+			arm11_handle_mrc, COMMAND_ANY,
+			"Read Coprocessor register");
+	register_command(cmd_ctx, top_cmd, "no_increment",
+			arm11_handle_bool_memrw_no_increment, COMMAND_ANY,
+			"Don't increment address on multi-read/-write"
+				" (default: disabled)");
+	register_command(cmd_ctx, top_cmd, "step_irq_enable",
+			arm11_handle_bool_step_irq_enable, COMMAND_ANY,
+			"Enable interrupts while stepping"
+				" (default: disabled)");
+	register_command(cmd_ctx, top_cmd, "vcr",
+			arm11_handle_vcr, COMMAND_ANY,
+			"Control (Interrupt) Vector Catch Register");
 
-RC_FINAL_BOOL("step_irq_enable",		"Enable interrupts while stepping (default: disabled)",
-					step_irq_enable)
-RC_FINAL_BOOL("hardware_step",		"hardware single stepping. By default use simulate + breakpoint. This command is only here to check if simulate + breakpoint implementation is broken.",
-					hardware_step)
-
-	RC_FINAL("vcr",					"Control (Interrupt) Vector Catch Register",
-						arm11_handle_vcr)
-
-	RC_FINAL("mrc",					"Read Coprocessor register",
-						arm11_handle_mrc)
-
-	RC_FINAL("mcr",					"Write Coprocessor register",
-						arm11_handle_mcr)
-) /* arm11 */
-
 	return ERROR_OK;
 }

[Openocd-svn] r2775 - in trunk: doc src/jtag

[dbrownell at B. <dbr...@ma...>]

Author: dbrownell
Date: 2009-09-29 20:26:18 +0200 (Tue, 29 Sep 2009)
New Revision: 2775

Modified:
   trunk/doc/openocd.texi
   trunk/src/jtag/core.c
Log:
Make "-expected-id 0" suppress warnings; not unlike it used to do.


Modified: trunk/doc/openocd.texi
===================================================================
--- trunk/doc/openocd.texi	2009-09-29 18:20:30 UTC (rev 2774)
+++ trunk/doc/openocd.texi	2009-09-29 18:26:18 UTC (rev 2775)
@@ -1253,7 +1253,7 @@
 values for @code{CHIPNAME}, so
 it adds a different TAP each time.
 
-If there are one or more nonzero @option{-expected-id} values,
+If there are nonzero @option{-expected-id} values,
 OpenOCD attempts to verify the actual tap id against those values.
 It will issue error messages if there is mismatch, which
 can help to pinpoint problems in OpenOCD configurations.
@@ -2373,11 +2373,13 @@
 (the TAP is linked in).
 @xref{Enabling and Disabling TAPs}.
 @item @code{-expected-id} @var{number}
-@*A non-zero value represents the expected 32-bit IDCODE
-found when the JTAG chain is examined.
+@*A non-zero @var{number} represents a 32-bit IDCODE
+which you expect to find when the scan chain is examined.
 These codes are not required by all JTAG devices.
 @emph{Repeat the option} as many times as required if more than one
 ID code could appear (for example, multiple versions).
+Specify @var{number} as zero to suppress warnings about IDCODE
+values that were found but not included in the list.
 @item @code{-ircapture} @var{NUMBER}
 @*The bit pattern loaded by the TAP into the JTAG shift register
 on entry to the @sc{ircapture} state, such as 0x01.

Modified: trunk/src/jtag/core.c
===================================================================
--- trunk/src/jtag/core.c	2009-09-29 18:20:30 UTC (rev 2774)
+++ trunk/src/jtag/core.c	2009-09-29 18:26:18 UTC (rev 2775)
@@ -959,10 +959,14 @@
 	{
 		if (tap->idcode == tap->expected_ids[ii])
 			return true;
+
+		/* treat "-expected-id 0" as a "don't-warn" wildcard */
+		if (0 == tap->expected_ids[ii])
+			return true;
 	}
 
-	/* If none of the expected ids matched, log an error */
-	jtag_examine_chain_display(LOG_LVL_ERROR, "UNEXPECTED",
+	/* If none of the expected ids matched, warn */
+	jtag_examine_chain_display(LOG_LVL_WARNING, "UNEXPECTED",
 			tap->dotted_name, tap->idcode);
 	for (ii = 0; ii < tap->expected_ids_cnt; ii++)
 	{
@@ -1025,7 +1029,7 @@
 		}
 		tap->idcode = idcode;
 
-		// ensure the TAP ID does matches what was expected
+		/* ensure the TAP ID matches what was expected */
 		if (!jtag_examine_chain_match_tap(tap))
 			return ERROR_JTAG_INIT_FAILED;
 	}

[Openocd-svn] r2774 - trunk/doc

[dbrownell at B. <dbr...@ma...>]

Author: dbrownell
Date: 2009-09-29 20:20:30 +0200 (Tue, 29 Sep 2009)
New Revision: 2774

Modified:
   trunk/doc/openocd.texi
Log:
Doc updates:  add section on target software changes, minor fixes


Modified: trunk/doc/openocd.texi
===================================================================
--- trunk/doc/openocd.texi	2009-09-29 18:08:16 UTC (rev 2773)
+++ trunk/doc/openocd.texi	2009-09-29 18:20:30 UTC (rev 2774)
@@ -845,7 +845,55 @@
 Other helper scripts might be used to write production system images,
 involving considerably more than just a three stage bootloader.
 
+@section Target Software Changes
 
+Sometimes you may want to make some small changes to the software
+you're developing, to help make JTAG debugging work better.
+For example, in C or assembly language code you might
+use @code{#ifdef JTAG_DEBUG} (or its converse) around code
+handling issues like:
+
+@itemize @bullet
+
+@item @b{ARM Wait-For-Interrupt}...
+Many ARM chips synchronize the JTAG clock using the core clock.
+Low power states which stop that core clock thus prevent JTAG access.
+Idle loops in tasking environments often enter those low power states
+via the @code{WFI} instruction (or its coprocessor equivalent, before ARMv7).
+
+You may want to @emph{disable that instruction} in source code,
+or otherwise prevent using that state,
+to ensure you can get JTAG access at any time.
+For example, the OpenOCD @command{halt} command may not
+work for an idle processor otherwise.
+
+@item @b{Delay after reset}...
+Not all chips have good support for debugger access
+right after reset; many LPC2xxx chips have issues here.
+Similarly, applications that reconfigure pins used for
+JTAG access as they start will also block debugger access.
+
+To work with boards like this, @emph{enable a short delay loop}
+the first thing after reset, before "real" startup activities.
+For example, one second's delay is usually more than enough
+time for a JTAG debugger to attach, so that
+early code execution can be debugged
+or firmware can be replaced.
+
+@item @b{Debug Communications Channel (DCC)}...
+Some processors include mechanisms to send messages over JTAG.
+Many ARM cores support these, as do some cores from other vendors.
+(OpenOCD may be able to use this DCC internally, speeding up some
+operations like writing to memory.)
+
+Your application may want to deliver various debugging messages
+over JTAG, by @emph{linking with a small library of code}
+provided with OpenOCD and using the utilities there to send
+various kinds of message.
+@xref{Software Debug Messages and Tracing}.
+
+@end itemize
+
 @node Config File Guidelines
 @chapter Config File Guidelines
 
@@ -2462,7 +2510,7 @@
 by sending it a @option{tap-disable} event.
 Returns the string "1" if the tap
 specified by @var{dotted.name} is enabled,
-and "0" if it is disbabled.
+and "0" if it is disabled.
 @end deffn
 
 @deffn Command {jtag tapenable} dotted.name
@@ -2470,13 +2518,13 @@
 by sending it a @option{tap-enable} event.
 Returns the string "1" if the tap
 specified by @var{dotted.name} is enabled,
-and "0" if it is disbabled.
+and "0" if it is disabled.
 @end deffn
 
 @deffn Command {jtag tapisenabled} dotted.name
 Returns the string "1" if the tap
 specified by @var{dotted.name} is enabled,
-and "0" if it is disbabled.
+and "0" if it is disabled.
 
 @quotation Note
 Humans will find the @command{scan_chain} command more helpful
@@ -5600,7 +5648,7 @@
 otherwise the libdcc format is used.
 @end deffn
 
-@deffn Command {trace history} (@option{clear}|count)
+@deffn Command {trace history} [@option{clear}|count]
 With no parameter, displays all the trace points that have triggered
 in the order they triggered.
 With the parameter @option{clear}, erases all current trace history records.
@@ -5608,7 +5656,7 @@
 history records.
 @end deffn
 
-@deffn Command {trace point} (@option{clear}|identifier)
+@deffn Command {trace point} [@option{clear}|identifier]
 With no parameter, displays all trace point identifiers and how many times
 they have been triggered.
 With the parameter @option{clear}, erases all current trace point counters.

[Openocd-svn] r2773 - trunk/src/target

[dbrownell at B. <dbr...@ma...>]

Author: dbrownell
Date: 2009-09-29 20:08:16 +0200 (Tue, 29 Sep 2009)
New Revision: 2773

Modified:
   trunk/src/target/etm.c
Log:
ETM: fix build issue on MinGW.

The Win32 global namespace is rather cluttered...


Modified: trunk/src/target/etm.c
===================================================================
--- trunk/src/target/etm.c	2009-09-29 18:06:26 UTC (rev 2772)
+++ trunk/src/target/etm.c	2009-09-29 18:08:16 UTC (rev 2773)
@@ -68,6 +68,7 @@
 
 /*
  * Registers 0..0x7f are JTAG-addressable using scanchain 6.
+ * (Or on some processors, through coprocessor operations.)
  * Newer versions of ETM make some W/O registers R/W, and
  * provide definitions for some previously-unused bits.
  */
@@ -154,7 +155,7 @@
 };
 
 static const struct etm_reg_info etm_counters[] = {
-#define COUNTER(i) \
+#define ETM_COUNTER(i) \
 		{ ETM_COUNTER_RELOAD_VALUE + (i), 16, WO, 0x10, \
 				"ETM_COUNTER_RELOAD_VALUE" #i, }, \
 		{ ETM_COUNTER_ENABLE + (i), 18, WO, 0x10, \
@@ -163,38 +164,38 @@
 				"ETM_COUNTER_RELOAD_EVENT" #i, }, \
 		{ ETM_COUNTER_VALUE + (i), 16, RO, 0x10, \
 				"ETM_COUNTER_VALUE" #i, }
-	COUNTER(0),
-	COUNTER(1),
-	COUNTER(2),
-	COUNTER(3),
-#undef COUNTER
+	ETM_COUNTER(0),
+	ETM_COUNTER(1),
+	ETM_COUNTER(2),
+	ETM_COUNTER(3),
+#undef ETM_COUNTER
 };
 
 static const struct etm_reg_info etm_sequencer[] = {
-#define SEQ(i) \
+#define ETM_SEQ(i) \
 		{ ETM_SEQUENCER_EVENT + (i), 17, WO, 0x10, \
 				"ETM_SEQUENCER_EVENT" #i, }
-	SEQ(0),				/* 1->2 */
-	SEQ(1),				/* 2->1 */
-	SEQ(2),				/* 2->3 */
-	SEQ(3),				/* 3->1 */
-	SEQ(4),				/* 3->2 */
-	SEQ(5),				/* 1->3 */
-#undef SEQ
+	ETM_SEQ(0),				/* 1->2 */
+	ETM_SEQ(1),				/* 2->1 */
+	ETM_SEQ(2),				/* 2->3 */
+	ETM_SEQ(3),				/* 3->1 */
+	ETM_SEQ(4),				/* 3->2 */
+	ETM_SEQ(5),				/* 1->3 */
+#undef ETM_SEQ
 	/* 0x66 reserved */
 	{ ETM_SEQUENCER_STATE,  2, RO, 0x10, "ETM_SEQUENCER_STATE", },
 };
 
 static const struct etm_reg_info etm_outputs[] = {
-#define OUT(i) \
+#define ETM_OUTPUT(i) \
 		{ ETM_EXTERNAL_OUTPUT + (i), 17, WO, 0x10, \
 				"ETM_EXTERNAL_OUTPUT" #i, }
 
-	OUT(0),
-	OUT(1),
-	OUT(2),
-	OUT(3),
-#undef OUT
+	ETM_OUTPUT(0),
+	ETM_OUTPUT(1),
+	ETM_OUTPUT(2),
+	ETM_OUTPUT(3),
+#undef ETM_OUTPUT
 };
 
 #if 0

[Openocd-svn] r2772 - trunk/src/target

[dbrownell at B. <dbr...@ma...>]

Author: dbrownell
Date: 2009-09-29 20:06:26 +0200 (Tue, 29 Sep 2009)
New Revision: 2772

Modified:
   trunk/src/target/etb.c
   trunk/src/target/etb.h
Log:
ETB: cleanup needless symbol exports and forward decls.


Modified: trunk/src/target/etb.c
===================================================================
--- trunk/src/target/etb.c	2009-09-29 14:24:02 UTC (rev 2771)
+++ trunk/src/target/etb.c	2009-09-29 18:06:26 UTC (rev 2772)
@@ -96,6 +96,33 @@
 	return ERROR_OK;
 }
 
+static int etb_read_reg_w_check(reg_t *, uint8_t *, uint8_t *);
+static int etb_set_reg_w_exec(reg_t *, uint8_t *);
+
+static int etb_read_reg(reg_t *reg)
+{
+	return etb_read_reg_w_check(reg, NULL, NULL);
+}
+
+static int etb_get_reg(reg_t *reg)
+{
+	int retval;
+
+	if ((retval = etb_read_reg(reg)) != ERROR_OK)
+	{
+		LOG_ERROR("BUG: error scheduling etm register read");
+		return retval;
+	}
+
+	if ((retval = jtag_execute_queue()) != ERROR_OK)
+	{
+		LOG_ERROR("register read failed");
+		return retval;
+	}
+
+	return ERROR_OK;
+}
+
 reg_cache_t* etb_build_reg_cache(etb_t *etb)
 {
 	reg_cache_t *reg_cache = malloc(sizeof(reg_cache_t));
@@ -138,29 +165,10 @@
 	return reg_cache;
 }
 
-static int etb_get_reg(reg_t *reg)
+static void etb_getbuf(jtag_callback_data_t arg)
 {
-	int retval;
+	uint8_t *in = (uint8_t *)arg;
 
-	if ((retval = etb_read_reg(reg)) != ERROR_OK)
-	{
-		LOG_ERROR("BUG: error scheduling etm register read");
-		return retval;
-	}
-
-	if ((retval = jtag_execute_queue()) != ERROR_OK)
-	{
-		LOG_ERROR("register read failed");
-		return retval;
-	}
-
-	return ERROR_OK;
-}
-
-
-static void etb_getbuf(jtag_callback_data_t arg)
-{
-  uint8_t *in = (uint8_t *)arg;
 	*((uint32_t *)in) = buf_get_u32(in, 0, 32);
 }
 
@@ -218,7 +226,8 @@
 	return ERROR_OK;
 }
 
-int etb_read_reg_w_check(reg_t *reg, uint8_t* check_value, uint8_t* check_mask)
+static int etb_read_reg_w_check(reg_t *reg,
+		uint8_t* check_value, uint8_t* check_mask)
 {
 	etb_reg_t *etb_reg = reg->arch_info;
 	uint8_t reg_addr = etb_reg->addr & 0x7f;
@@ -271,12 +280,9 @@
 	return ERROR_OK;
 }
 
-int etb_read_reg(reg_t *reg)
-{
-	return etb_read_reg_w_check(reg, NULL, NULL);
-}
+static int etb_write_reg(reg_t *, uint32_t);
 
-int etb_set_reg(reg_t *reg, uint32_t value)
+static int etb_set_reg(reg_t *reg, uint32_t value)
 {
 	int retval;
 
@@ -293,7 +299,7 @@
 	return ERROR_OK;
 }
 
-int etb_set_reg_w_exec(reg_t *reg, uint8_t *buf)
+static int etb_set_reg_w_exec(reg_t *reg, uint8_t *buf)
 {
 	int retval;
 
@@ -307,7 +313,7 @@
 	return ERROR_OK;
 }
 
-int etb_write_reg(reg_t *reg, uint32_t value)
+static int etb_write_reg(reg_t *reg, uint32_t value)
 {
 	etb_reg_t *etb_reg = reg->arch_info;
 	uint8_t reg_addr = etb_reg->addr & 0x7f;
@@ -345,11 +351,6 @@
 	return ERROR_OK;
 }
 
-int etb_store_reg(reg_t *reg)
-{
-	return etb_write_reg(reg, buf_get_u32(reg->value, 0, reg->size));
-}
-
 static int etb_register_commands(struct command_context_s *cmd_ctx)
 {
 	command_t *etb_cmd;

Modified: trunk/src/target/etb.h
===================================================================
--- trunk/src/target/etb.h	2009-09-29 14:24:02 UTC (rev 2771)
+++ trunk/src/target/etb.h	2009-09-29 18:06:26 UTC (rev 2772)
@@ -57,11 +57,5 @@
 extern etm_capture_driver_t etb_capture_driver;
 
 extern reg_cache_t* etb_build_reg_cache(etb_t *etb);
-extern int etb_read_reg(reg_t *reg);
-extern int etb_write_reg(reg_t *reg, uint32_t value);
-extern int etb_read_reg_w_check(reg_t *reg, uint8_t* check_value, uint8_t* check_mask);
-extern int etb_store_reg(reg_t *reg);
-extern int etb_set_reg(reg_t *reg, uint32_t value);
-extern int etb_set_reg_w_exec(reg_t *reg, uint8_t *buf);
 
 #endif /* ETB_H */

[Openocd-svn] r2771 - trunk/src/server

[oharboe at B. <oh...@ma...>]

Author: oharboe
Date: 2009-09-29 16:24:02 +0200 (Tue, 29 Sep 2009)
New Revision: 2771

Modified:
   trunk/src/server/httpd.c
Log:
handle single threading

Modified: trunk/src/server/httpd.c
===================================================================
--- trunk/src/server/httpd.c	2009-09-29 14:23:42 UTC (rev 2770)
+++ trunk/src/server/httpd.c	2009-09-29 14:24:02 UTC (rev 2771)
@@ -34,6 +34,20 @@
 
 #define PAGE_NOT_FOUND "<html><head><title > File not found</title></head><body > File not found</body></html>"
 
+static pthread_mutex_t mutex;
+
+void openocd_sleep_prelude(void)
+{
+	pthread_mutex_unlock(&mutex);
+}
+
+void openocd_sleep_postlude(void)
+{
+	pthread_mutex_lock(&mutex);
+}
+
+
+
 int loadFile(const char *name, void **data, size_t *len);
 
 static const char *appendf(const char *prev, const char *format, ...)
@@ -184,7 +198,9 @@
 
 	if (r->postprocessor)
 	{
+		openocd_sleep_postlude();
 		MHD_destroy_post_processor(r->postprocessor);
+		openocd_sleep_prelude();
 	}
 
 	free(r);
@@ -257,7 +273,7 @@
 }
 
 
-int handle_request(struct MHD_Connection * connection, const char * url)
+static int handle_request(struct MHD_Connection * connection, const char * url)
 {
 	struct MHD_Response * response;
 
@@ -335,7 +351,7 @@
 	}
 }
 
-static int ahc_echo(void * cls, struct MHD_Connection * connection,
+static int ahc_echo_inner(void * cls, struct MHD_Connection * connection,
 		const char * url, const char * method, const char * version,
 		const char * upload_data, unsigned int * upload_data_size, void ** ptr)
 {
@@ -423,10 +439,24 @@
 	return result;
 }
 
+
+static int ahc_echo(void * cls, struct MHD_Connection * connection,
+		const char * url, const char * method, const char * version,
+		const char * upload_data, unsigned int * upload_data_size, void ** ptr)
+{
+	int result;
+
+	openocd_sleep_postlude();
+
+	result = ahc_echo_inner(cls, connection, url, method, version, upload_data, upload_data_size, ptr);
+
+	openocd_sleep_prelude();
+
+	return result;
+}
+
 static struct MHD_Daemon * d;
-static pthread_mutex_t mutex;
 
-
 int httpd_start(void)
 {
 	pthread_mutexattr_t attr;
@@ -464,13 +494,3 @@
 	pthread_mutex_destroy(&mutex);
 }
 
-void openocd_sleep_prelude(void)
-{
-	pthread_mutex_unlock(&mutex);
-}
-
-void openocd_sleep_postlude(void)
-{
-	pthread_mutex_lock(&mutex);
-}
-

[Openocd-svn] r2770 - trunk/src/jtag

[oharboe at B. <oh...@ma...>]

Author: oharboe
Date: 2009-09-29 16:23:42 +0200 (Tue, 29 Sep 2009)
New Revision: 2770

Modified:
   trunk/src/jtag/driver.c
Log:
reentry assert

Modified: trunk/src/jtag/driver.c
===================================================================
--- trunk/src/jtag/driver.c	2009-09-29 13:46:26 UTC (rev 2769)
+++ trunk/src/jtag/driver.c	2009-09-29 14:23:42 UTC (rev 2770)
@@ -489,6 +489,11 @@
 
 int interface_jtag_execute_queue(void)
 {
+	static int reentry = 0;
+
+	assert(reentry==0);
+	reentry++;
+
 	int retval = default_interface_jtag_execute_queue();
 	if (retval == ERROR_OK)
 	{
@@ -504,6 +509,8 @@
 	jtag_command_queue_reset();
 	jtag_callback_queue_reset();
 
+	reentry--;
+
 	return retval;
 }
 

[Openocd-svn] r2769 - in trunk: doc/manual src/server

[oharboe at B. <oh...@ma...>]

Author: oharboe
Date: 2009-09-29 15:46:26 +0200 (Tue, 29 Sep 2009)
New Revision: 2769

Modified:
   trunk/doc/manual/server.txt
   trunk/src/server/httpd.c
Log:
httpd smoketest info

Modified: trunk/doc/manual/server.txt
===================================================================
--- trunk/doc/manual/server.txt	2009-09-29 06:07:50 UTC (rev 2768)
+++ trunk/doc/manual/server.txt	2009-09-29 13:46:26 UTC (rev 2769)
@@ -311,6 +311,15 @@
 
 /** @page serverhttp OpenOCD HTTP Server API
 
-This section needs to be expanded.
 
+Smoketest:
+
+configure --enable-httpd --enable-dummy --enable-ioutil
+
+openocd -s /usr/local/share/openocd -f httpd/httpd.tcl -f interface/dummy.cfg -f target/lpc2148.cfg
+
+Navigate to: http://localhost:8888/
+
+ 
+
  */

Modified: trunk/src/server/httpd.c
===================================================================
--- trunk/src/server/httpd.c	2009-09-29 06:07:50 UTC (rev 2768)
+++ trunk/src/server/httpd.c	2009-09-29 13:46:26 UTC (rev 2769)
@@ -1,9 +1,7 @@
 /***************************************************************************
- *   Copyright (C) 2007,2008 Øyvind Harboe                                 *
+ *   Copyright (C) 2007,2008,2009 Øyvind Harboe                            *
  *   oyv...@zy...                                               *
  *                                                                         *
- *   Copyright (C) 2008 Free Software Foundation
- *                                                                         *
  *   This program is free software; you can redistribute it and/or modify  *
  *   it under the terms of the GNU General Public License as published by  *
  *   the Free Software Foundation; either version 2 of the License, or     *
@@ -198,6 +196,7 @@
 		const char *data, size_t off, size_t size)
 {
 	Jim_Obj *keyObj = Jim_NewStringObj(interp, key, -1);
+	Jim_IncrRefCount(keyObj);
 	Jim_Obj *value = NULL;
 
 	Jim_Obj *dict = Jim_GetVariableStr(interp, "httppostdata", 0);
@@ -208,16 +207,32 @@
 		{
 			 value = NULL;
 		}
+		else
+		{
+			Jim_IncrRefCount(value);
+		}
 	}
+
 	if (value == NULL)
+	{
 		value = Jim_NewStringObj(interp, "", -1);
+		Jim_IncrRefCount(value);
 
+	}
+
 	/* create a new object we append to and insert into this location */
 	Jim_Obj *newObj = Jim_NewStringObj(interp, "", -1);
+	Jim_IncrRefCount(newObj);
 	Jim_AppendObj(interp, newObj, value);
 	Jim_AppendString(interp, newObj, data, size);
 	/* uhh... use name here of dictionary */
-	Jim_SetDictKeysVector(interp, Jim_NewStringObj(interp, "httppostdata", -1), &keyObj, 1, newObj);
+	dict = Jim_NewStringObj(interp, "httppostdata", -1);
+	Jim_IncrRefCount(dict);
+	Jim_SetDictKeysVector(interp, dict, &keyObj, 1, newObj);
+	Jim_DecrRefCount(interp, dict);
+	Jim_DecrRefCount(interp, value);
+	Jim_DecrRefCount(interp, newObj);
+	Jim_DecrRefCount(interp, keyObj);
 }
 
 /* append data to each key */

[Openocd-svn] r2768 - trunk/src/jtag

[oharboe at B. <oh...@ma...>]

Author: oharboe
Date: 2009-09-29 08:07:50 +0200 (Tue, 29 Sep 2009)
New Revision: 2768

Modified:
   trunk/src/jtag/core.c
   trunk/src/jtag/jtag.h
   trunk/src/jtag/tcl.c
Log:
added t/nsrst_assert_width commands

Modified: trunk/src/jtag/core.c
===================================================================
--- trunk/src/jtag/core.c	2009-09-28 12:22:20 UTC (rev 2767)
+++ trunk/src/jtag/core.c	2009-09-29 06:07:50 UTC (rev 2768)
@@ -93,6 +93,8 @@
 /* how long the OpenOCD should wait before attempting JTAG communication after reset lines deasserted (in ms) */
 static int jtag_nsrst_delay = 0; /* default to no nSRST delay */
 static int jtag_ntrst_delay = 0; /* default to no nTRST delay */
+static int jtag_nsrst_assert_width = 0; /* width of assertion */
+static int jtag_ntrst_assert_width = 0; /* width of assertion */
 
 typedef struct jtag_event_callback_s
 {
@@ -661,7 +663,11 @@
 	if (jtag_srst != new_srst) {
 		jtag_srst = new_srst;
 		if (jtag_srst)
+		{
 			LOG_DEBUG("SRST line asserted");
+			if (jtag_nsrst_assert_width)
+				jtag_add_sleep(jtag_nsrst_assert_width * 1000);
+		}
 		else {
 			LOG_DEBUG("SRST line released");
 			if (jtag_nsrst_delay)
@@ -685,6 +691,8 @@
 		if (jtag_trst) {
 			LOG_DEBUG("TRST line asserted");
 			tap_set_state(TAP_RESET);
+			if (jtag_ntrst_assert_width)
+				jtag_add_sleep(jtag_ntrst_assert_width * 1000);
 		} else {
 			LOG_DEBUG("TRST line released");
 			if (jtag_ntrst_delay)
@@ -1480,3 +1488,21 @@
 {
 	return jtag_ntrst_delay;
 }
+
+
+void jtag_set_nsrst_assert_width(unsigned delay)
+{
+	jtag_nsrst_assert_width = delay;
+}
+unsigned jtag_get_nsrst_assert_width(void)
+{
+	return jtag_nsrst_assert_width;
+}
+void jtag_set_ntrst_assert_width(unsigned delay)
+{
+	jtag_ntrst_assert_width = delay;
+}
+unsigned jtag_get_ntrst_assert_width(void)
+{
+	return jtag_ntrst_assert_width;
+}

Modified: trunk/src/jtag/jtag.h
===================================================================
--- trunk/src/jtag/jtag.h	2009-09-28 12:22:20 UTC (rev 2767)
+++ trunk/src/jtag/jtag.h	2009-09-29 06:07:50 UTC (rev 2768)
@@ -289,6 +289,12 @@
 void jtag_set_ntrst_delay(unsigned delay);
 unsigned jtag_get_ntrst_delay(void);
 
+void jtag_set_nsrst_assert_width(unsigned delay);
+unsigned jtag_get_nsrst_assert_width(void);
+
+void jtag_set_ntrst_assert_width(unsigned delay);
+unsigned jtag_get_ntrst_assert_width(void);
+
 /// @returns The current state of TRST.
 int jtag_get_trst(void);
 /// @returns The current state of SRST.

Modified: trunk/src/jtag/tcl.c
===================================================================
--- trunk/src/jtag/tcl.c	2009-09-28 12:22:20 UTC (rev 2767)
+++ trunk/src/jtag/tcl.c	2009-09-29 06:07:50 UTC (rev 2768)
@@ -61,6 +61,8 @@
 static int handle_reset_config_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
 static int handle_jtag_nsrst_delay_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
 static int handle_jtag_ntrst_delay_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
+static int handle_jtag_nsrst_assert_width_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
+static int handle_jtag_ntrst_assert_width_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
 
 static int handle_scan_chain_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
 
@@ -619,6 +621,10 @@
 		COMMAND_ANY, "jtag_nsrst_delay <ms> - delay after deasserting srst in ms");
 	register_command(cmd_ctx, NULL, "jtag_ntrst_delay", handle_jtag_ntrst_delay_command,
 		COMMAND_ANY, "jtag_ntrst_delay <ms> - delay after deasserting trst in ms");
+	register_command(cmd_ctx, NULL, "jtag_nsrst_assert_width", handle_jtag_nsrst_assert_width_command,
+		COMMAND_ANY, "jtag_nsrst_assert_width <ms> - delay after asserting srst in ms");
+	register_command(cmd_ctx, NULL, "jtag_ntrst_assert_width", handle_jtag_ntrst_assert_width_command,
+		COMMAND_ANY, "jtag_ntrst_assert_width <ms> - delay after asserting trst in ms");
 
 	register_command(cmd_ctx, NULL, "scan_chain", handle_scan_chain_command,
 		COMMAND_EXEC, "print current scan chain configuration");
@@ -979,6 +985,40 @@
 	return ERROR_OK;
 }
 
+static int handle_jtag_nsrst_assert_width_command(struct command_context_s *cmd_ctx,
+		char *cmd, char **args, int argc)
+{
+	if (argc > 1)
+		return ERROR_COMMAND_SYNTAX_ERROR;
+	if (argc == 1)
+	{
+		unsigned delay;
+		int retval = parse_uint(args[0], &delay);
+		if (ERROR_OK != retval)
+			return retval;
+		jtag_set_nsrst_assert_width(delay);
+	}
+	command_print(cmd_ctx, "jtag_nsrst_assert_width: %u", jtag_get_nsrst_assert_width());
+	return ERROR_OK;
+}
+
+static int handle_jtag_ntrst_assert_width_command(struct command_context_s *cmd_ctx,
+		char *cmd, char **args, int argc)
+{
+	if (argc > 1)
+		return ERROR_COMMAND_SYNTAX_ERROR;
+	if (argc == 1)
+	{
+		unsigned delay;
+		int retval = parse_uint(args[0], &delay);
+		if (ERROR_OK != retval)
+			return retval;
+		jtag_set_ntrst_assert_width(delay);
+	}
+	command_print(cmd_ctx, "jtag_ntrst_assert_width: %u", jtag_get_ntrst_assert_width());
+	return ERROR_OK;
+}
+
 static int handle_jtag_speed_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
 {
 	int retval = ERROR_OK;

[Openocd-svn] r2767 - trunk/src/jtag

[oharboe at B. <oh...@ma...>]

Author: oharboe
Date: 2009-09-28 14:22:20 +0200 (Mon, 28 Sep 2009)
New Revision: 2767

Modified:
   trunk/src/jtag/ft2232.c
Log:
if srst pulls trst, then set state to TAP_RESET. 

Modified: trunk/src/jtag/ft2232.c
===================================================================
--- trunk/src/jtag/ft2232.c	2009-09-28 12:13:49 UTC (rev 2766)
+++ trunk/src/jtag/ft2232.c	2009-09-28 12:22:20 UTC (rev 2767)
@@ -1,13 +1,16 @@
 /***************************************************************************
+*   Copyright (C) 2009 by Øyvind Harboe                                   *
+*	Øyvind Harboe <oyv...@zy...>                               *
+*                                                                         *
+*   Copyright (C) 2009 by SoftPLC Corporation.  http://softplc.com        *
+*	Dick Hollenbeck <di...@so...>                                    *
+*                                                                         *
 *   Copyright (C) 2004, 2006 by Dominic Rath                              *
 *   Dom...@gm...                                                   *
 *                                                                         *
 *   Copyright (C) 2008 by Spencer Oliver                                  *
 *   sp...@sp...                                                  *
 *                                                                         *
-*   Copyright (C) 2009 by SoftPLC Corporation.  http://softplc.com        *
-*	Dick Hollenbeck <di...@so...>                                    *
-*                                                                         *
 *   This program is free software; you can redistribute it and/or modify  *
 *   it under the terms of the GNU General Public License as published by  *
 *   the Free Software Foundation; either version 2 of the License, or     *
@@ -1709,6 +1712,11 @@
 		first_unsent = cmd;
 	}
 
+	if ((cmd->cmd.reset->trst == 1) || (cmd->cmd.reset->srst && (jtag_get_reset_config() & RESET_SRST_PULLS_TRST)))
+	{
+		tap_set_state(TAP_RESET);
+	}
+
 	layout->reset(cmd->cmd.reset->trst, cmd->cmd.reset->srst);
 	require_send = 1;
 

[Openocd-svn] r2766 - trunk/doc/manual

[oharboe at B. <oh...@ma...>]

Author: oharboe
Date: 2009-09-28 14:13:49 +0200 (Mon, 28 Sep 2009)
New Revision: 2766

Modified:
   trunk/doc/manual/server.txt
Log:
spelling fix

Modified: trunk/doc/manual/server.txt
===================================================================
--- trunk/doc/manual/server.txt	2009-09-28 04:55:23 UTC (rev 2765)
+++ trunk/doc/manual/server.txt	2009-09-28 12:13:49 UTC (rev 2766)
@@ -111,7 +111,7 @@
 devince with a built-in HTTP server.  Later, they were willing to both
 contribute and integrate most of that work into the main tree.
 
-@subsection serverdocsother Other Options Concidered
+@subsection serverdocsother Other Options Considered
 
 What if a web browser is not acceptable ie: You want to write your own
 front gadget in Eclipse, or KDevelop, or PerlTK, Ruby, or what ever

[Openocd-svn] r2765 - trunk/src/target

[dbrownell at B. <dbr...@ma...>]

Author: dbrownell
Date: 2009-09-28 06:55:23 +0200 (Mon, 28 Sep 2009)
New Revision: 2765

Modified:
   trunk/src/target/arm9tdmi.c
Log:
Shrink symbols exported from arm9tdmi.c and remove a forward ref.


Modified: trunk/src/target/arm9tdmi.c
===================================================================
--- trunk/src/target/arm9tdmi.c	2009-09-27 17:08:42 UTC (rev 2764)
+++ trunk/src/target/arm9tdmi.c	2009-09-28 04:55:23 UTC (rev 2765)
@@ -45,14 +45,10 @@
 #define _DEBUG_INSTRUCTION_EXECUTION_
 #endif
 
-/* cli handling */
-int handle_arm9tdmi_catch_vectors_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
-
 /* forward declarations */
-int arm9tdmi_target_create(struct target_s *target, Jim_Interp *interp);
+static int arm9tdmi_target_create(struct target_s *target, Jim_Interp *interp);
+static int arm9tdmi_quit(void);
 
-int arm9tdmi_quit(void);
-
 target_type_t arm9tdmi_target =
 {
 	.name = "arm9tdmi",
@@ -92,7 +88,7 @@
 	.quit = arm9tdmi_quit
 };
 
-arm9tdmi_vector_t arm9tdmi_vectors[] =
+static arm9tdmi_vector_t arm9tdmi_vectors[] =
 {
 	{"reset", ARM9TDMI_RESET_VECTOR},
 	{"undef", ARM9TDMI_UNDEF_VECTOR},
@@ -368,7 +364,8 @@
 	return ERROR_OK;
 }
 
-void arm9tdmi_change_to_arm(target_t *target, uint32_t *r0, uint32_t *pc)
+static void arm9tdmi_change_to_arm(target_t *target,
+		uint32_t *r0, uint32_t *pc)
 {
 	int retval = ERROR_OK;
 	/* get pointers to arch-specific information */
@@ -449,7 +446,8 @@
 	}
 }
 
-void arm9tdmi_read_core_regs_target_buffer(target_t *target, uint32_t mask, void* buffer, int size)
+static void arm9tdmi_read_core_regs_target_buffer(target_t *target,
+		uint32_t mask, void* buffer, int size)
 {
 	int i;
 	/* get pointers to arch-specific information */
@@ -490,7 +488,7 @@
 	}
 }
 
-void arm9tdmi_read_xpsr(target_t *target, uint32_t *xpsr, int spsr)
+static void arm9tdmi_read_xpsr(target_t *target, uint32_t *xpsr, int spsr)
 {
 	/* get pointers to arch-specific information */
 	armv4_5_common_t *armv4_5 = target->arch_info;
@@ -514,7 +512,7 @@
 	arm9tdmi_clock_out(jtag_info, ARMV4_5_NOP, 0, xpsr, 0);
 }
 
-void arm9tdmi_write_xpsr(target_t *target, uint32_t xpsr, int spsr)
+static void arm9tdmi_write_xpsr(target_t *target, uint32_t xpsr, int spsr)
 {
 	/* get pointers to arch-specific information */
 	armv4_5_common_t *armv4_5 = target->arch_info;
@@ -550,7 +548,8 @@
 	arm9tdmi_clock_out(jtag_info, ARMV4_5_NOP, 0, NULL, 0);
 }
 
-void arm9tdmi_write_xpsr_im8(target_t *target, uint8_t xpsr_im, int rot, int spsr)
+static void arm9tdmi_write_xpsr_im8(target_t *target,
+		uint8_t xpsr_im, int rot, int spsr)
 {
 	/* get pointers to arch-specific information */
 	armv4_5_common_t *armv4_5 = target->arch_info;
@@ -675,7 +674,7 @@
 	arm9tdmi_clock_out(jtag_info, ARMV4_5_NOP, 0, NULL, 1);
 }
 
-void arm9tdmi_write_pc(target_t *target, uint32_t pc)
+static void arm9tdmi_write_pc(target_t *target, uint32_t pc)
 {
 	/* get pointers to arch-specific information */
 	armv4_5_common_t *armv4_5 = target->arch_info;
@@ -712,7 +711,7 @@
 	arm9tdmi_clock_out(jtag_info, ARMV4_5_NOP, 0, NULL, 1);
 }
 
-void arm9tdmi_branch_resume_thumb(target_t *target)
+static void arm9tdmi_branch_resume_thumb(target_t *target)
 {
 	LOG_DEBUG("-");
 
@@ -806,7 +805,7 @@
 	}
 }
 
-void arm9tdmi_build_reg_cache(target_t *target)
+static void arm9tdmi_build_reg_cache(target_t *target)
 {
 	reg_cache_t **cache_p = register_get_last_cache_p(&target->reg_cache);
 	/* get pointers to arch-specific information */
@@ -861,7 +860,7 @@
 	return ERROR_OK;
 }
 
-int arm9tdmi_quit(void)
+static int arm9tdmi_quit(void)
 {
 	return ERROR_OK;
 }
@@ -931,7 +930,9 @@
 	return ERROR_OK;
 }
 
-int arm9tdmi_get_arch_pointers(target_t *target, armv4_5_common_t **armv4_5_p, arm7_9_common_t **arm7_9_p, arm9tdmi_common_t **arm9tdmi_p)
+static int arm9tdmi_get_arch_pointers(target_t *target,
+		armv4_5_common_t **armv4_5_p, arm7_9_common_t **arm7_9_p,
+		arm9tdmi_common_t **arm9tdmi_p)
 {
 	armv4_5_common_t *armv4_5 = target->arch_info;
 	arm7_9_common_t *arm7_9;
@@ -961,7 +962,7 @@
 	return ERROR_OK;
 }
 
-int arm9tdmi_target_create(struct target_s *target, Jim_Interp *interp)
+static int arm9tdmi_target_create(struct target_s *target, Jim_Interp *interp)
 {
 	arm9tdmi_common_t *arm9tdmi = calloc(1,sizeof(arm9tdmi_common_t));
 
@@ -971,24 +972,9 @@
 	return ERROR_OK;
 }
 
-int arm9tdmi_register_commands(struct command_context_s *cmd_ctx)
+static int handle_arm9tdmi_catch_vectors_command(
+	struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
 {
-	int retval;
-	command_t *arm9tdmi_cmd;
-
-	retval = arm7_9_register_commands(cmd_ctx);
-	arm9tdmi_cmd = register_command(cmd_ctx, NULL, "arm9tdmi",
-			NULL, COMMAND_ANY,
-			"arm9tdmi specific commands");
-	register_command(cmd_ctx, arm9tdmi_cmd, "vector_catch",
-			handle_arm9tdmi_catch_vectors_command, COMMAND_EXEC,
-			"catch arm9 vectors ['all'|'none'|'<vec1 vec2 ...>']");
-
-	return retval;
-}
-
-int handle_arm9tdmi_catch_vectors_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
-{
 	target_t *target = get_current_target(cmd_ctx);
 	armv4_5_common_t *armv4_5;
 	arm7_9_common_t *arm7_9;
@@ -1069,3 +1055,20 @@
 
 	return ERROR_OK;
 }
+
+int arm9tdmi_register_commands(struct command_context_s *cmd_ctx)
+{
+	int retval;
+	command_t *arm9tdmi_cmd;
+
+	retval = arm7_9_register_commands(cmd_ctx);
+	arm9tdmi_cmd = register_command(cmd_ctx, NULL, "arm9tdmi",
+			NULL, COMMAND_ANY,
+			"arm9tdmi specific commands");
+	register_command(cmd_ctx, arm9tdmi_cmd, "vector_catch",
+			handle_arm9tdmi_catch_vectors_command, COMMAND_EXEC,
+			"catch arm9 vectors ['all'|'none'|'<vec1 vec2 ...>']");
+
+	return retval;
+}
+