Search Results for "risc"

This repository contains the source files for the official RISC‑V Instruction Set Manual, including the Privileged RISC‑V Manual in LaTeX and the Unprivileged Manual in AsciiDoc. It tracks formal ratified versions of the ISA maintained by RISC‑V International and hosts build workflows for releasing updated ISA documents.

XNNPACK is a highly optimized, low-level neural network inference library developed by Google for accelerating deep learning workloads across a variety of hardware architectures, including ARM, x86, WebAssembly, and RISC-V. Rather than serving as a standalone ML framework, XNNPACK provides high-performance computational primitives—such as convolutions, pooling, activation functions, and arithmetic operations—that are integrated into higher-level frameworks like TensorFlow Lite, PyTorch Mobile, ONNX Runtime, TensorFlow.js, and MediaPipe. The library is written in C/C++ and designed for maximum portability, efficiency, and performance, leveraging platform-specific instruction sets (e.g., NEON, AVX, SIMD) for optimized execution. ...

WinAVR (tm) is a suite of executable, open source software development tools for the Atmel AVR series of RISC microprocessors hosted on the Windows platform. Includes the GNU GCC compiler for C and C++.

Mecrisp - A family of optimising native code Forth implementations for MSP430, ARM Cortex M, RISC-V RV32IM(C), MIPS M4K and FPGAs.

amforth is an extendable command interpreter running on AVR ATmega and TI MSP430 microcontrollers. The Risc-V and ARM architectures are ascending. Turnkey actions for IoT workloads are possible as well. The command language is close to the Forth 2012 standard.

UniSIMD assembler is a high-level C/C++ macro assembler framework unified across ARM, MIPS, POWER and x86 architectures. It establishes a subset of both BASE and SIMD instruction sets with clearly defined common API, so that application logic can be written and maintained in one place without code replication. The assembler itself isn't a separate tool, but rather a collection of C/C++ header files, which applications need to include directly in order to use. At present, Intel...

A new 64-bit RISC platform, complemented by a set of development tools, standards specifications and synthesizable VHDL implementations.

OSLib is a set of functions and C headers to provide complete coverage of the RISC OS application programmer's interface in C. It provides access from C code to all RISC OS system calls (SWIs) which is efficient, type-safe, and obvious.

Pharos is a free open-source RTOS for secure, safe and real-time systems with the following characteristics: - Memory and enhanced time partitioning (TSP) - Native support for sporadic, periodic and aperiodic threads - Fixed-priority preemptive scheduler - Execution time protection (threads are prevented from executing for more time than they are configured to) - Small size (full image has ~100 to 300KiB text, ~30KiB data) - Hard real-time determinism - Fast critical sections - Prioritized nested interrupts - inter-partition communication with filters to protect unwanted access - Multicore support (RMP) - Supports ARM9, Cortex-A/R/M and Aarch64, RISC-V64 (64 bits) - The complete TestSuite (see below information) is run successfully for each platform in each release - Tested: more than 170 KLOC of requirement-based tests, executed for each board at each release - Up-to-date User Manual also available See our wiki page for more information.

Acorn Archimedes hardware emulator for Unix, Windows, Mac OS X, RISC OS, etc.

A general purpose desktop tool. It allows the user to customise their desktop by creating menus of useful commands and icons to attach the menus to. Any number of menus or icons can be created and attached in any order to each other.

A lightweight, simple and easy to use embedded system task scheduler. RataOS is written as a high level C, with a simple HAL & API structure, allowing it to be ported between embedded devices easily.

QUASI is stand-alone AVR RISC processor simulator with debugging features, EDA-like GUI and plugin interface.

CDK4AVR stands for Cross Development Kit for Atmels AVR RISC processor serie and should you support with a comprehensive Assembler and C development environment for even this processor familie under Linux or similar host systems.

AVR (Atmel 8 bit risc microprocessor) based GPS logger (black box) with optional display and map support. Project include hardware platform and software.

Delirium is a screensaver control and configuration utility for RISC OS.

Printers+ is an enhanced front-end for the RISC OS Printing system. Printers+ provides a number of enhanced features over the standard RISC OS Printers application, including support for remote network printers, and some advanced printer features.

This project implements a reduced instruction set (RISC) CPU in VHDL. It was designed for the Altera Flex10k20 chip, but the VHDL code should port to any compatable chip. The instruction set is extensive, and the design is easily extendable to 16 bits.

A collection of RISC OS tools for the programmer, including Every, Makatic and MakeCHelp.