Search Results for "risc"

This repository contains the source files for the official RISC‑V Instruction Set Manual, including the Privileged RISC‑V Manual in LaTeX and the Unprivileged Manual in AsciiDoc. It tracks formal ratified versions of the ISA maintained by RISC‑V International and hosts build workflows for releasing updated ISA documents.

XNNPACK is a highly optimized, low-level neural network inference library developed by Google for accelerating deep learning workloads across a variety of hardware architectures, including ARM, x86, WebAssembly, and RISC-V. Rather than serving as a standalone ML framework, XNNPACK provides high-performance computational primitives—such as convolutions, pooling, activation functions, and arithmetic operations—that are integrated into higher-level frameworks like TensorFlow Lite, PyTorch Mobile, ONNX Runtime, TensorFlow.js, and MediaPipe. The library is written in C/C++ and designed for maximum portability, efficiency, and performance, leveraging platform-specific instruction sets (e.g., NEON, AVX, SIMD) for optimized execution. ...

WinAVR (tm) is a suite of executable, open source software development tools for the Atmel AVR series of RISC microprocessors hosted on the Windows platform. Includes the GNU GCC compiler for C and C++.

Mecrisp - A family of optimising native code Forth implementations for MSP430, ARM Cortex M, RISC-V RV32IM(C), MIPS M4K and FPGAs.

amforth is an extendable command interpreter running on AVR ATmega and TI MSP430 microcontrollers. The Risc-V and ARM architectures are ascending. Turnkey actions for IoT workloads are possible as well. The command language is close to the Forth 2012 standard.

UniSIMD assembler is a high-level C/C++ macro assembler framework unified across ARM, MIPS, POWER and x86 architectures. It establishes a subset of both BASE and SIMD instruction sets with clearly defined common API, so that application logic can be written and maintained in one place without code replication. The assembler itself isn't a separate tool, but rather a collection of C/C++ header files, which applications need to include directly in order to use. At present, Intel...

OSLib is a set of functions and C headers to provide complete coverage of the RISC OS application programmer's interface in C. It provides access from C code to all RISC OS system calls (SWIs) which is efficient, type-safe, and obvious.

QUASI is stand-alone AVR RISC processor simulator with debugging features, EDA-like GUI and plugin interface.

CDK4AVR stands for Cross Development Kit for Atmels AVR RISC processor serie and should you support with a comprehensive Assembler and C development environment for even this processor familie under Linux or similar host systems.

A collection of RISC OS tools for the programmer, including Every, Makatic and MakeCHelp.