VHDL and Verilog HDL are standards languages for hardware description. Sometimes is necessary to share the source HDL file but maintaining a little level of control and protection of the intellectual property. This tool generate obfuscated code that is almost unreadable to humans, but is still readable to compilers and simulators.

This tool use GHDL (https://sourceforge.net/projects/ghdl-updates/), HDLObf (https://sourceforge.net/projects/hdlobf/), Icarus Verilog (https://sourceforge.net/projects/iverilog/) and was created in Lazarus (http://www.lazarus-ide.org/)

Features

  • VHDL, Verilog and System Verilog support
  • Syntax Highlighting
  • Synchronous edit
  • Save and restore of user reserved words
  • Obfuscation and reformatting of source code
  • Syntax Check

Project Samples

Source file Obfuscated file Preliminary support for verilog

Project Activity

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Categories

Scientific/Engineering, Obfuscators

License

Creative Commons Attribution License

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vHDL Obfuscator GUI Web Site

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User Reviews

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  • jvegam Posted 2015-04-28
    This is a very practice tool !! Thank you.
  • mriscoc Posted 2015-04-28
    Useful tool for VHDL designers
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Additional Project Details

Intended Audience

Advanced End Users, Engineering, Information Technology, Science/Research

Programming Language

Free Pascal, Lazarus

Related Categories

Lazarus Scientific Engineering, Lazarus Obfuscators, Free Pascal Scientific Engineering, Free Pascal Obfuscators

Registered

2015-04-28
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