VCD reader & editor

Brought to you by: narenkn

Last Update: 2014-10-08

Browse Code

Get an email when there's a new version of VCD reader & editor

VCD is a open format described in the Verilog HDL LRM. This format is widely used by VLSI engineers to exchange design description & data. The aim of the s/w here is to build a library of routines to parse and edit this format.

Project Activity

See All Activity >

Follow VCD reader & editor

VCD reader & editor Web Site

Other Useful Business Software

Custom VMs From 1 to 96 vCPUs With 99.95% Uptime

General-purpose, compute-optimized, or GPU/TPU-accelerated. Built to your exact specs.

Live migration and automatic failover keep workloads online through maintenance. One free e2-micro VM every month.

Try Free

Rate This Project

User Reviews

Be the first to post a review of VCD reader & editor!

Additional Project Details

Registered

2004-10-18

Report inappropriate content

Ship Agents Faster

Transform your applications and workflows into powerful agentic systems at global scale.

Gemini Enterprise Agent Platform lets you rapidly build, scale, govern and optimize production-ready agents grounded in your organization's data. The platform enables developers to build custom or pre-built agents for virtually any use case. New customers get $300 in free credits.

Get Started Free

Recommended Projects

VCD Commander
VCD Commander aims to produce (S)VCD image (and video) disks with minimal user intervention. Simply arrange the files into directories - VCD Commander will recurse the subdirectories and build menu structures to reflect this.
sim-sim
HDL Analyzer and Netlist Architect (HANA): An open source analysis and synthesis tool for design written in Verilog 2001 HDL
Icarus Verilog
Icarus Verilog is an open source Verilog compiler that supports the IEEE-1364 Verilog HDL including IEEE1364-2005 plus extensions.
vHDL Obfuscator GUI
vHDL Obfuscator is an small GUI to obfuscate and reformat HDL files
Covered
Covered is a Verilog code coverage utility using VCD/LXT/FST dumpfiles (or VPI interface) and the design to generate line, toggle, memory, combinational logic, FSM state/arc and assertion coverage report metrics viewable via GUI or ASCII format. This project is ported to github and can be found at: https://github.com/chiphackers/covered