equ-iitg formal equivalence checker Files

Status: Planning

Brought to you by: avi_chandra

The interactive file manager requires Javascript. Please enable it or use sftp or scp.
You may still browse the files here.

Name	Modified	Size	InfoDownloads / Week
equiitg	2009-07-02		0
Totals: 1 Item			0

Other Useful Business Software

$300 Free Credits to Build on Google Cloud

New customers can spin up VMs, build with AI, and query data at no cost.

Put your $300 in credit toward real workloads, then keep building with free monthly usage for 20+ products. No commitment and no charge until you upgrade.

Start Free

Ship Agents Faster

Transform your applications and workflows into powerful agentic systems at global scale.

Gemini Enterprise Agent Platform lets you rapidly build, scale, govern and optimize production-ready agents grounded in your organization's data. The platform enables developers to build custom or pre-built agents for virtually any use case. New customers get $300 in free credits.

Start Free

$300 Free Credits to Build on Google Cloud

New customers can spin up VMs, build with AI, and query data at no cost.

Put your $300 in credit toward real workloads, then keep building with free monthly usage for 20+ products. No commitment and no charge until you upgrade.

Start Free

Recommended Projects

Digital Logic Design
Digital Circuits Design and Simulation
OpenSce
This project aims to develop an opensource software with an attractive and efficient GUI which allows to design linear electronic circuits and to characterize existing ones.
LogicSim
A logic simulator. Simulates logic gates, combinational and sequential logic and allows for creating sub-circuits, as well as "black-box" style modules that can emulate any functional block in C# code.
Covered
Covered is a Verilog code coverage utility using VCD/LXT/FST dumpfiles (or VPI interface) and the design to generate line, toggle, memory, combinational logic, FSM state/arc and assertion coverage report metrics viewable via GUI or ASCII format. This project is ported to github and can be found at: https://github.com/chiphackers/covered
RFMEMS
This SourceForge project hosts an open-source Verilog-A library of compact large-signal RF MEMS capacitor, resonator and switch models. The Verilog-A models can be used with SPICE solvers for large-signal simulation of analog/RF circuits based on RF