DownloadVHDL and Verilog HDL are standards languages for hardware description. Sometimes is necessary to share the source HDL file but maintaining a little level of control and protection of the intellectual property. This tool generate obfuscated code that is almost unreadable to humans, but is still readable to compilers and simulators.
This tool use GHDL (https://sourceforge.net/projects/ghdl-updates/), HDLObf (https://sourceforge.net/projects/hdlobf/), Icarus Verilog (https://sourceforge.net/projects/iverilog/) and was created in Lazarus (http://www.lazarus-ide.org/)
Features
- VHDL, Verilog and System Verilog support
- Syntax Highlighting
- Synchronous edit
- Save and restore of user reserved words
- Obfuscation and reformatting of source code
- Syntax Check
Project Samples
License
Creative Commons Attribution License
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User Reviews
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This is a very practice tool !! Thank you.
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Useful tool for VHDL designers