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From: OpenOCD-Gerrit <ope...@us...> - 2021-10-25 16:11:47
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".
The branch, master has been updated
via f4612e06c61f6c46cff936d2c6b48d6f2627ff61 (commit)
from 8a522d96c79aed654fc7273c7c5c3f680c91c333 (commit)
Those revisions listed above that are new to this repository have
not appeared on any other notification email; so we list those
revisions in full, below.
- Log -----------------------------------------------------------------
commit f4612e06c61f6c46cff936d2c6b48d6f2627ff61
Author: Antonio Borneo <bor...@gm...>
Date: Wed Apr 7 19:21:27 2021 +0200
tcl/stm32mp15x: freeze watchdog, recover SWD after power cycle
Freeze the IWDG watchdog when cores are halted to prevent a reset
while debugging.
The PMIC present on some board senses the nsrst and forces a power
cycle to the target. The power cycle causes the SWJ-DP to restart
in JTAG mode. If the debugger is using SWD, the mismatch triggers
an error after the reset command.
Ignore the error detected by 'dap init' and proceed executing the
handler. The error in 'dap init' will force a reconnect during the
following 'dap apid', restoring the SWD functionality.
Change-Id: I04fcda6a5b8a1b080ab4e8890ecd0754d5ed12d9
Signed-off-by: Antonio Borneo <bor...@gm...>
Reviewed-on: https://review.openocd.org/c/openocd/+/6599
Tested-by: jenkins
diff --git a/tcl/target/stm32mp15x.cfg b/tcl/target/stm32mp15x.cfg
index e50ef9c20..639fbabe0 100644
--- a/tcl/target/stm32mp15x.cfg
+++ b/tcl/target/stm32mp15x.cfg
@@ -97,6 +97,9 @@ axi_secure
proc dbgmcu_enable_debug {} {
# set debug enable bits in DBGMCU_CR to get ap2 and cm4 visible
catch {$::_CHIPNAME.ap1 mww 0xe0081004 0x00000007}
+ # freeze watchdog 1 and 2 on cores halted
+ catch {$::_CHIPNAME.ap1 mww 0xe008102c 0x00000004}
+ catch {$::_CHIPNAME.ap1 mww 0xe008104c 0x00000008}
}
proc toggle_cpu0_dbg_claim0 {} {
@@ -116,7 +119,7 @@ proc rcc_enable_traceclk {} {
}
# FIXME: most of handler below will be removed once reset framework get merged
-$_CHIPNAME.ap1 configure -event reset-deassert-pre {adapter deassert srst deassert trst;dap init;catch {$::_CHIPNAME.dap apid 1}}
+$_CHIPNAME.ap1 configure -event reset-deassert-pre {adapter deassert srst deassert trst;catch {dap init};catch {$::_CHIPNAME.dap apid 1}}
$_CHIPNAME.ap2 configure -event reset-deassert-pre {dbgmcu_enable_debug;rcc_enable_traceclk}
$_CHIPNAME.cpu0 configure -event reset-deassert-pre {$::_CHIPNAME.cpu0 arp_examine}
$_CHIPNAME.cpu1 configure -event reset-deassert-pre {$::_CHIPNAME.cpu1 arp_examine allow-defer}
-----------------------------------------------------------------------
Summary of changes:
tcl/target/stm32mp15x.cfg | 5 ++++-
1 file changed, 4 insertions(+), 1 deletion(-)
hooks/post-receive
--
Main OpenOCD repository
|
|
From: OpenOCD-Gerrit <ope...@us...> - 2021-10-25 16:10:50
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".
The branch, master has been updated
via 8a522d96c79aed654fc7273c7c5c3f680c91c333 (commit)
via 0184ddba186fa618775865792e1eda9e86d9bb91 (commit)
from 8f1971295b251dc13b687db493c2daa7f922e940 (commit)
Those revisions listed above that are new to this repository have
not appeared on any other notification email; so we list those
revisions in full, below.
- Log -----------------------------------------------------------------
commit 8a522d96c79aed654fc7273c7c5c3f680c91c333
Author: Antonio Borneo <bor...@gm...>
Date: Sat Oct 2 14:22:06 2021 +0200
flash/nor/psoc6: fix doxygen comment
Commit 64c2e03b23d9 ("flash/nor: improved API of flash_driver.info
& fixed buffer overruns") changes the prototype of the function
psoc6_get_info() but didn't update the list of parameters in the
doxygen comment.
Fix the doxygen comment.
Change-Id: I1dce018b60d080973c5e351490d4d7baba422d74
Signed-off-by: Antonio Borneo <bor...@gm...>
Fixes: 64c2e03b23d9 ("flash/nor: improved API of flash_driver.info & fixed buffer overruns")
Reviewed-on: https://review.openocd.org/c/openocd/+/6620
Reviewed-by: Tomas Vanek <va...@fb...>
Tested-by: jenkins
diff --git a/src/flash/nor/psoc6.c b/src/flash/nor/psoc6.c
index 8a4121950..d3a4b3702 100644
--- a/src/flash/nor/psoc6.c
+++ b/src/flash/nor/psoc6.c
@@ -492,8 +492,7 @@ static const char *protection_to_str(uint8_t protection)
/** ***********************************************************************************************
* @brief psoc6_get_info Displays human-readable information about acquired device
* @param bank current flash bank
- * @param buf pointer to buffer for human-readable text
- * @param buf_size size of the buffer
+ * @param cmd pointer to command invocation instance
* @return ERROR_OK in case of success, ERROR_XXX code otherwise
*************************************************************************************************/
static int psoc6_get_info(struct flash_bank *bank, struct command_invocation *cmd)
commit 0184ddba186fa618775865792e1eda9e86d9bb91
Author: Antonio Borneo <bor...@gm...>
Date: Wed Sep 22 23:14:22 2021 +0200
command: document enum command_mode
Add the description to doxygen documentation.
Change-Id: Iec04b4a37088e1b3b52ca84102820f450528b5b9
Signed-off-by: Antonio Borneo <bor...@gm...>
Reviewed-on: https://review.openocd.org/c/openocd/+/6593
Tested-by: jenkins
diff --git a/src/helper/command.h b/src/helper/command.h
index fb9e50c85..796cd9d3b 100644
--- a/src/helper/command.h
+++ b/src/helper/command.h
@@ -38,6 +38,15 @@
#define PRINTF_ATTRIBUTE_FORMAT printf
#endif
+/**
+ * OpenOCD command mode is COMMAND_CONFIG at start, then switches to COMMAND_EXEC
+ * during the execution of command 'init'.
+ * The field 'mode' in struct command_registration specifies in which command mode
+ * the command can be executed:
+ * - during COMMAND_CONFIG only,
+ * - during COMMAND_EXEC only,
+ * - in both modes (COMMAND_ANY).
+ */
enum command_mode {
COMMAND_EXEC,
COMMAND_CONFIG,
-----------------------------------------------------------------------
Summary of changes:
src/flash/nor/psoc6.c | 3 +--
src/helper/command.h | 9 +++++++++
2 files changed, 10 insertions(+), 2 deletions(-)
hooks/post-receive
--
Main OpenOCD repository
|
|
From: OpenOCD-Gerrit <ope...@us...> - 2021-10-25 16:10:28
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".
The branch, master has been updated
via 8f1971295b251dc13b687db493c2daa7f922e940 (commit)
via 327040ad745300c6c2117b81c584ff868567ef83 (commit)
from 01de751025cfaebb7c1090f1d1ff00071ce39c71 (commit)
Those revisions listed above that are new to this repository have
not appeared on any other notification email; so we list those
revisions in full, below.
- Log -----------------------------------------------------------------
commit 8f1971295b251dc13b687db493c2daa7f922e940
Author: Antonio Borneo <bor...@gm...>
Date: Wed Sep 22 19:21:39 2021 +0200
mips64_pracc: fix three dead assignments
Clang scan-build complains for three dead assignments:
Although the value stored to 'data' is used in the
enclosing expression, the value is never actually read
from 'data'
Value stored to 'address' is never read
Remove the useless assignment and the variable 'data'.
Change-Id: Ie8dcb74b1c1aa5eea1acd06b3c45c5b44954c9e7
Signed-off-by: Antonio Borneo <bor...@gm...>
Reviewed-on: https://review.openocd.org/c/openocd/+/6592
Tested-by: jenkins
diff --git a/src/target/mips64_pracc.c b/src/target/mips64_pracc.c
index 9583ad767..bb2af228d 100644
--- a/src/target/mips64_pracc.c
+++ b/src/target/mips64_pracc.c
@@ -213,7 +213,7 @@ int mips64_pracc_exec(struct mips_ejtag *ejtag_info,
unsigned num_param_out, uint64_t *param_out)
{
uint32_t ejtag_ctrl;
- uint64_t address = 0, address_prev = 0, data;
+ uint64_t address = 0, address_prev = 0;
struct mips64_pracc_context ctx;
int retval;
int pass = 0;
@@ -243,7 +243,7 @@ int mips64_pracc_exec(struct mips_ejtag *ejtag_info,
address_prev = address;
else
address_prev = 0;
- address32 = data = 0;
+ address32 = 0;
mips_ejtag_set_instr(ejtag_info, EJTAG_INST_ADDRESS);
mips_ejtag_drscan_32(ejtag_info, &address32);
@@ -1358,8 +1358,6 @@ int mips64_pracc_fastdata_xfer(struct mips_ejtag *ejtag_info,
0, NULL, 0, NULL);
/* next fetch to dmseg should be in FASTDATA_AREA, check */
- address = 0;
-
mips_ejtag_set_instr(ejtag_info, EJTAG_INST_ADDRESS);
retval = mips_ejtag_drscan_32(ejtag_info, &address32);
if (retval != ERROR_OK)
@@ -1411,7 +1409,6 @@ int mips64_pracc_fastdata_xfer(struct mips_ejtag *ejtag_info,
return retval;
}
- address = 0;
mips_ejtag_set_instr(ejtag_info, EJTAG_INST_ADDRESS);
retval = mips_ejtag_drscan_32(ejtag_info, &address32);
if (retval != ERROR_OK) {
commit 327040ad745300c6c2117b81c584ff868567ef83
Author: Antonio Borneo <bor...@gm...>
Date: Wed Sep 22 19:14:29 2021 +0200
target/lakemont: fix dead assignment
Clang scan-build complains for a dead assignment:
Value stored to 'tapstatus' is never read
Remove the assignment and add a comment to point for a potential
removal of the line.
Change-Id: Iad2fdc7e6faf650e24cc086ee74c745acb0d1c73
Signed-off-by: Antonio Borneo <bor...@gm...>
Reviewed-on: https://review.openocd.org/c/openocd/+/6591
Tested-by: jenkins
diff --git a/src/target/lakemont.c b/src/target/lakemont.c
index 576956e31..e46ee5cf8 100644
--- a/src/target/lakemont.c
+++ b/src/target/lakemont.c
@@ -1070,7 +1070,8 @@ int lakemont_step(struct target *t, int current,
LOG_DEBUG("EFLAGS [TF] [RF] bits set=0x%08" PRIx32 ", PMCR=0x%08" PRIx32 ", EIP=0x%08" PRIx32,
eflags, pmcr, eip);
- tapstatus = get_tapstatus(t);
+ /* Returned value unused. Can this line be removed? */
+ get_tapstatus(t);
t->debug_reason = DBG_REASON_SINGLESTEP;
t->state = TARGET_DEBUG_RUNNING;
-----------------------------------------------------------------------
Summary of changes:
src/target/lakemont.c | 3 ++-
src/target/mips64_pracc.c | 7 ++-----
2 files changed, 4 insertions(+), 6 deletions(-)
hooks/post-receive
--
Main OpenOCD repository
|
|
From: OpenOCD-Gerrit <ope...@us...> - 2021-10-25 16:10:10
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".
The branch, master has been updated
via 01de751025cfaebb7c1090f1d1ff00071ce39c71 (commit)
from 48d74f97114a76563753918da8708d45098fbf1d (commit)
Those revisions listed above that are new to this repository have
not appeared on any other notification email; so we list those
revisions in full, below.
- Log -----------------------------------------------------------------
commit 01de751025cfaebb7c1090f1d1ff00071ce39c71
Author: Antonio Borneo <bor...@gm...>
Date: Wed Sep 22 19:09:29 2021 +0200
armv8: fix five dead assignments
Clang scan-build complains for five dead assignments:
Value stored to 'retval' is never read
Check the returned value and propagate the error.
Change-Id: I01172887a056d6f39ddcf2807848423970db1e89
Signed-off-by: Antonio Borneo <bor...@gm...>
Reviewed-on: https://review.openocd.org/c/openocd/+/6590
Tested-by: jenkins
diff --git a/src/target/armv8.c b/src/target/armv8.c
index 749ea8729..26116bb33 100644
--- a/src/target/armv8.c
+++ b/src/target/armv8.c
@@ -454,29 +454,31 @@ static int armv8_read_reg_simdfp_aarch32(struct armv8_common *armv8, int regnum,
retval = dpm->instr_read_data_r0(dpm,
ARMV4_5_VMOV(1, 1, 0, (num >> 4), (num & 0xf)),
&value_r0);
+ if (retval != ERROR_OK)
+ return retval;
/* read r1 via dcc */
retval = dpm->instr_read_data_dcc(dpm,
ARMV4_5_MCR(14, 0, 1, 0, 5, 0),
&value_r1);
- if (retval == ERROR_OK) {
- *lvalue = value_r1;
- *lvalue = ((*lvalue) << 32) | value_r0;
- } else
+ if (retval != ERROR_OK)
return retval;
+ *lvalue = value_r1;
+ *lvalue = ((*lvalue) << 32) | value_r0;
num++;
/* repeat above steps for high 64 bits of V register */
retval = dpm->instr_read_data_r0(dpm,
ARMV4_5_VMOV(1, 1, 0, (num >> 4), (num & 0xf)),
&value_r0);
+ if (retval != ERROR_OK)
+ return retval;
retval = dpm->instr_read_data_dcc(dpm,
ARMV4_5_MCR(14, 0, 1, 0, 5, 0),
&value_r1);
- if (retval == ERROR_OK) {
- *hvalue = value_r1;
- *hvalue = ((*hvalue) << 32) | value_r0;
- } else
+ if (retval != ERROR_OK)
return retval;
+ *hvalue = value_r1;
+ *hvalue = ((*hvalue) << 32) | value_r0;
break;
default:
retval = ERROR_FAIL;
@@ -586,12 +588,16 @@ static int armv8_write_reg_simdfp_aarch32(struct armv8_common *armv8, int regnum
retval = dpm->instr_write_data_dcc(dpm,
ARMV4_5_MRC(14, 0, 1, 0, 5, 0),
value_r1);
+ if (retval != ERROR_OK)
+ return retval;
/* write value_r0 to r0 via dcc then,
* move to double word register from r0:r1: "vmov vm, r0, r1"
*/
retval = dpm->instr_write_data_r0(dpm,
ARMV4_5_VMOV(0, 1, 0, (num >> 4), (num & 0xf)),
value_r0);
+ if (retval != ERROR_OK)
+ return retval;
num++;
/* repeat above steps for high 64 bits of V register */
@@ -600,6 +606,8 @@ static int armv8_write_reg_simdfp_aarch32(struct armv8_common *armv8, int regnum
retval = dpm->instr_write_data_dcc(dpm,
ARMV4_5_MRC(14, 0, 1, 0, 5, 0),
value_r1);
+ if (retval != ERROR_OK)
+ return retval;
retval = dpm->instr_write_data_r0(dpm,
ARMV4_5_VMOV(0, 1, 0, (num >> 4), (num & 0xf)),
value_r0);
-----------------------------------------------------------------------
Summary of changes:
src/target/armv8.c | 24 ++++++++++++++++--------
1 file changed, 16 insertions(+), 8 deletions(-)
hooks/post-receive
--
Main OpenOCD repository
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|
From: OpenOCD-Gerrit <ope...@us...> - 2021-10-25 16:09:59
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".
The branch, master has been updated
via 48d74f97114a76563753918da8708d45098fbf1d (commit)
from 57262ebeae7be08ba260c36bb11630e03e594856 (commit)
Those revisions listed above that are new to this repository have
not appeared on any other notification email; so we list those
revisions in full, below.
- Log -----------------------------------------------------------------
commit 48d74f97114a76563753918da8708d45098fbf1d
Author: Antonio Borneo <bor...@gm...>
Date: Wed Sep 22 18:59:38 2021 +0200
arm_semihosting: fix two dead assignments
Clang scan-build complains for two dead assignments:
Value stored to 'r' is never read
Use the variable in the following line, instead of re-computing
the pointer.
Change-Id: I5d4069872be9da85fb28bbe0a82020b90f1efe46
Signed-off-by: Antonio Borneo <bor...@gm...>
Reviewed-on: https://review.openocd.org/c/openocd/+/6589
Tested-by: jenkins
diff --git a/src/target/arm_semihosting.c b/src/target/arm_semihosting.c
index 1e5b5e252..792474acf 100644
--- a/src/target/arm_semihosting.c
+++ b/src/target/arm_semihosting.c
@@ -315,7 +315,7 @@ int arm_semihosting(struct target *target, int *retval)
return 0;
} else if (arm->core_state == ARM_STATE_ARM) {
r = arm->pc;
- pc = buf_get_u32(arm->pc->value, 0, 32);
+ pc = buf_get_u32(r->value, 0, 32);
/* A32 instruction => check for HLT 0xF000 (0xE10F0070) */
uint32_t insn = 0;
@@ -330,7 +330,7 @@ int arm_semihosting(struct target *target, int *retval)
return 0;
} else if (arm->core_state == ARM_STATE_THUMB) {
r = arm->pc;
- pc = buf_get_u32(arm->pc->value, 0, 32);
+ pc = buf_get_u32(r->value, 0, 32);
/* T32 instruction => check for HLT 0x3C (0xBABC) */
uint16_t insn = 0;
-----------------------------------------------------------------------
Summary of changes:
src/target/arm_semihosting.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
hooks/post-receive
--
Main OpenOCD repository
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From: OpenOCD-Gerrit <ope...@us...> - 2021-10-25 16:09:22
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".
The branch, master has been updated
via 57262ebeae7be08ba260c36bb11630e03e594856 (commit)
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commit 57262ebeae7be08ba260c36bb11630e03e594856
Author: Antonio Borneo <bor...@gm...>
Date: Wed Sep 22 18:51:26 2021 +0200
arm_tpiu_swo: fix two dead assignments
Clang scan-build complains for two dead assignments:
Value stored to 'retval' is never read
Since the timer callback should not return error, print an error
message if the data cannot be send out. Add a FIXME comment
because in current code there is no string/name to report which
connection has failed.
In command tpiu enable check the returned value and propagate the
error.
Change-Id: I9a89e4c4f7b677e8222b2df09a31b2478ac9ca4f
Signed-off-by: Antonio Borneo <bor...@gm...>
Reviewed-on: https://review.openocd.org/c/openocd/+/6588
Tested-by: jenkins
diff --git a/src/target/arm_tpiu_swo.c b/src/target/arm_tpiu_swo.c
index f2b514826..024521364 100644
--- a/src/target/arm_tpiu_swo.c
+++ b/src/target/arm_tpiu_swo.c
@@ -155,7 +155,7 @@ static int arm_tpiu_swo_poll_trace(void *priv)
if (obj->out_filename && obj->out_filename[0] == ':')
list_for_each_entry(c, &obj->connections, lh)
if (connection_write(c->connection, buf, size) != (int)size)
- retval = ERROR_FAIL;
+ LOG_ERROR("Error writing to connection"); /* FIXME: which connection? */
return ERROR_OK;
}
@@ -678,6 +678,10 @@ static int jim_arm_tpiu_swo_enable(Jim_Interp *interp, int argc, Jim_Obj *const
if (obj->pin_protocol == TPIU_SPPR_PROTOCOL_SYNC) {
retval = wrap_read_u32(target, tpiu_ap, obj->spot.base + TPIU_SSPSR_OFFSET, &value);
+ if (retval != ERROR_OK) {
+ LOG_ERROR("Cannot read TPIU register SSPSR");
+ return JIM_ERR;
+ }
if (!(value & BIT(obj->port_width - 1))) {
LOG_ERROR("TPIU does not support port-width of %d bits", obj->port_width);
return JIM_ERR;
commit b3f052ba9d9582fe203ff8baa73fef66c02196ac
Author: Antonio Borneo <bor...@gm...>
Date: Wed Sep 22 18:39:57 2021 +0200
jtag/core: fix unused assignment
Clang scan-build complains about a variable assigned but never
used.
Although the value stored to 'val' is used in the
enclosing expression, the value is never actually read
from 'val'
Remove the dead assignment. While there, reduce the scope of the
variable by declaring the variable at the point of first use.
Change-Id: Ibe2b55a7d70597833cfa7f3d843e7c3d2407f2df
Signed-off-by: Antonio Borneo <bor...@gm...>
Reviewed-on: https://review.openocd.org/c/openocd/+/6587
Tested-by: jenkins
diff --git a/src/jtag/core.c b/src/jtag/core.c
index 7da2a6c35..51875a00a 100644
--- a/src/jtag/core.c
+++ b/src/jtag/core.c
@@ -1336,7 +1336,6 @@ static int jtag_validate_ircapture(void)
struct jtag_tap *tap;
uint8_t *ir_test = NULL;
struct scan_field field;
- uint64_t val;
int chain_pos = 0;
int retval;
@@ -1396,7 +1395,7 @@ static int jtag_validate_ircapture(void)
*/
if (tap->ir_length == 0) {
tap->ir_length = 2;
- while ((val = buf_get_u64(ir_test, chain_pos, tap->ir_length + 1)) == 1
+ while (buf_get_u64(ir_test, chain_pos, tap->ir_length + 1) == 1
&& tap->ir_length < JTAG_IRLEN_MAX) {
tap->ir_length++;
}
@@ -1412,7 +1411,7 @@ static int jtag_validate_ircapture(void)
* this part of the JTAG spec, so their capture mask/value
* attributes might disable this test.
*/
- val = buf_get_u64(ir_test, chain_pos, tap->ir_length);
+ uint64_t val = buf_get_u64(ir_test, chain_pos, tap->ir_length);
if ((val & tap->ir_capture_mask) != tap->ir_capture_value) {
LOG_ERROR("%s: IR capture error; saw 0x%0*" PRIx64 " not 0x%0*" PRIx32,
jtag_tap_name(tap),
@@ -1428,7 +1427,7 @@ static int jtag_validate_ircapture(void)
}
/* verify the '11' sentinel we wrote is returned at the end */
- val = buf_get_u64(ir_test, chain_pos, 2);
+ uint64_t val = buf_get_u64(ir_test, chain_pos, 2);
if (val != 0x3) {
char *cbuf = buf_to_hex_str(ir_test, total_ir_length);
-----------------------------------------------------------------------
Summary of changes:
src/jtag/core.c | 7 +++----
src/target/arm_tpiu_swo.c | 6 +++++-
2 files changed, 8 insertions(+), 5 deletions(-)
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From: OpenOCD-Gerrit <ope...@us...> - 2021-10-02 13:18:57
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".
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- Log -----------------------------------------------------------------
commit 9188115296917ce74ad5b0f83451414735225ce5
Author: Yasushi SHOJI <ya...@sp...>
Date: Sun Sep 5 21:59:57 2021 +0900
gitignore: Add GNU Global tag files
This commit adds GNU Global[1] tag files to .gitignore.
[1]: https://www.gnu.org/software/global/
Change-Id: Ia09fb359cfdfeadd9538cf6352d353e6475e85c7
Signed-off-by: Yasushi SHOJI <ya...@sp...>
Reviewed-on: https://review.openocd.org/c/openocd/+/6541
Tested-by: jenkins
Reviewed-by: Antonio Borneo <bor...@gm...>
diff --git a/.gitignore b/.gitignore
index e25d1ba96..955ca3c2e 100644
--- a/.gitignore
+++ b/.gitignore
@@ -95,3 +95,8 @@ TAGS
# ctags tag files
tags
+
+# GNU Global tag files
+GPATH
+GRTAGS
+GTAGS
-----------------------------------------------------------------------
Summary of changes:
.gitignore | 5 +++++
1 file changed, 5 insertions(+)
hooks/post-receive
--
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|
From: OpenOCD-Gerrit <ope...@us...> - 2021-10-02 13:18:43
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".
The branch, master has been updated
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- Log -----------------------------------------------------------------
commit 05752557dd0dcab76250ab12377d59435b74204d
Author: Yasushi SHOJI <ya...@sp...>
Date: Sun Aug 29 18:18:01 2021 +0900
helper: Remove src/helper from include dirs
The header files under src/helper/ can currently be included with
either
#include <bits.h>
or
#include <helper/bits.h>
This is because we specify both "src/" and "src/helper/" directories
as include directories. Some files name under "src/helper/", such as
types.h, log.h, and util.h are too generic and could be ambiguous
depending on the search path.
This commit remove "src/helper/" from our include dir and make C files
include explicitly.
Change-Id: I38fc9b96ba01a513d4a72757d40007e21b502f25
Signed-off-by: Yasushi SHOJI <ya...@sp...>
Reviewed-on: https://review.openocd.org/c/openocd/+/6507
Tested-by: jenkins
Reviewed-by: Antonio Borneo <bor...@gm...>
diff --git a/Makefile.am b/Makefile.am
index 3858093b6..7e5e22973 100644
--- a/Makefile.am
+++ b/Makefile.am
@@ -36,7 +36,6 @@ AM_CFLAGS = $(GCC_WARNINGS)
AM_CPPFLAGS = $(HOST_CPPFLAGS)\
-I$(top_srcdir)/src \
-I$(top_builddir)/src \
- -I$(top_srcdir)/src/helper \
-DPKGDATADIR=\"$(pkgdatadir)\" \
-DBINDIR=\"$(bindir)\"
diff --git a/src/flash/nor/psoc6.c b/src/flash/nor/psoc6.c
index a929d3304..8a4121950 100644
--- a/src/flash/nor/psoc6.c
+++ b/src/flash/nor/psoc6.c
@@ -24,12 +24,12 @@
#include <time.h>
#include "imp.h"
-#include <target/arm_adi_v5.h>
+#include "helper/time_support.h"
+#include "target/arm_adi_v5.h"
#include "target/target.h"
#include "target/cortex_m.h"
#include "target/breakpoints.h"
#include "target/target_type.h"
-#include "time_support.h"
#include "target/algorithm.h"
/**************************************************************************************************
diff --git a/src/flash/nor/stm32l4x.c b/src/flash/nor/stm32l4x.c
index a363cd42d..e5100a015 100644
--- a/src/flash/nor/stm32l4x.c
+++ b/src/flash/nor/stm32l4x.c
@@ -26,10 +26,10 @@
#include "imp.h"
#include <helper/align.h>
#include <helper/binarybuffer.h>
+#include <helper/bits.h>
#include <target/algorithm.h>
#include <target/arm_adi_v5.h>
#include <target/cortex_m.h>
-#include "bits.h"
#include "stm32l4x.h"
/* STM32L4xxx series for reference.
diff --git a/src/helper/command.h b/src/helper/command.h
index f38701983..fb9e50c85 100644
--- a/src/helper/command.h
+++ b/src/helper/command.h
@@ -24,8 +24,8 @@
#include <stdint.h>
#include <stdbool.h>
-#include <jim-nvp.h>
+#include <helper/jim-nvp.h>
#include <helper/list.h>
#include <helper/types.h>
diff --git a/src/helper/jim-nvp.c b/src/helper/jim-nvp.c
index e21bc680d..738ed7943 100644
--- a/src/helper/jim-nvp.c
+++ b/src/helper/jim-nvp.c
@@ -41,8 +41,8 @@
* official policies, either expressed or implied, of the Jim Tcl Project.
*/
+#include "jim-nvp.h"
#include <string.h>
-#include <jim-nvp.h>
int jim_get_nvp(Jim_Interp *interp,
Jim_Obj *objptr, const struct jim_nvp *nvp_table, const struct jim_nvp **result)
diff --git a/src/jtag/drivers/libusb_helper.c b/src/jtag/drivers/libusb_helper.c
index f285bdcac..3308d8742 100644
--- a/src/jtag/drivers/libusb_helper.c
+++ b/src/jtag/drivers/libusb_helper.c
@@ -20,9 +20,9 @@
#ifdef HAVE_CONFIG_H
#include "config.h"
#endif
+#include <helper/log.h>
#include <jtag/drivers/jtag_usb_common.h>
#include "libusb_helper.h"
-#include "log.h"
/*
* comment from libusb:
diff --git a/src/rtos/rtos.h b/src/rtos/rtos.h
index dc7a64f43..8309de402 100644
--- a/src/rtos/rtos.h
+++ b/src/rtos/rtos.h
@@ -21,7 +21,7 @@
#include "server/server.h"
#include "target/target.h"
-#include <jim-nvp.h>
+#include <helper/jim-nvp.h>
typedef int64_t threadid_t;
typedef int64_t symbol_address_t;
diff --git a/src/server/server.c b/src/server/server.c
index 64acd3689..3f579bfc6 100644
--- a/src/server/server.c
+++ b/src/server/server.c
@@ -27,13 +27,13 @@
#endif
#include "server.h"
+#include <helper/time_support.h>
#include <target/target.h>
#include <target/target_request.h>
#include <target/openrisc/jsp_server.h>
#include "openocd.h"
#include "tcl_server.h"
#include "telnet_server.h"
-#include "time_support.h"
#include <signal.h>
diff --git a/src/target/armv7m_trace.h b/src/target/armv7m_trace.h
index eaee6a48f..7e4977aba 100644
--- a/src/target/armv7m_trace.h
+++ b/src/target/armv7m_trace.h
@@ -18,8 +18,8 @@
#ifndef OPENOCD_TARGET_ARMV7M_TRACE_H
#define OPENOCD_TARGET_ARMV7M_TRACE_H
+#include <helper/command.h>
#include <target/target.h>
-#include <command.h>
/**
* @file
diff --git a/src/target/mips64_pracc.c b/src/target/mips64_pracc.c
index b2af39ced..9583ad767 100644
--- a/src/target/mips64_pracc.c
+++ b/src/target/mips64_pracc.c
@@ -20,7 +20,7 @@
#include "mips64.h"
#include "mips64_pracc.h"
-#include "time_support.h"
+#include <helper/time_support.h>
#define STACK_DEPTH 32
diff --git a/src/target/riscv/riscv-011.c b/src/target/riscv/riscv-011.c
index 7a5e990ca..86a95f635 100644
--- a/src/target/riscv/riscv-011.c
+++ b/src/target/riscv/riscv-011.c
@@ -16,7 +16,7 @@
#include "target/target.h"
#include "target/algorithm.h"
#include "target/target_type.h"
-#include "log.h"
+#include <helper/log.h>
#include "jtag/jtag.h"
#include "target/register.h"
#include "target/breakpoints.h"
diff --git a/src/target/riscv/riscv-013.c b/src/target/riscv/riscv-013.c
index 24fb79ccf..fdebdd413 100644
--- a/src/target/riscv/riscv-013.c
+++ b/src/target/riscv/riscv-013.c
@@ -16,7 +16,7 @@
#include "target/target.h"
#include "target/algorithm.h"
#include "target/target_type.h"
-#include "log.h"
+#include <helper/log.h>
#include "jtag/jtag.h"
#include "target/register.h"
#include "target/breakpoints.h"
diff --git a/src/target/riscv/riscv.c b/src/target/riscv/riscv.c
index 8f1f398b3..07fb95550 100644
--- a/src/target/riscv/riscv.c
+++ b/src/target/riscv/riscv.c
@@ -8,14 +8,14 @@
#include "config.h"
#endif
+#include <helper/log.h>
+#include <helper/time_support.h>
#include "target/target.h"
#include "target/algorithm.h"
#include "target/target_type.h"
-#include "log.h"
#include "jtag/jtag.h"
#include "target/register.h"
#include "target/breakpoints.h"
-#include "helper/time_support.h"
#include "riscv.h"
#include "gdb_regs.h"
#include "rtos/rtos.h"
@@ -1870,10 +1870,10 @@ static int riscv_checksum_memory(struct target *target,
LOG_DEBUG("address=0x%" TARGET_PRIxADDR "; count=0x%" PRIx32, address, count);
static const uint8_t riscv32_crc_code[] = {
-#include "../../contrib/loaders/checksum/riscv32_crc.inc"
+#include "contrib/loaders/checksum/riscv32_crc.inc"
};
static const uint8_t riscv64_crc_code[] = {
-#include "../../contrib/loaders/checksum/riscv64_crc.inc"
+#include "contrib/loaders/checksum/riscv64_crc.inc"
};
static const uint8_t *crc_code;
diff --git a/src/target/riscv/riscv_semihosting.c b/src/target/riscv/riscv_semihosting.c
index 90b8ddb4f..0072b9afe 100644
--- a/src/target/riscv/riscv_semihosting.c
+++ b/src/target/riscv/riscv_semihosting.c
@@ -41,7 +41,7 @@
#include "config.h"
#endif
-#include "log.h"
+#include <helper/log.h>
#include "target/target.h"
#include "target/semihosting_common.h"
diff --git a/src/target/target_type.h b/src/target/target_type.h
index cf30cf8cc..d6b6086b3 100644
--- a/src/target/target_type.h
+++ b/src/target/target_type.h
@@ -25,7 +25,7 @@
#ifndef OPENOCD_TARGET_TARGET_TYPE_H
#define OPENOCD_TARGET_TARGET_TYPE_H
-#include <jim-nvp.h>
+#include <helper/jim-nvp.h>
struct target;
-----------------------------------------------------------------------
Summary of changes:
Makefile.am | 1 -
src/flash/nor/psoc6.c | 4 ++--
src/flash/nor/stm32l4x.c | 2 +-
src/helper/command.h | 2 +-
src/helper/jim-nvp.c | 2 +-
src/jtag/drivers/libusb_helper.c | 2 +-
src/rtos/rtos.h | 2 +-
src/server/server.c | 2 +-
src/target/armv7m_trace.h | 2 +-
src/target/mips64_pracc.c | 2 +-
src/target/riscv/riscv-011.c | 2 +-
src/target/riscv/riscv-013.c | 2 +-
src/target/riscv/riscv.c | 8 ++++----
src/target/riscv/riscv_semihosting.c | 2 +-
src/target/target_type.h | 2 +-
15 files changed, 18 insertions(+), 19 deletions(-)
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Main OpenOCD repository
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From: OpenOCD-Gerrit <ope...@us...> - 2021-10-02 13:18:07
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".
The branch, master has been updated
via e4872054108a3a18dc651b45dea679696e14ee7f (commit)
from b5a24386e49ca643ab750543e3818172d37fbc54 (commit)
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- Log -----------------------------------------------------------------
commit e4872054108a3a18dc651b45dea679696e14ee7f
Author: Tim Newsome <ti...@si...>
Date: Tue Sep 21 11:43:21 2021 -0700
uint64_t->target_addr_t for stack pointers.
This might be incomplete. It's just a quick attempt to reduce some of
the difference between riscv-openocd and mainline. Other stack pointers
can be updated as I come across them.
Change-Id: Id3311b8a1bb0667f309a26d36b67093bfeb8380a
Signed-off-by: Tim Newsome <ti...@si...>
Reviewed-on: https://review.openocd.org/c/openocd/+/6586
Tested-by: jenkins
Reviewed-by: Antonio Borneo <bor...@gm...>
diff --git a/src/rtos/rtos.c b/src/rtos/rtos.c
index eaad5e50c..f401c3d30 100644
--- a/src/rtos/rtos.c
+++ b/src/rtos/rtos.c
@@ -616,7 +616,7 @@ int rtos_generic_stack_read(struct target *target,
LOG_OUTPUT("\r\n");
#endif
- int64_t new_stack_ptr;
+ target_addr_t new_stack_ptr;
if (stacking->calculate_process_stack) {
new_stack_ptr = stacking->calculate_process_stack(target,
stack_data, stacking, stack_ptr);
diff --git a/src/rtos/rtos.h b/src/rtos/rtos.h
index 81751fe0a..dc7a64f43 100644
--- a/src/rtos/rtos.h
+++ b/src/rtos/rtos.h
@@ -108,10 +108,10 @@ struct rtos_register_stacking {
* just use stacking->stack_registers_size * stack_growth_direction
* to calculate adjustment.
*/
- int64_t (*calculate_process_stack)(struct target *target,
+ target_addr_t (*calculate_process_stack)(struct target *target,
const uint8_t *stack_data,
const struct rtos_register_stacking *stacking,
- int64_t stack_ptr);
+ target_addr_t stack_ptr);
const struct stack_register_offset *register_offsets;
};
diff --git a/src/rtos/rtos_riot_stackings.c b/src/rtos/rtos_riot_stackings.c
index 98e02edfc..abf08c8ff 100644
--- a/src/rtos/rtos_riot_stackings.c
+++ b/src/rtos/rtos_riot_stackings.c
@@ -27,9 +27,9 @@
/* This works for the M0 and M34 stackings as xPSR is in a fixed
* location
*/
-static int64_t rtos_riot_cortex_m_stack_align(struct target *target,
+static target_addr_t rtos_riot_cortex_m_stack_align(struct target *target,
const uint8_t *stack_data, const struct rtos_register_stacking *stacking,
- int64_t stack_ptr)
+ target_addr_t stack_ptr)
{
const int XPSR_OFFSET = 0x40;
return rtos_cortex_m_stack_align(target, stack_data, stacking,
diff --git a/src/rtos/rtos_standard_stackings.c b/src/rtos/rtos_standard_stackings.c
index 90c642a00..c3eef5c06 100644
--- a/src/rtos/rtos_standard_stackings.c
+++ b/src/rtos/rtos_standard_stackings.c
@@ -152,29 +152,29 @@ static const struct stack_register_offset rtos_standard_nds32_n1068_stack_offset
{ 35, 0x10, 32 }, /* IFC_LP */
};
-static int64_t rtos_generic_stack_align(struct target *target,
+static target_addr_t rtos_generic_stack_align(struct target *target,
const uint8_t *stack_data, const struct rtos_register_stacking *stacking,
- int64_t stack_ptr, int align)
+ target_addr_t stack_ptr, int align)
{
- int64_t new_stack_ptr;
- int64_t aligned_stack_ptr;
+ target_addr_t new_stack_ptr;
+ target_addr_t aligned_stack_ptr;
new_stack_ptr = stack_ptr - stacking->stack_growth_direction *
stacking->stack_registers_size;
- aligned_stack_ptr = new_stack_ptr & ~((int64_t)align - 1);
+ aligned_stack_ptr = new_stack_ptr & ~((target_addr_t)align - 1);
if (aligned_stack_ptr != new_stack_ptr &&
stacking->stack_growth_direction == -1) {
/* If we have a downward growing stack, the simple alignment code
* above results in a wrong result (since it rounds down to nearest
* alignment). We want to round up so add an extra align.
*/
- aligned_stack_ptr += (int64_t)align;
+ aligned_stack_ptr += (target_addr_t)align;
}
return aligned_stack_ptr;
}
-int64_t rtos_generic_stack_align8(struct target *target,
+target_addr_t rtos_generic_stack_align8(struct target *target,
const uint8_t *stack_data, const struct rtos_register_stacking *stacking,
- int64_t stack_ptr)
+ target_addr_t stack_ptr)
{
return rtos_generic_stack_align(target, stack_data,
stacking, stack_ptr, 8);
@@ -199,13 +199,13 @@ int64_t rtos_generic_stack_align8(struct target *target,
* This is just a helper function for use in the calculate_process_stack
* function for a given architecture/rtos.
*/
-int64_t rtos_cortex_m_stack_align(struct target *target,
+target_addr_t rtos_cortex_m_stack_align(struct target *target,
const uint8_t *stack_data, const struct rtos_register_stacking *stacking,
- int64_t stack_ptr, size_t xpsr_offset)
+ target_addr_t stack_ptr, size_t xpsr_offset)
{
const uint32_t ALIGN_NEEDED = (1 << 9);
uint32_t xpsr;
- int64_t new_stack_ptr;
+ target_addr_t new_stack_ptr;
new_stack_ptr = stack_ptr - stacking->stack_growth_direction *
stacking->stack_registers_size;
@@ -220,27 +220,27 @@ int64_t rtos_cortex_m_stack_align(struct target *target,
return new_stack_ptr;
}
-static int64_t rtos_standard_cortex_m3_stack_align(struct target *target,
+static target_addr_t rtos_standard_cortex_m3_stack_align(struct target *target,
const uint8_t *stack_data, const struct rtos_register_stacking *stacking,
- int64_t stack_ptr)
+ target_addr_t stack_ptr)
{
const int XPSR_OFFSET = 0x3c;
return rtos_cortex_m_stack_align(target, stack_data, stacking,
stack_ptr, XPSR_OFFSET);
}
-static int64_t rtos_standard_cortex_m4f_stack_align(struct target *target,
+static target_addr_t rtos_standard_cortex_m4f_stack_align(struct target *target,
const uint8_t *stack_data, const struct rtos_register_stacking *stacking,
- int64_t stack_ptr)
+ target_addr_t stack_ptr)
{
const int XPSR_OFFSET = 0x40;
return rtos_cortex_m_stack_align(target, stack_data, stacking,
stack_ptr, XPSR_OFFSET);
}
-static int64_t rtos_standard_cortex_m4f_fpu_stack_align(struct target *target,
+static target_addr_t rtos_standard_cortex_m4f_fpu_stack_align(struct target *target,
const uint8_t *stack_data, const struct rtos_register_stacking *stacking,
- int64_t stack_ptr)
+ target_addr_t stack_ptr)
{
const int XPSR_OFFSET = 0x80;
return rtos_cortex_m_stack_align(target, stack_data, stacking,
diff --git a/src/rtos/rtos_standard_stackings.h b/src/rtos/rtos_standard_stackings.h
index ad319d2a0..d18f1797c 100644
--- a/src/rtos/rtos_standard_stackings.h
+++ b/src/rtos/rtos_standard_stackings.h
@@ -30,11 +30,11 @@ extern const struct rtos_register_stacking rtos_standard_cortex_m4f_stacking;
extern const struct rtos_register_stacking rtos_standard_cortex_m4f_fpu_stacking;
extern const struct rtos_register_stacking rtos_standard_cortex_r4_stacking;
extern const struct rtos_register_stacking rtos_standard_nds32_n1068_stacking;
-int64_t rtos_generic_stack_align8(struct target *target,
+target_addr_t rtos_generic_stack_align8(struct target *target,
const uint8_t *stack_data, const struct rtos_register_stacking *stacking,
- int64_t stack_ptr);
-int64_t rtos_cortex_m_stack_align(struct target *target,
+ target_addr_t stack_ptr);
+target_addr_t rtos_cortex_m_stack_align(struct target *target,
const uint8_t *stack_data, const struct rtos_register_stacking *stacking,
- int64_t stack_ptr, size_t xpsr_offset);
+ target_addr_t stack_ptr, size_t xpsr_offset);
#endif /* OPENOCD_RTOS_RTOS_STANDARD_STACKINGS_H */
diff --git a/src/rtos/zephyr.c b/src/rtos/zephyr.c
index a59673557..630511636 100644
--- a/src/rtos/zephyr.c
+++ b/src/rtos/zephyr.c
@@ -189,9 +189,9 @@ enum zephyr_symbol_values {
ZEPHYR_VAL_COUNT
};
-static int64_t zephyr_cortex_m_stack_align(struct target *target,
+static target_addr_t zephyr_cortex_m_stack_align(struct target *target,
const uint8_t *stack_data,
- const struct rtos_register_stacking *stacking, int64_t stack_ptr)
+ const struct rtos_register_stacking *stacking, target_addr_t stack_ptr)
{
return rtos_cortex_m_stack_align(target, stack_data, stacking,
stack_ptr, ARM_XPSR_OFFSET);
-----------------------------------------------------------------------
Summary of changes:
src/rtos/rtos.c | 2 +-
src/rtos/rtos.h | 4 ++--
src/rtos/rtos_riot_stackings.c | 4 ++--
src/rtos/rtos_standard_stackings.c | 34 +++++++++++++++++-----------------
src/rtos/rtos_standard_stackings.h | 8 ++++----
src/rtos/zephyr.c | 4 ++--
6 files changed, 28 insertions(+), 28 deletions(-)
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From: OpenOCD-Gerrit <ope...@us...> - 2021-10-02 13:17:31
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".
The branch, master has been updated
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- Log -----------------------------------------------------------------
commit b5a24386e49ca643ab750543e3818172d37fbc54
Author: Antonio Borneo <bor...@gm...>
Date: Wed Mar 17 00:02:16 2021 +0100
stlink-dap: add 'cmd' to send arbitrary commands
Either for testing new commands and to retrieve information that
don't fit in any specific place of OpenOCD, for example monitoring
the target's VDD power supply from a TCL script.
Change-Id: Id43ced92c799b115bb1da1c236090b0752329051
Signed-off-by: Antonio Borneo <bor...@gm...>
Reviewed-on: https://review.openocd.org/c/openocd/+/6564
Tested-by: jenkins
Reviewed-by: Tarek BOCHKATI <tar...@gm...>
diff --git a/doc/openocd.texi b/doc/openocd.texi
index 138922d08..7bf0fe98b 100644
--- a/doc/openocd.texi
+++ b/doc/openocd.texi
@@ -3131,6 +3131,26 @@ Specifies the serial number of the adapter.
@deffn {Config Command} {st-link vid_pid} [vid pid]+
Pairs of vendor IDs and product IDs of the device.
@end deffn
+
+@deffn {Command} {st-link cmd} rx_n (tx_byte)+
+Sends an arbitrary command composed by the sequence of bytes @var{tx_byte}
+and receives @var{rx_n} bytes.
+
+For example, the command to read the target's supply voltage is one byte 0xf7 followed
+by 15 bytes zero. It returns 8 bytes, where the first 4 bytes represent the ADC sampling
+of the reference voltage 1.2V and the last 4 bytes represent the ADC sampling of half
+the target's supply voltage.
+@example
+> st-link cmd 8 0xf7 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0xf1 0x05 0x00 0x00 0x0b 0x08 0x00 0x00
+@end example
+The result can be converted to Volts (ignoring the most significant bytes, always zero)
+@example
+> set a [st-link cmd 8 0xf7 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0]
+> echo [expr 2*1.2*([lindex $a 4]+256*[lindex $a 5])/([lindex $a 0]+256*[lindex $a 1])]
+3.24891518738
+@end example
+@end deffn
@end deffn
@deffn {Interface Driver} {opendous}
diff --git a/src/jtag/drivers/stlink_usb.c b/src/jtag/drivers/stlink_usb.c
index 4bd07b49f..a52370863 100644
--- a/src/jtag/drivers/stlink_usb.c
+++ b/src/jtag/drivers/stlink_usb.c
@@ -4222,6 +4222,43 @@ COMMAND_HANDLER(stlink_dap_backend_command)
return ERROR_OK;
}
+#define BYTES_PER_LINE 16
+COMMAND_HANDLER(stlink_dap_cmd_command)
+{
+ unsigned int rx_n, tx_n;
+ struct stlink_usb_handle_s *h = stlink_dap_handle;
+
+ if (CMD_ARGC < 2)
+ return ERROR_COMMAND_SYNTAX_ERROR;
+
+ COMMAND_PARSE_NUMBER(uint, CMD_ARGV[0], rx_n);
+ tx_n = CMD_ARGC - 1;
+ if (tx_n > STLINK_SG_SIZE || rx_n > STLINK_DATA_SIZE) {
+ LOG_ERROR("max %x byte sent and %d received", STLINK_SG_SIZE, STLINK_DATA_SIZE);
+ return ERROR_COMMAND_SYNTAX_ERROR;
+ }
+
+ stlink_usb_init_buffer(h, h->rx_ep, rx_n);
+
+ for (unsigned int i = 0; i < tx_n; i++) {
+ uint8_t byte;
+ COMMAND_PARSE_NUMBER(u8, CMD_ARGV[i + 1], byte);
+ h->cmdbuf[h->cmdidx++] = byte;
+ }
+
+ int retval = stlink_usb_xfer_noerrcheck(h, h->databuf, rx_n);
+ if (retval != ERROR_OK) {
+ LOG_ERROR("Error %d", retval);
+ return retval;
+ }
+
+ for (unsigned int i = 0; i < rx_n; i++)
+ command_print_sameline(CMD, "0x%02x%c", h->databuf[i],
+ ((i == (rx_n - 1)) || ((i % BYTES_PER_LINE) == (BYTES_PER_LINE - 1))) ? '\n' : ' ');
+
+ return ERROR_OK;
+}
+
/** */
static const struct command_registration stlink_dap_subcommand_handlers[] = {
{
@@ -4245,6 +4282,13 @@ static const struct command_registration stlink_dap_subcommand_handlers[] = {
.help = "select which ST-Link backend to use",
.usage = "usb | tcp [port]",
},
+ {
+ .name = "cmd",
+ .handler = stlink_dap_cmd_command,
+ .mode = COMMAND_EXEC,
+ .help = "send arbitrary command",
+ .usage = "rx_n (tx_byte)+",
+ },
COMMAND_REGISTRATION_DONE
};
-----------------------------------------------------------------------
Summary of changes:
doc/openocd.texi | 20 ++++++++++++++++++++
src/jtag/drivers/stlink_usb.c | 44 +++++++++++++++++++++++++++++++++++++++++++
2 files changed, 64 insertions(+)
hooks/post-receive
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|
From: OpenOCD-Gerrit <ope...@us...> - 2021-10-02 13:16:54
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".
The branch, master has been updated
via 745b40d99a1f76a362ebfac92a85f775abde6c18 (commit)
from 98d9f1168cbdc59e4c2c0b1f01b225a4df9ad98a (commit)
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- Log -----------------------------------------------------------------
commit 745b40d99a1f76a362ebfac92a85f775abde6c18
Author: Antonio Borneo <bor...@gm...>
Date: Sun Sep 19 21:52:44 2021 +0200
udev: add ASIX Presto programmer
The driver is in OpenOCD since 2007, but the USB VID/PID have
never been listed in udev rules.
Change-Id: I77df469929dd7f6b6483678c0e76f22c30a7614c
Signed-off-by: Antonio Borneo <bor...@gm...>
Reviewed-on: https://review.openocd.org/c/openocd/+/6563
Tested-by: jenkins
diff --git a/contrib/60-openocd.rules b/contrib/60-openocd.rules
index 94573a83a..4ecb485b1 100644
--- a/contrib/60-openocd.rules
+++ b/contrib/60-openocd.rules
@@ -68,6 +68,9 @@ ATTRS{idVendor}=="0403", ATTRS{idProduct}=="c141", MODE="660", GROUP="plugdev",
# Amontec JTAGkey and JTAGkey-tiny
ATTRS{idVendor}=="0403", ATTRS{idProduct}=="cff8", MODE="660", GROUP="plugdev", TAG+="uaccess"
+# ASIX Presto programmer
+ATTRS{idVendor}=="0403", ATTRS{idProduct}=="f1a0", MODE="660", GROUP="plugdev", TAG+="uaccess"
+
# Nuvoton NuLink
ATTRS{idVendor}=="0416", ATTRS{idProduct}=="511b", MODE="660", GROUP="plugdev", TAG+="uaccess"
ATTRS{idVendor}=="0416", ATTRS{idProduct}=="511c", MODE="660", GROUP="plugdev", TAG+="uaccess"
-----------------------------------------------------------------------
Summary of changes:
contrib/60-openocd.rules | 3 +++
1 file changed, 3 insertions(+)
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From: OpenOCD-Gerrit <ope...@us...> - 2021-10-02 13:16:37
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".
The branch, master has been updated
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- Log -----------------------------------------------------------------
commit 98d9f1168cbdc59e4c2c0b1f01b225a4df9ad98a
Author: Tarek BOCHKATI <tar...@gm...>
Date: Tue Sep 7 14:25:32 2021 +0100
target: reset target examined flag if target::examine() fails
For example: before this change in cortex_m_examine, if we fail reading CPUID
we return a failure code but target was set to examined which is not consistent.
Change-Id: I9f0ebe8f811849e54d1b350b0db506cb3fdd58f4
Signed-off-by: Tarek BOCHKATI <tar...@gm...>
Reviewed-on: https://review.openocd.org/c/openocd/+/6548
Tested-by: jenkins
Reviewed-by: Antonio Borneo <bor...@gm...>
diff --git a/src/target/target.c b/src/target/target.c
index fa0c2b256..35e9b5332 100644
--- a/src/target/target.c
+++ b/src/target/target.c
@@ -717,6 +717,15 @@ static int no_mmu(struct target *target, int *enabled)
return ERROR_OK;
}
+/**
+ * Reset the @c examined flag for the given target.
+ * Pure paranoia -- targets are zeroed on allocation.
+ */
+static inline void target_reset_examined(struct target *target)
+{
+ target->examined = false;
+}
+
static int default_examine(struct target *target)
{
target_set_examined(target);
@@ -737,10 +746,12 @@ int target_examine_one(struct target *target)
int retval = target->type->examine(target);
if (retval != ERROR_OK) {
+ target_reset_examined(target);
target_call_event_callbacks(target, TARGET_EVENT_EXAMINE_FAIL);
return retval;
}
+ target_set_examined(target);
target_call_event_callbacks(target, TARGET_EVENT_EXAMINE_END);
return ERROR_OK;
@@ -1522,15 +1533,6 @@ static int target_profiling(struct target *target, uint32_t *samples,
num_samples, seconds);
}
-/**
- * Reset the @c examined flag for the given target.
- * Pure paranoia -- targets are zeroed on allocation.
- */
-static void target_reset_examined(struct target *target)
-{
- target->examined = false;
-}
-
static int handle_target(void *priv);
static int target_init_one(struct command_context *cmd_ctx,
@@ -3055,7 +3057,7 @@ static int handle_target(void *priv)
/* Target examination could have failed due to unstable connection,
* but we set the examined flag anyway to repoll it later */
if (retval != ERROR_OK) {
- target->examined = true;
+ target_set_examined(target);
LOG_USER("Examination failed, GDB will be halted. Polling again in %dms",
target->backoff.times * polling_interval);
return retval;
@@ -5308,8 +5310,13 @@ static int jim_target_examine(Jim_Interp *interp, int argc, Jim_Obj *const *argv
}
int e = target->type->examine(target);
- if (e != ERROR_OK)
+ if (e != ERROR_OK) {
+ target_reset_examined(target);
return JIM_ERR;
+ }
+
+ target_set_examined(target);
+
return JIM_OK;
}
-----------------------------------------------------------------------
Summary of changes:
src/target/target.c | 29 ++++++++++++++++++-----------
1 file changed, 18 insertions(+), 11 deletions(-)
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From: OpenOCD-Gerrit <ope...@us...> - 2021-10-02 13:15:06
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".
The branch, master has been updated
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- Log -----------------------------------------------------------------
commit ba1061fe1daf0071499e40da860350979105b69e
Author: Tarek BOCHKATI <tar...@gm...>
Date: Wed Sep 8 12:49:50 2021 +0100
target/cortex_m: enhance multi-core examine logs
Giving the example of STM32WL55x the examine log is the following:
Info : stm32wlx.cpu0: hardware has 6 breakpoints, 4 watchpoints
Info : stm32wlx.cpu1: hardware has 4 breakpoints, 2 watchpoints
After this change the examine log becomes:
Info : stm32wlx.cpu0: Cortex-M4 r0p1 processor detected
Info : stm32wlx.cpu0: target has 6 breakpoints, 4 watchpoints
Info : stm32wlx.cpu1: Cortex-M0+ r0p1 processor detected
Info : stm32wlx.cpu1: target has 4 breakpoints, 2 watchpoints
Change-Id: I1873a75eb76f0819342c441129427b38e984f0df
Signed-off-by: Tarek BOCHKATI <tar...@gm...>
Reviewed-on: https://review.openocd.org/c/openocd/+/6553
Tested-by: jenkins
Reviewed-by: Tomas Vanek <va...@fb...>
Reviewed-by: Antonio Borneo <bor...@gm...>
diff --git a/src/target/cortex_m.c b/src/target/cortex_m.c
index 5deb9bf4a..3412c5677 100644
--- a/src/target/cortex_m.c
+++ b/src/target/cortex_m.c
@@ -2082,8 +2082,12 @@ int cortex_m_examine(struct target *target)
armv7m->arm.arch = cortex_m->core_info->arch;
- LOG_DEBUG("%s r%" PRId8 "p%" PRId8 " processor detected",
- cortex_m->core_info->name, (uint8_t)((cpuid >> 20) & 0xf), (uint8_t)((cpuid >> 0) & 0xf));
+ LOG_INFO("%s: %s r%" PRId8 "p%" PRId8 " processor detected",
+ target_name(target),
+ cortex_m->core_info->name,
+ (uint8_t)((cpuid >> 20) & 0xf),
+ (uint8_t)((cpuid >> 0) & 0xf));
+
cortex_m->maskints_erratum = false;
if (core_partno == CORTEX_M7_PARTNO) {
uint8_t rev, patch;
@@ -2192,7 +2196,7 @@ int cortex_m_examine(struct target *target)
cortex_m_dwt_setup(cortex_m, target);
/* These hardware breakpoints only work for code in flash! */
- LOG_INFO("%s: hardware has %d breakpoints, %d watchpoints",
+ LOG_INFO("%s: target has %d breakpoints, %d watchpoints",
target_name(target),
cortex_m->fp_num_code,
cortex_m->dwt_num_comp);
-----------------------------------------------------------------------
Summary of changes:
src/target/cortex_m.c | 10 +++++++---
1 file changed, 7 insertions(+), 3 deletions(-)
hooks/post-receive
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From: OpenOCD-Gerrit <ope...@us...> - 2021-09-25 13:37:51
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".
The branch, master has been updated
via c3993d3188da5976a64f47d4cbf4d7e5b63f0c8d (commit)
from 2f424b7eb776b3d32f2b58a3ffd91ff1d5657404 (commit)
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- Log -----------------------------------------------------------------
commit c3993d3188da5976a64f47d4cbf4d7e5b63f0c8d
Author: Tarek BOCHKATI <tar...@gm...>
Date: Tue Sep 14 21:26:47 2021 +0100
tcl/stm32wlx.cfg: comply with new jimtcl expr syntax
Change-Id: I2e9fd528817b14396c7643801aeea5c8dde668e0
Signed-off-by: Tarek BOCHKATI <tar...@gm...>
Reviewed-on: https://review.openocd.org/c/openocd/+/6557
Reviewed-by: Antonio Borneo <bor...@gm...>
Tested-by: jenkins
diff --git a/tcl/target/stm32wlx.cfg b/tcl/target/stm32wlx.cfg
index edb3fb32b..fafe9bcba 100644
--- a/tcl/target/stm32wlx.cfg
+++ b/tcl/target/stm32wlx.cfg
@@ -151,7 +151,7 @@ proc stm32wlx_get_chipname {} {
if {$sep == -1} {
return $t
}
- return [string range $t 0 [expr $sep - 1]]
+ return [string range $t 0 [expr {$sep - 1}]]
}
# like mrw, but with target selection
-----------------------------------------------------------------------
Summary of changes:
tcl/target/stm32wlx.cfg | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
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From: OpenOCD-Gerrit <ope...@us...> - 2021-09-25 13:15:29
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".
The branch, master has been updated
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- Log -----------------------------------------------------------------
commit 2f424b7eb776b3d32f2b58a3ffd91ff1d5657404
Author: Alex Crawford <op...@co...>
Date: Thu Sep 16 10:00:25 2021 -0700
driver/linuxgpiod: add support for opendrain srst
Some MCUs (e.g. the STM32F3) directly expose the internal reset line to
an external pin. When this signal is driven by a push/pull line, it can
actually be inhibited by the external driver. This results in a setup
where the MCU cannot reset itself, for example, by a watchdog timeout or
a sysreset request. To fix this condition, support for open drain output
on the SRST line is required.
Note that because `reset_config srst_open_drain` is the default, all
users of this adapter will switch over to an open drain output unless
explicitly configured otherwise.
Signed-off-by: Alex Crawford <op...@co...>
Change-Id: I89b39b03aa03f826ed3c45793412780448940bcc
Reviewed-on: https://review.openocd.org/c/openocd/+/6559
Tested-by: jenkins
Reviewed-by: Antonio Borneo <bor...@gm...>
diff --git a/src/jtag/drivers/linuxgpiod.c b/src/jtag/drivers/linuxgpiod.c
index 42c8a3140..dd50b4406 100644
--- a/src/jtag/drivers/linuxgpiod.c
+++ b/src/jtag/drivers/linuxgpiod.c
@@ -278,7 +278,7 @@ static int linuxgpiod_quit(void)
return ERROR_OK;
}
-static struct gpiod_line *helper_get_input_line(const char *label, unsigned int offset)
+static struct gpiod_line *helper_get_line(const char *label, unsigned int offset, int val, int dir, int flags)
{
struct gpiod_line *line;
int retval;
@@ -289,33 +289,34 @@ static struct gpiod_line *helper_get_input_line(const char *label, unsigned int
return NULL;
}
- retval = gpiod_line_request_input(line, "OpenOCD");
+ struct gpiod_line_request_config config = {
+ .consumer = "OpenOCD",
+ .request_type = dir,
+ .flags = flags,
+ };
+
+ retval = gpiod_line_request(line, &config, val);
if (retval < 0) {
- LOG_ERROR("Error request_input line %s", label);
+ LOG_ERROR("Error requesting gpio line %s", label);
return NULL;
}
return line;
}
-static struct gpiod_line *helper_get_output_line(const char *label, unsigned int offset, int val)
+static struct gpiod_line *helper_get_input_line(const char *label, unsigned int offset)
{
- struct gpiod_line *line;
- int retval;
-
- line = gpiod_chip_get_line(gpiod_chip, offset);
- if (!line) {
- LOG_ERROR("Error get line %s", label);
- return NULL;
- }
+ return helper_get_line(label, offset, 0, GPIOD_LINE_REQUEST_DIRECTION_INPUT, 0);
+}
- retval = gpiod_line_request_output(line, "OpenOCD", val);
- if (retval < 0) {
- LOG_ERROR("Error request_output line %s", label);
- return NULL;
- }
+static struct gpiod_line *helper_get_output_line(const char *label, unsigned int offset, int val)
+{
+ return helper_get_line(label, offset, val, GPIOD_LINE_REQUEST_DIRECTION_OUTPUT, 0);
+}
- return line;
+static struct gpiod_line *helper_get_open_drain_output_line(const char *label, unsigned int offset, int val)
+{
+ return helper_get_line(label, offset, val, GPIOD_LINE_REQUEST_DIRECTION_OUTPUT, GPIOD_LINE_REQUEST_FLAG_OPEN_DRAIN);
}
static int linuxgpiod_init(void)
@@ -381,7 +382,11 @@ static int linuxgpiod_init(void)
}
if (is_gpio_valid(srst_gpio)) {
- gpiod_srst = helper_get_output_line("srst", srst_gpio, 1);
+ if (jtag_get_reset_config() & RESET_SRST_PUSH_PULL)
+ gpiod_srst = helper_get_output_line("srst", srst_gpio, 1);
+ else
+ gpiod_srst = helper_get_open_drain_output_line("srst", srst_gpio, 1);
+
if (!gpiod_srst)
goto out_error;
}
-----------------------------------------------------------------------
Summary of changes:
src/jtag/drivers/linuxgpiod.c | 43 ++++++++++++++++++++++++-------------------
1 file changed, 24 insertions(+), 19 deletions(-)
hooks/post-receive
--
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|
From: OpenOCD-Gerrit <ope...@us...> - 2021-09-25 13:14:31
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".
The branch, master has been updated
via 5765a0ce14485aadc6b74c6e2b4f15b73df14603 (commit)
from e48093b395808692145bf320e6d206561670107c (commit)
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- Log -----------------------------------------------------------------
commit 5765a0ce14485aadc6b74c6e2b4f15b73df14603
Author: Tim Newsome <ti...@si...>
Date: Thu Sep 2 11:11:30 2021 -0700
Speed up remote bitbang.
1. Use TCP_NODELAY, which makes things twice as fast.
2. Get rid of a bunch of unnecessary socket block/non-block calls, which
improves speed another 10% or so.
Change-Id: I415db5746d55374a14564b1973b81e3517f5cb67
Signed-off-by: Tim Newsome <ti...@si...>
Reviewed-on: https://review.openocd.org/c/openocd/+/6534
Tested-by: jenkins
Reviewed-by: Jan Matyas <ma...@co...>
Reviewed-by: Antonio Borneo <bor...@gm...>
diff --git a/src/jtag/drivers/remote_bitbang.c b/src/jtag/drivers/remote_bitbang.c
index ce1a06544..6ab7cc9c5 100644
--- a/src/jtag/drivers/remote_bitbang.c
+++ b/src/jtag/drivers/remote_bitbang.c
@@ -23,6 +23,7 @@
#ifndef _WIN32
#include <sys/un.h>
#include <netdb.h>
+#include <netinet/tcp.h>
#endif
#include "helper/system.h"
#include "helper/replacements.h"
@@ -40,35 +41,87 @@ static uint8_t remote_bitbang_send_buf[512];
static unsigned int remote_bitbang_send_buf_used;
/* Circular buffer. When start == end, the buffer is empty. */
-static char remote_bitbang_recv_buf[64];
+static char remote_bitbang_recv_buf[256];
static unsigned int remote_bitbang_recv_buf_start;
static unsigned int remote_bitbang_recv_buf_end;
-static bool remote_bitbang_buf_full(void)
+static bool remote_bitbang_recv_buf_full(void)
{
return remote_bitbang_recv_buf_end ==
((remote_bitbang_recv_buf_start + sizeof(remote_bitbang_recv_buf) - 1) %
sizeof(remote_bitbang_recv_buf));
}
-/* Read any incoming data, placing it into the buffer. */
-static int remote_bitbang_fill_buf(void)
+static bool remote_bitbang_recv_buf_empty(void)
{
- socket_nonblock(remote_bitbang_fd);
- while (!remote_bitbang_buf_full()) {
- unsigned int contiguous_available_space;
- if (remote_bitbang_recv_buf_end >= remote_bitbang_recv_buf_start) {
- contiguous_available_space = sizeof(remote_bitbang_recv_buf) -
- remote_bitbang_recv_buf_end;
- if (remote_bitbang_recv_buf_start == 0)
- contiguous_available_space -= 1;
- } else {
- contiguous_available_space = remote_bitbang_recv_buf_start -
- remote_bitbang_recv_buf_end - 1;
+ return remote_bitbang_recv_buf_start == remote_bitbang_recv_buf_end;
+}
+
+static unsigned int remote_bitbang_recv_buf_contiguous_available_space(void)
+{
+ if (remote_bitbang_recv_buf_end >= remote_bitbang_recv_buf_start) {
+ unsigned int space = sizeof(remote_bitbang_recv_buf) -
+ remote_bitbang_recv_buf_end;
+ if (remote_bitbang_recv_buf_start == 0)
+ space -= 1;
+ return space;
+ } else {
+ return remote_bitbang_recv_buf_start -
+ remote_bitbang_recv_buf_end - 1;
+ }
+}
+
+static int remote_bitbang_flush(void)
+{
+ if (remote_bitbang_send_buf_used <= 0)
+ return ERROR_OK;
+
+ unsigned int offset = 0;
+ while (offset < remote_bitbang_send_buf_used) {
+ ssize_t written = write_socket(remote_bitbang_fd, remote_bitbang_send_buf + offset,
+ remote_bitbang_send_buf_used - offset);
+ if (written < 0) {
+ log_socket_error("remote_bitbang_putc");
+ remote_bitbang_send_buf_used = 0;
+ return ERROR_FAIL;
}
+ offset += written;
+ }
+ remote_bitbang_send_buf_used = 0;
+ return ERROR_OK;
+}
+
+enum block_bool {
+ NO_BLOCK,
+ BLOCK
+};
+
+/* Read any incoming data, placing it into the buffer. */
+static int remote_bitbang_fill_buf(enum block_bool block)
+{
+ if (remote_bitbang_recv_buf_empty()) {
+ /* If the buffer is empty, reset it to 0 so we get more
+ * contiguous space. */
+ remote_bitbang_recv_buf_start = 0;
+ remote_bitbang_recv_buf_end = 0;
+ }
+
+ if (block == BLOCK) {
+ if (remote_bitbang_flush() != ERROR_OK)
+ return ERROR_FAIL;
+ socket_block(remote_bitbang_fd);
+ }
+
+ bool first = true;
+ while (!remote_bitbang_recv_buf_full()) {
+ unsigned int contiguous_available_space =
+ remote_bitbang_recv_buf_contiguous_available_space();
ssize_t count = read_socket(remote_bitbang_fd,
remote_bitbang_recv_buf + remote_bitbang_recv_buf_end,
contiguous_available_space);
+ if (first && block == BLOCK)
+ socket_nonblock(remote_bitbang_fd);
+ first = false;
if (count > 0) {
remote_bitbang_recv_buf_end += count;
if (remote_bitbang_recv_buf_end == sizeof(remote_bitbang_recv_buf))
@@ -92,26 +145,6 @@ static int remote_bitbang_fill_buf(void)
return ERROR_OK;
}
-static int remote_bitbang_flush(void)
-{
- if (remote_bitbang_send_buf_used <= 0)
- return ERROR_OK;
-
- unsigned int offset = 0;
- while (offset < remote_bitbang_send_buf_used) {
- ssize_t written = write_socket(remote_bitbang_fd, remote_bitbang_send_buf + offset,
- remote_bitbang_send_buf_used - offset);
- if (written < 0) {
- log_socket_error("remote_bitbang_putc");
- remote_bitbang_send_buf_used = 0;
- return ERROR_FAIL;
- }
- offset += written;
- }
- remote_bitbang_send_buf_used = 0;
- return ERROR_OK;
-}
-
typedef enum {
NO_FLUSH,
FLUSH_SEND_BUF
@@ -157,47 +190,25 @@ static bb_value_t char_to_int(int c)
}
}
-/* Get the next read response. */
-static bb_value_t remote_bitbang_rread(void)
-{
- if (remote_bitbang_flush() != ERROR_OK)
- return ERROR_FAIL;
-
- /* Enable blocking access. */
- socket_block(remote_bitbang_fd);
- char c;
- ssize_t count = read_socket(remote_bitbang_fd, &c, 1);
- if (count == 1) {
- return char_to_int(c);
- } else {
- remote_bitbang_quit();
- LOG_ERROR("read_socket: count=%d", (int) count);
- log_socket_error("read_socket");
- return BB_ERROR;
- }
-}
-
static int remote_bitbang_sample(void)
{
- if (remote_bitbang_fill_buf() != ERROR_OK)
+ if (remote_bitbang_fill_buf(NO_BLOCK) != ERROR_OK)
return ERROR_FAIL;
- assert(!remote_bitbang_buf_full());
+ assert(!remote_bitbang_recv_buf_full());
return remote_bitbang_queue('R', NO_FLUSH);
}
static bb_value_t remote_bitbang_read_sample(void)
{
- if (remote_bitbang_recv_buf_start == remote_bitbang_recv_buf_end) {
- if (remote_bitbang_fill_buf() != ERROR_OK)
- return ERROR_FAIL;
- }
- if (remote_bitbang_recv_buf_start != remote_bitbang_recv_buf_end) {
- int c = remote_bitbang_recv_buf[remote_bitbang_recv_buf_start];
- remote_bitbang_recv_buf_start =
- (remote_bitbang_recv_buf_start + 1) % sizeof(remote_bitbang_recv_buf);
- return char_to_int(c);
+ if (remote_bitbang_recv_buf_empty()) {
+ if (remote_bitbang_fill_buf(BLOCK) != ERROR_OK)
+ return BB_ERROR;
}
- return remote_bitbang_rread();
+ assert(!remote_bitbang_recv_buf_empty());
+ int c = remote_bitbang_recv_buf[remote_bitbang_recv_buf_start];
+ remote_bitbang_recv_buf_start =
+ (remote_bitbang_recv_buf_start + 1) % sizeof(remote_bitbang_recv_buf);
+ return char_to_int(c);
}
static int remote_bitbang_write(int tck, int tms, int tdi)
@@ -261,6 +272,13 @@ static int remote_bitbang_init_tcp(void)
close(fd);
}
+ /* We work hard to collapse the writes into the minimum number, so when
+ * we write something we want to get it to the other end of the
+ * connection as fast as possible. */
+ int one = 1;
+ /* On Windows optval has to be a const char *. */
+ setsockopt(fd, IPPROTO_TCP, TCP_NODELAY, (const char *)&one, sizeof(one));
+
freeaddrinfo(result); /* No longer needed */
if (!rp) { /* No address succeeded */
@@ -314,6 +332,8 @@ static int remote_bitbang_init(void)
if (remote_bitbang_fd < 0)
return remote_bitbang_fd;
+ socket_nonblock(remote_bitbang_fd);
+
LOG_INFO("remote_bitbang driver initialized");
return ERROR_OK;
}
-----------------------------------------------------------------------
Summary of changes:
src/jtag/drivers/remote_bitbang.c | 154 +++++++++++++++++++++-----------------
1 file changed, 87 insertions(+), 67 deletions(-)
hooks/post-receive
--
Main OpenOCD repository
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|
From: OpenOCD-Gerrit <ope...@us...> - 2021-09-25 13:13:54
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".
The branch, master has been updated
via e48093b395808692145bf320e6d206561670107c (commit)
from 7b504370f732a00d803163cab2b1750bde1927cf (commit)
Those revisions listed above that are new to this repository have
not appeared on any other notification email; so we list those
revisions in full, below.
- Log -----------------------------------------------------------------
commit e48093b395808692145bf320e6d206561670107c
Author: Antonio Borneo <bor...@gm...>
Date: Fri Sep 17 18:37:41 2021 +0200
openocd: prevent jimtcl error message while testing commands
The jimtcl API Jim_GetCommand() sets an error message when the
command is not found and flag JIM_ERRMSG is set.
OpenOCD is checking if the command has already been registered,
thus 'command not found' is the desired case.
Pass flag JIM_NONE to prevent jimtcl from setting the error
message.
Change-Id: I3329c2f8722eda0cc9a5f9cbd888a37915b46107
Signed-off-by: Antonio Borneo <bor...@gm...>
Reviewed-on: https://review.openocd.org/c/openocd/+/6562
Tested-by: jenkins
diff --git a/src/target/arm_cti.c b/src/target/arm_cti.c
index 7d005e2b1..c776e9c2a 100644
--- a/src/target/arm_cti.c
+++ b/src/target/arm_cti.c
@@ -465,7 +465,7 @@ static int cti_create(struct jim_getopt_info *goi)
/* COMMAND */
jim_getopt_obj(goi, &new_cmd);
/* does this command exist? */
- cmd = Jim_GetCommand(goi->interp, new_cmd, JIM_ERRMSG);
+ cmd = Jim_GetCommand(goi->interp, new_cmd, JIM_NONE);
if (cmd) {
cp = Jim_GetString(new_cmd, NULL);
Jim_SetResultFormatted(goi->interp, "Command: %s Exists", cp);
diff --git a/src/target/arm_dap.c b/src/target/arm_dap.c
index 2f21aa170..94edfc09d 100644
--- a/src/target/arm_dap.c
+++ b/src/target/arm_dap.c
@@ -230,7 +230,7 @@ static int dap_create(struct jim_getopt_info *goi)
/* COMMAND */
jim_getopt_obj(goi, &new_cmd);
/* does this command exist? */
- cmd = Jim_GetCommand(goi->interp, new_cmd, JIM_ERRMSG);
+ cmd = Jim_GetCommand(goi->interp, new_cmd, JIM_NONE);
if (cmd) {
cp = Jim_GetString(new_cmd, NULL);
Jim_SetResultFormatted(goi->interp, "Command: %s Exists", cp);
diff --git a/src/target/arm_tpiu_swo.c b/src/target/arm_tpiu_swo.c
index 8b1d012ed..f2b514826 100644
--- a/src/target/arm_tpiu_swo.c
+++ b/src/target/arm_tpiu_swo.c
@@ -880,7 +880,7 @@ static int arm_tpiu_swo_create(Jim_Interp *interp, struct arm_tpiu_swo_object *o
assert(cmd_ctx);
/* does this command exist? */
- cmd = Jim_GetCommand(interp, Jim_NewStringObj(interp, obj->name, -1), JIM_ERRMSG);
+ cmd = Jim_GetCommand(interp, Jim_NewStringObj(interp, obj->name, -1), JIM_NONE);
if (cmd) {
Jim_SetResultFormatted(interp, "Command: %s Exists", obj->name);
return JIM_ERR;
diff --git a/src/target/target.c b/src/target/target.c
index 6d3bf7787..fa0c2b256 100644
--- a/src/target/target.c
+++ b/src/target/target.c
@@ -5715,7 +5715,7 @@ static int target_create(struct jim_getopt_info *goi)
/* COMMAND */
jim_getopt_obj(goi, &new_cmd);
/* does this command exist? */
- cmd = Jim_GetCommand(goi->interp, new_cmd, JIM_ERRMSG);
+ cmd = Jim_GetCommand(goi->interp, new_cmd, JIM_NONE);
if (cmd) {
cp = Jim_GetString(new_cmd, NULL);
Jim_SetResultFormatted(goi->interp, "Command/target: %s Exists", cp);
-----------------------------------------------------------------------
Summary of changes:
src/target/arm_cti.c | 2 +-
src/target/arm_dap.c | 2 +-
src/target/arm_tpiu_swo.c | 2 +-
src/target/target.c | 2 +-
4 files changed, 4 insertions(+), 4 deletions(-)
hooks/post-receive
--
Main OpenOCD repository
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From: OpenOCD-Gerrit <ope...@us...> - 2021-09-25 13:13:33
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".
The branch, master has been updated
via 7b504370f732a00d803163cab2b1750bde1927cf (commit)
from 2a43137619e384bee38ea58d817a0d15876d2473 (commit)
Those revisions listed above that are new to this repository have
not appeared on any other notification email; so we list those
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- Log -----------------------------------------------------------------
commit 7b504370f732a00d803163cab2b1750bde1927cf
Author: Antonio Borneo <bor...@gm...>
Date: Fri Sep 17 18:47:20 2021 +0200
arm_tpiu_swo: fix support for deprecated 'tpiu' command before 'init'
Commit dc7b32ea4a00 ("armv7m_trace: get rid of the old tpiu code")
is not handling correctly the old 'tpiu' command if it is run
during the config phase (before command 'init').
Move the call to the old event handler 'trace-config' in function
jim_arm_tpiu_swo_enable(), so it is correctly executed after
'init'.
Add the call to the old event handler 'trace-config' also during
jim_arm_tpiu_swo_disable(), to match the old behaviour.
Add more information while alerting that the event 'trace-config'
is deprecated.
Change-Id: If831d9159b4634c74e19c04099d041a6e2be3f2a
Signed-off-by: Antonio Borneo <bor...@gm...>
Fixes: dc7b32ea4a00 ("armv7m_trace: get rid of the old tpiu code")
Reviewed-on: https://review.openocd.org/c/openocd/+/6561
Tested-by: jenkins
Reviewed-by: Karl Palsson <ka...@tw...>
diff --git a/src/target/arm_tpiu_swo.c b/src/target/arm_tpiu_swo.c
index 746ab393e..8b1d012ed 100644
--- a/src/target/arm_tpiu_swo.c
+++ b/src/target/arm_tpiu_swo.c
@@ -764,6 +764,10 @@ static int jim_arm_tpiu_swo_enable(Jim_Interp *interp, int argc, Jim_Obj *const
arm_tpiu_swo_handle_event(obj, TPIU_SWO_EVENT_POST_ENABLE);
+ /* START_DEPRECATED_TPIU */
+ target_handle_event(target, TARGET_EVENT_TRACE_CONFIG);
+ /* END_DEPRECATED_TPIU */
+
obj->enabled = true;
return JIM_OK;
@@ -817,6 +821,13 @@ static int jim_arm_tpiu_swo_disable(Jim_Interp *interp, int argc, Jim_Obj *const
}
arm_tpiu_swo_handle_event(obj, TPIU_SWO_EVENT_POST_DISABLE);
+
+ /* START_DEPRECATED_TPIU */
+ struct command_context *cmd_ctx = current_command_context(interp);
+ struct target *target = get_current_target(cmd_ctx);
+ target_handle_event(target, TARGET_EVENT_TRACE_CONFIG);
+ /* END_DEPRECATED_TPIU */
+
return JIM_OK;
}
@@ -1112,7 +1123,6 @@ COMMAND_HANDLER(handle_tpiu_deprecated_config_command)
if (retval != ERROR_OK)
return retval;
- target_handle_event(target, TARGET_EVENT_TRACE_CONFIG);
return ERROR_OK;
}
diff --git a/src/target/target.c b/src/target/target.c
index 6571e9c6f..6d3bf7787 100644
--- a/src/target/target.c
+++ b/src/target/target.c
@@ -4983,7 +4983,7 @@ no_params:
if (goi->isconfigure) {
/* START_DEPRECATED_TPIU */
if (n->value == TARGET_EVENT_TRACE_CONFIG)
- LOG_INFO("DEPRECATED target event %s", n->name);
+ LOG_INFO("DEPRECATED target event %s; use TPIU events {pre,post}-{enable,disable}", n->name);
/* END_DEPRECATED_TPIU */
bool replace = true;
-----------------------------------------------------------------------
Summary of changes:
src/target/arm_tpiu_swo.c | 12 +++++++++++-
src/target/target.c | 2 +-
2 files changed, 12 insertions(+), 2 deletions(-)
hooks/post-receive
--
Main OpenOCD repository
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From: OpenOCD-Gerrit <ope...@us...> - 2021-09-25 13:12:07
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".
The branch, master has been updated
via 2a43137619e384bee38ea58d817a0d15876d2473 (commit)
from 122f36ed7b6bb0ddbf72cd6cf4c1058afc32a837 (commit)
Those revisions listed above that are new to this repository have
not appeared on any other notification email; so we list those
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- Log -----------------------------------------------------------------
commit 2a43137619e384bee38ea58d817a0d15876d2473
Author: Antonio Borneo <bor...@gm...>
Date: Sat Aug 21 00:35:32 2021 +0200
arm_adi_v5: drop ANY_ID from table dap_part_nums
The initial version of the table dap_part_nums contains only the
part number of the device and not the manufacturer ID.
This causes collisions between devices with same part number but
from different manufacturer.
The table has been extended to include the manufacturer JEDEC code
in commit 2f131d3c3004 ("ARM ADIv5: CoreSight ROM decode part
number and designer id").
For two old/legacy table's entries reported without manufacturer
code it was defined a special ANY_ID manufacturer, meaning skip
the check for manufacturer!
The two legacy entries report the comment "from OMAP3 memmap", and
thanks to the associated string has been possible through Google
to identify a Master Report [1] about using OpenOCD with the OMAP3
in a BeagleBoard. The ROM table is printed with OpenOCD command
"dap info 1" at page 8 and reports the Peripheral ID required to
extract the manufacturer ID that, out of any surprise, belong to
Texas Instruments.
Set the two missing manufacturer ID to Texas Instruments JEDEC
code.
Remove the now redundant definition and use of ANY_ID.
While revisiting this old code, remove also the useless comment
"0x113: what?". It was introduced in commit ddade10d4a93 ("ARM
ADIv5: "dap info" gets more readable") and from the same dump in
[1] it's clearly another element in OMAP3. It is listed as entry
0x8 in the ROM table and there is no further info available.
OpenOCD will anyway list it as:
Designer is 0x017, Texas Instruments
Part is 0x113, Unrecognized
Another link https://elinux.org/BeagleBoardOpenOCD reports the
text "Part number 0x113: This is ????", which sounds familiar!
No public document from Texas Instruments reports what is this
device at address 0x54012000.
[1] Warren Clay Grant - University of Texas at Austin
"Implementation of an Open Source JTAG Debugging Development
Chain for the BeagleBoard ARM® Cortex A-8" - May 2012
Link: https://repositories.lib.utexas.edu/bitstream/handle/2152/ETD-UT-2012-05-5478/GRANT-MASTERS-REPORT.pdf
Change-Id: I7e007addbb5c6e90303e4e8c110c7d27810fbe9c
Signed-off-by: Antonio Borneo <bor...@gm...>
Reviewed-on: https://review.openocd.org/c/openocd/+/6454
Tested-by: jenkins
Reviewed-by: Daniel Goehring <dgo...@os...>
diff --git a/src/target/arm_adi_v5.c b/src/target/arm_adi_v5.c
index f813d8552..8d6d6618b 100644
--- a/src/target/arm_adi_v5.c
+++ b/src/target/arm_adi_v5.c
@@ -1107,14 +1107,6 @@ static int dap_read_part_id(struct adiv5_ap *ap, target_addr_t component_base, u
* from chip observation (e.g. TI SDTI).
*/
-/* The legacy code only used the part number field to identify CoreSight peripherals.
- * This meant that the same part number from two different manufacturers looked the same.
- * It is desirable for all future additions to identify with both part number and JEP106.
- * "ANY_ID" is a wildcard (any JEP106) only to preserve legacy behavior for legacy entries.
- */
-
-#define ANY_ID 0x1000
-
static const struct dap_part_nums {
uint16_t designer_id;
uint16_t part_num;
@@ -1227,6 +1219,8 @@ static const struct dap_part_nums {
{ ARM_ID, 0xd0c, "Neoverse N1", "(Debug Unit)", },
{ ARM_ID, 0xd13, "Cortex-R52 Debug", "(Debug Unit)", },
{ ARM_ID, 0xd49, "Neoverse N2", "(Debug Unit)", },
+ { 0x017, 0x120, "TI SDTI", "(System Debug Trace Interface)", }, /* from OMAP3 memmap */
+ { 0x017, 0x343, "TI DAPCTL", "", }, /* from OMAP3 memmap */
{ 0x017, 0x9af, "MSP432 ROM", "(ROM Table)" },
{ 0x01f, 0xcd0, "Atmel CPU with DSU", "(CPU)" },
{ 0x041, 0x1db, "XMC4500 ROM", "(ROM Table)" },
@@ -1243,9 +1237,6 @@ static const struct dap_part_nums {
{ 0x1eb, 0x211, "Tegra 210 ROM", "(ROM Table)", },
{ 0x1eb, 0x302, "Denver Debug", "(Debug Unit)", },
{ 0x1eb, 0x402, "Denver PMU", "(Performance Monitor Unit)", },
- /* legacy comment: 0x113: what? */
- { ANY_ID, 0x120, "TI SDTI", "(System Debug Trace Interface)", }, /* from OMAP3 memmap */
- { ANY_ID, 0x343, "TI DAPCTL", "", }, /* from OMAP3 memmap */
};
static const struct dap_part_nums *pidr_to_part_num(unsigned int designer_id, unsigned int part_num)
@@ -1255,12 +1246,10 @@ static const struct dap_part_nums *pidr_to_part_num(unsigned int designer_id, un
.full = "",
};
- for (unsigned int i = 0; i < ARRAY_SIZE(dap_part_nums); i++) {
- if (dap_part_nums[i].designer_id != designer_id && dap_part_nums[i].designer_id != ANY_ID)
- continue;
- if (dap_part_nums[i].part_num == part_num)
+ for (unsigned int i = 0; i < ARRAY_SIZE(dap_part_nums); i++)
+ if (dap_part_nums[i].designer_id == designer_id && dap_part_nums[i].part_num == part_num)
return &dap_part_nums[i];
- }
+
return &unknown;
}
-----------------------------------------------------------------------
Summary of changes:
src/target/arm_adi_v5.c | 21 +++++----------------
1 file changed, 5 insertions(+), 16 deletions(-)
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From: OpenOCD-Gerrit <ope...@us...> - 2021-09-25 13:11:33
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".
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via a931c99f5bef63129f7f6a634d2e03d8420a68ad (commit)
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commit 122f36ed7b6bb0ddbf72cd6cf4c1058afc32a837
Author: Antonio Borneo <bor...@gm...>
Date: Thu Aug 19 18:02:14 2021 +0200
arm_adi_v5: add arm Neoverse N2 part numbers
Change-Id: Ib7a8c9d460f12762f6d106e9331e84b6d2dec213
Signed-off-by: Antonio Borneo <bor...@gm...>
Reviewed-on: https://review.openocd.org/c/openocd/+/6453
Tested-by: jenkins
Reviewed-by: Daniel Goehring <dgo...@os...>
Reviewed-by: Tarek BOCHKATI <tar...@gm...>
diff --git a/src/target/arm_adi_v5.c b/src/target/arm_adi_v5.c
index 4fa9bb7f6..f813d8552 100644
--- a/src/target/arm_adi_v5.c
+++ b/src/target/arm_adi_v5.c
@@ -1226,6 +1226,7 @@ static const struct dap_part_nums {
{ ARM_ID, 0xd0b, "Cortex-A76 Debug", "(Debug Unit)", },
{ ARM_ID, 0xd0c, "Neoverse N1", "(Debug Unit)", },
{ ARM_ID, 0xd13, "Cortex-R52 Debug", "(Debug Unit)", },
+ { ARM_ID, 0xd49, "Neoverse N2", "(Debug Unit)", },
{ 0x017, 0x9af, "MSP432 ROM", "(ROM Table)" },
{ 0x01f, 0xcd0, "Atmel CPU with DSU", "(CPU)" },
{ 0x041, 0x1db, "XMC4500 ROM", "(ROM Table)" },
commit a931c99f5bef63129f7f6a634d2e03d8420a68ad
Author: Kevin Burke <ke...@os...>
Date: Thu Aug 19 17:44:38 2021 +0200
arm_adi_v5: add arm Neoverse N1 part numbers
Split from change https://review.openocd.org/6077/
Change-Id: I5e3d3736beb741de3940ea6e23b0ccbf47e8dec7
Signed-off-by: Kevin Burke <ke...@os...>
Signed-off-by: Daniel Goehring <dgo...@os...>
Signed-off-by: Antonio Borneo <bor...@gm...>
Reviewed-on: https://review.openocd.org/c/openocd/+/6452
Tested-by: jenkins
Reviewed-by: Tarek BOCHKATI <tar...@gm...>
diff --git a/src/target/arm_adi_v5.c b/src/target/arm_adi_v5.c
index 159c613a0..4fa9bb7f6 100644
--- a/src/target/arm_adi_v5.c
+++ b/src/target/arm_adi_v5.c
@@ -1224,6 +1224,7 @@ static const struct dap_part_nums {
{ ARM_ID, 0xd07, "Cortex-A57 Debug", "(Debug Unit)", },
{ ARM_ID, 0xd08, "Cortex-A72 Debug", "(Debug Unit)", },
{ ARM_ID, 0xd0b, "Cortex-A76 Debug", "(Debug Unit)", },
+ { ARM_ID, 0xd0c, "Neoverse N1", "(Debug Unit)", },
{ ARM_ID, 0xd13, "Cortex-R52 Debug", "(Debug Unit)", },
{ 0x017, 0x9af, "MSP432 ROM", "(ROM Table)" },
{ 0x01f, 0xcd0, "Atmel CPU with DSU", "(CPU)" },
-----------------------------------------------------------------------
Summary of changes:
src/target/arm_adi_v5.c | 2 ++
1 file changed, 2 insertions(+)
hooks/post-receive
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From: OpenOCD-Gerrit <ope...@us...> - 2021-09-25 13:08:07
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".
The branch, master has been updated
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commit 8f73bd3d48f2629df3b4a3732abf9659c41a046b
Author: Antonio Borneo <bor...@gm...>
Date: Thu Aug 19 18:22:28 2021 +0200
arm_adi_v5: add arm Cortex-R52 part numbers
Extract new part numbers from Arm Cortex-R52 Processor Technical
Reference Manual Revision r1p3 and add them to the array
dap_partnums.
Change-Id: I8020f36de587951af60422ef33d7e438dc7d9d53
Signed-off-by: Antonio Borneo <bor...@gm...>
Reviewed-on: https://review.openocd.org/c/openocd/+/6451
Tested-by: jenkins
Reviewed-by: Daniel Goehring <dgo...@os...>
Reviewed-by: Tarek BOCHKATI <tar...@gm...>
diff --git a/src/target/arm_adi_v5.c b/src/target/arm_adi_v5.c
index 66d084952..159c613a0 100644
--- a/src/target/arm_adi_v5.c
+++ b/src/target/arm_adi_v5.c
@@ -1135,6 +1135,8 @@ static const struct dap_part_nums {
{ ARM_ID, 0x470, "Cortex-M1 ROM", "(ROM Table)", },
{ ARM_ID, 0x471, "Cortex-M0 ROM", "(ROM Table)", },
{ ARM_ID, 0x490, "Cortex-A15 GIC", "(Generic Interrupt Controller)", },
+ { ARM_ID, 0x492, "Cortex-R52 GICD", "(Distributor)", },
+ { ARM_ID, 0x493, "Cortex-R52 GICR", "(Redistributor)", },
{ ARM_ID, 0x4a1, "Cortex-A53 ROM", "(v8 Memory Map ROM Table)", },
{ ARM_ID, 0x4a2, "Cortex-A57 ROM", "(ROM Table)", },
{ ARM_ID, 0x4a3, "Cortex-A53 ROM", "(v7 Memory Map ROM Table)", },
@@ -1143,6 +1145,7 @@ static const struct dap_part_nums {
{ ARM_ID, 0x4aa, "Cortex-A35 ROM", "(v8 Memory Map ROM Table)", },
{ ARM_ID, 0x4af, "Cortex-A15 ROM", "(ROM Table)", },
{ ARM_ID, 0x4b5, "Cortex-R5 ROM", "(ROM Table)", },
+ { ARM_ID, 0x4b8, "Cortex-R52 ROM", "(ROM Table)", },
{ ARM_ID, 0x4c0, "Cortex-M0+ ROM", "(ROM Table)", },
{ ARM_ID, 0x4c3, "Cortex-M3 ROM", "(ROM Table)", },
{ ARM_ID, 0x4c4, "Cortex-M4 ROM", "(ROM Table)", },
@@ -1188,6 +1191,7 @@ static const struct dap_part_nums {
{ ARM_ID, 0x9a9, "Cortex-M7 TPIU", "(Trace Port Interface Unit)", },
{ ARM_ID, 0x9ae, "Cortex-A17 PMU", "(Performance Monitor Unit)", },
{ ARM_ID, 0x9af, "Cortex-A15 PMU", "(Performance Monitor Unit)", },
+ { ARM_ID, 0x9b6, "Cortex-R52 PMU/CTI/ETM", "(Performance Monitor Unit/Cross Trigger/ETM)", },
{ ARM_ID, 0x9b7, "Cortex-R7 PMU", "(Performance Monitor Unit)", },
{ ARM_ID, 0x9d3, "Cortex-A53 PMU", "(Performance Monitor Unit)", },
{ ARM_ID, 0x9d7, "Cortex-A57 PMU", "(Performance Monitor Unit)", },
@@ -1220,6 +1224,7 @@ static const struct dap_part_nums {
{ ARM_ID, 0xd07, "Cortex-A57 Debug", "(Debug Unit)", },
{ ARM_ID, 0xd08, "Cortex-A72 Debug", "(Debug Unit)", },
{ ARM_ID, 0xd0b, "Cortex-A76 Debug", "(Debug Unit)", },
+ { ARM_ID, 0xd13, "Cortex-R52 Debug", "(Debug Unit)", },
{ 0x017, 0x9af, "MSP432 ROM", "(ROM Table)" },
{ 0x01f, 0xcd0, "Atmel CPU with DSU", "(CPU)" },
{ 0x041, 0x1db, "XMC4500 ROM", "(ROM Table)" },
-----------------------------------------------------------------------
Summary of changes:
src/target/arm_adi_v5.c | 5 +++++
1 file changed, 5 insertions(+)
hooks/post-receive
--
Main OpenOCD repository
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|
From: OpenOCD-Gerrit <ope...@us...> - 2021-09-25 13:07:18
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".
The branch, master has been updated
via c55fbe190ba68b5fcc7b839c647f579479437293 (commit)
from 02b5fa51039a61ab3bebec7fea578ef58e36673f (commit)
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- Log -----------------------------------------------------------------
commit c55fbe190ba68b5fcc7b839c647f579479437293
Author: Antonio Borneo <bor...@gm...>
Date: Tue Aug 17 00:13:05 2021 +0200
arm_adi_v5: add arm SoC-600 part numbers
Extract new part numbers from ARM CoreSight System-on-Chip SoC-600
Technical Reference Manual Revision r4p1 and add them to the array
dap_partnums.
Change-Id: I88d8aa3c084f6e832b75032e75bfb6d377a08360
Signed-off-by: Antonio Borneo <bor...@gm...>
Reviewed-on: https://review.openocd.org/c/openocd/+/6450
Tested-by: jenkins
Reviewed-by: Daniel Goehring <dgo...@os...>
Reviewed-by: Tarek BOCHKATI <tar...@gm...>
diff --git a/src/target/arm_adi_v5.c b/src/target/arm_adi_v5.c
index 0d458e2b5..66d084952 100644
--- a/src/target/arm_adi_v5.c
+++ b/src/target/arm_adi_v5.c
@@ -1131,6 +1131,7 @@ static const struct dap_part_nums {
{ ARM_ID, 0x00c, "Cortex-M4 SCS", "(System Control Space)", },
{ ARM_ID, 0x00d, "CoreSight ETM11", "(Embedded Trace)", },
{ ARM_ID, 0x00e, "Cortex-M7 FPB", "(Flash Patch and Breakpoint)", },
+ { ARM_ID, 0x193, "SoC-600 TSGEN", "(Timestamp Generator)", },
{ ARM_ID, 0x470, "Cortex-M1 ROM", "(ROM Table)", },
{ ARM_ID, 0x471, "Cortex-M0 ROM", "(ROM Table)", },
{ ARM_ID, 0x490, "Cortex-A15 GIC", "(Generic Interrupt Controller)", },
@@ -1192,6 +1193,19 @@ static const struct dap_part_nums {
{ ARM_ID, 0x9d7, "Cortex-A57 PMU", "(Performance Monitor Unit)", },
{ ARM_ID, 0x9d8, "Cortex-A72 PMU", "(Performance Monitor Unit)", },
{ ARM_ID, 0x9da, "Cortex-A35 PMU/CTI/ETM", "(Performance Monitor Unit/Cross Trigger/ETM)", },
+ { ARM_ID, 0x9e2, "SoC-600 APB-AP", "(APB4 Memory Access Port)", },
+ { ARM_ID, 0x9e3, "SoC-600 AHB-AP", "(AHB5 Memory Access Port)", },
+ { ARM_ID, 0x9e4, "SoC-600 AXI-AP", "(AXI Memory Access Port)", },
+ { ARM_ID, 0x9e5, "SoC-600 APv1 Adapter", "(Access Port v1 Adapter)", },
+ { ARM_ID, 0x9e6, "SoC-600 JTAG-AP", "(JTAG Access Port)", },
+ { ARM_ID, 0x9e7, "SoC-600 TPIU", "(Trace Port Interface Unit)", },
+ { ARM_ID, 0x9e8, "SoC-600 TMC ETR/ETS", "(Embedded Trace Router/Streamer)", },
+ { ARM_ID, 0x9e9, "SoC-600 TMC ETB", "(Embedded Trace Buffer)", },
+ { ARM_ID, 0x9ea, "SoC-600 TMC ETF", "(Embedded Trace FIFO)", },
+ { ARM_ID, 0x9eb, "SoC-600 ATB Funnel", "(Trace Funnel)", },
+ { ARM_ID, 0x9ec, "SoC-600 ATB Replicator", "(Trace Replicator)", },
+ { ARM_ID, 0x9ed, "SoC-600 CTI", "(Cross Trigger)", },
+ { ARM_ID, 0x9ee, "SoC-600 CATU", "(Address Translation Unit)", },
{ ARM_ID, 0xc05, "Cortex-A5 Debug", "(Debug Unit)", },
{ ARM_ID, 0xc07, "Cortex-A7 Debug", "(Debug Unit)", },
{ ARM_ID, 0xc08, "Cortex-A8 Debug", "(Debug Unit)", },
-----------------------------------------------------------------------
Summary of changes:
src/target/arm_adi_v5.c | 14 ++++++++++++++
1 file changed, 14 insertions(+)
hooks/post-receive
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Main OpenOCD repository
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From: OpenOCD-Gerrit <ope...@us...> - 2021-09-25 13:06:28
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".
The branch, master has been updated
via 02b5fa51039a61ab3bebec7fea578ef58e36673f (commit)
from cf6909a57c4d5fe859476df8a60ab2d2ba4a96b0 (commit)
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- Log -----------------------------------------------------------------
commit 02b5fa51039a61ab3bebec7fea578ef58e36673f
Author: Antonio Borneo <bor...@gm...>
Date: Tue Aug 17 01:05:39 2021 +0200
arm_adi_v5: add helper to search for part number
Improve code readability and prepare to re-use the helper.
Change-Id: Iee5e01047c82be3dd86707f5c283f0b20cc4070d
Signed-off-by: Antonio Borneo <bor...@gm...>
Reviewed-on: https://review.openocd.org/c/openocd/+/6449
Tested-by: jenkins
Reviewed-by: Daniel Goehring <dgo...@os...>
Reviewed-by: Tarek BOCHKATI <tar...@gm...>
diff --git a/src/target/arm_adi_v5.c b/src/target/arm_adi_v5.c
index f9f4254e8..0d458e2b5 100644
--- a/src/target/arm_adi_v5.c
+++ b/src/target/arm_adi_v5.c
@@ -1115,12 +1115,12 @@ static int dap_read_part_id(struct adiv5_ap *ap, target_addr_t component_base, u
#define ANY_ID 0x1000
-static const struct {
+static const struct dap_part_nums {
uint16_t designer_id;
uint16_t part_num;
const char *type;
const char *full;
-} dap_partnums[] = {
+} dap_part_nums[] = {
{ ARM_ID, 0x000, "Cortex-M3 SCS", "(System Control Space)", },
{ ARM_ID, 0x001, "Cortex-M3 ITM", "(Instrumentation Trace Module)", },
{ ARM_ID, 0x002, "Cortex-M3 DWT", "(Data Watchpoint and Trace)", },
@@ -1227,6 +1227,22 @@ static const struct {
{ ANY_ID, 0x343, "TI DAPCTL", "", }, /* from OMAP3 memmap */
};
+static const struct dap_part_nums *pidr_to_part_num(unsigned int designer_id, unsigned int part_num)
+{
+ static const struct dap_part_nums unknown = {
+ .type = "Unrecognized",
+ .full = "",
+ };
+
+ for (unsigned int i = 0; i < ARRAY_SIZE(dap_part_nums); i++) {
+ if (dap_part_nums[i].designer_id != designer_id && dap_part_nums[i].designer_id != ANY_ID)
+ continue;
+ if (dap_part_nums[i].part_num == part_num)
+ return &dap_part_nums[i];
+ }
+ return &unknown;
+}
+
static int dap_devtype_display(struct command_invocation *cmd, uint32_t devtype)
{
const char *major = "Reserved", *subtype = "Reserved";
@@ -1408,41 +1424,24 @@ static int dap_rom_display(struct command_invocation *cmd,
command_print(cmd, "\t\tPeripheral ID 0x%010" PRIx64, pid);
- uint8_t class = (cid & ARM_CS_CIDR_CLASS_MASK) >> ARM_CS_CIDR_CLASS_SHIFT;
- uint16_t part_num = ARM_CS_PIDR_PART(pid);
- uint16_t designer_id = ARM_CS_PIDR_DESIGNER(pid);
+ const unsigned int class = (cid & ARM_CS_CIDR_CLASS_MASK) >> ARM_CS_CIDR_CLASS_SHIFT;
+ const unsigned int part_num = ARM_CS_PIDR_PART(pid);
+ unsigned int designer_id = ARM_CS_PIDR_DESIGNER(pid);
if (pid & ARM_CS_PIDR_JEDEC) {
/* JEP106 code */
- command_print(cmd, "\t\tDesigner is 0x%03" PRIx16 ", %s",
+ command_print(cmd, "\t\tDesigner is 0x%03x, %s",
designer_id, jep106_manufacturer(designer_id));
} else {
/* Legacy ASCII ID, clear invalid bits */
designer_id &= 0x7f;
- command_print(cmd, "\t\tDesigner ASCII code 0x%02" PRIx16 ", %s",
+ command_print(cmd, "\t\tDesigner ASCII code 0x%02x, %s",
designer_id, designer_id == 0x41 ? "ARM" : "<unknown>");
}
- /* default values to be overwritten upon finding a match */
- const char *type = "Unrecognized";
- const char *full = "";
-
- /* search dap_partnums[] array for a match */
- for (unsigned entry = 0; entry < ARRAY_SIZE(dap_partnums); entry++) {
-
- if ((dap_partnums[entry].designer_id != designer_id) && (dap_partnums[entry].designer_id != ANY_ID))
- continue;
-
- if (dap_partnums[entry].part_num != part_num)
- continue;
-
- type = dap_partnums[entry].type;
- full = dap_partnums[entry].full;
- break;
- }
-
- command_print(cmd, "\t\tPart is 0x%" PRIx16", %s %s", part_num, type, full);
- command_print(cmd, "\t\tComponent class is 0x%" PRIx8 ", %s", class, class_description[class]);
+ const struct dap_part_nums *partnum = pidr_to_part_num(designer_id, part_num);
+ command_print(cmd, "\t\tPart is 0x%03x, %s %s", part_num, partnum->type, partnum->full);
+ command_print(cmd, "\t\tComponent class is 0x%x, %s", class, class_description[class]);
if (class == ARM_CS_CLASS_0X1_ROM_TABLE) {
uint32_t memtype;
-----------------------------------------------------------------------
Summary of changes:
src/target/arm_adi_v5.c | 53 ++++++++++++++++++++++++-------------------------
1 file changed, 26 insertions(+), 27 deletions(-)
hooks/post-receive
--
Main OpenOCD repository
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From: OpenOCD-Gerrit <ope...@us...> - 2021-09-25 13:05:17
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".
The branch, master has been updated
via cf6909a57c4d5fe859476df8a60ab2d2ba4a96b0 (commit)
from ddbc13a6f22751aa40c8e6bd120e88dcb28257b0 (commit)
Those revisions listed above that are new to this repository have
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- Log -----------------------------------------------------------------
commit cf6909a57c4d5fe859476df8a60ab2d2ba4a96b0
Author: Kevin Burke <ke...@os...>
Date: Tue Aug 10 16:26:42 2021 +0200
arm_adi_v5: move in a separate function devtype decode/display
For readability, move in a separate function the decoding and the
display of devtype register.
The function will be reused with ADIv6.
Split from change https://review.openocd.org/6077/
Change-Id: I7a26a2c9759d5db5f9acfae5c169b90b3deb2f18
Signed-off-by: Kevin Burke <ke...@os...>
Signed-off-by: Daniel Goehring <dgo...@os...>
Signed-off-by: Antonio Borneo <bor...@gm...>
Reviewed-on: https://review.openocd.org/c/openocd/+/6448
Tested-by: jenkins
Reviewed-by: Tarek BOCHKATI <tar...@gm...>
diff --git a/src/target/arm_adi_v5.c b/src/target/arm_adi_v5.c
index 469cb10ca..f9f4254e8 100644
--- a/src/target/arm_adi_v5.c
+++ b/src/target/arm_adi_v5.c
@@ -1227,6 +1227,150 @@ static const struct {
{ ANY_ID, 0x343, "TI DAPCTL", "", }, /* from OMAP3 memmap */
};
+static int dap_devtype_display(struct command_invocation *cmd, uint32_t devtype)
+{
+ const char *major = "Reserved", *subtype = "Reserved";
+ const unsigned int minor = (devtype & ARM_CS_C9_DEVTYPE_SUB_MASK) >> ARM_CS_C9_DEVTYPE_SUB_SHIFT;
+ const unsigned int devtype_major = (devtype & ARM_CS_C9_DEVTYPE_MAJOR_MASK) >> ARM_CS_C9_DEVTYPE_MAJOR_SHIFT;
+ switch (devtype_major) {
+ case 0:
+ major = "Miscellaneous";
+ switch (minor) {
+ case 0:
+ subtype = "other";
+ break;
+ case 4:
+ subtype = "Validation component";
+ break;
+ }
+ break;
+ case 1:
+ major = "Trace Sink";
+ switch (minor) {
+ case 0:
+ subtype = "other";
+ break;
+ case 1:
+ subtype = "Port";
+ break;
+ case 2:
+ subtype = "Buffer";
+ break;
+ case 3:
+ subtype = "Router";
+ break;
+ }
+ break;
+ case 2:
+ major = "Trace Link";
+ switch (minor) {
+ case 0:
+ subtype = "other";
+ break;
+ case 1:
+ subtype = "Funnel, router";
+ break;
+ case 2:
+ subtype = "Filter";
+ break;
+ case 3:
+ subtype = "FIFO, buffer";
+ break;
+ }
+ break;
+ case 3:
+ major = "Trace Source";
+ switch (minor) {
+ case 0:
+ subtype = "other";
+ break;
+ case 1:
+ subtype = "Processor";
+ break;
+ case 2:
+ subtype = "DSP";
+ break;
+ case 3:
+ subtype = "Engine/Coprocessor";
+ break;
+ case 4:
+ subtype = "Bus";
+ break;
+ case 6:
+ subtype = "Software";
+ break;
+ }
+ break;
+ case 4:
+ major = "Debug Control";
+ switch (minor) {
+ case 0:
+ subtype = "other";
+ break;
+ case 1:
+ subtype = "Trigger Matrix";
+ break;
+ case 2:
+ subtype = "Debug Auth";
+ break;
+ case 3:
+ subtype = "Power Requestor";
+ break;
+ }
+ break;
+ case 5:
+ major = "Debug Logic";
+ switch (minor) {
+ case 0:
+ subtype = "other";
+ break;
+ case 1:
+ subtype = "Processor";
+ break;
+ case 2:
+ subtype = "DSP";
+ break;
+ case 3:
+ subtype = "Engine/Coprocessor";
+ break;
+ case 4:
+ subtype = "Bus";
+ break;
+ case 5:
+ subtype = "Memory";
+ break;
+ }
+ break;
+ case 6:
+ major = "Performance Monitor";
+ switch (minor) {
+ case 0:
+ subtype = "other";
+ break;
+ case 1:
+ subtype = "Processor";
+ break;
+ case 2:
+ subtype = "DSP";
+ break;
+ case 3:
+ subtype = "Engine/Coprocessor";
+ break;
+ case 4:
+ subtype = "Bus";
+ break;
+ case 5:
+ subtype = "Memory";
+ break;
+ }
+ break;
+ }
+ command_print(cmd, "\t\tType is 0x%02x, %s, %s",
+ devtype & ARM_CS_C9_DEVTYPE_MASK,
+ major, subtype);
+ return ERROR_OK;
+}
+
static int dap_rom_display(struct command_invocation *cmd,
struct adiv5_ap *ap, target_addr_t dbgbase, int depth)
{
@@ -1333,150 +1477,15 @@ static int dap_rom_display(struct command_invocation *cmd,
}
}
} else if (class == ARM_CS_CLASS_0X9_CS_COMPONENT) {
- const char *major = "Reserved", *subtype = "Reserved";
-
uint32_t devtype;
retval = mem_ap_read_atomic_u32(ap, base_addr + ARM_CS_C9_DEVTYPE, &devtype);
if (retval != ERROR_OK)
return retval;
- unsigned int minor = (devtype & ARM_CS_C9_DEVTYPE_SUB_MASK) >> ARM_CS_C9_DEVTYPE_SUB_SHIFT;
- unsigned int devtype_major = (devtype & ARM_CS_C9_DEVTYPE_MAJOR_MASK) >> ARM_CS_C9_DEVTYPE_MAJOR_SHIFT;
- switch (devtype_major) {
- case 0:
- major = "Miscellaneous";
- switch (minor) {
- case 0:
- subtype = "other";
- break;
- case 4:
- subtype = "Validation component";
- break;
- }
- break;
- case 1:
- major = "Trace Sink";
- switch (minor) {
- case 0:
- subtype = "other";
- break;
- case 1:
- subtype = "Port";
- break;
- case 2:
- subtype = "Buffer";
- break;
- case 3:
- subtype = "Router";
- break;
- }
- break;
- case 2:
- major = "Trace Link";
- switch (minor) {
- case 0:
- subtype = "other";
- break;
- case 1:
- subtype = "Funnel, router";
- break;
- case 2:
- subtype = "Filter";
- break;
- case 3:
- subtype = "FIFO, buffer";
- break;
- }
- break;
- case 3:
- major = "Trace Source";
- switch (minor) {
- case 0:
- subtype = "other";
- break;
- case 1:
- subtype = "Processor";
- break;
- case 2:
- subtype = "DSP";
- break;
- case 3:
- subtype = "Engine/Coprocessor";
- break;
- case 4:
- subtype = "Bus";
- break;
- case 6:
- subtype = "Software";
- break;
- }
- break;
- case 4:
- major = "Debug Control";
- switch (minor) {
- case 0:
- subtype = "other";
- break;
- case 1:
- subtype = "Trigger Matrix";
- break;
- case 2:
- subtype = "Debug Auth";
- break;
- case 3:
- subtype = "Power Requestor";
- break;
- }
- break;
- case 5:
- major = "Debug Logic";
- switch (minor) {
- case 0:
- subtype = "other";
- break;
- case 1:
- subtype = "Processor";
- break;
- case 2:
- subtype = "DSP";
- break;
- case 3:
- subtype = "Engine/Coprocessor";
- break;
- case 4:
- subtype = "Bus";
- break;
- case 5:
- subtype = "Memory";
- break;
- }
- break;
- case 6:
- major = "Performance Monitor";
- switch (minor) {
- case 0:
- subtype = "other";
- break;
- case 1:
- subtype = "Processor";
- break;
- case 2:
- subtype = "DSP";
- break;
- case 3:
- subtype = "Engine/Coprocessor";
- break;
- case 4:
- subtype = "Bus";
- break;
- case 5:
- subtype = "Memory";
- break;
- }
- break;
- }
- command_print(cmd, "\t\tType is 0x%02x, %s, %s",
- devtype & ARM_CS_C9_DEVTYPE_MASK,
- major, subtype);
+
+ retval = dap_devtype_display(cmd, devtype);
+ if (retval != ERROR_OK)
+ return retval;
+
/* REVISIT also show ARM_CS_C9_DEVID */
}
-----------------------------------------------------------------------
Summary of changes:
src/target/arm_adi_v5.c | 289 +++++++++++++++++++++++++-----------------------
1 file changed, 149 insertions(+), 140 deletions(-)
hooks/post-receive
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Main OpenOCD repository
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From: OpenOCD-Gerrit <ope...@us...> - 2021-09-25 13:03:20
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".
The branch, master has been updated
via ddbc13a6f22751aa40c8e6bd120e88dcb28257b0 (commit)
from 06d2e430db6933b01b15246e9a4b9392afd8ddbc (commit)
Those revisions listed above that are new to this repository have
not appeared on any other notification email; so we list those
revisions in full, below.
- Log -----------------------------------------------------------------
commit ddbc13a6f22751aa40c8e6bd120e88dcb28257b0
Author: Antonio Borneo <bor...@gm...>
Date: Tue Aug 10 18:09:28 2021 +0200
arm_adi_v5: simplify handling of AP type
The complete AP type should include 'class' and 'manufacturer'.
Cleanup the definition of AP type from AP_REG_IDR register.
Include the check of 'class', together with manufacturer and type.
Add the new MEM-AP from ARM IHI0074C.
Change-Id: Ic8db7c040108ba237b54f73b1abe24b8b853699b
Signed-off-by: Antonio Borneo <bor...@gm...>
Reviewed-on: https://review.openocd.org/c/openocd/+/6447
Tested-by: jenkins
Reviewed-by: Tarek BOCHKATI <tar...@gm...>
Reviewed-by: Daniel Goehring <dgo...@os...>
diff --git a/src/target/arm_adi_v5.c b/src/target/arm_adi_v5.c
index 3ac89719b..469cb10ca 100644
--- a/src/target/arm_adi_v5.c
+++ b/src/target/arm_adi_v5.c
@@ -893,6 +893,30 @@ static const char *class_description[16] = {
[0xF] = "CoreLink, PrimeCell or System component",
};
+static const struct {
+ enum ap_type type;
+ const char *description;
+} ap_types[] = {
+ { AP_TYPE_JTAG_AP, "JTAG-AP" },
+ { AP_TYPE_COM_AP, "COM-AP" },
+ { AP_TYPE_AHB3_AP, "MEM-AP AHB3" },
+ { AP_TYPE_APB_AP, "MEM-AP APB2 or APB3" },
+ { AP_TYPE_AXI_AP, "MEM-AP AXI3 or AXI4" },
+ { AP_TYPE_AHB5_AP, "MEM-AP AHB5" },
+ { AP_TYPE_APB4_AP, "MEM-AP APB4" },
+ { AP_TYPE_AXI5_AP, "MEM-AP AXI5" },
+ { AP_TYPE_AHB5H_AP, "MEM-AP AHB5 with enhanced HPROT" },
+};
+
+static const char *ap_type_to_description(enum ap_type type)
+{
+ for (unsigned int i = 0; i < ARRAY_SIZE(ap_types); i++)
+ if (type == ap_types[i].type)
+ return ap_types[i].description;
+
+ return "Unknown";
+}
+
/*
* This function checks the ID for each access port to find the requested Access Port type
*/
@@ -912,29 +936,12 @@ int dap_find_ap(struct adiv5_dap *dap, enum ap_type type_to_find, struct adiv5_a
retval = dap_run(dap);
- /* IDR bits:
- * 31-28 : Revision
- * 27-24 : JEDEC bank (0x4 for ARM)
- * 23-17 : JEDEC code (0x3B for ARM)
- * 16-13 : Class (0b1000=Mem-AP)
- * 12-8 : Reserved
- * 7-4 : AP Variant (non-zero for JTAG-AP)
- * 3-0 : AP Type (0=JTAG-AP 1=AHB-AP 2=APB-AP 4=AXI-AP)
- */
-
/* Reading register for a non-existent AP should not cause an error,
* but just to be sure, try to continue searching if an error does happen.
*/
- if ((retval == ERROR_OK) && /* Register read success */
- ((id_val & IDR_JEP106) == IDR_JEP106_ARM) && /* Jedec codes match */
- ((id_val & IDR_TYPE) == type_to_find)) { /* type matches*/
-
+ if (retval == ERROR_OK && (id_val & AP_TYPE_MASK) == type_to_find) {
LOG_DEBUG("Found %s at AP index: %d (IDR=0x%08" PRIX32 ")",
- (type_to_find == AP_TYPE_AHB3_AP) ? "AHB3-AP" :
- (type_to_find == AP_TYPE_AHB5_AP) ? "AHB5-AP" :
- (type_to_find == AP_TYPE_APB_AP) ? "APB-AP" :
- (type_to_find == AP_TYPE_AXI_AP) ? "AXI-AP" :
- (type_to_find == AP_TYPE_JTAG_AP) ? "JTAG-AP" : "Unknown",
+ ap_type_to_description(type_to_find),
ap_num, id_val);
*ap_out = &dap->ap[ap_num];
@@ -942,12 +949,7 @@ int dap_find_ap(struct adiv5_dap *dap, enum ap_type type_to_find, struct adiv5_a
}
}
- LOG_DEBUG("No %s found",
- (type_to_find == AP_TYPE_AHB3_AP) ? "AHB3-AP" :
- (type_to_find == AP_TYPE_AHB5_AP) ? "AHB5-AP" :
- (type_to_find == AP_TYPE_APB_AP) ? "APB-AP" :
- (type_to_find == AP_TYPE_AXI_AP) ? "AXI-AP" :
- (type_to_find == AP_TYPE_JTAG_AP) ? "JTAG-AP" : "Unknown");
+ LOG_DEBUG("No %s found", ap_type_to_description(type_to_find));
return ERROR_FAIL;
}
@@ -1113,8 +1115,6 @@ static int dap_read_part_id(struct adiv5_ap *ap, target_addr_t component_base, u
#define ANY_ID 0x1000
-#define ARM_ID 0x23B
-
static const struct {
uint16_t designer_id;
uint16_t part_num;
@@ -1490,7 +1490,6 @@ int dap_info_command(struct command_invocation *cmd,
uint32_t apid;
target_addr_t dbgbase;
target_addr_t dbgaddr;
- uint8_t mem_ap;
/* Now we read ROM table ID registers, ref. ARM IHI 0029B sec */
retval = dap_get_debugbase(ap, &dbgbase, &apid);
@@ -1503,32 +1502,14 @@ int dap_info_command(struct command_invocation *cmd,
return ERROR_FAIL;
}
- switch (apid & (IDR_JEP106 | IDR_TYPE)) {
- case IDR_JEP106_ARM | AP_TYPE_JTAG_AP:
- command_print(cmd, "\tType is JTAG-AP");
- break;
- case IDR_JEP106_ARM | AP_TYPE_AHB3_AP:
- command_print(cmd, "\tType is MEM-AP AHB3");
- break;
- case IDR_JEP106_ARM | AP_TYPE_AHB5_AP:
- command_print(cmd, "\tType is MEM-AP AHB5");
- break;
- case IDR_JEP106_ARM | AP_TYPE_APB_AP:
- command_print(cmd, "\tType is MEM-AP APB");
- break;
- case IDR_JEP106_ARM | AP_TYPE_AXI_AP:
- command_print(cmd, "\tType is MEM-AP AXI");
- break;
- default:
- command_print(cmd, "\tUnknown AP type");
- break;
- }
+ command_print(cmd, "\tType is %s", ap_type_to_description(apid & AP_TYPE_MASK));
/* NOTE: a MEM-AP may have a single CoreSight component that's
* not a ROM table ... or have no such components at all.
*/
- mem_ap = (apid & IDR_CLASS) == AP_CLASS_MEM_AP;
- if (mem_ap) {
+ const unsigned int class = (apid & AP_REG_IDR_CLASS_MASK) >> AP_REG_IDR_CLASS_SHIFT;
+
+ if (class == AP_REG_IDR_CLASS_MEM_AP) {
if (is_64bit_ap(ap))
dbgaddr = 0xFFFFFFFFFFFFFFFFull;
else
diff --git a/src/target/arm_adi_v5.h b/src/target/arm_adi_v5.h
index 73ceea03f..0e1b95f50 100644
--- a/src/target/arm_adi_v5.h
+++ b/src/target/arm_adi_v5.h
@@ -33,6 +33,9 @@
#include "arm_jtag.h"
#include "helper/bits.h"
+/* JEP106 ID for ARM */
+#define ARM_ID 0x23B
+
/* three-bit ACK values for SWD access (sent LSB first) */
#define SWD_ACK_OK 0x1
#define SWD_ACK_WAIT 0x2
@@ -157,13 +160,28 @@
#define MEM_AP_REG_CFG_INVALID 0xFFFFFFF8
/* Fields of the MEM-AP's IDR register */
-#define IDR_REV (0xFUL << 28)
-#define IDR_JEP106 (0x7FFUL << 17)
-#define IDR_CLASS (0xFUL << 13)
-#define IDR_VARIANT (0xFUL << 4)
-#define IDR_TYPE (0xFUL << 0)
-
-#define IDR_JEP106_ARM 0x04760000
+#define AP_REG_IDR_REVISION_MASK (0xF0000000)
+#define AP_REG_IDR_REVISION_SHIFT (28)
+#define AP_REG_IDR_DESIGNER_MASK (0x0FFE0000)
+#define AP_REG_IDR_DESIGNER_SHIFT (17)
+#define AP_REG_IDR_CLASS_MASK (0x0001E000)
+#define AP_REG_IDR_CLASS_SHIFT (13)
+#define AP_REG_IDR_VARIANT_MASK (0x000000F0)
+#define AP_REG_IDR_VARIANT_SHIFT (4)
+#define AP_REG_IDR_TYPE_MASK (0x0000000F)
+#define AP_REG_IDR_TYPE_SHIFT (0)
+
+#define AP_REG_IDR_CLASS_NONE (0x0)
+#define AP_REG_IDR_CLASS_COM (0x1)
+#define AP_REG_IDR_CLASS_MEM_AP (0x8)
+
+#define AP_REG_IDR_VALUE(d, c, t) (\
+ (((d) << AP_REG_IDR_DESIGNER_SHIFT) & AP_REG_IDR_DESIGNER_MASK) | \
+ (((c) << AP_REG_IDR_CLASS_SHIFT) & AP_REG_IDR_CLASS_MASK) | \
+ (((t) << AP_REG_IDR_TYPE_SHIFT) & AP_REG_IDR_TYPE_MASK) \
+)
+
+#define AP_TYPE_MASK (AP_REG_IDR_DESIGNER_MASK | AP_REG_IDR_CLASS_MASK | AP_REG_IDR_TYPE_MASK)
/* FIXME: not SWD specific; should be renamed, e.g. adiv5_special_seq */
enum swd_special_seq {
@@ -349,23 +367,19 @@ struct dap_ops {
void (*quit)(struct adiv5_dap *dap);
};
-/*
- * Access Port classes
- */
-enum ap_class {
- AP_CLASS_NONE = 0x00000, /* No class defined */
- AP_CLASS_MEM_AP = 0x10000, /* MEM-AP */
-};
-
/*
* Access Port types
*/
enum ap_type {
- AP_TYPE_JTAG_AP = 0x0, /* JTAG-AP - JTAG master for controlling other JTAG devices */
- AP_TYPE_AHB3_AP = 0x1, /* AHB3 Memory-AP */
- AP_TYPE_APB_AP = 0x2, /* APB Memory-AP */
- AP_TYPE_AXI_AP = 0x4, /* AXI Memory-AP */
- AP_TYPE_AHB5_AP = 0x5, /* AHB5 Memory-AP. */
+ AP_TYPE_JTAG_AP = AP_REG_IDR_VALUE(ARM_ID, AP_REG_IDR_CLASS_NONE, 0), /* JTAG-AP */
+ AP_TYPE_COM_AP = AP_REG_IDR_VALUE(ARM_ID, AP_REG_IDR_CLASS_COM, 0), /* COM-AP */
+ AP_TYPE_AHB3_AP = AP_REG_IDR_VALUE(ARM_ID, AP_REG_IDR_CLASS_MEM_AP, 1), /* AHB3 Memory-AP */
+ AP_TYPE_APB_AP = AP_REG_IDR_VALUE(ARM_ID, AP_REG_IDR_CLASS_MEM_AP, 2), /* APB2 or APB3 Memory-AP */
+ AP_TYPE_AXI_AP = AP_REG_IDR_VALUE(ARM_ID, AP_REG_IDR_CLASS_MEM_AP, 4), /* AXI3 or AXI4 Memory-AP */
+ AP_TYPE_AHB5_AP = AP_REG_IDR_VALUE(ARM_ID, AP_REG_IDR_CLASS_MEM_AP, 5), /* AHB5 Memory-AP */
+ AP_TYPE_APB4_AP = AP_REG_IDR_VALUE(ARM_ID, AP_REG_IDR_CLASS_MEM_AP, 6), /* APB4 Memory-AP */
+ AP_TYPE_AXI5_AP = AP_REG_IDR_VALUE(ARM_ID, AP_REG_IDR_CLASS_MEM_AP, 7), /* AXI5 Memory-AP */
+ AP_TYPE_AHB5H_AP = AP_REG_IDR_VALUE(ARM_ID, AP_REG_IDR_CLASS_MEM_AP, 8), /* AHB5 with enhanced HPROT Memory-AP */
};
/* Check the ap->cfg_reg Long Address field (bit 1)
-----------------------------------------------------------------------
Summary of changes:
src/target/arm_adi_v5.c | 81 +++++++++++++++++++------------------------------
src/target/arm_adi_v5.h | 54 +++++++++++++++++++++------------
2 files changed, 65 insertions(+), 70 deletions(-)
hooks/post-receive
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Main OpenOCD repository
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