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From: OpenOCD-Gerrit <ope...@us...> - 2021-11-13 10:50:26
|
This is an automated email from the git hooks/post-receive script. It was generated because a ref change was pushed to the repository containing the project "Main OpenOCD repository". The branch, master has been updated via 679dcd0b52f6bafe848eb48e714764d37a101bb5 (commit) from ba7d0bc49148d89c27b8208120de9783a89058a7 (commit) Those revisions listed above that are new to this repository have not appeared on any other notification email; so we list those revisions in full, below. - Log ----------------------------------------------------------------- commit 679dcd0b52f6bafe848eb48e714764d37a101bb5 Author: Antonio Borneo <bor...@gm...> Date: Thu Oct 7 14:30:43 2021 +0200 jtag: move prototype of adapter init/quit and speed to adapter.h After moved the code, align the include files. Change-Id: I514a3020648816810d69f76c2ec4f6e52a1c57ab Signed-off-by: Antonio Borneo <bor...@gm...> Reviewed-on: https://review.openocd.org/c/openocd/+/6643 Tested-by: jenkins Reviewed-by: Tarek BOCHKATI <tar...@gm...> diff --git a/src/jtag/adapter.h b/src/jtag/adapter.h index fe9a6318c..b2405e984 100644 --- a/src/jtag/adapter.h +++ b/src/jtag/adapter.h @@ -10,6 +10,14 @@ #include <stddef.h> #include <stdint.h> +struct command_context; + +/** Initialize debug adapter upon startup. */ +int adapter_init(struct command_context *cmd_ctx); + +/** Shutdown the debug adapter upon program exit. */ +int adapter_quit(void); + /** @returns true if adapter has been initialized */ bool is_adapter_initialized(void); @@ -19,4 +27,28 @@ const char *adapter_usb_get_location(void); /** @returns true if USB location string is "<dev_bus>-<port_path[0]>[.<port_path[1]>[...]]" */ bool adapter_usb_location_equal(uint8_t dev_bus, uint8_t *port_path, size_t path_len); +/** @returns The current JTAG speed setting. */ +int jtag_get_speed(int *speed); + +/** + * Given a @a speed setting, use the interface @c speed_div callback to + * adjust the setting. + * @param speed The speed setting to convert back to readable KHz. + * @returns ERROR_OK if the interface has not been initialized or on success; + * otherwise, the error code produced by the @c speed_div callback. + */ +int jtag_get_speed_readable(int *speed); + +/** Attempt to configure the interface for the specified KHz. */ +int jtag_config_khz(unsigned khz); + +/** + * Attempt to enable RTCK/RCLK. If that fails, fallback to the + * specified frequency. + */ +int jtag_config_rclk(unsigned fallback_speed_khz); + +/** Retrieves the clock speed of the JTAG interface in KHz. */ +unsigned jtag_get_speed_khz(void); + #endif /* OPENOCD_JTAG_ADAPTER_H */ diff --git a/src/jtag/drivers/amt_jtagaccel.c b/src/jtag/drivers/amt_jtagaccel.c index e9ff8dfa1..b73c66161 100644 --- a/src/jtag/drivers/amt_jtagaccel.c +++ b/src/jtag/drivers/amt_jtagaccel.c @@ -20,6 +20,7 @@ #include "config.h" #endif +#include <jtag/adapter.h> #include <jtag/interface.h> #if PARPORT_USE_PPDEV == 1 diff --git a/src/jtag/drivers/cmsis_dap.c b/src/jtag/drivers/cmsis_dap.c index 9bd4cb73a..289ffcd92 100644 --- a/src/jtag/drivers/cmsis_dap.c +++ b/src/jtag/drivers/cmsis_dap.c @@ -40,6 +40,7 @@ #include <transport/transport.h> #include "helper/replacements.h" +#include <jtag/adapter.h> #include <jtag/swd.h> #include <jtag/interface.h> #include <jtag/commands.h> diff --git a/src/jtag/drivers/parport.c b/src/jtag/drivers/parport.c index d50d306d3..714cb1daa 100644 --- a/src/jtag/drivers/parport.c +++ b/src/jtag/drivers/parport.c @@ -23,6 +23,7 @@ #include "config.h" #endif +#include <jtag/adapter.h> #include <jtag/interface.h> #include "bitbang.h" diff --git a/src/jtag/drivers/vsllink.c b/src/jtag/drivers/vsllink.c index 7325f6abc..5d771443c 100644 --- a/src/jtag/drivers/vsllink.c +++ b/src/jtag/drivers/vsllink.c @@ -24,6 +24,7 @@ #include "config.h" #endif +#include <jtag/adapter.h> #include <jtag/interface.h> #include <jtag/commands.h> #include <jtag/swd.h> diff --git a/src/jtag/jtag.h b/src/jtag/jtag.h index feb4614fa..d7d7d977c 100644 --- a/src/jtag/jtag.h +++ b/src/jtag/jtag.h @@ -217,31 +217,6 @@ int jtag_unregister_event_callback(jtag_event_handler_t f, void *x); int jtag_call_event_callbacks(enum jtag_event event); - -/** @returns The current JTAG speed setting. */ -int jtag_get_speed(int *speed); - -/** - * Given a @a speed setting, use the interface @c speed_div callback to - * adjust the setting. - * @param speed The speed setting to convert back to readable KHz. - * @returns ERROR_OK if the interface has not been initialized or on success; - * otherwise, the error code produced by the @c speed_div callback. - */ -int jtag_get_speed_readable(int *speed); - -/** Attempt to configure the interface for the specified KHz. */ -int jtag_config_khz(unsigned khz); - -/** - * Attempt to enable RTCK/RCLK. If that fails, fallback to the - * specified frequency. - */ -int jtag_config_rclk(unsigned fallback_speed_khz); - -/** Retrieves the clock speed of the JTAG interface in KHz. */ -unsigned jtag_get_speed_khz(void); - enum reset_types { RESET_NONE = 0x0, RESET_HAS_TRST = 0x1, @@ -285,12 +260,6 @@ void jtag_set_verify_capture_ir(bool enable); /** @returns True if IR scan verification will be performed. */ bool jtag_will_verify_capture_ir(void); -/** Initialize debug adapter upon startup. */ -int adapter_init(struct command_context *cmd_ctx); - -/** Shutdown the debug adapter upon program exit. */ -int adapter_quit(void); - /** Set ms to sleep after jtag_execute_queue() flushes queue. Debug purposes. */ void jtag_set_flush_queue_sleep(int ms); diff --git a/src/jtag/tcl.c b/src/jtag/tcl.c index 6d3fee43c..8bf4ea9c1 100644 --- a/src/jtag/tcl.c +++ b/src/jtag/tcl.c @@ -30,6 +30,7 @@ #include "config.h" #endif +#include "adapter.h" #include "jtag.h" #include "swd.h" #include "minidriver.h" diff --git a/src/openocd.c b/src/openocd.c index 12bd52c58..e8c526bfd 100644 --- a/src/openocd.c +++ b/src/openocd.c @@ -27,6 +27,7 @@ #endif #include "openocd.h" +#include <jtag/adapter.h> #include <jtag/driver.h> #include <jtag/jtag.h> #include <transport/transport.h> diff --git a/src/target/mips32_pracc.c b/src/target/mips32_pracc.c index 923cdf877..ebe02e66d 100644 --- a/src/target/mips32_pracc.c +++ b/src/target/mips32_pracc.c @@ -70,6 +70,7 @@ #include <helper/align.h> #include <helper/time_support.h> +#include <jtag/adapter.h> #include "mips32.h" #include "mips32_pracc.h" diff --git a/src/target/mips64_pracc.c b/src/target/mips64_pracc.c index bb2af228d..d68521d63 100644 --- a/src/target/mips64_pracc.c +++ b/src/target/mips64_pracc.c @@ -21,6 +21,7 @@ #include "mips64_pracc.h" #include <helper/time_support.h> +#include <jtag/adapter.h> #define STACK_DEPTH 32 ----------------------------------------------------------------------- Summary of changes: src/jtag/adapter.h | 32 ++++++++++++++++++++++++++++++++ src/jtag/drivers/amt_jtagaccel.c | 1 + src/jtag/drivers/cmsis_dap.c | 1 + src/jtag/drivers/parport.c | 1 + src/jtag/drivers/vsllink.c | 1 + src/jtag/jtag.h | 31 ------------------------------- src/jtag/tcl.c | 1 + src/openocd.c | 1 + src/target/mips32_pracc.c | 1 + src/target/mips64_pracc.c | 1 + 10 files changed, 40 insertions(+), 31 deletions(-) hooks/post-receive -- Main OpenOCD repository |
From: OpenOCD-Gerrit <ope...@us...> - 2021-11-13 10:49:41
|
This is an automated email from the git hooks/post-receive script. It was generated because a ref change was pushed to the repository containing the project "Main OpenOCD repository". The branch, master has been updated via ba7d0bc49148d89c27b8208120de9783a89058a7 (commit) from b8ec1d4e7ddcb4cc3993a2d31225fd17527f267d (commit) Those revisions listed above that are new to this repository have not appeared on any other notification email; so we list those revisions in full, below. - Log ----------------------------------------------------------------- commit ba7d0bc49148d89c27b8208120de9783a89058a7 Author: Antonio Borneo <bor...@gm...> Date: Thu Oct 7 12:21:18 2021 +0200 jtag/adapter: move config vars in struct adapter_config Move the static variables used to configure the adapter in the struct adapter_config. Change-Id: I1639e2bd39d0cbb12c71dfa347025558879d8b1d Signed-off-by: Antonio Borneo <bor...@gm...> Reviewed-on: https://review.openocd.org/c/openocd/+/6642 Tested-by: jenkins Reviewed-by: Tarek BOCHKATI <tar...@gm...> diff --git a/src/jtag/adapter.c b/src/jtag/adapter.c index bdb131cf0..991338be8 100644 --- a/src/jtag/adapter.c +++ b/src/jtag/adapter.c @@ -30,24 +30,26 @@ struct adapter_driver *adapter_driver; const char * const jtag_only[] = { "jtag", NULL }; +enum adapter_clk_mode { + CLOCK_MODE_UNSELECTED = 0, + CLOCK_MODE_KHZ, + CLOCK_MODE_RCLK +}; + /** * Adapter configuration */ static struct { + bool adapter_initialized; char *usb_location; + enum adapter_clk_mode clock_mode; + int speed_khz; + int rclk_fallback_speed_khz; } adapter_config; -/* speed in kHz*/ -static int speed_khz; -/* speed to fallback to when RCLK is requested but not supported */ -static int rclk_fallback_speed_khz; -static enum {CLOCK_MODE_UNSELECTED, CLOCK_MODE_KHZ, CLOCK_MODE_RCLK} clock_mode; - -static bool adapter_initialized; - bool is_adapter_initialized(void) { - return adapter_initialized; + return adapter_config.adapter_initialized; } /** @@ -70,14 +72,14 @@ int adapter_init(struct command_context *cmd_ctx) retval = adapter_driver->init(); if (retval != ERROR_OK) return retval; - adapter_initialized = true; + adapter_config.adapter_initialized = true; if (!adapter_driver->speed) { LOG_INFO("This adapter doesn't support configurable speed"); return ERROR_OK; } - if (clock_mode == CLOCK_MODE_UNSELECTED) { + if (adapter_config.clock_mode == CLOCK_MODE_UNSELECTED) { LOG_ERROR("An adapter speed is not selected in the init script." " Insert a call to \"adapter speed\" or \"jtag_rclk\" to proceed."); return ERROR_JTAG_INIT_FAILED; @@ -97,8 +99,8 @@ int adapter_init(struct command_context *cmd_ctx) LOG_INFO("adapter-specific clock speed value %d", jtag_speed_var); else if (actual_khz) { /* Adaptive clocking -- JTAG-specific */ - if ((clock_mode == CLOCK_MODE_RCLK) - || ((clock_mode == CLOCK_MODE_KHZ) && !requested_khz)) { + if ((adapter_config.clock_mode == CLOCK_MODE_RCLK) + || ((adapter_config.clock_mode == CLOCK_MODE_KHZ) && !requested_khz)) { LOG_INFO("RCLK (adaptive clock speed) not supported - fallback to %d kHz" , actual_khz); } else @@ -130,13 +132,13 @@ int adapter_quit(void) unsigned jtag_get_speed_khz(void) { - return speed_khz; + return adapter_config.speed_khz; } static int adapter_khz_to_speed(unsigned khz, int *speed) { LOG_DEBUG("convert khz to interface specific speed value"); - speed_khz = khz; + adapter_config.speed_khz = khz; if (!is_adapter_initialized()) return ERROR_OK; LOG_DEBUG("have interface set up"); @@ -172,7 +174,7 @@ static int jtag_set_speed(int speed) int jtag_config_khz(unsigned khz) { LOG_DEBUG("handle jtag khz"); - clock_mode = CLOCK_MODE_KHZ; + adapter_config.clock_mode = CLOCK_MODE_KHZ; int speed = 0; int retval = adapter_khz_to_speed(khz, &speed); return (retval != ERROR_OK) ? retval : jtag_set_speed(speed); @@ -181,8 +183,8 @@ int jtag_config_khz(unsigned khz) int jtag_config_rclk(unsigned fallback_speed_khz) { LOG_DEBUG("handle jtag rclk"); - clock_mode = CLOCK_MODE_RCLK; - rclk_fallback_speed_khz = fallback_speed_khz; + adapter_config.clock_mode = CLOCK_MODE_RCLK; + adapter_config.rclk_fallback_speed_khz = fallback_speed_khz; int speed = 0; int retval = jtag_rclk_to_speed(fallback_speed_khz, &speed); return (retval != ERROR_OK) ? retval : jtag_set_speed(speed); @@ -190,12 +192,12 @@ int jtag_config_rclk(unsigned fallback_speed_khz) int jtag_get_speed(int *speed) { - switch (clock_mode) { + switch (adapter_config.clock_mode) { case CLOCK_MODE_KHZ: adapter_khz_to_speed(jtag_get_speed_khz(), speed); break; case CLOCK_MODE_RCLK: - jtag_rclk_to_speed(rclk_fallback_speed_khz, speed); + jtag_rclk_to_speed(adapter_config.rclk_fallback_speed_khz, speed); break; default: LOG_ERROR("BUG: unknown jtag clock mode"); ----------------------------------------------------------------------- Summary of changes: src/jtag/adapter.c | 42 ++++++++++++++++++++++-------------------- 1 file changed, 22 insertions(+), 20 deletions(-) hooks/post-receive -- Main OpenOCD repository |
From: OpenOCD-Gerrit <ope...@us...> - 2021-11-13 10:47:51
|
This is an automated email from the git hooks/post-receive script. It was generated because a ref change was pushed to the repository containing the project "Main OpenOCD repository". The branch, master has been updated via b8ec1d4e7ddcb4cc3993a2d31225fd17527f267d (commit) from 4cb3c9fae2a6a6cb5cf2c664179edace22abf5f6 (commit) Those revisions listed above that are new to this repository have not appeared on any other notification email; so we list those revisions in full, below. - Log ----------------------------------------------------------------- commit b8ec1d4e7ddcb4cc3993a2d31225fd17527f267d Author: Antonio Borneo <bor...@gm...> Date: Thu Oct 7 12:13:28 2021 +0200 jtag: move adapter init/quit and speed to adapter.c The configuration code for adapter parameters is spread around. Move in adapter.c the code that handles the configuration of adapter speed. For convenience, move also the functions adapter_init() and adapter_quit(), that anyway have no reason to be in file core.c To simplify the review, the code moved is not modified. It will be cleaned and adapted in the following changes. Change-Id: I2b38975a0cd2e74d3d2de6c56ea17818ff225fd8 Signed-off-by: Antonio Borneo <bor...@gm...> Reviewed-on: https://review.openocd.org/c/openocd/+/6641 Tested-by: jenkins Reviewed-by: Tarek BOCHKATI <tar...@gm...> diff --git a/src/jtag/adapter.c b/src/jtag/adapter.c index 47a1d794b..bdb131cf0 100644 --- a/src/jtag/adapter.c +++ b/src/jtag/adapter.c @@ -37,6 +37,188 @@ static struct { char *usb_location; } adapter_config; +/* speed in kHz*/ +static int speed_khz; +/* speed to fallback to when RCLK is requested but not supported */ +static int rclk_fallback_speed_khz; +static enum {CLOCK_MODE_UNSELECTED, CLOCK_MODE_KHZ, CLOCK_MODE_RCLK} clock_mode; + +static bool adapter_initialized; + +bool is_adapter_initialized(void) +{ + return adapter_initialized; +} + +/** + * Do low-level setup like initializing registers, output signals, + * and clocking. + */ +int adapter_init(struct command_context *cmd_ctx) +{ + if (is_adapter_initialized()) + return ERROR_OK; + + if (!adapter_driver) { + /* nothing was previously specified by "adapter driver" command */ + LOG_ERROR("Debug Adapter has to be specified, " + "see \"adapter driver\" command"); + return ERROR_JTAG_INVALID_INTERFACE; + } + + int retval; + retval = adapter_driver->init(); + if (retval != ERROR_OK) + return retval; + adapter_initialized = true; + + if (!adapter_driver->speed) { + LOG_INFO("This adapter doesn't support configurable speed"); + return ERROR_OK; + } + + if (clock_mode == CLOCK_MODE_UNSELECTED) { + LOG_ERROR("An adapter speed is not selected in the init script." + " Insert a call to \"adapter speed\" or \"jtag_rclk\" to proceed."); + return ERROR_JTAG_INIT_FAILED; + } + + int requested_khz = jtag_get_speed_khz(); + int actual_khz = requested_khz; + int jtag_speed_var = 0; + retval = jtag_get_speed(&jtag_speed_var); + if (retval != ERROR_OK) + return retval; + retval = adapter_driver->speed(jtag_speed_var); + if (retval != ERROR_OK) + return retval; + retval = jtag_get_speed_readable(&actual_khz); + if (retval != ERROR_OK) + LOG_INFO("adapter-specific clock speed value %d", jtag_speed_var); + else if (actual_khz) { + /* Adaptive clocking -- JTAG-specific */ + if ((clock_mode == CLOCK_MODE_RCLK) + || ((clock_mode == CLOCK_MODE_KHZ) && !requested_khz)) { + LOG_INFO("RCLK (adaptive clock speed) not supported - fallback to %d kHz" + , actual_khz); + } else + LOG_INFO("clock speed %d kHz", actual_khz); + } else + LOG_INFO("RCLK (adaptive clock speed)"); + + return ERROR_OK; +} + +int adapter_quit(void) +{ + if (is_adapter_initialized() && adapter_driver->quit) { + /* close the JTAG interface */ + int result = adapter_driver->quit(); + if (result != ERROR_OK) + LOG_ERROR("failed: %d", result); + } + + struct jtag_tap *t = jtag_all_taps(); + while (t) { + struct jtag_tap *n = t->next_tap; + jtag_tap_free(t); + t = n; + } + + return ERROR_OK; +} + +unsigned jtag_get_speed_khz(void) +{ + return speed_khz; +} + +static int adapter_khz_to_speed(unsigned khz, int *speed) +{ + LOG_DEBUG("convert khz to interface specific speed value"); + speed_khz = khz; + if (!is_adapter_initialized()) + return ERROR_OK; + LOG_DEBUG("have interface set up"); + if (!adapter_driver->khz) { + LOG_ERROR("Translation from khz to jtag_speed not implemented"); + return ERROR_FAIL; + } + int speed_div1; + int retval = adapter_driver->khz(jtag_get_speed_khz(), &speed_div1); + if (retval != ERROR_OK) + return retval; + *speed = speed_div1; + return ERROR_OK; +} + +static int jtag_rclk_to_speed(unsigned fallback_speed_khz, int *speed) +{ + int retval = adapter_khz_to_speed(0, speed); + if ((retval != ERROR_OK) && fallback_speed_khz) { + LOG_DEBUG("trying fallback speed..."); + retval = adapter_khz_to_speed(fallback_speed_khz, speed); + } + return retval; +} + +static int jtag_set_speed(int speed) +{ + /* this command can be called during CONFIG, + * in which case jtag isn't initialized */ + return is_adapter_initialized() ? adapter_driver->speed(speed) : ERROR_OK; +} + +int jtag_config_khz(unsigned khz) +{ + LOG_DEBUG("handle jtag khz"); + clock_mode = CLOCK_MODE_KHZ; + int speed = 0; + int retval = adapter_khz_to_speed(khz, &speed); + return (retval != ERROR_OK) ? retval : jtag_set_speed(speed); +} + +int jtag_config_rclk(unsigned fallback_speed_khz) +{ + LOG_DEBUG("handle jtag rclk"); + clock_mode = CLOCK_MODE_RCLK; + rclk_fallback_speed_khz = fallback_speed_khz; + int speed = 0; + int retval = jtag_rclk_to_speed(fallback_speed_khz, &speed); + return (retval != ERROR_OK) ? retval : jtag_set_speed(speed); +} + +int jtag_get_speed(int *speed) +{ + switch (clock_mode) { + case CLOCK_MODE_KHZ: + adapter_khz_to_speed(jtag_get_speed_khz(), speed); + break; + case CLOCK_MODE_RCLK: + jtag_rclk_to_speed(rclk_fallback_speed_khz, speed); + break; + default: + LOG_ERROR("BUG: unknown jtag clock mode"); + return ERROR_FAIL; + } + return ERROR_OK; +} + +int jtag_get_speed_readable(int *khz) +{ + int jtag_speed_var = 0; + int retval = jtag_get_speed(&jtag_speed_var); + if (retval != ERROR_OK) + return retval; + if (!is_adapter_initialized()) + return ERROR_OK; + if (!adapter_driver->speed_div) { + LOG_ERROR("Translation from jtag_speed to khz not implemented"); + return ERROR_FAIL; + } + return adapter_driver->speed_div(jtag_speed_var, khz); +} + /* * 1 char: bus * 2 * 7 chars: max 7 ports diff --git a/src/jtag/adapter.h b/src/jtag/adapter.h index 854ee9ce6..fe9a6318c 100644 --- a/src/jtag/adapter.h +++ b/src/jtag/adapter.h @@ -10,6 +10,9 @@ #include <stddef.h> #include <stdint.h> +/** @returns true if adapter has been initialized */ +bool is_adapter_initialized(void); + /** @returns USB location string set with command 'adapter usb location' */ const char *adapter_usb_get_location(void); diff --git a/src/jtag/core.c b/src/jtag/core.c index f0c000a24..29ab6cc1c 100644 --- a/src/jtag/core.c +++ b/src/jtag/core.c @@ -30,6 +30,7 @@ #include "config.h" #endif +#include "adapter.h" #include "jtag.h" #include "swd.h" #include "interface.h" @@ -123,21 +124,8 @@ struct jtag_event_callback { /* callbacks to inform high-level handlers about JTAG state changes */ static struct jtag_event_callback *jtag_event_callbacks; -/* speed in kHz*/ -static int speed_khz; -/* speed to fallback to when RCLK is requested but not supported */ -static int rclk_fallback_speed_khz; -static enum {CLOCK_MODE_UNSELECTED, CLOCK_MODE_KHZ, CLOCK_MODE_RCLK} clock_mode; - extern struct adapter_driver *adapter_driver; -static bool adapter_initialized; - -static bool is_adapter_initialized(void) -{ - return adapter_initialized; -} - void jtag_set_flush_queue_sleep(int ms) { jtag_flush_queue_sleep = ms; @@ -1506,65 +1494,6 @@ void jtag_tap_free(struct jtag_tap *tap) free(tap); } -/** - * Do low-level setup like initializing registers, output signals, - * and clocking. - */ -int adapter_init(struct command_context *cmd_ctx) -{ - if (is_adapter_initialized()) - return ERROR_OK; - - if (!adapter_driver) { - /* nothing was previously specified by "adapter driver" command */ - LOG_ERROR("Debug Adapter has to be specified, " - "see \"adapter driver\" command"); - return ERROR_JTAG_INVALID_INTERFACE; - } - - int retval; - retval = adapter_driver->init(); - if (retval != ERROR_OK) - return retval; - adapter_initialized = true; - - if (!adapter_driver->speed) { - LOG_INFO("This adapter doesn't support configurable speed"); - return ERROR_OK; - } - - if (clock_mode == CLOCK_MODE_UNSELECTED) { - LOG_ERROR("An adapter speed is not selected in the init script." - " Insert a call to \"adapter speed\" or \"jtag_rclk\" to proceed."); - return ERROR_JTAG_INIT_FAILED; - } - - int requested_khz = jtag_get_speed_khz(); - int actual_khz = requested_khz; - int jtag_speed_var = 0; - retval = jtag_get_speed(&jtag_speed_var); - if (retval != ERROR_OK) - return retval; - retval = adapter_driver->speed(jtag_speed_var); - if (retval != ERROR_OK) - return retval; - retval = jtag_get_speed_readable(&actual_khz); - if (retval != ERROR_OK) - LOG_INFO("adapter-specific clock speed value %d", jtag_speed_var); - else if (actual_khz) { - /* Adaptive clocking -- JTAG-specific */ - if ((clock_mode == CLOCK_MODE_RCLK) - || ((clock_mode == CLOCK_MODE_KHZ) && !requested_khz)) { - LOG_INFO("RCLK (adaptive clock speed) not supported - fallback to %d kHz" - , actual_khz); - } else - LOG_INFO("clock speed %d kHz", actual_khz); - } else - LOG_INFO("RCLK (adaptive clock speed)"); - - return ERROR_OK; -} - int jtag_init_inner(struct command_context *cmd_ctx) { struct jtag_tap *tap; @@ -1645,25 +1574,6 @@ int jtag_init_inner(struct command_context *cmd_ctx) return ERROR_OK; } -int adapter_quit(void) -{ - if (is_adapter_initialized() && adapter_driver->quit) { - /* close the JTAG interface */ - int result = adapter_driver->quit(); - if (result != ERROR_OK) - LOG_ERROR("failed: %d", result); - } - - struct jtag_tap *t = jtag_all_taps(); - while (t) { - struct jtag_tap *n = t->next_tap; - jtag_tap_free(t); - t = n; - } - - return ERROR_OK; -} - int swd_init_reset(struct command_context *cmd_ctx) { int retval, retval1; @@ -1771,97 +1681,6 @@ int jtag_init(struct command_context *cmd_ctx) return ERROR_OK; } -unsigned jtag_get_speed_khz(void) -{ - return speed_khz; -} - -static int adapter_khz_to_speed(unsigned khz, int *speed) -{ - LOG_DEBUG("convert khz to interface specific speed value"); - speed_khz = khz; - if (!is_adapter_initialized()) - return ERROR_OK; - LOG_DEBUG("have interface set up"); - if (!adapter_driver->khz) { - LOG_ERROR("Translation from khz to jtag_speed not implemented"); - return ERROR_FAIL; - } - int speed_div1; - int retval = adapter_driver->khz(jtag_get_speed_khz(), &speed_div1); - if (retval != ERROR_OK) - return retval; - *speed = speed_div1; - return ERROR_OK; -} - -static int jtag_rclk_to_speed(unsigned fallback_speed_khz, int *speed) -{ - int retval = adapter_khz_to_speed(0, speed); - if ((retval != ERROR_OK) && fallback_speed_khz) { - LOG_DEBUG("trying fallback speed..."); - retval = adapter_khz_to_speed(fallback_speed_khz, speed); - } - return retval; -} - -static int jtag_set_speed(int speed) -{ - /* this command can be called during CONFIG, - * in which case jtag isn't initialized */ - return is_adapter_initialized() ? adapter_driver->speed(speed) : ERROR_OK; -} - -int jtag_config_khz(unsigned khz) -{ - LOG_DEBUG("handle jtag khz"); - clock_mode = CLOCK_MODE_KHZ; - int speed = 0; - int retval = adapter_khz_to_speed(khz, &speed); - return (retval != ERROR_OK) ? retval : jtag_set_speed(speed); -} - -int jtag_config_rclk(unsigned fallback_speed_khz) -{ - LOG_DEBUG("handle jtag rclk"); - clock_mode = CLOCK_MODE_RCLK; - rclk_fallback_speed_khz = fallback_speed_khz; - int speed = 0; - int retval = jtag_rclk_to_speed(fallback_speed_khz, &speed); - return (retval != ERROR_OK) ? retval : jtag_set_speed(speed); -} - -int jtag_get_speed(int *speed) -{ - switch (clock_mode) { - case CLOCK_MODE_KHZ: - adapter_khz_to_speed(jtag_get_speed_khz(), speed); - break; - case CLOCK_MODE_RCLK: - jtag_rclk_to_speed(rclk_fallback_speed_khz, speed); - break; - default: - LOG_ERROR("BUG: unknown jtag clock mode"); - return ERROR_FAIL; - } - return ERROR_OK; -} - -int jtag_get_speed_readable(int *khz) -{ - int jtag_speed_var = 0; - int retval = jtag_get_speed(&jtag_speed_var); - if (retval != ERROR_OK) - return retval; - if (!is_adapter_initialized()) - return ERROR_OK; - if (!adapter_driver->speed_div) { - LOG_ERROR("Translation from jtag_speed to khz not implemented"); - return ERROR_FAIL; - } - return adapter_driver->speed_div(jtag_speed_var, khz); -} - void jtag_set_verify(bool enable) { jtag_verify = enable; ----------------------------------------------------------------------- Summary of changes: src/jtag/adapter.c | 182 ++++++++++++++++++++++++++++++++++++++++++++++++++++ src/jtag/adapter.h | 3 + src/jtag/core.c | 183 +---------------------------------------------------- 3 files changed, 186 insertions(+), 182 deletions(-) hooks/post-receive -- Main OpenOCD repository |
From: OpenOCD-Gerrit <ope...@us...> - 2021-11-13 10:47:36
|
This is an automated email from the git hooks/post-receive script. It was generated because a ref change was pushed to the repository containing the project "Main OpenOCD repository". The branch, master has been updated via 4cb3c9fae2a6a6cb5cf2c664179edace22abf5f6 (commit) from a9d0386411d1e372bf4d2187ff7b843bb5e9bfc6 (commit) Those revisions listed above that are new to this repository have not appeared on any other notification email; so we list those revisions in full, below. - Log ----------------------------------------------------------------- commit 4cb3c9fae2a6a6cb5cf2c664179edace22abf5f6 Author: Antonio Borneo <bor...@gm...> Date: Wed Oct 6 23:17:30 2021 +0200 jtag/adapter: move 'usb location' code in adapter.c The configuration code for adapter parameters is spread around. Add a struct in adapter.c aimed at containing all the adapter's configuration data. Move in adapter.c the code related to configuring 'usb location' and the copyright tag. Add adapter.h to export the functions. While there: - rework the copyright and the SPDX tag; - rename the 'usb location' functions; - remove the JTAG_SRC variable in Makefile.am. Change-Id: I4fe0d32991a8a30e315807180688035ae9ee01ce Signed-off-by: Antonio Borneo <bor...@gm...> Reviewed-on: https://review.openocd.org/c/openocd/+/6640 Tested-by: jenkins Reviewed-by: Tarek BOCHKATI <tar...@gm...> diff --git a/src/jtag/Makefile.am b/src/jtag/Makefile.am index 4ed5e7aa0..cbdfb2054 100644 --- a/src/jtag/Makefile.am +++ b/src/jtag/Makefile.am @@ -1,6 +1,5 @@ noinst_LTLIBRARIES += %D%/libjtag.la -JTAG_SRCS = %D%/commands.c %C%_libjtag_la_LIBADD = if HLADAPTER @@ -18,6 +17,8 @@ include %D%/drivers/Makefile.am %C%_libjtag_la_SOURCES = \ %D%/adapter.c \ + %D%/adapter.h \ + %D%/commands.c \ %D%/core.c \ %D%/interface.c \ %D%/interfaces.c \ @@ -31,7 +32,6 @@ include %D%/drivers/Makefile.am %D%/jtag.h \ %D%/swd.h \ %D%/swim.h \ - %D%/tcl.h \ - $(JTAG_SRCS) + %D%/tcl.h STARTUP_TCL_SRCS += %D%/startup.tcl diff --git a/src/jtag/adapter.c b/src/jtag/adapter.c index 80d5ab048..47a1d794b 100644 --- a/src/jtag/adapter.c +++ b/src/jtag/adapter.c @@ -1,41 +1,22 @@ -/*************************************************************************** - * Copyright (C) 2005 by Dominic Rath * - * Dom...@gm... * - * * - * Copyright (C) 2007-2010 Ãyvind Harboe * - * oyv...@zy... * - * * - * Copyright (C) 2009 SoftPLC Corporation * - * http://softplc.com * - * di...@so... * - * * - * Copyright (C) 2009 Zachary T Welch * - * zw...@su... * - * * - * This program is free software; you can redistribute it and/or modify * - * it under the terms of the GNU General Public License as published by * - * the Free Software Foundation; either version 2 of the License, or * - * (at your option) any later version. * - * * - * This program is distributed in the hope that it will be useful, * - * but WITHOUT ANY WARRANTY; without even the implied warranty of * - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * - * GNU General Public License for more details. * - * * - * You should have received a copy of the GNU General Public License * - * along with this program. If not, see <http://www.gnu.org/licenses/>. * - ***************************************************************************/ +/* SPDX-License-Identifier: GPL-2.0-or-later */ +/* + * Copyright (C) 2005 by Dominic Rath <Dom...@gm...> + * Copyright (C) 2007-2010 Ãyvind Harboe <oyv...@zy...> + * Copyright (C) 2009 SoftPLC Corporation, http://softplc.com, Dick Hollenbeck <di...@so...> + * Copyright (C) 2009 Zachary T Welch <zw...@su...> + * Copyright (C) 2018 Pengutronix, Oleksij Rempel <ke...@pe...> + */ #ifdef HAVE_CONFIG_H #include "config.h" #endif +#include "adapter.h" #include "jtag.h" #include "minidriver.h" #include "interface.h" #include "interfaces.h" #include <transport/transport.h> -#include <jtag/drivers/jtag_usb_common.h> #ifdef HAVE_STRINGS_H #include <strings.h> @@ -49,6 +30,88 @@ struct adapter_driver *adapter_driver; const char * const jtag_only[] = { "jtag", NULL }; +/** + * Adapter configuration + */ +static struct { + char *usb_location; +} adapter_config; + +/* + * 1 char: bus + * 2 * 7 chars: max 7 ports + * 1 char: test for overflow + * ------ + * 16 chars + */ +#define USB_MAX_LOCATION_LENGTH 16 + +#ifdef HAVE_LIBUSB_GET_PORT_NUMBERS +static void adapter_usb_set_location(const char *location) +{ + if (strnlen(location, USB_MAX_LOCATION_LENGTH) == USB_MAX_LOCATION_LENGTH) + LOG_WARNING("usb location string is too long!!"); + + free(adapter_config.usb_location); + + adapter_config.usb_location = strndup(location, USB_MAX_LOCATION_LENGTH); +} +#endif /* HAVE_LIBUSB_GET_PORT_NUMBERS */ + +const char *adapter_usb_get_location(void) +{ + return adapter_config.usb_location; +} + +bool adapter_usb_location_equal(uint8_t dev_bus, uint8_t *port_path, size_t path_len) +{ + size_t path_step, string_length; + char *ptr, *loc; + bool equal = false; + + if (!adapter_usb_get_location()) + return equal; + + /* strtok need non const char */ + loc = strndup(adapter_usb_get_location(), USB_MAX_LOCATION_LENGTH); + string_length = strnlen(loc, USB_MAX_LOCATION_LENGTH); + + ptr = strtok(loc, "-"); + if (!ptr) { + LOG_WARNING("no '-' in usb path\n"); + goto done; + } + + string_length -= strnlen(ptr, string_length); + /* check bus mismatch */ + if (atoi(ptr) != dev_bus) + goto done; + + path_step = 0; + while (path_step < path_len) { + ptr = strtok(NULL, "."); + + /* no more tokens in path */ + if (!ptr) + break; + + /* path mismatch at some step */ + if (path_step < path_len && atoi(ptr) != port_path[path_step]) + break; + + path_step++; + string_length -= strnlen(ptr, string_length) + 1; + }; + + /* walked the full path, all elements match */ + if (path_step == path_len && !string_length) + equal = true; + +done: + free(loc); + return equal; +} + static int jim_adapter_name(Jim_Interp *interp, int argc, Jim_Obj * const *argv) { struct jim_getopt_info goi; @@ -501,9 +564,9 @@ COMMAND_HANDLER(handle_adapter_reset_de_assert) COMMAND_HANDLER(handle_usb_location_command) { if (CMD_ARGC == 1) - jtag_usb_set_location(CMD_ARGV[0]); + adapter_usb_set_location(CMD_ARGV[0]); - command_print(CMD, "adapter usb location: %s", jtag_usb_get_location()); + command_print(CMD, "adapter usb location: %s", adapter_usb_get_location()); return ERROR_OK; } diff --git a/src/jtag/adapter.h b/src/jtag/adapter.h new file mode 100644 index 000000000..854ee9ce6 --- /dev/null +++ b/src/jtag/adapter.h @@ -0,0 +1,19 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ +/* + * Copyright (c) 2018 Pengutronix, Oleksij Rempel <ke...@pe...> + */ + +#ifndef OPENOCD_JTAG_ADAPTER_H +#define OPENOCD_JTAG_ADAPTER_H + +#include <stdbool.h> +#include <stddef.h> +#include <stdint.h> + +/** @returns USB location string set with command 'adapter usb location' */ +const char *adapter_usb_get_location(void); + +/** @returns true if USB location string is "<dev_bus>-<port_path[0]>[.<port_path[1]>[...]]" */ +bool adapter_usb_location_equal(uint8_t dev_bus, uint8_t *port_path, size_t path_len); + +#endif /* OPENOCD_JTAG_ADAPTER_H */ diff --git a/src/jtag/drivers/Makefile.am b/src/jtag/drivers/Makefile.am index da60f366e..c2161523d 100644 --- a/src/jtag/drivers/Makefile.am +++ b/src/jtag/drivers/Makefile.am @@ -19,7 +19,6 @@ DRIVERFILES = # Standard Driver: common files DRIVERFILES += %D%/driver.c -DRIVERFILES += %D%/jtag_usb_common.c if USE_LIBUSB1 DRIVERFILES += %D%/libusb_helper.c @@ -187,7 +186,6 @@ endif DRIVERHEADERS = \ %D%/bitbang.h \ %D%/bitq.h \ - %D%/jtag_usb_common.h \ %D%/libftdi_helper.h \ %D%/libusb_helper.h \ %D%/cmsis_dap.h \ diff --git a/src/jtag/drivers/ftdi.c b/src/jtag/drivers/ftdi.c index 82298c23d..5e7eae073 100644 --- a/src/jtag/drivers/ftdi.c +++ b/src/jtag/drivers/ftdi.c @@ -69,7 +69,7 @@ #endif /* project specific includes */ -#include <jtag/drivers/jtag_usb_common.h> +#include <jtag/adapter.h> #include <jtag/interface.h> #include <jtag/swd.h> #include <transport/transport.h> @@ -672,7 +672,7 @@ static int ftdi_initialize(void) for (int i = 0; ftdi_vid[i] || ftdi_pid[i]; i++) { mpsse_ctx = mpsse_open(&ftdi_vid[i], &ftdi_pid[i], ftdi_device_desc, - ftdi_serial, jtag_usb_get_location(), ftdi_channel); + ftdi_serial, adapter_usb_get_location(), ftdi_channel); if (mpsse_ctx) break; } diff --git a/src/jtag/drivers/jlink.c b/src/jtag/drivers/jlink.c index 53ae1dfae..12ac05fa6 100644 --- a/src/jtag/drivers/jlink.c +++ b/src/jtag/drivers/jlink.c @@ -38,7 +38,7 @@ #include <jtag/interface.h> #include <jtag/swd.h> #include <jtag/commands.h> -#include <jtag/drivers/jtag_usb_common.h> +#include <jtag/adapter.h> #include <helper/replacements.h> #include <target/cortex_m.h> @@ -547,7 +547,7 @@ static bool jlink_usb_location_equal(struct jaylink_device *dev) return false; } - equal = jtag_usb_location_equal(bus, ports, num_ports); + equal = adapter_usb_location_equal(bus, ports, num_ports); free(ports); return equal; @@ -573,7 +573,7 @@ static int jlink_open_device(uint32_t ifaces, bool *found_device) return ERROR_JTAG_INIT_FAILED; } - use_usb_location = !!jtag_usb_get_location(); + use_usb_location = !!adapter_usb_get_location(); if (!use_serial_number && !use_usb_address && !use_usb_location && num_devices > 1) { LOG_ERROR("Multiple devices found, specify the desired device"); diff --git a/src/jtag/drivers/jtag_usb_common.c b/src/jtag/drivers/jtag_usb_common.c deleted file mode 100644 index 94cd7e74d..000000000 --- a/src/jtag/drivers/jtag_usb_common.c +++ /dev/null @@ -1,82 +0,0 @@ -/* - * SPDX-License-Identifier: GPL-2.0+ - * Copyright (c) 2018 Pengutronix, Oleksij Rempel <ke...@pe...> - */ - -#include <helper/log.h> -#include <string.h> - -#include "jtag_usb_common.h" - -static char *jtag_usb_location; -/* - * 1 char: bus - * 2 * 7 chars: max 7 ports - * 1 char: test for overflow - * ------ - * 16 chars - */ -#define JTAG_USB_MAX_LOCATION_LENGTH 16 - -void jtag_usb_set_location(const char *location) -{ - if (strnlen(location, JTAG_USB_MAX_LOCATION_LENGTH) == - JTAG_USB_MAX_LOCATION_LENGTH) - LOG_WARNING("usb location string is too long!!\n"); - - free(jtag_usb_location); - - jtag_usb_location = strndup(location, JTAG_USB_MAX_LOCATION_LENGTH); -} - -const char *jtag_usb_get_location(void) -{ - return jtag_usb_location; -} - -bool jtag_usb_location_equal(uint8_t dev_bus, uint8_t *port_path, - size_t path_len) -{ - size_t path_step, string_length; - char *ptr, *loc; - bool equal = false; - - /* strtok need non const char */ - loc = strndup(jtag_usb_get_location(), JTAG_USB_MAX_LOCATION_LENGTH); - string_length = strnlen(loc, JTAG_USB_MAX_LOCATION_LENGTH); - - ptr = strtok(loc, "-"); - if (!ptr) { - LOG_WARNING("no '-' in usb path\n"); - goto done; - } - - string_length -= strnlen(ptr, string_length); - /* check bus mismatch */ - if (atoi(ptr) != dev_bus) - goto done; - - path_step = 0; - while (path_step < path_len) { - ptr = strtok(NULL, "."); - - /* no more tokens in path */ - if (!ptr) - break; - - /* path mismatch at some step */ - if (path_step < path_len && atoi(ptr) != port_path[path_step]) - break; - - path_step++; - string_length -= strnlen(ptr, string_length) + 1; - }; - - /* walked the full path, all elements match */ - if (path_step == path_len && !string_length) - equal = true; - -done: - free(loc); - return equal; -} diff --git a/src/jtag/drivers/jtag_usb_common.h b/src/jtag/drivers/jtag_usb_common.h deleted file mode 100644 index c4c28cc91..000000000 --- a/src/jtag/drivers/jtag_usb_common.h +++ /dev/null @@ -1,17 +0,0 @@ -/* - * SPDX-License-Identifier: GPL-2.0+ - * Copyright (c) 2018 Pengutronix, Oleksij Rempel <ke...@pe...> - */ - -#ifndef OPENOCD_JTAG_USB_COMMON_H -#define OPENOCD_JTAG_USB_COMMON_H - -#include <helper/replacements.h> -#include <helper/types.h> - -void jtag_usb_set_location(const char *location); -const char *jtag_usb_get_location(void); -bool jtag_usb_location_equal(uint8_t dev_bus, uint8_t *port_path, - size_t path_len); - -#endif /* OPENOCD_JTAG_USB_COMMON_H */ diff --git a/src/jtag/drivers/libusb_helper.c b/src/jtag/drivers/libusb_helper.c index 3308d8742..b8f1124e3 100644 --- a/src/jtag/drivers/libusb_helper.c +++ b/src/jtag/drivers/libusb_helper.c @@ -20,8 +20,11 @@ #ifdef HAVE_CONFIG_H #include "config.h" #endif + +#include <string.h> + #include <helper/log.h> -#include <jtag/drivers/jtag_usb_common.h> +#include <jtag/adapter.h> #include "libusb_helper.h" /* @@ -85,7 +88,7 @@ static bool jtag_libusb_location_equal(struct libusb_device *device) } dev_bus = libusb_get_bus_number(device); - return jtag_usb_location_equal(dev_bus, port_path, path_len); + return adapter_usb_location_equal(dev_bus, port_path, path_len); } #else /* HAVE_LIBUSB_GET_PORT_NUMBERS */ static bool jtag_libusb_location_equal(struct libusb_device *device) @@ -177,7 +180,7 @@ int jtag_libusb_open(const uint16_t vids[], const uint16_t pids[], if (!jtag_libusb_match_ids(&dev_desc, vids, pids)) continue; - if (jtag_usb_get_location() && !jtag_libusb_location_equal(devs[idx])) + if (adapter_usb_get_location() && !jtag_libusb_location_equal(devs[idx])) continue; err_code = libusb_open(devs[idx], &libusb_handle); ----------------------------------------------------------------------- Summary of changes: src/jtag/Makefile.am | 6 +- src/jtag/adapter.c | 123 ++++++++++++++++++++++++++++--------- src/jtag/adapter.h | 19 ++++++ src/jtag/drivers/Makefile.am | 2 - src/jtag/drivers/ftdi.c | 4 +- src/jtag/drivers/jlink.c | 6 +- src/jtag/drivers/jtag_usb_common.c | 82 ------------------------- src/jtag/drivers/jtag_usb_common.h | 17 ----- src/jtag/drivers/libusb_helper.c | 9 ++- 9 files changed, 126 insertions(+), 142 deletions(-) create mode 100644 src/jtag/adapter.h delete mode 100644 src/jtag/drivers/jtag_usb_common.c delete mode 100644 src/jtag/drivers/jtag_usb_common.h hooks/post-receive -- Main OpenOCD repository |
From: OpenOCD-Gerrit <ope...@us...> - 2021-11-13 10:47:20
|
This is an automated email from the git hooks/post-receive script. It was generated because a ref change was pushed to the repository containing the project "Main OpenOCD repository". The branch, master has been updated via a9d0386411d1e372bf4d2187ff7b843bb5e9bfc6 (commit) from be57b0ab847e8246b354ca9203024737cdec403b (commit) Those revisions listed above that are new to this repository have not appeared on any other notification email; so we list those revisions in full, below. - Log ----------------------------------------------------------------- commit a9d0386411d1e372bf4d2187ff7b843bb5e9bfc6 Author: Antonio Borneo <bor...@gm...> Date: Thu Oct 7 10:37:06 2021 +0200 jtag/core: get rid of variable 'jtag' The variable 'jtag' is set to 'adapter_driver' during adapter initialization and is used: - to check if adapter has been initialized; - as local copy of adapter_driver. Introduce a static flag to check if the adapter has been already initialized and a convenience test function. Use the test function and the original value of adapter_driver in the code and drop the variable 'jtag'. Change-Id: I1b1c54d3b36d7b60390985d787c8449432788141 Signed-off-by: Antonio Borneo <bor...@gm...> Reviewed-on: https://review.openocd.org/c/openocd/+/6639 Tested-by: jenkins Reviewed-by: Tarek BOCHKATI <tar...@gm...> diff --git a/src/jtag/core.c b/src/jtag/core.c index 2de5fda47..f0c000a24 100644 --- a/src/jtag/core.c +++ b/src/jtag/core.c @@ -129,11 +129,15 @@ static int speed_khz; static int rclk_fallback_speed_khz; static enum {CLOCK_MODE_UNSELECTED, CLOCK_MODE_KHZ, CLOCK_MODE_RCLK} clock_mode; -/* FIXME: change name to this variable, it is not anymore JTAG only */ -static struct adapter_driver *jtag; - extern struct adapter_driver *adapter_driver; +static bool adapter_initialized; + +static bool is_adapter_initialized(void) +{ + return adapter_initialized; +} + void jtag_set_flush_queue_sleep(int ms) { jtag_flush_queue_sleep = ms; @@ -505,7 +509,7 @@ int jtag_add_tms_seq(unsigned nbits, const uint8_t *seq, enum tap_state state) { int retval; - if (!(jtag->jtag_ops->supported & DEBUG_CAP_TMS_SEQ)) + if (!(adapter_driver->jtag_ops->supported & DEBUG_CAP_TMS_SEQ)) return ERROR_JTAG_NOT_IMPLEMENTED; jtag_checks(); @@ -627,7 +631,7 @@ static int adapter_system_reset(int req_srst) /* Maybe change SRST signal state */ if (jtag_srst != req_srst) { - retval = jtag->reset(0, req_srst); + retval = adapter_driver->reset(0, req_srst); if (retval != ERROR_OK) { LOG_ERROR("SRST error"); return ERROR_FAIL; @@ -764,7 +768,7 @@ void jtag_add_reset(int req_tlr_or_trst, int req_srst) int new_srst = 0; int new_trst = 0; - if (!jtag->reset) { + if (!adapter_driver->reset) { legacy_jtag_add_reset(req_tlr_or_trst, req_srst); return; } @@ -813,7 +817,7 @@ void jtag_add_reset(int req_tlr_or_trst, int req_srst) /* guarantee jtag queue empty before changing reset status */ jtag_execute_queue(); - retval = jtag->reset(new_trst, new_srst); + retval = adapter_driver->reset(new_trst, new_srst); if (retval != ERROR_OK) { jtag_set_error(retval); LOG_ERROR("TRST/SRST error"); @@ -933,7 +937,7 @@ void jtag_check_value_mask(struct scan_field *field, uint8_t *value, uint8_t *ma int default_interface_jtag_execute_queue(void) { - if (!jtag) { + if (!is_adapter_initialized()) { LOG_ERROR("No JTAG interface configured yet. " "Issue 'init' command in startup scripts " "before communicating with targets."); @@ -949,11 +953,11 @@ int default_interface_jtag_execute_queue(void) * The fix can be applied immediately after next release (v0.11.0 ?) */ LOG_ERROR("JTAG API jtag_execute_queue() called on non JTAG interface"); - if (!jtag->jtag_ops || !jtag->jtag_ops->execute_queue) + if (!adapter_driver->jtag_ops || !adapter_driver->jtag_ops->execute_queue) return ERROR_OK; } - int result = jtag->jtag_ops->execute_queue(); + int result = adapter_driver->jtag_ops->execute_queue(); struct jtag_command *cmd = jtag_command_queue; while (debug_level >= LOG_LVL_DEBUG_IO && cmd) { @@ -1508,7 +1512,7 @@ void jtag_tap_free(struct jtag_tap *tap) */ int adapter_init(struct command_context *cmd_ctx) { - if (jtag) + if (is_adapter_initialized()) return ERROR_OK; if (!adapter_driver) { @@ -1522,9 +1526,9 @@ int adapter_init(struct command_context *cmd_ctx) retval = adapter_driver->init(); if (retval != ERROR_OK) return retval; - jtag = adapter_driver; + adapter_initialized = true; - if (!jtag->speed) { + if (!adapter_driver->speed) { LOG_INFO("This adapter doesn't support configurable speed"); return ERROR_OK; } @@ -1541,7 +1545,7 @@ int adapter_init(struct command_context *cmd_ctx) retval = jtag_get_speed(&jtag_speed_var); if (retval != ERROR_OK) return retval; - retval = jtag->speed(jtag_speed_var); + retval = adapter_driver->speed(jtag_speed_var); if (retval != ERROR_OK) return retval; retval = jtag_get_speed_readable(&actual_khz); @@ -1643,9 +1647,9 @@ int jtag_init_inner(struct command_context *cmd_ctx) int adapter_quit(void) { - if (jtag && jtag->quit) { + if (is_adapter_initialized() && adapter_driver->quit) { /* close the JTAG interface */ - int result = jtag->quit(); + int result = adapter_driver->quit(); if (result != ERROR_OK) LOG_ERROR("failed: %d", result); } @@ -1776,15 +1780,15 @@ static int adapter_khz_to_speed(unsigned khz, int *speed) { LOG_DEBUG("convert khz to interface specific speed value"); speed_khz = khz; - if (!jtag) + if (!is_adapter_initialized()) return ERROR_OK; LOG_DEBUG("have interface set up"); - if (!jtag->khz) { + if (!adapter_driver->khz) { LOG_ERROR("Translation from khz to jtag_speed not implemented"); return ERROR_FAIL; } int speed_div1; - int retval = jtag->khz(jtag_get_speed_khz(), &speed_div1); + int retval = adapter_driver->khz(jtag_get_speed_khz(), &speed_div1); if (retval != ERROR_OK) return retval; *speed = speed_div1; @@ -1805,7 +1809,7 @@ static int jtag_set_speed(int speed) { /* this command can be called during CONFIG, * in which case jtag isn't initialized */ - return jtag ? jtag->speed(speed) : ERROR_OK; + return is_adapter_initialized() ? adapter_driver->speed(speed) : ERROR_OK; } int jtag_config_khz(unsigned khz) @@ -1849,13 +1853,13 @@ int jtag_get_speed_readable(int *khz) int retval = jtag_get_speed(&jtag_speed_var); if (retval != ERROR_OK) return retval; - if (!jtag) + if (!is_adapter_initialized()) return ERROR_OK; - if (!jtag->speed_div) { + if (!adapter_driver->speed_div) { LOG_ERROR("Translation from jtag_speed to khz not implemented"); return ERROR_FAIL; } - return jtag->speed_div(jtag_speed_var, khz); + return adapter_driver->speed_div(jtag_speed_var, khz); } void jtag_set_verify(bool enable) @@ -1880,14 +1884,14 @@ bool jtag_will_verify_capture_ir(void) int jtag_power_dropout(int *dropout) { - if (!jtag) { + if (!is_adapter_initialized()) { /* TODO: as the jtag interface is not valid all * we can do at the moment is exit OpenOCD */ LOG_ERROR("No Valid JTAG Interface Configured."); exit(-1); } - if (jtag->power_dropout) - return jtag->power_dropout(dropout); + if (adapter_driver->power_dropout) + return adapter_driver->power_dropout(dropout); *dropout = 0; /* by default we can't detect power dropout */ return ERROR_OK; @@ -1895,8 +1899,8 @@ int jtag_power_dropout(int *dropout) int jtag_srst_asserted(int *srst_asserted) { - if (jtag->srst_asserted) - return jtag->srst_asserted(srst_asserted); + if (adapter_driver->srst_asserted) + return adapter_driver->srst_asserted(srst_asserted); *srst_asserted = 0; /* by default we can't detect srst asserted */ return ERROR_OK; @@ -2089,8 +2093,8 @@ int adapter_config_trace(bool enabled, enum tpiu_pin_protocol pin_protocol, uint32_t port_size, unsigned int *trace_freq, unsigned int traceclkin_freq, uint16_t *prescaler) { - if (jtag->config_trace) { - return jtag->config_trace(enabled, pin_protocol, port_size, trace_freq, + if (adapter_driver->config_trace) { + return adapter_driver->config_trace(enabled, pin_protocol, port_size, trace_freq, traceclkin_freq, prescaler); } else if (enabled) { LOG_ERROR("The selected interface does not support tracing"); @@ -2102,8 +2106,8 @@ int adapter_config_trace(bool enabled, enum tpiu_pin_protocol pin_protocol, int adapter_poll_trace(uint8_t *buf, size_t *size) { - if (jtag->poll_trace) - return jtag->poll_trace(buf, size); + if (adapter_driver->poll_trace) + return adapter_driver->poll_trace(buf, size); return ERROR_FAIL; } ----------------------------------------------------------------------- Summary of changes: src/jtag/core.c | 68 ++++++++++++++++++++++++++++++--------------------------- 1 file changed, 36 insertions(+), 32 deletions(-) hooks/post-receive -- Main OpenOCD repository |
From: OpenOCD-Gerrit <ope...@us...> - 2021-11-12 20:32:47
|
This is an automated email from the git hooks/post-receive script. It was generated because a ref change was pushed to the repository containing the project "Main OpenOCD repository". The branch, master has been updated via be57b0ab847e8246b354ca9203024737cdec403b (commit) from b2ab2241f20fd3da11c92f8edde4639ab8ce996f (commit) Those revisions listed above that are new to this repository have not appeared on any other notification email; so we list those revisions in full, below. - Log ----------------------------------------------------------------- commit be57b0ab847e8246b354ca9203024737cdec403b Author: Andreas Bolsch <hyp...@gm...> Date: Mon Jan 28 10:37:53 2019 +0100 Update jtagspi driver for 1-, 2- and 4-byte addresses jtagspi driver always used 3-byte addresses regardless of actual device capcity. Now select 1- to 4-byte addresses depending on device capacity. Some devices need a special command to activate the 4-byte address mode, a special command to accomplish this, and a further command for setting device properties are added. Additionally, restriction (start of range had to be page aligned) removed. Tested with XCS6SLX16 board and W25Q256FV in 3- and 4-byte address modes. Change-Id: I88b2877517a18dac460253ae6d97f3dded054e6c Signed-off-by: Andreas Bolsch <hyp...@gm...> Reviewed-on: https://review.openocd.org/c/openocd/+/4876 Reviewed-by: Jan Matyas <ma...@co...> Reviewed-by: Tomas Vanek <va...@fb...> Reviewed-by: zapb <de...@za...> Tested-by: jenkins diff --git a/doc/openocd.texi b/doc/openocd.texi index 01bb4f21d..c7ffc4f42 100644 --- a/doc/openocd.texi +++ b/doc/openocd.texi @@ -5580,6 +5580,10 @@ will not work. These include all @command{*_image} and functionality is available through the @command{flash write_bank}, @command{flash read_bank}, and @command{flash verify_bank} commands. +According to device size, 1- to 4-byte addresses are sent. However, some +flash chips additionally have to be switched to 4-byte addresses by an extra +command, see below. + @itemize @item @var{ir} ... is loaded into the JTAG IR to map the flash as the JTAG DR. For the bitstreams generated from @file{xilinx_bscan_spi.py} this is the @@ -5592,6 +5596,29 @@ set _XILINX_USER1 0x02 flash bank $_FLASHNAME spi 0x0 0 0 0 \ $_TARGETNAME $_XILINX_USER1 @end example + +@deffn Command {jtagspi set} bank_id name total_size page_size read_cmd unused pprg_cmd mass_erase_cmd sector_size sector_erase_cmd +Sets flash parameters: @var{name} human readable string, @var{total_size} +size in bytes, @var{page_size} is write page size. @var{read_cmd} and @var{pprg_cmd} +are commands for read and page program, respectively. @var{mass_erase_cmd}, +@var{sector_size} and @var{sector_erase_cmd} are optional. +@example +jtagspi set 0 w25q128 0x1000000 0x100 0x03 0 0x02 0xC7 0x10000 0xD8 +@end example +@end deffn + +@deffn Command {jtagspi cmd} bank_id resp_num cmd_byte ... +Sends command @var{cmd_byte} and at most 20 following bytes and reads +@var{resp_num} bytes afterwards. E.g. for 'Enter 4-byte address mode' +@example +jtagspi cmd 0 0 0xB7 +@end example +@end deffn + +@deffn Command {jtagspi always_4byte} bank_id [ on | off ] +Some devices use 4-byte addresses for all commands except the legacy 0x03 read +regardless of device size. This command controls the corresponding hack. +@end deffn @end deffn @deffn {Flash Driver} {xcf} diff --git a/src/flash/nor/jtagspi.c b/src/flash/nor/jtagspi.c index dc49fda61..9d377ce70 100644 --- a/src/flash/nor/jtagspi.c +++ b/src/flash/nor/jtagspi.c @@ -29,9 +29,12 @@ struct jtagspi_flash_bank { struct jtag_tap *tap; - const struct flash_device *dev; + struct flash_device dev; + char devname[32]; bool probed; + bool always_4byte; /* use always 4-byte address except for basic read 0x03 */ uint32_t ir; + unsigned int addr_len; /* address length in bytes */ }; FLASH_BANK_COMMAND_HANDLER(jtagspi_flash_bank_command) @@ -46,6 +49,7 @@ FLASH_BANK_COMMAND_HANDLER(jtagspi_flash_bank_command) LOG_ERROR("no memory for flash bank info"); return ERROR_FAIL; } + bank->sectors = NULL; bank->driver_priv = info; info->tap = NULL; @@ -69,70 +73,59 @@ static void jtagspi_set_ir(struct flash_bank *bank) jtag_add_ir_scan(info->tap, &field, TAP_IDLE); } -static void flip_u8(uint8_t *in, uint8_t *out, int len) +static void flip_u8(const uint8_t *in, uint8_t *out, unsigned int len) { - for (int i = 0; i < len; i++) + for (unsigned int i = 0; i < len; i++) out[i] = flip_u32(in[i], 8); } static int jtagspi_cmd(struct flash_bank *bank, uint8_t cmd, - uint32_t *addr, uint8_t *data, int len) + uint8_t *write_buffer, unsigned int write_len, uint8_t *data_buffer, int data_len) { - struct jtagspi_flash_bank *info = bank->driver_priv; + assert(write_buffer || write_len == 0); + assert(data_buffer || data_len == 0); + struct scan_field fields[6]; - uint8_t marker = 1; - uint8_t xfer_bits_buf[4]; - uint8_t addr_buf[3]; - uint8_t *data_buf; - uint32_t xfer_bits; - int is_read, lenb, n; - /* LOG_DEBUG("cmd=0x%02x len=%i", cmd, len); */ + LOG_DEBUG("cmd=0x%02x write_len=%d data_len=%d", cmd, write_len, data_len); - is_read = (len < 0); + /* negative data_len == read operation */ + const bool is_read = (data_len < 0); if (is_read) - len = -len; - - n = 0; + data_len = -data_len; + int n = 0; + const uint8_t marker = 1; fields[n].num_bits = 1; fields[n].out_value = ▮ fields[n].in_value = NULL; n++; - xfer_bits = 8 + len - 1; - /* cmd + read/write - 1 due to the counter implementation */ - if (addr) - xfer_bits += 24; - h_u32_to_be(xfer_bits_buf, xfer_bits); - flip_u8(xfer_bits_buf, xfer_bits_buf, 4); - fields[n].num_bits = 32; - fields[n].out_value = xfer_bits_buf; + /* transfer length = cmd + address + read/write, + * -1 due to the counter implementation */ + uint8_t xfer_bits[4]; + h_u32_to_be(xfer_bits, ((sizeof(cmd) + write_len + data_len) * CHAR_BIT) - 1); + flip_u8(xfer_bits, xfer_bits, sizeof(xfer_bits)); + fields[n].num_bits = sizeof(xfer_bits) * CHAR_BIT; + fields[n].out_value = xfer_bits; fields[n].in_value = NULL; n++; - cmd = flip_u32(cmd, 8); - fields[n].num_bits = 8; + flip_u8(&cmd, &cmd, sizeof(cmd)); + fields[n].num_bits = sizeof(cmd) * CHAR_BIT; fields[n].out_value = &cmd; fields[n].in_value = NULL; n++; - if (addr) { - h_u24_to_be(addr_buf, *addr); - flip_u8(addr_buf, addr_buf, 3); - fields[n].num_bits = 24; - fields[n].out_value = addr_buf; + if (write_len) { + flip_u8(write_buffer, write_buffer, write_len); + fields[n].num_bits = write_len * CHAR_BIT; + fields[n].out_value = write_buffer; fields[n].in_value = NULL; n++; } - lenb = DIV_ROUND_UP(len, 8); - data_buf = malloc(lenb); - if (lenb > 0) { - if (!data_buf) { - LOG_ERROR("no memory for spi buffer"); - return ERROR_FAIL; - } + if (data_len > 0) { if (is_read) { fields[n].num_bits = jtag_tap_count_enabled(); fields[n].out_value = NULL; @@ -140,36 +133,263 @@ static int jtagspi_cmd(struct flash_bank *bank, uint8_t cmd, n++; fields[n].out_value = NULL; - fields[n].in_value = data_buf; + fields[n].in_value = data_buffer; } else { - flip_u8(data, data_buf, lenb); - fields[n].out_value = data_buf; + flip_u8(data_buffer, data_buffer, data_len); + fields[n].out_value = data_buffer; fields[n].in_value = NULL; } - fields[n].num_bits = len; + fields[n].num_bits = data_len * CHAR_BIT; n++; } jtagspi_set_ir(bank); /* passing from an IR scan to SHIFT-DR clears BYPASS registers */ + struct jtagspi_flash_bank *info = bank->driver_priv; jtag_add_dr_scan(info->tap, n, fields, TAP_IDLE); int retval = jtag_execute_queue(); if (is_read) - flip_u8(data_buf, data, lenb); - free(data_buf); + flip_u8(data_buffer, data_buffer, data_len); return retval; } +COMMAND_HANDLER(jtagspi_handle_set) +{ + struct flash_bank *bank = NULL; + struct jtagspi_flash_bank *info = NULL; + struct flash_sector *sectors = NULL; + uint32_t temp; + unsigned int index = 1; + int retval; + + LOG_DEBUG("%s", __func__); + + /* there are 6 mandatory arguments: + * devname, size_in_bytes, pagesize, read_cmd, unused, pprog_cmd */ + if (index + 6 > CMD_ARGC) { + command_print(CMD, "jtagspi: not enough arguments"); + return ERROR_COMMAND_SYNTAX_ERROR; + } + + retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank); + if (ERROR_OK != retval) + return retval; + info = bank->driver_priv; + + /* invalidate all old info */ + if (info->probed) { + bank->size = 0; + bank->num_sectors = 0; + if (bank->sectors) + free(bank->sectors); + bank->sectors = NULL; + info->always_4byte = false; + info->probed = false; + } + memset(&info->dev, 0, sizeof(info->dev)); + + strncpy(info->devname, CMD_ARGV[index++], sizeof(info->devname) - 1); + info->devname[sizeof(info->devname) - 1] = '\0'; + + COMMAND_PARSE_NUMBER(u32, CMD_ARGV[index++], temp); + info->dev.size_in_bytes = temp; + if ((temp & (temp - 1)) || (temp < (1UL << 8))) { + command_print(CMD, "jtagspi: device size must be 2^n with n >= 8"); + return ERROR_COMMAND_SYNTAX_ERROR; + } + + COMMAND_PARSE_NUMBER(u32, CMD_ARGV[index++], temp); + info->dev.pagesize = temp; + if (info->dev.pagesize == 0) + info->dev.pagesize = SPIFLASH_DEF_PAGESIZE; + if ((temp & (temp - 1)) || (temp > info->dev.size_in_bytes)) { + command_print(CMD, "jtagspi: page size must be 2^n and <= device size"); + return ERROR_COMMAND_SYNTAX_ERROR; + } + + COMMAND_PARSE_NUMBER(u8, CMD_ARGV[index++], info->dev.read_cmd); + if ((info->dev.read_cmd != 0x03) && + (info->dev.read_cmd != 0x13)) { + command_print(CMD, "jtagspi: only 0x03/0x13 READ allowed"); + return ERROR_COMMAND_SYNTAX_ERROR; + } + + COMMAND_PARSE_NUMBER(u8, CMD_ARGV[index++], info->dev.qread_cmd); + + COMMAND_PARSE_NUMBER(u8, CMD_ARGV[index++], info->dev.pprog_cmd); + if ((info->dev.pprog_cmd != 0x02) && + (info->dev.pprog_cmd != 0x12)) { + command_print(CMD, "jtagspi: only 0x02/0x12 PPRG allowed"); + return ERROR_COMMAND_SYNTAX_ERROR; + } + + /* remaining params are optional */ + if (index < CMD_ARGC) + COMMAND_PARSE_NUMBER(u8, CMD_ARGV[index++], info->dev.chip_erase_cmd); + else + info->dev.chip_erase_cmd = 0x00; + + if (index < CMD_ARGC) { + COMMAND_PARSE_NUMBER(u32, CMD_ARGV[index++], temp); + info->dev.sectorsize = temp; + if ((info->dev.sectorsize > info->dev.size_in_bytes) || + (info->dev.sectorsize < info->dev.pagesize) || (temp & (temp - 1))) { + command_print(CMD, "jtagspi: sector size must be 2^n and <= device size"); + return ERROR_COMMAND_SYNTAX_ERROR; + } + + if (index < CMD_ARGC) + COMMAND_PARSE_NUMBER(u8, CMD_ARGV[index++], info->dev.erase_cmd); + else { + command_print(CMD, "jtagspi: erase command missing"); + return ERROR_COMMAND_SYNTAX_ERROR; + } + } else { + /* no sector size / sector erase cmd given, treat whole bank as a single sector */ + info->dev.erase_cmd = 0x00; + info->dev.sectorsize = info->dev.size_in_bytes; + } + + if (index < CMD_ARGC) { + command_print(CMD, "jtagspi: extra arguments"); + return ERROR_COMMAND_SYNTAX_ERROR; + } + + /* set correct size value */ + bank->size = info->dev.size_in_bytes; + + /* calculate address length in bytes */ + if (bank->size <= (1UL << 8)) + info->addr_len = 1; + else if (bank->size <= (1UL << 16)) + info->addr_len = 2; + else if (bank->size <= (1UL << 24)) + info->addr_len = 3; + else { + info->addr_len = 4; + LOG_WARNING("4-byte addresses needed, might need extra command to enable"); + } + + /* create and fill sectors array */ + bank->num_sectors = + info->dev.size_in_bytes / info->dev.sectorsize; + sectors = malloc(sizeof(struct flash_sector) * bank->num_sectors); + if (!sectors) { + LOG_ERROR("Not enough memory"); + return ERROR_FAIL; + } + + for (unsigned int sector = 0; sector < bank->num_sectors; sector++) { + sectors[sector].offset = sector * (info->dev.sectorsize); + sectors[sector].size = info->dev.sectorsize; + sectors[sector].is_erased = -1; + sectors[sector].is_protected = 0; + } + + bank->sectors = sectors; + info->dev.name = info->devname; + if (info->dev.size_in_bytes / 4096) + LOG_INFO("flash \'%s\' id = unknown\nflash size = %" PRIu32 " kbytes", + info->dev.name, info->dev.size_in_bytes / 1024); + else + LOG_INFO("flash \'%s\' id = unknown\nflash size = %" PRIu32 " bytes", + info->dev.name, info->dev.size_in_bytes); + info->probed = true; + + return ERROR_OK; +} + +COMMAND_HANDLER(jtagspi_handle_cmd) +{ + struct flash_bank *bank; + unsigned int index = 1; + const int max = 21; + uint8_t num_write, num_read, write_buffer[max], read_buffer[1 << CHAR_BIT]; + uint8_t data, *ptr; + char temp[4], output[(2 + max + (1 << CHAR_BIT)) * 3 + 8]; + int retval; + + LOG_DEBUG("%s", __func__); + + if (CMD_ARGC < 3) { + command_print(CMD, "jtagspi: not enough arguments"); + return ERROR_COMMAND_SYNTAX_ERROR; + } + + num_write = CMD_ARGC - 2; + if (num_write > max) { + LOG_ERROR("at most %d bytes may be send", max); + return ERROR_COMMAND_SYNTAX_ERROR; + } + + retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank); + if (ERROR_OK != retval) + return retval; + + COMMAND_PARSE_NUMBER(u8, CMD_ARGV[index++], num_read); + + snprintf(output, sizeof(output), "spi: "); + for (ptr = &write_buffer[0] ; index < CMD_ARGC; index++) { + COMMAND_PARSE_NUMBER(u8, CMD_ARGV[index], data); + *ptr++ = data; + snprintf(temp, sizeof(temp), "%02" PRIx8 " ", data); + strncat(output, temp, sizeof(output) - strlen(output) - 1); + } + strncat(output, "-> ", sizeof(output) - strlen(output) - 1); + + /* process command */ + ptr = &read_buffer[0]; + jtagspi_cmd(bank, write_buffer[0], &write_buffer[1], num_write - 1, ptr, -num_read); + if (retval != ERROR_OK) + return retval; + + for ( ; num_read > 0; num_read--) { + snprintf(temp, sizeof(temp), "%02" PRIx8 " ", *ptr++); + strncat(output, temp, sizeof(output) - strlen(output) - 1); + } + command_print(CMD, "%s", output); + + return ERROR_OK; +} + +COMMAND_HANDLER(jtagspi_handle_always_4byte) +{ + struct flash_bank *bank; + struct jtagspi_flash_bank *jtagspi_info; + int retval; + + LOG_DEBUG("%s", __func__); + + if ((CMD_ARGC != 1) && (CMD_ARGC != 2)) + return ERROR_COMMAND_SYNTAX_ERROR; + + retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank); + if (ERROR_OK != retval) + return retval; + + jtagspi_info = bank->driver_priv; + + if (CMD_ARGC == 1) + command_print(CMD, jtagspi_info->always_4byte ? "on" : "off"); + else + COMMAND_PARSE_BOOL(CMD_ARGV[1], jtagspi_info->always_4byte, "on", "off"); + + return ERROR_OK; +} + static int jtagspi_probe(struct flash_bank *bank) { struct jtagspi_flash_bank *info = bank->driver_priv; struct flash_sector *sectors; + const struct flash_device *p; uint8_t in_buf[3]; uint32_t id, sectorsize; - if (info->probed) + if (bank->sectors) { free(bank->sectors); + bank->sectors = NULL; + } info->probed = false; if (!bank->target->tap) { @@ -178,38 +398,46 @@ static int jtagspi_probe(struct flash_bank *bank) } info->tap = bank->target->tap; - jtagspi_cmd(bank, SPIFLASH_READ_ID, NULL, in_buf, -24); + jtagspi_cmd(bank, SPIFLASH_READ_ID, NULL, 0, in_buf, -3); /* the table in spi.c has the manufacturer byte (first) as the lsb */ id = le_to_h_u24(in_buf); - info->dev = NULL; - for (const struct flash_device *p = flash_devices; p->name ; p++) + memset(&info->dev, 0, sizeof(info->dev)); + for (p = flash_devices; p->name ; p++) if (p->device_id == id) { - info->dev = p; + memcpy(&info->dev, p, sizeof(info->dev)); break; } - if (!(info->dev)) { - LOG_ERROR("Unknown flash device (ID 0x%08" PRIx32 ")", id); + if (!(p->name)) { + LOG_ERROR("Unknown flash device (ID 0x%06" PRIx32 ")", id & 0xFFFFFF); return ERROR_FAIL; } - LOG_INFO("Found flash device \'%s\' (ID 0x%08" PRIx32 ")", - info->dev->name, info->dev->device_id); + LOG_INFO("Found flash device \'%s\' (ID 0x%06" PRIx32 ")", + info->dev.name, info->dev.device_id & 0xFFFFFF); /* Set correct size value */ - bank->size = info->dev->size_in_bytes; - if (bank->size <= (1UL << 16)) - LOG_WARNING("device needs 2-byte addresses - not implemented"); - if (bank->size > (1UL << 24)) - LOG_WARNING("device needs paging or 4-byte addresses - not implemented"); + bank->size = info->dev.size_in_bytes; + + /* calculate address length in bytes */ + if (bank->size <= (1UL << 8)) + info->addr_len = 1; + else if (bank->size <= (1UL << 16)) + info->addr_len = 2; + else if (bank->size <= (1UL << 24)) + info->addr_len = 3; + else { + info->addr_len = 4; + LOG_WARNING("4-byte addresses needed, might need extra command to enable"); + } /* if no sectors, treat whole bank as single sector */ - sectorsize = info->dev->sectorsize ? - info->dev->sectorsize : info->dev->size_in_bytes; + sectorsize = info->dev.sectorsize ? + info->dev.sectorsize : info->dev.size_in_bytes; /* create and fill sectors array */ - bank->num_sectors = info->dev->size_in_bytes / sectorsize; + bank->num_sectors = info->dev.size_in_bytes / sectorsize; sectors = malloc(sizeof(struct flash_sector) * bank->num_sectors); if (!sectors) { LOG_ERROR("not enough memory"); @@ -228,27 +456,35 @@ static int jtagspi_probe(struct flash_bank *bank) return ERROR_OK; } +static int jtagspi_auto_probe(struct flash_bank *bank) +{ + struct jtagspi_flash_bank *info = bank->driver_priv; + + if (info->probed) + return ERROR_OK; + return jtagspi_probe(bank); +} + static int jtagspi_read_status(struct flash_bank *bank, uint32_t *status) { uint8_t buf; - int err = jtagspi_cmd(bank, SPIFLASH_READ_STATUS, NULL, &buf, -8); + int err = jtagspi_cmd(bank, SPIFLASH_READ_STATUS, NULL, 0, &buf, -1); if (err == ERROR_OK) { *status = buf; - /* LOG_DEBUG("status=0x%08" PRIx32, *status); */ + LOG_DEBUG("status=0x%02" PRIx8, *status); } - return err; } static int jtagspi_wait(struct flash_bank *bank, int timeout_ms) { - uint32_t status; int64_t t0 = timeval_ms(); int64_t dt; do { dt = timeval_ms() - t0; + uint32_t status = (uint32_t)-1; int retval = jtagspi_read_status(bank, &status); if (retval != ERROR_OK) return retval; @@ -266,16 +502,15 @@ static int jtagspi_wait(struct flash_bank *bank, int timeout_ms) static int jtagspi_write_enable(struct flash_bank *bank) { - uint32_t status; - - jtagspi_cmd(bank, SPIFLASH_WRITE_ENABLE, NULL, NULL, 0); + jtagspi_cmd(bank, SPIFLASH_WRITE_ENABLE, NULL, 0, NULL, 0); + uint32_t status = (uint32_t)-1; int retval = jtagspi_read_status(bank, &status); if (retval != ERROR_OK) return retval; if ((status & SPIFLASH_WE_BIT) == 0) { - LOG_ERROR("Cannot enable write to flash. Status=0x%08" PRIx32, status); + LOG_ERROR("Cannot enable write to flash. Status=0x%02" PRIx8, status); return ERROR_FAIL; } return ERROR_OK; @@ -287,28 +522,51 @@ static int jtagspi_bulk_erase(struct flash_bank *bank) int retval; int64_t t0 = timeval_ms(); - if (info->dev->chip_erase_cmd == 0x00) + if (info->dev.chip_erase_cmd == 0x00) return ERROR_FLASH_OPER_UNSUPPORTED; retval = jtagspi_write_enable(bank); if (retval != ERROR_OK) return retval; - jtagspi_cmd(bank, info->dev->chip_erase_cmd, NULL, NULL, 0); - retval = jtagspi_wait(bank, bank->num_sectors*JTAGSPI_MAX_TIMEOUT); + + jtagspi_cmd(bank, info->dev.chip_erase_cmd, NULL, 0, NULL, 0); + if (retval != ERROR_OK) + return retval; + + retval = jtagspi_wait(bank, bank->num_sectors * JTAGSPI_MAX_TIMEOUT); LOG_INFO("took %" PRId64 " ms", timeval_ms() - t0); return retval; } +static uint8_t *fill_addr(uint32_t addr, unsigned int addr_len, uint8_t *buffer) +{ + for (buffer += addr_len; addr_len > 0; --addr_len) { + *--buffer = addr; + addr >>= 8; + } + + return buffer; +} + static int jtagspi_sector_erase(struct flash_bank *bank, unsigned int sector) { struct jtagspi_flash_bank *info = bank->driver_priv; int retval; + uint8_t addr[sizeof(uint32_t)]; int64_t t0 = timeval_ms(); retval = jtagspi_write_enable(bank); if (retval != ERROR_OK) return retval; - jtagspi_cmd(bank, info->dev->erase_cmd, &bank->sectors[sector].offset, NULL, 0); + + /* ATXP032/064/128 use always 4-byte addresses except for 0x03 read */ + unsigned int addr_len = info->always_4byte ? 4 : info->addr_len; + + retval = jtagspi_cmd(bank, info->dev.erase_cmd, fill_addr(bank->sectors[sector].offset, addr_len, addr), + addr_len, NULL, 0); + if (retval != ERROR_OK) + return retval; + retval = jtagspi_wait(bank, JTAGSPI_MAX_TIMEOUT); LOG_INFO("sector %u took %" PRId64 " ms", sector, timeval_ms() - t0); return retval; @@ -339,8 +597,9 @@ static int jtagspi_erase(struct flash_bank *bank, unsigned int first, } } - if (first == 0 && last == (bank->num_sectors - 1) - && info->dev->chip_erase_cmd != info->dev->erase_cmd) { + if (first == 0 && last == (bank->num_sectors - 1) && + info->dev.chip_erase_cmd != 0x00 && + info->dev.chip_erase_cmd != info->dev.erase_cmd) { LOG_DEBUG("Trying bulk erase."); retval = jtagspi_bulk_erase(bank); if (retval == ERROR_OK) @@ -349,7 +608,7 @@ static int jtagspi_erase(struct flash_bank *bank, unsigned int first, LOG_WARNING("Bulk flash erase failed. Falling back to sector erase."); } - if (info->dev->erase_cmd == 0x00) + if (info->dev.erase_cmd == 0x00) return ERROR_FLASH_OPER_UNSUPPORTED; for (unsigned int sector = first; sector <= last; sector++) { @@ -374,49 +633,93 @@ static int jtagspi_protect(struct flash_bank *bank, int set, unsigned int first, static int jtagspi_read(struct flash_bank *bank, uint8_t *buffer, uint32_t offset, uint32_t count) { struct jtagspi_flash_bank *info = bank->driver_priv; + uint32_t pagesize, currsize; + uint8_t addr[sizeof(uint32_t)]; + int retval; if (!(info->probed)) { - LOG_ERROR("Flash bank not yet probed."); + LOG_ERROR("Flash bank not probed."); return ERROR_FLASH_BANK_NOT_PROBED; } - jtagspi_cmd(bank, SPIFLASH_READ, &offset, buffer, -count*8); + /* if no sectorsize, use reasonable default */ + pagesize = info->dev.sectorsize ? info->dev.sectorsize : info->dev.pagesize; + if (pagesize == 0) + pagesize = (info->dev.size_in_bytes <= SPIFLASH_DEF_PAGESIZE) ? + info->dev.size_in_bytes : SPIFLASH_DEF_PAGESIZE; + + /* ATXP032/064/128 use always 4-byte addresses except for 0x03 read */ + unsigned int addr_len = ((info->dev.read_cmd != 0x03) && info->always_4byte) ? 4 : info->addr_len; + + while (count > 0) { + /* length up to end of current page */ + currsize = ((offset + pagesize) & ~(pagesize - 1)) - offset; + /* but no more than remaining size */ + currsize = (count < currsize) ? count : currsize; + + retval = jtagspi_cmd(bank, info->dev.read_cmd, fill_addr(offset, addr_len, addr), + addr_len, buffer, -currsize); + if (retval != ERROR_OK) { + LOG_ERROR("page read error"); + return retval; + } + LOG_DEBUG("read page at 0x%08" PRIx32, offset); + offset += currsize; + buffer += currsize; + count -= currsize; + } return ERROR_OK; } static int jtagspi_page_write(struct flash_bank *bank, const uint8_t *buffer, uint32_t offset, uint32_t count) { + struct jtagspi_flash_bank *info = bank->driver_priv; + uint8_t addr[sizeof(uint32_t)]; int retval; retval = jtagspi_write_enable(bank); if (retval != ERROR_OK) return retval; - jtagspi_cmd(bank, SPIFLASH_PAGE_PROGRAM, &offset, (uint8_t *) buffer, count*8); + + /* ATXP032/064/128 use always 4-byte addresses except for 0x03 read */ + unsigned int addr_len = ((info->dev.read_cmd != 0x03) && info->always_4byte) ? 4 : info->addr_len; + + retval = jtagspi_cmd(bank, info->dev.pprog_cmd, fill_addr(offset, addr_len, addr), + addr_len, (uint8_t *) buffer, count); + if (retval != ERROR_OK) + return retval; return jtagspi_wait(bank, JTAGSPI_MAX_TIMEOUT); } static int jtagspi_write(struct flash_bank *bank, const uint8_t *buffer, uint32_t offset, uint32_t count) { struct jtagspi_flash_bank *info = bank->driver_priv; + uint32_t pagesize, currsize; int retval; - uint32_t n, pagesize; if (!(info->probed)) { - LOG_ERROR("Flash bank not yet probed."); + LOG_ERROR("Flash bank not probed."); return ERROR_FLASH_BANK_NOT_PROBED; } /* if no write pagesize, use reasonable default */ - pagesize = info->dev->pagesize ? info->dev->pagesize : SPIFLASH_DEF_PAGESIZE; + pagesize = info->dev.pagesize ? info->dev.pagesize : SPIFLASH_DEF_PAGESIZE; + + while (count > 0) { + /* length up to end of current page */ + currsize = ((offset + pagesize) & ~(pagesize - 1)) - offset; + /* but no more than remaining size */ + currsize = (count < currsize) ? count : currsize; - for (n = 0; n < count; n += pagesize) { - retval = jtagspi_page_write(bank, buffer + n, offset + n, - MIN(count - n, pagesize)); + retval = jtagspi_page_write(bank, buffer, offset, currsize); if (retval != ERROR_OK) { LOG_ERROR("page write error"); return retval; } - LOG_DEBUG("wrote page at 0x%08" PRIx32, offset + n); + LOG_DEBUG("wrote page at 0x%08" PRIx32, offset); + offset += currsize; + buffer += currsize; + count -= currsize; } return ERROR_OK; } @@ -430,22 +733,72 @@ static int jtagspi_info(struct flash_bank *bank, struct command_invocation *cmd) return ERROR_OK; } - command_print_sameline(cmd, "\nSPIFI flash information:\n" - " Device \'%s\' (ID 0x%08" PRIx32 ")\n", - info->dev->name, info->dev->device_id); + command_print_sameline(cmd, "flash \'%s\', device id = 0x%06" PRIx32 + ", flash size = %" PRIu32 " %sbytes\n(page size = %" PRIu32 + ", read = 0x%02" PRIx8 ", qread = 0x%02" PRIx8 + ", pprog = 0x%02" PRIx8 ", mass_erase = 0x%02" PRIx8 + ", sector size = %" PRIu32 " %sbytes, sector_erase = 0x%02" PRIx8 ")", + info->dev.name, info->dev.device_id & 0xFFFFFF, + bank->size / 4096 ? bank->size / 1024 : bank->size, + bank->size / 4096 ? "k" : "", info->dev.pagesize, + info->dev.read_cmd, info->dev.qread_cmd, + info->dev.pprog_cmd, info->dev.chip_erase_cmd, + info->dev.sectorsize / 4096 ? + info->dev.sectorsize / 1024 : info->dev.sectorsize, + info->dev.sectorsize / 4096 ? "k" : "", + info->dev.erase_cmd); return ERROR_OK; } +static const struct command_registration jtagspi_exec_command_handlers[] = { + { + .name = "set", + .handler = jtagspi_handle_set, + .mode = COMMAND_EXEC, + .usage = "bank_id name chip_size page_size read_cmd unused pprg_cmd " + "[ mass_erase_cmd ] [ sector_size sector_erase_cmd ]", + .help = "Set device parameters if not autodetected.", + }, + { + .name = "cmd", + .handler = jtagspi_handle_cmd, + .mode = COMMAND_EXEC, + .usage = "bank_id num_resp cmd_byte ...", + .help = "Send low-level command cmd_byte and following bytes, read num_bytes.", + }, + { + .name = "always_4byte", + .handler = jtagspi_handle_always_4byte, + .mode = COMMAND_EXEC, + .usage = "bank_id [ on | off ]", + .help = "Use always 4-byte address except for basic 0x03.", + }, + + COMMAND_REGISTRATION_DONE +}; + +static const struct command_registration jtagspi_command_handlers[] = { + { + .name = "jtagspi", + .mode = COMMAND_ANY, + .help = "jtagspi command group", + .usage = "", + .chain = jtagspi_exec_command_handlers, + }, + COMMAND_REGISTRATION_DONE +}; + const struct flash_driver jtagspi_flash = { .name = "jtagspi", + .commands = jtagspi_command_handlers, .flash_bank_command = jtagspi_flash_bank_command, .erase = jtagspi_erase, .protect = jtagspi_protect, .write = jtagspi_write, .read = jtagspi_read, .probe = jtagspi_probe, - .auto_probe = jtagspi_probe, + .auto_probe = jtagspi_auto_probe, .erase_check = default_flash_blank_check, .info = jtagspi_info, .free_driver_priv = default_flash_free_driver_priv, ----------------------------------------------------------------------- Summary of changes: doc/openocd.texi | 27 +++ src/flash/nor/jtagspi.c | 533 ++++++++++++++++++++++++++++++++++++++++-------- 2 files changed, 470 insertions(+), 90 deletions(-) hooks/post-receive -- Main OpenOCD repository |
From: OpenOCD-Gerrit <ope...@us...> - 2021-11-07 22:22:21
|
This is an automated email from the git hooks/post-receive script. It was generated because a ref change was pushed to the repository containing the project "Main OpenOCD repository". The branch, master has been updated via b2ab2241f20fd3da11c92f8edde4639ab8ce996f (commit) from 8b1ee1b1f6d41a0f7d588b128a22e8d5abeb85a7 (commit) Those revisions listed above that are new to this repository have not appeared on any other notification email; so we list those revisions in full, below. - Log ----------------------------------------------------------------- commit b2ab2241f20fd3da11c92f8edde4639ab8ce996f Author: Antonio Borneo <bor...@gm...> Date: Mon Apr 12 00:04:19 2021 +0200 jimtcl: revert temporary workaround for memory leak in jimtcl 0.80 By using jimtcl from latest master branch, the workaround added in commit 36ae487ed04b ("jimtcl: add temporary workaround for memory leak in jimtcl 0.80") is not needed anymore. Revert the workaround. Change-Id: Ia1b5804be15362d0400740c375455ee19ac09f04 Signed-off-by: Antonio Borneo <bor...@gm...> Reviewed-on: https://review.openocd.org/c/openocd/+/6228 Tested-by: jenkins Reviewed-by: Oleksij Rempel <li...@re...> diff --git a/src/helper/command.c b/src/helper/command.c index 7c29f73e6..53ee2508a 100644 --- a/src/helper/command.c +++ b/src/helper/command.c @@ -137,41 +137,6 @@ static void command_log_capture_finish(struct log_capture_state *state) free(state); } -/* - * FIXME: workaround for memory leak in jimtcl 0.80 - * Jim API Jim_CreateCommand() converts the command name in a Jim object and - * does not free the object. Fixed for jimtcl 0.81 by e4416cf86f0b - * Use the internal jimtcl API Jim_CreateCommandObj, not exported by jim.h, - * and override the bugged API through preprocessor's macro. - * This workaround works only when jimtcl is compiled as OpenOCD submodule. - * It's broken on macOS, so it's currently restricted on Linux only. - * If jimtcl is linked-in from a precompiled library, either static or dynamic, - * the symbol Jim_CreateCommandObj is not exported and the build will use the - * bugged API. - * To be removed when OpenOCD will switch to jimtcl 0.81 - */ -#if JIM_VERSION == 80 && defined __linux__ -static int workaround_createcommand(Jim_Interp *interp, const char *cmdName, - Jim_CmdProc *cmdProc, void *privData, Jim_DelCmdProc *delProc); -int Jim_CreateCommandObj(Jim_Interp *interp, Jim_Obj *cmdNameObj, - Jim_CmdProc *cmdProc, void *privData, Jim_DelCmdProc *delProc) -__attribute__((weak, alias("workaround_createcommand"))); -static int workaround_createcommand(Jim_Interp *interp, const char *cmdName, - Jim_CmdProc *cmdProc, void *privData, Jim_DelCmdProc *delProc) -{ - if ((void *)Jim_CreateCommandObj == (void *)workaround_createcommand) - return Jim_CreateCommand(interp, cmdName, cmdProc, privData, delProc); - - Jim_Obj *cmd_name = Jim_NewStringObj(interp, cmdName, -1); - Jim_IncrRefCount(cmd_name); - int retval = Jim_CreateCommandObj(interp, cmd_name, cmdProc, privData, delProc); - Jim_DecrRefCount(interp, cmd_name); - return retval; -} -#define Jim_CreateCommand workaround_createcommand -#endif /* JIM_VERSION == 80 && defined __linux__*/ -/* FIXME: end of workaround for memory leak in jimtcl 0.80 */ - static int command_retval_set(Jim_Interp *interp, int retval) { int *return_retval = Jim_GetAssocData(interp, "retval"); ----------------------------------------------------------------------- Summary of changes: src/helper/command.c | 35 ----------------------------------- 1 file changed, 35 deletions(-) hooks/post-receive -- Main OpenOCD repository |
From: OpenOCD-Gerrit <ope...@us...> - 2021-11-07 22:21:51
|
This is an automated email from the git hooks/post-receive script. It was generated because a ref change was pushed to the repository containing the project "Main OpenOCD repository". The branch, master has been updated via 8b1ee1b1f6d41a0f7d588b128a22e8d5abeb85a7 (commit) from 5148a1324aeef62d85aaeaa1c061df8e874e4c12 (commit) Those revisions listed above that are new to this repository have not appeared on any other notification email; so we list those revisions in full, below. - Log ----------------------------------------------------------------- commit 8b1ee1b1f6d41a0f7d588b128a22e8d5abeb85a7 Author: Antonio Borneo <bor...@gm...> Date: Sun Apr 11 23:58:57 2021 +0200 Makefile: remove workaround for jimtcl 0.80 Commit 266a945ad3e8 ("jimtcl: update to version 0.80 (2020-10-29)") adds a workaround to permit 'make distcheck' with jimtcl 0.80. This has been fixed in jimtcl with commit d224c9a2b7b2 ("Makefile: remove examples.api/Makefile while 'distclean'"). By using jimtcl from latest master branch, the workaround is not required anymore. Remove the workaround. Change-Id: I10d91371b5a89d2a3c8599bce766f97eac44f0d9 Signed-off-by: Antonio Borneo <bor...@gm...> Reviewed-on: https://review.openocd.org/c/openocd/+/6227 Tested-by: jenkins Reviewed-by: Oleksij Rempel <li...@re...> diff --git a/Makefile.am b/Makefile.am index 7e5e22973..a18c572fb 100644 --- a/Makefile.am +++ b/Makefile.am @@ -125,8 +125,6 @@ uninstall-hook: distclean-local: rm -rf Doxyfile doxygen rm -f $(srcdir)/jimtcl/configure.gnu -# FIXME: workaround for jimtcl 0.80 only. Remove from jimtcl 0.81 - rm -f jimtcl/examples.api/Makefile DISTCLEANFILES = doxygen.log ----------------------------------------------------------------------- Summary of changes: Makefile.am | 2 -- 1 file changed, 2 deletions(-) hooks/post-receive -- Main OpenOCD repository |
From: OpenOCD-Gerrit <ope...@us...> - 2021-11-05 22:45:39
|
This is an automated email from the git hooks/post-receive script. It was generated because a ref change was pushed to the repository containing the project "Main OpenOCD repository". The branch, master has been updated via 5148a1324aeef62d85aaeaa1c061df8e874e4c12 (commit) from da434d7d5975c1c7ebae8e35eb71b6d2d6ad062e (commit) Those revisions listed above that are new to this repository have not appeared on any other notification email; so we list those revisions in full, below. - Log ----------------------------------------------------------------- commit 5148a1324aeef62d85aaeaa1c061df8e874e4c12 Author: Tim Newsome <ti...@si...> Date: Mon Oct 11 09:56:39 2021 -0700 rtos: use struct member names instead of comments This is more readable, and as a bonus the compiler will help out if the definition of the struct changes. Change-Id: Ibf660134d9900173f6592407d5cc2203654a4a1b Signed-off-by: Tim Newsome <ti...@si...> Reviewed-on: https://review.openocd.org/c/openocd/+/6659 Tested-by: jenkins Reviewed-by: Tarek BOCHKATI <tar...@gm...> Reviewed-by: Antonio Borneo <bor...@gm...> diff --git a/src/rtos/ThreadX.c b/src/rtos/ThreadX.c index 788edc0b4..441b7abc5 100644 --- a/src/rtos/ThreadX.c +++ b/src/rtos/ThreadX.c @@ -112,18 +112,16 @@ static const struct stack_register_offset rtos_threadx_arm926ejs_stack_offsets_i static const struct rtos_register_stacking rtos_threadx_arm926ejs_stacking[] = { { - ARM926EJS_REGISTERS_SIZE_SOLICITED, /* stack_registers_size */ - -1, /* stack_growth_direction */ - 17, /* num_output_registers */ - NULL, /* stack_alignment */ - rtos_threadx_arm926ejs_stack_offsets_solicited /* register_offsets */ + .stack_registers_size = ARM926EJS_REGISTERS_SIZE_SOLICITED, + .stack_growth_direction = -1, + .num_output_registers = 17, + .register_offsets = rtos_threadx_arm926ejs_stack_offsets_solicited }, { - ARM926EJS_REGISTERS_SIZE_INTERRUPT, /* stack_registers_size */ - -1, /* stack_growth_direction */ - 17, /* num_output_registers */ - NULL, /* stack_alignment */ - rtos_threadx_arm926ejs_stack_offsets_interrupt /* register_offsets */ + .stack_registers_size = ARM926EJS_REGISTERS_SIZE_INTERRUPT, + .stack_growth_direction = -1, + .num_output_registers = 17, + .register_offsets = rtos_threadx_arm926ejs_stack_offsets_interrupt }, }; diff --git a/src/rtos/nuttx.c b/src/rtos/nuttx.c index cc352d180..f0b304861 100644 --- a/src/rtos/nuttx.c +++ b/src/rtos/nuttx.c @@ -119,11 +119,10 @@ static const struct stack_register_offset nuttx_stack_offsets_cortex_m[] = { static const struct rtos_register_stacking nuttx_stacking_cortex_m = { - 0x48, /* stack_registers_size */ - -1, /* stack_growth_direction */ - 17, /* num_output_registers */ - 0, /* stack_alignment */ - nuttx_stack_offsets_cortex_m /* register_offsets */ + .stack_registers_size = 0x48, + .stack_growth_direction = -1, + .num_output_registers = 17, + .register_offsets = nuttx_stack_offsets_cortex_m }; static const struct stack_register_offset nuttx_stack_offsets_cortex_m_fpu[] = { @@ -147,11 +146,10 @@ static const struct stack_register_offset nuttx_stack_offsets_cortex_m_fpu[] = { }; static const struct rtos_register_stacking nuttx_stacking_cortex_m_fpu = { - 0x8c, /* stack_registers_size */ - -1, /* stack_growth_direction */ - 17, /* num_output_registers */ - 0, /* stack_alignment */ - nuttx_stack_offsets_cortex_m_fpu /* register_offsets */ + .stack_registers_size = 0x8c, + .stack_growth_direction = -1, + .num_output_registers = 17, + .register_offsets = nuttx_stack_offsets_cortex_m_fpu }; static int pid_offset = PID; diff --git a/src/rtos/rtos_chibios_stackings.c b/src/rtos/rtos_chibios_stackings.c index 2887930bd..77bcb86cb 100644 --- a/src/rtos/rtos_chibios_stackings.c +++ b/src/rtos/rtos_chibios_stackings.c @@ -47,11 +47,10 @@ static const struct stack_register_offset rtos_chibios_arm_v7m_stack_offsets[ARM }; const struct rtos_register_stacking rtos_chibios_arm_v7m_stacking = { - 0x24, /* stack_registers_size */ - -1, /* stack_growth_direction */ - ARMV7M_NUM_CORE_REGS, /* num_output_registers */ - NULL, /* stack_alignment */ - rtos_chibios_arm_v7m_stack_offsets /* register_offsets */ + .stack_registers_size = 0x24, + .stack_growth_direction = -1, + .num_output_registers = ARMV7M_NUM_CORE_REGS, + .register_offsets = rtos_chibios_arm_v7m_stack_offsets }; static const struct stack_register_offset rtos_chibios_arm_v7m_stack_offsets_w_fpu[ARMV7M_NUM_CORE_REGS] = { @@ -75,9 +74,8 @@ static const struct stack_register_offset rtos_chibios_arm_v7m_stack_offsets_w_f }; const struct rtos_register_stacking rtos_chibios_arm_v7m_stacking_w_fpu = { - 0x64, /* stack_registers_size */ - -1, /* stack_growth_direction */ - ARMV7M_NUM_CORE_REGS, /* num_output_registers */ - NULL, /* stack_alignment */ - rtos_chibios_arm_v7m_stack_offsets_w_fpu /* register_offsets */ + .stack_registers_size = 0x64, + .stack_growth_direction = -1, + .num_output_registers = ARMV7M_NUM_CORE_REGS, + .register_offsets = rtos_chibios_arm_v7m_stack_offsets_w_fpu }; diff --git a/src/rtos/rtos_ecos_stackings.c b/src/rtos/rtos_ecos_stackings.c index e2119423a..4745470ce 100644 --- a/src/rtos/rtos_ecos_stackings.c +++ b/src/rtos/rtos_ecos_stackings.c @@ -43,9 +43,9 @@ static const struct stack_register_offset rtos_ecos_cortex_m3_stack_offsets[ARMV }; const struct rtos_register_stacking rtos_ecos_cortex_m3_stacking = { - 0x44, /* stack_registers_size */ - -1, /* stack_growth_direction */ - ARMV7M_NUM_CORE_REGS, /* num_output_registers */ - rtos_generic_stack_align8, /* stack_alignment */ - rtos_ecos_cortex_m3_stack_offsets /* register_offsets */ + .stack_registers_size = 0x44, + .stack_growth_direction = -1, + .num_output_registers = ARMV7M_NUM_CORE_REGS, + .calculate_process_stack = rtos_generic_stack_align8, + .register_offsets = rtos_ecos_cortex_m3_stack_offsets }; diff --git a/src/rtos/rtos_embkernel_stackings.c b/src/rtos/rtos_embkernel_stackings.c index cd4c22eac..df1fc51f2 100644 --- a/src/rtos/rtos_embkernel_stackings.c +++ b/src/rtos/rtos_embkernel_stackings.c @@ -45,9 +45,9 @@ static const struct stack_register_offset rtos_embkernel_cortex_m_stack_offsets[ }; const struct rtos_register_stacking rtos_embkernel_cortex_m_stacking = { - 0x40, /* stack_registers_size */ - -1, /* stack_growth_direction */ - ARMV7M_NUM_CORE_REGS, /* num_output_registers */ - rtos_generic_stack_align8, /* stack_alignment */ - rtos_embkernel_cortex_m_stack_offsets /* register_offsets */ + .stack_registers_size = 0x40, + .stack_growth_direction = -1, + .num_output_registers = ARMV7M_NUM_CORE_REGS, + .calculate_process_stack = rtos_generic_stack_align8, + .register_offsets = rtos_embkernel_cortex_m_stack_offsets }; diff --git a/src/rtos/rtos_mqx_stackings.c b/src/rtos/rtos_mqx_stackings.c index f2d3b2227..f99190ea5 100644 --- a/src/rtos/rtos_mqx_stackings.c +++ b/src/rtos/rtos_mqx_stackings.c @@ -71,9 +71,8 @@ static const struct stack_register_offset rtos_mqx_arm_v7m_stack_offsets[ARMV7M_ }; const struct rtos_register_stacking rtos_mqx_arm_v7m_stacking = { - 0x4C, /* stack_registers_size, calculate offset base address */ - -1, /* stack_growth_direction */ - ARMV7M_NUM_CORE_REGS, /* num_output_registers */ - NULL, /* stack_alignment */ - rtos_mqx_arm_v7m_stack_offsets /* register_offsets */ + .stack_registers_size = 0x4C, /* calculate offset base address */ + .stack_growth_direction = -1, + .num_output_registers = ARMV7M_NUM_CORE_REGS, + .register_offsets = rtos_mqx_arm_v7m_stack_offsets }; diff --git a/src/rtos/rtos_riot_stackings.c b/src/rtos/rtos_riot_stackings.c index abf08c8ff..84e1f7ff8 100644 --- a/src/rtos/rtos_riot_stackings.c +++ b/src/rtos/rtos_riot_stackings.c @@ -58,11 +58,11 @@ static const struct stack_register_offset rtos_riot_cortex_m0_stack_offsets[ARMV }; const struct rtos_register_stacking rtos_riot_cortex_m0_stacking = { - 0x44, /* stack_registers_size */ - -1, /* stack_growth_direction */ - ARMV7M_NUM_CORE_REGS, /* num_output_registers */ - rtos_riot_cortex_m_stack_align, /* stack_alignment */ - rtos_riot_cortex_m0_stack_offsets /* register_offsets */ + .stack_registers_size = 0x44, + .stack_growth_direction = -1, + .num_output_registers = ARMV7M_NUM_CORE_REGS, + .calculate_process_stack = rtos_riot_cortex_m_stack_align, + .register_offsets = rtos_riot_cortex_m0_stack_offsets }; /* see thread_arch.c */ @@ -87,9 +87,9 @@ static const struct stack_register_offset rtos_riot_cortex_m34_stack_offsets[ARM }; const struct rtos_register_stacking rtos_riot_cortex_m34_stacking = { - 0x44, /* stack_registers_size */ - -1, /* stack_growth_direction */ - ARMV7M_NUM_CORE_REGS, /* num_output_registers */ - rtos_riot_cortex_m_stack_align, /* stack_alignment */ - rtos_riot_cortex_m34_stack_offsets /* register_offsets */ + .stack_registers_size = 0x44, + .stack_growth_direction = -1, + .num_output_registers = ARMV7M_NUM_CORE_REGS, + .calculate_process_stack = rtos_riot_cortex_m_stack_align, + .register_offsets = rtos_riot_cortex_m34_stack_offsets }; diff --git a/src/rtos/rtos_standard_stackings.c b/src/rtos/rtos_standard_stackings.c index c3eef5c06..fe890413f 100644 --- a/src/rtos/rtos_standard_stackings.c +++ b/src/rtos/rtos_standard_stackings.c @@ -249,41 +249,41 @@ static target_addr_t rtos_standard_cortex_m4f_fpu_stack_align(struct target *tar const struct rtos_register_stacking rtos_standard_cortex_m3_stacking = { - 0x40, /* stack_registers_size */ - -1, /* stack_growth_direction */ - ARMV7M_NUM_CORE_REGS, /* num_output_registers */ - rtos_standard_cortex_m3_stack_align, /* stack_alignment */ - rtos_standard_cortex_m3_stack_offsets /* register_offsets */ + .stack_registers_size = 0x40, + .stack_growth_direction = -1, + .num_output_registers = ARMV7M_NUM_CORE_REGS, + .calculate_process_stack = rtos_standard_cortex_m3_stack_align, + .register_offsets = rtos_standard_cortex_m3_stack_offsets }; const struct rtos_register_stacking rtos_standard_cortex_m4f_stacking = { - 0x44, /* stack_registers_size 4 more for LR*/ - -1, /* stack_growth_direction */ - ARMV7M_NUM_CORE_REGS, /* num_output_registers */ - rtos_standard_cortex_m4f_stack_align, /* stack_alignment */ - rtos_standard_cortex_m4f_stack_offsets /* register_offsets */ + .stack_registers_size = 0x44, + .stack_growth_direction = -1, + .num_output_registers = ARMV7M_NUM_CORE_REGS, + .calculate_process_stack = rtos_standard_cortex_m4f_stack_align, + .register_offsets = rtos_standard_cortex_m4f_stack_offsets }; const struct rtos_register_stacking rtos_standard_cortex_m4f_fpu_stacking = { - 0xcc, /* stack_registers_size 4 more for LR + 48 more for FPU S0-S15 register*/ - -1, /* stack_growth_direction */ - ARMV7M_NUM_CORE_REGS, /* num_output_registers */ - rtos_standard_cortex_m4f_fpu_stack_align, /* stack_alignment */ - rtos_standard_cortex_m4f_fpu_stack_offsets /* register_offsets */ + .stack_registers_size = 0xcc, + .stack_growth_direction = -1, + .num_output_registers = ARMV7M_NUM_CORE_REGS, + .calculate_process_stack = rtos_standard_cortex_m4f_fpu_stack_align, + .register_offsets = rtos_standard_cortex_m4f_fpu_stack_offsets }; const struct rtos_register_stacking rtos_standard_cortex_r4_stacking = { - 0x48, /* stack_registers_size */ - -1, /* stack_growth_direction */ - 26, /* num_output_registers */ - rtos_generic_stack_align8, /* stack_alignment */ - rtos_standard_cortex_r4_stack_offsets /* register_offsets */ + .stack_registers_size = 0x48, + .stack_growth_direction = -1, + .num_output_registers = 26, + .calculate_process_stack = rtos_generic_stack_align8, + .register_offsets = rtos_standard_cortex_r4_stack_offsets }; const struct rtos_register_stacking rtos_standard_nds32_n1068_stacking = { - 0x90, /* stack_registers_size */ - -1, /* stack_growth_direction */ - 32, /* num_output_registers */ - rtos_generic_stack_align8, /* stack_alignment */ - rtos_standard_nds32_n1068_stack_offsets /* register_offsets */ + .stack_registers_size = 0x90, + .stack_growth_direction = -1, + .num_output_registers = 32, + .calculate_process_stack = rtos_generic_stack_align8, + .register_offsets = rtos_standard_nds32_n1068_stack_offsets }; diff --git a/src/rtos/rtos_ucos_iii_stackings.c b/src/rtos/rtos_ucos_iii_stackings.c index 4ae0d7dc8..0d533b55e 100644 --- a/src/rtos/rtos_ucos_iii_stackings.c +++ b/src/rtos/rtos_ucos_iii_stackings.c @@ -68,17 +68,16 @@ static const struct stack_register_offset rtos_ucos_iii_esi_risc_stack_offsets[] }; const struct rtos_register_stacking rtos_ucos_iii_cortex_m_stacking = { - 0x40, /* stack_registers_size */ - -1, /* stack_growth_direction */ - ARRAY_SIZE(rtos_ucos_iii_cortex_m_stack_offsets), /* num_output_registers */ - rtos_generic_stack_align8, /* stack_alignment */ - rtos_ucos_iii_cortex_m_stack_offsets /* register_offsets */ + .stack_registers_size = 0x40, + .stack_growth_direction = -1, + .num_output_registers = ARRAY_SIZE(rtos_ucos_iii_cortex_m_stack_offsets), + .calculate_process_stack = rtos_generic_stack_align8, + .register_offsets = rtos_ucos_iii_cortex_m_stack_offsets }; const struct rtos_register_stacking rtos_ucos_iii_esi_risc_stacking = { - 0x4c, /* stack_registers_size */ - -1, /* stack_growth_direction */ - ARRAY_SIZE(rtos_ucos_iii_esi_risc_stack_offsets), /* num_output_registers */ - NULL, /* stack_alignment */ - rtos_ucos_iii_esi_risc_stack_offsets /* register_offsets */ + .stack_registers_size = 0x4c, + .stack_growth_direction = -1, + .num_output_registers = ARRAY_SIZE(rtos_ucos_iii_esi_risc_stack_offsets), + .register_offsets = rtos_ucos_iii_esi_risc_stack_offsets }; ----------------------------------------------------------------------- Summary of changes: src/rtos/ThreadX.c | 18 ++++++------- src/rtos/nuttx.c | 18 ++++++------- src/rtos/rtos_chibios_stackings.c | 18 ++++++------- src/rtos/rtos_ecos_stackings.c | 10 ++++---- src/rtos/rtos_embkernel_stackings.c | 10 ++++---- src/rtos/rtos_mqx_stackings.c | 9 +++---- src/rtos/rtos_riot_stackings.c | 20 +++++++-------- src/rtos/rtos_standard_stackings.c | 50 ++++++++++++++++++------------------- src/rtos/rtos_ucos_iii_stackings.c | 19 +++++++------- 9 files changed, 82 insertions(+), 90 deletions(-) hooks/post-receive -- Main OpenOCD repository |
From: OpenOCD-Gerrit <ope...@us...> - 2021-11-05 22:45:16
|
This is an automated email from the git hooks/post-receive script. It was generated because a ref change was pushed to the repository containing the project "Main OpenOCD repository". The branch, master has been updated via da434d7d5975c1c7ebae8e35eb71b6d2d6ad062e (commit) from 4afd8852bb320deea553504161bd2c79c434bb1b (commit) Those revisions listed above that are new to this repository have not appeared on any other notification email; so we list those revisions in full, below. - Log ----------------------------------------------------------------- commit da434d7d5975c1c7ebae8e35eb71b6d2d6ad062e Author: Paul Fertser <fer...@gm...> Date: Sat Oct 9 23:32:01 2021 +0300 jtag: drivers: bcm2835gpio: don't allow GPIOs > 31 Current code assumes all the GPIO signals are manipulated via a single 32-bit register so using higher GPIOs silently fails. Fix the check instead of trying to handle additional GPIOs (available on Raspberry Pi Compute Modules) as that would slow the driver down. Change-Id: Ib3b5864afb3b972d952f9b74665201cd93924959 Signed-off-by: Paul Fertser <fer...@gm...> Reviewed-on: https://review.openocd.org/c/openocd/+/6658 Tested-by: jenkins Reviewed-by: Antonio Borneo <bor...@gm...> diff --git a/doc/openocd.texi b/doc/openocd.texi index cd64c7aec..01bb4f21d 100644 --- a/doc/openocd.texi +++ b/doc/openocd.texi @@ -3207,6 +3207,8 @@ able to coexist nicely with both sysfs bitbanging and various peripherals' kernel drivers. The driver restores the previous configuration on exit. +GPIO numbers >= 32 can't be used for performance reasons. + See @file{interface/raspberrypi-native.cfg} for a sample config and pinout. diff --git a/src/jtag/drivers/bcm2835gpio.c b/src/jtag/drivers/bcm2835gpio.c index 95e077c33..fd6c28b96 100644 --- a/src/jtag/drivers/bcm2835gpio.c +++ b/src/jtag/drivers/bcm2835gpio.c @@ -198,7 +198,7 @@ static int bcm2835gpio_speed(int speed) static int is_gpio_valid(int gpio) { - return gpio >= 0 && gpio <= 53; + return gpio >= 0 && gpio <= 31; } COMMAND_HANDLER(bcm2835gpio_handle_jtag_gpionums) ----------------------------------------------------------------------- Summary of changes: doc/openocd.texi | 2 ++ src/jtag/drivers/bcm2835gpio.c | 2 +- 2 files changed, 3 insertions(+), 1 deletion(-) hooks/post-receive -- Main OpenOCD repository |
From: OpenOCD-Gerrit <ope...@us...> - 2021-11-05 22:44:51
|
This is an automated email from the git hooks/post-receive script. It was generated because a ref change was pushed to the repository containing the project "Main OpenOCD repository". The branch, master has been updated via 4afd8852bb320deea553504161bd2c79c434bb1b (commit) from 6fef2eca381ddcda593aca27290706873a9bcde2 (commit) Those revisions listed above that are new to this repository have not appeared on any other notification email; so we list those revisions in full, below. - Log ----------------------------------------------------------------- commit 4afd8852bb320deea553504161bd2c79c434bb1b Author: Andreas Fritiofson <and...@gm...> Date: Tue Oct 12 08:28:34 2021 +0200 Remove remaining references to FTD2XX driver This includes a USB blaster configuration that only worked with that low-level access and some obsolete build-tests. Change-Id: I53d27cbf782ebbd131b1af25e358adf35f2b4500 Signed-off-by: Andreas Fritiofson <and...@gm...> Reviewed-on: https://review.openocd.org/c/openocd/+/6660 Tested-by: jenkins Reviewed-by: Antonio Borneo <bor...@gm...> Reviewed-by: Tomas Vanek <va...@fb...> diff --git a/doc/openocd.texi b/doc/openocd.texi index 7bf0fe98b..cd64c7aec 100644 --- a/doc/openocd.texi +++ b/doc/openocd.texi @@ -2459,7 +2459,7 @@ This driver is for adapters using the MPSSE (Multi-Protocol Synchronous Serial Engine) mode built into many FTDI chips, such as the FT2232, FT4232 and FT232H. The driver is using libusb-1.0 in asynchronous mode to talk to the FTDI device, -bypassing intermediate libraries like libftdi or D2XX. +bypassing intermediate libraries like libftdi. Support for new FTDI based adapters can be added completely through configuration files, without the need to patch and rebuild OpenOCD. @@ -2728,13 +2728,6 @@ USB JTAG/USB-Blaster compatibles over one of the userspace libraries for FTDI chips. These interfaces have several commands, used to configure the driver before initializing the JTAG scan chain: -@deffn {Config Command} {usb_blaster device_desc} description -Provides the USB device description (the @emph{iProduct string}) -of the FTDI FT245 device. If not -specified, the FTDI default value is used. This setting is only valid -if compiled with FTD2XX support. -@end deffn - @deffn {Config Command} {usb_blaster vid_pid} vid pid The vendor ID and product ID of the FTDI FT245 device. If not specified, default values are used. diff --git a/src/jtag/drivers/openjtag.c b/src/jtag/drivers/openjtag.c index 123134f51..7340119a1 100644 --- a/src/jtag/drivers/openjtag.c +++ b/src/jtag/drivers/openjtag.c @@ -1,6 +1,6 @@ /******************************************************************************* * Driver for OpenJTAG Project (www.openjtag.org) * - * Compatible with libftdi and ftd2xx drivers. * + * Compatible with libftdi drivers. * * * * Cypress CY7C65215 support * * Copyright (C) 2015 Vianney le Clément de Saint-Marcq, Essensium NV * diff --git a/src/jtag/drivers/usb_blaster/ublast_access.h b/src/jtag/drivers/usb_blaster/ublast_access.h index ad20d65d4..ada764c1c 100644 --- a/src/jtag/drivers/usb_blaster/ublast_access.h +++ b/src/jtag/drivers/usb_blaster/ublast_access.h @@ -36,7 +36,6 @@ struct ublast_lowlevel { uint16_t ublast_pid; uint16_t ublast_vid_uninit; uint16_t ublast_pid_uninit; - char *ublast_device_desc; struct libusb_device_handle *libusb_dev; char *firmware_path; diff --git a/src/jtag/drivers/usb_blaster/usb_blaster.c b/src/jtag/drivers/usb_blaster/usb_blaster.c index cc1d4758f..049a24378 100644 --- a/src/jtag/drivers/usb_blaster/usb_blaster.c +++ b/src/jtag/drivers/usb_blaster/usb_blaster.c @@ -119,7 +119,6 @@ struct ublast_info { char *lowlevel_name; struct ublast_lowlevel *drv; - char *ublast_device_desc; uint16_t ublast_vid, ublast_pid; uint16_t ublast_vid_uninit, ublast_pid_uninit; int flags; @@ -140,7 +139,7 @@ static struct ublast_info info = { }; /* - * Available lowlevel drivers (FTDI, FTD2xx, ...) + * Available lowlevel drivers (FTDI, libusb, ...) */ struct drvs_map { char *name; @@ -874,7 +873,6 @@ static int ublast_init(void) info.drv->ublast_pid = info.ublast_pid; info.drv->ublast_vid_uninit = info.ublast_vid_uninit; info.drv->ublast_pid_uninit = info.ublast_pid_uninit; - info.drv->ublast_device_desc = info.ublast_device_desc; info.drv->firmware_path = info.firmware_path; info.flags |= info.drv->flags; @@ -908,16 +906,6 @@ static int ublast_quit(void) return info.drv->close(info.drv); } -COMMAND_HANDLER(ublast_handle_device_desc_command) -{ - if (CMD_ARGC != 1) - return ERROR_COMMAND_SYNTAX_ERROR; - - info.ublast_device_desc = strdup(CMD_ARGV[0]); - - return ERROR_OK; -} - COMMAND_HANDLER(ublast_handle_vid_pid_command) { if (CMD_ARGC > 4) { @@ -1031,13 +1019,6 @@ COMMAND_HANDLER(ublast_firmware_command) static const struct command_registration ublast_subcommand_handlers[] = { - { - .name = "device_desc", - .handler = ublast_handle_device_desc_command, - .mode = COMMAND_CONFIG, - .help = "set the USB device description of the USB-Blaster", - .usage = "description-string", - }, { .name = "vid_pid", .handler = ublast_handle_vid_pid_command, diff --git a/testing/build.test1/Makefile b/testing/build.test1/Makefile deleted file mode 100644 index 02b752307..000000000 --- a/testing/build.test1/Makefile +++ /dev/null @@ -1,95 +0,0 @@ -# -*- mode: makefile -*- -# -default: _complain_ -include ./local.uses - -%: _complain_ - - -_complain_: - @echo "" - @echo " Try the target: cygwin.buildtest or linux.buildtest " - @echo "" - -remove.install: - rm -rf ${INSTALL_DIR} - -.PHONY: remove.install - -cygwin.buildtest: - ${MAKE} -f Makefile.ftd2xx clean all - ${MAKE} -f Makefile.openocd cygwin.easy.permutations - ${MAKE} -f Makefile.openocd mingw32.easy.permutations - ${MAKE} -f Makefile.libftdi all - ${MAKE} -f Makefile.openocd cygwin.libftdi - -linux.buildtest: - ${MAKE} linux.easy.buildtest - ${MAKE} linux.ftd2xx_installed - ${MAKE} linux.ft2232_libftdi - @echo "" - @echo "" - @echo "========================================" - @echo " Linux Build Tests Complete " - @echo "========================================" - @echo "" - @echo "" - - -linux.easy.buildtest: - @test -d openocd || (echo "Where the source to openocd?" && exit 1) - ${MAKE} -f Makefile.openocd bootstrap - ${MAKE} -f Makefile.ftd2xx all - ${MAKE} -f Makefile.openocd linux.easy.permutations - -linux.ftd2xx_installed: - ${MAKE} remove.install - ${MAKE} linux.ftd2xx_installed.setup - ${MAKE} -f Makefile.openocd $@ - - linux.ft2232_libftdi: - ${MAKE} remove.install - ${MAKE} -f Makefile.libusb all - ${MAKE} -f Makefile.confuse all - ${MAKE} -f Makefile.libftdi all - ${MAKE} -f Makefile.openocd $@ - -# This target is used to "install" files from -# the FTDICHIP.COM tar.gz unpack directory -# into "a proper place" - where they should be found. -linux.ftd2xx_installed.setup: - mkdir -p ${INSTALL_DIR}/include - mkdir -p ${EXEC_PREFIX}/lib - @# - @# Sanity check - make sure the .H file is findable - @# - @f=$(FTD2XX_LINUX_DIR)/ftd2xx.h && \ - test -f $$f || (echo "Error: $$f not found" ; exit 1) - @# - @# Header files are simple... just copy them. - @# - cp $(FTD2XX_LINUX_DIR)/ftd2xx.h $(PREFIX)/include/. - cp $(FTD2XX_LINUX_DIR)/WinTypes.h $(PREFIX)/include/. - @# - @# .SO files are harder. - @# (1) copy them, (2) make links - @# - cp $(FTD2XX_LINUX_DIR)/libftd2xx.so.$(FTD2XX_LINUX_VERSION) $(EXEC_PREFIX)/lib/. - cd $(EXEC_PREFIX)/lib && rm -f libftd2xx.so.0 - cd $(EXEC_PREFIX)/lib && ln -s libftd2xx.so.$(FTD2XX_LINUX_VERSION) libftd2xx.so.0 - cd $(EXEC_PREFIX)/lib && rm -f libftd2xx.so - cd $(EXEC_PREFIX)/lib && ln -s libftd2xx.so.$(FTD2XX_LINUX_VERSION) libftd2xx.so - - -all.download: - mkdir -p ${VIRGINS} - ${MAKE} -f Makefile.confuse download - ${MAKE} -f Makefile.libftdi download - ${MAKE} -f Makefile.ftd2xx download - ${MAKE} -f Makefile.libusb download - -.PHONY: linux.buildtest \ - linux.easy.buildtest \ - linux.ftd2xx_installed \ - linux.ft22232_libftdi \ - linux.ftd2xx_installed.setup diff --git a/testing/build.test1/Makefile.confuse b/testing/build.test1/Makefile.confuse deleted file mode 100644 index 9d5a0673f..000000000 --- a/testing/build.test1/Makefile.confuse +++ /dev/null @@ -1,46 +0,0 @@ -# -*- mode: makefile -*- -default: _complain_ -include ./local.uses - -TARFILE_LOCAL=${VIRGINS}/confuse-${LIBCONFUSE_VERSION}.tar.gz -TARFILE_URL =http://www.intra2net.com/de/produkte/opensource/ftdi/TGZ/confuse-${LIBCONFUSE_VERSION}.tar.gz - -CONFUSE_SRC_DIR =${HERE}/confuse-${LIBCONFUSE_VERSION} -CONFUSE_BUILD_DIR =${HERE}/confuse-build - -download: - wget -O ${TARFILE_LOCAL} ${TARFILE_URL} - -unpack: - rm -rf ${CONFUSE_SRC_DIR} - tar xfz ${TARFILE_LOCAL} - -clean:: - rm -rf ${CONFUSE_SRC_DIR} - -configure: - rm -rf ${CONFUSE_BUILD_DIR} - mkdir ${CONFUSE_BUILD_DIR} - cd ${CONFUSE_BUILD_DIR} && ${CONFUSE_SRC_DIR}/configure \ - --prefix=${PREFIX} \ - --exec-prefix=${EXEC_PREFIX} - -clean:: - rm -rf ${CONFUSE_BUILD_DIR} - -build: - cd ${CONFUSE_BUILD_DIR} && ${MAKE} - -install: - cd ${CONFUSE_BUILD_DIR} && ${MAKE} install - -all: unpack configure build install - -_complain_: - @echo "" - @echo "Please try one of these targets: bootstrap, clean, configure, build, install" - @echo " Or read the makefile and learn about the permutation test targets" - @echo "" - @echo "You also might find the download and unpack targets helpful." - @echo "" - @exit 1 diff --git a/testing/build.test1/Makefile.ftd2xx b/testing/build.test1/Makefile.ftd2xx deleted file mode 100644 index 3f19e7720..000000000 --- a/testing/build.test1/Makefile.ftd2xx +++ /dev/null @@ -1,88 +0,0 @@ -# -*- mode: makefile -*- -# -default: _complain_ - -include ./local.uses - -# WARNING... the file on the ftdi chip site has a SPACE in the filename GRRR!!! -# We fix that with the "-O" option to wget. -ZIPFILE_LOCAL=${VIRGINS}/cdm.${FTD2XX_WIN32_VERSION}.zip -ZIPFILE_URL ="http://www.ftdichip.com/Drivers/CDM/CDM ${FTD2XX_WIN32_VERSION}.zip" - -TARFILE_LOCAL=${VIRGINS}/libftd2xx${FTD2XX_LINUX_VERSION}.tar.gz -TARFILE_URL =http://www.ftdichip.com/Drivers/D2XX/Linux/libftd2xx${FTD2XX_LINUX_VERSION}.tar.gz - -TARFILE_64_LOCAL=${VIRGINS}/libftd2xx${FTD2XX_LINUX_VERSION}_x86_64.tar.gz -TARFILE_64_URL =http://www.ftdichip.com/Drivers/D2XX/Linux/libftd2xx${FTD2XX_LINUX_VERSION}_x86_64.tar.gz - - -download.win32: - mkdir -p ${VIRGINS} - wget -O ${ZIPFILE_LOCAL} ${ZIPFILE_URL} - -unpack.win32: - rm -rf ${FTD2XX_WIN32_DIR} - mkdir -p ${FTD2XX_WIN32_DIR} - cd ${FTD2XX_WIN32_DIR} && unzip ${ZIPFILE_LOCAL} - -clean:: - rm -rf ${FTD2XX_WIN32_DIR} - -download.linux: - mkdir -p ${VIRGINS} - wget -O ${TARFILE_LOCAL} ${TARFILE_URL} - -clean:: - rm -rf ${FTD2XX_LINUX_DIR} - -unpack.linux: - rm -rf ${FTD2XX_LINUX_DIR} - mkdir -p ${FTD2XX_LINUX_DIR} - tar xfz ${TARFILE_LOCAL} - -download.linux.x86_64: - mkdir -p ${VIRGINS} - wget -O ${TARFILE_LOCAL} ${TARFILE_URL} - -unpack.linux.x86_64: - rm -rf ${FTD2XX_LINUX_64_DIR} - mkdir -p ${FTD2XX_LINUX_64_DIR} - tar xfz ${TARFILE_64_LOCAL} - -clean:: - rm -rf ${FTD2XX_LINUX_64_DIR} - -download: download.win32 download.linux - -unpack.cygwin unpack.mingw32: unpack.win32 - -unpack: unpack.${BUILD_SYSNAME} - -# Nothing to do here -build: - @echo "Done" - -#Nothing to do here -configure: - @echo "Done" - -# Nothing to do here -install: - @echo "Done" - -all: unpack configure build install - -.PHONY: install - -# Nothing to do here -clean:: - @echo "Done" - -_complain_: - @echo "" - @echo "Please try one of these targets: bootstrap, clean, configure, build, install" - @echo " Or read the makefile and learn about the permutation test targets" - @echo "" - @echo "You also might find the download and unpack targets helpful." - @echo "" - @exit 1 diff --git a/testing/build.test1/Makefile.libftdi b/testing/build.test1/Makefile.libftdi deleted file mode 100644 index 1a9612c05..000000000 --- a/testing/build.test1/Makefile.libftdi +++ /dev/null @@ -1,51 +0,0 @@ -# -*- mode: makefile -*- -default: _complain_ -include ./local.uses - -TARFILE_LOCAL = ${VIRGINS}/libftdi-${LIBFTDI_VERSION}.tar.gz -TARFILE_URL = http://www.intra2net.com/de/produkte/opensource/ftdi/TGZ/libftdi-${LIBFTDI_VERSION}.tar.gz - -LIBFTDI_SRC_DIR = ${HERE}/libftdi-${LIBFTDI_VERSION} -LIBFTDI_BUILD_DIR= ${HERE}/libftdi-build - -download: - mkdir -p virgins - wget -O ${TARFILE_LOCAL} ${TARFILE_URL} - -clean:: - rm -rf ${LIBFTDI_SRC_DIR} - -unpack: - tar xf ${TARFILE_LOCAL} - -PATH := ${EXEC_PREFIX}/bin:${PATH} -export PATH - -clean:: - rm -rf ${LIBFTDI_BUILD_DIR} - -configure: - rm -rf ${LIBFTDI_BUILD_DIR} - mkdir -p ${LIBFTDI_BUILD_DIR} - cd ${LIBFTDI_BUILD_DIR} && ${LIBFTDI_SRC_DIR}/configure \ - --prefix=${PREFIX} \ - --exec-prefix=${EXEC_PREFIX} - -build: - cd ${LIBFTDI_BUILD_DIR} && ${MAKE} - -install: - cd ${LIBFTDI_BUILD_DIR} && ${MAKE} install - -all: unpack configure build install - -.PHONY: install - -_complain_: - @echo "" - @echo "Please try one of these targets: bootstrap, clean, configure, build, install" - @echo " Or read the makefile and learn about the permutation test targets" - @echo "" - @echo "You also might find the download and unpack targets helpful." - @echo "" - @exit 1 diff --git a/testing/build.test1/Makefile.libusb b/testing/build.test1/Makefile.libusb deleted file mode 100644 index 815592a18..000000000 --- a/testing/build.test1/Makefile.libusb +++ /dev/null @@ -1,55 +0,0 @@ -# -*- mode: makefile -*- -default: _complain_ - -include ./local.uses - -ifeq (x"$BUILD_SYSNAME",x"cygwin") -$(error Please use the Win32 specific port of LibUSB not the Unix version) -endif -ifeq (x"$BUILD_SYSNAME",x"mingw32") -$(error Please use the win32 specific port of LibUSB not the Unix version) -endif - -TARFILE_LOCAL = ${VIRGINS}/libusb-${LIBUSB_VERSION_linux}.tar.bz2 -TARFILE_URL = http://downloads.sourceforge.net/libusb/libusb-${LIBUSB_VERSION_linux}.tar.gz - -LIBUSB_SRC_DIR = ${HERE}/libusb-${LIBUSB_VERSION} -LIBUSB_BUILD_DIR = ${HERE}/libusb-build - -download: - wget -O ${TARFILE_LOCAL} ${TARFILE_URL} - -unpack: - rm -rf ${LIBUSB_SRC_DIR} - tar xfz ${TARFILE_LOCAL} - -clean:: - rm -rf ${LIBUSB_SRC_DIR} - -configure: - rm -rf ${LIBUSB_BUILD_DIR} - mkdir -p ${LIBUSB_BUILD_DIR} - cd ${LIBUSB_BUILD_DIR} && ${LIBUSB_SRC_DIR}/configure \ - --prefix=${PREFIX} --exec-prefix=${EXEC_PREFIX} - -clean:: - rm -rf ${LIBUSB_BUILD_DIR} - -build: - cd ${LIBUSB_BUILD_DIR} && ${MAKE} - -install: - cd ${LIBUSB_BUILD_DIR} && ${MAKE} install - -all: unpack configure build install - -.PHONY: install - -_complain_: - @echo "" - @echo "Please try one of these targets: bootstrap, clean, configure, build, install" - @echo " Or read the makefile and learn about the permutation test targets" - @echo "" - @echo "You also might find the download and unpack targets helpful." - @echo "" - @exit 1 diff --git a/testing/build.test1/Makefile.openocd b/testing/build.test1/Makefile.openocd deleted file mode 100644 index 6b0cb56ff..000000000 --- a/testing/build.test1/Makefile.openocd +++ /dev/null @@ -1,193 +0,0 @@ -# -*- mode: makefile -*- -# -default: _complain_ - -include ./local.uses - - -SRC_DIR ?= $(HERE)/openocd -BUILD_SUFFIX ?= $(BUILD_MACHINE) -BUILD_DIR =$(HERE)/openocd.$(BUILD_SUFFIX) - -checkout: - svn co https://svn.berlios.de/svnroot/repos/openocd/trunk openocd - -remove.install: - rm -rf ${INSTALL_DIR} - -#======================================== -# Win32 Build Permutations -# none -# parport -# ftd2xx - (ftdichip) -# libftd -CONFIG_OPTIONS_win32_none = -CONFIG_OPTIONS_win32_parport = --enable-parport -CONFIG_OPTIONS_win32_ftd2xx = --enable-parport --enable-ft2232_ftd2xx --with-ftd2xx-win32-zipdir=$(FTD2XX_WIN32_DIR) - -CYGWIN_EASY_PERMUTATIONS += none -CYGWIN_EASY_PERMUTATIONS += parport -CYGWIN_EASY_PERMUTATIONS += ftd2xx - -MINGW32_EASY_PERMUTATIONS += none -MINGW32_EASY_PERMUTATIONS += parport -MINGW32_EASY_PERMUTATIONS += ftd2xx - - -# This is not a possible permutation, it is manual :-( -# Why? Because "libftdi" installs things into install/include -# which would efect the 'ftd2xx' win32 build -CONFIG_OPTIONS_win32_libftdi = --enable-parport --enable-ft2232_libftdi - -# Default build for win32... is the ftd2xx type build. -PERMUTE_win32 ?= ftd2xx -CONFIG_OPTIONS_win32 ?= $(CONFIG_OPTIONS_win32_$(PERMUTE_win32)) -CONFIG_OPTIONS_cygwin = $(CONFIG_OPTIONS_win32) -CONFIG_OPTIONS_mingw32 = $(CONFIG_OPTIONS_win32) - -#======================================== -# Linux Build Permuatations -# none -# parport -# ft2232_ftd2xx -# ft2232_libftdi -CONFIG_OPTIONS_linux_none = -LINUX_EASY_PERMUTATIONS += none - -CONFIG_OPTIONS_linux_parport = --enable-parport -LINUX_EASY_PERMUTATIONS += parport - -CONFIG_OPTIONS_linux_ft2232_libftdi = --enable-parport --enable-ft2232-libftdi -#this cannot be done as part of the permutations. -#LINUX_EASY_PERMUTATIONS += ft2232_libftdi - -CONFIG_OPTIONS_linux_ft2232_ftd2xx_static = \ - --enable-parport \ - --enable-ft2232-ftd2xx --with-ftd2xx-lib=static --with-ftd2xx-linux-tardir=$(FTD2XX_LINUX_DIR) -LINUX_EASY_PERMUTATIONS += ft2232_ftd2xx_static - -# this is not a possible permutation it is manual :-( -# why? because it interfers with the other permutations -# by "installing files" in the $(INSTALL_DIR) -CONFIG_OPTIONS_linux_ftd2xx_installed = \ - --enable-parport \ - --enable-ft2232-ftd2xx \ - --with-ftd2xx-lib=shared - -# The default build permutation is -PERMUTE_linux ?= ft2232_ftd2xx_static -CONFIG_OPTIONS_linux = $(CONFIG_OPTIONS_linux_$(PERMUTE_linux)) - -CONFIG_OPTIONS_darwin=\ - --enable-ftd2232-libftdi - -# Which build are we doing? -CONFIG_OPTIONS := $(CONFIG_OPTIONS_$(BUILD_SYSNAME)) - -bootstrap: - cd $(SRC_DIR) && bash ./bootstrap - -clean:: - rm -rf $(BUILD_DIR) - -ifndef CFLAGS -_CFLAGS=true -else -_CFLAGS=export CFLAGS="${CFLAGS}" -endif - - -# if this was given... then pass it on -configure: - @echo " Build Sysname: $(BUILD_SYSNAME)" - @echo " Config Options: $(CONFIG_OPTIONS)" - rm -rf $(BUILD_DIR) - mkdir $(BUILD_DIR) - ${_CFLAGS} && \ - cd $(BUILD_DIR) && \ - $(SRC_DIR)/configure \ - --prefix=$(PREFIX) \ - --exec-prefix=$(EXEC_PREFIX) \ - $(CONFIG_OPTIONS) - -build: - cd $(BUILD_DIR) && $(MAKE) - -install: - cd $(BUILD_DIR) && $(MAKE) install - -all: configure build install - -.PHONY: install - -# The "cygwin.libftdi" requires that libftdi be built -# and installed *PRIOR* to running this target. -# it is not part of the permutations because ... -# it interfers with the ftd2xx based builds -cygwin.libftdi: - $(MAKE) -f Makefile.openocd bootstrap - $(MAKE) BUILD_SUFFIX=$@ PERMUTE_win32=libftdi -f Makefile.openocd all - -cygwin.easy.permutations: remove.install ${CYGWIN_EASY_PERMUTATIONS:%=_cygwin.%} - -_cygwin.%: - @echo "" - @echo "" - @echo "========================================" - @echo "Permutation Build... $@" - @echo "========================================" - @echo "" - @echo "" - $(MAKE) PERMUTE_win32=$* BUILD_SUFFIX=cygwin.$* -f Makefile.openocd all - $(EXEC_PREFIX)/bin/openocd -v - -mingw32.easy.permutations: remove.install ${MINGW32_EASY_PERMUTATIONS:%=_mingw32.%} - -# I (duane) build openocd-mingw32 via Cygwin. -# Sadly, the "mingw32" buid for cygwin does not include -# the required "elf.h" header files... so ... -# we have them in our own private helper place. -_mingw32.%: - @echo "" - @echo "" - @echo "========================================" - @echo "Permutation Build... $@" - @echo "========================================" - @echo "" - @echo "" - CFLAGS="-mno-cygwin -I$(HERE)/mingw32_help/include" \ - $(MAKE) -f Makefile.openocd all ;\ - $(EXEC_PREFIX)/bin/openocd -v - -win32.permutations: mingw32.permutations cygwin.permutations - - -# SMOKE TEST - Build every linux permuation... -# If "openocd -v" does exit(0) we are good enough. - -linux.easy.permutations: remove.install ${LINUX_EASY_PERMUTATIONS:%=_linux.%} - - -_linux.%: - @echo "" - @echo "" - @echo "========================================" - @echo "Permutation Build... $@" - @echo "========================================" - @echo "" - @echo "" - $(MAKE) PERMUTE_linux=$* BUILD_SUFFIX=linux.$* -f Makefile.openocd all - $(EXEC_PREFIX)/bin/openocd -v - -linux.ftd2xx_installed: - ${MAKE} -f Makefile.openocd _$@ - -linux.ft2232_libftdi: - ${MAKE} -f Makefile.openocd _$@ - -_complain_: - @echo "" - @echo "Please try one of these targets: bootstrap, clean, configure, build, install" - @echo " Or read the makefile and learn about the permutation test targets" - @echo "" - @exit 1 diff --git a/testing/build.test1/README.TXT b/testing/build.test1/README.TXT deleted file mode 100644 index 7f4d401e8..000000000 --- a/testing/build.test1/README.TXT +++ /dev/null @@ -1,38 +0,0 @@ --- Duane Ellis'es test case for building numerous openocd configurations... -Dec 26,2008 ---------------------------------------------------------------------------- - -1) Make a directory some where.. - - mkdir ~/test - -2) Change to that directory - - cd ~/test - -3) Checkout OpenOCD in that directory. - - cd ~/test - svn co https://svn.berlios.de/svnroot/repos/openocd/trunk openocd - -4) Copy the "build.test1" directory to the "~/work" directory. - - - cd ~/test - cp ~/openocd/testing/build.test1/. ~/test/. - -5) If needed, download various components. - - cd ~/work - make all.download - - -6) For Linux - type: - - cd ~/work - make linux.buildtest - -7) For Cygwin - type: - - cd ~/work - make cygwin.buildtest diff --git a/testing/build.test1/local.uses b/testing/build.test1/local.uses deleted file mode 100644 index 6c6795b54..000000000 --- a/testing/build.test1/local.uses +++ /dev/null @@ -1,39 +0,0 @@ -# -*- mode: makefile -*- -HERE := $(shell pwd) - -# Solve problems on systems with DASH.. Grrr... -SHELL=/bin/bash -export SHELL - -VIRGINS=${HERE}/virgins - -# Determine the build platform. -BUILD_SYSNAME_Linux =linux -BUILD_SYSNAME_linux =linux -BUILD_SYSNAME_CYGWIN_NT =cygwin -BUILD_SYSNAME_MINGW32_NT =mingw32 -BUILD_SYSNAME_Darwin =darwin -BUILD_SYSNAME_darwin =darwin -BUILD_SYSNAME :=$(BUILD_SYSNAME_$(shell uname --sysname | cut -d'-' -f1)) - -# And machine (ie: i686, x86_64, or what) -BUILD_MACHINE :=$(BUILD_SYSNAME).$(shell uname -m) - - -INSTALL_DIR := $(HERE)/install -PREFIX := ${INSTALL_DIR} -EXEC_PREFIX := ${INSTALL_DIR}/${BUILD_MACHINE} - -LIBFTDI_VERSION=0.14 -LIBCONFUSE_VERSION=2.5 - -LIBUSB_VERSION_linux=0.1.12 - -LIBUSB_VERSION=${LIBUSB_VERSION_${BUILD_SYSNAME}} - -FTD2XX_WIN32_VERSION=2.04.14 -FTD2XX_WIN32_DIR = ${HERE}/ftd2xx.win32 - -FTD2XX_LINUX_VERSION=0.4.16 -FTD2XX_LINUX_DIR = ${HERE}/libftd2xx${FTD2XX_LINUX_VERSION} -FTD2XX_LINUX_64_DIR = ${HERE}/libftd2xx${FTD2XX_LINUX_VERSION}_x86_64 diff --git a/testing/build.test1/mingw32_help/include/elf.h b/testing/build.test1/mingw32_help/include/elf.h deleted file mode 100644 index 23d4aa2d5..000000000 --- a/testing/build.test1/mingw32_help/include/elf.h +++ /dev/null @@ -1,38 +0,0 @@ -/* elf.h - - Copyright 2005 Red Hat, Inc. - -This file is part of Cygwin. - -This software is a copyrighted work licensed under the terms of the -Cygwin license. Please consult the file "CYGWIN_LICENSE" for -details. */ - -#ifndef _ELF_H_ -#define _ELF_H_ - -#include <stdint.h> - -typedef signed char int8_t; -typedef unsigned char u_int8_t; -typedef short int16_t; -typedef unsigned short u_int16_t; -typedef int int32_t; -typedef unsigned int u_int32_t; -typedef long long int64_t; -typedef unsigned long long u_int64_t; -typedef int32_t register_t; - - -#ifdef __cplusplus -extern "C" { -#endif -#include <sys/types.h> -#include <sys/elf32.h> -#include <sys/elf64.h> -#include <sys/elf_generic.h> -#ifdef __cplusplus -} -#endif - -#endif /*_ELF_H_*/ diff --git a/testing/build.test1/mingw32_help/include/sys/cdefs.h b/testing/build.test1/mingw32_help/include/sys/cdefs.h deleted file mode 100644 index 606205a58..000000000 --- a/testing/build.test1/mingw32_help/include/sys/cdefs.h +++ /dev/null @@ -1,22 +0,0 @@ -/* sys/cdefs.h - - Copyright 1998, 2000, 2001 Red Hat, Inc. - -This file is part of Cygwin. - -This software is a copyrighted work licensed under the terms of the -Cygwin license. Please consult the file "CYGWIN_LICENSE" for -details. */ - -#ifndef _SYS_CDEFS_H -#define _SYS_CDEFS_H -#ifdef __cplusplus -#define __BEGIN_DECLS extern "C" { -#define __END_DECLS } -#else -#define __BEGIN_DECLS -#define __END_DECLS -#endif -#define __P(protos) protos /* full-blown ANSI C */ -#define __CONCAT(__x,__y) __x##__y -#endif diff --git a/testing/build.test1/mingw32_help/include/sys/elf32.h b/testing/build.test1/mingw32_help/include/sys/elf32.h deleted file mode 100644 index 5dfe9c8b0..000000000 --- a/testing/build.test1/mingw32_help/include/sys/elf32.h +++ /dev/null @@ -1,156 +0,0 @@ -/*- - * Copyright (c) 1996-1998 John D. Polstra. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - * $FreeBSD: src/sys/sys/elf32.h,v 1.8 2002/05/30 08:32:18 dfr Exp $ - */ - -#ifndef _SYS_ELF32_H_ -#define _SYS_ELF32_H_ 1 - -#include <sys/elf_common.h> - -/* - * ELF definitions common to all 32-bit architectures. - */ - -typedef u_int32_t Elf32_Addr; -typedef u_int16_t Elf32_Half; -typedef u_int32_t Elf32_Off; -typedef int32_t Elf32_Sword; -typedef u_int32_t Elf32_Word; -typedef u_int32_t Elf32_Size; -typedef Elf32_Off Elf32_Hashelt; - -/* - * ELF header. - */ - -typedef struct { - unsigned char e_ident[EI_NIDENT]; /* File identification. */ - Elf32_Half e_type; /* File type. */ - Elf32_Half e_machine; /* Machine architecture. */ - Elf32_Word e_version; /* ELF format version. */ - Elf32_Addr e_entry; /* Entry point. */ - Elf32_Off e_phoff; /* Program header file offset. */ - Elf32_Off e_shoff; /* Section header file offset. */ - Elf32_Word e_flags; /* Architecture-specific flags. */ - Elf32_Half e_ehsize; /* Size of ELF header in bytes. */ - Elf32_Half e_phentsize; /* Size of program header entry. */ - Elf32_Half e_phnum; /* Number of program header entries. */ - Elf32_Half e_shentsize; /* Size of section header entry. */ - Elf32_Half e_shnum; /* Number of section header entries. */ - Elf32_Half e_shstrndx; /* Section name strings section. */ -} Elf32_Ehdr; - -/* - * Section header. - */ - -typedef struct { - Elf32_Word sh_name; /* Section name (index into the - section header string table). */ - Elf32_Word sh_type; /* Section type. */ - Elf32_Word sh_flags; /* Section flags. */ - Elf32_Addr sh_addr; /* Address in memory image. */ - Elf32_Off sh_offset; /* Offset in file. */ - Elf32_Size sh_size; /* Size in bytes. */ - Elf32_Word sh_link; /* Index of a related section. */ - Elf32_Word sh_info; /* Depends on section type. */ - Elf32_Size sh_addralign; /* Alignment in bytes. */ - Elf32_Size sh_entsize; /* Size of each entry in section. */ -} Elf32_Shdr; - -/* - * Program header. - */ - -typedef struct { - Elf32_Word p_type; /* Entry type. */ - Elf32_Off p_offset; /* File offset of contents. */ - Elf32_Addr p_vaddr; /* Virtual address in memory image. */ - Elf32_Addr p_paddr; /* Physical address (not used). */ - Elf32_Size p_filesz; /* Size of contents in file. */ - Elf32_Size p_memsz; /* Size of contents in memory. */ - Elf32_Word p_flags; /* Access permission flags. */ - Elf32_Size p_align; /* Alignment in memory and file. */ -} Elf32_Phdr; - -/* - * Dynamic structure. The ".dynamic" section contains an array of them. - */ - -typedef struct { - Elf32_Sword d_tag; /* Entry type. */ - union { - Elf32_Size d_val; /* Integer value. */ - Elf32_Addr d_ptr; /* Address value. */ - } d_un; -} Elf32_Dyn; - -/* - * Relocation entries. - */ - -/* Relocations that don't need an addend field. */ -typedef struct { - Elf32_Addr r_offset; /* Location to be relocated. */ - Elf32_Word r_info; /* Relocation type and symbol index. */ -} Elf32_Rel; - -/* Relocations that need an addend field. */ -typedef struct { - Elf32_Addr r_offset; /* Location to be relocated. */ - Elf32_Word r_info; /* Relocation type and symbol index. */ - Elf32_Sword r_addend; /* Addend. */ -} Elf32_Rela; - -/* Macros for accessing the fields of r_info. */ -#define ELF32_R_SYM(info) ((info) >> 8) -#define ELF32_R_TYPE(info) ((unsigned char)(info)) - -/* Macro for constructing r_info from field values. */ -#define ELF32_R_INFO(sym, type) (((sym) << 8) + (unsigned char)(type)) - -/* - * Symbol table entries. - */ - -typedef struct { - Elf32_Word st_name; /* String table index of name. */ - Elf32_Addr st_value; /* Symbol value. */ - Elf32_Size st_size; /* Size of associated object. */ - unsigned char st_info; /* Type and binding information. */ - unsigned char st_other; /* Reserved (not used). */ - Elf32_Half st_shndx; /* Section index of symbol. */ -} Elf32_Sym; - -/* Macros for accessing the fields of st_info. */ -#define ELF32_ST_BIND(info) ((info) >> 4) -#define ELF32_ST_TYPE(info) ((info) & 0xf) - -/* Macro for constructing st_info from field values. */ -#define ELF32_ST_INFO(bind, type) (((bind) << 4) + ((type) & 0xf)) - -#endif /* !_SYS_ELF32_H_ */ diff --git a/testing/build.test1/mingw32_help/include/sys/elf64.h b/testing/build.test1/mingw32_help/include/sys/elf64.h deleted file mode 100644 index 48556be5f..000000000 --- a/testing/build.test1/mingw32_help/include/sys/elf64.h +++ /dev/null @@ -1,172 +0,0 @@ -/*- - * Copyright (c) 1996-1998 John D. Polstra. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - * $FreeBSD: src/sys/sys/elf64.h,v 1.10 2002/05/30 08:32:18 dfr Exp $ - */ - -#ifndef _SYS_ELF64_H_ -#define _SYS_ELF64_H_ 1 - -#include <sys/elf_common.h> - -/* - * ELF definitions common to all 64-bit architectures. - */ - -typedef uint64_t Elf64_Addr; -typedef uint16_t Elf64_Half; -typedef uint32_t Elf64_Word; -typedef int32_t Elf64_Sword; -typedef uint64_t Elf64_Xword; -typedef int64_t Elf64_Sxword; -typedef uint64_t Elf64_Off; -typedef uint16_t Elf64_Section; -typedef Elf64_Half Elf64_Versym; -typedef uint16_t Elf64_Quarter; - -/* - * Types of dynamic symbol hash table bucket and chain elements. - * - * This is inconsistent among 64 bit architectures, so a machine dependent - * typedef is required. - */ - -#ifdef __alpha__ -typedef Elf64_Off Elf64_Hashelt; -#else -typedef Elf64_Half Elf64_Hashelt; -#endif - -/* - * ELF header. - */ - -typedef struct { - unsigned char e_ident[EI_NIDENT]; /* File identification. */ - Elf64_Half e_type; /* File type. */ - Elf64_Half e_machine; /* Machine architecture. */ - Elf64_Word e_version; /* ELF format version. */ - Elf64_Addr e_entry; /* Entry point. */ - Elf64_Off e_phoff; /* Program header file offset. */ - Elf64_Off e_shoff; /* Section header file offset. */ - Elf64_Word e_flags; /* Architecture-specific flags. */ - Elf64_Half e_ehsize; /* Size of ELF header in bytes. */ - Elf64_Half e_phentsize; /* Size of program header entry. */ - Elf64_Half e_phnum; /* Number of program header entries. */ - Elf64_Half e_shentsize; /* Size of section header entry. */ - Elf64_Half e_shnum; /* Number of section header entries. */ - Elf64_Half e_shstrndx; /* Section name strings section. */ -} Elf64_Ehdr; - -/* - * Section header. - */ - -typedef struct { - Elf64_Word sh_name; /* Section name (index into the - section header string table). */ - Elf64_Word sh_type; /* Section type. */ - Elf64_Xword sh_flags; /* Section flags. */ - Elf64_Addr sh_addr; /* Address in memory image. */ - Elf64_Off sh_offset; /* Offset in file. */ - Elf64_Xword sh_size; /* Size in bytes. */ - Elf64_Word sh_link; /* Index of a related section. */ - Elf64_Word sh_info; /* Depends on section type. */ - Elf64_Xword sh_addralign; /* Alignment in bytes. */ - Elf64_Xword sh_entsize; /* Size of each entry in section. */ -} Elf64_Shdr; - -/* - * Program header. - */ - -typedef struct { - Elf64_Word p_type; /* Entry type. */ - Elf64_Word p_flags; /* Access permission flags. */ - Elf64_Off p_offset; /* File offset of contents. */ - Elf64_Addr p_vaddr; /* Virtual address in memory image. */ - Elf64_Addr p_paddr; /* Physical address (not used). */ - Elf64_Xword p_filesz; /* Size of contents in file. */ - Elf64_Xword p_memsz; /* Size of contents in memory. */ - Elf64_Xword p_align; /* Alignment in memory and file. */ -} Elf64_Phdr; - -/* - * Dynamic structure. The ".dynamic" section contains an array of them. - */ - -typedef struct { - Elf64_Sxword d_tag; /* Entry type. */ - union { - Elf64_Xword d_val; /* Integer value. */ - Elf64_Addr d_ptr; /* Address value. */ - } d_un; -} Elf64_Dyn; - -/* - * Relocation entries. - */ - -/* Relocations that don't need an addend field. */ -typedef struct { - Elf64_Addr r_offset; /* Location to be relocated. */ - Elf64_Xword r_info; /* Relocation type and symbol index. */ -} Elf64_Rel; - -/* Relocations that need an addend field. */ -typedef struct { - Elf64_Addr r_offset; /* Location to be relocated. */ - Elf64_Xword r_info; /* Relocation type and symbol index. */ - Elf64_Sxword r_addend; /* Addend. */ -} Elf64_Rela; - -/* Macros for accessing the fields of r_info. */ -#define ELF64_R_SYM(info) ((info) >> 32) -#define ELF64_R_TYPE(info) ((unsigned char)(info)) - -/* Macro for constructing r_info from field values. */ -#define ELF64_R_INFO(sym, type) (((sym) << 32) + (unsigned char)(type)) - -/* - * Symbol table entries. - */ - -typedef struct { - Elf64_Word st_name; /* String table index of name. */ - unsigned char st_info; /* Type and binding information. */ - unsigned char st_other; /* Reserved (not used). */ - Elf64_Section st_shndx; /* Section index of symbol. */ - Elf64_Addr st_value; /* Symbol value. */ - Elf64_Xword st_size; /* Size of associated object. */ -} Elf64_Sym; - -/* Macros for accessing the fields of st_info. */ -#define ELF64_ST_BIND(info) ((info) >> 4) -#define ELF64_ST_TYPE(info) ((info) & 0xf) - -/* Macro for constructing st_info from field values. */ -#define ELF64_ST_INFO(bind, type) (((bind) << 4) + ((type) & 0xf)) - -#endif /* !_SYS_ELF64_H_ */ diff --git a/testing/build.test1/mingw32_help/include/sys/elf_common.h b/testing/build.test1/mingw32_help/include/sys/elf_common.h deleted file mode 100644 index b864f0464..000000000 --- a/testing/build.test1/mingw32_help/include/sys/elf_common.h +++ /dev/null @@ -1,299 +0,0 @@ -/*- - * Copyright (c) 1998 John D. Polstra. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - * $FreeBSD: src/sys/sys/elf_common.h,v 1.15 2004/05/05 02:38:54 marcel Exp $ - */ - -#ifndef _SYS_ELF_COMMON_H_ -#define _SYS_ELF_COMMON_H_ 1 - -/* - * ELF definitions that are independent of architecture or word size. - */ - -/* - * Note header. The ".note" section contains an array of notes. Each - * begins with this header, aligned to a word boundary. Immediately - * following the note header is n_namesz bytes of name, padded to the - * next word boundary. Then comes n_descsz bytes of descriptor, again - * padded to a word boundary. The values of n_namesz and n_descsz do - * not include the padding. - */ - -typedef struct { - u_int32_t n_namesz; /* Length of name. */ - u_int32_t n_descsz; /* Length of descriptor. */ - u_int32_t n_type; /* Type of this note. */ -} Elf_Note; - -/* Indexes into the e_ident array. Keep synced with - http://www.sco.com/developer/gabi/ch4.eheader.html */ -#define EI_MAG0 0 /* Magic number, byte 0. */ -#define EI_MAG1 1 /* Magic number, byte 1. */ -#define EI_MAG2 2 /* Magic number, byte 2. */ -#define EI_MAG3 3 /* Magic number, byte 3. */ -#define EI_CLASS 4 /* Class of machine. */ -#define EI_DATA 5 /* Data format. */ -#define EI_VERSION 6 /* ELF format version. */ -#define EI_OSABI 7 /* Operating system / ABI identification */ -#define EI_ABIVERSION 8 /* ABI version */ -#define OLD_EI_BRAND 8 /* Start of architecture identification. */ -#define EI_PAD 9 /* Start of padding (per SVR4 ABI). */ -#define EI_NIDENT 16 /* Size of e_ident array. */ - -/* Values for the magic number bytes. */ -#define ELFMAG0 0x7f -#define ELFMAG1 'E' -#define ELFMAG2 'L' -#define ELFMAG3 'F' -#define ELFMAG "\177ELF" /* magic string */ -#define SELFMAG 4 /* magic string size */ - -/* Values for e_ident[EI_VERSION] and e_version. */ -#define EV_NONE 0 -#define EV_CURRENT 1 - -/* Values for e_ident[EI_CLASS]. */ -#define ELFCLASSNONE 0 /* Unknown class. */ -#define ELFCLASS32 1 /* 32-bit architecture. */ -#define ELFCLASS64 2 /* 64-bit architecture. */ - -/* Values for e_ident[EI_DATA]. */ -#define ELFDATANONE 0 /* Unknown data format. */ -#define ELFDATA2LSB 1 /* 2's complement little-endian. */ -#define ELFDATA2MSB 2 /* 2's complement big-endian. */ - -/* Values for e_ident[EI_OSABI]. */ -#define ELFOSABI_SYSV 0 /* UNIX System V ABI */ -#define ELFOSABI_NONE ELFOSABI_SYSV /* symbol used in old spec */ -#define ELFOSABI_HPUX 1 /* HP-UX operating system */ -#define ELFOSABI_NETBSD 2 /* NetBSD */ -#define ELFOSABI_LINUX 3 /* GNU/Linux */ -#define ELFOSABI_HURD 4 /* GNU/Hurd */ -#define ELFOSABI_86OPEN 5 /* 86Open common IA32 ABI */ -#define ELFOSABI_SOLARIS 6 /* Solaris */ -#define ELFOSABI_MONTEREY 7 /* Monterey */ -#define ELFOSABI_IRIX 8 /* IRIX */ -#define ELFOSABI_FREEBSD 9 /* FreeBSD */ -#define ELFOSABI_TRU64 10 /* TRU64 UNIX */ -#define ELFOSABI_MODESTO 11 /* Novell Modesto */ -#define ELFOSABI_OPENBSD 12 /* OpenBSD */ -#define ELFOSABI_ARM 97 /* ARM */ -#define ELFOSABI_STANDALONE 255 /* Standalone (embedded) application */ - -/* e_ident */ -#define IS_ELF(ehdr) ((ehdr).e_ident[EI_MAG0] == ELFMAG0 && \ - (ehdr).e_ident[EI_MAG1] == ELFMAG1 && \ - (ehdr).e_ident[EI_MAG2] == ELFMAG2 && \ - (ehdr).e_ident[EI_MAG3] == ELFMAG3) - -/* Values for e_type. */ -#define ET_NONE 0 /* Unknown type. */ -#define ET_REL 1 /* Relocatable. */ -#define ET_EXEC 2 /* Executable. */ -#define ET_DYN 3 /* Shared object. */ -#define ET_CORE 4 /* Core file. */ - -/* Values for e_machine. */ -#define EM_NONE 0 /* Unknown machine. */ -#define EM_M32 1 /* AT&T WE32100. */ -#define EM_SPARC 2 /* Sun SPARC. */ -#define EM_386 3 /* Intel i386. */ -#define EM_68K 4 /* Motorola 68000. */ -#define EM_88K 5 /* Motorola 88000. */ -#define EM_486 6 /* Intel i486. */ -#define EM_860 7 /* Intel i860. */ -#define EM_MIPS 8 /* MIPS R3000 Big-Endian only */ - -/* Extensions. This list is not complete. */ -#define EM_S370 9 /* IBM System/370 */ -#define EM_MIPS_RS4_BE 10 /* MIPS R4000 Big-Endian */ /* Depreciated */ -#define EM_PARISC 15 /* HPPA */ -#define EM_SPARC32PLUS 18 /* SPARC v8plus */ -#define EM_PPC 20 /* PowerPC 32-bit */ -#define EM_PPC64 21 /* PowerPC 64-bit */ -#define EM_ARM 40 /* ARM */ -#define EM_SPARCV9 43 /* SPARC v9 64-bit */ -#define EM_IA_64 50 /* Intel IA-64 Processor */ -#define EM_X86_64 62 /* Advanced Micro Devices x86-64 */ -#define EM_ALPHA 0x9026 /* Alpha (written in the absence of an ABI */ - -/* Special section indexes. */ -#define SHN_UNDEF 0 /* Undefined, missing, irrelevant. */ -#define SHN_LORESERVE 0xff00 /* First of reserved range. */ -#define SHN_LOPROC 0xff00 /* First processor-specific. */ -#define SHN_HIPROC 0xff1f /* Last processor-specific. */ -#define SHN_ABS 0xfff1 /* Absolute values. */ -#define SHN_COMMON 0xfff2 /* Common data. */ -#define SHN_HIRESERVE 0xffff /* Last of reserved range. */ - -/* sh_type */ -#define SHT_NULL 0 /* inactive */ -#define SHT_PROGBITS 1 /* program defined information */ -#define SHT_SYMTAB 2 /* symbol table section */ -#define SHT_STRTAB 3 /* string table section */ -#define SHT_RELA 4 /* relocation section with addends */ -#define SHT_HASH 5 /* symbol hash table section */ -#define SHT_DYNAMIC 6 /* dynamic section */ -#define SHT_NOTE 7 /* note section */ -#define SHT_NOBITS 8 /* no space section */ -#define SHT_REL 9 /* relocation section - no addends */ -#define SHT_SHLIB 10 /* reserved - purpose unknown */ -#define SHT_DYNSYM 11 /* dynamic symbol table section */ -#define SHT_NUM 12 /* number of section types */ -#define SHT_LOOS 0x60000000 /* First of OS specific semantics */ -#define SHT_HIOS 0x6fffffff /* Last of OS specific semantics */ -#define SHT_LOPROC 0x70000000 /* reserved range for processor */ -#define SHT_HIPROC 0x7fffffff /* specific section header types */ -#define SHT_LOUSER 0x80000000 /* reserved range for application */ -#define SHT_HIUSER 0xffffffff /* specific indexes */ - -/* Flags for sh_flags. */ -#define SHF_WRITE 0x1 /* Section contains writable data. */ -#define SHF_ALLOC 0x2 /* Section occupies memory. */ -#define SHF_EXECINSTR 0x4 /* Section contains instructions. */ -#define SHF_TLS 0x400 /* Section contains TLS data. */ -#define SHF_MASKPROC 0xf0000000 /* Reserved for processor-specific. */ - -/* Values for p_type. */ -#define PT_NULL 0 /* Unused entry. */ -#define PT_LOAD 1 /* Loadable segment. */ -#define PT_DYNAMIC 2 /* Dynamic linking information segment. */ -#define PT_INTERP 3 /* Pathname of interpreter. */ -#define PT_NOTE 4 /* Auxiliary information. */ -#define PT_SHLIB 5 /* Reserved (not used). */ -#define PT_PHDR 6 /* Location of program header itself. */ -#define PT_TLS 7 /* Thread local storage segment */ - -#define PT_COUNT 8 /* Number of defined p_type values. */ - -#define PT_LOOS 0x60000000 /* OS-specific */ -#define PT_HIOS 0x6fffffff /* OS-specific */ -#define PT_LOPROC 0x70000000 /* First processor-specific type. */ -#define PT_HIPROC 0x7fffffff /* Last processor-specific type. */ - -/* Values for p_flags. */ -#define PF_X 0x1 /* Executable. */ -#define PF_W 0x2 /* Writable. */ -#define PF_R 0x4 /* Readable. */ - -/* Values for d_tag. */ -#define DT_NULL 0 /* Terminating entry. */ -#define DT_NEEDED 1 /* String table offset of a needed shared - library. */ -#define DT_PLTRELSZ 2 /* Total size in bytes of PLT relocations. */ -#define DT_PLTGOT 3 /* Processor-dependent address. */ -#define DT_HASH 4 /* Address of symbol hash table. */ -#define DT_STRTAB 5 /* Address of string table. */ -#define DT_SYMTAB 6 /* Address of symbol table. */ -#define DT_RELA 7 /* Address of ElfNN_Rela relocations. */ -#define DT_RELASZ 8 /* Total size of ElfNN_Rela relocations. */ -#define DT_RELAENT 9 /* Size of each ElfNN_Rela relocation entry. */ -#define DT_STRSZ 10 /* Size of string table. */ -#define DT_SYMENT 11 /* Size of each symbol table entry. */ -#define DT_INIT 12 /* Address of initialization function. */ -#define DT_FINI 13 /* Address of finalization function. */ -#define DT_SONAME 14 /* String table offset of shared object - name. */ -#define DT_RPATH 15 /* String table offset of library path. [sup] */ -#define DT_SYMBOLIC 16 /* Indicates "symbolic" linking. [sup] */ -#define DT_REL 17 /* Address of ElfNN_Rel relocations. */ -#define DT_RELSZ 18 /* Total size of ElfNN_Rel relocations. */ -#define DT_RELENT 19 /* Size of each ElfNN_Rel relocation. */ -#define DT_PLTREL 20 /* Type of relocation used for PLT. */ -#define DT_DEBUG 21 /* Reserved (not used). */ -#define DT_TEXTREL 22 /* Indicates there may be relocations in - non-writable segments. [sup] */ -#define DT_JMPREL 23 /* Address of PLT relocations. */ -#define DT_BIND_NOW 24 /* [sup] */ -#define DT_INIT_ARRAY 25 /* Address of the array of pointers to - initialization functions */ -#define DT_FINI_ARRAY 26 /* Address of the array of pointers to - termination functions */ -#define DT_INIT_ARRAYSZ 27 /* Size in bytes of the array of - initialization functions. */ -#define DT_FINI_ARRAYSZ 28 /* Size in bytes of the array of - terminationfunctions. */ -#define DT_RUNPATH 29 /* String table offset of a null-terminated - library search path string. */ -#define DT_FLAGS 30 /* Object specific flag values. */ -#define DT_ENCODING 32 /* Values greater than or equal to DT_ENCODING - and less than DT_LOOS follow the rules for - the interpretation of the d_un union - as follows: even == 'd_ptr', even == 'd_val' - or none */ -#define DT_PREINIT_ARRAY 32 /* Address of the array of pointers to - pre-initialization functions. */ -#define DT_PREINIT_ARRAYSZ 33 /* Size in bytes of the array of - pre-initialization functions. */ - -#define DT_COUNT 33 /* Number of defined d_tag values. */ - -#define DT_LOOS 0x6000000d /* First OS-specific */ -#define DT_HIOS 0x6fff0000 /* Last OS-specific */ -#define DT_LOPROC 0x70000000 /* First processor-specific type. */ -#define DT_HIPROC 0x7fffffff /* Last processor-specific type. */ - -/* Values for DT_FLAGS */ -#define DF_ORIGIN 0x0001 /* Indicates that the object being loaded may - make reference to the $ORIGIN substitution - string */ -#define DF_SYMBOLIC 0x0002 /* Indicates "symbolic" linking. */ -#define DF_TEXTREL 0x0004 /* Indicates there may be relocations in - non-writable segments. */ -#define DF_BIND_NOW 0x0008 /* Indicates that the dynamic linker should - process all relocations for the object - containing this entry before transferring - control to the program. */ -#define DF_STATIC_TLS 0x0010 /* Indicates that the shared object or - executable contains code using a static - thread-local storage scheme. */ - -/* Values for n_type. Used in core files. */ -#define NT_PRSTATUS 1 /* Process status. */ -#define NT_FPREGSET 2 /* Floating point registers. */ -#define NT_PRPSINFO 3 /* Process state info. */ - -/* Symbol Binding - ELFNN_ST_BIND - st_info */ -#define STB_LOCAL 0 /* Local symbol */ -#define STB_GLOBAL 1 /* Global symbol */ -#define STB_WEAK 2 /* like global - lower precedence */ -#define STB_LOPROC 13 /* reserved range for processor */ -#define STB_HIPROC 15 /* specific symbol bindings */ - -/* Symbol type - ELFNN_ST_TYPE - st_info */ -#define STT_NOTYPE 0 /* Unspecified type. */ -#define STT_OBJECT 1 /* Data object. */ -#define STT_FUNC 2 /* Function. */ -#define STT_SECTION 3 /* Section. */ -#define STT_FILE 4 /* Source file. */ -#define STT_TLS 6 /* TLS object. */ -#define STT_LOPROC 13 /* reserved range for processor */ -#define STT_HIPROC 15 /* specific symbol types */ - -/* Special symbol table indexes. */ -#define STN_UNDEF 0 /* Undefined symbol index. */ - -#endif /* !_SYS_ELF_COMMON_H_ */ diff --git a/testing/build.test1/mingw32_help/include/sys/elf_generic.h b/testing/build.test1/mingw32_help/include/sys/elf_generic.h deleted file mode 100644 index dbe9f1e83..000000000 --- a/testing/build.test1/mingw32_help/include/sys/elf_generic.h +++ /dev/null @@ -1,91 +0,0 @@ -/*- - * Copyright (c) 1998 John D. Polstra. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - * $FreeBSD: src/sys/sys/elf_generic.h,v 1.6 2002/07/20 02:56:11 peter Exp $ - */ - -#ifndef _SYS_ELF_GENERIC_H_ -#define _SYS_ELF_GENERIC_H_ 1 - -#include <sys/cdefs.h> - -/* - * Definitions of generic ELF names which relieve applications from - * needing to know the word size. - */ - -#ifndef __ELF_WORD_SIZE -# define __ELF_WORD_SIZE 32 -#endif - -#if __ELF_WORD_SIZE != 32 && __ELF_WORD_SIZE != 64 -#error "__ELF_WORD_SIZE must be defined as 32 or 64" -#endif - -#define ELF_CLASS __CONCAT(ELFCLASS,__ELF_WORD_SIZE) - -#if BYTE_ORDER == LITTLE_ENDIAN -#define ELF_DATA ELFDATA2LSB -#elif BYTE_ORDER == BIG_ENDIAN -#define ELF_DATA ELFDATA2MSB -#else -#error "Unknown byte order" -#endif - -#if __ELF_WORD_SIZE == 32 -#define __elfN(x) elf32_##x -#define __ElfN(x) Elf32_##x -#define __ELFN(x) ELF32_##x -#else -#define __elfN(x) elf364_##x -#define __ElfN(x) Elf364_##x -#define __ELFN(x) ELF364_##x -#endif -#define __ElfType(x) typedef __ElfN(x) Elf_##x - -#define FOO -__ElfType(Addr); -__ElfType(Half); -__ElfType(Off); -__ElfType(Sword); -__ElfType(Word); -__ElfType(Size); -__ElfType(Hashelt); -__ElfType(Ehdr); -__ElfType(Shdr); -__ElfType(Phdr); -__ElfType(Dyn); -__ElfType(Rel); -__ElfType(Rela); -__ElfType(Sym); - -#define ELF_R_SYM __ELFN(R_SYM) -#define ELF_R_TYPE __ELFN(R_TYPE) -#define ELF_R_INFO __ELFN(R_INFO) -#define ELF_ST_BIND __ELFN(ST_BIND) -#define ELF_ST_TYPE __ELFN(ST_TYPE) -#define ELF_ST_INFO __ELFN(ST_INFO) - -#endif /* !_SYS_ELF_GENERIC_H_ */ diff --git a/testing/build.test2/Makefile b/testing/build.test2/Makefile deleted file mode 100644 index d4c428edd..000000000 --- a/testing/build.test2/Makefile +++ /dev/null @@ -1,193 +0,0 @@ -# -*- mode: makefile -*- -#======================================== -# DO NOT DELETE THE LINE BELOW -_default: default -# DO NOT DELETE THE LINE_ABOVE -#======================================== - -#======================================== -# -# There are no user configurable options here. -# -# All user configurable options are in local.uses -# -include ./local.uses -# -#======================================== - -#======================================== -# This is the USB driver for the FTDI2XX chips. -# It is a "closed" solution from FTDICHIP.COM -# Some claim it is faster then the open/free -# solution: win32-libusb+libftdi. -# -ftd2xx.download: - mkdir -p ${VIRGINS} - wget -O ${FTD2XX_ZIPFILE_LOCAL} \ - ${FTD2XX_ZIPFILE_URL} - -ftd2xx.unpack: - rm -rf ${FTD2XX_WIN32_DIR} - mkdir -p ${FTD2XX_WIN32_DIR} - cd ${FTD2XX_WIN32_DIR} && unzip \ - ${FTD2XX_ZIPFILE_LOCAL} - -ftd2xx.build: - @echo "Nothing to do for: $@" - -ftd2xx.configure: - @echo "Nothing to do for: $@" - -ftd2xx.install: - @echo "Nothing to do for: $@" - -clean:: - rm -rf ${FTD2XX_WIN32_DIR} - -ftd2xx.all: ftd2xx.unpack ftd2xx.configure \ - ftd2xx.build ftd2xx.install - - -#========================================- -# LIBFTDI - requires LIBCONFUSE.. -# So we handle it here :-( - -libconfuse.download: - mkdir -p virgins - wget -O ${LIBCONFUSE_TARFILE_LOCAL} \ - ${LIBCONFUSE_TARFILE_URL} - -libconfuse.unpack: - tar xfz ${LIBCONFUSE_TARFILE_LOCAL} - -clean:: - rm -rf ${LIBCONFUSE_SRC_DIR} - -libconfuse.configure: - rm -rf ${LIBCONFUSE_BUILD_DIR} - mkdir -p ${LIBCONFUSE_BUILD_DIR} - cd ${LIBCONFUSE_BUILD_DIR} && \ - ${LIBCONFUSE_SRC_DIR}/configure \ - --prefix=${PREFIX} - -clean:: - rm -rf ${LIBCONFUSE_BUILD_DIR} - -libconfuse.build: - cd ${LIBCONFUSE_BUILD_DIR} && ${MAKE} - -libconfuse.install: - cd ${LIBCONFUSE_BUILD_DIR} && ${MAKE} install - -libconfuse.all: libconfuse.unpack libconfuse.configure \ - libconfuse.build libconfuse.install - -#======================================== -# LIBFTDI - the open source (and free) -# alternative to (closed) FTD2XX drivers. - -libftdi.download: - mkdir -p virgins - wget -O ${LIBFTDI_TARFILE_LOCAL} \ - ${LIBFTDI_TARFILE_URL} - -libftdi.unpack: - tar xfz ${LIBFTDI_TARFILE_LOCAL} - -clean:: - rm -rf ${LIBFTDI_SRC_DIR} - -libftdi.configure: - rm -rf ${LIBFTDI_BUILD_DIR} - mkdir -p ${LIBFTDI_BUILD_DIR} - cd ${LIBFTDI_BUILD_DIR} && \ - ${LIBFTDI_SRC_DIR}/configure \ - --prefix=${PREFIX} - -clean:: - rm -rf ${LIBFTDI_BUILD_DIR} - -libftdi.build: - cd ${LIBFTDI_BUILD_DIR} && ${MAKE} - -libftdi.install: - cd ${LIBFTDI_BUILD_DIR} && ${MAKE} install - -libftdi.all: libftdi.unpack libftdi.configure \ - libftdi.build libftdi.install - -#======================================== -# Openocd... - -openocd.bootstrap: - cd ${OPENOCD_SRC_DIR} && bash ./bootstrap - -openocd.configure: - rm -rf ${OPENOCD_BUILD_DIR} - mkdir -p ${OPENOCD_BUILD_DIR} - cd ${OPENOCD_BUILD_DIR} && ${OPENOCD_SRC_DIR}/configure \ - --prefix=${INSTALL_DIR} \ - ${OPENOCD_CONFIG_OPTIONS} - -openocd.build: - cd ${OPENOCD_BUILD_DIR} && ${MAKE} - -openocd.docs: - cd ${OPENOCD_BUILD_DIR}/docs && ${MAKE} - -openocd.docs.pdf: - cd ${OPENOCD_BUILD_DIR}/docs && ${MAKE} pdf - -openocd.docs.html: - cd ${OPENOCD_BUILD_DIR}/docs && ${MAKE} html - -# fixme: -# need to add a "make one huge html file target" - -openocd.install: - cd ${OPENOCD_BUILD_DIR} && ${MAKE} install - -#======================================== -# The world... - -# Manual step. -download.all: \ - ftd2xx.download \ - libconfuse.download \ - libftdi.download - -ifeq (x"${FT2232_DRIVER}",x"ftd2xx") -prebuild: ftd2xx.all -endif - -ifeq (x"${FT2232_DRIVER}",x"libftdi") -prebuild: libconfuse.all libftdi.all -endif - -remake: \ - openocd.bootstrap \ - openocd.configure \ - openocd.build \ - openocd.install - -initial.build : download.all prebuild remake - -all: - @echo "" - @echo " This makefile does not support an 'all' target" - @echo "" - @echo " If this is your *FIRST* time building... " - @echo " Then use this command: \"make initial.build\"" - @echo "" - @echo " The \"default\" target is for openocd developers" - @echo " and rebuilds openocd completely.." - @echo "" - -default: - test -d ${OPENOCD_SRC_DIR} || (echo "Where is: The OPENOCD source?"; exit 1) - ${MAKE} remake - -whatis_%: - @echo "" - @echo "Makevariable: $* => ${${*}}" - @echo "" diff --git a/testing/build.test2/README.txt b/testing/build.test2/README.txt deleted file mode 100644 index 382105ef0..000000000 --- a/testing/build.test2/README.txt +++ /dev/null @@ -1,58 +0,0 @@ - -This makefile is how I Duane Ellis (op...@du...) builds -openocd test purposes on Cygwin. I have included it here so others -might also make use of the same configuration that I use to develop -Openocd. - ---Duane Ellis - -To make use of it do the following: - -(1) Check out openocd in the standard way. - -For example - in cygwin, type this: - - bash$ mkdir -p /home/duane/test - bash$ cd /home/duane/test - bash$ svn co https://svn.berlios.de/svnroot/repos/openocd/trunk openocd - -(2) COPY this folder "right above" where you have OpenOCD. - - bash$ cd /home/duane/test - bash$ cp ./openocd/testing/build.test2/* /home/duane/test/. - -(3) OPTIONALLY - - You might want to review the file "local.uses" - Change options and so forth at the top of the file. - -(4) Initially, you need to download some additional files. - These include "libftdi", "libconfuse", and the ftd2xx drivers. - -(5) You also need to build the supporting libraries and install them - (They are installed "locally" only) - - Type this command: - - bash$ cd /home/duane/test - - bash$ make initial.build - - which: (1) downloads files - (2) builds the libs - (3) builds OpenOCD - -(6) As you hack upon OpenOCD... to rebuild OpenOCD... - - bash$ cd /home/duane/test - - bash$ make remake - - which: (1) re-bootstraps - (2) re-configures - (3) re-builds - (4) re-installs. - -======= -**END** -======= diff --git a/testing/build.test2/local.uses b/testing/build.test2/local.uses deleted file mode 100644 index edde31b0c..000000000 --- a/testing/build.test2/local.uses +++ /dev/null @@ -1,161 +0,0 @@ -# -*- mode: makefile -*- -#======================================== -# DO NOT REMOVE THE LINE BELOW -HERE := $(shell pwd) -# DO NOT REMOVE THE LINE ABOVE -#======================================== - -# These are common CYGWIN build settings. -# Comment out things you do not want. -# Or unComment things you want. - -# PCs always have printer ports... -X86_PRINTER_PORT ?= y - -# Chose *ONE* of these three solutions. -#FTD2232_DRIVER = none -FT2232_DRIVER = ftd2xx -#FT2232_DRIVER = libftdi - -# Do you have "libusb" installed? -ifeq (x"${FT2232_DRIVER}",x"libftdi") -# With LIBFTDI... LIBUSB is manditory. -USE_LIBUSB = y -endif - -# By default... we assume libusb not present. -USE_LIBUSB ?= n - -#======================================== -# DO NOT EDIT SETTINGS BELOW THIS LINE -#======================================== - - - -#======================================== -# House keeping... - -# Solve problems on systems with DASH.. Grrr... -SHELL=/bin/bash ... [truncated message content] |
From: OpenOCD-Gerrit <ope...@us...> - 2021-11-05 22:44:17
|
This is an automated email from the git hooks/post-receive script. It was generated because a ref change was pushed to the repository containing the project "Main OpenOCD repository". The branch, master has been updated via 6fef2eca381ddcda593aca27290706873a9bcde2 (commit) from bac3ef96b79ac7b7b44585f2c3a2adcd8732f7a2 (commit) Those revisions listed above that are new to this repository have not appeared on any other notification email; so we list those revisions in full, below. - Log ----------------------------------------------------------------- commit 6fef2eca381ddcda593aca27290706873a9bcde2 Author: Alex Crawford <op...@co...> Date: Sat Sep 25 08:52:50 2021 -0700 drivers/linuxgpiod: add support for opendrain trst This is a follow-up to 2f424b7eb, which added support for opendrain srst, finishing up support for opendrain reset signals. Signed-off-by: Alex Crawford <op...@co...> Change-Id: Ib79b2e12f2a9469fd6c53bb839c0d2e8e46103a4 Reviewed-on: https://review.openocd.org/c/openocd/+/6598 Tested-by: jenkins Reviewed-by: Antonio Borneo <bor...@gm...> diff --git a/src/jtag/drivers/linuxgpiod.c b/src/jtag/drivers/linuxgpiod.c index dd50b4406..75f6152be 100644 --- a/src/jtag/drivers/linuxgpiod.c +++ b/src/jtag/drivers/linuxgpiod.c @@ -360,7 +360,11 @@ static int linuxgpiod_init(void) goto out_error; if (is_gpio_valid(trst_gpio)) { - gpiod_trst = helper_get_output_line("trst", trst_gpio, 1); + if (jtag_get_reset_config() & RESET_TRST_OPEN_DRAIN) + gpiod_trst = helper_get_open_drain_output_line("trst", trst_gpio, 1); + else + gpiod_trst = helper_get_output_line("trst", trst_gpio, 1); + if (!gpiod_trst) goto out_error; } ----------------------------------------------------------------------- Summary of changes: src/jtag/drivers/linuxgpiod.c | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) hooks/post-receive -- Main OpenOCD repository |
From: OpenOCD-Gerrit <ope...@us...> - 2021-11-05 22:43:39
|
This is an automated email from the git hooks/post-receive script. It was generated because a ref change was pushed to the repository containing the project "Main OpenOCD repository". The branch, master has been updated via bac3ef96b79ac7b7b44585f2c3a2adcd8732f7a2 (commit) from 6df533abb89307da066335700856e9bfe8586b94 (commit) Those revisions listed above that are new to this repository have not appeared on any other notification email; so we list those revisions in full, below. - Log ----------------------------------------------------------------- commit bac3ef96b79ac7b7b44585f2c3a2adcd8732f7a2 Author: Antonio Borneo <bor...@gm...> Date: Sat Aug 14 14:48:50 2021 +0200 stlink: skip rw-misc commands with TCP server The main purpose of TCP server is to allow multiple clients to connect and share the same physical stlink. The commands RW MISC don't lock the communication between command and answer, thus cannot prevent another client to break this sequence. The commands are not supposed to be used in shared mode. Prevent the use of RW MISC commands on a (possibly) shared TCP backend. This degrades the overall performance, but the shared mode already adds its own overhead, so this is not really an issue. Change-Id: I713d912a269664859c8142932a9905d24b6d3caa Signed-off-by: Antonio Borneo <bor...@gm...> Reviewed-on: https://review.openocd.org/c/openocd/+/6608 Tested-by: jenkins Reviewed-by: Tarek BOCHKATI <tar...@gm...> diff --git a/src/jtag/drivers/stlink_usb.c b/src/jtag/drivers/stlink_usb.c index 42b8cc2e8..b51a0c2ba 100644 --- a/src/jtag/drivers/stlink_usb.c +++ b/src/jtag/drivers/stlink_usb.c @@ -4445,6 +4445,13 @@ static int stlink_usb_count_misc_rw_queue(void *handle, const struct dap_queue * if (!(h->version.flags & STLINK_F_HAS_RW_MISC)) return 0; + /* + * RW_MISC sequence doesn't lock the st-link, so are not safe in shared mode. + * Don't use it with TCP backend to prevent any issue in case of sharing. + * This further degrades the performance, on top of TCP server overhead. + */ + if (h->backend == &stlink_tcp_backend) + return 0; for (i = 0; i < len; i++) { if (q[i].cmd != CMD_MEM_AP_READ32 && q[i].cmd != CMD_MEM_AP_WRITE32) ----------------------------------------------------------------------- Summary of changes: src/jtag/drivers/stlink_usb.c | 7 +++++++ 1 file changed, 7 insertions(+) hooks/post-receive -- Main OpenOCD repository |
From: OpenOCD-Gerrit <ope...@us...> - 2021-11-05 22:43:25
|
This is an automated email from the git hooks/post-receive script. It was generated because a ref change was pushed to the repository containing the project "Main OpenOCD repository". The branch, master has been updated via 6df533abb89307da066335700856e9bfe8586b94 (commit) from 22c76a4fd536ba53f563d72d2b3402c45f925f85 (commit) Those revisions listed above that are new to this repository have not appeared on any other notification email; so we list those revisions in full, below. - Log ----------------------------------------------------------------- commit 6df533abb89307da066335700856e9bfe8586b94 Author: Antonio Borneo <bor...@gm...> Date: Thu Jul 29 17:54:31 2021 +0200 stlink: add support for rw-misc commands Firmware versions V2J32 and V3J2 introduce the commands RW-MISC to put in a single USB packet a sequence of mem_ap read/write. These commands provide a significant speed improvement while accessing the debug unit at scattered addresses. Add the low level commands and extend high level implementation. Skip for the moment the command to read the max number of items allowed by the firmware and use some hardcoded values. Change-Id: I8adc630cc0de733511e9d94533cbfe9f3b301a83 Signed-off-by: Antonio Borneo <bor...@gm...> Reviewed-on: https://review.openocd.org/c/openocd/+/6607 Tested-by: jenkins Reviewed-by: Tarek BOCHKATI <tar...@gm...> diff --git a/src/jtag/drivers/stlink_usb.c b/src/jtag/drivers/stlink_usb.c index 92ce1e801..42b8cc2e8 100644 --- a/src/jtag/drivers/stlink_usb.c +++ b/src/jtag/drivers/stlink_usb.c @@ -33,6 +33,7 @@ #endif /* project specific includes */ +#include <helper/align.h> #include <helper/binarybuffer.h> #include <helper/bits.h> #include <helper/system.h> @@ -436,6 +437,8 @@ static inline int stlink_usb_xfer_noerrcheck(void *handle, const uint8_t *buf, i #define STLINK_DEBUG_APIV2_CLOSE_AP_DBG 0x4C #define STLINK_DEBUG_WRITEMEM_32BIT_NO_ADDR_INC 0x50 +#define STLINK_DEBUG_APIV2_RW_MISC_OUT 0x51 +#define STLINK_DEBUG_APIV2_RW_MISC_IN 0x52 #define STLINK_DEBUG_READMEM_32BIT_NO_ADDR_INC 0x54 @@ -513,6 +516,7 @@ static inline int stlink_usb_xfer_noerrcheck(void *handle, const uint8_t *buf, i #define STLINK_F_HAS_FPU_REG STLINK_F_HAS_GETLASTRWSTATUS2 #define STLINK_F_HAS_MEM_WR_NO_INC STLINK_F_HAS_MEM_16BIT #define STLINK_F_HAS_MEM_RD_NO_INC STLINK_F_HAS_DPBANKSEL +#define STLINK_F_HAS_RW_MISC STLINK_F_HAS_DPBANKSEL #define STLINK_F_HAS_CSW STLINK_F_HAS_DPBANKSEL #define STLINK_REGSEL_IS_FPU(x) ((x) > 0x1F) @@ -3867,6 +3871,53 @@ static int stlink_usb_close_access_port(void *handle, unsigned char ap_num) } +static int stlink_usb_rw_misc_out(void *handle, uint32_t items, const uint8_t *buffer) +{ + struct stlink_usb_handle_s *h = handle; + unsigned int buflen = ALIGN_UP(items, 4) + 4 * items; + + LOG_DEBUG_IO("%s(%" PRIu32 ")", __func__, items); + + assert(handle != NULL); + + if (!(h->version.flags & STLINK_F_HAS_RW_MISC)) + return ERROR_COMMAND_NOTFOUND; + + stlink_usb_init_buffer(handle, h->tx_ep, buflen); + + h->cmdbuf[h->cmdidx++] = STLINK_DEBUG_COMMAND; + h->cmdbuf[h->cmdidx++] = STLINK_DEBUG_APIV2_RW_MISC_OUT; + h_u32_to_le(&h->cmdbuf[2], items); + + return stlink_usb_xfer_noerrcheck(handle, buffer, buflen); +} + +static int stlink_usb_rw_misc_in(void *handle, uint32_t items, uint8_t *buffer) +{ + struct stlink_usb_handle_s *h = handle; + unsigned int buflen = 2 * 4 * items; + + LOG_DEBUG_IO("%s(%" PRIu32 ")", __func__, items); + + assert(handle != NULL); + + if (!(h->version.flags & STLINK_F_HAS_RW_MISC)) + return ERROR_COMMAND_NOTFOUND; + + stlink_usb_init_buffer(handle, h->rx_ep, buflen); + + h->cmdbuf[h->cmdidx++] = STLINK_DEBUG_COMMAND; + h->cmdbuf[h->cmdidx++] = STLINK_DEBUG_APIV2_RW_MISC_IN; + + int res = stlink_usb_xfer_noerrcheck(handle, h->databuf, buflen); + if (res != ERROR_OK) + return res; + + memcpy(buffer, h->databuf, buflen); + + return ERROR_OK; +} + /** */ static int stlink_read_dap_register(void *handle, unsigned short dap_port, unsigned short addr, uint32_t *val) @@ -4229,6 +4280,97 @@ static int stlink_dap_op_queue_ap_abort(struct adiv5_dap *dap, uint8_t *ack) return ERROR_OK; } +#define RW_MISC_CMD_ADDRESS 1 +#define RW_MISC_CMD_WRITE 2 +#define RW_MISC_CMD_READ 3 +#define RW_MISC_CMD_APNUM 5 + +static int stlink_usb_misc_rw_segment(void *handle, const struct dap_queue *q, unsigned int len, unsigned int items) +{ + uint8_t buf[2 * 4 * items]; + + LOG_DEBUG("Queue: %u commands in %u items", len, items); + + int ap_num = DP_APSEL_INVALID; + unsigned int cmd_index = 0; + unsigned int val_index = ALIGN_UP(items, 4); + for (unsigned int i = 0; i < len; i++) { + if (ap_num != q[i].mem_ap.ap->ap_num) { + ap_num = q[i].mem_ap.ap->ap_num; + buf[cmd_index++] = RW_MISC_CMD_APNUM; + h_u32_to_le(&buf[val_index], ap_num); + val_index += 4; + } + + switch (q[i].cmd) { + case CMD_MEM_AP_READ32: + buf[cmd_index++] = RW_MISC_CMD_READ; + h_u32_to_le(&buf[val_index], q[i].mem_ap.addr); + val_index += 4; + break; + case CMD_MEM_AP_WRITE32: + buf[cmd_index++] = RW_MISC_CMD_ADDRESS; + h_u32_to_le(&buf[val_index], q[i].mem_ap.addr); + val_index += 4; + buf[cmd_index++] = RW_MISC_CMD_WRITE; + h_u32_to_le(&buf[val_index], q[i].mem_ap.data); + val_index += 4; + break; + default: + /* Not supposed to happen */ + return ERROR_FAIL; + } + } + /* pad after last command */ + while (!IS_ALIGNED(cmd_index, 4)) + buf[cmd_index++] = 0; + + int retval = stlink_usb_rw_misc_out(handle, items, buf); + if (retval != ERROR_OK) + return retval; + + retval = stlink_usb_rw_misc_in(handle, items, buf); + if (retval != ERROR_OK) + return retval; + + ap_num = DP_APSEL_INVALID; + val_index = 0; + unsigned int err_index = 4 * items; + for (unsigned int i = 0; i < len; i++) { + uint32_t errcode = le_to_h_u32(&buf[err_index]); + if (errcode != STLINK_DEBUG_ERR_OK) { + LOG_ERROR("unknown/unexpected STLINK status code 0x%x", errcode); + return ERROR_FAIL; + } + if (ap_num != q[i].mem_ap.ap->ap_num) { + ap_num = q[i].mem_ap.ap->ap_num; + err_index += 4; + val_index += 4; + errcode = le_to_h_u32(&buf[err_index]); + if (errcode != STLINK_DEBUG_ERR_OK) { + LOG_ERROR("unknown/unexpected STLINK status code 0x%x", errcode); + return ERROR_FAIL; + } + } + + if (q[i].cmd == CMD_MEM_AP_READ32) { + *q[i].mem_ap.p_data = le_to_h_u32(&buf[val_index]); + } else { /* q[i]->cmd == CMD_MEM_AP_WRITE32 */ + err_index += 4; + val_index += 4; + errcode = le_to_h_u32(&buf[err_index]); + if (errcode != STLINK_DEBUG_ERR_OK) { + LOG_ERROR("unknown/unexpected STLINK status code 0x%x", errcode); + return ERROR_FAIL; + } + } + err_index += 4; + val_index += 4; + } + + return ERROR_OK; +} + static int stlink_usb_buf_rw_segment(void *handle, const struct dap_queue *q, unsigned int count) { uint32_t bufsize = count * CMD_MEM_AP_2_SIZE(q[0].cmd); @@ -4289,6 +4431,41 @@ static int stlink_usb_buf_rw_segment(void *handle, const struct dap_queue *q, un }; } +/* TODO: recover these values with cmd STLINK_DEBUG_APIV2_RW_MISC_GET_MAX (0x53) */ +#define STLINK_V2_RW_MISC_SIZE (64) +#define STLINK_V3_RW_MISC_SIZE (1227) + +static int stlink_usb_count_misc_rw_queue(void *handle, const struct dap_queue *q, unsigned int len, + unsigned int *pkt_items) +{ + struct stlink_usb_handle_s *h = handle; + unsigned int i, items = 0; + int ap_num = DP_APSEL_INVALID; + unsigned int misc_max_items = (h->version.stlink == 2) ? STLINK_V2_RW_MISC_SIZE : STLINK_V3_RW_MISC_SIZE; + + if (!(h->version.flags & STLINK_F_HAS_RW_MISC)) + return 0; + + for (i = 0; i < len; i++) { + if (q[i].cmd != CMD_MEM_AP_READ32 && q[i].cmd != CMD_MEM_AP_WRITE32) + break; + unsigned int count = 1; + if (ap_num != q[i].mem_ap.ap->ap_num) { + count++; + ap_num = q[i].mem_ap.ap->ap_num; + } + if (q[i].cmd == CMD_MEM_AP_WRITE32) + count++; + if (items + count > misc_max_items) + break; + items += count; + } + + *pkt_items = items; + + return i; +} + static int stlink_usb_count_buf_rw_queue(const struct dap_queue *q, unsigned int len) { uint32_t incr = CMD_MEM_AP_2_SIZE(q[0].cmd); @@ -4318,9 +4495,19 @@ static int stlink_usb_count_buf_rw_queue(const struct dap_queue *q, unsigned int static int stlink_usb_mem_rw_queue(void *handle, const struct dap_queue *q, unsigned int len, unsigned int *skip) { - unsigned int count = stlink_usb_count_buf_rw_queue(q, len); + unsigned int count, misc_items = 0; + int retval; + + unsigned int count_misc = stlink_usb_count_misc_rw_queue(handle, q, len, &misc_items); + unsigned int count_buf = stlink_usb_count_buf_rw_queue(q, len); - int retval = stlink_usb_buf_rw_segment(handle, q, count); + if (count_misc > count_buf) { + count = count_misc; + retval = stlink_usb_misc_rw_segment(handle, q, count, misc_items); + } else { + count = count_buf; + retval = stlink_usb_buf_rw_segment(handle, q, count_buf); + } if (retval != ERROR_OK) return retval; @@ -4497,7 +4684,8 @@ static int stlink_dap_op_queue_ap_read(struct adiv5_ap *ap, unsigned int reg, unsigned int i = stlink_dap_handle->queue_index++; struct dap_queue *q = &stlink_dap_handle->queue[i]; - /* test STLINK_F_HAS_CSW implicitly tests STLINK_F_HAS_MEM_16BIT, STLINK_F_HAS_MEM_RD_NO_INC */ + /* test STLINK_F_HAS_CSW implicitly tests STLINK_F_HAS_MEM_16BIT, STLINK_F_HAS_MEM_RD_NO_INC + * and STLINK_F_HAS_RW_MISC */ if ((stlink_dap_handle->version.flags & STLINK_F_HAS_CSW) && (reg == MEM_AP_REG_DRW || reg == MEM_AP_REG_BD0 || reg == MEM_AP_REG_BD1 || reg == MEM_AP_REG_BD2 || reg == MEM_AP_REG_BD3)) { @@ -4562,7 +4750,8 @@ static int stlink_dap_op_queue_ap_write(struct adiv5_ap *ap, unsigned int reg, unsigned int i = stlink_dap_handle->queue_index++; struct dap_queue *q = &stlink_dap_handle->queue[i]; - /* test STLINK_F_HAS_CSW implicitly tests STLINK_F_HAS_MEM_16BIT, STLINK_F_HAS_MEM_WR_NO_INC */ + /* test STLINK_F_HAS_CSW implicitly tests STLINK_F_HAS_MEM_16BIT, STLINK_F_HAS_MEM_WR_NO_INC + * and STLINK_F_HAS_RW_MISC */ if ((stlink_dap_handle->version.flags & STLINK_F_HAS_CSW) && (reg == MEM_AP_REG_DRW || reg == MEM_AP_REG_BD0 || reg == MEM_AP_REG_BD1 || reg == MEM_AP_REG_BD2 || reg == MEM_AP_REG_BD3)) { ----------------------------------------------------------------------- Summary of changes: src/jtag/drivers/stlink_usb.c | 197 +++++++++++++++++++++++++++++++++++++++++- 1 file changed, 193 insertions(+), 4 deletions(-) hooks/post-receive -- Main OpenOCD repository |
From: OpenOCD-Gerrit <ope...@us...> - 2021-11-05 22:43:09
|
This is an automated email from the git hooks/post-receive script. It was generated because a ref change was pushed to the repository containing the project "Main OpenOCD repository". The branch, master has been updated via 22c76a4fd536ba53f563d72d2b3402c45f925f85 (commit) from 9a534c4bb2a88fdc2ddaf7d4356faddba59736ea (commit) Those revisions listed above that are new to this repository have not appeared on any other notification email; so we list those revisions in full, below. - Log ----------------------------------------------------------------- commit 22c76a4fd536ba53f563d72d2b3402c45f925f85 Author: Antonio Borneo <bor...@gm...> Date: Thu Jul 29 18:38:20 2021 +0200 stlink: dequeue CSW write only if it doesn't change csw_default The stlink commands for buffer read/write carry the associated CSW value that has to be used. We can dequeue any CSW write request and add the CSW in the following buffer read/write. In preparation to next patch that uses stlink commands misc-rw (commands that don't handle CSW value), let's dequeue only those CSW write that don't change csw_default. Keep a local cache of last csw_default. Tag the queued CSW writes that change csw_default. Dequeue only the un-tagged CSW writes. On buffer read/write commands, limiting the dequeued CSW write surely adds a performance penalty. But csw_default is not changed often so the penalty is not significant. Change-Id: I538d257fe3c434fc97587846d759951384327f02 Signed-off-by: Antonio Borneo <bor...@gm...> Reviewed-on: https://review.openocd.org/c/openocd/+/6606 Tested-by: jenkins Reviewed-by: Tarek BOCHKATI <tar...@gm...> diff --git a/src/jtag/drivers/stlink_usb.c b/src/jtag/drivers/stlink_usb.c index e6fc7b624..92ce1e801 100644 --- a/src/jtag/drivers/stlink_usb.c +++ b/src/jtag/drivers/stlink_usb.c @@ -227,6 +227,7 @@ struct dap_queue { unsigned int reg; struct adiv5_ap *ap; uint32_t data; + bool changes_csw_default; } ap_w; struct mem_ap { uint32_t addr; @@ -3960,6 +3961,7 @@ struct hl_layout_api_s stlink_usb_layout_api = { static struct stlink_usb_handle_s *stlink_dap_handle; static struct hl_interface_param_s stlink_dap_param; static DECLARE_BITMAP(opened_ap, DP_APSEL_MAX + 1); +static uint32_t last_csw_default[DP_APSEL_MAX + 1]; static int stlink_dap_error = ERROR_OK; /** */ @@ -4004,6 +4006,7 @@ static int stlink_usb_open_ap(void *handle, unsigned short apsel) LOG_DEBUG("AP %d enabled", apsel); set_bit(apsel, opened_ap); + last_csw_default[apsel] = 0; return ERROR_OK; } @@ -4087,6 +4090,8 @@ static int stlink_dap_op_connect(struct adiv5_dap *dap) dap->do_reconnect = false; dap_invalidate_cache(dap); + for (unsigned int i = 0; i <= DP_APSEL_MAX; i++) + last_csw_default[i] = 0; retval = dap_dp_init(dap); if (retval != ERROR_OK) { @@ -4504,8 +4509,9 @@ static int stlink_dap_op_queue_ap_read(struct adiv5_ap *ap, unsigned int reg, q = prev_q; prev_q--; } - /* de-queue previous write-CSW */ - if (i && prev_q->cmd == CMD_AP_WRITE && prev_q->ap_w.ap == ap && prev_q->ap_w.reg == MEM_AP_REG_CSW) { + /* de-queue previous write-CSW if it didn't changed ap->csw_default */ + if (i && prev_q->cmd == CMD_AP_WRITE && prev_q->ap_w.ap == ap && prev_q->ap_w.reg == MEM_AP_REG_CSW && + !prev_q->ap_w.changes_csw_default) { stlink_dap_handle->queue_index = i; q = prev_q; } @@ -4568,8 +4574,9 @@ static int stlink_dap_op_queue_ap_write(struct adiv5_ap *ap, unsigned int reg, q = prev_q; prev_q--; } - /* de-queue previous write-CSW */ - if (i && prev_q->cmd == CMD_AP_WRITE && prev_q->ap_w.ap == ap && prev_q->ap_w.reg == MEM_AP_REG_CSW) { + /* de-queue previous write-CSW if it didn't changed ap->csw_default */ + if (i && prev_q->cmd == CMD_AP_WRITE && prev_q->ap_w.ap == ap && prev_q->ap_w.reg == MEM_AP_REG_CSW && + !prev_q->ap_w.changes_csw_default) { stlink_dap_handle->queue_index = i; q = prev_q; } @@ -4603,6 +4610,12 @@ static int stlink_dap_op_queue_ap_write(struct adiv5_ap *ap, unsigned int reg, q->ap_w.reg = reg; q->ap_w.ap = ap; q->ap_w.data = data; + if (reg == MEM_AP_REG_CSW && ap->csw_default != last_csw_default[ap->ap_num]) { + q->ap_w.changes_csw_default = true; + last_csw_default[ap->ap_num] = ap->csw_default; + } else { + q->ap_w.changes_csw_default = false; + } } if (i == MAX_QUEUE_DEPTH - 1) ----------------------------------------------------------------------- Summary of changes: src/jtag/drivers/stlink_usb.c | 21 +++++++++++++++++---- 1 file changed, 17 insertions(+), 4 deletions(-) hooks/post-receive -- Main OpenOCD repository |
From: OpenOCD-Gerrit <ope...@us...> - 2021-11-05 22:42:42
|
This is an automated email from the git hooks/post-receive script. It was generated because a ref change was pushed to the repository containing the project "Main OpenOCD repository". The branch, master has been updated via 9a534c4bb2a88fdc2ddaf7d4356faddba59736ea (commit) from da15f9f8c29064f0124e60ac0ac21ddd11fdcc2c (commit) Those revisions listed above that are new to this repository have not appeared on any other notification email; so we list those revisions in full, below. - Log ----------------------------------------------------------------- commit 9a534c4bb2a88fdc2ddaf7d4356faddba59736ea Author: Antonio Borneo <bor...@gm...> Date: Sun Jul 25 23:46:55 2021 +0200 stlink: add support for native no_addr_incr commands Firmware versions V2J26 and V3J1 introduce the command STLINK_DEBUG_WRITEMEM_32BIT_NO_ADDR_INC Firmware versions V2J32 and V3J2 introduce the command STLINK_DEBUG_READMEM_32BIT_NO_ADDR_INC These new commands can provide speed improvement to Cortex-A memory download (its debug port use a FIFO for data transfer). Add the low level commands and extend high level implementation. Change-Id: I3b65acbeaec3bd305f5568b9ee4bc9495b113448 Signed-off-by: Antonio Borneo <bor...@gm...> Reviewed-on: https://review.openocd.org/c/openocd/+/6605 Tested-by: jenkins Reviewed-by: Tarek BOCHKATI <tar...@gm...> diff --git a/src/jtag/drivers/stlink_usb.c b/src/jtag/drivers/stlink_usb.c index 818fccd33..e6fc7b624 100644 --- a/src/jtag/drivers/stlink_usb.c +++ b/src/jtag/drivers/stlink_usb.c @@ -434,6 +434,10 @@ static inline int stlink_usb_xfer_noerrcheck(void *handle, const uint8_t *buf, i #define STLINK_DEBUG_APIV2_INIT_AP 0x4B #define STLINK_DEBUG_APIV2_CLOSE_AP_DBG 0x4C +#define STLINK_DEBUG_WRITEMEM_32BIT_NO_ADDR_INC 0x50 + +#define STLINK_DEBUG_READMEM_32BIT_NO_ADDR_INC 0x54 + #define STLINK_APIV3_SET_COM_FREQ 0x61 #define STLINK_APIV3_GET_COM_FREQ 0x62 @@ -506,6 +510,8 @@ static inline int stlink_usb_xfer_noerrcheck(void *handle, const uint8_t *buf, i /* aliases */ #define STLINK_F_HAS_TARGET_VOLT STLINK_F_HAS_TRACE #define STLINK_F_HAS_FPU_REG STLINK_F_HAS_GETLASTRWSTATUS2 +#define STLINK_F_HAS_MEM_WR_NO_INC STLINK_F_HAS_MEM_16BIT +#define STLINK_F_HAS_MEM_RD_NO_INC STLINK_F_HAS_DPBANKSEL #define STLINK_F_HAS_CSW STLINK_F_HAS_DPBANKSEL #define STLINK_REGSEL_IS_FPU(x) ((x) > 0x1F) @@ -1323,6 +1329,7 @@ static int stlink_usb_version(void *handle) flags |= STLINK_F_QUIRK_JTAG_DP_READ; /* API to read/write memory at 16 bit from J26 */ + /* API to write memory without address increment from J26 */ if (h->version.jtag >= 26) flags |= STLINK_F_HAS_MEM_16BIT; @@ -1335,6 +1342,7 @@ static int stlink_usb_version(void *handle) flags |= STLINK_F_FIX_CLOSE_AP; /* Banked regs (DPv1 & DPv2) support from V2J32 */ + /* API to read memory without address increment from V2J32 */ /* Memory R/W supports CSW from V2J32 */ if (h->version.jtag >= 32) flags |= STLINK_F_HAS_DPBANKSEL; @@ -1357,6 +1365,7 @@ static int stlink_usb_version(void *handle) flags |= STLINK_F_HAS_DAP_REG; /* API to read/write memory at 16 bit */ + /* API to write memory without address increment */ flags |= STLINK_F_HAS_MEM_16BIT; /* API required to init AP before any AP access */ @@ -1366,6 +1375,7 @@ static int stlink_usb_version(void *handle) flags |= STLINK_F_FIX_CLOSE_AP; /* Banked regs (DPv1 & DPv2) support from V3J2 */ + /* API to read memory without address increment from V3J2 */ /* Memory R/W supports CSW from V3J2 */ if (h->version.jtag >= 2) flags |= STLINK_F_HAS_DPBANKSEL; @@ -2672,6 +2682,88 @@ static int stlink_usb_write_mem32(void *handle, uint8_t ap_num, uint32_t csw, return stlink_usb_get_rw_status(handle); } +static int stlink_usb_read_mem32_noaddrinc(void *handle, uint8_t ap_num, uint32_t csw, + uint32_t addr, uint16_t len, uint8_t *buffer) +{ + struct stlink_usb_handle_s *h = handle; + + assert(handle != NULL); + + if (!(h->version.flags & STLINK_F_HAS_MEM_RD_NO_INC)) + return ERROR_COMMAND_NOTFOUND; + + if (len > STLINK_MAX_RW16_32) { + LOG_DEBUG("max buffer (%d) length exceeded", STLINK_MAX_RW16_32); + return ERROR_FAIL; + } + + /* data must be a multiple of 4 and word aligned */ + if (len % 4 || addr % 4) { + LOG_DEBUG("Invalid data alignment"); + return ERROR_TARGET_UNALIGNED_ACCESS; + } + + stlink_usb_init_buffer(handle, h->rx_ep, len); + + h->cmdbuf[h->cmdidx++] = STLINK_DEBUG_COMMAND; + h->cmdbuf[h->cmdidx++] = STLINK_DEBUG_READMEM_32BIT_NO_ADDR_INC; + h_u32_to_le(h->cmdbuf + h->cmdidx, addr); + h->cmdidx += 4; + h_u16_to_le(h->cmdbuf + h->cmdidx, len); + h->cmdidx += 2; + h->cmdbuf[h->cmdidx++] = ap_num; + h_u24_to_le(h->cmdbuf + h->cmdidx, csw >> 8); + h->cmdidx += 3; + + int retval = stlink_usb_xfer_noerrcheck(handle, h->databuf, len); + if (retval != ERROR_OK) + return retval; + + memcpy(buffer, h->databuf, len); + + return stlink_usb_get_rw_status(handle); +} + +static int stlink_usb_write_mem32_noaddrinc(void *handle, uint8_t ap_num, uint32_t csw, + uint32_t addr, uint16_t len, const uint8_t *buffer) +{ + struct stlink_usb_handle_s *h = handle; + + assert(handle != NULL); + + if (!(h->version.flags & STLINK_F_HAS_MEM_WR_NO_INC)) + return ERROR_COMMAND_NOTFOUND; + + if (len > STLINK_MAX_RW16_32) { + LOG_DEBUG("max buffer (%d) length exceeded", STLINK_MAX_RW16_32); + return ERROR_FAIL; + } + + /* data must be a multiple of 4 and word aligned */ + if (len % 4 || addr % 4) { + LOG_DEBUG("Invalid data alignment"); + return ERROR_TARGET_UNALIGNED_ACCESS; + } + + stlink_usb_init_buffer(handle, h->tx_ep, len); + + h->cmdbuf[h->cmdidx++] = STLINK_DEBUG_COMMAND; + h->cmdbuf[h->cmdidx++] = STLINK_DEBUG_WRITEMEM_32BIT_NO_ADDR_INC; + h_u32_to_le(h->cmdbuf + h->cmdidx, addr); + h->cmdidx += 4; + h_u16_to_le(h->cmdbuf + h->cmdidx, len); + h->cmdidx += 2; + h->cmdbuf[h->cmdidx++] = ap_num; + h_u24_to_le(h->cmdbuf + h->cmdidx, csw >> 8); + h->cmdidx += 3; + + int retval = stlink_usb_xfer_noerrcheck(handle, buffer, len); + if (retval != ERROR_OK) + return retval; + + return stlink_usb_get_rw_status(handle); +} + static uint32_t stlink_max_block_size(uint32_t tar_autoincr_block, uint32_t address) { uint32_t max_tar_block = (tar_autoincr_block - ((tar_autoincr_block - 1) & address)); @@ -4158,7 +4250,10 @@ static int stlink_usb_buf_rw_segment(void *handle, const struct dap_queue *q, un case CMD_MEM_AP_WRITE32: for (unsigned int i = 0; i < count; i++) h_u32_to_le(&buf[4 * i], q[i].mem_ap.data); - return stlink_usb_write_mem32(stlink_dap_handle, ap_num, csw, addr, bufsize, buf); + if (count > 1 && q[0].mem_ap.addr == q[1].mem_ap.addr) + return stlink_usb_write_mem32_noaddrinc(stlink_dap_handle, ap_num, csw, addr, bufsize, buf); + else + return stlink_usb_write_mem32(stlink_dap_handle, ap_num, csw, addr, bufsize, buf); case CMD_MEM_AP_READ8: retval = stlink_usb_read_mem8(stlink_dap_handle, ap_num, csw, addr, bufsize, buf); @@ -4175,7 +4270,10 @@ static int stlink_usb_buf_rw_segment(void *handle, const struct dap_queue *q, un return retval; case CMD_MEM_AP_READ32: - retval = stlink_usb_read_mem32(stlink_dap_handle, ap_num, csw, addr, bufsize, buf); + if (count > 1 && q[0].mem_ap.addr == q[1].mem_ap.addr) + retval = stlink_usb_read_mem32_noaddrinc(stlink_dap_handle, ap_num, csw, addr, bufsize, buf); + else + retval = stlink_usb_read_mem32(stlink_dap_handle, ap_num, csw, addr, bufsize, buf); if (retval == ERROR_OK) for (unsigned int i = 0; i < count; i++) *q[i].mem_ap.p_data = le_to_h_u32(&buf[4 * i]); @@ -4196,6 +4294,10 @@ static int stlink_usb_count_buf_rw_queue(const struct dap_queue *q, unsigned int else len_max = STLINK_MAX_RW16_32 / incr; + /* check for no address increment, 32 bits only */ + if (len > 1 && incr == 4 && q[0].mem_ap.addr == q[1].mem_ap.addr) + incr = 0; + if (len > len_max) len = len_max; @@ -4390,6 +4492,7 @@ static int stlink_dap_op_queue_ap_read(struct adiv5_ap *ap, unsigned int reg, unsigned int i = stlink_dap_handle->queue_index++; struct dap_queue *q = &stlink_dap_handle->queue[i]; + /* test STLINK_F_HAS_CSW implicitly tests STLINK_F_HAS_MEM_16BIT, STLINK_F_HAS_MEM_RD_NO_INC */ if ((stlink_dap_handle->version.flags & STLINK_F_HAS_CSW) && (reg == MEM_AP_REG_DRW || reg == MEM_AP_REG_BD0 || reg == MEM_AP_REG_BD1 || reg == MEM_AP_REG_BD2 || reg == MEM_AP_REG_BD3)) { @@ -4453,6 +4556,7 @@ static int stlink_dap_op_queue_ap_write(struct adiv5_ap *ap, unsigned int reg, unsigned int i = stlink_dap_handle->queue_index++; struct dap_queue *q = &stlink_dap_handle->queue[i]; + /* test STLINK_F_HAS_CSW implicitly tests STLINK_F_HAS_MEM_16BIT, STLINK_F_HAS_MEM_WR_NO_INC */ if ((stlink_dap_handle->version.flags & STLINK_F_HAS_CSW) && (reg == MEM_AP_REG_DRW || reg == MEM_AP_REG_BD0 || reg == MEM_AP_REG_BD1 || reg == MEM_AP_REG_BD2 || reg == MEM_AP_REG_BD3)) { ----------------------------------------------------------------------- Summary of changes: src/jtag/drivers/stlink_usb.c | 108 +++++++++++++++++++++++++++++++++++++++++- 1 file changed, 106 insertions(+), 2 deletions(-) hooks/post-receive -- Main OpenOCD repository |
From: OpenOCD-Gerrit <ope...@us...> - 2021-11-05 22:42:20
|
This is an automated email from the git hooks/post-receive script. It was generated because a ref change was pushed to the repository containing the project "Main OpenOCD repository". The branch, master has been updated via da15f9f8c29064f0124e60ac0ac21ddd11fdcc2c (commit) from 7920110665630c8fdc42277ed17f6849597ea63e (commit) Those revisions listed above that are new to this repository have not appeared on any other notification email; so we list those revisions in full, below. - Log ----------------------------------------------------------------- commit da15f9f8c29064f0124e60ac0ac21ddd11fdcc2c Author: Antonio Borneo <bor...@gm...> Date: Sun Jul 25 17:31:53 2021 +0200 stlink: collapse consecutive mem AP r/w in a single command Detect a sequence of memory AP operations that can be issued as a single stlink command. This improves the data throughput during memory transfer. Change-Id: Ifa4488513346fc7cd0c9317b7d24ef510ccfd959 Signed-off-by: Antonio Borneo <bor...@gm...> Reviewed-on: https://review.openocd.org/c/openocd/+/6604 Tested-by: jenkins Reviewed-by: Tarek BOCHKATI <tar...@gm...> diff --git a/src/jtag/drivers/stlink_usb.c b/src/jtag/drivers/stlink_usb.c index 1cd68c50b..818fccd33 100644 --- a/src/jtag/drivers/stlink_usb.c +++ b/src/jtag/drivers/stlink_usb.c @@ -4132,6 +4132,95 @@ static int stlink_dap_op_queue_ap_abort(struct adiv5_dap *dap, uint8_t *ack) return ERROR_OK; } +static int stlink_usb_buf_rw_segment(void *handle, const struct dap_queue *q, unsigned int count) +{ + uint32_t bufsize = count * CMD_MEM_AP_2_SIZE(q[0].cmd); + uint8_t buf[bufsize]; + uint8_t ap_num = q[0].mem_ap.ap->ap_num; + uint32_t addr = q[0].mem_ap.addr; + uint32_t csw = q[0].mem_ap.csw; + + int retval = stlink_dap_open_ap(ap_num); + if (retval != ERROR_OK) + return retval; + + switch (q[0].cmd) { + case CMD_MEM_AP_WRITE8: + for (unsigned int i = 0; i < count; i++) + buf[i] = q[i].mem_ap.data >> 8 * (q[i].mem_ap.addr & 3); + return stlink_usb_write_mem8(stlink_dap_handle, ap_num, csw, addr, bufsize, buf); + + case CMD_MEM_AP_WRITE16: + for (unsigned int i = 0; i < count; i++) + h_u16_to_le(&buf[2 * i], q[i].mem_ap.data >> 8 * (q[i].mem_ap.addr & 2)); + return stlink_usb_write_mem16(stlink_dap_handle, ap_num, csw, addr, bufsize, buf); + + case CMD_MEM_AP_WRITE32: + for (unsigned int i = 0; i < count; i++) + h_u32_to_le(&buf[4 * i], q[i].mem_ap.data); + return stlink_usb_write_mem32(stlink_dap_handle, ap_num, csw, addr, bufsize, buf); + + case CMD_MEM_AP_READ8: + retval = stlink_usb_read_mem8(stlink_dap_handle, ap_num, csw, addr, bufsize, buf); + if (retval == ERROR_OK) + for (unsigned int i = 0; i < count; i++) + *q[i].mem_ap.p_data = buf[i] << 8 * (q[i].mem_ap.addr & 3); + return retval; + + case CMD_MEM_AP_READ16: + retval = stlink_usb_read_mem16(stlink_dap_handle, ap_num, csw, addr, bufsize, buf); + if (retval == ERROR_OK) + for (unsigned int i = 0; i < count; i++) + *q[i].mem_ap.p_data = le_to_h_u16(&buf[2 * i]) << 8 * (q[i].mem_ap.addr & 2); + return retval; + + case CMD_MEM_AP_READ32: + retval = stlink_usb_read_mem32(stlink_dap_handle, ap_num, csw, addr, bufsize, buf); + if (retval == ERROR_OK) + for (unsigned int i = 0; i < count; i++) + *q[i].mem_ap.p_data = le_to_h_u32(&buf[4 * i]); + return retval; + + default: + return ERROR_FAIL; + }; +} + +static int stlink_usb_count_buf_rw_queue(const struct dap_queue *q, unsigned int len) +{ + uint32_t incr = CMD_MEM_AP_2_SIZE(q[0].cmd); + unsigned int len_max; + + if (incr == 1) + len_max = stlink_usb_block(stlink_dap_handle); + else + len_max = STLINK_MAX_RW16_32 / incr; + + if (len > len_max) + len = len_max; + + for (unsigned int i = 1; i < len; i++) + if (q[i].cmd != q[0].cmd || + q[i].mem_ap.ap != q[0].mem_ap.ap || + q[i].mem_ap.csw != q[0].mem_ap.csw || + q[i].mem_ap.addr != q[i - 1].mem_ap.addr + incr) + return i; + + return len; +} + +static int stlink_usb_mem_rw_queue(void *handle, const struct dap_queue *q, unsigned int len, unsigned int *skip) +{ + unsigned int count = stlink_usb_count_buf_rw_queue(q, len); + + int retval = stlink_usb_buf_rw_segment(handle, q, count); + if (retval != ERROR_OK) + return retval; + + *skip = count; + return ERROR_OK; +} + static void stlink_dap_run_internal(struct adiv5_dap *dap) { int retval = stlink_dap_check_reconnect(dap); @@ -4143,9 +4232,10 @@ static void stlink_dap_run_internal(struct adiv5_dap *dap) unsigned int i = stlink_dap_handle->queue_index; struct dap_queue *q = &stlink_dap_handle->queue[0]; - uint8_t buf[4]; while (i && stlink_dap_get_error() == ERROR_OK) { + unsigned int skip = 1; + switch (q->cmd) { case CMD_DP_READ: retval = stlink_dap_dp_read(q->dp_r.dap, q->dp_r.reg, q->dp_r.p_data); @@ -4164,50 +4254,12 @@ static void stlink_dap_run_internal(struct adiv5_dap *dap) break; case CMD_MEM_AP_READ8: - retval = stlink_dap_open_ap(q->mem_ap.ap->ap_num); - if (retval == ERROR_OK) - retval = stlink_usb_read_mem8(stlink_dap_handle, q->mem_ap.ap->ap_num, q->mem_ap.csw, q->mem_ap.addr, - 1, buf); - if (retval == ERROR_OK) - *q->mem_ap.p_data = *buf << 8 * (q->mem_ap.addr & 3); - break; case CMD_MEM_AP_READ16: - retval = stlink_dap_open_ap(q->mem_ap.ap->ap_num); - if (retval == ERROR_OK) - retval = stlink_usb_read_mem16(stlink_dap_handle, q->mem_ap.ap->ap_num, q->mem_ap.csw, q->mem_ap.addr, - 2, buf); - if (retval == ERROR_OK) - *q->mem_ap.p_data = le_to_h_u16(buf) << 8 * (q->mem_ap.addr & 2); - break; case CMD_MEM_AP_READ32: - retval = stlink_dap_open_ap(q->mem_ap.ap->ap_num); - if (retval == ERROR_OK) - retval = stlink_usb_read_mem32(stlink_dap_handle, q->mem_ap.ap->ap_num, q->mem_ap.csw, q->mem_ap.addr, - 4, buf); - if (retval == ERROR_OK) - *q->mem_ap.p_data = le_to_h_u32(buf); - break; - case CMD_MEM_AP_WRITE8: - *buf = q->mem_ap.data >> 8 * (q->mem_ap.addr & 3); - retval = stlink_dap_open_ap(q->mem_ap.ap->ap_num); - if (retval == ERROR_OK) - retval = stlink_usb_write_mem8(stlink_dap_handle, q->mem_ap.ap->ap_num, q->mem_ap.csw, q->mem_ap.addr, - 1, buf); - break; case CMD_MEM_AP_WRITE16: - h_u16_to_le(buf, q->mem_ap.data >> 8 * (q->mem_ap.addr & 2)); - retval = stlink_dap_open_ap(q->mem_ap.ap->ap_num); - if (retval == ERROR_OK) - retval = stlink_usb_write_mem16(stlink_dap_handle, q->mem_ap.ap->ap_num, q->mem_ap.csw, q->mem_ap.addr, - 2, buf); - break; case CMD_MEM_AP_WRITE32: - h_u32_to_le(buf, q->mem_ap.data); - retval = stlink_dap_open_ap(q->mem_ap.ap->ap_num); - if (retval == ERROR_OK) - retval = stlink_usb_write_mem32(stlink_dap_handle, q->mem_ap.ap->ap_num, q->mem_ap.csw, q->mem_ap.addr, - 4, buf); + retval = stlink_usb_mem_rw_queue(stlink_dap_handle, q, i, &skip); break; default: @@ -4216,8 +4268,8 @@ static void stlink_dap_run_internal(struct adiv5_dap *dap) break; } stlink_dap_record_error(retval); - q++; - i--; + q += skip; + i -= skip; } stlink_dap_handle->queue_index = 0; ----------------------------------------------------------------------- Summary of changes: src/jtag/drivers/stlink_usb.c | 136 +++++++++++++++++++++++++++++------------- 1 file changed, 94 insertions(+), 42 deletions(-) hooks/post-receive -- Main OpenOCD repository |
From: OpenOCD-Gerrit <ope...@us...> - 2021-11-05 22:41:53
|
This is an automated email from the git hooks/post-receive script. It was generated because a ref change was pushed to the repository containing the project "Main OpenOCD repository". The branch, master has been updated via 7920110665630c8fdc42277ed17f6849597ea63e (commit) via 6f914cd8990435eafc85f8fc75fbecd7fbb96214 (commit) from 76d109523199aa44bb36627ff46d91719566086a (commit) Those revisions listed above that are new to this repository have not appeared on any other notification email; so we list those revisions in full, below. - Log ----------------------------------------------------------------- commit 7920110665630c8fdc42277ed17f6849597ea63e Author: Antonio Borneo <bor...@gm...> Date: Thu Jul 22 23:50:33 2021 +0200 stlink: detect mem_ap R/W and dequeue set TAR and CSW By using the stlink commands for memory read write we can gain some performance, but only when TAR and/or CSW are changed. During long transfers with constant CSW and TAR auto-incremented there is no gain, since the same amount of USB/TCP packet is used. Plus, by dropping ADIv5 packed transfers the performance is lower on 8 and 16 bits transfers. This changes opens the opportunity for collapsing memory burst accesses in a single stlink USB/TCP packet. Initialize the values of enum queue_cmd to easily extract the word size through a macro, even if this is not used here. Change-Id: I6661a00d468a1591a253cba9feb3bdb3f7474f5a Signed-off-by: Antonio Borneo <bor...@gm...> Reviewed-on: https://review.openocd.org/c/openocd/+/6603 Tested-by: jenkins Reviewed-by: Tarek BOCHKATI <tar...@gm...> diff --git a/src/jtag/drivers/stlink_usb.c b/src/jtag/drivers/stlink_usb.c index 3032ad4aa..1cd68c50b 100644 --- a/src/jtag/drivers/stlink_usb.c +++ b/src/jtag/drivers/stlink_usb.c @@ -186,10 +186,25 @@ struct stlink_backend_s { enum queue_cmd { CMD_DP_READ = 1, CMD_DP_WRITE, + CMD_AP_READ, CMD_AP_WRITE, + + /* + * encode the bytes size in the enum's value. This makes easy to extract it + * with a simple logic AND, by using the macro CMD_MEM_AP_2_SIZE() below + */ + CMD_MEM_AP_READ8 = 0x10 + 1, + CMD_MEM_AP_READ16 = 0x10 + 2, + CMD_MEM_AP_READ32 = 0x10 + 4, + + CMD_MEM_AP_WRITE8 = 0x20 + 1, + CMD_MEM_AP_WRITE16 = 0x20 + 2, + CMD_MEM_AP_WRITE32 = 0x20 + 4, }; +#define CMD_MEM_AP_2_SIZE(cmd) ((cmd) & 7) + struct dap_queue { enum queue_cmd cmd; union { @@ -213,6 +228,15 @@ struct dap_queue { struct adiv5_ap *ap; uint32_t data; } ap_w; + struct mem_ap { + uint32_t addr; + struct adiv5_ap *ap; + union { + uint32_t *p_data; + uint32_t data; + }; + uint32_t csw; + } mem_ap; }; }; @@ -4119,6 +4143,7 @@ static void stlink_dap_run_internal(struct adiv5_dap *dap) unsigned int i = stlink_dap_handle->queue_index; struct dap_queue *q = &stlink_dap_handle->queue[0]; + uint8_t buf[4]; while (i && stlink_dap_get_error() == ERROR_OK) { switch (q->cmd) { @@ -4132,8 +4157,59 @@ static void stlink_dap_run_internal(struct adiv5_dap *dap) retval = stlink_dap_ap_read(q->ap_r.ap, q->ap_r.reg, q->ap_r.p_data); break; case CMD_AP_WRITE: + /* ignore increment packed, not supported */ + if (q->ap_w.reg == MEM_AP_REG_CSW) + q->ap_w.data &= ~CSW_ADDRINC_PACKED; retval = stlink_dap_ap_write(q->ap_w.ap, q->ap_w.reg, q->ap_w.data); break; + + case CMD_MEM_AP_READ8: + retval = stlink_dap_open_ap(q->mem_ap.ap->ap_num); + if (retval == ERROR_OK) + retval = stlink_usb_read_mem8(stlink_dap_handle, q->mem_ap.ap->ap_num, q->mem_ap.csw, q->mem_ap.addr, + 1, buf); + if (retval == ERROR_OK) + *q->mem_ap.p_data = *buf << 8 * (q->mem_ap.addr & 3); + break; + case CMD_MEM_AP_READ16: + retval = stlink_dap_open_ap(q->mem_ap.ap->ap_num); + if (retval == ERROR_OK) + retval = stlink_usb_read_mem16(stlink_dap_handle, q->mem_ap.ap->ap_num, q->mem_ap.csw, q->mem_ap.addr, + 2, buf); + if (retval == ERROR_OK) + *q->mem_ap.p_data = le_to_h_u16(buf) << 8 * (q->mem_ap.addr & 2); + break; + case CMD_MEM_AP_READ32: + retval = stlink_dap_open_ap(q->mem_ap.ap->ap_num); + if (retval == ERROR_OK) + retval = stlink_usb_read_mem32(stlink_dap_handle, q->mem_ap.ap->ap_num, q->mem_ap.csw, q->mem_ap.addr, + 4, buf); + if (retval == ERROR_OK) + *q->mem_ap.p_data = le_to_h_u32(buf); + break; + + case CMD_MEM_AP_WRITE8: + *buf = q->mem_ap.data >> 8 * (q->mem_ap.addr & 3); + retval = stlink_dap_open_ap(q->mem_ap.ap->ap_num); + if (retval == ERROR_OK) + retval = stlink_usb_write_mem8(stlink_dap_handle, q->mem_ap.ap->ap_num, q->mem_ap.csw, q->mem_ap.addr, + 1, buf); + break; + case CMD_MEM_AP_WRITE16: + h_u16_to_le(buf, q->mem_ap.data >> 8 * (q->mem_ap.addr & 2)); + retval = stlink_dap_open_ap(q->mem_ap.ap->ap_num); + if (retval == ERROR_OK) + retval = stlink_usb_write_mem16(stlink_dap_handle, q->mem_ap.ap->ap_num, q->mem_ap.csw, q->mem_ap.addr, + 2, buf); + break; + case CMD_MEM_AP_WRITE32: + h_u32_to_le(buf, q->mem_ap.data); + retval = stlink_dap_open_ap(q->mem_ap.ap->ap_num); + if (retval == ERROR_OK) + retval = stlink_usb_write_mem32(stlink_dap_handle, q->mem_ap.ap->ap_num, q->mem_ap.csw, q->mem_ap.addr, + 4, buf); + break; + default: LOG_ERROR("ST-Link: Unknown queue command %d", q->cmd); retval = ERROR_FAIL; @@ -4261,10 +4337,54 @@ static int stlink_dap_op_queue_ap_read(struct adiv5_ap *ap, unsigned int reg, unsigned int i = stlink_dap_handle->queue_index++; struct dap_queue *q = &stlink_dap_handle->queue[i]; - q->cmd = CMD_AP_READ; - q->ap_r.reg = reg; - q->ap_r.ap = ap; - q->ap_r.p_data = data; + + if ((stlink_dap_handle->version.flags & STLINK_F_HAS_CSW) && + (reg == MEM_AP_REG_DRW || reg == MEM_AP_REG_BD0 || reg == MEM_AP_REG_BD1 || + reg == MEM_AP_REG_BD2 || reg == MEM_AP_REG_BD3)) { + /* de-queue previous write-TAR */ + struct dap_queue *prev_q = q - 1; + if (i && prev_q->cmd == CMD_AP_WRITE && prev_q->ap_w.ap == ap && prev_q->ap_w.reg == MEM_AP_REG_TAR) { + stlink_dap_handle->queue_index = i; + i--; + q = prev_q; + prev_q--; + } + /* de-queue previous write-CSW */ + if (i && prev_q->cmd == CMD_AP_WRITE && prev_q->ap_w.ap == ap && prev_q->ap_w.reg == MEM_AP_REG_CSW) { + stlink_dap_handle->queue_index = i; + q = prev_q; + } + + switch (ap->csw_value & CSW_SIZE_MASK) { + case CSW_8BIT: + q->cmd = CMD_MEM_AP_READ8; + break; + case CSW_16BIT: + q->cmd = CMD_MEM_AP_READ16; + break; + case CSW_32BIT: + q->cmd = CMD_MEM_AP_READ32; + break; + default: + LOG_ERROR("ST-Link: Unsupported CSW size %d", ap->csw_value & CSW_SIZE_MASK); + stlink_dap_record_error(ERROR_FAIL); + return ERROR_FAIL; + } + + q->mem_ap.addr = (reg == MEM_AP_REG_DRW) ? ap->tar_value : ((ap->tar_value & ~0x0f) | (reg & 0x0c)); + q->mem_ap.ap = ap; + q->mem_ap.p_data = data; + q->mem_ap.csw = ap->csw_default; + + /* force TAR and CSW update */ + ap->tar_valid = false; + ap->csw_value = 0; + } else { + q->cmd = CMD_AP_READ; + q->ap_r.reg = reg; + q->ap_r.ap = ap; + q->ap_r.p_data = data; + } if (i == MAX_QUEUE_DEPTH - 1) stlink_dap_run_internal(ap->dap); @@ -4280,10 +4400,54 @@ static int stlink_dap_op_queue_ap_write(struct adiv5_ap *ap, unsigned int reg, unsigned int i = stlink_dap_handle->queue_index++; struct dap_queue *q = &stlink_dap_handle->queue[i]; - q->cmd = CMD_AP_WRITE; - q->ap_w.reg = reg; - q->ap_w.ap = ap; - q->ap_w.data = data; + + if ((stlink_dap_handle->version.flags & STLINK_F_HAS_CSW) && + (reg == MEM_AP_REG_DRW || reg == MEM_AP_REG_BD0 || reg == MEM_AP_REG_BD1 || + reg == MEM_AP_REG_BD2 || reg == MEM_AP_REG_BD3)) { + /* de-queue previous write-TAR */ + struct dap_queue *prev_q = q - 1; + if (i && prev_q->cmd == CMD_AP_WRITE && prev_q->ap_w.ap == ap && prev_q->ap_w.reg == MEM_AP_REG_TAR) { + stlink_dap_handle->queue_index = i; + i--; + q = prev_q; + prev_q--; + } + /* de-queue previous write-CSW */ + if (i && prev_q->cmd == CMD_AP_WRITE && prev_q->ap_w.ap == ap && prev_q->ap_w.reg == MEM_AP_REG_CSW) { + stlink_dap_handle->queue_index = i; + q = prev_q; + } + + switch (ap->csw_value & CSW_SIZE_MASK) { + case CSW_8BIT: + q->cmd = CMD_MEM_AP_WRITE8; + break; + case CSW_16BIT: + q->cmd = CMD_MEM_AP_WRITE16; + break; + case CSW_32BIT: + q->cmd = CMD_MEM_AP_WRITE32; + break; + default: + LOG_ERROR("ST-Link: Unsupported CSW size %d", ap->csw_value & CSW_SIZE_MASK); + stlink_dap_record_error(ERROR_FAIL); + return ERROR_FAIL; + } + + q->mem_ap.addr = (reg == MEM_AP_REG_DRW) ? ap->tar_value : ((ap->tar_value & ~0x0f) | (reg & 0x0c)); + q->mem_ap.ap = ap; + q->mem_ap.data = data; + q->mem_ap.csw = ap->csw_default; + + /* force TAR and CSW update */ + ap->tar_valid = false; + ap->csw_value = 0; + } else { + q->cmd = CMD_AP_WRITE; + q->ap_w.reg = reg; + q->ap_w.ap = ap; + q->ap_w.data = data; + } if (i == MAX_QUEUE_DEPTH - 1) stlink_dap_run_internal(ap->dap); commit 6f914cd8990435eafc85f8fc75fbecd7fbb96214 Author: Antonio Borneo <bor...@gm...> Date: Wed Feb 5 16:20:37 2020 +0100 stlink: expose ap number and csw in memory r/w Recent versions of stlink firmware allow accessing access port other than zero and setting the CSW. Modify the internal API to provide ap_num and csw. There is no interest to modify HLA to use ap_num and csw, so set and use some backward compatible defaults. Change-Id: I3f6dfc6c670d19467d9f5e717c6c956db6faf7f3 Signed-off-by: Antonio Borneo <bor...@gm...> Reviewed-on: https://review.openocd.org/c/openocd/+/6602 Tested-by: jenkins Reviewed-by: Tarek BOCHKATI <tar...@gm...> diff --git a/src/jtag/drivers/stlink_usb.c b/src/jtag/drivers/stlink_usb.c index 92eb06d3a..3032ad4aa 100644 --- a/src/jtag/drivers/stlink_usb.c +++ b/src/jtag/drivers/stlink_usb.c @@ -113,6 +113,10 @@ */ #define MAX_WAIT_RETRIES 8 +/* HLA is currently limited at AP#0 and no control on CSW */ +#define STLINK_HLA_AP_NUM 0 +#define STLINK_HLA_CSW 0 + enum stlink_jtag_api_version { STLINK_JTAG_API_V1 = 1, STLINK_JTAG_API_V2, @@ -478,6 +482,7 @@ static inline int stlink_usb_xfer_noerrcheck(void *handle, const uint8_t *buf, i /* aliases */ #define STLINK_F_HAS_TARGET_VOLT STLINK_F_HAS_TRACE #define STLINK_F_HAS_FPU_REG STLINK_F_HAS_GETLASTRWSTATUS2 +#define STLINK_F_HAS_CSW STLINK_F_HAS_DPBANKSEL #define STLINK_REGSEL_IS_FPU(x) ((x) > 0x1F) @@ -1306,6 +1311,7 @@ static int stlink_usb_version(void *handle) flags |= STLINK_F_FIX_CLOSE_AP; /* Banked regs (DPv1 & DPv2) support from V2J32 */ + /* Memory R/W supports CSW from V2J32 */ if (h->version.jtag >= 32) flags |= STLINK_F_HAS_DPBANKSEL; @@ -1336,6 +1342,7 @@ static int stlink_usb_version(void *handle) flags |= STLINK_F_FIX_CLOSE_AP; /* Banked regs (DPv1 & DPv2) support from V3J2 */ + /* Memory R/W supports CSW from V3J2 */ if (h->version.jtag >= 2) flags |= STLINK_F_HAS_DPBANKSEL; @@ -2377,8 +2384,8 @@ static int stlink_usb_get_rw_status(void *handle) } /** */ -static int stlink_usb_read_mem8(void *handle, uint32_t addr, uint16_t len, - uint8_t *buffer) +static int stlink_usb_read_mem8(void *handle, uint8_t ap_num, uint32_t csw, + uint32_t addr, uint16_t len, uint8_t *buffer) { int res; uint16_t read_len = len; @@ -2386,6 +2393,9 @@ static int stlink_usb_read_mem8(void *handle, uint32_t addr, uint16_t len, assert(handle); + if ((ap_num != 0 || csw != 0) && !(h->version.flags & STLINK_F_HAS_CSW)) + return ERROR_COMMAND_NOTFOUND; + /* max 8 bit read/write is 64 bytes or 512 bytes for v3 */ if (len > stlink_usb_block(h)) { LOG_DEBUG("max buffer (%d) length exceeded", stlink_usb_block(h)); @@ -2400,6 +2410,9 @@ static int stlink_usb_read_mem8(void *handle, uint32_t addr, uint16_t len, h->cmdidx += 4; h_u16_to_le(h->cmdbuf+h->cmdidx, len); h->cmdidx += 2; + h->cmdbuf[h->cmdidx++] = ap_num; + h_u24_to_le(h->cmdbuf + h->cmdidx, csw >> 8); + h->cmdidx += 3; /* we need to fix read length for single bytes */ if (read_len == 1) @@ -2416,14 +2429,17 @@ static int stlink_usb_read_mem8(void *handle, uint32_t addr, uint16_t len, } /** */ -static int stlink_usb_write_mem8(void *handle, uint32_t addr, uint16_t len, - const uint8_t *buffer) +static int stlink_usb_write_mem8(void *handle, uint8_t ap_num, uint32_t csw, + uint32_t addr, uint16_t len, const uint8_t *buffer) { int res; struct stlink_usb_handle_s *h = handle; assert(handle); + if ((ap_num != 0 || csw != 0) && !(h->version.flags & STLINK_F_HAS_CSW)) + return ERROR_COMMAND_NOTFOUND; + /* max 8 bit read/write is 64 bytes or 512 bytes for v3 */ if (len > stlink_usb_block(h)) { LOG_DEBUG("max buffer length (%d) exceeded", stlink_usb_block(h)); @@ -2438,6 +2454,9 @@ static int stlink_usb_write_mem8(void *handle, uint32_t addr, uint16_t len, h->cmdidx += 4; h_u16_to_le(h->cmdbuf+h->cmdidx, len); h->cmdidx += 2; + h->cmdbuf[h->cmdidx++] = ap_num; + h_u24_to_le(h->cmdbuf + h->cmdidx, csw >> 8); + h->cmdidx += 3; res = stlink_usb_xfer_noerrcheck(handle, buffer, len); @@ -2448,8 +2467,8 @@ static int stlink_usb_write_mem8(void *handle, uint32_t addr, uint16_t len, } /** */ -static int stlink_usb_read_mem16(void *handle, uint32_t addr, uint16_t len, - uint8_t *buffer) +static int stlink_usb_read_mem16(void *handle, uint8_t ap_num, uint32_t csw, + uint32_t addr, uint16_t len, uint8_t *buffer) { int res; struct stlink_usb_handle_s *h = handle; @@ -2459,6 +2478,9 @@ static int stlink_usb_read_mem16(void *handle, uint32_t addr, uint16_t len, if (!(h->version.flags & STLINK_F_HAS_MEM_16BIT)) return ERROR_COMMAND_NOTFOUND; + if ((ap_num != 0 || csw != 0) && !(h->version.flags & STLINK_F_HAS_CSW)) + return ERROR_COMMAND_NOTFOUND; + if (len > STLINK_MAX_RW16_32) { LOG_DEBUG("max buffer (%d) length exceeded", STLINK_MAX_RW16_32); return ERROR_FAIL; @@ -2478,6 +2500,9 @@ static int stlink_usb_read_mem16(void *handle, uint32_t addr, uint16_t len, h->cmdidx += 4; h_u16_to_le(h->cmdbuf+h->cmdidx, len); h->cmdidx += 2; + h->cmdbuf[h->cmdidx++] = ap_num; + h_u24_to_le(h->cmdbuf + h->cmdidx, csw >> 8); + h->cmdidx += 3; res = stlink_usb_xfer_noerrcheck(handle, h->databuf, len); @@ -2490,8 +2515,8 @@ static int stlink_usb_read_mem16(void *handle, uint32_t addr, uint16_t len, } /** */ -static int stlink_usb_write_mem16(void *handle, uint32_t addr, uint16_t len, - const uint8_t *buffer) +static int stlink_usb_write_mem16(void *handle, uint8_t ap_num, uint32_t csw, + uint32_t addr, uint16_t len, const uint8_t *buffer) { int res; struct stlink_usb_handle_s *h = handle; @@ -2501,6 +2526,9 @@ static int stlink_usb_write_mem16(void *handle, uint32_t addr, uint16_t len, if (!(h->version.flags & STLINK_F_HAS_MEM_16BIT)) return ERROR_COMMAND_NOTFOUND; + if ((ap_num != 0 || csw != 0) && !(h->version.flags & STLINK_F_HAS_CSW)) + return ERROR_COMMAND_NOTFOUND; + if (len > STLINK_MAX_RW16_32) { LOG_DEBUG("max buffer (%d) length exceeded", STLINK_MAX_RW16_32); return ERROR_FAIL; @@ -2520,6 +2548,9 @@ static int stlink_usb_write_mem16(void *handle, uint32_t addr, uint16_t len, h->cmdidx += 4; h_u16_to_le(h->cmdbuf+h->cmdidx, len); h->cmdidx += 2; + h->cmdbuf[h->cmdidx++] = ap_num; + h_u24_to_le(h->cmdbuf + h->cmdidx, csw >> 8); + h->cmdidx += 3; res = stlink_usb_xfer_noerrcheck(handle, buffer, len); @@ -2530,14 +2561,17 @@ static int stlink_usb_write_mem16(void *handle, uint32_t addr, uint16_t len, } /** */ -static int stlink_usb_read_mem32(void *handle, uint32_t addr, uint16_t len, - uint8_t *buffer) +static int stlink_usb_read_mem32(void *handle, uint8_t ap_num, uint32_t csw, + uint32_t addr, uint16_t len, uint8_t *buffer) { int res; struct stlink_usb_handle_s *h = handle; assert(handle); + if ((ap_num != 0 || csw != 0) && !(h->version.flags & STLINK_F_HAS_CSW)) + return ERROR_COMMAND_NOTFOUND; + if (len > STLINK_MAX_RW16_32) { LOG_DEBUG("max buffer (%d) length exceeded", STLINK_MAX_RW16_32); return ERROR_FAIL; @@ -2557,6 +2591,9 @@ static int stlink_usb_read_mem32(void *handle, uint32_t addr, uint16_t len, h->cmdidx += 4; h_u16_to_le(h->cmdbuf+h->cmdidx, len); h->cmdidx += 2; + h->cmdbuf[h->cmdidx++] = ap_num; + h_u24_to_le(h->cmdbuf + h->cmdidx, csw >> 8); + h->cmdidx += 3; res = stlink_usb_xfer_noerrcheck(handle, h->databuf, len); @@ -2569,14 +2606,17 @@ static int stlink_usb_read_mem32(void *handle, uint32_t addr, uint16_t len, } /** */ -static int stlink_usb_write_mem32(void *handle, uint32_t addr, uint16_t len, - const uint8_t *buffer) +static int stlink_usb_write_mem32(void *handle, uint8_t ap_num, uint32_t csw, + uint32_t addr, uint16_t len, const uint8_t *buffer) { int res; struct stlink_usb_handle_s *h = handle; assert(handle); + if ((ap_num != 0 || csw != 0) && !(h->version.flags & STLINK_F_HAS_CSW)) + return ERROR_COMMAND_NOTFOUND; + if (len > STLINK_MAX_RW16_32) { LOG_DEBUG("max buffer (%d) length exceeded", STLINK_MAX_RW16_32); return ERROR_FAIL; @@ -2596,6 +2636,9 @@ static int stlink_usb_write_mem32(void *handle, uint32_t addr, uint16_t len, h->cmdidx += 4; h_u16_to_le(h->cmdbuf+h->cmdidx, len); h->cmdidx += 2; + h->cmdbuf[h->cmdidx++] = ap_num; + h_u24_to_le(h->cmdbuf + h->cmdidx, csw >> 8); + h->cmdidx += 3; res = stlink_usb_xfer_noerrcheck(handle, buffer, len); @@ -2613,8 +2656,8 @@ static uint32_t stlink_max_block_size(uint32_t tar_autoincr_block, uint32_t addr return max_tar_block; } -static int stlink_usb_read_mem(void *handle, uint32_t addr, uint32_t size, - uint32_t count, uint8_t *buffer) +static int stlink_usb_read_ap_mem(void *handle, uint8_t ap_num, uint32_t csw, + uint32_t addr, uint32_t size, uint32_t count, uint8_t *buffer) { int retval = ERROR_OK; uint32_t bytes_remaining; @@ -2629,7 +2672,6 @@ static int stlink_usb_read_mem(void *handle, uint32_t addr, uint32_t size, size = 1; while (count) { - bytes_remaining = (size != 1) ? stlink_max_block_size(h->max_mem_packet, addr) : stlink_usb_block(h); @@ -2643,7 +2685,6 @@ static int stlink_usb_read_mem(void *handle, uint32_t addr, uint32_t size, * as 8bit access. */ if (size != 1) { - /* When in jtag mode the stlink uses the auto-increment functionality. * However it expects us to pass the data correctly, this includes * alignment and any page boundaries. We already do this as part of the @@ -2654,11 +2695,10 @@ static int stlink_usb_read_mem(void *handle, uint32_t addr, uint32_t size, /* we first need to check for any unaligned bytes */ if (addr & (size - 1)) { - uint32_t head_bytes = size - (addr & (size - 1)); - retval = stlink_usb_read_mem8(handle, addr, head_bytes, buffer); + retval = stlink_usb_read_mem8(handle, ap_num, csw, addr, head_bytes, buffer); if (retval == ERROR_WAIT && retries < MAX_WAIT_RETRIES) { - usleep((1<<retries++) * 1000); + usleep((1 << retries++) * 1000); continue; } if (retval != ERROR_OK) @@ -2670,16 +2710,17 @@ static int stlink_usb_read_mem(void *handle, uint32_t addr, uint32_t size, } if (bytes_remaining & (size - 1)) - retval = stlink_usb_read_mem(handle, addr, 1, bytes_remaining, buffer); + retval = stlink_usb_read_ap_mem(handle, ap_num, csw, addr, 1, bytes_remaining, buffer); else if (size == 2) - retval = stlink_usb_read_mem16(handle, addr, bytes_remaining, buffer); + retval = stlink_usb_read_mem16(handle, ap_num, csw, addr, bytes_remaining, buffer); else - retval = stlink_usb_read_mem32(handle, addr, bytes_remaining, buffer); - } else - retval = stlink_usb_read_mem8(handle, addr, bytes_remaining, buffer); + retval = stlink_usb_read_mem32(handle, ap_num, csw, addr, bytes_remaining, buffer); + } else { + retval = stlink_usb_read_mem8(handle, ap_num, csw, addr, bytes_remaining, buffer); + } if (retval == ERROR_WAIT && retries < MAX_WAIT_RETRIES) { - usleep((1<<retries++) * 1000); + usleep((1 << retries++) * 1000); continue; } if (retval != ERROR_OK) @@ -2693,8 +2734,15 @@ static int stlink_usb_read_mem(void *handle, uint32_t addr, uint32_t size, return retval; } -static int stlink_usb_write_mem(void *handle, uint32_t addr, uint32_t size, - uint32_t count, const uint8_t *buffer) +static int stlink_usb_read_mem(void *handle, uint32_t addr, uint32_t size, + uint32_t count, uint8_t *buffer) +{ + return stlink_usb_read_ap_mem(handle, STLINK_HLA_AP_NUM, STLINK_HLA_CSW, + addr, size, count, buffer); +} + +static int stlink_usb_write_ap_mem(void *handle, uint8_t ap_num, uint32_t csw, + uint32_t addr, uint32_t size, uint32_t count, const uint8_t *buffer) { int retval = ERROR_OK; uint32_t bytes_remaining; @@ -2736,7 +2784,7 @@ static int stlink_usb_write_mem(void *handle, uint32_t addr, uint32_t size, if (addr & (size - 1)) { uint32_t head_bytes = size - (addr & (size - 1)); - retval = stlink_usb_write_mem8(handle, addr, head_bytes, buffer); + retval = stlink_usb_write_mem8(handle, ap_num, csw, addr, head_bytes, buffer); if (retval == ERROR_WAIT && retries < MAX_WAIT_RETRIES) { usleep((1<<retries++) * 1000); continue; @@ -2750,14 +2798,14 @@ static int stlink_usb_write_mem(void *handle, uint32_t addr, uint32_t size, } if (bytes_remaining & (size - 1)) - retval = stlink_usb_write_mem(handle, addr, 1, bytes_remaining, buffer); + retval = stlink_usb_write_ap_mem(handle, ap_num, csw, addr, 1, bytes_remaining, buffer); else if (size == 2) - retval = stlink_usb_write_mem16(handle, addr, bytes_remaining, buffer); + retval = stlink_usb_write_mem16(handle, ap_num, csw, addr, bytes_remaining, buffer); else - retval = stlink_usb_write_mem32(handle, addr, bytes_remaining, buffer); + retval = stlink_usb_write_mem32(handle, ap_num, csw, addr, bytes_remaining, buffer); } else - retval = stlink_usb_write_mem8(handle, addr, bytes_remaining, buffer); + retval = stlink_usb_write_mem8(handle, ap_num, csw, addr, bytes_remaining, buffer); if (retval == ERROR_WAIT && retries < MAX_WAIT_RETRIES) { usleep((1<<retries++) * 1000); continue; @@ -2773,6 +2821,13 @@ static int stlink_usb_write_mem(void *handle, uint32_t addr, uint32_t size, return retval; } +static int stlink_usb_write_mem(void *handle, uint32_t addr, uint32_t size, + uint32_t count, const uint8_t *buffer) +{ + return stlink_usb_write_ap_mem(handle, STLINK_HLA_AP_NUM, STLINK_HLA_CSW, + addr, size, count, buffer); +} + /** */ static int stlink_usb_override_target(const char *targetname) { @@ -3561,8 +3616,8 @@ static int stlink_open(struct hl_interface_param_s *param, enum stlink_mode mode h->max_mem_packet = (1 << 10); uint8_t buffer[4]; - stlink_usb_open_ap(h, 0); - err = stlink_usb_read_mem32(h, CPUID, 4, buffer); + stlink_usb_open_ap(h, STLINK_HLA_AP_NUM); + err = stlink_usb_read_mem32(h, STLINK_HLA_AP_NUM, STLINK_HLA_CSW, CPUID, 4, buffer); if (err == ERROR_OK) { uint32_t cpuid = le_to_h_u32(buffer); int i = (cpuid >> 4) & 0xf; ----------------------------------------------------------------------- Summary of changes: src/jtag/drivers/stlink_usb.c | 303 ++++++++++++++++++++++++++++++++++++------ 1 file changed, 261 insertions(+), 42 deletions(-) hooks/post-receive -- Main OpenOCD repository |
From: OpenOCD-Gerrit <ope...@us...> - 2021-11-05 22:41:35
|
This is an automated email from the git hooks/post-receive script. It was generated because a ref change was pushed to the repository containing the project "Main OpenOCD repository". The branch, master has been updated via 76d109523199aa44bb36627ff46d91719566086a (commit) from fd0b4dd15ff7217f3c70818c7fd2f0a5b88de89a (commit) Those revisions listed above that are new to this repository have not appeared on any other notification email; so we list those revisions in full, below. - Log ----------------------------------------------------------------- commit 76d109523199aa44bb36627ff46d91719566086a Author: Antonio Borneo <bor...@gm...> Date: Thu Jul 22 15:08:36 2021 +0200 stlink: add queue in dap-direct mode Implement a minimalist queue for DP/AP commands and reorganize the code to use it. There is no performance improvement; the queue elements are still sent one-by-one on USB or on TCP during dap_run(). Change-Id: I8353563e59f883624bcc0fbe8b54955e4f27ccfa Signed-off-by: Antonio Borneo <bor...@gm...> Reviewed-on: https://review.openocd.org/c/openocd/+/6601 Tested-by: jenkins Reviewed-by: Tarek BOCHKATI <tar...@gm...> diff --git a/src/jtag/drivers/stlink_usb.c b/src/jtag/drivers/stlink_usb.c index e83e84b95..92eb06d3a 100644 --- a/src/jtag/drivers/stlink_usb.c +++ b/src/jtag/drivers/stlink_usb.c @@ -175,6 +175,43 @@ struct stlink_backend_s { int (*read_trace)(void *handle, const uint8_t *buf, int size); }; +/* TODO: make queue size dynamic */ +/* TODO: don't allocate queue for HLA */ +#define MAX_QUEUE_DEPTH (4096) + +enum queue_cmd { + CMD_DP_READ = 1, + CMD_DP_WRITE, + CMD_AP_READ, + CMD_AP_WRITE, +}; + +struct dap_queue { + enum queue_cmd cmd; + union { + struct dp_r { + unsigned int reg; + struct adiv5_dap *dap; + uint32_t *p_data; + } dp_r; + struct dp_w { + unsigned int reg; + struct adiv5_dap *dap; + uint32_t data; + } dp_w; + struct ap_r { + unsigned int reg; + struct adiv5_ap *ap; + uint32_t *p_data; + } ap_r; + struct ap_w { + unsigned int reg; + struct adiv5_ap *ap; + uint32_t data; + } ap_w; + }; +}; + /** */ struct stlink_usb_handle_s { /** */ @@ -218,6 +255,10 @@ struct stlink_usb_handle_s { /** reconnect is needed next time we try to query the * status */ bool reconnect_pending; + /** queue of dap_direct operations */ + struct dap_queue queue[MAX_QUEUE_DEPTH]; + /** first element available in the queue */ + unsigned int queue_index; }; /** */ @@ -3750,9 +3791,6 @@ static struct hl_interface_param_s stlink_dap_param; static DECLARE_BITMAP(opened_ap, DP_APSEL_MAX + 1); static int stlink_dap_error = ERROR_OK; -static int stlink_dap_op_queue_dp_read(struct adiv5_dap *dap, unsigned reg, - uint32_t *data); - /** */ static int stlink_dap_record_error(int error) { @@ -3769,6 +3807,11 @@ static int stlink_dap_get_and_clear_error(void) return retval; } +static int stlink_dap_get_error(void) +{ + return stlink_dap_error; +} + static int stlink_usb_open_ap(void *handle, unsigned short apsel) { struct stlink_usb_handle_s *h = handle; @@ -3914,8 +3957,7 @@ static int stlink_dap_op_send_sequence(struct adiv5_dap *dap, enum swd_special_s } /** */ -static int stlink_dap_op_queue_dp_read(struct adiv5_dap *dap, unsigned reg, - uint32_t *data) +static int stlink_dap_dp_read(struct adiv5_dap *dap, unsigned int reg, uint32_t *data) { uint32_t dummy; int retval; @@ -3926,10 +3968,6 @@ static int stlink_dap_op_queue_dp_read(struct adiv5_dap *dap, unsigned reg, return ERROR_COMMAND_NOTFOUND; } - retval = stlink_dap_check_reconnect(dap); - if (retval != ERROR_OK) - return retval; - data = data ? data : &dummy; if (stlink_dap_handle->version.flags & STLINK_F_QUIRK_JTAG_DP_READ && stlink_dap_handle->st_mode == STLINK_MODE_DEBUG_JTAG) { @@ -3944,12 +3982,11 @@ static int stlink_dap_op_queue_dp_read(struct adiv5_dap *dap, unsigned reg, STLINK_DEBUG_PORT_ACCESS, reg, data); } - return stlink_dap_record_error(retval); + return retval; } /** */ -static int stlink_dap_op_queue_dp_write(struct adiv5_dap *dap, unsigned reg, - uint32_t data) +static int stlink_dap_dp_write(struct adiv5_dap *dap, unsigned int reg, uint32_t data) { int retval; @@ -3965,31 +4002,22 @@ static int stlink_dap_op_queue_dp_write(struct adiv5_dap *dap, unsigned reg, data &= ~DP_SELECT_DPBANK; } - retval = stlink_dap_check_reconnect(dap); - if (retval != ERROR_OK) - return retval; - /* ST-Link does not like that we set CORUNDETECT */ if (reg == DP_CTRL_STAT) data &= ~CORUNDETECT; retval = stlink_write_dap_register(stlink_dap_handle, STLINK_DEBUG_PORT_ACCESS, reg, data); - return stlink_dap_record_error(retval); + return retval; } /** */ -static int stlink_dap_op_queue_ap_read(struct adiv5_ap *ap, unsigned reg, - uint32_t *data) +static int stlink_dap_ap_read(struct adiv5_ap *ap, unsigned int reg, uint32_t *data) { struct adiv5_dap *dap = ap->dap; uint32_t dummy; int retval; - retval = stlink_dap_check_reconnect(dap); - if (retval != ERROR_OK) - return retval; - if (reg != AP_REG_IDR) { retval = stlink_dap_open_ap(ap->ap_num); if (retval != ERROR_OK) @@ -3999,20 +4027,15 @@ static int stlink_dap_op_queue_ap_read(struct adiv5_ap *ap, unsigned reg, retval = stlink_read_dap_register(stlink_dap_handle, ap->ap_num, reg, data); dap->stlink_flush_ap_write = false; - return stlink_dap_record_error(retval); + return retval; } /** */ -static int stlink_dap_op_queue_ap_write(struct adiv5_ap *ap, unsigned reg, - uint32_t data) +static int stlink_dap_ap_write(struct adiv5_ap *ap, unsigned int reg, uint32_t data) { struct adiv5_dap *dap = ap->dap; int retval; - retval = stlink_dap_check_reconnect(dap); - if (retval != ERROR_OK) - return retval; - retval = stlink_dap_open_ap(ap->ap_num); if (retval != ERROR_OK) return retval; @@ -4020,7 +4043,7 @@ static int stlink_dap_op_queue_ap_write(struct adiv5_ap *ap, unsigned reg, retval = stlink_write_dap_register(stlink_dap_handle, ap->ap_num, reg, data); dap->stlink_flush_ap_write = true; - return stlink_dap_record_error(retval); + return retval; } /** */ @@ -4030,8 +4053,47 @@ static int stlink_dap_op_queue_ap_abort(struct adiv5_dap *dap, uint8_t *ack) return ERROR_OK; } +static void stlink_dap_run_internal(struct adiv5_dap *dap) +{ + int retval = stlink_dap_check_reconnect(dap); + if (retval != ERROR_OK) { + stlink_dap_handle->queue_index = 0; + stlink_dap_record_error(retval); + return; + } + + unsigned int i = stlink_dap_handle->queue_index; + struct dap_queue *q = &stlink_dap_handle->queue[0]; + + while (i && stlink_dap_get_error() == ERROR_OK) { + switch (q->cmd) { + case CMD_DP_READ: + retval = stlink_dap_dp_read(q->dp_r.dap, q->dp_r.reg, q->dp_r.p_data); + break; + case CMD_DP_WRITE: + retval = stlink_dap_dp_write(q->dp_w.dap, q->dp_w.reg, q->dp_w.data); + break; + case CMD_AP_READ: + retval = stlink_dap_ap_read(q->ap_r.ap, q->ap_r.reg, q->ap_r.p_data); + break; + case CMD_AP_WRITE: + retval = stlink_dap_ap_write(q->ap_w.ap, q->ap_w.reg, q->ap_w.data); + break; + default: + LOG_ERROR("ST-Link: Unknown queue command %d", q->cmd); + retval = ERROR_FAIL; + break; + } + stlink_dap_record_error(retval); + q++; + i--; + } + + stlink_dap_handle->queue_index = 0; +} + /** */ -static int stlink_dap_op_run(struct adiv5_dap *dap) +static int stlink_dap_run_finalize(struct adiv5_dap *dap) { uint32_t ctrlstat, pwrmask; int retval, saved_retval; @@ -4046,7 +4108,7 @@ static int stlink_dap_op_run(struct adiv5_dap *dap) */ if (dap->stlink_flush_ap_write) { dap->stlink_flush_ap_write = false; - retval = stlink_dap_op_queue_dp_read(dap, DP_RDBUFF, NULL); + retval = stlink_dap_dp_read(dap, DP_RDBUFF, NULL); if (retval != ERROR_OK) { dap->do_reconnect = true; return retval; @@ -4055,12 +4117,7 @@ static int stlink_dap_op_run(struct adiv5_dap *dap) saved_retval = stlink_dap_get_and_clear_error(); - retval = stlink_dap_op_queue_dp_read(dap, DP_CTRL_STAT, &ctrlstat); - if (retval != ERROR_OK) { - dap->do_reconnect = true; - return retval; - } - retval = stlink_dap_get_and_clear_error(); + retval = stlink_dap_dp_read(dap, DP_CTRL_STAT, &ctrlstat); if (retval != ERROR_OK) { LOG_ERROR("Fail reading CTRL/STAT register. Force reconnect"); dap->do_reconnect = true; @@ -4069,15 +4126,10 @@ static int stlink_dap_op_run(struct adiv5_dap *dap) if (ctrlstat & SSTICKYERR) { if (stlink_dap_handle->st_mode == STLINK_MODE_DEBUG_JTAG) - retval = stlink_dap_op_queue_dp_write(dap, DP_CTRL_STAT, + retval = stlink_dap_dp_write(dap, DP_CTRL_STAT, ctrlstat & (dap->dp_ctrl_stat | SSTICKYERR)); else - retval = stlink_dap_op_queue_dp_write(dap, DP_ABORT, STKERRCLR); - if (retval != ERROR_OK) { - dap->do_reconnect = true; - return retval; - } - retval = stlink_dap_get_and_clear_error(); + retval = stlink_dap_dp_write(dap, DP_ABORT, STKERRCLR); if (retval != ERROR_OK) { dap->do_reconnect = true; return retval; @@ -4092,6 +4144,12 @@ static int stlink_dap_op_run(struct adiv5_dap *dap) return saved_retval; } +static int stlink_dap_op_queue_run(struct adiv5_dap *dap) +{ + stlink_dap_run_internal(dap); + return stlink_dap_run_finalize(dap); +} + /** */ static void stlink_dap_op_quit(struct adiv5_dap *dap) { @@ -4102,6 +4160,82 @@ static void stlink_dap_op_quit(struct adiv5_dap *dap) LOG_ERROR("Error closing APs"); } +static int stlink_dap_op_queue_dp_read(struct adiv5_dap *dap, unsigned int reg, + uint32_t *data) +{ + if (stlink_dap_get_error() != ERROR_OK) + return ERROR_OK; + + unsigned int i = stlink_dap_handle->queue_index++; + struct dap_queue *q = &stlink_dap_handle->queue[i]; + q->cmd = CMD_DP_READ; + q->dp_r.reg = reg; + q->dp_r.dap = dap; + q->dp_r.p_data = data; + + if (i == MAX_QUEUE_DEPTH - 1) + stlink_dap_run_internal(dap); + + return ERROR_OK; +} + +static int stlink_dap_op_queue_dp_write(struct adiv5_dap *dap, unsigned int reg, + uint32_t data) +{ + if (stlink_dap_get_error() != ERROR_OK) + return ERROR_OK; + + unsigned int i = stlink_dap_handle->queue_index++; + struct dap_queue *q = &stlink_dap_handle->queue[i]; + q->cmd = CMD_DP_WRITE; + q->dp_w.reg = reg; + q->dp_w.dap = dap; + q->dp_w.data = data; + + if (i == MAX_QUEUE_DEPTH - 1) + stlink_dap_run_internal(dap); + + return ERROR_OK; +} + +static int stlink_dap_op_queue_ap_read(struct adiv5_ap *ap, unsigned int reg, + uint32_t *data) +{ + if (stlink_dap_get_error() != ERROR_OK) + return ERROR_OK; + + unsigned int i = stlink_dap_handle->queue_index++; + struct dap_queue *q = &stlink_dap_handle->queue[i]; + q->cmd = CMD_AP_READ; + q->ap_r.reg = reg; + q->ap_r.ap = ap; + q->ap_r.p_data = data; + + if (i == MAX_QUEUE_DEPTH - 1) + stlink_dap_run_internal(ap->dap); + + return ERROR_OK; +} + +static int stlink_dap_op_queue_ap_write(struct adiv5_ap *ap, unsigned int reg, + uint32_t data) +{ + if (stlink_dap_get_error() != ERROR_OK) + return ERROR_OK; + + unsigned int i = stlink_dap_handle->queue_index++; + struct dap_queue *q = &stlink_dap_handle->queue[i]; + q->cmd = CMD_AP_WRITE; + q->ap_w.reg = reg; + q->ap_w.ap = ap; + q->ap_w.data = data; + + if (i == MAX_QUEUE_DEPTH - 1) + stlink_dap_run_internal(ap->dap); + + return ERROR_OK; +} + static int stlink_swim_op_srst(void) { return stlink_swim_generate_rst(stlink_dap_handle); @@ -4430,7 +4564,7 @@ static const struct dap_ops stlink_dap_ops = { .queue_ap_read = stlink_dap_op_queue_ap_read, .queue_ap_write = stlink_dap_op_queue_ap_write, .queue_ap_abort = stlink_dap_op_queue_ap_abort, - .run = stlink_dap_op_run, + .run = stlink_dap_op_queue_run, .sync = NULL, /* optional */ .quit = stlink_dap_op_quit, /* optional */ }; ----------------------------------------------------------------------- Summary of changes: src/jtag/drivers/stlink_usb.c | 228 +++++++++++++++++++++++++++++++++--------- 1 file changed, 181 insertions(+), 47 deletions(-) hooks/post-receive -- Main OpenOCD repository |
From: OpenOCD-Gerrit <ope...@us...> - 2021-11-05 22:41:20
|
This is an automated email from the git hooks/post-receive script. It was generated because a ref change was pushed to the repository containing the project "Main OpenOCD repository". The branch, master has been updated via fd0b4dd15ff7217f3c70818c7fd2f0a5b88de89a (commit) from 7901cf2124fbaffa85d589b67c580d6ad2e9beb6 (commit) Those revisions listed above that are new to this repository have not appeared on any other notification email; so we list those revisions in full, below. - Log ----------------------------------------------------------------- commit fd0b4dd15ff7217f3c70818c7fd2f0a5b88de89a Author: Antonio Borneo <bor...@gm...> Date: Sun Jul 25 17:51:49 2021 +0200 stlink: check buffer size on 16 and 32 bit memory transfer Both HLA and ADIv5 layers limit the memory transfer within blocks whose boundaries are aligned at 1024 or 4096 bytes. New stlink firmware handle the ADIv5 TAR autoincrement, making possible to send memory transfers across the boundary of 1024 or 4096 byte. OpenOCD doesn't use this feature yet. Use the correct buffer size in the code, even if it is not used. While there, split SWIM buffer size from JTAG/SWD case; stlink has a dedicated command to retrieve SWIM buffer size, but currently not implemented in OpenOCD. Change-Id: Id46c0356ef21cead08726c044a1cd9725fd4f923 Signed-off-by: Antonio Borneo <bor...@gm...> Reviewed-on: https://review.openocd.org/c/openocd/+/6600 Tested-by: jenkins Reviewed-by: Tarek BOCHKATI <tar...@gm...> diff --git a/src/jtag/drivers/stlink_usb.c b/src/jtag/drivers/stlink_usb.c index a52370863..e83e84b95 100644 --- a/src/jtag/drivers/stlink_usb.c +++ b/src/jtag/drivers/stlink_usb.c @@ -79,7 +79,7 @@ #define STLINK_V2_1_TRACE_EP (2|ENDPOINT_IN) #define STLINK_SG_SIZE (31) -#define STLINK_DATA_SIZE (4096) +#define STLINK_DATA_SIZE (6144) #define STLINK_CMD_SIZE_V2 (16) #define STLINK_CMD_SIZE_V1 (10) @@ -97,9 +97,16 @@ * ST-Link/V1, ST-Link/V2 and ST-Link/V2.1 are full-speed USB devices and * this limits the bulk packet size and the 8bit read/writes to max 64 bytes. * STLINK-V3 is a high speed USB 2.0 and the limit is 512 bytes from FW V3J6. + * + * For 16 and 32bit read/writes stlink handles USB packet split and the limit + * is the internal buffer size of 6144 bytes. + * TODO: override ADIv5 layer's tar_autoincr_block that limits the transfer + * to 1024 or 4096 bytes */ -#define STLINK_MAX_RW8 (64) -#define STLINKV3_MAX_RW8 (512) +#define STLINK_MAX_RW8 (64) +#define STLINKV3_MAX_RW8 (512) +#define STLINK_MAX_RW16_32 STLINK_DATA_SIZE +#define STLINK_SWIM_DATA_SIZE STLINK_DATA_SIZE /* "WAIT" responses will be retried (with exponential backoff) at * most this many times before failing to caller. @@ -1807,7 +1814,7 @@ static int stlink_swim_writebytes(void *handle, uint32_t addr, uint32_t len, con unsigned int datalen = 0; int cmdsize = STLINK_CMD_SIZE_V2; - if (len > STLINK_DATA_SIZE) + if (len > STLINK_SWIM_DATA_SIZE) return ERROR_FAIL; if (h->version.stlink == 1) @@ -1840,7 +1847,7 @@ static int stlink_swim_readbytes(void *handle, uint32_t addr, uint32_t len, uint struct stlink_usb_handle_s *h = handle; int res; - if (len > STLINK_DATA_SIZE) + if (len > STLINK_SWIM_DATA_SIZE) return ERROR_FAIL; stlink_usb_init_buffer(handle, h->rx_ep, 0); @@ -2411,6 +2418,11 @@ static int stlink_usb_read_mem16(void *handle, uint32_t addr, uint16_t len, if (!(h->version.flags & STLINK_F_HAS_MEM_16BIT)) return ERROR_COMMAND_NOTFOUND; + if (len > STLINK_MAX_RW16_32) { + LOG_DEBUG("max buffer (%d) length exceeded", STLINK_MAX_RW16_32); + return ERROR_FAIL; + } + /* data must be a multiple of 2 and half-word aligned */ if (len % 2 || addr % 2) { LOG_DEBUG("Invalid data alignment"); @@ -2448,6 +2460,11 @@ static int stlink_usb_write_mem16(void *handle, uint32_t addr, uint16_t len, if (!(h->version.flags & STLINK_F_HAS_MEM_16BIT)) return ERROR_COMMAND_NOTFOUND; + if (len > STLINK_MAX_RW16_32) { + LOG_DEBUG("max buffer (%d) length exceeded", STLINK_MAX_RW16_32); + return ERROR_FAIL; + } + /* data must be a multiple of 2 and half-word aligned */ if (len % 2 || addr % 2) { LOG_DEBUG("Invalid data alignment"); @@ -2480,6 +2497,11 @@ static int stlink_usb_read_mem32(void *handle, uint32_t addr, uint16_t len, assert(handle); + if (len > STLINK_MAX_RW16_32) { + LOG_DEBUG("max buffer (%d) length exceeded", STLINK_MAX_RW16_32); + return ERROR_FAIL; + } + /* data must be a multiple of 4 and word aligned */ if (len % 4 || addr % 4) { LOG_DEBUG("Invalid data alignment"); @@ -2514,6 +2536,11 @@ static int stlink_usb_write_mem32(void *handle, uint32_t addr, uint16_t len, assert(handle); + if (len > STLINK_MAX_RW16_32) { + LOG_DEBUG("max buffer (%d) length exceeded", STLINK_MAX_RW16_32); + return ERROR_FAIL; + } + /* data must be a multiple of 4 and word aligned */ if (len % 4 || addr % 4) { LOG_DEBUG("Invalid data alignment"); @@ -3482,7 +3509,7 @@ static int stlink_open(struct hl_interface_param_s *param, enum stlink_mode mode goto error_open; } *fd = h; - h->max_mem_packet = STLINK_DATA_SIZE; + h->max_mem_packet = STLINK_SWIM_DATA_SIZE; return ERROR_OK; } @@ -4090,7 +4117,7 @@ static int stlink_swim_op_read_mem(uint32_t addr, uint32_t size, count *= size; while (count) { - bytes_remaining = (count > STLINK_DATA_SIZE) ? STLINK_DATA_SIZE : count; + bytes_remaining = (count > STLINK_SWIM_DATA_SIZE) ? STLINK_SWIM_DATA_SIZE : count; retval = stlink_swim_readbytes(stlink_dap_handle, addr, bytes_remaining, buffer); if (retval != ERROR_OK) return retval; @@ -4113,7 +4140,7 @@ static int stlink_swim_op_write_mem(uint32_t addr, uint32_t size, count *= size; while (count) { - bytes_remaining = (count > STLINK_DATA_SIZE) ? STLINK_DATA_SIZE : count; + bytes_remaining = (count > STLINK_SWIM_DATA_SIZE) ? STLINK_SWIM_DATA_SIZE : count; retval = stlink_swim_writebytes(stlink_dap_handle, addr, bytes_remaining, buffer); if (retval != ERROR_OK) return retval; ----------------------------------------------------------------------- Summary of changes: src/jtag/drivers/stlink_usb.c | 43 +++++++++++++++++++++++++++++++++++-------- 1 file changed, 35 insertions(+), 8 deletions(-) hooks/post-receive -- Main OpenOCD repository |
From: OpenOCD-Gerrit <ope...@us...> - 2021-11-03 20:33:19
|
This is an automated email from the git hooks/post-receive script. It was generated because a ref change was pushed to the repository containing the project "Main OpenOCD repository". The branch, master has been updated via 7901cf2124fbaffa85d589b67c580d6ad2e9beb6 (commit) from 97db87c22eec204edfebd55973ee1211a1dba6d3 (commit) Those revisions listed above that are new to this repository have not appeared on any other notification email; so we list those revisions in full, below. - Log ----------------------------------------------------------------- commit 7901cf2124fbaffa85d589b67c580d6ad2e9beb6 Author: Jimmy <nh...@gm...> Date: Thu Apr 23 18:58:58 2020 +0800 flash/nor/stm32lx: fixed writes at high adapter speeds The busy flag must be polled after each half-page write. At low clock speeds, no issue is observed when the poll is omitted, because the writes complete before the next write begins. But at high clock speeds the subsequent writes would overlap and cause the operation to fail. The status polls are done on the target for efficiency, since the half-pages are very small. Change-Id: Ia1e9b4a6a71930549b3d84a902744ce6e596301b Signed-off-by: Jimmy <nh...@gm...> Reviewed-on: https://review.openocd.org/c/openocd/+/5598 Tested-by: jenkins Reviewed-by: Jelle De Vleeschouwer Reviewed-by: Tomas Vanek <va...@fb...> Reviewed-by: Andrzej SierżÄga <as...@gm...> diff --git a/contrib/loaders/flash/stm32/stm32lx.S b/contrib/loaders/flash/stm32/stm32lx.S index bcae7a46c..7cfe48545 100644 --- a/contrib/loaders/flash/stm32/stm32lx.S +++ b/contrib/loaders/flash/stm32/stm32lx.S @@ -20,44 +20,61 @@ * but WITHOUT ANY WARRANTY; without even the implied warranty of * * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * * GNU General Public License for more details. * - * * - * You should have received a copy of the GNU General Public License * - * along with this program; if not, write to the * - * Free Software Foundation, Inc., * - * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. * ***************************************************************************/ - .text .syntax unified .cpu cortex-m0 .thumb /* +Parameters r0 - destination address r1 - source address - r2 - count + r2 - half pages + r3 - bytes per half page + r4 - flash base +Variables + r0 - destination write pointer + r1 - source read pointer + r2 - source limit address + r3 - bytes per half page + r4 - flash base + r5 - pages left in current half page + r6 - temporary r/w */ +/* offsets of registers from flash reg base */ +#define STM32_FLASH_SR_OFFSET 0x18 + .thumb_func .global _start _start: - // r2 = source + count * 4 - lsls r2, r2, #2 - adds r2, r1, r2 + // r2 = source + half pages * bytes per half page + muls r2, r2, r3 + add r2, r1, r2 // Go to compare - b test_done + b test_done +write_half_page: + // initialize pages left in current half page + mov r5, r3 write_word: // load word from address in r1 and increase r1 by 4 - ldmia r1!, {r3} + ldmia r1!, {r6} // store word to address in r0 and increase r0 by 4 - stmia r0!, {r3} + stmia r0!, {r6} + // check for end of half page + subs r5, r5, #4 + bne write_word +wait_busy: + // read status register into r6, loop while bottom bit is set + ldr r6, [r4, #STM32_FLASH_SR_OFFSET] + lsls r6, r6, #31 + bne wait_busy test_done: - // compare r1 and r2 + // compare r1 and r2, loop if not equal cmp r1, r2 - // loop if not equal - bne write_word + bne write_half_page // Set breakpoint to exit - bkpt #0x00 - + bkpt #0x00 diff --git a/contrib/loaders/flash/stm32/stm32lx.inc b/contrib/loaders/flash/stm32/stm32lx.inc index eaaf1848a..668de2778 100644 --- a/contrib/loaders/flash/stm32/stm32lx.inc +++ b/contrib/loaders/flash/stm32/stm32lx.inc @@ -1,2 +1,3 @@ /* Autogenerated with ../../../../src/helper/bin2char.sh */ -0x92,0x00,0x8a,0x18,0x01,0xe0,0x08,0xc9,0x08,0xc0,0x91,0x42,0xfb,0xd1,0x00,0xbe, +0x5a,0x43,0x0a,0x44,0x07,0xe0,0x1d,0x46,0x40,0xc9,0x40,0xc0,0x04,0x3d,0xfb,0xd1, +0xa6,0x69,0xf6,0x07,0xfc,0xd1,0x91,0x42,0xf5,0xd1,0x00,0xbe, diff --git a/src/flash/nor/stm32lx.c b/src/flash/nor/stm32lx.c index 488dc978a..122119606 100644 --- a/src/flash/nor/stm32lx.c +++ b/src/flash/nor/stm32lx.c @@ -425,12 +425,12 @@ static int stm32lx_write_half_pages(struct flash_bank *bank, const uint8_t *buff struct stm32lx_flash_bank *stm32lx_info = bank->driver_priv; uint32_t hp_nb = stm32lx_info->part_info.page_size / 2; - uint32_t buffer_size = 16384; + uint32_t buffer_size = (16384 / hp_nb) * hp_nb; /* must be multiple of hp_nb */ struct working_area *write_algorithm; struct working_area *source; uint32_t address = bank->base + offset; - struct reg_param reg_params[3]; + struct reg_param reg_params[5]; struct armv7m_algorithm armv7m_info; int retval = ERROR_OK; @@ -440,6 +440,10 @@ static int stm32lx_write_half_pages(struct flash_bank *bank, const uint8_t *buff }; /* Make sure we're performing a half-page aligned write. */ + if (offset % hp_nb) { + LOG_ERROR("The offset must be %" PRIu32 "B-aligned but it is %" PRIi32 "B)", hp_nb, offset); + return ERROR_FAIL; + } if (count % hp_nb) { LOG_ERROR("The byte count must be %" PRIu32 "B-aligned but count is %" PRIu32 "B)", hp_nb, count); return ERROR_FAIL; @@ -476,6 +480,9 @@ static int stm32lx_write_half_pages(struct flash_bank *bank, const uint8_t *buff LOG_WARNING("no large enough working area available, can't do block memory writes"); return ERROR_TARGET_RESOURCE_NOT_AVAILABLE; + } else { + /* Make sure we're still asking for an integral number of half-pages */ + buffer_size -= buffer_size % hp_nb; } } @@ -484,6 +491,8 @@ static int stm32lx_write_half_pages(struct flash_bank *bank, const uint8_t *buff init_reg_param(®_params[0], "r0", 32, PARAM_OUT); init_reg_param(®_params[1], "r1", 32, PARAM_OUT); init_reg_param(®_params[2], "r2", 32, PARAM_OUT); + init_reg_param(®_params[3], "r3", 32, PARAM_OUT); + init_reg_param(®_params[4], "r4", 32, PARAM_OUT); /* Enable half-page write */ retval = stm32lx_enable_write_half_page(bank); @@ -494,6 +503,8 @@ static int stm32lx_write_half_pages(struct flash_bank *bank, const uint8_t *buff destroy_reg_param(®_params[0]); destroy_reg_param(®_params[1]); destroy_reg_param(®_params[2]); + destroy_reg_param(®_params[3]); + destroy_reg_param(®_params[4]); return retval; } @@ -524,8 +535,12 @@ static int stm32lx_write_half_pages(struct flash_bank *bank, const uint8_t *buff buf_set_u32(reg_params[0].value, 0, 32, address); /* The source address of the copy (R1) */ buf_set_u32(reg_params[1].value, 0, 32, source->address); - /* The length of the copy (R2) */ - buf_set_u32(reg_params[2].value, 0, 32, this_count / 4); + /* The number of half pages to copy (R2) */ + buf_set_u32(reg_params[2].value, 0, 32, this_count / hp_nb); + /* The size in byes of a half page (R3) */ + buf_set_u32(reg_params[3].value, 0, 32, hp_nb); + /* The flash base address (R4) */ + buf_set_u32(reg_params[4].value, 0, 32, stm32lx_info->flash_base); /* 5: Execute the bunch of code */ retval = target_run_algorithm(target, 0, NULL, @@ -593,6 +608,8 @@ static int stm32lx_write_half_pages(struct flash_bank *bank, const uint8_t *buff destroy_reg_param(®_params[0]); destroy_reg_param(®_params[1]); destroy_reg_param(®_params[2]); + destroy_reg_param(®_params[3]); + destroy_reg_param(®_params[4]); return retval; } ----------------------------------------------------------------------- Summary of changes: contrib/loaders/flash/stm32/stm32lx.S | 53 ++++++++++++++++++++++----------- contrib/loaders/flash/stm32/stm32lx.inc | 3 +- src/flash/nor/stm32lx.c | 25 +++++++++++++--- 3 files changed, 58 insertions(+), 23 deletions(-) hooks/post-receive -- Main OpenOCD repository |
From: OpenOCD-Gerrit <ope...@us...> - 2021-10-25 16:13:55
|
This is an automated email from the git hooks/post-receive script. It was generated because a ref change was pushed to the repository containing the project "Main OpenOCD repository". The branch, master has been updated via 97db87c22eec204edfebd55973ee1211a1dba6d3 (commit) from bba2eecbc2b7d738e6f948b85ec420c084b28022 (commit) Those revisions listed above that are new to this repository have not appeared on any other notification email; so we list those revisions in full, below. - Log ----------------------------------------------------------------- commit 97db87c22eec204edfebd55973ee1211a1dba6d3 Author: Antonio Borneo <bor...@gm...> Date: Thu Oct 7 12:04:46 2021 +0200 jtag/core: remove unused variable Commit e3f3f60a02ab ("adapter speed: require init script setting and centralize activation from drivers to core.c") has already dropped the only use of variable 'jtag_speed'. Remove the variable. Change-Id: Iff096df0022982cf90795aa62d6b3406203f7b14 Signed-off-by: Antonio Borneo <bor...@gm...> Reviewed-on: https://review.openocd.org/c/openocd/+/6638 Tested-by: jenkins Reviewed-by: Tomas Vanek <va...@fb...> diff --git a/src/jtag/core.c b/src/jtag/core.c index 51875a00a..2de5fda47 100644 --- a/src/jtag/core.c +++ b/src/jtag/core.c @@ -128,7 +128,6 @@ static int speed_khz; /* speed to fallback to when RCLK is requested but not supported */ static int rclk_fallback_speed_khz; static enum {CLOCK_MODE_UNSELECTED, CLOCK_MODE_KHZ, CLOCK_MODE_RCLK} clock_mode; -static int jtag_speed; /* FIXME: change name to this variable, it is not anymore JTAG only */ static struct adapter_driver *jtag; @@ -1804,7 +1803,6 @@ static int jtag_rclk_to_speed(unsigned fallback_speed_khz, int *speed) static int jtag_set_speed(int speed) { - jtag_speed = speed; /* this command can be called during CONFIG, * in which case jtag isn't initialized */ return jtag ? jtag->speed(speed) : ERROR_OK; ----------------------------------------------------------------------- Summary of changes: src/jtag/core.c | 2 -- 1 file changed, 2 deletions(-) hooks/post-receive -- Main OpenOCD repository |
From: OpenOCD-Gerrit <ope...@us...> - 2021-10-25 16:13:29
|
This is an automated email from the git hooks/post-receive script. It was generated because a ref change was pushed to the repository containing the project "Main OpenOCD repository". The branch, master has been updated via bba2eecbc2b7d738e6f948b85ec420c084b28022 (commit) via 69190094ad209b2d9091d7c2ca90ac7d49382d61 (commit) from 0fb131c23a1cba9ea128db9c72fcd6479e508513 (commit) Those revisions listed above that are new to this repository have not appeared on any other notification email; so we list those revisions in full, below. - Log ----------------------------------------------------------------- commit bba2eecbc2b7d738e6f948b85ec420c084b28022 Author: Antonio Borneo <bor...@gm...> Date: Fri Oct 8 18:15:12 2021 +0200 jtag/aice: remove unused exported struct aice_interface_param_s The struct aice_interface_param_s is declared but is never referenced. Drop it. Change-Id: I4e6493d4baf292bb55dbd40228d4fa7c9e2afab5 Signed-off-by: Antonio Borneo <bor...@gm...> Reviewed-on: https://review.openocd.org/c/openocd/+/6637 Tested-by: jenkins Reviewed-by: Tomas Vanek <va...@fb...> diff --git a/src/jtag/aice/aice_interface.h b/src/jtag/aice/aice_interface.h index 220b0b04d..3bddfa342 100644 --- a/src/jtag/aice/aice_interface.h +++ b/src/jtag/aice/aice_interface.h @@ -19,17 +19,6 @@ #ifndef OPENOCD_JTAG_AICE_AICE_INTERFACE_H #define OPENOCD_JTAG_AICE_AICE_INTERFACE_H -struct aice_interface_param_s { - /** */ - const char *device_desc; - /** */ - const char *serial; - /** */ - uint16_t vid; - /** */ - uint16_t pid; -}; - int aice_init_targets(void); int aice_scan_jtag_chain(void); commit 69190094ad209b2d9091d7c2ca90ac7d49382d61 Author: Antonio Borneo <bor...@gm...> Date: Mon Sep 16 10:50:04 2019 +0200 hla: improve readability of struct hl_interface_s initialization The initialization is barely readable, while actually only few fields are set with value nor zero nor NULL. Rewrite the initialization using C99 struct designations. Change-Id: I4d288e6536ebe7110a184db6540223fc67361ec3 Signed-off-by: Antonio Borneo <bor...@gm...> Reviewed-on: https://review.openocd.org/c/openocd/+/6636 Tested-by: jenkins Reviewed-by: Tomas Vanek <va...@fb...> diff --git a/src/jtag/hla/hla_interface.c b/src/jtag/hla/hla_interface.c index b16a930a9..fc362c040 100644 --- a/src/jtag/hla/hla_interface.c +++ b/src/jtag/hla/hla_interface.c @@ -35,7 +35,21 @@ #include <target/target.h> -static struct hl_interface_s hl_if = { {0, 0, { 0 }, { 0 }, HL_TRANSPORT_UNKNOWN, false, -1, false, 7184}, 0, 0 }; +static struct hl_interface_s hl_if = { + .param = { + .device_desc = NULL, + .serial = NULL, + .vid = { 0 }, + .pid = { 0 }, + .transport = HL_TRANSPORT_UNKNOWN, + .connect_under_reset = false, + .initial_interface_speed = -1, + .use_stlink_tcp = false, + .stlink_tcp_port = 7184, + }, + .layout = NULL, + .handle = NULL, +}; int hl_interface_open(enum hl_transports tr) { ----------------------------------------------------------------------- Summary of changes: src/jtag/aice/aice_interface.h | 11 ----------- src/jtag/hla/hla_interface.c | 16 +++++++++++++++- 2 files changed, 15 insertions(+), 12 deletions(-) hooks/post-receive -- Main OpenOCD repository |
From: OpenOCD-Gerrit <ope...@us...> - 2021-10-25 16:13:05
|
This is an automated email from the git hooks/post-receive script. It was generated because a ref change was pushed to the repository containing the project "Main OpenOCD repository". The branch, master has been updated via 0fb131c23a1cba9ea128db9c72fcd6479e508513 (commit) via 37bce983956cf34f725b096a33a1a6c16ac58d71 (commit) from 615709d14049027e6172fbb7f6cf6c898eefaea9 (commit) Those revisions listed above that are new to this repository have not appeared on any other notification email; so we list those revisions in full, below. - Log ----------------------------------------------------------------- commit 0fb131c23a1cba9ea128db9c72fcd6479e508513 Author: Antonio Borneo <bor...@gm...> Date: Fri Oct 8 18:43:06 2021 +0200 riscv: use relative path to include contrib's data Doxygen cannot resolve the path of the files in folder contrib. Use a path relative to current folder, as done in other files. Change-Id: If39b416ed422b4854dd108777fa32dd4c809450a Signed-off-by: Antonio Borneo <bor...@gm...> Reviewed-on: https://review.openocd.org/c/openocd/+/6635 Tested-by: jenkins Reviewed-by: Tim Newsome <ti...@si...> diff --git a/src/target/riscv/riscv.c b/src/target/riscv/riscv.c index 7579e0f0c..084939e11 100644 --- a/src/target/riscv/riscv.c +++ b/src/target/riscv/riscv.c @@ -1987,10 +1987,10 @@ static int riscv_checksum_memory(struct target *target, LOG_DEBUG("address=0x%" TARGET_PRIxADDR "; count=0x%" PRIx32, address, count); static const uint8_t riscv32_crc_code[] = { -#include "contrib/loaders/checksum/riscv32_crc.inc" +#include "../../../contrib/loaders/checksum/riscv32_crc.inc" }; static const uint8_t riscv64_crc_code[] = { -#include "contrib/loaders/checksum/riscv64_crc.inc" +#include "../../../contrib/loaders/checksum/riscv64_crc.inc" }; static const uint8_t *crc_code; commit 37bce983956cf34f725b096a33a1a6c16ac58d71 Author: Antonio Borneo <bor...@gm...> Date: Wed Oct 6 23:27:16 2021 +0200 openocd: remove 'src' prefix from #include path There is no reason to add the 'src' prefix. Remove it. Change-Id: Id7d7ee8b3807fb90381cc1d6d545321020bc06c1 Signed-off-by: Antonio Borneo <bor...@gm...> Reviewed-on: https://review.openocd.org/c/openocd/+/6634 Tested-by: jenkins Reviewed-by: Tomas Vanek <va...@fb...> diff --git a/src/jtag/drivers/jlink.c b/src/jtag/drivers/jlink.c index 319ca380a..53ae1dfae 100644 --- a/src/jtag/drivers/jlink.c +++ b/src/jtag/drivers/jlink.c @@ -39,7 +39,7 @@ #include <jtag/swd.h> #include <jtag/commands.h> #include <jtag/drivers/jtag_usb_common.h> -#include <src/helper/replacements.h> +#include <helper/replacements.h> #include <target/cortex_m.h> #include <libjaylink/libjaylink.h> diff --git a/src/target/arm_coresight.h b/src/target/arm_coresight.h index 42e6c5eb6..a08f4fb53 100644 --- a/src/target/arm_coresight.h +++ b/src/target/arm_coresight.h @@ -11,7 +11,7 @@ #include <stdbool.h> #include <stdint.h> -#include <src/helper/bits.h> +#include <helper/bits.h> #define ARM_CS_ALIGN (0x1000) ----------------------------------------------------------------------- Summary of changes: src/jtag/drivers/jlink.c | 2 +- src/target/arm_coresight.h | 2 +- src/target/riscv/riscv.c | 4 ++-- 3 files changed, 4 insertions(+), 4 deletions(-) hooks/post-receive -- Main OpenOCD repository |
From: OpenOCD-Gerrit <ope...@us...> - 2021-10-25 16:12:48
|
This is an automated email from the git hooks/post-receive script. It was generated because a ref change was pushed to the repository containing the project "Main OpenOCD repository". The branch, master has been updated via 615709d14049027e6172fbb7f6cf6c898eefaea9 (commit) from f4612e06c61f6c46cff936d2c6b48d6f2627ff61 (commit) Those revisions listed above that are new to this repository have not appeared on any other notification email; so we list those revisions in full, below. - Log ----------------------------------------------------------------- commit 615709d14049027e6172fbb7f6cf6c898eefaea9 Author: Tim Newsome <ti...@si...> Date: Wed Sep 1 15:00:46 2021 -0700 Upstream a whole host of RISC-V changes. Made no attempt to separate this out into reviewable chunks, since this is all RISC-V-specific code developed at https://github.com/riscv/riscv-openocd Memory sample and repeat read functionality was left out of this change since it requires some target-independent changes that I'll upstream some other time. Change-Id: I92917c86d549c232cbf36ffbfefc93331c05accd Signed-off-by: Tim Newsome <ti...@si...> Reviewed-on: https://review.openocd.org/c/openocd/+/6529 Tested-by: jenkins Reviewed-by: Antonio Borneo <bor...@gm...> diff --git a/src/target/riscv/batch.c b/src/target/riscv/batch.c index 3c062e150..a3d68a91f 100644 --- a/src/target/riscv/batch.c +++ b/src/target/riscv/batch.c @@ -27,23 +27,33 @@ struct riscv_batch *riscv_batch_alloc(struct target *target, size_t scans, size_ out->allocated_scans = scans; out->idle_count = idle; out->data_out = malloc(sizeof(*out->data_out) * (scans) * DMI_SCAN_BUF_SIZE); - if (!out->data_out) + if (!out->data_out) { + LOG_ERROR("Failed to allocate data_out in RISC-V batch."); goto error1; + }; out->data_in = malloc(sizeof(*out->data_in) * (scans) * DMI_SCAN_BUF_SIZE); - if (!out->data_in) + if (!out->data_in) { + LOG_ERROR("Failed to allocate data_in in RISC-V batch."); goto error2; + } out->fields = malloc(sizeof(*out->fields) * (scans)); - if (!out->fields) + if (!out->fields) { + LOG_ERROR("Failed to allocate fields in RISC-V batch."); goto error3; + } if (bscan_tunnel_ir_width != 0) { out->bscan_ctxt = malloc(sizeof(*out->bscan_ctxt) * (scans)); - if (!out->bscan_ctxt) + if (!out->bscan_ctxt) { + LOG_ERROR("Failed to allocate bscan_ctxt in RISC-V batch."); goto error4; + } } out->last_scan = RISCV_SCAN_TYPE_INVALID; out->read_keys = malloc(sizeof(*out->read_keys) * (scans)); - if (!out->read_keys) + if (!out->read_keys) { + LOG_ERROR("Failed to allocate read_keys in RISC-V batch."); goto error5; + } return out; error5: @@ -82,8 +92,6 @@ int riscv_batch_run(struct riscv_batch *batch) return ERROR_OK; } - keep_alive(); - riscv_batch_add_nop(batch); for (size_t i = 0; i < batch->used_scans; ++i) { @@ -96,11 +104,15 @@ int riscv_batch_run(struct riscv_batch *batch) jtag_add_runtest(batch->idle_count, TAP_IDLE); } + keep_alive(); + if (jtag_execute_queue() != ERROR_OK) { LOG_ERROR("Unable to execute JTAG queue"); return ERROR_FAIL; } + keep_alive(); + if (bscan_tunnel_ir_width != 0) { /* need to right-shift "in" by one bit, because of clock skew between BSCAN TAP and DM TAP */ for (size_t i = 0; i < batch->used_scans; ++i) diff --git a/src/target/riscv/debug_defines.h b/src/target/riscv/debug_defines.h index cb518a891..b5104d530 100644 --- a/src/target/riscv/debug_defines.h +++ b/src/target/riscv/debug_defines.h @@ -1,6 +1,7 @@ /* * This file is auto-generated by running 'make debug_defines.h' in - * https://github.com/riscv/riscv-debug-spec/ (30b1a97) + * https://github.com/riscv/riscv-debug-spec/ (63c985f) + * License: Creative Commons Attribution 4.0 International Public License (CC BY 4.0) */ #define DTM_IDCODE 0x01 @@ -89,7 +90,7 @@ /* * 0: Version described in spec version 0.11. * - * 1: Version described in spec version 0.13. + * 1: Version described in spec versions 0.13 and 1.0. * * 15: Version not described in any available version of this spec. */ @@ -155,16 +156,38 @@ #define DTM_DMI_OP (0x3ULL << DTM_DMI_OP_OFFSET) #define CSR_DCSR 0x7b0 /* - * 0: There is no external debug support. + * 0: There is no debug support. * - * 4: External debug support exists as it is described in this document. + * 4: Debug support exists as it is described in this document. * - * 15: There is external debug support, but it does not conform to any + * 15: There is debug support, but it does not conform to any * available version of this spec. */ -#define CSR_DCSR_XDEBUGVER_OFFSET 28 -#define CSR_DCSR_XDEBUGVER_LENGTH 4 -#define CSR_DCSR_XDEBUGVER (0xfU << CSR_DCSR_XDEBUGVER_OFFSET) +#define CSR_DCSR_DEBUGVER_OFFSET 28 +#define CSR_DCSR_DEBUGVER_LENGTH 4 +#define CSR_DCSR_DEBUGVER (0xfU << CSR_DCSR_DEBUGVER_OFFSET) +/* + * 0: {\tt ebreak} instructions in VS-mode behave as described in the + * Privileged Spec. + * + * 1: {\tt ebreak} instructions in VS-mode enter Debug Mode. + * + * This bit is hardwired to 0 if the hart does not support virtualization mode. + */ +#define CSR_DCSR_EBREAKVS_OFFSET 17 +#define CSR_DCSR_EBREAKVS_LENGTH 1 +#define CSR_DCSR_EBREAKVS (0x1U << CSR_DCSR_EBREAKVS_OFFSET) +/* + * 0: {\tt ebreak} instructions in VU-mode behave as described in the + * Privileged Spec. + * + * 1: {\tt ebreak} instructions in VU-mode enter Debug Mode. + * + * This bit is hardwired to 0 if the hart does not support virtualization mode. + */ +#define CSR_DCSR_EBREAKVU_OFFSET 16 +#define CSR_DCSR_EBREAKVU_LENGTH 1 +#define CSR_DCSR_EBREAKVU (0x1U << CSR_DCSR_EBREAKVU_OFFSET) /* * 0: {\tt ebreak} instructions in M-mode behave as described in the * Privileged Spec. @@ -180,7 +203,7 @@ * * 1: {\tt ebreak} instructions in S-mode enter Debug Mode. * - * This bit is hardwired to 0 if the hart does not support S mode. + * This bit is hardwired to 0 if the hart does not support S-mode. */ #define CSR_DCSR_EBREAKS_OFFSET 13 #define CSR_DCSR_EBREAKS_LENGTH 1 @@ -191,7 +214,7 @@ * * 1: {\tt ebreak} instructions in U-mode enter Debug Mode. * - * This bit is hardwired to 0 if the hart does not support U mode. + * This bit is hardwired to 0 if the hart does not support U-mode. */ #define CSR_DCSR_EBREAKU_OFFSET 12 #define CSR_DCSR_EBREAKU_LENGTH 1 @@ -262,9 +285,20 @@ #define CSR_DCSR_CAUSE_LENGTH 3 #define CSR_DCSR_CAUSE (0x7U << CSR_DCSR_CAUSE_OFFSET) /* - * 0: \FcsrMcontrolMprv in \Rmstatus is ignored in Debug Mode. + * Extends the prv field with the virtualization mode the hart was operating + * in when Debug Mode was entered. The encoding is described in Table + * \ref{tab:privlevel}. + * A debugger can change this value to change the hart's virtualization mode + * when exiting Debug Mode. + * This bit is hardwired to 0 on harts that do not support virtualization mode. + */ +#define CSR_DCSR_V_OFFSET 5 +#define CSR_DCSR_V_LENGTH 1 +#define CSR_DCSR_V (0x1U << CSR_DCSR_V_OFFSET) +/* + * 0: \FcsrMstatusMprv in \Rmstatus is ignored in Debug Mode. * - * 1: \FcsrMcontrolMprv in \Rmstatus takes effect in Debug Mode. + * 1: \FcsrMstatusMprv in \Rmstatus takes effect in Debug Mode. * * Implementing this bit is optional. It may be tied to either 0 or 1. */ @@ -334,6 +368,14 @@ * 5: The trigger is an exception trigger. The remaining bits * in this register act as described in \RcsrEtrigger. * + * 6: The trigger is an address/data match trigger. The remaining bits + * in this register act as described in \RcsrMcontrolSix. This is similar + * to a type 2 trigger, but provides additional functionality and + * should be used instead of type 2 in newer implementations. + * + * 7: The trigger is a trigger source external to the TM. The + * remaining bits in this register act as described in \RcsrTmexttrigger. + * * 12--14: These trigger types are available for non-standard use. * * 15: This trigger exists (so enumeration shouldn't terminate), but @@ -354,7 +396,9 @@ * selected \RcsrTselect. Writes from other modes are ignored. * * This bit is only writable from Debug Mode. - * When clearing this bit, the debugger should also clear the action field + * In ordinary use, external debuggers will always set this bit when + * configuring a trigger. + * When clearing this bit, debuggers should also clear the action field * (whose location depends on \FcsrTdataOneType). */ #define CSR_TDATA1_DMODE_OFFSET (XLEN-5) @@ -389,9 +433,36 @@ #define CSR_TINFO_INFO_LENGTH 16 #define CSR_TINFO_INFO (0xffffULL << CSR_TINFO_INFO_OFFSET) #define CSR_TCONTROL 0x7a5 +/* + * \RcsrHcontext enable. + * + * 0: \RcsrHcontext is set to 0 and writes are ignored. + * + * 1: \RcsrHcontext may be written and read. + */ +#define CSR_TCONTROL_HCXE_OFFSET 9 +#define CSR_TCONTROL_HCXE_LENGTH 1 +#define CSR_TCONTROL_HCXE (0x1ULL << CSR_TCONTROL_HCXE_OFFSET) +/* + * \RcsrScontext enable. + * + * 0: \RcsrScontext is set to 0 and writes are ignored. + * + * 1: \RcsrScontext may be written and read. + * + * Enabling \RcsrScontext can be a security risk in a + * virtualized system with a hypervisor that does not swap \RcsrScontext. + */ +#define CSR_TCONTROL_SCXE_OFFSET 8 +#define CSR_TCONTROL_SCXE_LENGTH 1 +#define CSR_TCONTROL_SCXE (0x1ULL << CSR_TCONTROL_SCXE_OFFSET) /* * M-mode previous trigger enable field. * + * \FcsrTcontrolMpte and \FcsrTcontrolMte provide one solution to a problem + * regarding triggers with action=0 firing in M-mode trap handlers. See + * Section~\ref{sec:mmtrigger} for more details. + * * When a trap into M-mode is taken, \FcsrTcontrolMpte is set to the value of * \FcsrTcontrolMte. */ @@ -411,20 +482,23 @@ #define CSR_TCONTROL_MTE_OFFSET 3 #define CSR_TCONTROL_MTE_LENGTH 1 #define CSR_TCONTROL_MTE (0x1ULL << CSR_TCONTROL_MTE_OFFSET) -#define CSR_MCONTEXT 0x7a8 +#define CSR_HCONTEXT 0x6a8 /* - * Machine mode software can write a context number to this register, + * Hypervisor mode software can write a context number to this register, * which can be used to set triggers that only fire in that specific * context. * * An implementation may tie any number of upper bits in this field to - * 0. It's recommended to implement no more than 6 bits on RV32, and - * 13 on RV64. + * 0. If the H extension is not implemented, it's recommended to implement + * no more than 6 bits on RV32 and 13 on RV64 (as visible through the + * \RcsrMcontext register). If the H extension is implemented, + * it's recommended to implement no more than 7 bits on RV32 + * and 14 on RV64. */ -#define CSR_MCONTEXT_MCONTEXT_OFFSET 0 -#define CSR_MCONTEXT_MCONTEXT_LENGTH XLEN -#define CSR_MCONTEXT_MCONTEXT (((1L << XLEN) - 1) << CSR_MCONTEXT_MCONTEXT_OFFSET) -#define CSR_SCONTEXT 0x7aa +#define CSR_HCONTEXT_HCONTEXT_OFFSET 0 +#define CSR_HCONTEXT_HCONTEXT_LENGTH XLEN +#define CSR_HCONTEXT_HCONTEXT (((1L << XLEN) - 1) << CSR_HCONTEXT_HCONTEXT_OFFSET) +#define CSR_SCONTEXT 0x5a8 /* * Supervisor mode software can write a context number to this * register, which can be used to set triggers that only fire in that @@ -437,6 +511,8 @@ #define CSR_SCONTEXT_DATA_OFFSET 0 #define CSR_SCONTEXT_DATA_LENGTH XLEN #define CSR_SCONTEXT_DATA (((1L << XLEN) - 1) << CSR_SCONTEXT_DATA_OFFSET) +#define CSR_MCONTEXT 0x7a8 +#define CSR_MSCONTEXT 0x7aa #define CSR_MCONTROL 0x7a1 #define CSR_MCONTROL_TYPE_OFFSET (XLEN-4) #define CSR_MCONTROL_TYPE_LENGTH 4 @@ -447,11 +523,10 @@ /* * Specifies the largest naturally aligned powers-of-two (NAPOT) range * supported by the hardware when \FcsrMcontrolMatch is 1. The value is the - * logarithm base 2 of the - * number of bytes in that range. A value of 0 indicates that only - * exact value matches are supported (one byte range). A value of 63 - * corresponds to the maximum NAPOT range, which is $2^{63}$ bytes in - * size. + * logarithm base 2 of the number of bytes in that range. + * A value of 0 indicates \FcsrMcontrolMatch 1 is not supported. + * A value of 63 corresponds to the maximum NAPOT range, which is + * $2^{63}$ bytes in size. */ #define CSR_MCONTROL_MASKMAX_OFFSET (XLEN-11) #define CSR_MCONTROL_MASKMAX_LENGTH 6 @@ -466,8 +541,9 @@ #define CSR_MCONTROL_SIZEHI_LENGTH 2 #define CSR_MCONTROL_SIZEHI (0x3ULL << CSR_MCONTROL_SIZEHI_OFFSET) /* - * If this bit is implemented, the hardware sets it when this - * trigger matches. The trigger's user can set or clear it at any + * If this bit is implemented then it must become set when this + * trigger fires and may become set when this trigger matches. + * The trigger's user can set or clear it at any * time. It is used to determine which * trigger(s) matched. If the bit is not implemented, it is always 0 * and writing it has no effect. @@ -476,36 +552,41 @@ #define CSR_MCONTROL_HIT_LENGTH 1 #define CSR_MCONTROL_HIT (0x1ULL << CSR_MCONTROL_HIT_OFFSET) /* - * 0: Perform a match on the lowest virtual address of the access. In - * addition, it is recommended that the trigger also fires if any of - * the other accessed virtual addresses match. + * This bit determines the contents of the XLEN-bit compare values. + * + * 0: There is at least one compare value and it contains the lowest + * virtual address of the access. + * It is recommended that there are additional compare values for + * the other accessed virtual addresses. * (E.g. on a 32-bit read from 0x4000, the lowest address is 0x4000 * and the other addresses are 0x4001, 0x4002, and 0x4003.) * - * 1: Perform a match on the data value loaded or stored, or the - * instruction executed. + * 1: There is exactly one compare value and it contains the data + * value loaded or stored, or the instruction executed. + * Any bits beyond the size of the data access will contain 0. */ #define CSR_MCONTROL_SELECT_OFFSET 19 #define CSR_MCONTROL_SELECT_LENGTH 1 #define CSR_MCONTROL_SELECT (0x1ULL << CSR_MCONTROL_SELECT_OFFSET) /* * 0: The action for this trigger will be taken just before the - * instruction that triggered it is executed, but after all preceding - * instructions are committed. \Rmepc or \RcsrDpc (depending on - * \FcsrMcontrolAction) must be set to the virtual address of the + * instruction that triggered it is committed, but after all preceding + * instructions are committed. \Rxepc or \RcsrDpc (depending + * on \FcsrMcontrolAction) must be set to the virtual address of the * instruction that matched. * - * If this is combined with \FcsrMcontrolLoad then a memory access will be + * If this is combined with \FcsrMcontrolLoad and + * \FcsrMcontrolSelect=1 then a memory access will be * performed (including any side effects of performing such an access) even * though the load will not update its destination register. Debuggers * should consider this when setting such breakpoints on, for example, * memory-mapped I/O addresses. * * 1: The action for this trigger will be taken after the instruction - * that triggered it is executed. It should be taken before the next - * instruction is executed, but it is better to implement triggers imprecisely - * than to not implement them at all. - * \Rmepc or \RcsrDpc (depending on \FcsrMcontrolAction) must be set to + * that triggered it is committed. It should be taken before the next + * instruction is committed, but it is better to implement triggers imprecisely + * than to not implement them at all. \Rxepc or + * \RcsrDpc (depending on \FcsrMcontrolAction) must be set to * the virtual address of the next instruction that must be executed to * preserve the program flow. * @@ -559,9 +640,21 @@ * execution of 128-bit instructions. * * An implementation must support the value of 0, but all other values - * are optional. It is recommended to support triggers for every - * access size the hart supports, as well as for every instruction - * size the hart supports. + * are optional. When an implementation supports address triggers + * (\FcsrMcontrolSelect=0), it is recommended that those triggers + * support every access size that the hart supports, as well as for + * every instruction size that the hart supports. + * + * Implementations such as RV32D or RV64V are able to perform loads + * and stores that are wider than XLEN. Custom extensions may also + * support instructions that are wider than XLEN. Because + * \RcsrTdataTwo is of size XLEN, there is a known limitation that + * data value triggers (\FcsrMcontrolSelect=1) can only be supported + * for access sizes up to XLEN bits. When an implementation supports + * data value triggers (\FcsrMcontrolSelect=1), it is recommended + * that those triggers support every access size up to XLEN that the + * hart supports, as well as for every instruction length up to XLEN + * that the hart supports. */ #define CSR_MCONTROL_SIZELO_OFFSET 16 #define CSR_MCONTROL_SIZELO_LENGTH 2 @@ -587,6 +680,9 @@ * trigger will be taken if and only if all the triggers in the chain * match at the same time. * + * Debuggers should not terminate a chain with a trigger with a + * different type. It is undefined when exactly such a chain fires. + * * Because \FcsrMcontrolChain affects the next trigger, hardware must zero it in * writes to \RcsrMcontrol that set \FcsrTdataOneDmode to 0 if the next trigger has * \FcsrTdataOneDmode of 1. @@ -603,26 +699,31 @@ #define CSR_MCONTROL_CHAIN_LENGTH 1 #define CSR_MCONTROL_CHAIN (0x1ULL << CSR_MCONTROL_CHAIN_OFFSET) /* - * 0: Matches when the value equals \RcsrTdataTwo. + * 0: Matches when any compare value equals \RcsrTdataTwo. * - * 1: Matches when the top M bits of the value match the top M bits of - * \RcsrTdataTwo. M is XLEN-1 minus the index of the least-significant + * 1: Matches when the top $M$ bits of any compare value match the top + * $M$ bits of \RcsrTdataTwo. + * $M$ is $|XLEN|-1$ minus the index of the least-significant * bit containing 0 in \RcsrTdataTwo. Debuggers should only write values - * to \RcsrTdataTwo such that M + \FcsrMcontrolMaskmax $\geq$ XLEN, otherwise it's - * undefined on what conditions the trigger will fire. + * to \RcsrTdataTwo such that $M + $\FcsrMcontrolMaskmax$ \geq |XLEN|$ + * and $M\gt0$ , otherwise it's undefined on what conditions the + * trigger will match. * - * 2: Matches when the value is greater than (unsigned) or equal to - * \RcsrTdataTwo. + * 2: Matches when any compare value is greater than (unsigned) or + * equal to \RcsrTdataTwo. * - * 3: Matches when the value is less than (unsigned) \RcsrTdataTwo. + * 3: Matches when any compare value is less than (unsigned) + * \RcsrTdataTwo. * - * 4: Matches when the lower half of the value equals the lower half - * of \RcsrTdataTwo after the lower half of the value is ANDed with the - * upper half of \RcsrTdataTwo. + * 4: Matches when $\frac{|XLEN|}{2}-1$:$0$ of any compare value + * equals $\frac{|XLEN|}{2}-1$:$0$ of \RcsrTdataTwo after + * $\frac{|XLEN|}{2}-1$:$0$ of the compare value is ANDed with + * $|XLEN|-1$:$\frac{|XLEN|}{2}$ of \RcsrTdataTwo. * - * 5: Matches when the upper half of the value equals the lower half - * of \RcsrTdataTwo after the upper half of the value is ANDed with the - * upper half of \RcsrTdataTwo. + * 5: Matches when $|XLEN|-1$:$\frac{|XLEN|}{2}$ of any compare + * value equals $\frac{|XLEN|}{2}-1$:$0$ of \RcsrTdataTwo after + * $|XLEN|-1$:$\frac{|XLEN|}{2}$ of the compare value is ANDed with + * $|XLEN|-1$:$\frac{|XLEN|}{2}$ of \RcsrTdataTwo. * * 8: Matches when \FcsrMcontrolMatch$=0$ would not match. * @@ -633,6 +734,12 @@ * 13: Matches when \FcsrMcontrolMatch$=5$ would not match. * * Other values are reserved for future use. + * + * All comparisons only look at the lower XLEN (in the current mode) + * bits of the compare values and of \RcsrTdataTwo. + * When \FcsrMcontrolSelect=1 and access size is N, this is further + * reduced, and comparisons only look at the lower N bits of the + * compare values and of \RcsrTdataTwo. */ #define CSR_MCONTROL_MATCH_OFFSET 7 #define CSR_MCONTROL_MATCH_LENGTH 4 @@ -644,13 +751,17 @@ #define CSR_MCONTROL_M_LENGTH 1 #define CSR_MCONTROL_M (0x1ULL << CSR_MCONTROL_M_OFFSET) /* - * When set, enable this trigger in S-mode. + * When set, enable this trigger in S/HS-mode. + * This bit is hard-wired to 0 if the hart does not support + * S-mode. */ #define CSR_MCONTROL_S_OFFSET 4 #define CSR_MCONTROL_S_LENGTH 1 #define CSR_MCONTROL_S (0x1ULL << CSR_MCONTROL_S_OFFSET) /* * When set, enable this trigger in U-mode. + * This bit is hard-wired to 0 if the hart does not support + * U-mode. */ #define CSR_MCONTROL_U_OFFSET 3 #define CSR_MCONTROL_U_LENGTH 1 @@ -676,6 +787,273 @@ #define CSR_MCONTROL_LOAD_OFFSET 0 #define CSR_MCONTROL_LOAD_LENGTH 1 #define CSR_MCONTROL_LOAD (0x1ULL << CSR_MCONTROL_LOAD_OFFSET) +#define CSR_MCONTROL6 0x7a1 +#define CSR_MCONTROL6_TYPE_OFFSET (XLEN-4) +#define CSR_MCONTROL6_TYPE_LENGTH 4 +#define CSR_MCONTROL6_TYPE (0xfULL << CSR_MCONTROL6_TYPE_OFFSET) +#define CSR_MCONTROL6_DMODE_OFFSET (XLEN-5) +#define CSR_MCONTROL6_DMODE_LENGTH 1 +#define CSR_MCONTROL6_DMODE (0x1ULL << CSR_MCONTROL6_DMODE_OFFSET) +/* + * When set, enable this trigger in VS-mode. + * This bit is hard-wired to 0 if the hart does not support + * virtualization mode. + */ +#define CSR_MCONTROL6_VS_OFFSET 24 +#define CSR_MCONTROL6_VS_LENGTH 1 +#define CSR_MCONTROL6_VS (0x1ULL << CSR_MCONTROL6_VS_OFFSET) +/* + * When set, enable this trigger in VU-mode. + * This bit is hard-wired to 0 if the hart does not support + * virtualization mode. + */ +#define CSR_MCONTROL6_VU_OFFSET 23 +#define CSR_MCONTROL6_VU_LENGTH 1 +#define CSR_MCONTROL6_VU (0x1ULL << CSR_MCONTROL6_VU_OFFSET) +/* + * If this bit is implemented, the hardware sets it when this + * trigger matches. The trigger's user can set or clear it at any + * time. It is used to determine which + * trigger(s) matched. If the bit is not implemented, it is always 0 + * and writing it has no effect. + */ +#define CSR_MCONTROL6_HIT_OFFSET 22 +#define CSR_MCONTROL6_HIT_LENGTH 1 +#define CSR_MCONTROL6_HIT (0x1ULL << CSR_MCONTROL6_HIT_OFFSET) +/* + * This bit determines the contents of the XLEN-bit compare values. + * + * 0: There is at least one compare value and it contains the lowest + * virtual address of the access. + * In addition, it is recommended that there are additional compare + * values for the other accessed virtual addresses match. + * (E.g. on a 32-bit read from 0x4000, the lowest address is 0x4000 + * and the other addresses are 0x4001, 0x4002, and 0x4003.) + * + * 1: There is exactly one compare value and it contains the data + * value loaded or stored, or the instruction executed. + * Any bits beyond the size of the data access will contain 0. + */ +#define CSR_MCONTROL6_SELECT_OFFSET 21 +#define CSR_MCONTROL6_SELECT_LENGTH 1 +#define CSR_MCONTROL6_SELECT (0x1ULL << CSR_MCONTROL6_SELECT_OFFSET) +/* + * 0: The action for this trigger will be taken just before the + * instruction that triggered it is committed, but after all preceding + * instructions are committed. \Rxepc or \RcsrDpc (depending + * on \FcsrMcontrolSixAction) must be set to the virtual address of the + * instruction that matched. + * + * If this is combined with \FcsrMcontrolSixLoad and + * \FcsrMcontrolSixSelect=1 then a memory access will be + * performed (including any side effects of performing such an access) even + * though the load will not update its destination register. Debuggers + * should consider this when setting such breakpoints on, for example, + * memory-mapped I/O addresses. + * + * 1: The action for this trigger will be taken after the instruction + * that triggered it is committed. It should be taken before the next + * instruction is committed, but it is better to implement triggers imprecisely + * than to not implement them at all. \Rxepc or + * \RcsrDpc (depending on \FcsrMcontrolSixAction) must be set to + * the virtual address of the next instruction that must be executed to + * preserve the program flow. + * + * Most hardware will only implement one timing or the other, possibly + * dependent on \FcsrMcontrolSixSelect, \FcsrMcontrolSixExecute, + * \FcsrMcontrolSixLoad, and \FcsrMcontrolSixStore. This bit + * primarily exists for the hardware to communicate to the debugger + * what will happen. Hardware may implement the bit fully writable, in + * which case the debugger has a little more control. + * + * Data load triggers with \FcsrMcontrolSixTiming of 0 will result in the same load + * happening again when the debugger lets the hart run. For data load + * triggers, debuggers must first attempt to set the breakpoint with + * \FcsrMcontrolSixTiming of 1. + * + * If a trigger with \FcsrMcontrolSixTiming of 0 matches, it is + * implementation-dependent whether that prevents a trigger with + * \FcsrMcontrolSixTiming of 1 matching as well. + */ +#define CSR_MCONTROL6_TIMING_OFFSET 20 +#define CSR_MCONTROL6_TIMING_LENGTH 1 +#define CSR_MCONTROL6_TIMING (0x1ULL << CSR_MCONTROL6_TIMING_OFFSET) +/* + * 0: The trigger will attempt to match against an access of any size. + * The behavior is only well-defined if $|select|=0$, or if the access + * size is XLEN. + * + * 1: The trigger will only match against 8-bit memory accesses. + * + * 2: The trigger will only match against 16-bit memory accesses or + * execution of 16-bit instructions. + * + * 3: The trigger will only match against 32-bit memory accesses or + * execution of 32-bit instructions. + * + * 4: The trigger will only match against execution of 48-bit instructions. + * + * 5: The trigger will only match against 64-bit memory accesses or + * execution of 64-bit instructions. + * + * 6: The trigger will only match against execution of 80-bit instructions. + * + * 7: The trigger will only match against execution of 96-bit instructions. + * + * 8: The trigger will only match against execution of 112-bit instructions. + * + * 9: The trigger will only match against 128-bit memory accesses or + * execution of 128-bit instructions. + * + * An implementation must support the value of 0, but all other values + * are optional. When an implementation supports address triggers + * (\FcsrMcontrolSixSelect=0), it is recommended that those triggers + * support every access size that the hart supports, as well as for + * every instruction size that the hart supports. + * + * Implementations such as RV32D or RV64V are able to perform loads + * and stores that are wider than XLEN. Custom extensions may also + * support instructions that are wider than XLEN. Because + * \RcsrTdataTwo is of size XLEN, there is a known limitation that + * data value triggers (\FcsrMcontrolSixSelect=1) can only be supported + * for access sizes up to XLEN bits. When an implementation supports + * data value triggers (\FcsrMcontrolSixSelect=1), it is recommended + * that those triggers support every access size up to XLEN that the + * hart supports, as well as for every instruction length up to XLEN + * that the hart supports. + */ +#define CSR_MCONTROL6_SIZE_OFFSET 16 +#define CSR_MCONTROL6_SIZE_LENGTH 4 +#define CSR_MCONTROL6_SIZE (0xfULL << CSR_MCONTROL6_SIZE_OFFSET) +/* + * The action to take when the trigger fires. The values are explained + * in Table~\ref{tab:action}. + */ +#define CSR_MCONTROL6_ACTION_OFFSET 12 +#define CSR_MCONTROL6_ACTION_LENGTH 4 +#define CSR_MCONTROL6_ACTION (0xfULL << CSR_MCONTROL6_ACTION_OFFSET) +/* + * 0: When this trigger matches, the configured action is taken. + * + * 1: While this trigger does not match, it prevents the trigger with + * the next index from matching. + * + * A trigger chain starts on the first trigger with $|chain|=1$ after + * a trigger with $|chain|=0$, or simply on the first trigger if that + * has $|chain|=1$. It ends on the first trigger after that which has + * $|chain|=0$. This final trigger is part of the chain. The action + * on all but the final trigger is ignored. The action on that final + * trigger will be taken if and only if all the triggers in the chain + * match at the same time. + * + * Debuggers should not terminate a chain with a trigger with a + * different type. It is undefined when exactly such a chain fires. + * + * Because \FcsrMcontrolSixChain affects the next trigger, hardware must zero it in + * writes to \RcsrMcontrolSix that set \FcsrTdataOneDmode to 0 if the next trigger has + * \FcsrTdataOneDmode of 1. + * In addition hardware should ignore writes to \RcsrMcontrolSix that set + * \FcsrTdataOneDmode to 1 if the previous trigger has both \FcsrTdataOneDmode of 0 and + * \FcsrMcontrolSixChain of 1. Debuggers must avoid the latter case by checking + * \FcsrMcontrolSixChain on the previous trigger if they're writing \RcsrMcontrolSix. + * + * Implementations that wish to limit the maximum length of a trigger + * chain (eg. to meet timing requirements) may do so by zeroing + * \FcsrMcontrolSixChain in writes to \RcsrMcontrolSix that would make the chain too long. + */ +#define CSR_MCONTROL6_CHAIN_OFFSET 11 +#define CSR_MCONTROL6_CHAIN_LENGTH 1 +#define CSR_MCONTROL6_CHAIN (0x1ULL << CSR_MCONTROL6_CHAIN_OFFSET) +/* + * 0: Matches when any compare value equals \RcsrTdataTwo. + * + * 1: Matches when the top $M$ bits of any compare value match the top + * $M$ bits of \RcsrTdataTwo. + * $M$ is $|XLEN|-1$ minus the index of the least-significant bit + * containing 0 in \RcsrTdataTwo. + * \RcsrTdataTwo is WARL and bit $|maskmax6|-1$ will be set to 0 if no + * less significant bits are written with 0. + * Legal values for \RcsrTdataTwo require $M + |maskmax6| \geq |XLEN|$ and $M\gt0$. + * See above for how to determine maskmax6. + * + * 2: Matches when any compare value is greater than (unsigned) or + * equal to \RcsrTdataTwo. + * + * 3: Matches when any compare value is less than (unsigned) + * \RcsrTdataTwo. + * + * 4: Matches when $\frac{|XLEN|}{2}-1$:$0$ of any compare value + * equals $\frac{|XLEN|}{2}-1$:$0$ of \RcsrTdataTwo after + * $\frac{|XLEN|}{2}-1$:$0$ of the compare value is ANDed with + * $|XLEN|-1$:$\frac{|XLEN|}{2}$ of \RcsrTdataTwo. + * + * 5: Matches when $|XLEN|-1$:$\frac{|XLEN|}{2}$ of any compare + * value equals $\frac{|XLEN|}{2}-1$:$0$ of \RcsrTdataTwo after + * $|XLEN|-1$:$\frac{|XLEN|}{2}$ of the compare value is ANDed with + * $|XLEN|-1$:$\frac{|XLEN|}{2}$ of \RcsrTdataTwo. + * + * 8: Matches when \FcsrMcontrolSixMatch$=0$ would not match. + * + * 9: Matches when \FcsrMcontrolSixMatch$=1$ would not match. + * + * 12: Matches when \FcsrMcontrolSixMatch$=4$ would not match. + * + * 13: Matches when \FcsrMcontrolSixMatch$=5$ would not match. + * + * Other values are reserved for future use. + * + * All comparisons only look at the lower XLEN (in the current mode) + * bits of the compare values and of \RcsrTdataTwo. + * When \FcsrMcontrolSelect=1 and access size is N, this is further + * reduced, and comparisons only look at the lower N bits of the + * compare values and of \RcsrTdataTwo. + */ +#define CSR_MCONTROL6_MATCH_OFFSET 7 +#define CSR_MCONTROL6_MATCH_LENGTH 4 +#define CSR_MCONTROL6_MATCH (0xfULL << CSR_MCONTROL6_MATCH_OFFSET) +/* + * When set, enable this trigger in M-mode. + */ +#define CSR_MCONTROL6_M_OFFSET 6 +#define CSR_MCONTROL6_M_LENGTH 1 +#define CSR_MCONTROL6_M (0x1ULL << CSR_MCONTROL6_M_OFFSET) +/* + * When set, enable this trigger in S/HS-mode. + * This bit is hard-wired to 0 if the hart does not support + * S-mode. + */ +#define CSR_MCONTROL6_S_OFFSET 4 +#define CSR_MCONTROL6_S_LENGTH 1 +#define CSR_MCONTROL6_S (0x1ULL << CSR_MCONTROL6_S_OFFSET) +/* + * When set, enable this trigger in U-mode. + * This bit is hard-wired to 0 if the hart does not support + * U-mode. + */ +#define CSR_MCONTROL6_U_OFFSET 3 +#define CSR_MCONTROL6_U_LENGTH 1 +#define CSR_MCONTROL6_U (0x1ULL << CSR_MCONTROL6_U_OFFSET) +/* + * When set, the trigger fires on the virtual address or opcode of an + * instruction that is executed. + */ +#define CSR_MCONTROL6_EXECUTE_OFFSET 2 +#define CSR_MCONTROL6_EXECUTE_LENGTH 1 +#define CSR_MCONTROL6_EXECUTE (0x1ULL << CSR_MCONTROL6_EXECUTE_OFFSET) +/* + * When set, the trigger fires on the virtual address or data of any + * store. + */ +#define CSR_MCONTROL6_STORE_OFFSET 1 +#define CSR_MCONTROL6_STORE_LENGTH 1 +#define CSR_MCONTROL6_STORE (0x1ULL << CSR_MCONTROL6_STORE_OFFSET) +/* + * When set, the trigger fires on the virtual address or data of any + * load. + */ +#define CSR_MCONTROL6_LOAD_OFFSET 0 +#define CSR_MCONTROL6_LOAD_LENGTH 1 +#define CSR_MCONTROL6_LOAD (0x1ULL << CSR_MCONTROL6_LOAD_OFFSET) #define CSR_ICOUNT 0x7a1 #define CSR_ICOUNT_TYPE_OFFSET (XLEN-4) #define CSR_ICOUNT_TYPE_LENGTH 4 @@ -683,6 +1061,22 @@ #define CSR_ICOUNT_DMODE_OFFSET (XLEN-5) #define CSR_ICOUNT_DMODE_LENGTH 1 #define CSR_ICOUNT_DMODE (0x1ULL << CSR_ICOUNT_DMODE_OFFSET) +/* + * When set, enable this trigger in VS-mode. + * This bit is hard-wired to 0 if the hart does not support + * virtualization mode. + */ +#define CSR_ICOUNT_VS_OFFSET 26 +#define CSR_ICOUNT_VS_LENGTH 1 +#define CSR_ICOUNT_VS (0x1ULL << CSR_ICOUNT_VS_OFFSET) +/* + * When set, enable this trigger in VU-mode. + * This bit is hard-wired to 0 if the hart does not support + * virtualization mode. + */ +#define CSR_ICOUNT_VU_OFFSET 25 +#define CSR_ICOUNT_VU_LENGTH 1 +#define CSR_ICOUNT_VU (0x1ULL << CSR_ICOUNT_VU_OFFSET) /* * If this bit is implemented, the hardware sets it when this * trigger matches. The trigger's user can set or clear it at any @@ -696,29 +1090,38 @@ /* * When count is decremented to 0, the trigger fires. Instead of * changing \FcsrIcountCount from 1 to 0, it is also acceptable for hardware to - * clear \FcsrMcontrolM, \FcsrMcontrolS, and \FcsrMcontrolU. This allows \FcsrIcountCount to be hard-wired + * clear \FcsrIcountM, \FcsrIcountS, \FcsrIcountU, \FcsrIcountVs, and + * \FcsrIcountVu. This allows \FcsrIcountCount to be hard-wired * to 1 if this register just exists for single step. */ #define CSR_ICOUNT_COUNT_OFFSET 10 #define CSR_ICOUNT_COUNT_LENGTH 14 #define CSR_ICOUNT_COUNT (0x3fffULL << CSR_ICOUNT_COUNT_OFFSET) /* - * When set, every instruction completed in or trap taken from - * M-mode decrements \FcsrIcountCount by 1. + * When set, enable this trigger in M-mode. */ #define CSR_ICOUNT_M_OFFSET 9 #define CSR_ICOUNT_M_LENGTH 1 #define CSR_ICOUNT_M (0x1ULL << CSR_ICOUNT_M_OFFSET) /* - * When set, every instruction completed in or trap taken from - * S-mode decrements \FcsrIcountCount by 1. + * This bit becomes set when \FcsrIcountCount is decremented from 1 + * to 0. It is cleared when the trigger fires. + */ +#define CSR_ICOUNT_PENDING_OFFSET 8 +#define CSR_ICOUNT_PENDING_LENGTH 1 +#define CSR_ICOUNT_PENDING (0x1ULL << CSR_ICOUNT_PENDING_OFFSET) +/* + * When set, enable this trigger in S/HS-mode. + * This bit is hard-wired to 0 if the hart does not support + * S-mode. */ #define CSR_ICOUNT_S_OFFSET 7 #define CSR_ICOUNT_S_LENGTH 1 #define CSR_ICOUNT_S (0x1ULL << CSR_ICOUNT_S_OFFSET) /* - * When set, every instruction completed in or trap taken from - * U-mode decrements \FcsrIcountCount by 1. + * When set, enable this trigger in U-mode. + * This bit is hard-wired to 0 if the hart does not support + * U-mode. */ #define CSR_ICOUNT_U_OFFSET 6 #define CSR_ICOUNT_U_LENGTH 1 @@ -747,6 +1150,24 @@ #define CSR_ITRIGGER_HIT_OFFSET (XLEN-6) #define CSR_ITRIGGER_HIT_LENGTH 1 #define CSR_ITRIGGER_HIT (0x1ULL << CSR_ITRIGGER_HIT_OFFSET) +/* + * When set, enable this trigger for interrupts that are taken from VS + * mode. + * This bit is hard-wired to 0 if the hart does not support + * virtualization mode. + */ +#define CSR_ITRIGGER_VS_OFFSET 12 +#define CSR_ITRIGGER_VS_LENGTH 1 +#define CSR_ITRIGGER_VS (0x1ULL << CSR_ITRIGGER_VS_OFFSET) +/* + * When set, enable this trigger for interrupts that are taken from VU + * mode. + * This bit is hard-wired to 0 if the hart does not support + * virtualization mode. + */ +#define CSR_ITRIGGER_VU_OFFSET 11 +#define CSR_ITRIGGER_VU_LENGTH 1 +#define CSR_ITRIGGER_VU (0x1ULL << CSR_ITRIGGER_VU_OFFSET) /* * When set, enable this trigger for interrupts that are taken from M * mode. @@ -755,8 +1176,10 @@ #define CSR_ITRIGGER_M_LENGTH 1 #define CSR_ITRIGGER_M (0x1ULL << CSR_ITRIGGER_M_OFFSET) /* - * When set, enable this trigger for interrupts that are taken from S + * When set, enable this trigger for interrupts that are taken from S/HS * mode. + * This bit is hard-wired to 0 if the hart does not support + * S-mode. */ #define CSR_ITRIGGER_S_OFFSET 7 #define CSR_ITRIGGER_S_LENGTH 1 @@ -764,6 +1187,8 @@ /* * When set, enable this trigger for interrupts that are taken from U * mode. + * This bit is hard-wired to 0 if the hart does not support + * U-mode. */ #define CSR_ITRIGGER_U_OFFSET 6 #define CSR_ITRIGGER_U_LENGTH 1 @@ -792,9 +1217,27 @@ #define CSR_ETRIGGER_HIT_OFFSET (XLEN-6) #define CSR_ETRIGGER_HIT_LENGTH 1 #define CSR_ETRIGGER_HIT (0x1ULL << CSR_ETRIGGER_HIT_OFFSET) +/* + * When set, enable this trigger for exceptions that are taken from VS + * mode. + * This bit is hard-wired to 0 if the hart does not support + * virtualization mode. + */ +#define CSR_ETRIGGER_VS_OFFSET 12 +#define CSR_ETRIGGER_VS_LENGTH 1 +#define CSR_ETRIGGER_VS (0x1ULL << CSR_ETRIGGER_VS_OFFSET) +/* + * When set, enable this trigger for exceptions that are taken from VU + * mode. + * This bit is hard-wired to 0 if the hart does not support + * virtualization mode. + */ +#define CSR_ETRIGGER_VU_OFFSET 11 +#define CSR_ETRIGGER_VU_LENGTH 1 +#define CSR_ETRIGGER_VU (0x1ULL << CSR_ETRIGGER_VU_OFFSET) /* * When set, non-maskable interrupts cause this - * trigger to fire, regardless of the values of \FcsrMcontrolM, \FcsrMcontrolS, and \FcsrMcontrolU. + * trigger to fire, regardless of the values of \FcsrEtriggerM, \FcsrEtriggerS, and \FcsrEtriggerU. */ #define CSR_ETRIGGER_NMI_OFFSET 10 #define CSR_ETRIGGER_NMI_LENGTH 1 @@ -807,8 +1250,10 @@ #define CSR_ETRIGGER_M_LENGTH 1 #define CSR_ETRIGGER_M (0x1ULL << CSR_ETRIGGER_M_OFFSET) /* - * When set, enable this trigger for exceptions that are taken from S + * When set, enable this trigger for exceptions that are taken from S/HS * mode. + * This bit is hard-wired to 0 if the hart does not support + * S-mode. */ #define CSR_ETRIGGER_S_OFFSET 7 #define CSR_ETRIGGER_S_LENGTH 1 @@ -816,6 +1261,8 @@ /* * When set, enable this trigger for exceptions that are taken from U * mode. + * This bit is hard-wired to 0 if the hart does not support + * U-mode. */ #define CSR_ETRIGGER_U_OFFSET 6 #define CSR_ETRIGGER_U_LENGTH 1 @@ -827,22 +1274,79 @@ #define CSR_ETRIGGER_ACTION_OFFSET 0 #define CSR_ETRIGGER_ACTION_LENGTH 6 #define CSR_ETRIGGER_ACTION (0x3fULL << CSR_ETRIGGER_ACTION_OFFSET) +#define CSR_TMEXTTRIGGER 0x7a1 +#define CSR_TMEXTTRIGGER_TYPE_OFFSET (XLEN-4) +#define CSR_TMEXTTRIGGER_TYPE_LENGTH 4 +#define CSR_TMEXTTRIGGER_TYPE (0xfULL << CSR_TMEXTTRIGGER_TYPE_OFFSET) +#define CSR_TMEXTTRIGGER_DMODE_OFFSET (XLEN-5) +#define CSR_TMEXTTRIGGER_DMODE_LENGTH 1 +#define CSR_TMEXTTRIGGER_DMODE (0x1ULL << CSR_TMEXTTRIGGER_DMODE_OFFSET) +/* + * If this bit is implemented, the hardware sets it when this + * trigger matches. The trigger's user can set or clear it at any + * time. It is used to determine which + * trigger(s) matched. If the bit is not implemented, it is always 0 + * and writing it has no effect. + */ +#define CSR_TMEXTTRIGGER_HIT_OFFSET (XLEN-6) +#define CSR_TMEXTTRIGGER_HIT_LENGTH 1 +#define CSR_TMEXTTRIGGER_HIT (0x1ULL << CSR_TMEXTTRIGGER_HIT_OFFSET) +/* + * This optional bit, when set, causes this trigger to fire whenever an attached + * interrupt controller signals a trigger. + */ +#define CSR_TMEXTTRIGGER_INTCTL_OFFSET 22 +#define CSR_TMEXTTRIGGER_INTCTL_LENGTH 1 +#define CSR_TMEXTTRIGGER_INTCTL (0x1ULL << CSR_TMEXTTRIGGER_INTCTL_OFFSET) +/* + * Selects any combination of up to 16 external debug trigger inputs + * that cause this trigger to fire. + */ +#define CSR_TMEXTTRIGGER_SELECT_OFFSET 6 +#define CSR_TMEXTTRIGGER_SELECT_LENGTH 16 +#define CSR_TMEXTTRIGGER_SELECT (0xffffULL << CSR_TMEXTTRIGGER_SELECT_OFFSET) +/* + * The action to take when the trigger fires. The values are explained + * in Table~\ref{tab:action}. + */ +#define CSR_TMEXTTRIGGER_ACTION_OFFSET 0 +#define CSR_TMEXTTRIGGER_ACTION_LENGTH 6 +#define CSR_TMEXTTRIGGER_ACTION (0x3fULL << CSR_TMEXTTRIGGER_ACTION_OFFSET) #define CSR_TEXTRA32 0x7a3 /* - * Data used together with \FcsrTextraThirtytwoMselect. + * Data used together with \FcsrTextraThirtytwoMhselect. */ -#define CSR_TEXTRA32_MVALUE_OFFSET 26 -#define CSR_TEXTRA32_MVALUE_LENGTH 6 -#define CSR_TEXTRA32_MVALUE (0x3fU << CSR_TEXTRA32_MVALUE_OFFSET) +#define CSR_TEXTRA32_MHVALUE_OFFSET 26 +#define CSR_TEXTRA32_MHVALUE_LENGTH 6 +#define CSR_TEXTRA32_MHVALUE (0x3fU << CSR_TEXTRA32_MHVALUE_OFFSET) /* - * 0: Ignore \FcsrTextraThirtytwoMvalue. + * 0: Ignore \FcsrTextraThirtytwoMhvalue. * - * 1: This trigger will only match if the low bits of - * \RcsrMcontext equal \FcsrTextraThirtytwoMvalue. + * 4: This trigger will only match if the low bits of + * \RcsrMcontext/\RcsrHcontext equal \FcsrTextraThirtytwoMhvalue. + * + * 1, 5: This trigger will only match if the low bits of + * \RcsrMcontext/\RcsrHcontext equal \{\FcsrTextraThirtytwoMhvalue, mhselect[2]\}. + * + * 2, 6: This trigger will only match if VMID in hgatp equals the lower VMIDMAX + * (defined in the Privileged Spec) bits of \{\FcsrTextraThirtytwoMhvalue, mhselect[2]\}. + * + * 3, 7: Reserved. + * + * If the H extension is not supported, the only legal values are 0 and 4. + */ +#define CSR_TEXTRA32_MHSELECT_OFFSET 23 +#define CSR_TEXTRA32_MHSELECT_LENGTH 3 +#define CSR_TEXTRA32_MHSELECT (0x7U << CSR_TEXTRA32_MHSELECT_OFFSET) +/* + * When the least significant bit of this field is 1, it causes bits 7:0 + * in the comparison to be ignored, when \FcsrTextraThirtytwoSselect=1. + * When the next most significant bit of this field is 1, it causes bits 15:8 + * to be ignored in the comparison, when \FcsrTextraThirtytwoSselect=1. */ -#define CSR_TEXTRA32_MSELECT_OFFSET 25 -#define CSR_TEXTRA32_MSELECT_LENGTH 1 -#define CSR_TEXTRA32_MSELECT (0x1U << CSR_TEXTRA32_MSELECT_OFFSET) +#define CSR_TEXTRA32_SBYTEMASK_OFFSET 18 +#define CSR_TEXTRA32_SBYTEMASK_LENGTH 2 +#define CSR_TEXTRA32_SBYTEMASK (0x3U << CSR_TEXTRA32_SBYTEMASK_OFFSET) /* * Data used together with \FcsrTextraThirtytwoSselect. * @@ -857,7 +1361,8 @@ * 1: This trigger will only match if the low bits of * \RcsrScontext equal \FcsrTextraThirtytwoSvalue. * - * 2: This trigger will only match if \Fasid in \Rsatp + * 2: This trigger will only match if the currently active ASID + * value, from either \Rsatp or \Rvsatp, * equals the lower ASIDMAX (defined in the Privileged Spec) bits of * \FcsrTextraThirtytwoSvalue. * @@ -867,12 +1372,23 @@ #define CSR_TEXTRA32_SSELECT_LENGTH 2 #define CSR_TEXTRA32_SSELECT (0x3U << CSR_TEXTRA32_SSELECT_OFFSET) #define CSR_TEXTRA64 0x7a3 -#define CSR_TEXTRA64_MVALUE_OFFSET 51 -#define CSR_TEXTRA64_MVALUE_LENGTH 13 -#define CSR_TEXTRA64_MVALUE (0x1fffULL << CSR_TEXTRA64_MVALUE_OFFSET) -#define CSR_TEXTRA64_MSELECT_OFFSET 50 -#define CSR_TEXTRA64_MSELECT_LENGTH 1 -#define CSR_TEXTRA64_MSELECT (0x1ULL << CSR_TEXTRA64_MSELECT_OFFSET) +#define CSR_TEXTRA64_MHVALUE_OFFSET 51 +#define CSR_TEXTRA64_MHVALUE_LENGTH 13 +#define CSR_TEXTRA64_MHVALUE (0x1fffULL << CSR_TEXTRA64_MHVALUE_OFFSET) +#define CSR_TEXTRA64_MHSELECT_OFFSET 48 +#define CSR_TEXTRA64_MHSELECT_LENGTH 3 +#define CSR_TEXTRA64_MHSELECT (0x7ULL << CSR_TEXTRA64_MHSELECT_OFFSET) +/* + * When the least significant bit of this field is 1, it causes bits 7:0 + * in the comparison to be ignored, when \FcsrTextraSixtyfourSselect=1. + * Likewise, the second bit controls the comparison of bits 15:8, + * third bit controls the comparison of bits 23:16, + * fourth bit controls the comparison of bits 31:24, and + * fifth bit controls the comparison of bits 33:32. + */ +#define CSR_TEXTRA64_SBYTEMASK_OFFSET 36 +#define CSR_TEXTRA64_SBYTEMASK_LENGTH 5 +#define CSR_TEXTRA64_SBYTEMASK (0x1fULL << CSR_TEXTRA64_SBYTEMASK_OFFSET) #define CSR_TEXTRA64_SVALUE_OFFSET 2 #define CSR_TEXTRA64_SVALUE_LENGTH 34 #define CSR_TEXTRA64_SVALUE (0x3ffffffffULL << CSR_TEXTRA64_SVALUE_OFFSET) @@ -880,6 +1396,24 @@ #define CSR_TEXTRA64_SSELECT_LENGTH 2 #define CSR_TEXTRA64_SSELECT (0x3ULL << CSR_TEXTRA64_SSELECT_OFFSET) #define DM_DMSTATUS 0x11 +/* + * 0: Unimplemented, or \FdmDmcontrolNdmreset is zero and no ndmreset is currently + * in progress. + * + * 1: \FdmDmcontrolNdmreset is currently nonzero, or there is an ndmreset in progress. + */ +#define DM_DMSTATUS_NDMRESETPENDING_OFFSET 24 +#define DM_DMSTATUS_NDMRESETPENDING_LENGTH 1 +#define DM_DMSTATUS_NDMRESETPENDING (0x1U << DM_DMSTATUS_NDMRESETPENDING_OFFSET) +/* + * 0: The per-hart {\tt unavail} bits reflect the current state of the hart. + * + * 1: The per-hart {\tt unavail} bits are sticky. Once they are set, they will + * not clear until the debugger acknowledges them using \FdmDmcontrolAckunavail. + */ +#define DM_DMSTATUS_STICKYUNAVAIL_OFFSET 23 +#define DM_DMSTATUS_STICKYUNAVAIL_LENGTH 1 +#define DM_DMSTATUS_STICKYUNAVAIL (0x1U << DM_DMSTATUS_STICKYUNAVAIL_OFFSET) /* * If 1, then there is an implicit {\tt ebreak} instruction at the * non-existent word immediately after the Program Buffer. This saves @@ -921,26 +1455,30 @@ #define DM_DMSTATUS_ANYRESUMEACK (0x1U << DM_DMSTATUS_ANYRESUMEACK_OFFSET) /* * This field is 1 when all currently selected harts do not exist in - * this platform. + * this hardware platform. */ #define DM_DMSTATUS_ALLNONEXISTENT_OFFSET 15 #define DM_DMSTATUS_ALLNONEXISTENT_LENGTH 1 #define DM_DMSTATUS_ALLNONEXISTENT (0x1U << DM_DMSTATUS_ALLNONEXISTENT_OFFSET) /* * This field is 1 when any currently selected hart does not exist in - * this platform. + * this hardware platform. */ #define DM_DMSTATUS_ANYNONEXISTENT_OFFSET 14 #define DM_DMSTATUS_ANYNONEXISTENT_LENGTH 1 #define DM_DMSTATUS_ANYNONEXISTENT (0x1U << DM_DMSTATUS_ANYNONEXISTENT_OFFSET) /* - * This field is 1 when all currently selected harts are unavailable. + * This field is 1 when all currently selected harts are + * unavailable, or (if \FdmDmstatusStickyunavail is 1) were + * unavailable without that being acknowledged. */ #define DM_DMSTATUS_ALLUNAVAIL_OFFSET 13 #define DM_DMSTATUS_ALLUNAVAIL_LENGTH 1 #define DM_DMSTATUS_ALLUNAVAIL (0x1U << DM_DMSTATUS_ALLUNAVAIL_OFFSET) /* - * This field is 1 when any currently selected hart is unavailable. + * This field is 1 when any currently selected hart is unavailable, + * or (if \FdmDmstatusStickyunavail is 1) was unavailable without + * that being acknowledged. */ #define DM_DMSTATUS_ANYUNAVAIL_OFFSET 12 #define DM_DMSTATUS_ANYUNAVAIL_LENGTH 1 @@ -1020,7 +1558,7 @@ * 2: There is a Debug Module and it conforms to version 0.13 of this * specification. * - * 3: There is a Debug Module and it conforms to version 0.14 of this + * 3: There is a Debug Module and it conforms to version 1.0 of this * specification. * * 15: There is a Debug Module but it does not conform to any @@ -1082,6 +1620,16 @@ #define DM_DMCONTROL_ACKHAVERESET_OFFSET 28 #define DM_DMCONTROL_ACKHAVERESET_LENGTH 1 #define DM_DMCONTROL_ACKHAVERESET (0x1U << DM_DMCONTROL_ACKHAVERESET_OFFSET) +/* + * 0: No effect. + * + * 1: Clears {\tt unavail} for any selected harts. + * + * Writes apply to the new value of \Fhartsel and \FdmDmcontrolHasel. + */ +#define DM_DMCONTROL_ACKUNAVAIL_OFFSET 27 +#define DM_DMCONTROL_ACKUNAVAIL_LENGTH 1 +#define DM_DMCONTROL_ACKUNAVAIL (0x1U << DM_DMCONTROL_ACKUNAVAIL_OFFSET) /* * Selects the definition of currently selected harts. * @@ -1113,6 +1661,25 @@ #define DM_DMCONTROL_HARTSELHI_OFFSET 6 #define DM_DMCONTROL_HARTSELHI_LENGTH 10 #define DM_DMCONTROL_HARTSELHI (0x3ffU << DM_DMCONTROL_HARTSELHI_OFFSET) +/* + * This optional field sets \Fkeepalive for all currently selected + * harts, unless \FdmDmcontrolClrkeepalive is simultaneously set to + * 1. + * + * Writes apply to the new value of \Fhartsel and \FdmDmcontrolHasel. + */ +#define DM_DMCONTROL_SETKEEPALIVE_OFFSET 5 +#define DM_DMCONTROL_SETKEEPALIVE_LENGTH 1 +#define DM_DMCONTROL_SETKEEPALIVE (0x1U << DM_DMCONTROL_SETKEEPALIVE_OFFSET) +/* + * This optional field clears \Fkeepalive for all currently selected + * harts. + * + * Writes apply to the new value of \Fhartsel and \FdmDmcontrolHasel. + */ +#define DM_DMCONTROL_CLRKEEPALIVE_OFFSET 4 +#define DM_DMCONTROL_CLRKEEPALIVE_LENGTH 1 +#define DM_DMCONTROL_CLRKEEPALIVE (0x1U << DM_DMCONTROL_CLRKEEPALIVE_OFFSET) /* * This optional field writes the halt-on-reset request bit for all * currently selected harts, unless \FdmDmcontrolClrresethaltreq is @@ -1139,10 +1706,10 @@ #define DM_DMCONTROL_CLRRESETHALTREQ (0x1U << DM_DMCONTROL_CLRRESETHALTREQ_OFFSET) /* * This bit controls the reset signal from the DM to the rest of the - * system. The signal should reset every part of the system, including + * hardware platform. The signal should reset every part of the hardware platform, including * every hart, except for the DM and any logic required to access the * DM. - * To perform a system reset the debugger writes 1, + * To perform a hardware platform reset the debugger writes 1, * and then writes 0 * to deassert the reset. */ @@ -1151,23 +1718,27 @@ #define DM_DMCONTROL_NDMRESET (0x1U << DM_DMCONTROL_NDMRESET_OFFSET) /* * This bit serves as a reset signal for the Debug Module itself. + * After changing the value of this bit, the debugger must poll + * \RdmDmcontrol until \FdmDmcontrolDmactive has taken the requested value + * before performing any action that assumes the requested \FdmDmcontrolDmactive + * state change has completed. Hardware may + * take an arbitrarily long time to complete activation or deactivation and will + * indicate completion by setting \FdmDmcontrolDmactive to the requested value. * * 0: The module's state, including authentication mechanism, * takes its reset values (the \FdmDmcontrolDmactive bit is the only bit which can * be written to something other than its reset value). Any accesses - * to the module may fail. Specifically, \FdmDmstatusVersion may not return + * to the module may fail. Specifically, \FdmDmstatusVersion might not return * correct data. * - * 1: The module functions normally. After writing 1, the debugger should - * poll \RdmDmcontrol until \FdmDmcontrolDmactive is high. Hardware may - * take an arbitrarily long time to initialize and will indicate completion - * by setting dmactive to 1. + * 1: The module functions normally. * * No other mechanism should exist that may result in resetting the * Debug Module after power up. * - * A debugger may pulse this bit low to get the Debug Module into a - * known state. + * To place the Debug Module into a known state, a debugger may write 0 to \FdmDmcontrolDmactive, + * poll until \FdmDmcontrolDmactive is observed 0, write 1 to \FdmDmcontrolDmactive, and + * poll until \FdmDmcontrolDmactive is observed 1. * * Implementations may pay attention to this bit to further aid * debugging, for example by preventing the Debug Module from being @@ -1225,7 +1796,7 @@ #define DM_HAWINDOWSEL 0x14 /* * The high bits of this field may be tied to 0, depending on how large - * the array mask register is. E.g.\ on a system with 48 harts only bit 0 + * the array mask register is. E.g.\ on a hardware platform with 48 harts only bit 0 * of this field may actually be writable. */ #define DM_HAWINDOWSEL_HAWINDOWSEL_OFFSET 0 @@ -1361,11 +1932,35 @@ #define DM_DATA0_DATA_OFFSET 0 #define DM_DATA0_DATA_LENGTH 32 #define DM_DATA0_DATA (0xffffffffU << DM_DATA0_DATA_OFFSET) +#define DM_DATA1 0x05 +#define DM_DATA2 0x06 +#define DM_DATA3 0x07 +#define DM_DATA4 0x08 +#define DM_DATA5 0x09 +#define DM_DATA6 0x0a +#define DM_DATA7 0x0b +#define DM_DATA8 0x0c +#define DM_DATA9 0x0d +#define DM_DATA10 0x0e #define DM_DATA11 0x0f #define DM_PROGBUF0 0x20 #define DM_PROGBUF0_DATA_OFFSET 0 #define DM_PROGBUF0_DATA_LENGTH 32 #define DM_PROGBUF0_DATA (0xffffffffU << DM_PROGBUF0_DATA_OFFSET) +#define DM_PROGBUF1 0x21 +#define DM_PROGBUF2 0x22 +#define DM_PROGBUF3 0x23 +#define DM_PROGBUF4 0x24 +#define DM_PROGBUF5 0x25 +#define DM_PROGBUF6 0x26 +#define DM_PROGBUF7 0x27 +#define DM_PROGBUF8 0x28 +#define DM_PROGBUF9 0x29 +#define DM_PROGBUF10 0x2a +#define DM_PROGBUF11 0x2b +#define DM_PROGBUF12 0x2c +#define DM_PROGBUF13 0x2d +#define DM_PROGBUF14 0x2e #define DM_PROGBUF15 0x2f #define DM_AUTHDATA 0x30 #define DM_AUTHDATA_DATA_OFFSET 0 @@ -1381,20 +1976,20 @@ #define DM_DMCS2_GROUPTYPE_LENGTH 1 #define DM_DMCS2_GROUPTYPE (0x1U << DM_DMCS2_GROUPTYPE_OFFSET) /* - * This field contains the currently selected external trigger. + * This field contains the currently selected DM external trigger. * * If a non-existent trigger value is written here, the hardware will - * change it to a valid one or 0 if no external triggers exist. + * change it to a valid one or 0 if no DM external triggers exist. */ -#define DM_DMCS2_EXTTRIGGER_OFFSET 7 -#define DM_DMCS2_EXTTRIGGER_LENGTH 4 -#define DM_DMCS2_EXTTRIGGER (0xfU << DM_DMCS2_EXTTRIGGER_OFFSET) +#define DM_DMCS2_DMEXTTRIGGER_OFFSET 7 +#define DM_DMCS2_DMEXTTRIGGER_LENGTH 4 +#define DM_DMCS2_DMEXTTRIGGER (0xfU << DM_DMCS2_DMEXTTRIGGER_OFFSET) /* * When \FdmDmcsTwoHgselect is 0, contains the group of the hart * specified by \Fhartsel. * - * When \FdmDmcsTwoHgselect is 1, contains the group of the external - * trigger selected by \FdmDmcsTwoExttrigger. + * When \FdmDmcsTwoHgselect is 1, contains the group of the DM external + * trigger selected by \FdmDmcsTwoDmexttrigger. * * Writes only have an effect if \FdmDmcsTwoHgwrite is also written 1. * @@ -1409,15 +2004,15 @@ #define DM_DMCS2_GROUP_LENGTH 5 #define DM_DMCS2_GROUP (0x1fU << DM_DMCS2_GROUP_OFFSET) /* - * When \FdmDmcsTwoHgselect is 0, writing 1 changes the group of all - * selected harts to the value written to \FdmDmcsTwoGroup. - * * When 1 is written and \FdmDmcsTwoHgselect is 0, for every selected * hart the DM will change its group to the value written to \FdmDmcsTwoGroup, * if the hardware supports that group for that hart. + * Implementations may also change the group of a minimal set of + * unselected harts in the same way, if that is necessary due to + * a hardware limitation. * * When 1 is written and \FdmDmcsTwoHgselect is 1, the DM will change - * the group of the external trigger selected by \FdmDmcsTwoExttrigger + * the group of the DM external trigger selected by \FdmDmcsTwoDmexttrigger * to the value written to \FdmDmcsTwoGroup, if the hardware supports * that group for that trigger. * @@ -1429,9 +2024,9 @@ /* * 0: Operate on harts. * - * 1: Operate on external triggers. + * 1: Operate on DM external triggers. * - * If there are no external triggers, this field must be tied to 0. + * If there are no DM external triggers, this field must be tied to 0. */ #define DM_DMCS2_HGSELECT_OFFSET 0 #define DM_DMCS2_HGSELECT_LENGTH 1 @@ -1654,6 +2249,20 @@ #define DM_SBDATA3_DATA (0xffffffffU << DM_SBDATA3_DATA_OFFSET) #define DM_CUSTOM 0x1f #define DM_CUSTOM0 0x70 +#define DM_CUSTOM1 0x71 +#define DM_CUSTOM2 0x72 +#define DM_CUSTOM3 0x73 +#define DM_CUSTOM4 0x74 +#define DM_CUSTOM5 0x75 +#define DM_CUSTOM6 0x76 +#define DM_CUSTOM7 0x77 +#define DM_CUSTOM8 0x78 +#define DM_CUSTOM9 0x79 +#define DM_CUSTOM10 0x7a +#define DM_CUSTOM11 0x7b +#define DM_CUSTOM12 0x7c +#define DM_CUSTOM13 0x7d +#define DM_CUSTOM14 0x7e #define DM_CUSTOM15 0x7f #define SHORTNAME 0x123 /* @@ -1689,9 +2298,10 ... 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