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From: openocd-gerrit <ope...@us...> - 2023-02-12 09:04:58
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".
The branch, master has been updated
via 85ae73de03ebcc723842b7978a6c94b73166f027 (commit)
from 1998b1e5a89e57b2d1109bc36d6af916106103ff (commit)
Those revisions listed above that are new to this repository have
not appeared on any other notification email; so we list those
revisions in full, below.
- Log -----------------------------------------------------------------
commit 85ae73de03ebcc723842b7978a6c94b73166f027
Author: Andreas Bolsch <hyp...@gm...>
Date: Wed Mar 9 17:22:50 2022 +0100
new SPI memory devices, continuation code for manufacturer id
A bunch of new SPI flash (Adesto, Cypress, XTX Tech, mainly octal)
IDs and SPI FRAM (Infineon) IDs added. Backward compatible change
of ID interpretation: The previously unused 4th byte now acts
as continuation code (0x7F) count for manufacturer id, cf.
JEDEC JEP106BC. Currently this affects only some recent octal flash
and FRAM devices, which are only supported by stmqspi and cmspi
flash drivers.
Change-Id: Ibdcac81a84c636dc68439add4461b959df429bca
Signed-off-by: Andreas Bolsch <hyp...@gm...>
Reviewed-on: https://review.openocd.org/c/openocd/+/6929
Tested-by: jenkins
Reviewed-by: Antonio Borneo <bor...@gm...>
diff --git a/src/flash/nor/spi.c b/src/flash/nor/spi.c
index 9a606d545..b83df9677 100644
--- a/src/flash/nor/spi.c
+++ b/src/flash/nor/spi.c
@@ -23,7 +23,9 @@
* from device datasheets and Linux SPI flash drivers. */
const struct flash_device flash_devices[] = {
/* name, read_cmd, qread_cmd, pprog_cmd, erase_cmd, chip_erase_cmd, device_id,
- * pagesize, sectorsize, size_in_bytes */
+ * pagesize, sectorsize, size_in_bytes
+ * note: device id is usually 3 bytes long, however the unused highest byte counts
+ * continuation codes for manufacturer id as per JEP106xx */
FLASH_ID("st m25p05", 0x03, 0x00, 0x02, 0xd8, 0xc7, 0x00102020, 0x80, 0x8000, 0x10000),
FLASH_ID("st m25p10", 0x03, 0x00, 0x02, 0xd8, 0xc7, 0x00112020, 0x80, 0x8000, 0x20000),
FLASH_ID("st m25p20", 0x03, 0x00, 0x02, 0xd8, 0xc7, 0x00122020, 0x100, 0x10000, 0x40000),
@@ -51,12 +53,28 @@ const struct flash_device flash_devices[] = {
FLASH_ID("cyp s25fl064l", 0x03, 0x00, 0x02, 0xd8, 0xc7, 0x00176001, 0x100, 0x10000, 0x800000),
FLASH_ID("cyp s25fl128l", 0x03, 0x00, 0x02, 0xd8, 0xc7, 0x00186001, 0x100, 0x10000, 0x1000000),
FLASH_ID("cyp s25fl256l", 0x13, 0x00, 0x12, 0xdc, 0xc7, 0x00196001, 0x100, 0x10000, 0x2000000),
+ FLASH_ID("cyp s28hl256t", 0x13, 0xec, 0x12, 0xdc, 0xc7, 0x00195a34, 0x100, 0x40000, 0x2000000), /* page! */
+ FLASH_ID("cyp s28hs256t", 0x13, 0xec, 0x12, 0xdc, 0xc7, 0x00195b34, 0x100, 0x40000, 0x2000000), /* page! */
+ FLASH_ID("cyp s28hl512t", 0x13, 0xec, 0x12, 0xdc, 0xc7, 0x001a5a34, 0x100, 0x40000, 0x4000000), /* page! */
+ FLASH_ID("cyp s28hs512t", 0x13, 0xec, 0x12, 0xdc, 0xc7, 0x001a5b34, 0x100, 0x40000, 0x4000000), /* page! */
+ FLASH_ID("cyp s28hl01gt", 0x13, 0xec, 0x12, 0xdc, 0xc7, 0x001b5a34, 0x100, 0x40000, 0x8000000), /* page! */
+ FLASH_ID("cyp s28hs01gt", 0x13, 0xec, 0x12, 0xdc, 0xc7, 0x001b5b34, 0x100, 0x40000, 0x8000000), /* page! */
FLASH_ID("atmel 25f512", 0x03, 0x00, 0x02, 0x52, 0xc7, 0x0065001f, 0x80, 0x8000, 0x10000),
FLASH_ID("atmel 25f1024", 0x03, 0x00, 0x02, 0x52, 0x62, 0x0060001f, 0x100, 0x8000, 0x20000),
FLASH_ID("atmel 25f2048", 0x03, 0x00, 0x02, 0x52, 0x62, 0x0063001f, 0x100, 0x10000, 0x40000),
FLASH_ID("atmel 25f4096", 0x03, 0x00, 0x02, 0x52, 0x62, 0x0064001f, 0x100, 0x10000, 0x80000),
FLASH_ID("atmel 25fs040", 0x03, 0x00, 0x02, 0xd7, 0xc7, 0x0004661f, 0x100, 0x10000, 0x80000),
+ FLASH_ID("adesto 25sf041b", 0x03, 0x00, 0x02, 0xd8, 0xc7, 0x0001841f, 0x100, 0x10000, 0x80000),
FLASH_ID("adesto 25df081a", 0x03, 0x00, 0x02, 0xd8, 0xc7, 0x0001451f, 0x100, 0x10000, 0x100000),
+ FLASH_ID("adesto 25sf081b", 0x03, 0x00, 0x02, 0xd8, 0xc7, 0x0001851f, 0x100, 0x10000, 0x100000),
+ FLASH_ID("adesto 25sf161b", 0x03, 0x00, 0x02, 0xd8, 0xc7, 0x0001861f, 0x100, 0x10000, 0x200000),
+ FLASH_ID("adesto 25df321b", 0x03, 0x00, 0x02, 0xd8, 0xc7, 0x0001471f, 0x100, 0x10000, 0x400000),
+ FLASH_ID("adesto 25sf321b", 0x03, 0x00, 0x02, 0xd8, 0xc7, 0x0001871f, 0x100, 0x10000, 0x400000),
+ FLASH_ID("adesto 25xf641b", 0x03, 0x00, 0x02, 0xd8, 0xc7, 0x0001881f, 0x100, 0x10000, 0x800000), /* sf/qf */
+ FLASH_ID("adesto 25xf128a", 0x03, 0x00, 0x02, 0xd8, 0xc7, 0x0001891f, 0x100, 0x10000, 0x1000000), /* sf/qf */
+ FLASH_ID("adesto xp032", 0x03, 0x0b, 0x02, 0xd8, 0xc7, 0x0700a743, 0x100, 0x10000, 0x400000), /* 4-byte */
+ FLASH_ID("adesto xp064b", 0x03, 0x0b, 0x02, 0xd8, 0xc7, 0x0001a81f, 0x100, 0x10000, 0x800000), /* 4-byte */
+ FLASH_ID("adesto xp128", 0x03, 0x0b, 0x02, 0xd8, 0xc7, 0x0000a91f, 0x100, 0x10000, 0x1000000), /* 4-byte */
FLASH_ID("mac 25l512", 0x03, 0x00, 0x02, 0xd8, 0xc7, 0x001020c2, 0x010, 0x10000, 0x10000),
FLASH_ID("mac 25l1005", 0x03, 0x00, 0x02, 0xd8, 0xc7, 0x001120c2, 0x010, 0x10000, 0x20000),
FLASH_ID("mac 25l2005", 0x03, 0x00, 0x02, 0xd8, 0xc7, 0x001220c2, 0x010, 0x10000, 0x40000),
@@ -78,6 +96,9 @@ const struct flash_device flash_devices[] = {
FLASH_ID("mac 25r3235f", 0x03, 0x00, 0x02, 0xd8, 0xc7, 0x001628c2, 0x100, 0x10000, 0x400000),
FLASH_ID("mac 25r6435f", 0x03, 0x00, 0x02, 0xd8, 0xc7, 0x001728c2, 0x100, 0x10000, 0x800000),
FLASH_ID("mac 25u1635e", 0x03, 0xeb, 0x02, 0x20, 0xc7, 0x003525c2, 0x100, 0x1000, 0x100000),
+ FLASH_ID("mac 66l1g45g", 0x13, 0xec, 0x12, 0xdc, 0xc7, 0x001b20c2, 0x100, 0x10000, 0x8000000),
+ FLASH_ID("mac 66um1g45g", 0x13, 0xec, 0x12, 0xdc, 0xc7, 0x003b80c2, 0x100, 0x10000, 0x8000000),
+ FLASH_ID("mac 66lm1g45g", 0x13, 0xec, 0x12, 0xdc, 0xc7, 0x003b85c2, 0x100, 0x10000, 0x8000000),
FLASH_ID("micron n25q032", 0x03, 0xeb, 0x02, 0xd8, 0xc7, 0x0016ba20, 0x100, 0x10000, 0x400000),
FLASH_ID("micron n25q064", 0x03, 0xeb, 0x02, 0xd8, 0xc7, 0x0017ba20, 0x100, 0x10000, 0x800000),
FLASH_ID("micron n25q128", 0x03, 0xeb, 0x02, 0xd8, 0xc7, 0x0018ba20, 0x100, 0x10000, 0x1000000),
@@ -102,6 +123,10 @@ const struct flash_device flash_devices[] = {
FLASH_ID("win w25q256fv/jv", 0x03, 0xeb, 0x02, 0xd8, 0xc7, 0x001940ef, 0x100, 0x10000, 0x2000000),
FLASH_ID("win w25q256fv", 0x03, 0xeb, 0x02, 0xd8, 0xc7, 0x001960ef, 0x100, 0x10000, 0x2000000), /* QPI mode */
FLASH_ID("win w25q256jv", 0x03, 0x00, 0x02, 0xd8, 0xc7, 0x001970ef, 0x100, 0x10000, 0x2000000),
+ FLASH_ID("win w25q512jv", 0x03, 0x00, 0x02, 0xd8, 0xc7, 0x002040ef, 0x100, 0x10000, 0x4000000),
+ FLASH_ID("win w25q01jv", 0x13, 0x00, 0x12, 0xdc, 0xc7, 0x002140ef, 0x100, 0x10000, 0x8000000),
+ FLASH_ID("win w25q01jv-dtr", 0x03, 0xeb, 0x02, 0xd8, 0xc7, 0x002170ef, 0x100, 0x10000, 0x8000000),
+ FLASH_ID("win w25q02jv-dtr", 0x03, 0xeb, 0x02, 0xd8, 0xc7, 0x002270ef, 0x100, 0x10000, 0x10000000),
FLASH_ID("gd gd25q512", 0x03, 0x00, 0x02, 0x20, 0xc7, 0x001040c8, 0x100, 0x1000, 0x10000),
FLASH_ID("gd gd25q10", 0x03, 0x00, 0x02, 0x20, 0xc7, 0x001140c8, 0x100, 0x1000, 0x20000),
FLASH_ID("gd gd25q20", 0x03, 0x00, 0x02, 0x20, 0xc7, 0x001240c8, 0x100, 0x1000, 0x40000),
@@ -109,9 +134,10 @@ const struct flash_device flash_devices[] = {
FLASH_ID("gd gd25q16c", 0x03, 0x00, 0x02, 0xd8, 0xc7, 0x001540c8, 0x100, 0x10000, 0x200000),
FLASH_ID("gd gd25q32c", 0x03, 0x00, 0x02, 0xd8, 0xc7, 0x001640c8, 0x100, 0x10000, 0x400000),
FLASH_ID("gd gd25q64c", 0x03, 0x00, 0x02, 0xd8, 0xc7, 0x001740c8, 0x100, 0x10000, 0x800000),
- FLASH_ID("gd gd25q128c", 0x03, 0xeb, 0x02, 0xd8, 0xc7, 0x001840c8, 0x100, 0x10000, 0x1000000),
+ FLASH_ID("gd gd25q128c", 0x03, 0x0b, 0x02, 0xd8, 0xc7, 0x001840c8, 0x100, 0x10000, 0x1000000),
FLASH_ID("gd gd25q256c", 0x13, 0x00, 0x12, 0xdc, 0xc7, 0x001940c8, 0x100, 0x10000, 0x2000000),
FLASH_ID("gd gd25q512mc", 0x13, 0x00, 0x12, 0xdc, 0xc7, 0x002040c8, 0x100, 0x10000, 0x4000000),
+ FLASH_ID("gd gd25lx256e", 0x13, 0x0c, 0x12, 0xdc, 0xc7, 0x001968c8, 0x100, 0x10000, 0x2000000),
FLASH_ID("zbit zb25vq16", 0x03, 0x00, 0x02, 0xd8, 0xc7, 0x0015605e, 0x100, 0x10000, 0x200000),
FLASH_ID("zbit zb25vq32", 0x03, 0x0b, 0x02, 0xd8, 0xc7, 0x0016405e, 0x100, 0x10000, 0x400000),
FLASH_ID("zbit zb25vq32", 0x03, 0x0b, 0x02, 0xd8, 0xc7, 0x0016605e, 0x100, 0x10000, 0x400000), /* QPI mode */
@@ -128,6 +154,18 @@ const struct flash_device flash_devices[] = {
FLASH_ID("issi is25wp256d", 0x13, 0xec, 0x12, 0xdc, 0xc7, 0x0019709d, 0x100, 0x10000, 0x2000000),
FLASH_ID("issi is25lp512m", 0x13, 0xec, 0x12, 0xdc, 0xc7, 0x001a609d, 0x100, 0x10000, 0x4000000),
FLASH_ID("issi is25wp512m", 0x13, 0xec, 0x12, 0xdc, 0xc7, 0x001a709d, 0x100, 0x10000, 0x4000000),
+ FLASH_ID("xtx xt25f02e", 0x03, 0x00, 0x02, 0xd8, 0xc7, 0x0012400b, 0x100, 0x10000, 0x40000),
+ FLASH_ID("xtx xt25f04d", 0x03, 0x00, 0x02, 0xd8, 0xc7, 0x0013400b, 0x100, 0x10000, 0x80000),
+ FLASH_ID("xtx xt25f08b", 0x03, 0x00, 0x02, 0xd8, 0xc7, 0x0014400b, 0x100, 0x10000, 0x100000),
+ FLASH_ID("xtx xt25f16b", 0x03, 0x00, 0x02, 0xd8, 0xc7, 0x0015400b, 0x100, 0x10000, 0x200000),
+ FLASH_ID("xtx xt25f32b", 0x03, 0x0b, 0x02, 0xd8, 0xc7, 0x0016400b, 0x100, 0x10000, 0x200000),
+ FLASH_ID("xtx xt25f64b", 0x03, 0x0b, 0x02, 0xd8, 0xc7, 0x0017400b, 0x100, 0x10000, 0x400000),
+ FLASH_ID("xtx xt25f128b", 0x03, 0x0b, 0x02, 0xd8, 0xc7, 0x0018400b, 0x100, 0x10000, 0x800000),
+ FLASH_ID("xtx xt25q08d", 0x03, 0x0b, 0x02, 0xd8, 0xc7, 0x0014600b, 0x100, 0x10000, 0x100000),
+ FLASH_ID("xtx xt25q16b", 0x03, 0x0b, 0x02, 0xd8, 0xc7, 0x0015600b, 0x100, 0x10000, 0x200000),
+ FLASH_ID("xtx xt25q32b", 0x03, 0x0b, 0x02, 0xd8, 0xc7, 0x0016600b, 0x100, 0x10000, 0x400000), /* exists ? */
+ FLASH_ID("xtx xt25q64b", 0x03, 0x0b, 0x02, 0xd8, 0xc7, 0x0017600b, 0x100, 0x10000, 0x800000),
+ FLASH_ID("xtx xt25q128b", 0x03, 0x0b, 0x02, 0xd8, 0xc7, 0x0018600b, 0x100, 0x10000, 0x1000000),
/* FRAM, no erase commands, no write page or sectors */
FRAM_ID("fu mb85rs16n", 0x03, 0, 0x02, 0x00010104, 0x800),
@@ -138,13 +176,30 @@ const struct flash_device flash_devices[] = {
FRAM_ID("fu mb85rs512t", 0x03, 0, 0x02, 0x00032604, 0x10000),
FRAM_ID("fu mb85rs1mt", 0x03, 0, 0x02, 0x00032704, 0x20000),
FRAM_ID("fu mb85rs2mta", 0x03, 0, 0x02, 0x00034804, 0x40000),
- FRAM_ID("cyp fm25v01a", 0x03, 0, 0x02, 0x000821c2, 0x4000),
- FRAM_ID("cyp fm25v02", 0x03, 0, 0x02, 0x000022c2, 0x8000),
- FRAM_ID("cyp fm25v02a", 0x03, 0, 0x02, 0x000822c2, 0x8000),
- FRAM_ID("cyp fm25v05", 0x03, 0, 0x02, 0x000023c2, 0x10000),
- FRAM_ID("cyp fm25v10", 0x03, 0, 0x02, 0x000024c2, 0x20000),
- FRAM_ID("cyp fm25v20a", 0x03, 0, 0x02, 0x000825c2, 0x40000),
- FRAM_ID("cyp fm25v40", 0x03, 0, 0x02, 0x004026c2, 0x80000),
+ FRAM_ID("cyp fm25v01a", 0x03, 0, 0x02, 0x060821c2, 0x4000),
+ FRAM_ID("cyp fm25v02", 0x03, 0, 0x02, 0x060022c2, 0x8000),
+ FRAM_ID("cyp fm25v02a", 0x03, 0, 0x02, 0x060822c2, 0x8000),
+ FRAM_ID("cyp fm25v05", 0x03, 0, 0x02, 0x060023c2, 0x10000),
+ FRAM_ID("cyp fm25v10", 0x03, 0, 0x02, 0x060024c2, 0x20000),
+ FRAM_ID("cyp fm25v20a", 0x03, 0, 0x02, 0x060825c2, 0x40000),
+ FRAM_ID("cyp fm25v40", 0x03, 0, 0x02, 0x064026c2, 0x80000),
+ FRAM_ID("cyp cy15b102qn", 0x03, 0, 0x02, 0x06002ac2, 0x40000),
+ FRAM_ID("cyp cy15v102qn", 0x03, 0, 0x02, 0x06042ac2, 0x40000),
+ FRAM_ID("cyp cy15b104qi", 0x03, 0, 0x02, 0x06012dc2, 0x80000),
+ FRAM_ID("cyp cy15b104qi", 0x03, 0, 0x02, 0x06a12dc2, 0x80000),
+ FRAM_ID("cyp cy15v104qi", 0x03, 0, 0x02, 0x06052dc2, 0x80000),
+ FRAM_ID("cyp cy15v104qi", 0x03, 0, 0x02, 0x06a52dc2, 0x80000),
+ FRAM_ID("cyp cy15b104qn", 0x03, 0, 0x02, 0x06402cc2, 0x80000),
+ FRAM_ID("cyp cy15b108qi", 0x03, 0, 0x02, 0x06012fc2, 0x100000),
+ FRAM_ID("cyp cy15b108qi", 0x03, 0, 0x02, 0x06a12fc2, 0x100000),
+ FRAM_ID("cyp cy15v108qi", 0x03, 0, 0x02, 0x06052fc2, 0x100000),
+ FRAM_ID("cyp cy15v108qi", 0x03, 0, 0x02, 0x06a52fc2, 0x100000),
+ FRAM_ID("cyp cy15b108qn", 0x03, 0, 0x02, 0x06012ec2, 0x100000),
+ FRAM_ID("cyp cy15b108qn", 0x03, 0, 0x02, 0x06032ec2, 0x100000),
+ FRAM_ID("cyp cy15b108qn", 0x03, 0, 0x02, 0x06a12ec2, 0x100000),
+ FRAM_ID("cyp cy15v108qn", 0x03, 0, 0x02, 0x06052ec2, 0x100000),
+ FRAM_ID("cyp cy15v108qn", 0x03, 0, 0x02, 0x06072ec2, 0x100000),
+ FRAM_ID("cyp cy15v108qn", 0x03, 0, 0x02, 0x06a52ec2, 0x100000),
FLASH_ID(NULL, 0, 0, 0, 0, 0, 0, 0, 0, 0)
};
-----------------------------------------------------------------------
Summary of changes:
src/flash/nor/spi.c | 73 ++++++++++++++++++++++++++++++++++++++++++++++-------
1 file changed, 64 insertions(+), 9 deletions(-)
hooks/post-receive
--
Main OpenOCD repository
|
|
From: openocd-gerrit <ope...@us...> - 2023-02-03 22:49:28
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".
The branch, master has been updated
via 1998b1e5a89e57b2d1109bc36d6af916106103ff (commit)
via b6021e856a9259aac5dcba45bb3a5d8ae307886b (commit)
from 4a79372b6e6e511c9b7ad5cc97b85338ffb860e3 (commit)
Those revisions listed above that are new to this repository have
not appeared on any other notification email; so we list those
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- Log -----------------------------------------------------------------
commit 1998b1e5a89e57b2d1109bc36d6af916106103ff
Author: Marc Schink <de...@za...>
Date: Thu Feb 2 14:25:27 2023 +0100
README: Remove statement about libjaylink Git submodule
Change-Id: I552c08979849c66d7f8f559ccfd49d27f8b68bb8
Signed-off-by: Marc Schink <de...@za...>
Reviewed-on: https://review.openocd.org/c/openocd/+/7470
Tested-by: jenkins
Reviewed-by: Antonio Borneo <bor...@gm...>
diff --git a/README b/README
index 2f71cfc6a..7d3f10def 100644
--- a/README
+++ b/README
@@ -240,8 +240,7 @@ Optional CMSIS-DAP adapter driver needs HIDAPI library.
Optional linuxgpiod adapter driver needs libgpiod library.
-Optional JLink adapter driver needs libjaylink; build from git can
-retrieve libjaylink as git submodule.
+Optional J-Link adapter driver needs libjaylink library.
Optional ARM disassembly needs capstone library.
commit b6021e856a9259aac5dcba45bb3a5d8ae307886b
Author: Marc Schink <de...@za...>
Date: Mon Jan 30 16:38:45 2023 +0100
flash/nor/stm32l4x: Add revision 'Z' for STM32L552/562 devices
Change-Id: Icc6058ef1f43e969a2a9baadfaf382ac820a7b76
Signed-off-by: Marc Schink <de...@za...>
Reviewed-on: https://review.openocd.org/c/openocd/+/7468
Tested-by: jenkins
Reviewed-by: Antonio Borneo <bor...@gm...>
diff --git a/src/flash/nor/stm32l4x.c b/src/flash/nor/stm32l4x.c
index c67dbf75d..02e737b87 100644
--- a/src/flash/nor/stm32l4x.c
+++ b/src/flash/nor/stm32l4x.c
@@ -318,7 +318,7 @@ static const struct stm32l4_rev stm32l4p_l4qxx_revs[] = {
};
static const struct stm32l4_rev stm32l55_l56xx_revs[] = {
- { 0x1000, "A" }, { 0x2000, "B" },
+ { 0x1000, "A" }, { 0x2000, "B" }, { 0x2001, "Z" },
};
static const struct stm32l4_rev stm32g49_g4axx_revs[] = {
-----------------------------------------------------------------------
Summary of changes:
README | 3 +--
src/flash/nor/stm32l4x.c | 2 +-
2 files changed, 2 insertions(+), 3 deletions(-)
hooks/post-receive
--
Main OpenOCD repository
|
|
From: openocd-gerrit <ope...@us...> - 2023-02-03 22:49:13
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".
The branch, master has been updated
via 4a79372b6e6e511c9b7ad5cc97b85338ffb860e3 (commit)
from 85f3b10a6914fd44c8f32d345654bed371d0667d (commit)
Those revisions listed above that are new to this repository have
not appeared on any other notification email; so we list those
revisions in full, below.
- Log -----------------------------------------------------------------
commit 4a79372b6e6e511c9b7ad5cc97b85338ffb860e3
Author: Antonio Borneo <bor...@gm...>
Date: Tue Dec 27 02:38:25 2022 +0100
target: arc: rewrite command 'arc add-reg' as COMMAND_HANDLER
While there, fix some coding style error and remove the now unused
function jim_arc_read_reg_name_field() and the macro
JIM_CHECK_RETVAL().
Change-Id: I140b4b929978b2936f2310e0b7d1735ba726c517
Signed-off-by: Antonio Borneo <bor...@gm...>
Reviewed-on: https://review.openocd.org/c/openocd/+/7426
Tested-by: jenkins
Reviewed-by: Evgeniy Didin <di...@sy...>
diff --git a/src/target/arc.h b/src/target/arc.h
index bb70a598e..a351802ac 100644
--- a/src/target/arc.h
+++ b/src/target/arc.h
@@ -253,16 +253,6 @@ struct arc_common {
} \
} while (0)
-#define JIM_CHECK_RETVAL(action) \
- do { \
- int __retval = (action); \
- if (__retval != JIM_OK) { \
- LOG_DEBUG("error while calling \"%s\"", \
- # action); \
- return __retval; \
- } \
- } while (0)
-
static inline struct arc_common *target_to_arc(struct target *target)
{
return target->arch_info;
diff --git a/src/target/arc_cmd.c b/src/target/arc_cmd.c
index 3b0bf76f8..e7760b037 100644
--- a/src/target/arc_cmd.c
+++ b/src/target/arc_cmd.c
@@ -55,21 +55,6 @@ static const char *validate_register(const struct arc_reg_desc * const reg, bool
return NULL;
}
-/* Helper function to read the name of register type or register from
- * configure files */
-static int jim_arc_read_reg_name_field(struct jim_getopt_info *goi,
- const char **name, int *name_len)
-{
- int e = JIM_OK;
-
- if (!goi->argc) {
- Jim_WrongNumArgs(goi->interp, goi->argc, goi->argv, "-name <name> ...");
- return JIM_ERR;
- }
- e = jim_getopt_string(goi, name, name_len);
- return e;
-}
-
static COMMAND_HELPER(arc_handle_add_reg_type_flags_ops, struct arc_reg_data_type *type)
{
struct reg_data_type_flags_field *fields = type->reg_type_flags_field;
@@ -528,7 +513,7 @@ enum opts_add_reg {
CFG_ADD_REG_GENERAL,
};
-static struct jim_nvp opts_nvp_add_reg[] = {
+static const struct nvp opts_nvp_add_reg[] = {
{ .name = "-name", .value = CFG_ADD_REG_NAME },
{ .name = "-num", .value = CFG_ADD_REG_ARCH_NUM },
{ .name = "-core", .value = CFG_ADD_REG_IS_CORE },
@@ -546,155 +531,133 @@ void free_reg_desc(struct arc_reg_desc *r)
free(r);
}
-static int jim_arc_add_reg(Jim_Interp *interp, int argc, Jim_Obj * const *argv)
+static COMMAND_HELPER(arc_handle_add_reg_do, struct arc_reg_desc *reg)
{
- struct jim_getopt_info goi;
- JIM_CHECK_RETVAL(jim_getopt_setup(&goi, interp, argc-1, argv+1));
-
- struct arc_reg_desc *reg = calloc(1, sizeof(*reg));
- if (!reg) {
- Jim_SetResultFormatted(goi.interp, "Failed to allocate memory.");
- return JIM_ERR;
- }
-
/* There is no architecture number that we could treat as invalid, so
* separate variable required to ensure that arch num has been set. */
bool arch_num_set = false;
const char *type_name = "int"; /* Default type */
- int type_name_len = strlen(type_name);
- int e = ERROR_OK;
/* At least we need to specify 4 parameters: name, number and gdb_feature,
* which means there should be 6 arguments. Also there can be additional parameters
* "-type <type>", "-g" and "-core" or "-bcr" which makes maximum 10 parameters. */
- if (goi.argc < 6 || goi.argc > 10) {
- free_reg_desc(reg);
- Jim_SetResultFormatted(goi.interp,
- "Should be at least 6 arguments and not greater than 10: "
- " -name <name> -num <num> -feature <gdb_feature> "
- " [-type <type_name>] [-core|-bcr] [-g].");
- return JIM_ERR;
- }
+ if (CMD_ARGC < 6 || CMD_ARGC > 10)
+ return ERROR_COMMAND_SYNTAX_ERROR;
/* Parse options. */
- while (goi.argc > 0) {
- struct jim_nvp *n;
- e = jim_getopt_nvp(&goi, opts_nvp_add_reg, &n);
- if (e != JIM_OK) {
- jim_getopt_nvp_unknown(&goi, opts_nvp_add_reg, 0);
- free_reg_desc(reg);
- return e;
- }
-
+ while (CMD_ARGC) {
+ const struct nvp *n = nvp_name2value(opts_nvp_add_reg, CMD_ARGV[0]);
+ CMD_ARGC--;
+ CMD_ARGV++;
switch (n->value) {
- case CFG_ADD_REG_NAME:
- {
- const char *reg_name = NULL;
- int reg_name_len = 0;
-
- e = jim_arc_read_reg_name_field(&goi, ®_name, ®_name_len);
- if (e != JIM_OK) {
- Jim_SetResultFormatted(goi.interp, "Unable to read register name.");
- free_reg_desc(reg);
- return e;
- }
-
- reg->name = strndup(reg_name, reg_name_len);
- break;
- }
- case CFG_ADD_REG_IS_CORE:
- reg->is_core = true;
- break;
- case CFG_ADD_REG_IS_BCR:
- reg->is_bcr = true;
- break;
- case CFG_ADD_REG_ARCH_NUM:
- {
- jim_wide archnum;
-
- if (!goi.argc) {
- free_reg_desc(reg);
- Jim_WrongNumArgs(interp, goi.argc, goi.argv, "-num <int> ...");
- return JIM_ERR;
- }
-
- e = jim_getopt_wide(&goi, &archnum);
- if (e != JIM_OK) {
- free_reg_desc(reg);
- return e;
- }
-
- reg->arch_num = archnum;
- arch_num_set = true;
- break;
+ case CFG_ADD_REG_NAME:
+ if (!CMD_ARGC)
+ return ERROR_COMMAND_ARGUMENT_INVALID;
+
+ reg->name = strdup(CMD_ARGV[0]);
+ if (!reg->name) {
+ LOG_ERROR("Out of memory");
+ return ERROR_FAIL;
}
- case CFG_ADD_REG_GDB_FEATURE:
- {
- const char *feature = NULL;
- int feature_len = 0;
-
- e = jim_arc_read_reg_name_field(&goi, &feature, &feature_len);
- if (e != JIM_OK) {
- Jim_SetResultFormatted(goi.interp, "Unable to read gdb_feature.");
- free_reg_desc(reg);
- return e;
- }
-
- reg->gdb_xml_feature = strndup(feature, feature_len);
- break;
+
+ CMD_ARGC--;
+ CMD_ARGV++;
+ break;
+
+ case CFG_ADD_REG_IS_CORE:
+ reg->is_core = true;
+ break;
+
+ case CFG_ADD_REG_IS_BCR:
+ reg->is_bcr = true;
+ break;
+
+ case CFG_ADD_REG_ARCH_NUM:
+ if (!CMD_ARGC)
+ return ERROR_COMMAND_ARGUMENT_INVALID;
+
+ COMMAND_PARSE_NUMBER(u32, CMD_ARGV[0], reg->arch_num);
+ CMD_ARGC--;
+ CMD_ARGV++;
+
+ arch_num_set = true;
+ break;
+
+ case CFG_ADD_REG_GDB_FEATURE:
+ if (!CMD_ARGC)
+ return ERROR_COMMAND_ARGUMENT_INVALID;
+
+ reg->gdb_xml_feature = strdup(CMD_ARGV[0]);
+ if (!reg->gdb_xml_feature) {
+ LOG_ERROR("Out of memory");
+ return ERROR_FAIL;
}
- case CFG_ADD_REG_TYPE:
- e = jim_arc_read_reg_name_field(&goi, &type_name, &type_name_len);
- if (e != JIM_OK) {
- Jim_SetResultFormatted(goi.interp, "Unable to read register type.");
- free_reg_desc(reg);
- return e;
- }
-
- break;
- case CFG_ADD_REG_GENERAL:
- reg->is_general = true;
- break;
- default:
- LOG_DEBUG("Error: Unknown parameter");
- free_reg_desc(reg);
- return JIM_ERR;
+
+ CMD_ARGC--;
+ CMD_ARGV++;
+ break;
+
+ case CFG_ADD_REG_TYPE:
+ if (!CMD_ARGC)
+ return ERROR_COMMAND_ARGUMENT_INVALID;
+
+ type_name = CMD_ARGV[0];
+ CMD_ARGC--;
+ CMD_ARGV++;
+ break;
+
+ case CFG_ADD_REG_GENERAL:
+ reg->is_general = true;
+ break;
+
+ default:
+ nvp_unknown_command_print(CMD, opts_nvp_add_reg, NULL, CMD_ARGV[-1]);
+ return ERROR_COMMAND_ARGUMENT_INVALID;
}
}
/* Check that required fields are set */
const char * const errmsg = validate_register(reg, arch_num_set);
if (errmsg) {
- Jim_SetResultFormatted(goi.interp, errmsg);
- free_reg_desc(reg);
- return JIM_ERR;
+ command_print(CMD, "%s", errmsg);
+ return ERROR_COMMAND_ARGUMENT_INVALID;
}
/* Add new register */
- struct command_context *ctx;
- struct target *target;
-
- ctx = current_command_context(interp);
- assert(ctx);
- target = get_current_target(ctx);
+ struct target *target = get_current_target(CMD_CTX);
if (!target) {
- Jim_SetResultFormatted(goi.interp, "No current target");
- free_reg_desc(reg);
- return JIM_ERR;
+ command_print(CMD, "No current target");
+ return ERROR_FAIL;
}
reg->target = target;
- e = arc_reg_add(target, reg, type_name, type_name_len);
- if (e == ERROR_ARC_REGTYPE_NOT_FOUND) {
- Jim_SetResultFormatted(goi.interp,
+ int retval = arc_reg_add(target, reg, type_name, strlen(type_name));
+ if (retval == ERROR_ARC_REGTYPE_NOT_FOUND) {
+ command_print(CMD,
"Cannot find type `%s' for register `%s'.",
type_name, reg->name);
+ return retval;
+ }
+
+ return ERROR_OK;
+}
+
+COMMAND_HANDLER(arc_handle_add_reg)
+{
+ struct arc_reg_desc *reg = calloc(1, sizeof(*reg));
+ if (!reg) {
+ LOG_ERROR("Out of memory");
+ return ERROR_FAIL;
+ }
+
+ int retval = CALL_COMMAND_HANDLER(arc_handle_add_reg_do, reg);
+ if (retval != ERROR_OK) {
free_reg_desc(reg);
- return JIM_ERR;
+ return retval;
}
- return e;
+ return ERROR_OK;
}
/* arc set-reg-exists ($reg_name)+
@@ -887,7 +850,7 @@ static const struct command_registration arc_core_command_handlers[] = {
},
{
.name = "add-reg",
- .jim_handler = jim_arc_add_reg,
+ .handler = arc_handle_add_reg,
.mode = COMMAND_CONFIG,
.usage = "-name <string> -num <int> -feature <string> [-gdbnum <int>] "
"[-core|-bcr] [-type <type_name>] [-g]",
-----------------------------------------------------------------------
Summary of changes:
src/target/arc.h | 10 ---
src/target/arc_cmd.c | 229 +++++++++++++++++++++------------------------------
2 files changed, 96 insertions(+), 143 deletions(-)
hooks/post-receive
--
Main OpenOCD repository
|
|
From: openocd-gerrit <ope...@us...> - 2023-02-03 22:48:42
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".
The branch, master has been updated
via 85f3b10a6914fd44c8f32d345654bed371d0667d (commit)
via 92ef27494c510a2df7cbbee8b19d5c0d4d943d40 (commit)
from ea6a99208e1bc41a878234f7220501e26ec4a7f1 (commit)
Those revisions listed above that are new to this repository have
not appeared on any other notification email; so we list those
revisions in full, below.
- Log -----------------------------------------------------------------
commit 85f3b10a6914fd44c8f32d345654bed371d0667d
Author: Antonio Borneo <bor...@gm...>
Date: Tue Dec 27 00:56:55 2022 +0100
target: arc: rewrite command 'arc add-reg-type-struct' as COMMAND_HANDLER
Use a COMMAND_HELPER() to avoid memory leaks when the helper
COMMAND_PARSE_NUMBER() returns due to an error.
While there:
- fix potential SIGSEGV due to dereference 'type' before checking
it's not NULL;
- fix an incorrect NUL byte termination while copying to
type->data_type.id and to bitfields[cur_field].name;
- fix some coding style error;
- remove the now unused function jim_arc_read_reg_type_field().
Change-Id: I7158fd93b5d4742f11654b8ae4a7abd409ad06e2
Signed-off-by: Antonio Borneo <bor...@gm...>
Reviewed-on: https://review.openocd.org/c/openocd/+/7425
Tested-by: jenkins
Reviewed-by: Evgeniy Didin <di...@sy...>
diff --git a/src/target/arc_cmd.c b/src/target/arc_cmd.c
index 32c62d0ca..3b0bf76f8 100644
--- a/src/target/arc_cmd.c
+++ b/src/target/arc_cmd.c
@@ -70,51 +70,6 @@ static int jim_arc_read_reg_name_field(struct jim_getopt_info *goi,
return e;
}
-/* Helper function to read bitfields/flags of register type. */
-static int jim_arc_read_reg_type_field(struct jim_getopt_info *goi, const char **field_name, int *field_name_len,
- struct arc_reg_bitfield *bitfields, int cur_field, int type)
-{
- jim_wide start_pos, end_pos;
-
- int e = JIM_OK;
- if ((type == CFG_ADD_REG_TYPE_STRUCT && goi->argc < 3) ||
- (type == CFG_ADD_REG_TYPE_FLAG && goi->argc < 2)) {
- Jim_SetResultFormatted(goi->interp, "Not enough arguments after -flag/-bitfield");
- return JIM_ERR;
- }
-
- e = jim_getopt_string(goi, field_name, field_name_len);
- if (e != JIM_OK)
- return e;
-
- /* read start position of bitfield/flag */
- e = jim_getopt_wide(goi, &start_pos);
- if (e != JIM_OK)
- return e;
-
- end_pos = start_pos;
-
- /* Check if any arguments remain,
- * set bitfields[cur_field].end if flag is multibit */
- if (goi->argc > 0)
- /* Check current argv[0], if it is equal to "-flag",
- * than bitfields[cur_field].end remains start */
- if ((strcmp(Jim_String(goi->argv[0]), "-flag") && type == CFG_ADD_REG_TYPE_FLAG)
- || (type == CFG_ADD_REG_TYPE_STRUCT)) {
- e = jim_getopt_wide(goi, &end_pos);
- if (e != JIM_OK) {
- Jim_SetResultFormatted(goi->interp, "Error reading end position");
- return e;
- }
- }
-
- bitfields[cur_field].bitfield.start = start_pos;
- bitfields[cur_field].bitfield.end = end_pos;
- if ((end_pos != start_pos) || (type == CFG_ADD_REG_TYPE_STRUCT))
- bitfields[cur_field].bitfield.type = REG_TYPE_INT;
- return e;
-}
-
static COMMAND_HELPER(arc_handle_add_reg_type_flags_ops, struct arc_reg_data_type *type)
{
struct reg_data_type_flags_field *fields = type->reg_type_flags_field;
@@ -255,7 +210,7 @@ enum add_reg_type_struct {
CFG_ADD_REG_TYPE_STRUCT_BITFIELD,
};
-static struct jim_nvp nvp_add_reg_type_struct_opts[] = {
+static const struct nvp nvp_add_reg_type_struct_opts[] = {
{ .name = "-name", .value = CFG_ADD_REG_TYPE_STRUCT_NAME },
{ .name = "-bitfield", .value = CFG_ADD_REG_TYPE_STRUCT_BITFIELD },
{ .name = NULL, .value = -1 }
@@ -424,53 +379,117 @@ static const struct command_registration arc_jtag_command_group[] = {
/* This function supports only bitfields. */
-static int jim_arc_add_reg_type_struct(Jim_Interp *interp, int argc,
- Jim_Obj * const *argv)
+static COMMAND_HELPER(arc_handle_add_reg_type_struct_opts, struct arc_reg_data_type *type)
{
- struct jim_getopt_info goi;
- JIM_CHECK_RETVAL(jim_getopt_setup(&goi, interp, argc-1, argv+1));
+ struct reg_data_type_struct_field *fields = type->reg_type_struct_field;
+ struct arc_reg_bitfield *bitfields = type->bitfields;
+ struct reg_data_type_struct *struct_type = &type->data_type_struct;
+ unsigned int cur_field = 0;
- LOG_DEBUG("-");
+ while (CMD_ARGC) {
+ const struct nvp *n = nvp_name2value(nvp_add_reg_type_struct_opts, CMD_ARGV[0]);
+ CMD_ARGC--;
+ CMD_ARGV++;
+ switch (n->value) {
+ case CFG_ADD_REG_TYPE_STRUCT_NAME:
+ if (!CMD_ARGC)
+ return ERROR_COMMAND_ARGUMENT_INVALID;
- struct command_context *ctx;
- struct target *target;
+ const char *name = CMD_ARGV[0];
+ CMD_ARGC--;
+ CMD_ARGV++;
- ctx = current_command_context(interp);
- assert(ctx);
- target = get_current_target(ctx);
- if (!target) {
- Jim_SetResultFormatted(goi.interp, "No current target");
- return JIM_ERR;
+ if (strlen(name) >= REG_TYPE_MAX_NAME_LENGTH) {
+ command_print(CMD, "Reg type name is too big.");
+ return ERROR_COMMAND_ARGUMENT_INVALID;
+ }
+
+ strcpy((void *)type->data_type.id, name);
+ break;
+
+ case CFG_ADD_REG_TYPE_STRUCT_BITFIELD:
+ if (CMD_ARGC < 3)
+ return ERROR_COMMAND_ARGUMENT_INVALID;
+
+ uint32_t start_pos, end_pos;
+ const char *field_name = CMD_ARGV[0];
+ COMMAND_PARSE_NUMBER(u32, CMD_ARGV[1], start_pos);
+ COMMAND_PARSE_NUMBER(u32, CMD_ARGV[2], end_pos);
+ CMD_ARGC -= 3;
+ CMD_ARGV += 3;
+ bitfields[cur_field].bitfield.start = start_pos;
+ bitfields[cur_field].bitfield.end = end_pos;
+ bitfields[cur_field].bitfield.type = REG_TYPE_INT;
+
+ if (strlen(field_name) >= REG_TYPE_MAX_NAME_LENGTH) {
+ command_print(CMD, "Reg type field_name is too big.");
+ return ERROR_COMMAND_ARGUMENT_INVALID;
+ }
+
+ fields[cur_field].name = bitfields[cur_field].name;
+ strcpy(bitfields[cur_field].name, field_name);
+
+ fields[cur_field].bitfield = &bitfields[cur_field].bitfield;
+ fields[cur_field].use_bitfields = true;
+ if (cur_field > 0)
+ fields[cur_field - 1].next = &fields[cur_field];
+ else
+ struct_type->fields = fields;
+
+ cur_field += 1;
+
+ break;
+
+ default:
+ nvp_unknown_command_print(CMD, nvp_add_reg_type_struct_opts, NULL, CMD_ARGV[-1]);
+ return ERROR_COMMAND_ARGUMENT_INVALID;
+ }
}
- int e = JIM_OK;
+ if (!type->data_type.id) {
+ command_print(CMD, "-name is a required option");
+ return ERROR_COMMAND_ARGUMENT_INVALID;
+ }
- /* Check if the amount of arguments is not zero */
- if (goi.argc <= 0) {
- Jim_SetResultFormatted(goi.interp, "The command has no arguments");
- return JIM_ERR;
+ return ERROR_OK;
+}
+
+COMMAND_HANDLER(arc_handle_add_reg_type_struct)
+{
+ int retval;
+
+ LOG_DEBUG("-");
+
+ struct target *target = get_current_target(CMD_CTX);
+ if (!target) {
+ command_print(CMD, "No current target");
+ return ERROR_FAIL;
}
+ /* Check if the amount of arguments is not zero */
+ if (CMD_ARGC == 0)
+ return ERROR_COMMAND_SYNTAX_ERROR;
+
/* Estimate number of registers as (argc - 2)/4 as each -bitfield option has 3
* arguments while -name is required. */
- unsigned int fields_sz = (goi.argc - 2) / 4;
- unsigned int cur_field = 0;
+ unsigned int fields_sz = (CMD_ARGC - 2) / 4;
/* The maximum amount of bitfields is 32 */
if (fields_sz > 32) {
- Jim_SetResultFormatted(goi.interp, "The amount of bitfields exceed 32");
- return JIM_ERR;
+ command_print(CMD, "The amount of bitfields exceed 32");
+ return ERROR_COMMAND_ARGUMENT_INVALID;
}
struct arc_reg_data_type *type = calloc(1, sizeof(*type));
- struct reg_data_type_struct *struct_type = &type->data_type_struct;
struct reg_data_type_struct_field *fields = calloc(fields_sz, sizeof(*fields));
- type->reg_type_struct_field = fields;
struct arc_reg_bitfield *bitfields = calloc(fields_sz, sizeof(*bitfields));
- if (!(type && fields && bitfields)) {
- Jim_SetResultFormatted(goi.interp, "Failed to allocate memory.");
+ if (!type || !fields || !bitfields) {
+ LOG_ERROR("Out of memory");
+ retval = ERROR_FAIL;
goto fail;
}
+ struct reg_data_type_struct *struct_type = &type->data_type_struct;
+ type->reg_type_struct_field = fields;
/* Initialize type */
type->data_type.id = type->data_type_id;
@@ -480,91 +499,22 @@ static int jim_arc_add_reg_type_struct(Jim_Interp *interp, int argc,
type->data_type.reg_type_struct = struct_type;
struct_type->size = 4; /* For now ARC has only 32-bit registers */
- while (goi.argc > 0 && e == JIM_OK) {
- struct jim_nvp *n;
- e = jim_getopt_nvp(&goi, nvp_add_reg_type_struct_opts, &n);
- if (e != JIM_OK) {
- jim_getopt_nvp_unknown(&goi, nvp_add_reg_type_struct_opts, 0);
- continue;
- }
-
- switch (n->value) {
- case CFG_ADD_REG_TYPE_STRUCT_NAME:
- {
- const char *name = NULL;
- int name_len = 0;
-
- e = jim_arc_read_reg_name_field(&goi, &name, &name_len);
- if (e != JIM_OK) {
- Jim_SetResultFormatted(goi.interp, "Unable to read reg name.");
- goto fail;
- }
-
- if (name_len > REG_TYPE_MAX_NAME_LENGTH) {
- Jim_SetResultFormatted(goi.interp, "Reg type name is too big.");
- goto fail;
- }
-
- strncpy((void *)type->data_type.id, name, name_len);
- if (!type->data_type.id) {
- Jim_SetResultFormatted(goi.interp, "Unable to setup reg type name.");
- goto fail;
- }
-
- break;
- }
- case CFG_ADD_REG_TYPE_STRUCT_BITFIELD:
- {
- const char *field_name = NULL;
- int field_name_len = 0;
- e = jim_arc_read_reg_type_field(&goi, &field_name, &field_name_len, bitfields,
- cur_field, CFG_ADD_REG_TYPE_STRUCT);
- if (e != JIM_OK) {
- Jim_SetResultFormatted(goi.interp, "Unable to add reg_type_struct field.");
- goto fail;
- }
-
- if (field_name_len > REG_TYPE_MAX_NAME_LENGTH) {
- Jim_SetResultFormatted(goi.interp, "Reg type field_name_len is too big.");
- goto fail;
- }
-
- fields[cur_field].name = bitfields[cur_field].name;
- strncpy(bitfields[cur_field].name, field_name, field_name_len);
- if (!fields[cur_field].name) {
- Jim_SetResultFormatted(goi.interp, "Unable to setup field name. ");
- goto fail;
- }
-
- fields[cur_field].bitfield = &(bitfields[cur_field].bitfield);
- fields[cur_field].use_bitfields = true;
- if (cur_field > 0)
- fields[cur_field - 1].next = &(fields[cur_field]);
- else
- struct_type->fields = fields;
-
- cur_field += 1;
-
- break;
- }
- }
- }
-
- if (!type->data_type.id) {
- Jim_SetResultFormatted(goi.interp, "-name is a required option");
+ retval = CALL_COMMAND_HANDLER(arc_handle_add_reg_type_struct_opts, type);
+ if (retval != ERROR_OK)
goto fail;
- }
arc_reg_data_type_add(target, type);
+
LOG_DEBUG("added struct type {name=%s}", type->data_type.id);
- return JIM_OK;
+
+ return ERROR_OK;
fail:
- free(type);
- free(fields);
- free(bitfields);
+ free(type);
+ free(fields);
+ free(bitfields);
- return JIM_ERR;
+ return retval;
}
/* Add register */
@@ -925,7 +875,7 @@ static const struct command_registration arc_core_command_handlers[] = {
},
{
.name = "add-reg-type-struct",
- .jim_handler = jim_arc_add_reg_type_struct,
+ .handler = arc_handle_add_reg_type_struct,
.mode = COMMAND_CONFIG,
.usage = "-name <string> -bitfield <name> <start> <end> "
"[-bitfield <name> <start> <end>]...",
commit 92ef27494c510a2df7cbbee8b19d5c0d4d943d40
Author: Antonio Borneo <bor...@gm...>
Date: Tue Dec 27 00:28:16 2022 +0100
target: arc: rewrite command 'arc add-reg-type-flags' as COMMAND_HANDLER
Use a COMMAND_HELPER() to avoid memory leaks when the helper
COMMAND_PARSE_NUMBER() returns due to an error.
While there:
- fix potential SIGSEGV due to dereference 'type' before checking
it's not NULL;
- fix an incorrect NUL byte termination while copying to
type->data_type.id and to bitfields[cur_field].name;
- fix some coding style error.
Change-Id: Ide4cbc829871a6a523026ccc0d3100dadc2afd06
Signed-off-by: Antonio Borneo <bor...@gm...>
Reviewed-on: https://review.openocd.org/c/openocd/+/7424
Tested-by: jenkins
Reviewed-by: Evgeniy Didin <di...@sy...>
diff --git a/src/target/arc_cmd.c b/src/target/arc_cmd.c
index fb1817de6..32c62d0ca 100644
--- a/src/target/arc_cmd.c
+++ b/src/target/arc_cmd.c
@@ -13,6 +13,7 @@
#endif
#include "arc.h"
+#include <helper/nvp.h>
/* --------------------------------------------------------------------------
*
@@ -32,7 +33,7 @@ enum add_reg_type_flags {
CFG_ADD_REG_TYPE_FLAGS_FLAG,
};
-static struct jim_nvp nvp_add_reg_type_flags_opts[] = {
+static const struct nvp nvp_add_reg_type_flags_opts[] = {
{ .name = "-name", .value = CFG_ADD_REG_TYPE_FLAGS_NAME },
{ .name = "-flag", .value = CFG_ADD_REG_TYPE_FLAGS_FLAG },
{ .name = NULL, .value = -1 }
@@ -114,53 +115,113 @@ static int jim_arc_read_reg_type_field(struct jim_getopt_info *goi, const char *
return e;
}
-static int jim_arc_add_reg_type_flags(Jim_Interp *interp, int argc,
- Jim_Obj * const *argv)
+static COMMAND_HELPER(arc_handle_add_reg_type_flags_ops, struct arc_reg_data_type *type)
{
- struct jim_getopt_info goi;
- JIM_CHECK_RETVAL(jim_getopt_setup(&goi, interp, argc-1, argv+1));
+ struct reg_data_type_flags_field *fields = type->reg_type_flags_field;
+ struct arc_reg_bitfield *bitfields = type->bitfields;
+ struct reg_data_type_flags *flags = &type->data_type_flags;
+ unsigned int cur_field = 0;
- LOG_DEBUG("-");
+ while (CMD_ARGC) {
+ const struct nvp *n = nvp_name2value(nvp_add_reg_type_flags_opts, CMD_ARGV[0]);
+ CMD_ARGC--;
+ CMD_ARGV++;
+ switch (n->value) {
+ case CFG_ADD_REG_TYPE_FLAGS_NAME:
+ if (!CMD_ARGC)
+ return ERROR_COMMAND_ARGUMENT_INVALID;
- struct command_context *ctx;
- struct target *target;
+ const char *name = CMD_ARGV[0];
+ CMD_ARGC--;
+ CMD_ARGV++;
- ctx = current_command_context(interp);
- assert(ctx);
- target = get_current_target(ctx);
- if (!target) {
- Jim_SetResultFormatted(goi.interp, "No current target");
- return JIM_ERR;
+ if (strlen(name) >= REG_TYPE_MAX_NAME_LENGTH) {
+ command_print(CMD, "Reg type name is too big.");
+ return ERROR_COMMAND_ARGUMENT_INVALID;
+ }
+
+ strcpy((void *)type->data_type.id, name);
+ break;
+
+ case CFG_ADD_REG_TYPE_FLAGS_FLAG:
+ if (CMD_ARGC < 2)
+ return ERROR_COMMAND_ARGUMENT_INVALID;
+
+ uint32_t val;
+ const char *field_name = CMD_ARGV[0];
+ COMMAND_PARSE_NUMBER(u32, CMD_ARGV[1], val);
+ CMD_ARGC -= 2;
+ CMD_ARGV += 2;
+ bitfields[cur_field].bitfield.start = val;
+ bitfields[cur_field].bitfield.end = val;
+
+ if (strlen(field_name) >= REG_TYPE_MAX_NAME_LENGTH) {
+ command_print(CMD, "Reg type field_name is too big.");
+ return ERROR_COMMAND_ARGUMENT_INVALID;
+ }
+
+ fields[cur_field].name = bitfields[cur_field].name;
+ strcpy(bitfields[cur_field].name, field_name);
+
+ fields[cur_field].bitfield = &bitfields[cur_field].bitfield;
+ if (cur_field > 0)
+ fields[cur_field - 1].next = &fields[cur_field];
+ else
+ flags->fields = fields;
+
+ cur_field += 1;
+ break;
+
+ default:
+ nvp_unknown_command_print(CMD, nvp_add_reg_type_flags_opts, NULL, CMD_ARGV[-1]);
+ return ERROR_COMMAND_ARGUMENT_INVALID;
+ }
}
- int e = JIM_OK;
+ if (!type->data_type.id) {
+ command_print(CMD, "-name is a required option");
+ return ERROR_COMMAND_ARGUMENT_INVALID;
+ }
- /* Check if the amount of arguments is not zero */
- if (goi.argc <= 0) {
- Jim_SetResultFormatted(goi.interp, "The command has no arguments");
- return JIM_ERR;
+ return ERROR_OK;
+}
+
+COMMAND_HANDLER(arc_handle_add_reg_type_flags)
+{
+ int retval;
+
+ LOG_DEBUG("-");
+
+ struct target *target = get_current_target(CMD_CTX);
+ if (!target) {
+ command_print(CMD, "No current target");
+ return ERROR_FAIL;
}
+ /* Check if the amount of arguments is not zero */
+ if (CMD_ARGC == 0)
+ return ERROR_COMMAND_SYNTAX_ERROR;
+
/* Estimate number of registers as (argc - 2)/3 as each -flag option has 2
* arguments while -name is required. */
- unsigned int fields_sz = (goi.argc - 2) / 3;
- unsigned int cur_field = 0;
+ unsigned int fields_sz = (CMD_ARGC - 2) / 3;
/* The maximum amount of bitfields is 32 */
if (fields_sz > 32) {
- Jim_SetResultFormatted(goi.interp, "The amount of bitfields exceed 32");
- return JIM_ERR;
+ command_print(CMD, "The amount of bitfields exceed 32");
+ return ERROR_COMMAND_ARGUMENT_INVALID;
}
struct arc_reg_data_type *type = calloc(1, sizeof(*type));
- struct reg_data_type_flags *flags = &type->data_type_flags;
struct reg_data_type_flags_field *fields = calloc(fields_sz, sizeof(*fields));
- type->reg_type_flags_field = fields;
struct arc_reg_bitfield *bitfields = calloc(fields_sz, sizeof(*bitfields));
- if (!(type && fields && bitfields)) {
- Jim_SetResultFormatted(goi.interp, "Failed to allocate memory.");
+ if (!type || !fields || !bitfields) {
+ LOG_ERROR("Out of memory");
+ retval = ERROR_FAIL;
goto fail;
}
+ struct reg_data_type_flags *flags = &type->data_type_flags;
+ type->reg_type_flags_field = fields;
/* Initialize type */
type->bitfields = bitfields;
@@ -170,92 +231,22 @@ static int jim_arc_add_reg_type_flags(Jim_Interp *interp, int argc,
type->data_type.reg_type_flags = flags;
flags->size = 4; /* For now ARC has only 32-bit registers */
- while (goi.argc > 0 && e == JIM_OK) {
- struct jim_nvp *n;
- e = jim_getopt_nvp(&goi, nvp_add_reg_type_flags_opts, &n);
- if (e != JIM_OK) {
- jim_getopt_nvp_unknown(&goi, nvp_add_reg_type_flags_opts, 0);
- continue;
- }
-
- switch (n->value) {
- case CFG_ADD_REG_TYPE_FLAGS_NAME:
- {
- const char *name = NULL;
- int name_len = 0;
-
- e = jim_arc_read_reg_name_field(&goi, &name, &name_len);
- if (e != JIM_OK) {
- Jim_SetResultFormatted(goi.interp, "Unable to read reg name.");
- goto fail;
- }
-
- if (name_len > REG_TYPE_MAX_NAME_LENGTH) {
- Jim_SetResultFormatted(goi.interp, "Reg type name is too big.");
- goto fail;
- }
-
- strncpy((void *)type->data_type.id, name, name_len);
- if (!type->data_type.id) {
- Jim_SetResultFormatted(goi.interp, "Unable to setup reg type name.");
- goto fail;
- }
-
- break;
- }
-
- case CFG_ADD_REG_TYPE_FLAGS_FLAG:
- {
- const char *field_name = NULL;
- int field_name_len = 0;
-
- e = jim_arc_read_reg_type_field(&goi, &field_name, &field_name_len, bitfields,
- cur_field, CFG_ADD_REG_TYPE_FLAG);
- if (e != JIM_OK) {
- Jim_SetResultFormatted(goi.interp, "Unable to add reg_type_flag field.");
- goto fail;
- }
-
- if (field_name_len > REG_TYPE_MAX_NAME_LENGTH) {
- Jim_SetResultFormatted(goi.interp, "Reg type field_name_len is too big.");
- goto fail;
- }
-
- fields[cur_field].name = bitfields[cur_field].name;
- strncpy(bitfields[cur_field].name, field_name, field_name_len);
- if (!fields[cur_field].name) {
- Jim_SetResultFormatted(goi.interp, "Unable to setup field name. ");
- goto fail;
- }
-
- fields[cur_field].bitfield = &(bitfields[cur_field].bitfield);
- if (cur_field > 0)
- fields[cur_field - 1].next = &(fields[cur_field]);
- else
- flags->fields = fields;
-
- cur_field += 1;
- break;
- }
- }
- }
-
- if (!type->data_type.id) {
- Jim_SetResultFormatted(goi.interp, "-name is a required option");
+ retval = CALL_COMMAND_HANDLER(arc_handle_add_reg_type_flags_ops, type);
+ if (retval != ERROR_OK)
goto fail;
- }
arc_reg_data_type_add(target, type);
LOG_DEBUG("added flags type {name=%s}", type->data_type.id);
- return JIM_OK;
+ return ERROR_OK;
+
fail:
free(type);
free(fields);
free(bitfields);
- return JIM_ERR;
+ return retval;
}
/* Add struct register data type */
@@ -924,7 +915,7 @@ static const struct command_registration arc_cache_group_handlers[] = {
static const struct command_registration arc_core_command_handlers[] = {
{
.name = "add-reg-type-flags",
- .jim_handler = jim_arc_add_reg_type_flags,
+ .handler = arc_handle_add_reg_type_flags,
.mode = COMMAND_CONFIG,
.usage = "-name <string> -flag <name> <position> "
"[-flag <name> <position>]...",
-----------------------------------------------------------------------
Summary of changes:
src/target/arc_cmd.c | 435 ++++++++++++++++++++++-----------------------------
1 file changed, 188 insertions(+), 247 deletions(-)
hooks/post-receive
--
Main OpenOCD repository
|
|
From: openocd-gerrit <ope...@us...> - 2023-02-03 22:47:55
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".
The branch, master has been updated
via ea6a99208e1bc41a878234f7220501e26ec4a7f1 (commit)
via 18bafdce615132311fd34f2e1bdf57c193d14097 (commit)
from da76ba610b8e6b05de3a837926d06f8e7d964b97 (commit)
Those revisions listed above that are new to this repository have
not appeared on any other notification email; so we list those
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- Log -----------------------------------------------------------------
commit ea6a99208e1bc41a878234f7220501e26ec4a7f1
Author: Antonio Borneo <bor...@gm...>
Date: Mon Dec 26 21:59:56 2022 +0100
helper: nvp: add openocd nvp files
Long ago jim_nvp was part of jimtcl. When jimtcl dropped it,
OpenOCD kept copy of it in its code base. Current code of jim_nvp
is still related with jimtcl data types and functions.
With the target of better isolating OpenOCD code from jimtcl,
create a new file nvp.c that re-proposes only the core of the old
jim_nvp, dropping any link with jimtcl and removing the string
'jim' either from the filename and from the code.
Keep the same license from the old code, as the new files are
clearly derived from it.
Change-Id: I273448cf1f1484b10f6b6113ed7bb0fcf946482b
Signed-off-by: Antonio Borneo <bor...@gm...>
Reviewed-on: https://review.openocd.org/c/openocd/+/7423
Tested-by: jenkins
Reviewed-by: Evgeniy Didin <di...@sy...>
diff --git a/src/helper/Makefile.am b/src/helper/Makefile.am
index c4c60d96b..e9c05cfc5 100644
--- a/src/helper/Makefile.am
+++ b/src/helper/Makefile.am
@@ -16,6 +16,7 @@ noinst_LTLIBRARIES += %D%/libhelper.la
%D%/util.c \
%D%/jep106.c \
%D%/jim-nvp.c \
+ %D%/nvp.c \
%D%/align.h \
%D%/binarybuffer.h \
%D%/bits.h \
@@ -32,7 +33,8 @@ noinst_LTLIBRARIES += %D%/libhelper.la
%D%/system.h \
%D%/jep106.h \
%D%/jep106.inc \
- %D%/jim-nvp.h
+ %D%/jim-nvp.h \
+ %D%/nvp.h
STARTUP_TCL_SRCS += %D%/startup.tcl
EXTRA_DIST += \
diff --git a/src/helper/nvp.c b/src/helper/nvp.c
new file mode 100644
index 000000000..7a8abc2e2
--- /dev/null
+++ b/src/helper/nvp.c
@@ -0,0 +1,67 @@
+// SPDX-License-Identifier: BSD-2-Clause-Views
+
+/*
+ * Copyright 2005 Salvatore Sanfilippo <an...@in...>
+ * Copyright 2005 Clemens Hintze <c.h...@gm...>
+ * Copyright 2005 patthoyts - Pat Thoyts <pat...@us...>
+ * Copyright 2008 oharboe - Ãyvind Harboe - oyv...@zy...
+ * Copyright 2008 Andrew Lunn <an...@lu...>
+ * Copyright 2008 Duane Ellis <op...@du...>
+ * Copyright 2008 Uwe Klein <uk...@kl...>
+ * Copyright 2008 Steve Bennett <st...@wo...>
+ * Copyright 2009 Nico Coesel <nc...@de...>
+ * Copyright 2009 Zachary T Welch zw...@su...
+ * Copyright 2009 David Brownell
+ * Copyright (c) 2005-2011 Jim Tcl Project. All rights reserved.
+ *
+ * This file is extracted from jim_nvp.c, originally part of jim TCL code.
+ */
+
+#ifdef HAVE_CONFIG_H
+#include "config.h"
+#endif
+
+#include <string.h>
+
+#include <helper/command.h>
+#include <helper/nvp.h>
+
+const struct nvp *nvp_name2value(const struct nvp *p, const char *name)
+{
+ while (p->name) {
+ if (strcmp(name, p->name) == 0)
+ break;
+ p++;
+ }
+ return p;
+}
+
+const struct nvp *nvp_value2name(const struct nvp *p, int value)
+{
+ while (p->name) {
+ if (value == p->value)
+ break;
+ p++;
+ }
+ return p;
+}
+
+void nvp_unknown_command_print(struct command_invocation *cmd, const struct nvp *nvp,
+ const char *param_name, const char *param_value)
+{
+ if (param_name)
+ command_print_sameline(cmd, "%s: Unknown: %s, try one of: ", param_name, param_value);
+ else
+ command_print_sameline(cmd, "Unknown param: %s, try one of: ", param_value);
+
+ while (nvp->name) {
+ if ((nvp + 1)->name)
+ command_print_sameline(cmd, "%s, ", nvp->name);
+ else
+ command_print(cmd, "or %s", nvp->name);
+
+ nvp++;
+ }
+
+ /* We assume nvp to be not empty and loop has been taken; no need to add a '\n' */
+}
diff --git a/src/helper/nvp.h b/src/helper/nvp.h
new file mode 100644
index 000000000..125164e4e
--- /dev/null
+++ b/src/helper/nvp.h
@@ -0,0 +1,75 @@
+/* SPDX-License-Identifier: BSD-2-Clause-Views */
+
+/*
+ * Copyright 2005 Salvatore Sanfilippo <an...@in...>
+ * Copyright 2005 Clemens Hintze <c.h...@gm...>
+ * Copyright 2005 patthoyts - Pat Thoyts <pat...@us...>
+ * Copyright 2008 oharboe - Ãyvind Harboe - oyv...@zy...
+ * Copyright 2008 Andrew Lunn <an...@lu...>
+ * Copyright 2008 Duane Ellis <op...@du...>
+ * Copyright 2008 Uwe Klein <uk...@kl...>
+ * Copyright 2008 Steve Bennett <st...@wo...>
+ * Copyright 2009 Nico Coesel <nc...@de...>
+ * Copyright 2009 Zachary T Welch zw...@su...
+ * Copyright 2009 David Brownell
+ * Copyright (c) 2005-2011 Jim Tcl Project. All rights reserved.
+ *
+ * This file is extracted from jim_nvp.h, originally part of jim TCL code.
+ */
+
+#ifndef OPENOCD_HELPER_NVP_H
+#define OPENOCD_HELPER_NVP_H
+
+/** Name Value Pairs, aka: NVP
+ * - Given a string - return the associated int.
+ * - Given a number - return the associated string.
+ * .
+ *
+ * Very useful when the number is not a simple index into an array of
+ * known string, or there may be multiple strings (aliases) that mean then same
+ * thing.
+ *
+ * An NVP Table is terminated with ".name = NULL".
+ *
+ * During the 'name2value' operation, if no matching string is found
+ * the pointer to the terminal element (with p->name == NULL) is returned.
+ *
+ * Example:
+ * \code
+ * const struct nvp yn[] = {
+ * { "yes", 1 },
+ * { "no" , 0 },
+ * { "yep", 1 },
+ * { "nope", 0 },
+ * { NULL, -1 },
+ * };
+ *
+ * struct nvp *result;
+ * result = nvp_name2value(yn, "yes");
+ * returns &yn[0];
+ * result = nvp_name2value(yn, "no");
+ * returns &yn[1];
+ * result = jim_nvp_name2value(yn, "Blah");
+ * returns &yn[4];
+ * \endcode
+ *
+ * During the number2name operation, the first matching value is returned.
+ */
+
+struct nvp {
+ const char *name;
+ int value;
+};
+
+struct command_invocation;
+
+/* Name Value Pairs Operations */
+const struct nvp *nvp_name2value(const struct nvp *nvp_table, const char *name)
+ __attribute__((returns_nonnull, nonnull(1)));
+const struct nvp *nvp_value2name(const struct nvp *nvp_table, int v)
+ __attribute__((returns_nonnull, nonnull(1)));
+
+void nvp_unknown_command_print(struct command_invocation *cmd, const struct nvp *nvp,
+ const char *param_name, const char *param_value);
+
+#endif /* OPENOCD_HELPER_NVP_H */
commit 18bafdce615132311fd34f2e1bdf57c193d14097
Author: Antonio Borneo <bor...@gm...>
Date: Mon Dec 19 17:20:06 2022 +0100
target: arc: fix error handling in command 'arc set-reg-exists'
The command is specified through COMMAND_HANDLER. It should not
return JIM_OK / JIM_ERR.
Change-Id: I56666414d49b0298ecc23ec7ef30c77e1e27afa8
Signed-off-by: Antonio Borneo <bor...@gm...>
Reviewed-on: https://review.openocd.org/c/openocd/+/7413
Tested-by: jenkins
Reviewed-by: Evgeniy Didin <di...@sy...>
diff --git a/src/target/arc_cmd.c b/src/target/arc_cmd.c
index e7c54446e..fb1817de6 100644
--- a/src/target/arc_cmd.c
+++ b/src/target/arc_cmd.c
@@ -763,7 +763,7 @@ COMMAND_HANDLER(arc_set_reg_exists)
struct target * const target = get_current_target(CMD_CTX);
if (!target) {
command_print(CMD, "Unable to get current target.");
- return JIM_ERR;
+ return ERROR_FAIL;
}
if (!CMD_ARGC) {
@@ -783,7 +783,7 @@ COMMAND_HANDLER(arc_set_reg_exists)
r->exist = true;
}
- return JIM_OK;
+ return ERROR_OK;
}
/* arc reg-field ($reg_name) ($reg_field)
-----------------------------------------------------------------------
Summary of changes:
src/helper/Makefile.am | 4 ++-
src/helper/nvp.c | 67 ++++++++++++++++++++++++++++++++++++++++++++
src/helper/nvp.h | 75 ++++++++++++++++++++++++++++++++++++++++++++++++++
src/target/arc_cmd.c | 4 +--
4 files changed, 147 insertions(+), 3 deletions(-)
create mode 100644 src/helper/nvp.c
create mode 100644 src/helper/nvp.h
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From: openocd-gerrit <ope...@us...> - 2023-02-03 22:47:33
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".
The branch, master has been updated
via da76ba610b8e6b05de3a837926d06f8e7d964b97 (commit)
via 996d6f383dfcffbc4550daedb622d3d006e8cd37 (commit)
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- Log -----------------------------------------------------------------
commit da76ba610b8e6b05de3a837926d06f8e7d964b97
Author: Antonio Borneo <bor...@gm...>
Date: Mon Dec 19 17:14:15 2022 +0100
target: arc: rewrite command 'arc num-actionpoints' as COMMAND_HANDLER
Also drop arc_cmd_jim_get_uint32() that is now unused.
Change-Id: Ic26c3f008376db3f01215bf736fca736dd1c1a4f
Signed-off-by: Antonio Borneo <bor...@gm...>
Reviewed-on: https://review.openocd.org/c/openocd/+/7412
Tested-by: jenkins
Reviewed-by: Evgeniy Didin <di...@sy...>
diff --git a/src/target/arc_cmd.c b/src/target/arc_cmd.c
index 264adc0b5..e7c54446e 100644
--- a/src/target/arc_cmd.c
+++ b/src/target/arc_cmd.c
@@ -22,14 +22,6 @@
* ------------------------------------------------------------------------- */
-static int arc_cmd_jim_get_uint32(struct jim_getopt_info *goi, uint32_t *value)
-{
- jim_wide value_wide;
- JIM_CHECK_RETVAL(jim_getopt_wide(goi, &value_wide));
- *value = (uint32_t)value_wide;
- return JIM_OK;
-}
-
enum add_reg_types {
CFG_ADD_REG_TYPE_FLAG,
CFG_ADD_REG_TYPE_STRUCT,
@@ -863,27 +855,17 @@ COMMAND_HANDLER(arc_l2_cache_disable_auto_cmd)
&arc->has_l2cache, "target has l2 cache enabled");
}
-static int jim_handle_actionpoints_num(Jim_Interp *interp, int argc,
- Jim_Obj * const *argv)
+COMMAND_HANDLER(arc_handle_actionpoints_num)
{
- struct jim_getopt_info goi;
- jim_getopt_setup(&goi, interp, argc - 1, argv + 1);
-
LOG_DEBUG("-");
- if (goi.argc >= 2) {
- Jim_WrongNumArgs(interp, goi.argc, goi.argv, "[<unsigned integer>]");
- return JIM_ERR;
- }
-
- struct command_context *context = current_command_context(interp);
- assert(context);
-
- struct target *target = get_current_target(context);
+ if (CMD_ARGC >= 2)
+ return ERROR_COMMAND_SYNTAX_ERROR;
+ struct target *target = get_current_target(CMD_CTX);
if (!target) {
- Jim_SetResultFormatted(goi.interp, "No current target");
- return JIM_ERR;
+ command_print(CMD, "No current target");
+ return ERROR_FAIL;
}
struct arc_common *arc = target_to_arc(target);
@@ -892,19 +874,19 @@ static int jim_handle_actionpoints_num(Jim_Interp *interp, int argc,
* "actionpoint reset, initiated by arc_set_actionpoints_num. */
uint32_t ap_num = arc->actionpoints_num;
- if (goi.argc == 1) {
- JIM_CHECK_RETVAL(arc_cmd_jim_get_uint32(&goi, &ap_num));
+ if (CMD_ARGC == 1) {
+ COMMAND_PARSE_NUMBER(u32, CMD_ARGV[0], ap_num);
int e = arc_set_actionpoints_num(target, ap_num);
if (e != ERROR_OK) {
- Jim_SetResultFormatted(goi.interp,
+ command_print(CMD,
"Failed to set number of actionpoints");
- return JIM_ERR;
+ return e;
}
}
- Jim_SetResultInt(interp, ap_num);
+ command_print(CMD, "%" PRIu32, ap_num);
- return JIM_OK;
+ return ERROR_OK;
}
/* ----- Exported target commands ------------------------------------------ */
@@ -1004,7 +986,7 @@ static const struct command_registration arc_core_command_handlers[] = {
},
{
.name = "num-actionpoints",
- .jim_handler = jim_handle_actionpoints_num,
+ .handler = arc_handle_actionpoints_num,
.mode = COMMAND_ANY,
.usage = "[<unsigned integer>]",
.help = "Prints or sets amount of actionpoints in the processor.",
commit 996d6f383dfcffbc4550daedb622d3d006e8cd37
Author: Antonio Borneo <bor...@gm...>
Date: Mon Dec 19 17:03:03 2022 +0100
target: arc: rewrite command 'arc get-reg-field' as COMMAND_HANDLER
This also fixes several incorrect return ERROR_xxx from a jim
command.
Change-Id: I34fe3552d3dc344eac67bf504c5d5709b707fdfd
Signed-off-by: Antonio Borneo <bor...@gm...>
Reviewed-on: https://review.openocd.org/c/openocd/+/7411
Tested-by: jenkins
Reviewed-by: Evgeniy Didin <di...@sy...>
diff --git a/src/target/arc_cmd.c b/src/target/arc_cmd.c
index 34ddc6903..264adc0b5 100644
--- a/src/target/arc_cmd.c
+++ b/src/target/arc_cmd.c
@@ -796,59 +796,40 @@ COMMAND_HANDLER(arc_set_reg_exists)
/* arc reg-field ($reg_name) ($reg_field)
* Reads struct type register field */
-static int jim_arc_get_reg_field(Jim_Interp *interp, int argc, Jim_Obj * const *argv)
+COMMAND_HANDLER(arc_handle_get_reg_field)
{
- struct jim_getopt_info goi;
- const char *reg_name, *field_name;
- uint32_t value;
- int retval;
-
- JIM_CHECK_RETVAL(jim_getopt_setup(&goi, interp, argc-1, argv+1));
-
- LOG_DEBUG("Reading register field");
- if (goi.argc != 2) {
- if (!goi.argc)
- Jim_WrongNumArgs(interp, goi.argc, goi.argv, "<regname> <fieldname>");
- else if (goi.argc == 1)
- Jim_WrongNumArgs(interp, goi.argc, goi.argv, "<fieldname>");
- else
- Jim_WrongNumArgs(interp, goi.argc, goi.argv, "<regname> <fieldname>");
+ if (CMD_ARGC != 2)
return ERROR_COMMAND_SYNTAX_ERROR;
- }
-
- JIM_CHECK_RETVAL(jim_getopt_string(&goi, ®_name, NULL));
- JIM_CHECK_RETVAL(jim_getopt_string(&goi, &field_name, NULL));
- assert(reg_name);
- assert(field_name);
- struct command_context * const ctx = current_command_context(interp);
- assert(ctx);
- struct target * const target = get_current_target(ctx);
+ struct target *target = get_current_target(CMD_CTX);
if (!target) {
- Jim_SetResultFormatted(goi.interp, "No current target");
- return JIM_ERR;
+ command_print(CMD, "No current target");
+ return ERROR_FAIL;
}
- retval = arc_reg_get_field(target, reg_name, field_name, &value);
+ const char *reg_name = CMD_ARGV[0];
+ const char *field_name = CMD_ARGV[1];
+ uint32_t value;
+ int retval = arc_reg_get_field(target, reg_name, field_name, &value);
switch (retval) {
case ERROR_OK:
break;
case ERROR_ARC_REGISTER_NOT_FOUND:
- Jim_SetResultFormatted(goi.interp,
+ command_print(CMD,
"Register `%s' has not been found.", reg_name);
return ERROR_COMMAND_ARGUMENT_INVALID;
case ERROR_ARC_REGISTER_IS_NOT_STRUCT:
- Jim_SetResultFormatted(goi.interp,
+ command_print(CMD,
"Register `%s' must have 'struct' type.", reg_name);
return ERROR_COMMAND_ARGUMENT_INVALID;
case ERROR_ARC_REGISTER_FIELD_NOT_FOUND:
- Jim_SetResultFormatted(goi.interp,
+ command_print(CMD,
"Field `%s' has not been found in register `%s'.",
field_name, reg_name);
return ERROR_COMMAND_ARGUMENT_INVALID;
case ERROR_ARC_FIELD_IS_NOT_BITFIELD:
- Jim_SetResultFormatted(goi.interp,
+ command_print(CMD,
"Field `%s' is not a 'bitfield' field in a structure.",
field_name);
return ERROR_COMMAND_ARGUMENT_INVALID;
@@ -857,9 +838,9 @@ static int jim_arc_get_reg_field(Jim_Interp *interp, int argc, Jim_Obj * const *
return retval;
}
- Jim_SetResultInt(interp, value);
+ command_print(CMD, "0x%" PRIx32, value);
- return JIM_OK;
+ return ERROR_OK;
}
COMMAND_HANDLER(arc_l1_cache_disable_auto_cmd)
@@ -1002,7 +983,7 @@ static const struct command_registration arc_core_command_handlers[] = {
},
{
.name = "get-reg-field",
- .jim_handler = jim_arc_get_reg_field,
+ .handler = arc_handle_get_reg_field,
.mode = COMMAND_ANY,
.usage = "<regname> <field_name>",
.help = "Returns value of field in a register with 'struct' type.",
-----------------------------------------------------------------------
Summary of changes:
src/target/arc_cmd.c | 95 ++++++++++++++++------------------------------------
1 file changed, 29 insertions(+), 66 deletions(-)
hooks/post-receive
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Main OpenOCD repository
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From: openocd-gerrit <ope...@us...> - 2023-02-03 22:47:14
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".
The branch, master has been updated
via f0cb5b027238f6beb0bee80a9d385716923ae6eb (commit)
from 16af56f6001782752d23567ca78823e2db9c5828 (commit)
Those revisions listed above that are new to this repository have
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- Log -----------------------------------------------------------------
commit f0cb5b027238f6beb0bee80a9d385716923ae6eb
Author: Antonio Borneo <bor...@gm...>
Date: Mon Dec 19 13:44:00 2022 +0100
target: arc: rewrite command 'arc jtag set-core-reg' as COMMAND_HANDLER
This also fixes an incorrect return ERROR_OK from a jim command.
Change-Id: I72a522645f62b99b313573c8bad6d4f674c5ae53
Signed-off-by: Antonio Borneo <bor...@gm...>
Reviewed-on: https://review.openocd.org/c/openocd/+/7410
Tested-by: jenkins
Reviewed-by: Evgeniy Didin <di...@sy...>
diff --git a/src/target/arc_cmd.c b/src/target/arc_cmd.c
index cede9487b..34ddc6903 100644
--- a/src/target/arc_cmd.c
+++ b/src/target/arc_cmd.c
@@ -363,41 +363,29 @@ COMMAND_HANDLER(arc_handle_get_core_reg)
return ERROR_OK;
}
-static int jim_arc_set_core_reg(Jim_Interp *interp, int argc, Jim_Obj * const *argv)
+COMMAND_HANDLER(arc_handle_set_core_reg)
{
- struct command_context *context;
- struct target *target;
- uint32_t regnum;
- uint32_t value;
-
- struct jim_getopt_info goi;
- JIM_CHECK_RETVAL(jim_getopt_setup(&goi, interp, argc-1, argv+1));
-
- if (goi.argc != 2) {
- Jim_SetResultFormatted(goi.interp,
- "usage: %s <core_reg_num> <core_reg_value>", Jim_GetString(argv[0], NULL));
- return JIM_ERR;
- }
-
- context = current_command_context(interp);
- assert(context);
+ if (CMD_ARGC != 2)
+ return ERROR_COMMAND_SYNTAX_ERROR;
- target = get_current_target(context);
+ struct target *target = get_current_target(CMD_CTX);
if (!target) {
- Jim_SetResultFormatted(goi.interp, "No current target");
- return JIM_ERR;
+ command_print(CMD, "No current target");
+ return ERROR_FAIL;
}
/* Register number */
- JIM_CHECK_RETVAL(arc_cmd_jim_get_uint32(&goi, ®num));
+ uint32_t regnum;
+ COMMAND_PARSE_NUMBER(u32, CMD_ARGV[0], regnum);
if (regnum > CORE_REG_MAX_NUMBER || regnum == ARC_R61 || regnum == ARC_R62) {
- Jim_SetResultFormatted(goi.interp, "Core register number %i "
+ command_print(CMD, "Core register number %i "
"is invalid. Must less then 64 and not 61 and 62.", regnum);
- return JIM_ERR;
+ return ERROR_COMMAND_ARGUMENT_INVALID;
}
/* Register value */
- JIM_CHECK_RETVAL(arc_cmd_jim_get_uint32(&goi, &value));
+ uint32_t value;
+ COMMAND_PARSE_NUMBER(u32, CMD_ARGV[1], value);
struct arc_common *arc = target_to_arc(target);
assert(arc);
@@ -440,7 +428,7 @@ static const struct command_registration arc_jtag_command_group[] = {
},
{
.name = "set-core-reg",
- .jim_handler = jim_arc_set_core_reg,
+ .handler = arc_handle_set_core_reg,
.mode = COMMAND_EXEC,
.help = "Get/Set core register by number. This command does a "
"raw JTAG request that bypasses OpenOCD register cache "
-----------------------------------------------------------------------
Summary of changes:
src/target/arc_cmd.c | 38 +++++++++++++-------------------------
1 file changed, 13 insertions(+), 25 deletions(-)
hooks/post-receive
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Main OpenOCD repository
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From: openocd-gerrit <ope...@us...> - 2023-02-03 22:46:44
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".
The branch, master has been updated
via 16af56f6001782752d23567ca78823e2db9c5828 (commit)
via 551d85b123b38d34e15b4e978250ebdfe7b952f7 (commit)
from 700cdbfac41014d9f3a9c12cbb13f01e59fb53d8 (commit)
Those revisions listed above that are new to this repository have
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- Log -----------------------------------------------------------------
commit 16af56f6001782752d23567ca78823e2db9c5828
Author: Antonio Borneo <bor...@gm...>
Date: Mon Dec 19 13:38:58 2022 +0100
target: arc: rewrite command 'arc jtag get-core-reg' as COMMAND_HANDLER
This also fixes an incorrect return ERROR_OK from a jim command.
Change-Id: I1f9cf5d1dfa38b8a06042b5f54209e6ee2fc4e0e
Signed-off-by: Antonio Borneo <bor...@gm...>
Reviewed-on: https://review.openocd.org/c/openocd/+/7409
Tested-by: jenkins
Reviewed-by: Evgeniy Didin <di...@sy...>
diff --git a/src/target/arc_cmd.c b/src/target/arc_cmd.c
index a6eb14f03..cede9487b 100644
--- a/src/target/arc_cmd.c
+++ b/src/target/arc_cmd.c
@@ -331,45 +331,34 @@ COMMAND_HANDLER(arc_handle_get_aux_reg)
return ERROR_OK;
}
-static int jim_arc_get_core_reg(Jim_Interp *interp, int argc, Jim_Obj * const *argv)
+COMMAND_HANDLER(arc_handle_get_core_reg)
{
- struct command_context *context;
- struct target *target;
- uint32_t regnum;
- uint32_t value;
-
- struct jim_getopt_info goi;
- JIM_CHECK_RETVAL(jim_getopt_setup(&goi, interp, argc-1, argv+1));
-
- if (goi.argc != 1) {
- Jim_SetResultFormatted(goi.interp,
- "usage: %s <core_reg_num>", Jim_GetString(argv[0], NULL));
- return JIM_ERR;
- }
-
- context = current_command_context(interp);
- assert(context);
+ if (CMD_ARGC != 1)
+ return ERROR_COMMAND_SYNTAX_ERROR;
- target = get_current_target(context);
+ struct target *target = get_current_target(CMD_CTX);
if (!target) {
- Jim_SetResultFormatted(goi.interp, "No current target");
- return JIM_ERR;
+ command_print(CMD, "No current target");
+ return ERROR_FAIL;
}
/* Register number */
- JIM_CHECK_RETVAL(arc_cmd_jim_get_uint32(&goi, ®num));
+ uint32_t regnum;
+ COMMAND_PARSE_NUMBER(u32, CMD_ARGV[0], regnum);
if (regnum > CORE_REG_MAX_NUMBER || regnum == ARC_R61 || regnum == ARC_R62) {
- Jim_SetResultFormatted(goi.interp, "Core register number %i "
+ command_print(CMD, "Core register number %i "
"is invalid. Must less then 64 and not 61 and 62.", regnum);
- return JIM_ERR;
+ return ERROR_COMMAND_ARGUMENT_INVALID;
}
struct arc_common *arc = target_to_arc(target);
assert(arc);
/* Read value */
+ uint32_t value;
CHECK_RETVAL(arc_jtag_read_core_reg_one(&arc->jtag_info, regnum, &value));
- Jim_SetResultInt(interp, value);
+
+ command_print(CMD, "0x%" PRIx32, value);
return ERROR_OK;
}
@@ -441,7 +430,7 @@ static const struct command_registration arc_jtag_command_group[] = {
},
{
.name = "get-core-reg",
- .jim_handler = jim_arc_get_core_reg,
+ .handler = arc_handle_get_core_reg,
.mode = COMMAND_EXEC,
.help = "Get/Set core register by number. This command does a "
"raw JTAG request that bypasses OpenOCD register cache "
commit 551d85b123b38d34e15b4e978250ebdfe7b952f7
Author: Antonio Borneo <bor...@gm...>
Date: Mon Dec 19 13:32:56 2022 +0100
target: arc: rewrite command 'arc jtag set-aux-reg' as COMMAND_HANDLER
This also fixes an incorrect return ERROR_OK from a jim command.
Change-Id: Iab9bc7c25181341a632f608a8ef2d8b0bea72520
Signed-off-by: Antonio Borneo <bor...@gm...>
Reviewed-on: https://review.openocd.org/c/openocd/+/7408
Tested-by: jenkins
Reviewed-by: Evgeniy Didin <di...@sy...>
diff --git a/src/target/arc_cmd.c b/src/target/arc_cmd.c
index 56eb0ec2d..a6eb14f03 100644
--- a/src/target/arc_cmd.c
+++ b/src/target/arc_cmd.c
@@ -278,37 +278,24 @@ static struct jim_nvp nvp_add_reg_type_struct_opts[] = {
{ .name = NULL, .value = -1 }
};
-static int jim_arc_set_aux_reg(Jim_Interp *interp, int argc, Jim_Obj * const *argv)
+COMMAND_HANDLER(arc_handle_set_aux_reg)
{
+ if (CMD_ARGC != 2)
+ return ERROR_COMMAND_SYNTAX_ERROR;
- struct command_context *context;
- struct target *target;
- uint32_t regnum;
- uint32_t value;
-
- struct jim_getopt_info goi;
- JIM_CHECK_RETVAL(jim_getopt_setup(&goi, interp, argc-1, argv+1));
-
- if (goi.argc != 2) {
- Jim_SetResultFormatted(goi.interp,
- "usage: %s <aux_reg_num> <aux_reg_value>", Jim_GetString(argv[0], NULL));
- return JIM_ERR;
- }
-
- context = current_command_context(interp);
- assert(context);
-
- target = get_current_target(context);
+ struct target *target = get_current_target(CMD_CTX);
if (!target) {
- Jim_SetResultFormatted(goi.interp, "No current target");
- return JIM_ERR;
+ command_print(CMD, "No current target");
+ return ERROR_FAIL;
}
/* Register number */
- JIM_CHECK_RETVAL(arc_cmd_jim_get_uint32(&goi, ®num));
+ uint32_t regnum;
+ COMMAND_PARSE_NUMBER(u32, CMD_ARGV[0], regnum);
/* Register value */
- JIM_CHECK_RETVAL(arc_cmd_jim_get_uint32(&goi, &value));
+ uint32_t value;
+ COMMAND_PARSE_NUMBER(u32, CMD_ARGV[1], value);
struct arc_common *arc = target_to_arc(target);
assert(arc);
@@ -444,7 +431,7 @@ static const struct command_registration arc_jtag_command_group[] = {
},
{
.name = "set-aux-reg",
- .jim_handler = jim_arc_set_aux_reg,
+ .handler = arc_handle_set_aux_reg,
.mode = COMMAND_EXEC,
.help = "Set AUX register by number. This command does a "
"raw JTAG request that bypasses OpenOCD register cache "
-----------------------------------------------------------------------
Summary of changes:
src/target/arc_cmd.c | 74 ++++++++++++++++++----------------------------------
1 file changed, 25 insertions(+), 49 deletions(-)
hooks/post-receive
--
Main OpenOCD repository
|
|
From: openocd-gerrit <ope...@us...> - 2023-02-03 22:46:20
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".
The branch, master has been updated
via 700cdbfac41014d9f3a9c12cbb13f01e59fb53d8 (commit)
from 9d97cace0e95437137e3c57e40347dfcce39ebc9 (commit)
Those revisions listed above that are new to this repository have
not appeared on any other notification email; so we list those
revisions in full, below.
- Log -----------------------------------------------------------------
commit 700cdbfac41014d9f3a9c12cbb13f01e59fb53d8
Author: Antonio Borneo <bor...@gm...>
Date: Mon Dec 19 13:27:10 2022 +0100
target: arc: rewrite command 'arc jtag get-aux-reg' as COMMAND_HANDLER
This also fixes an incorrect return ERROR_OK from a jim command.
Change-Id: I3c51355e7e05965327ce819a3114e370f2de5249
Signed-off-by: Antonio Borneo <bor...@gm...>
Reviewed-on: https://review.openocd.org/c/openocd/+/7407
Tested-by: jenkins
Reviewed-by: Evgeniy Didin <di...@sy...>
diff --git a/src/target/arc_cmd.c b/src/target/arc_cmd.c
index 7a8004678..56eb0ec2d 100644
--- a/src/target/arc_cmd.c
+++ b/src/target/arc_cmd.c
@@ -318,39 +318,28 @@ static int jim_arc_set_aux_reg(Jim_Interp *interp, int argc, Jim_Obj * const *ar
return ERROR_OK;
}
-static int jim_arc_get_aux_reg(Jim_Interp *interp, int argc, Jim_Obj * const *argv)
+COMMAND_HANDLER(arc_handle_get_aux_reg)
{
- struct command_context *context;
- struct target *target;
- uint32_t regnum;
- uint32_t value;
-
- struct jim_getopt_info goi;
- JIM_CHECK_RETVAL(jim_getopt_setup(&goi, interp, argc-1, argv+1));
-
- if (goi.argc != 1) {
- Jim_SetResultFormatted(goi.interp,
- "usage: %s <aux_reg_num>", Jim_GetString(argv[0], NULL));
- return JIM_ERR;
- }
-
- context = current_command_context(interp);
- assert(context);
+ if (CMD_ARGC != 1)
+ return ERROR_COMMAND_SYNTAX_ERROR;
- target = get_current_target(context);
+ struct target *target = get_current_target(CMD_CTX);
if (!target) {
- Jim_SetResultFormatted(goi.interp, "No current target");
- return JIM_ERR;
+ command_print(CMD, "No current target");
+ return ERROR_FAIL;
}
/* Register number */
- JIM_CHECK_RETVAL(arc_cmd_jim_get_uint32(&goi, ®num));
+ uint32_t regnum;
+ COMMAND_PARSE_NUMBER(u32, CMD_ARGV[0], regnum);
struct arc_common *arc = target_to_arc(target);
assert(arc);
+ uint32_t value;
CHECK_RETVAL(arc_jtag_read_aux_reg_one(&arc->jtag_info, regnum, &value));
- Jim_SetResultInt(interp, value);
+
+ command_print(CMD, "0x%" PRIx32, value);
return ERROR_OK;
}
@@ -445,7 +434,7 @@ static int jim_arc_set_core_reg(Jim_Interp *interp, int argc, Jim_Obj * const *a
static const struct command_registration arc_jtag_command_group[] = {
{
.name = "get-aux-reg",
- .jim_handler = jim_arc_get_aux_reg,
+ .handler = arc_handle_get_aux_reg,
.mode = COMMAND_EXEC,
.help = "Get AUX register by number. This command does a "
"raw JTAG request that bypasses OpenOCD register cache "
-----------------------------------------------------------------------
Summary of changes:
src/target/arc_cmd.c | 35 ++++++++++++-----------------------
1 file changed, 12 insertions(+), 23 deletions(-)
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From: openocd-gerrit <ope...@us...> - 2023-02-03 22:45:55
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".
The branch, master has been updated
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- Log -----------------------------------------------------------------
commit 9d97cace0e95437137e3c57e40347dfcce39ebc9
Author: Daniel Serpell <dan...@gm...>
Date: Tue Jan 24 23:54:43 2023 -0300
flash/nor/spi: Add some zbit flash chips.
I have a RP2020 board from aliexpress that uses the ZB25VQ32 flash, this
allows openocd to correctly identify it with the full flash size.
I also added other models, the datasheets can be found at:
Link: https://datasheet.lcsc.com/lcsc/2203210916_Zbit-Semi-ZB25VQ16ASIG_C2982491.pdf
Link: https://datasheet.lcsc.com/lcsc/2003141132_Zbit-Semi-ZB25VQ32BSIG_C495744.pdf
Link: https://datasheet.lcsc.com/lcsc/2003141132_Zbit-Semi-ZB25VQ64ASIG_C495745.pdf
Link: https://datasheet.lcsc.com/lcsc/2006151421_Zbit-Semi-ZB25VQ128ASIG_C609616.pdf
As noted by Andreas Bolsch, the devices supporting QSPI have different
ID in QPI mode than SPI, so two entries are needed in the table for each
one.
Use 0x0B as qread command, as this does not need the dummy M7-0
parameters.
Signed-off-by: Daniel Serpell <dan...@gm...>
Change-Id: Id99187b1963b02ac1a786b66bb352f5f48ed0ac2
Reviewed-on: https://review.openocd.org/c/openocd/+/7445
Reviewed-by: Andreas Bolsch <hyp...@gm...>
Reviewed-by: Antonio Borneo <bor...@gm...>
Tested-by: jenkins
diff --git a/src/flash/nor/spi.c b/src/flash/nor/spi.c
index 373a9a144..9a606d545 100644
--- a/src/flash/nor/spi.c
+++ b/src/flash/nor/spi.c
@@ -112,6 +112,13 @@ const struct flash_device flash_devices[] = {
FLASH_ID("gd gd25q128c", 0x03, 0xeb, 0x02, 0xd8, 0xc7, 0x001840c8, 0x100, 0x10000, 0x1000000),
FLASH_ID("gd gd25q256c", 0x13, 0x00, 0x12, 0xdc, 0xc7, 0x001940c8, 0x100, 0x10000, 0x2000000),
FLASH_ID("gd gd25q512mc", 0x13, 0x00, 0x12, 0xdc, 0xc7, 0x002040c8, 0x100, 0x10000, 0x4000000),
+ FLASH_ID("zbit zb25vq16", 0x03, 0x00, 0x02, 0xd8, 0xc7, 0x0015605e, 0x100, 0x10000, 0x200000),
+ FLASH_ID("zbit zb25vq32", 0x03, 0x0b, 0x02, 0xd8, 0xc7, 0x0016405e, 0x100, 0x10000, 0x400000),
+ FLASH_ID("zbit zb25vq32", 0x03, 0x0b, 0x02, 0xd8, 0xc7, 0x0016605e, 0x100, 0x10000, 0x400000), /* QPI mode */
+ FLASH_ID("zbit zb25vq64", 0x03, 0x0b, 0x02, 0xd8, 0xc7, 0x0017405e, 0x100, 0x10000, 0x800000),
+ FLASH_ID("zbit zb25vq64", 0x03, 0x0b, 0x02, 0xd8, 0xc7, 0x0017605e, 0x100, 0x10000, 0x800000), /* QPI mode */
+ FLASH_ID("zbit zb25vq128", 0x03, 0x0b, 0x02, 0xd8, 0xc7, 0x0018405e, 0x100, 0x10000, 0x1000000),
+ FLASH_ID("zbit zb25vq128", 0x03, 0x0b, 0x02, 0xd8, 0xc7, 0x0018605e, 0x100, 0x10000, 0x1000000), /* QPI mode */
FLASH_ID("issi is25lq040b", 0x03, 0xeb, 0x02, 0x20, 0xc7, 0x0013409d, 0x100, 0x1000, 0x80000),
FLASH_ID("issi is25lp032", 0x03, 0x00, 0x02, 0xd8, 0xc7, 0x0016609d, 0x100, 0x10000, 0x400000),
FLASH_ID("issi is25lp064", 0x03, 0x00, 0x02, 0xd8, 0xc7, 0x0017609d, 0x100, 0x10000, 0x800000),
-----------------------------------------------------------------------
Summary of changes:
src/flash/nor/spi.c | 7 +++++++
1 file changed, 7 insertions(+)
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From: openocd-gerrit <ope...@us...> - 2023-01-28 15:57:53
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
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- Log -----------------------------------------------------------------
commit 0b6f53e94cd81ee9c85ddc122004fa403b9cc454
Author: Tomas Vanek <va...@fb...>
Date: Sun Oct 2 14:46:11 2022 +0200
tcl/target: add rescue mode to RP2040 config
Integrate a rescue mode inspired by [1].
The current OpenOCD must be restarted before normal work with the RP2040
because the rescue debug port must not be activated (or the target
is reset every 'dap init'). To continue without restarting OpenOCD
we would need to switch off the configured rescue dap.
Change-Id: Ia05b960f06747063550c166e461939d92e232830
Link: [1] https://github.com/raspberrypi/openocd/blob/rp2040/tcl/target/rp2040-rescue.cfg
Signed-off-by: Tomas Vanek <va...@fb...>
Reviewed-on: https://review.openocd.org/c/openocd/+/7327
Reviewed-by: Jonathan Bell <jon...@ra...>
Reviewed-by: Antonio Borneo <bor...@gm...>
Tested-by: jenkins
diff --git a/tcl/target/rp2040.cfg b/tcl/target/rp2040.cfg
index 0593e03ba..de76b4e29 100644
--- a/tcl/target/rp2040.cfg
+++ b/tcl/target/rp2040.cfg
@@ -26,6 +26,13 @@ if { [info exists CPUTAPID] } {
set _CPUTAPID 0x01002927
}
+# Set to '1' to start rescue mode
+if { [info exists RESCUE] } {
+ set _RESCUE $RESCUE
+} else {
+ set _RESCUE 0
+}
+
# Set to '0' or '1' for single core configuration, 'SMP' for -rtos hwthread
# handling of both cores, anything else for isolated debugging of both cores
if { [info exists USE_CORE] } {
@@ -37,6 +44,29 @@ set _BOTH_CORES [expr { $_USE_CORE != 0 && $_USE_CORE != 1 }]
swj_newdap $_CHIPNAME cpu -expected-id $_CPUTAPID
+# The rescue debug port uses the DP CTRL/STAT bit DBGPWRUPREQ to reset the
+# PSM (power on state machine) of the RP2040 with a flag set in the
+# VREG_AND_POR_CHIP_RESET register. Once the reset is released
+# (by clearing the DBGPWRUPREQ flag), the bootrom will run, see this flag,
+# and halt. Allowing the user to load some fresh code, rather than loading
+# the potentially broken code stored in flash
+if { $_RESCUE } {
+ dap create $_CHIPNAME.rescue_dap -chain-position $_CHIPNAME.cpu -dp-id $_CPUTAPID -instance-id 0xf -ignore-syspwrupack
+ init
+
+ # Clear DBGPWRUPREQ
+ $_CHIPNAME.rescue_dap dpreg 0x4 0x00000000
+
+ # Verifying CTRL/STAT is 0
+ set _CTRLSTAT [$_CHIPNAME.rescue_dap dpreg 0x4]
+ if {[expr {$_CTRLSTAT & 0xf0000000}]} {
+ echo "Rescue failed, DP CTRL/STAT readback $_CTRLSTAT"
+ } else {
+ echo "Now restart OpenOCD without RESCUE flag and load code to RP2040"
+ }
+ shutdown
+}
+
# core 0
if { $_USE_CORE != 1 } {
dap create $_CHIPNAME.dap0 -chain-position $_CHIPNAME.cpu -dp-id $_CPUTAPID -instance-id 0
-----------------------------------------------------------------------
Summary of changes:
tcl/target/rp2040.cfg | 30 ++++++++++++++++++++++++++++++
1 file changed, 30 insertions(+)
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From: openocd-gerrit <ope...@us...> - 2023-01-28 15:57:24
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".
The branch, master has been updated
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- Log -----------------------------------------------------------------
commit 4423e05d9df8803e2311e70d5a2ffc55a92e5676
Author: Tomas Vanek <va...@fb...>
Date: Mon Nov 28 10:54:48 2022 +0100
jtag/drivers/jlink: allow SWD multidrop
SW-DPv2 and SWJ-DPv2 devices do not reply to DP_TARGETSEL write cmd.
Ignore the received ACK after TARGETSEL write.
While on it, use swd_ack_to_error_code() for unified error code
translation of the received ACK value for all other commands.
Signed-off-by: Tomas Vanek <va...@fb...>
Change-Id: If978c88c8496e31581175385e59c32faebfd20aa
Reviewed-on: https://review.openocd.org/c/openocd/+/7383
Tested-by: jenkins
Reviewed-by: Antonio Borneo <bor...@gm...>
Reviewed-by: zapb <de...@za...>
diff --git a/src/jtag/drivers/jlink.c b/src/jtag/drivers/jlink.c
index 0a96ac255..243d1a46b 100644
--- a/src/jtag/drivers/jlink.c
+++ b/src/jtag/drivers/jlink.c
@@ -1976,6 +1976,8 @@ struct pending_scan_result {
void *buffer;
/** Offset in the destination buffer */
unsigned buffer_offset;
+ /** SWD command */
+ uint8_t swd_cmd;
};
#define MAX_PENDING_SCAN_RESULTS 256
@@ -2179,12 +2181,13 @@ static int jlink_swd_run_queue(void)
}
for (i = 0; i < pending_scan_results_length; i++) {
+ /* Devices do not reply to DP_TARGETSEL write cmd, ignore received ack */
+ bool check_ack = swd_cmd_returns_ack(pending_scan_results_buffer[i].swd_cmd);
int ack = buf_get_u32(tdo_buffer, pending_scan_results_buffer[i].first, 3);
-
- if (ack != SWD_ACK_OK) {
+ if (check_ack && ack != SWD_ACK_OK) {
LOG_DEBUG("SWD ack not OK: %d %s", ack,
ack == SWD_ACK_WAIT ? "WAIT" : ack == SWD_ACK_FAULT ? "FAULT" : "JUNK");
- queued_retval = ack == SWD_ACK_WAIT ? ERROR_WAIT : ERROR_FAIL;
+ queued_retval = swd_ack_to_error_code(ack);
goto skip;
} else if (pending_scan_results_buffer[i].length) {
uint32_t data = buf_get_u32(tdo_buffer, 3 + pending_scan_results_buffer[i].first, 32);
@@ -2221,6 +2224,7 @@ static void jlink_swd_queue_cmd(uint8_t cmd, uint32_t *dst, uint32_t data, uint3
if (queued_retval != ERROR_OK)
return;
+ pending_scan_results_buffer[pending_scan_results_length].swd_cmd = cmd;
cmd |= SWD_CMD_START | SWD_CMD_PARK;
jlink_queue_data_out(&cmd, 8);
-----------------------------------------------------------------------
Summary of changes:
src/jtag/drivers/jlink.c | 10 +++++++---
1 file changed, 7 insertions(+), 3 deletions(-)
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From: openocd-gerrit <ope...@us...> - 2023-01-28 15:56:10
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".
The branch, master has been updated
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- Log -----------------------------------------------------------------
commit 227577ba7616ca129790090e1101b503f7b9cdb7
Author: Erhan Kurubas <erh...@es...>
Date: Sat Jan 21 12:46:33 2023 +0100
rtos: remove config.h includes from stackings headers
And add its own header to the rtos_xxx_stackings.c
Signed-off-by: Erhan Kurubas <erh...@es...>
Change-Id: I084130fde7ee8645129a7cf60bb7bf59448e2f39
Reviewed-on: https://review.openocd.org/c/openocd/+/7441
Tested-by: jenkins
Reviewed-by: Antonio Borneo <bor...@gm...>
diff --git a/src/rtos/rtos_chibios_stackings.c b/src/rtos/rtos_chibios_stackings.c
index e2fe0a27f..c0816ac3c 100644
--- a/src/rtos/rtos_chibios_stackings.c
+++ b/src/rtos/rtos_chibios_stackings.c
@@ -14,6 +14,7 @@
#include "rtos.h"
#include "target/armv7m.h"
+#include "rtos_chibios_stackings.h"
static const struct stack_register_offset rtos_chibios_arm_v7m_stack_offsets[ARMV7M_NUM_CORE_REGS] = {
{ ARMV7M_R0, -1, 32 }, /* r0 */
diff --git a/src/rtos/rtos_chibios_stackings.h b/src/rtos/rtos_chibios_stackings.h
index 23ad44ae3..e909451e2 100644
--- a/src/rtos/rtos_chibios_stackings.h
+++ b/src/rtos/rtos_chibios_stackings.h
@@ -8,10 +8,6 @@
#ifndef OPENOCD_RTOS_RTOS_CHIBIOS_STACKINGS_H
#define OPENOCD_RTOS_RTOS_CHIBIOS_STACKINGS_H
-#ifdef HAVE_CONFIG_H
-#include "config.h"
-#endif
-
#include "rtos.h"
extern const struct rtos_register_stacking rtos_chibios_arm_v7m_stacking;
diff --git a/src/rtos/rtos_ecos_stackings.c b/src/rtos/rtos_ecos_stackings.c
index 86e176507..cae271270 100644
--- a/src/rtos/rtos_ecos_stackings.c
+++ b/src/rtos/rtos_ecos_stackings.c
@@ -5,8 +5,9 @@
#endif
#include "rtos.h"
-#include "rtos_standard_stackings.h"
#include "target/armv7m.h"
+#include "rtos_standard_stackings.h"
+#include "rtos_ecos_stackings.h"
/* For Cortex-M eCos applications the actual thread context register layout can
* be different between active threads of an application depending on whether
diff --git a/src/rtos/rtos_ecos_stackings.h b/src/rtos/rtos_ecos_stackings.h
index 0375e2d1c..a6bcf1acb 100644
--- a/src/rtos/rtos_ecos_stackings.h
+++ b/src/rtos/rtos_ecos_stackings.h
@@ -3,10 +3,6 @@
#ifndef OPENOCD_RTOS_RTOS_ECOS_STACKINGS_H
#define OPENOCD_RTOS_RTOS_ECOS_STACKINGS_H
-#ifdef HAVE_CONFIG_H
-#include "config.h"
-#endif
-
#include "rtos.h"
extern const struct rtos_register_stacking rtos_ecos_cortex_m3_stacking;
diff --git a/src/rtos/rtos_embkernel_stackings.c b/src/rtos/rtos_embkernel_stackings.c
index 809b622e0..b98628a13 100644
--- a/src/rtos/rtos_embkernel_stackings.c
+++ b/src/rtos/rtos_embkernel_stackings.c
@@ -12,6 +12,7 @@
#include "rtos.h"
#include "target/armv7m.h"
#include "rtos_standard_stackings.h"
+#include "rtos_embkernel_stackings.h"
static const struct stack_register_offset rtos_embkernel_cortex_m_stack_offsets[ARMV7M_NUM_CORE_REGS] = {
{ ARMV7M_R0, 0x24, 32 }, /* r0 */
diff --git a/src/rtos/rtos_embkernel_stackings.h b/src/rtos/rtos_embkernel_stackings.h
index 972bce66d..87bd0e73b 100644
--- a/src/rtos/rtos_embkernel_stackings.h
+++ b/src/rtos/rtos_embkernel_stackings.h
@@ -8,10 +8,6 @@
#ifndef OPENOCD_RTOS_RTOS_EMBKERNEL_STACKINGS_H
#define OPENOCD_RTOS_RTOS_EMBKERNEL_STACKINGS_H
-#ifdef HAVE_CONFIG_H
-#include "config.h"
-#endif
-
#include "rtos.h"
extern const struct rtos_register_stacking rtos_embkernel_cortex_m_stacking;
diff --git a/src/rtos/rtos_mqx_stackings.c b/src/rtos/rtos_mqx_stackings.c
index 8c8fd2053..5ab743bf3 100644
--- a/src/rtos/rtos_mqx_stackings.c
+++ b/src/rtos/rtos_mqx_stackings.c
@@ -11,7 +11,7 @@
#include "rtos.h"
#include "target/armv7m.h"
-
+#include "rtos_mqx_stackings.h"
/*
* standard exception stack
diff --git a/src/rtos/rtos_mqx_stackings.h b/src/rtos/rtos_mqx_stackings.h
index f86c05a40..faa741de6 100644
--- a/src/rtos/rtos_mqx_stackings.h
+++ b/src/rtos/rtos_mqx_stackings.h
@@ -8,10 +8,6 @@
#ifndef OPENOCD_RTOS_RTOS_MQX_STACKINGS_H
#define OPENOCD_RTOS_RTOS_MQX_STACKINGS_H
-#ifdef HAVE_CONFIG_H
-#include "config.h"
-#endif
-
#include "rtos.h"
extern const struct rtos_register_stacking rtos_mqx_arm_v7m_stacking;
diff --git a/src/rtos/rtos_riot_stackings.c b/src/rtos/rtos_riot_stackings.c
index e717e8cfe..e46762168 100644
--- a/src/rtos/rtos_riot_stackings.c
+++ b/src/rtos/rtos_riot_stackings.c
@@ -12,6 +12,7 @@
#include "rtos.h"
#include "target/armv7m.h"
#include "rtos_standard_stackings.h"
+#include "rtos_riot_stackings.h"
/* This works for the M0 and M34 stackings as xPSR is in a fixed
* location
diff --git a/src/rtos/rtos_riot_stackings.h b/src/rtos/rtos_riot_stackings.h
index 3b6c5f41c..ebd533756 100644
--- a/src/rtos/rtos_riot_stackings.h
+++ b/src/rtos/rtos_riot_stackings.h
@@ -8,14 +8,9 @@
#ifndef OPENOCD_RTOS_RTOS_RIOT_STACKINGS_H
#define OPENOCD_RTOS_RTOS_RIOT_STACKINGS_H
-#ifdef HAVE_CONFIG_H
-#include "config.h"
-#endif
-
#include "rtos.h"
extern const struct rtos_register_stacking rtos_riot_cortex_m0_stacking;
extern const struct rtos_register_stacking rtos_riot_cortex_m34_stacking;
#endif /* OPENOCD_RTOS_RTOS_RIOT_STACKINGS_H */
-
diff --git a/src/rtos/rtos_standard_stackings.c b/src/rtos/rtos_standard_stackings.c
index f83f0a1fb..5478080cf 100644
--- a/src/rtos/rtos_standard_stackings.c
+++ b/src/rtos/rtos_standard_stackings.c
@@ -11,6 +11,7 @@
#include "rtos.h"
#include "target/armv7m.h"
+#include "rtos_standard_stackings.h"
static const struct stack_register_offset rtos_standard_cortex_m3_stack_offsets[ARMV7M_NUM_CORE_REGS] = {
{ ARMV7M_R0, 0x20, 32 }, /* r0 */
diff --git a/src/rtos/rtos_standard_stackings.h b/src/rtos/rtos_standard_stackings.h
index 2477fffd1..99fbe07e4 100644
--- a/src/rtos/rtos_standard_stackings.h
+++ b/src/rtos/rtos_standard_stackings.h
@@ -8,10 +8,6 @@
#ifndef OPENOCD_RTOS_RTOS_STANDARD_STACKINGS_H
#define OPENOCD_RTOS_RTOS_STANDARD_STACKINGS_H
-#ifdef HAVE_CONFIG_H
-#include "config.h"
-#endif
-
#include "rtos.h"
extern const struct rtos_register_stacking rtos_standard_cortex_m3_stacking;
diff --git a/src/rtos/rtos_ucos_iii_stackings.c b/src/rtos/rtos_ucos_iii_stackings.c
index 9ba5288bf..f1e248231 100644
--- a/src/rtos/rtos_ucos_iii_stackings.c
+++ b/src/rtos/rtos_ucos_iii_stackings.c
@@ -9,11 +9,11 @@
#include "config.h"
#endif
-#include <helper/types.h>
-#include <rtos/rtos.h>
-#include <rtos/rtos_standard_stackings.h>
-#include <target/armv7m.h>
-#include <target/esirisc.h>
+#include "rtos.h"
+#include "target/armv7m.h"
+#include "target/esirisc.h"
+#include "rtos_standard_stackings.h"
+#include "rtos_ucos_iii_stackings.h"
static const struct stack_register_offset rtos_ucos_iii_cortex_m_stack_offsets[] = {
{ ARMV7M_R0, 0x20, 32 }, /* r0 */
diff --git a/src/rtos/rtos_ucos_iii_stackings.h b/src/rtos/rtos_ucos_iii_stackings.h
index 831c68e1c..dfe60b27b 100644
--- a/src/rtos/rtos_ucos_iii_stackings.h
+++ b/src/rtos/rtos_ucos_iii_stackings.h
@@ -8,11 +8,7 @@
#ifndef OPENOCD_RTOS_RTOS_UCOS_III_STACKINGS_H
#define OPENOCD_RTOS_RTOS_UCOS_III_STACKINGS_H
-#ifdef HAVE_CONFIG_H
-#include "config.h"
-#endif
-
-#include <rtos/rtos.h>
+#include "rtos.h"
extern const struct rtos_register_stacking rtos_ucos_iii_cortex_m_stacking;
extern const struct rtos_register_stacking rtos_ucos_iii_esi_risc_stacking;
-----------------------------------------------------------------------
Summary of changes:
src/rtos/rtos_chibios_stackings.c | 1 +
src/rtos/rtos_chibios_stackings.h | 4 ----
src/rtos/rtos_ecos_stackings.c | 3 ++-
src/rtos/rtos_ecos_stackings.h | 4 ----
src/rtos/rtos_embkernel_stackings.c | 1 +
src/rtos/rtos_embkernel_stackings.h | 4 ----
src/rtos/rtos_mqx_stackings.c | 2 +-
src/rtos/rtos_mqx_stackings.h | 4 ----
src/rtos/rtos_riot_stackings.c | 1 +
src/rtos/rtos_riot_stackings.h | 5 -----
src/rtos/rtos_standard_stackings.c | 1 +
src/rtos/rtos_standard_stackings.h | 4 ----
src/rtos/rtos_ucos_iii_stackings.c | 10 +++++-----
src/rtos/rtos_ucos_iii_stackings.h | 6 +-----
14 files changed, 13 insertions(+), 37 deletions(-)
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From: openocd-gerrit <ope...@us...> - 2023-01-28 15:55:48
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- Log -----------------------------------------------------------------
commit bec6c0eb094fb7ca1752688118f41193dc83e026
Author: Tomas Vanek <va...@fb...>
Date: Fri Oct 14 11:16:58 2022 +0200
tcl/interface: universal config for all Raspberry Pi models
Speed calibration coeffs are computed from cpufreq/scaling_max_freq
and from the device-tree compatibility information.
Raspberry Pi linux offers /dev/gpiomem for non-root access
to the GPIO registers since ~2016.
Do not configure 'bcm2835gpio peripheral_base' as it is necessary
only if /dev/mem is used - it requires running OpenOCD as root
- it's a security risk so it should be avoided.
The configuration of the GPIO connector (40-pin header)
is factored out and ready to use in interface configuration
for other driver (e.g. linux gpiod).
Mark raspberrypi2-native.cfg as deprecated and redirect
it to raspberrypi-native.cfg
Change-Id: Icce856fb660b45374e94174da279feb51f529908
Signed-off-by: Tomas Vanek <va...@fb...>
Reviewed-on: https://review.openocd.org/c/openocd/+/7264
Tested-by: jenkins
Reviewed-by: Jonathan Bell <jon...@ra...>
Reviewed-by: Antonio Borneo <bor...@gm...>
diff --git a/tcl/interface/raspberrypi-native.cfg b/tcl/interface/raspberrypi-gpio-connector.cfg
similarity index 56%
copy from tcl/interface/raspberrypi-native.cfg
copy to tcl/interface/raspberrypi-gpio-connector.cfg
index 02a356350..eff73fc92 100644
--- a/tcl/interface/raspberrypi-native.cfg
+++ b/tcl/interface/raspberrypi-gpio-connector.cfg
@@ -1,35 +1,33 @@
# SPDX-License-Identifier: GPL-2.0-or-later
#
-# Config for using Raspberry Pi's expansion header
+# Config for Raspberry Pi GPIO header
#
# This is best used with a fast enough buffer but also
# is suitable for direct connection if the target voltage
# matches RPi's 3.3V and the cable is short enough.
#
-# Do not forget the GND connection, pin 6 of the expansion header.
+# Do not forget the GND connection, e.g. pin 20 of the GPIO header.
#
-adapter driver bcm2835gpio
-
-bcm2835gpio peripheral_base 0x20000000
-
-# Transition delay calculation: SPEED_COEFF/khz - SPEED_OFFSET
-# These depend on system clock, calibrated for stock 700MHz
-# bcm2835gpio speed SPEED_COEFF SPEED_OFFSET
-bcm2835gpio speed_coeffs 113714 28
+# GPIO 25 (pin 22) previously used for TMS/SWDIO is pulled-down by default.
+# The JTAG/SWD specification requires pull-up at the target board
+# for either signal. Connecting the signal pulled-up on the target
+# to the pull-down on the adapter is not a good idea.
+# GPIO 8 is pulled-up by default.
+echo "Warn : TMS/SWDIO moved to GPIO 8 (pin 24). Check the wiring please!"
# Each of the JTAG lines need a gpio number set: tck tms tdi tdo
-# Header pin numbers: 23 22 19 21
+# Header pin numbers: 23 24 19 21
adapter gpio tck -chip 0 11
-adapter gpio tms -chip 0 25
+adapter gpio tms -chip 0 8
adapter gpio tdi -chip 0 10
adapter gpio tdo -chip 0 9
# Each of the SWD lines need a gpio number set: swclk swdio
-# Header pin numbers: 23 22
+# Header pin numbers: 23 24
adapter gpio swclk -chip 0 11
-adapter gpio swdio -chip 0 25
+adapter gpio swdio -chip 0 8
# If you define trst or srst, use appropriate reset_config
# Header pin numbers: TRST - 26, SRST - 18
diff --git a/tcl/interface/raspberrypi-native.cfg b/tcl/interface/raspberrypi-native.cfg
index 02a356350..95426c226 100644
--- a/tcl/interface/raspberrypi-native.cfg
+++ b/tcl/interface/raspberrypi-native.cfg
@@ -1,44 +1,71 @@
# SPDX-License-Identifier: GPL-2.0-or-later
-#
-# Config for using Raspberry Pi's expansion header
-#
-# This is best used with a fast enough buffer but also
-# is suitable for direct connection if the target voltage
-# matches RPi's 3.3V and the cable is short enough.
-#
-# Do not forget the GND connection, pin 6 of the expansion header.
-#
+# Config for Raspberry Pi used as a bitbang adapter.
+# https://www.raspberrypi.com/documentation/computers/raspberry-pi.html
+
+# Supports all models with 40-pin or 26-pin GPIO connector up to Raspberry Pi 4 B
+# also supports Raspberry Pi Zero, Zero W and Zero 2 W.
+
+# Adapter speed calibration is computed from cpufreq/scaling_max_freq.
+# Adjusts automatically if CPU is overclocked.
adapter driver bcm2835gpio
-bcm2835gpio peripheral_base 0x20000000
+proc read_file { name } {
+ if {[catch {open $name r} fd]} {
+ return ""
+ }
+ set result [read $fd]
+ close $fd
+ return $result
+}
-# Transition delay calculation: SPEED_COEFF/khz - SPEED_OFFSET
-# These depend on system clock, calibrated for stock 700MHz
-# bcm2835gpio speed SPEED_COEFF SPEED_OFFSET
-bcm2835gpio speed_coeffs 113714 28
+proc measure_clock {} {
+ set result [exec vcgencmd measure_clock arm]
+ set clock_hz [lindex [split $result "="] 1]
+ expr { $clock_hz / 1000 }
+}
+
+proc get_max_cpu_clock { default } {
+ set clock [read_file /sys/devices/system/cpu/cpu0/cpufreq/scaling_max_freq]
+ if { $clock > 100000 } {
+ return $clock
+ }
-# Each of the JTAG lines need a gpio number set: tck tms tdi tdo
-# Header pin numbers: 23 22 19 21
-adapter gpio tck -chip 0 11
-adapter gpio tms -chip 0 25
-adapter gpio tdi -chip 0 10
-adapter gpio tdo -chip 0 9
+ # cpufreq not available. As the last resort try Broadcom's proprietary utility
+ if {![catch measure_clock clock] && $clock > 100000} {
+ return $clock
+ }
-# Each of the SWD lines need a gpio number set: swclk swdio
-# Header pin numbers: 23 22
-adapter gpio swclk -chip 0 11
-adapter gpio swdio -chip 0 25
+ echo "WARNING: Host CPU clock unknown."
+ echo "WARNING: Using the highest possible value $default kHz as a safe default."
+ echo "WARNING: Expect JTAG/SWD clock significantly slower than requested."
-# If you define trst or srst, use appropriate reset_config
-# Header pin numbers: TRST - 26, SRST - 18
+ return $default
+}
-# adapter gpio trst -chip 0 7
-# reset_config trst_only
+set compat [read_file /proc/device-tree/compatible]
+set clocks_per_timing_loop 4
-# adapter gpio srst -chip 0 24
-# reset_config srst_only srst_push_pull
+if {[string match *bcm2711* $compat]} {
+ set speed_offset 52
+} elseif {[string match *bcm2837* $compat] || [string match *bcm2710* $compat]} {
+ set speed_offset 34
+} elseif {[string match *bcm2836* $compat] || [string match *bcm2709* $compat]} {
+ set speed_offset 36
+} elseif {[string match *bcm2835* $compat] || [string match *bcm2708* $compat]} {
+ set clocks_per_timing_loop 6
+ set speed_offset 32
+} else {
+ set speed_offset 32
+ echo "WARNING: Unknown type of the host SoC. Expect JTAG/SWD clock slower than requested."
+}
+
+set clock [get_max_cpu_clock 2000000]
+set speed_coeff [expr { $clock / $clocks_per_timing_loop }]
+
+# Transition delay calculation: SPEED_COEFF/khz - SPEED_OFFSET
+# The coefficients depend on system clock and CPU frequency scaling.
+bcm2835gpio speed_coeffs $speed_coeff $speed_offset
-# or if you have both connected,
-# reset_config trst_and_srst srst_push_pull
+source raspberrypi-gpio-connector.cfg
diff --git a/tcl/interface/raspberrypi2-native.cfg b/tcl/interface/raspberrypi2-native.cfg
index d5edded0f..fe9186f23 100644
--- a/tcl/interface/raspberrypi2-native.cfg
+++ b/tcl/interface/raspberrypi2-native.cfg
@@ -1,44 +1,6 @@
# SPDX-License-Identifier: GPL-2.0-or-later
-#
-# Config for using Raspberry Pi's expansion header
-#
-# This is best used with a fast enough buffer but also
-# is suitable for direct connection if the target voltage
-# matches RPi's 3.3V and the cable is short enough.
-#
-# Do not forget the GND connection, pin 6 of the expansion header.
-#
+echo "WARNING: interface/raspberrypi2-native.cfg is deprecated."
+echo "WARNING: Please use interface/raspberrypi-native.cfg for all Raspberry Pi models."
-adapter driver bcm2835gpio
-
-bcm2835gpio peripheral_base 0x3F000000
-
-# Transition delay calculation: SPEED_COEFF/khz - SPEED_OFFSET
-# These depend on system clock, calibrated for scaling_max_freq 900MHz
-# bcm2835gpio speed SPEED_COEFF SPEED_OFFSET
-bcm2835gpio speed_coeffs 225000 36
-
-# Each of the JTAG lines need a gpio number set: tck tms tdi tdo
-# Header pin numbers: 23 22 19 21
-adapter gpio tck -chip 0 11
-adapter gpio tms -chip 0 25
-adapter gpio tdi -chip 0 10
-adapter gpio tdo -chip 0 9
-
-# Each of the SWD lines need a gpio number set: swclk swdio
-# Header pin numbers: 23 22
-adapter gpio swclk -chip 0 11
-adapter gpio swdio -chip 0 25
-
-# If you define trst or srst, use appropriate reset_config
-# Header pin numbers: TRST - 26, SRST - 18
-
-# adapter gpio trst -chip 0 7
-# reset_config trst_only
-
-# adapter gpio srst -chip 0 24
-# reset_config srst_only srst_push_pull
-
-# or if you have both connected,
-# reset_config trst_and_srst srst_push_pull
+source [find interface/raspberrypi-native.cfg]
-----------------------------------------------------------------------
Summary of changes:
...2-native.cfg => raspberrypi-gpio-connector.cfg} | 26 +++----
tcl/interface/raspberrypi-native.cfg | 91 ++++++++++++++--------
tcl/interface/raspberrypi2-native.cfg | 44 +----------
3 files changed, 74 insertions(+), 87 deletions(-)
copy tcl/interface/{raspberrypi2-native.cfg => raspberrypi-gpio-connector.cfg} (56%)
hooks/post-receive
--
Main OpenOCD repository
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|
From: openocd-gerrit <ope...@us...> - 2023-01-28 15:54:45
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".
The branch, master has been updated
via 2dde7e914b429ffa5bc56faa20fb474ca451412e (commit)
via b4dd8dbc37daf073bf6481fdc7f0f9d7f2e96809 (commit)
from 148bc7e2151740527b4ca67d0a7c7c9f01725981 (commit)
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- Log -----------------------------------------------------------------
commit 2dde7e914b429ffa5bc56faa20fb474ca451412e
Author: Tomas Vanek <va...@fb...>
Date: Thu Oct 13 22:33:12 2022 +0200
jtag/drivers/bcm2835gpio: refactor delays to inline function
No functional change, the delay is unchanged.
Change-Id: I5b5e837d741ac01fc573657357c5fe61ad901319
Signed-off-by: Tomas Vanek <va...@fb...>
Reviewed-on: https://review.openocd.org/c/openocd/+/7262
Tested-by: jenkins
Reviewed-by: Antonio Borneo <bor...@gm...>
diff --git a/src/jtag/drivers/bcm2835gpio.c b/src/jtag/drivers/bcm2835gpio.c
index 320baba09..635d9a5ff 100644
--- a/src/jtag/drivers/bcm2835gpio.c
+++ b/src/jtag/drivers/bcm2835gpio.c
@@ -66,6 +66,12 @@ static inline void bcm2835_gpio_synchronize(void)
__sync_synchronize();
}
+static inline void bcm2835_delay(void)
+{
+ for (unsigned int i = 0; i < jtag_delay; i++)
+ asm volatile ("");
+}
+
static bool is_gpio_config_valid(enum adapter_gpio_config_index idx)
{
/* Only chip 0 is supported, accept unset value (-1) too */
@@ -178,8 +184,7 @@ static int bcm2835gpio_write(int tck, int tms, int tdi)
GPIO_CLR = clear;
bcm2835_gpio_synchronize();
- for (unsigned int i = 0; i < jtag_delay; i++)
- asm volatile ("");
+ bcm2835_delay();
return ERROR_OK;
}
@@ -199,8 +204,7 @@ static int bcm2835gpio_swd_write_fast(int swclk, int swdio)
GPIO_CLR = clear;
bcm2835_gpio_synchronize();
- for (unsigned int i = 0; i < jtag_delay; i++)
- asm volatile ("");
+ bcm2835_delay();
return ERROR_OK;
}
@@ -211,8 +215,7 @@ static int bcm2835gpio_swd_write_generic(int swclk, int swdio)
set_gpio_value(&adapter_gpio_config[ADAPTER_GPIO_IDX_SWDIO], swdio);
set_gpio_value(&adapter_gpio_config[ADAPTER_GPIO_IDX_SWCLK], swclk); /* Write clock last */
- for (unsigned int i = 0; i < jtag_delay; ++i)
- asm volatile ("");
+ bcm2835_delay();
return ERROR_OK;
}
commit b4dd8dbc37daf073bf6481fdc7f0f9d7f2e96809
Author: Tomas Vanek <va...@fb...>
Date: Thu Oct 13 16:46:31 2022 +0200
jtag/drivers/bcm2835gpio: use rounding in delay math
After setting adapter speed to some values, the driver
shows the real speed little bit higher.
Although it does not impose a problem from technical point
of view because the difference is smaller than usual speed error,
it looks at least strange to the user. The documentation reads
that real frequency should be same or lower than requested.
Use proper rounding in speed -> delay and delay -> speed
conversions.
Change-Id: I1831112cc58681875548d2aeb688391fb79fa37f
Signed-off-by: Tomas Vanek <va...@fb...>
Reviewed-on: https://review.openocd.org/c/openocd/+/7261
Tested-by: jenkins
Reviewed-by: Jonathan Bell <jon...@ra...>
Reviewed-by: Antonio Borneo <bor...@gm...>
diff --git a/src/jtag/drivers/bcm2835gpio.c b/src/jtag/drivers/bcm2835gpio.c
index 5aa1a99e4..320baba09 100644
--- a/src/jtag/drivers/bcm2835gpio.c
+++ b/src/jtag/drivers/bcm2835gpio.c
@@ -264,7 +264,8 @@ static int bcm2835gpio_khz(int khz, int *jtag_speed)
LOG_DEBUG("BCM2835 GPIO: RCLK not supported");
return ERROR_FAIL;
}
- *jtag_speed = speed_coeff/khz - speed_offset;
+ *jtag_speed = DIV_ROUND_UP(speed_coeff, khz) - speed_offset;
+ LOG_DEBUG("jtag_delay %d", *jtag_speed);
if (*jtag_speed < 0)
*jtag_speed = 0;
return ERROR_OK;
@@ -272,7 +273,9 @@ static int bcm2835gpio_khz(int khz, int *jtag_speed)
static int bcm2835gpio_speed_div(int speed, int *khz)
{
- *khz = speed_coeff/(speed + speed_offset);
+ int divisor = speed + speed_offset;
+ /* divide with roundig to the closest */
+ *khz = (speed_coeff + divisor / 2) / divisor;
return ERROR_OK;
}
-----------------------------------------------------------------------
Summary of changes:
src/jtag/drivers/bcm2835gpio.c | 22 ++++++++++++++--------
1 file changed, 14 insertions(+), 8 deletions(-)
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From: openocd-gerrit <ope...@us...> - 2023-01-28 15:53:51
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".
The branch, master has been updated
via 148bc7e2151740527b4ca67d0a7c7c9f01725981 (commit)
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- Log -----------------------------------------------------------------
commit 148bc7e2151740527b4ca67d0a7c7c9f01725981
Author: Tomas Vanek <va...@fb...>
Date: Fri Oct 14 09:19:29 2022 +0200
jtag/drivers/bitbang: avoid mostly harmless glitch on SWDIO
bitbang_swd_exchange(rnw=true,...) calls bitbang_interface->swd_write()
with swdio clamped to 0.
bitbang_swd_write_reg() reads 1 turnaround bit, 3 ack bits
and 1 turnaround by one call to bitbang_swd_exchange()
and then switches SWDIO to output.
AFAIK all bitbang interfaces switch SWDIO GPIO direction immediately
in bitbang_interface->swdio_drive().
The GPIO now drives SWDIO line to the value stored in the output register
which is always zero from previous bitbang_swd_exchange(rnw=true,...).
In case the following data bit (bit 0) is 1 we can observe a glitch
on SWDIO:
_____ out 1 ____
HiZ/pull-up ----\ /
\ /
\______ out 0 ______/
swdio_drive(true) swd_write(0,1)
The glitch fortunately takes place far enough from SWCLK rising edge
where SWDIO is sampled by the target, so I believe it is harmless
except some corner cases where the reflected wave is delayed on long
line.
Anyway keeping electrical signals glitch free is a good practice.
To keep performance penalty minimal, pre-write the first data
bit to SWDIO GPIO output buffer while clocking the turnaround bit.
Following swdio_drive(true) outputs the pre-written value
and the same value is rewritten by the next swd_write()
instead of glitching SWDIO.
Change-Id: I72ea9c0b2fae57e8ff5aa616859182c67abc924f
Signed-off-by: Tomas Vanek <va...@fb...>
Reviewed-on: https://review.openocd.org/c/openocd/+/7260
Tested-by: jenkins
Reviewed-by: Antonio Borneo <bor...@gm...>
diff --git a/src/jtag/drivers/bitbang.c b/src/jtag/drivers/bitbang.c
index 2ab0a2a76..665dbf329 100644
--- a/src/jtag/drivers/bitbang.c
+++ b/src/jtag/drivers/bitbang.c
@@ -525,7 +525,19 @@ static void bitbang_swd_write_reg(uint8_t cmd, uint32_t value, uint32_t ap_delay
bitbang_swd_exchange(false, &cmd, 0, 8);
bitbang_interface->swdio_drive(false);
- bitbang_swd_exchange(true, trn_ack_data_parity_trn, 0, 1 + 3 + 1);
+ bitbang_swd_exchange(true, trn_ack_data_parity_trn, 0, 1 + 3);
+
+ /* Avoid a glitch on SWDIO when changing the direction to output.
+ * To keep performance penalty minimal, pre-write the first data
+ * bit to SWDIO GPIO output buffer while clocking the turnaround bit.
+ * Following swdio_drive(true) outputs the pre-written value
+ * and the same value is rewritten by the next swd_write()
+ * instead of glitching SWDIO
+ * HiZ/pull-up --------------> 0 -------------> 1
+ * swdio_drive(true) swd_write(0,1)
+ * in case of data bit 0 = 1
+ */
+ bitbang_swd_exchange(false, trn_ack_data_parity_trn, 1 + 3 + 1, 1);
bitbang_interface->swdio_drive(true);
bitbang_swd_exchange(false, trn_ack_data_parity_trn, 1 + 3 + 1, 32 + 1);
-----------------------------------------------------------------------
Summary of changes:
src/jtag/drivers/bitbang.c | 14 +++++++++++++-
1 file changed, 13 insertions(+), 1 deletion(-)
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From: openocd-gerrit <ope...@us...> - 2023-01-28 15:53:28
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".
The branch, master has been updated
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from d032e7ec8c2978feda5df2ca7c4ddbcaec2fcbf5 (commit)
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- Log -----------------------------------------------------------------
commit 20285b91008106c9fa966cea3269c6f6a81e539a
Author: N S <nl...@ya...>
Date: Fri Dec 23 16:59:18 2022 -0800
jtag/drivers/openjtag: fix annoying num_cycles > 16 warning
The OpenJTAG driver logs "num_cycles > 16 on run test" warning
whenever the JTAG_RUNTEST operation cycle count is larger than 16.
Instead of logging the warning and only running the first 16 TCLK
cycles, remove the warning and queue up multiple operations of up
to 16 cycles each.
Signed-off-by: N S <nl...@ya...>
Change-Id: Id405fa802ff1cf3db7a21e76bd6df0c2d3a0fe61
Reviewed-on: https://review.openocd.org/c/openocd/+/7420
Tested-by: jenkins
Reviewed-by: Jonathan McDowell <noo...@ea...>
Reviewed-by: Antonio Borneo <bor...@gm...>
diff --git a/src/jtag/drivers/openjtag.c b/src/jtag/drivers/openjtag.c
index 6be950718..12ea46330 100644
--- a/src/jtag/drivers/openjtag.c
+++ b/src/jtag/drivers/openjtag.c
@@ -742,16 +742,18 @@ static void openjtag_execute_runtest(struct jtag_command *cmd)
tap_set_state(TAP_IDLE);
}
- if (cmd->cmd.runtest->num_cycles > 16)
- LOG_WARNING("num_cycles > 16 on run test");
-
if (openjtag_variant != OPENJTAG_VARIANT_CY7C65215 ||
cmd->cmd.runtest->num_cycles) {
uint8_t command;
- command = 7;
- command |= ((cmd->cmd.runtest->num_cycles - 1) & 0x0F) << 4;
+ int cycles = cmd->cmd.runtest->num_cycles;
- openjtag_add_byte(command);
+ do {
+ command = 7;
+ command |= (((cycles > 16 ? 16 : cycles) - 1) & 0x0F) << 4;
+
+ openjtag_add_byte(command);
+ cycles -= 16;
+ } while (cycles > 0);
}
tap_set_end_state(end_state);
-----------------------------------------------------------------------
Summary of changes:
src/jtag/drivers/openjtag.c | 14 ++++++++------
1 file changed, 8 insertions(+), 6 deletions(-)
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From: openocd-gerrit <ope...@us...> - 2023-01-28 15:52:56
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".
The branch, master has been updated
via d032e7ec8c2978feda5df2ca7c4ddbcaec2fcbf5 (commit)
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- Log -----------------------------------------------------------------
commit d032e7ec8c2978feda5df2ca7c4ddbcaec2fcbf5
Author: Andreas Fritiofson <and...@gm...>
Date: Mon Nov 8 19:35:27 2021 +0100
rtos: Fix constness of struct rtos_type
Change-Id: Iaa89f2ff4036c23f944ffb4f37fe0c7afaf5069b
Signed-off-by: Andreas Fritiofson <and...@gm...>
Reviewed-on: https://review.openocd.org/c/openocd/+/6680
Tested-by: jenkins
Reviewed-by: Antonio Borneo <bor...@gm...>
diff --git a/src/rtos/FreeRTOS.c b/src/rtos/FreeRTOS.c
index 945c4b875..070275f2c 100644
--- a/src/rtos/FreeRTOS.c
+++ b/src/rtos/FreeRTOS.c
@@ -80,7 +80,7 @@ static int freertos_get_thread_reg_list(struct rtos *rtos, int64_t thread_id,
struct rtos_reg **reg_list, int *num_regs);
static int freertos_get_symbol_list_to_lookup(struct symbol_table_elem *symbol_list[]);
-struct rtos_type freertos_rtos = {
+const struct rtos_type freertos_rtos = {
.name = "FreeRTOS",
.detect_rtos = freertos_detect_rtos,
diff --git a/src/rtos/chibios.c b/src/rtos/chibios.c
index 8319cc883..68fe8a14c 100644
--- a/src/rtos/chibios.c
+++ b/src/rtos/chibios.c
@@ -97,7 +97,7 @@ static int chibios_get_thread_reg_list(struct rtos *rtos, int64_t thread_id,
struct rtos_reg **reg_list, int *num_regs);
static int chibios_get_symbol_list_to_lookup(struct symbol_table_elem *symbol_list[]);
-struct rtos_type chibios_rtos = {
+const struct rtos_type chibios_rtos = {
.name = "chibios",
.detect_rtos = chibios_detect_rtos,
diff --git a/src/rtos/embKernel.c b/src/rtos/embKernel.c
index c1b5723fc..a03b039e0 100644
--- a/src/rtos/embKernel.c
+++ b/src/rtos/embKernel.c
@@ -27,7 +27,7 @@ static int embkernel_get_thread_reg_list(struct rtos *rtos, int64_t thread_id,
struct rtos_reg **reg_list, int *num_regs);
static int embkernel_get_symbol_list_to_lookup(struct symbol_table_elem *symbol_list[]);
-struct rtos_type embkernel_rtos = {
+const struct rtos_type embkernel_rtos = {
.name = "embKernel",
.detect_rtos = embkernel_detect_rtos,
.create = embkernel_create,
diff --git a/src/rtos/mqx.c b/src/rtos/mqx.c
index 8d483ed3b..d9b694282 100644
--- a/src/rtos/mqx.c
+++ b/src/rtos/mqx.c
@@ -498,7 +498,7 @@ static int mqx_get_symbol_list_to_lookup(struct symbol_table_elem *symbol_list[]
return ERROR_OK;
}
-struct rtos_type mqx_rtos = {
+const struct rtos_type mqx_rtos = {
.name = "mqx",
.detect_rtos = mqx_detect_rtos,
.create = mqx_create,
diff --git a/src/rtos/nuttx.c b/src/rtos/nuttx.c
index 993ff84bd..78271181e 100644
--- a/src/rtos/nuttx.c
+++ b/src/rtos/nuttx.c
@@ -324,7 +324,7 @@ static int nuttx_get_symbol_list_to_lookup(struct symbol_table_elem *symbol_list
return 0;
}
-struct rtos_type nuttx_rtos = {
+const struct rtos_type nuttx_rtos = {
.name = "nuttx",
.detect_rtos = nuttx_detect_rtos,
.create = nuttx_create,
diff --git a/src/rtos/rtos.c b/src/rtos/rtos.c
index bcd556a7b..f1e8956a3 100644
--- a/src/rtos/rtos.c
+++ b/src/rtos/rtos.c
@@ -16,22 +16,22 @@
#include "server/gdb_server.h"
/* RTOSs */
-extern struct rtos_type freertos_rtos;
-extern struct rtos_type threadx_rtos;
-extern struct rtos_type ecos_rtos;
-extern struct rtos_type linux_rtos;
-extern struct rtos_type chibios_rtos;
-extern struct rtos_type chromium_ec_rtos;
-extern struct rtos_type embkernel_rtos;
-extern struct rtos_type mqx_rtos;
-extern struct rtos_type ucos_iii_rtos;
-extern struct rtos_type nuttx_rtos;
-extern struct rtos_type hwthread_rtos;
-extern struct rtos_type riot_rtos;
-extern struct rtos_type zephyr_rtos;
-extern struct rtos_type rtkernel_rtos;
-
-static struct rtos_type *rtos_types[] = {
+extern const struct rtos_type freertos_rtos;
+extern const struct rtos_type threadx_rtos;
+extern const struct rtos_type ecos_rtos;
+extern const struct rtos_type linux_rtos;
+extern const struct rtos_type chibios_rtos;
+extern const struct rtos_type chromium_ec_rtos;
+extern const struct rtos_type embkernel_rtos;
+extern const struct rtos_type mqx_rtos;
+extern const struct rtos_type ucos_iii_rtos;
+extern const struct rtos_type nuttx_rtos;
+extern const struct rtos_type hwthread_rtos;
+extern const struct rtos_type riot_rtos;
+extern const struct rtos_type zephyr_rtos;
+extern const struct rtos_type rtkernel_rtos;
+
+static const struct rtos_type *rtos_types[] = {
&threadx_rtos,
&freertos_rtos,
&ecos_rtos,
@@ -70,7 +70,7 @@ static int rtos_target_for_threadid(struct connection *connection, int64_t threa
return ERROR_OK;
}
-static int os_alloc(struct target *target, struct rtos_type *ostype)
+static int os_alloc(struct target *target, const struct rtos_type *ostype)
{
struct rtos *os = target->rtos = calloc(1, sizeof(struct rtos));
@@ -100,7 +100,7 @@ static void os_free(struct target *target)
target->rtos = NULL;
}
-static int os_alloc_create(struct target *target, struct rtos_type *ostype)
+static int os_alloc_create(struct target *target, const struct rtos_type *ostype)
{
int ret = os_alloc(target, ostype);
@@ -683,7 +683,7 @@ int rtos_generic_stack_read(struct target *target,
static int rtos_try_next(struct target *target)
{
struct rtos *os = target->rtos;
- struct rtos_type **type = rtos_types;
+ const struct rtos_type **type = rtos_types;
if (!os)
return 0;
diff --git a/src/rtos/zephyr.c b/src/rtos/zephyr.c
index b00b4b341..934a8dd1c 100644
--- a/src/rtos/zephyr.c
+++ b/src/rtos/zephyr.c
@@ -785,7 +785,7 @@ static int zephyr_get_symbol_list_to_lookup(struct symbol_table_elem **symbol_li
return ERROR_OK;
}
-struct rtos_type zephyr_rtos = {
+const struct rtos_type zephyr_rtos = {
.name = "Zephyr",
.detect_rtos = zephyr_detect_rtos,
-----------------------------------------------------------------------
Summary of changes:
src/rtos/FreeRTOS.c | 2 +-
src/rtos/chibios.c | 2 +-
src/rtos/embKernel.c | 2 +-
src/rtos/mqx.c | 2 +-
src/rtos/nuttx.c | 2 +-
src/rtos/rtos.c | 38 +++++++++++++++++++-------------------
src/rtos/zephyr.c | 2 +-
7 files changed, 25 insertions(+), 25 deletions(-)
hooks/post-receive
--
Main OpenOCD repository
|
|
From: openocd-gerrit <ope...@us...> - 2023-01-28 15:52:36
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".
The branch, master has been updated
via 43c8aa28cb1570c11e1099c43e685af228190679 (commit)
from cf50bcb841238726697dc1250d6b6cb49fc6d19d (commit)
Those revisions listed above that are new to this repository have
not appeared on any other notification email; so we list those
revisions in full, below.
- Log -----------------------------------------------------------------
commit 43c8aa28cb1570c11e1099c43e685af228190679
Author: Andreas Fritiofson <and...@gm...>
Date: Fri Apr 15 12:38:43 2016 +0200
rtos: Support rt-kernel
Works for the proprietary rt-kernel from rt-labs.
See: https://rt-labs.com/product/rt-kernel/
Change-Id: Id2c2e292c15fb17eab25e3d07db05014daa2a2b0
Signed-off-by: Andreas Fritiofson <and...@gm...>
Reviewed-on: https://review.openocd.org/c/openocd/+/6668
Tested-by: jenkins
Reviewed-by: Antonio Borneo <bor...@gm...>
diff --git a/doc/openocd.texi b/doc/openocd.texi
index b9ad3ff77..6c853f2ce 100644
--- a/doc/openocd.texi
+++ b/doc/openocd.texi
@@ -5000,7 +5000,7 @@ The value should normally correspond to a static mapping for the
@var{rtos_type} can be one of @option{auto}, @option{none}, @option{eCos},
@option{ThreadX}, @option{FreeRTOS}, @option{linux}, @option{ChibiOS},
@option{embKernel}, @option{mqx}, @option{uCOS-III}, @option{nuttx},
-@option{RIOT}, @option{Zephyr}
+@option{RIOT}, @option{Zephyr}, @option{rtkernel}
@xref{gdbrtossupport,,RTOS Support}.
@item @code{-defer-examine} -- skip target examination at initial JTAG chain
@@ -11867,6 +11867,7 @@ Currently supported rtos's include:
@item @option{RIOT}
@item @option{hwthread} (This is not an actual RTOS. @xref{usingopenocdsmpwithgdb,,Using OpenOCD SMP with GDB}.)
@item @option{Zephyr}
+@item @option{rtkernel}
@end itemize
At any time, it's possible to drop the selected RTOS using:
@@ -11908,6 +11909,8 @@ _tcb_name_offset.
@end raggedright
@item Zephyr symbols
_kernel, _kernel_openocd_offsets, _kernel_openocd_size_t_size
+@item rtkernel symbols
+Multiple struct offsets.
@end table
For most RTOS supported the above symbols will be exported by default. However for
diff --git a/src/rtos/Makefile.am b/src/rtos/Makefile.am
index fc3ab8b42..b0f7daf5f 100644
--- a/src/rtos/Makefile.am
+++ b/src/rtos/Makefile.am
@@ -21,6 +21,7 @@ noinst_LTLIBRARIES += %D%/librtos.la
%D%/mqx.c \
%D%/uCOS-III.c \
%D%/nuttx.c \
+ %D%/rtkernel.c \
%D%/hwthread.c \
%D%/zephyr.c \
%D%/riot.c \
diff --git a/src/rtos/rtkernel.c b/src/rtos/rtkernel.c
new file mode 100644
index 000000000..ba1de2517
--- /dev/null
+++ b/src/rtos/rtkernel.c
@@ -0,0 +1,384 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
+/***************************************************************************
+ * Copyright (C) 2016-2023 by Andreas Fritiofson *
+ * and...@gm... *
+ ***************************************************************************/
+
+#ifdef HAVE_CONFIG_H
+#include "config.h"
+#endif
+
+#include <helper/time_support.h>
+#include <jtag/jtag.h>
+#include "target/target.h"
+#include "target/target_type.h"
+#include "rtos.h"
+#include "helper/log.h"
+#include "helper/types.h"
+#include "rtos_standard_stackings.h"
+#include "target/armv7m.h"
+#include "target/cortex_m.h"
+
+#define ST_DEAD BIT(0) /* Task is waiting to be deleted */
+#define ST_WAIT BIT(1) /* Task is blocked: */
+#define ST_SEM BIT(2) /* on semaphore */
+#define ST_MTX BIT(3) /* on mutex */
+#define ST_SIG BIT(4) /* on signal */
+#define ST_DLY BIT(5) /* on timer */
+#define ST_FLAG BIT(6) /* on flag */
+#define ST_FLAG_ALL BIT(7) /* on flag and flag mode is "ALL" */
+#define ST_MBOX BIT(8) /* on mailbox */
+#define ST_STP BIT(9) /* self stopped */
+#define ST_SUSPEND BIT(10) /* Task is suspended */
+#define ST_TT BIT(11) /* Time triggered task */
+#define ST_TT_YIELD BIT(12) /* Time triggered task that yields */
+#define ST_CREATE BIT(13) /* Task was created by task_create() */
+
+struct rtkernel_params {
+ const char *target_name;
+ const struct rtos_register_stacking *stacking_info_cm3;
+ const struct rtos_register_stacking *stacking_info_cm4f;
+ const struct rtos_register_stacking *stacking_info_cm4f_fpu;
+};
+
+static const struct rtkernel_params rtkernel_params_list[] = {
+ {
+ "cortex_m", /* target_name */
+ &rtos_standard_cortex_m3_stacking, /* stacking_info */
+ &rtos_standard_cortex_m4f_stacking,
+ &rtos_standard_cortex_m4f_fpu_stacking,
+ },
+ {
+ "hla_target", /* target_name */
+ &rtos_standard_cortex_m3_stacking, /* stacking_info */
+ &rtos_standard_cortex_m4f_stacking,
+ &rtos_standard_cortex_m4f_fpu_stacking,
+ },
+};
+
+enum rtkernel_symbol_values {
+ sym_os_state = 0,
+ sym___off_os_state2chain = 1,
+ sym___off_os_state2current = 2,
+ sym___off_task2chain = 3,
+ sym___off_task2magic = 4,
+ sym___off_task2stack = 5,
+ sym___off_task2state = 6,
+ sym___off_task2name = 7,
+ sym___val_task_magic = 8,
+};
+
+struct symbols {
+ const char *name;
+ bool optional;
+};
+
+static const struct symbols rtkernel_symbol_list[] = {
+ { "os_state", false },
+ { "__off_os_state2chain", false },
+ { "__off_os_state2current", false },
+ { "__off_task2chain", false },
+ { "__off_task2magic", false },
+ { "__off_task2stack", false },
+ { "__off_task2state", false },
+ { "__off_task2name", false },
+ { "__val_task_magic", false },
+ { NULL, false }
+};
+
+static void *realloc_preserve(void *ptr, size_t old_size, size_t new_size)
+{
+ void *new_ptr = malloc(new_size);
+
+ if (new_ptr) {
+ memcpy(new_ptr, ptr, MIN(old_size, new_size));
+ free(ptr);
+ }
+
+ return new_ptr;
+}
+
+static int rtkernel_add_task(struct rtos *rtos, uint32_t task, uint32_t current_task)
+{
+ int retval;
+ int new_thread_count = rtos->thread_count + 1;
+ struct thread_detail *new_thread_details = realloc_preserve(rtos->thread_details,
+ rtos->thread_count * sizeof(struct thread_detail),
+ new_thread_count * sizeof(struct thread_detail));
+ if (!new_thread_details) {
+ LOG_ERROR("Error growing memory to %d threads", new_thread_count);
+ return ERROR_FAIL;
+ }
+ rtos->thread_details = new_thread_details;
+ struct thread_detail *thread = &new_thread_details[rtos->thread_count];
+
+ *thread = (struct thread_detail){ .threadid = task, .exists = true };
+
+ /* Read the task name */
+ uint32_t name;
+ retval = target_read_u32(rtos->target, task + rtos->symbols[sym___off_task2name].address, &name);
+ if (retval != ERROR_OK) {
+ LOG_ERROR("Could not read task name pointer from target");
+ return retval;
+ }
+ uint8_t tmp_str[33];
+ retval = target_read_buffer(rtos->target, name, sizeof(tmp_str) - 1, tmp_str);
+ if (retval != ERROR_OK) {
+ LOG_ERROR("Error reading task name from target");
+ return retval;
+ }
+ tmp_str[sizeof(tmp_str) - 1] = '\0';
+ LOG_DEBUG("task name at 0x%" PRIx32 ", value \"%s\"", name, tmp_str);
+
+ if (tmp_str[0] != '\0')
+ thread->thread_name_str = strdup((char *)tmp_str);
+ else
+ thread->thread_name_str = strdup("No Name");
+
+ /* Read the task state */
+ uint16_t state;
+ retval = target_read_u16(rtos->target, task + rtos->symbols[sym___off_task2state].address, &state);
+ if (retval != ERROR_OK) {
+ LOG_ERROR("Could not read task state from target");
+ return retval;
+ }
+
+ LOG_DEBUG("task state 0x%" PRIx16, state);
+
+ char state_str[64] = "";
+ if (state & ST_TT)
+ strcat(state_str, "TT|");
+ if (task == current_task) {
+ strcat(state_str, "RUN");
+ } else {
+ if (state & (ST_TT | ST_TT_YIELD))
+ strcat(state_str, "YIELD");
+ else if (state & ST_DEAD)
+ strcat(state_str, "DEAD");
+ else if (state & ST_WAIT)
+ strcat(state_str, "WAIT");
+ else if (state & ST_SUSPEND)
+ strcat(state_str, "SUSP");
+ else
+ strcat(state_str, "READY");
+ }
+ if (state & ST_SEM)
+ strcat(state_str, "|SEM");
+ if (state & ST_MTX)
+ strcat(state_str, "|MTX");
+ if (state & ST_SIG)
+ strcat(state_str, "|SIG");
+ if (state & ST_DLY)
+ strcat(state_str, "|DLY");
+ if ((state & ST_FLAG) || (state & ST_FLAG_ALL))
+ strcat(state_str, "|FLAG");
+ if (state & ST_FLAG_ALL)
+ strcat(state_str, "_ALL");
+ if (state & ST_MBOX)
+ strcat(state_str, "|MBOX");
+ if (state & ST_STP)
+ strcat(state_str, "|STP");
+
+ thread->extra_info_str = strdup(state_str);
+
+ rtos->thread_count = new_thread_count;
+ if (task == current_task)
+ rtos->current_thread = task;
+ return ERROR_OK;
+}
+
+static int rtkernel_verify_task(struct rtos *rtos, uint32_t task)
+{
+ int retval;
+ uint32_t magic;
+ retval = target_read_u32(rtos->target, task + rtos->symbols[sym___off_task2magic].address, &magic);
+ if (retval != ERROR_OK) {
+ LOG_ERROR("Could not read task magic from target");
+ return retval;
+ }
+ if (magic != rtos->symbols[sym___val_task_magic].address) {
+ LOG_ERROR("Invalid task found (magic=0x%" PRIx32 ")", magic);
+ return ERROR_FAIL;
+ }
+ return retval;
+}
+
+static int rtkernel_update_threads(struct rtos *rtos)
+{
+ /* wipe out previous thread details if any */
+ /* do this first because rtos layer does not check our retval */
+ rtos_free_threadlist(rtos);
+ rtos->current_thread = 0;
+
+ if (!rtos->symbols) {
+ LOG_ERROR("No symbols for rt-kernel");
+ return -3;
+ }
+
+ /* read the current task */
+ uint32_t current_task;
+ int retval = target_read_u32(rtos->target,
+ rtos->symbols[sym_os_state].address + rtos->symbols[sym___off_os_state2current].address,
+ ¤t_task);
+ if (retval != ERROR_OK) {
+ LOG_ERROR("Error reading current task");
+ return retval;
+ }
+ LOG_DEBUG("current task is 0x%" PRIx32, current_task);
+
+ retval = rtkernel_verify_task(rtos, current_task);
+ if (retval != ERROR_OK) {
+ LOG_ERROR("Current task is invalid");
+ return retval;
+ }
+
+ /* loop through kernel task list */
+ uint32_t chain = rtos->symbols[sym_os_state].address + rtos->symbols[sym___off_os_state2chain].address;
+ LOG_DEBUG("chain start at 0x%" PRIx32, chain);
+
+ uint32_t next = chain;
+ for (;;) {
+ retval = target_read_u32(rtos->target, next, &next);
+ if (retval != ERROR_OK) {
+ LOG_ERROR("Could not read rt-kernel data structure from target");
+ return retval;
+ }
+ LOG_DEBUG("next entry at 0x%" PRIx32, next);
+ if (next == chain) {
+ LOG_DEBUG("end of chain detected");
+ break;
+ }
+ uint32_t task = next - rtos->symbols[sym___off_task2chain].address;
+ LOG_DEBUG("found task at 0x%" PRIx32, task);
+
+ retval = rtkernel_verify_task(rtos, task);
+ if (retval != ERROR_OK) {
+ LOG_ERROR("Invalid task found");
+ return retval;
+ }
+
+ retval = rtkernel_add_task(rtos, task, current_task);
+ if (retval != ERROR_OK) {
+ LOG_ERROR("Could not add task to rtos system");
+ return retval;
+ }
+ }
+ return ERROR_OK;
+}
+
+static int rtkernel_get_thread_reg_list(struct rtos *rtos, int64_t thread_id,
+ struct rtos_reg **reg_list, int *num_regs)
+{
+ uint32_t stack_ptr = 0;
+
+ if (!rtos)
+ return -1;
+
+ if (thread_id == 0)
+ return -2;
+
+ if (!rtos->rtos_specific_params)
+ return -1;
+
+ const struct rtkernel_params *param = rtos->rtos_specific_params;
+
+ /* Read the stack pointer */
+ int retval = target_read_u32(rtos->target, thread_id + rtos->symbols[sym___off_task2stack].address, &stack_ptr);
+ if (retval != ERROR_OK) {
+ LOG_ERROR("Error reading stack pointer from rtkernel thread");
+ return retval;
+ }
+ LOG_DEBUG("stack pointer at 0x%" PRIx64 ", value 0x%" PRIx32,
+ thread_id + rtos->symbols[sym___off_task2stack].address,
+ stack_ptr);
+
+ /* Adjust stack pointer to ignore non-standard BASEPRI register stacking */
+ stack_ptr += 4;
+
+ /* Check for armv7m with *enabled* FPU, i.e. a Cortex M4F */
+ bool cm4_fpu_enabled = false;
+ struct armv7m_common *armv7m_target = target_to_armv7m(rtos->target);
+ if (is_armv7m(armv7m_target)) {
+ if (armv7m_target->fp_feature != FP_NONE) {
+ /* Found ARM v7m target which includes a FPU */
+ uint32_t cpacr;
+
+ retval = target_read_u32(rtos->target, FPU_CPACR, &cpacr);
+ if (retval != ERROR_OK) {
+ LOG_ERROR("Could not read CPACR register to check FPU state");
+ return -1;
+ }
+
+ /* Check if CP10 and CP11 are set to full access. */
+ if (cpacr & 0x00F00000) {
+ /* Found target with enabled FPU */
+ cm4_fpu_enabled = true;
+ }
+ }
+ }
+
+ if (!cm4_fpu_enabled) {
+ LOG_DEBUG("cm3 stacking");
+ return rtos_generic_stack_read(rtos->target, param->stacking_info_cm3, stack_ptr, reg_list, num_regs);
+ }
+
+ /* Read the LR to decide between stacking with or without FPU */
+ uint32_t lr_svc;
+ retval = target_read_u32(rtos->target, stack_ptr + 0x20, &lr_svc);
+ if (retval != ERROR_OK) {
+ LOG_OUTPUT("Error reading stack frame from rtkernel thread\r\n");
+ return retval;
+ }
+
+ if ((lr_svc & 0x10) == 0) {
+ LOG_DEBUG("cm4f_fpu stacking");
+ return rtos_generic_stack_read(rtos->target, param->stacking_info_cm4f_fpu, stack_ptr, reg_list, num_regs);
+ }
+
+ LOG_DEBUG("cm4f stacking");
+ return rtos_generic_stack_read(rtos->target, param->stacking_info_cm4f, stack_ptr, reg_list, num_regs);
+}
+
+static int rtkernel_get_symbol_list_to_lookup(struct symbol_table_elem *symbol_list[])
+{
+ *symbol_list = calloc(ARRAY_SIZE(rtkernel_symbol_list), sizeof(struct symbol_table_elem));
+ if (!*symbol_list)
+ return ERROR_FAIL;
+
+ for (size_t i = 0; i < ARRAY_SIZE(rtkernel_symbol_list); i++) {
+ (*symbol_list)[i].symbol_name = rtkernel_symbol_list[i].name;
+ (*symbol_list)[i].optional = rtkernel_symbol_list[i].optional;
+ }
+
+ return ERROR_OK;
+}
+
+static bool rtkernel_detect_rtos(struct target *target)
+{
+ return (target->rtos->symbols) &&
+ (target->rtos->symbols[sym___off_os_state2chain].address != 0);
+}
+
+static int rtkernel_create(struct target *target)
+{
+ for (size_t i = 0; i < ARRAY_SIZE(rtkernel_params_list); i++) {
+ if (strcmp(rtkernel_params_list[i].target_name, target->type->name) == 0) {
+ target->rtos->rtos_specific_params = (void *)&rtkernel_params_list[i];
+ return 0;
+ }
+ }
+
+ LOG_ERROR("Could not find target in rt-kernel compatibility list");
+ return -1;
+}
+
+const struct rtos_type rtkernel_rtos = {
+ .name = "rtkernel",
+
+ .detect_rtos = rtkernel_detect_rtos,
+ .create = rtkernel_create,
+ .update_threads = rtkernel_update_threads,
+ .get_thread_reg_list = rtkernel_get_thread_reg_list,
+ .get_symbol_list_to_lookup = rtkernel_get_symbol_list_to_lookup,
+};
diff --git a/src/rtos/rtos.c b/src/rtos/rtos.c
index dfa158d01..bcd556a7b 100644
--- a/src/rtos/rtos.c
+++ b/src/rtos/rtos.c
@@ -29,6 +29,7 @@ extern struct rtos_type nuttx_rtos;
extern struct rtos_type hwthread_rtos;
extern struct rtos_type riot_rtos;
extern struct rtos_type zephyr_rtos;
+extern struct rtos_type rtkernel_rtos;
static struct rtos_type *rtos_types[] = {
&threadx_rtos,
@@ -43,6 +44,7 @@ static struct rtos_type *rtos_types[] = {
&nuttx_rtos,
&riot_rtos,
&zephyr_rtos,
+ &rtkernel_rtos,
/* keep this as last, as it always matches with rtos auto */
&hwthread_rtos,
NULL
-----------------------------------------------------------------------
Summary of changes:
doc/openocd.texi | 5 +-
src/rtos/Makefile.am | 1 +
src/rtos/rtkernel.c | 384 +++++++++++++++++++++++++++++++++++++++++++++++++++
src/rtos/rtos.c | 2 +
4 files changed, 391 insertions(+), 1 deletion(-)
create mode 100644 src/rtos/rtkernel.c
hooks/post-receive
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From: openocd-gerrit <ope...@us...> - 2023-01-28 15:51:47
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".
The branch, master has been updated
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- Log -----------------------------------------------------------------
commit cf50bcb841238726697dc1250d6b6cb49fc6d19d
Author: Erhan Kurubas <erh...@es...>
Date: Sat Jan 21 20:23:07 2023 +0100
rtos/nuttx: add stacking info for Espressif Xtensa chips
ESP32, ESP32-S2 and ESP32-S3 stack register offsets added
Signed-off-by: Erhan Kurubas <erh...@es...>
Change-Id: Ic6215c1d0152853fd08f82cbd3c138c7d62dbc46
Reviewed-on: https://review.openocd.org/c/openocd/+/7443
Tested-by: jenkins
Reviewed-by: Antonio Borneo <bor...@gm...>
diff --git a/src/rtos/rtos_nuttx_stackings.c b/src/rtos/rtos_nuttx_stackings.c
index b59b1356b..b70cccb33 100644
--- a/src/rtos/rtos_nuttx_stackings.c
+++ b/src/rtos/rtos_nuttx_stackings.c
@@ -108,3 +108,361 @@ const struct rtos_register_stacking nuttx_riscv_stacking = {
.calculate_process_stack = rtos_generic_stack_align8,
.register_offsets = nuttx_stack_offsets_riscv,
};
+
+static int nuttx_esp_xtensa_stack_read(struct target *target,
+ int64_t stack_ptr, const struct rtos_register_stacking *stacking,
+ uint8_t *stack_data)
+{
+ int retval = target_read_buffer(target, stack_ptr, stacking->stack_registers_size, stack_data);
+ if (retval != ERROR_OK)
+ return retval;
+
+ stack_data[4] &= ~0x10; /* Clear exception bit in PS */
+
+ return ERROR_OK;
+}
+
+static const struct stack_register_offset nuttx_stack_offsets_esp32[] = {
+ { 0, 0x00, 32 }, /* PC */
+ { 1, 0x08, 32 }, /* A0 */
+ { 2, 0x0c, 32 }, /* A1 */
+ { 3, 0x10, 32 }, /* A2 */
+ { 4, 0x14, 32 }, /* A3 */
+ { 5, 0x18, 32 }, /* A4 */
+ { 6, 0x1c, 32 }, /* A5 */
+ { 7, 0x20, 32 }, /* A6 */
+ { 8, 0x24, 32 }, /* A7 */
+ { 9, 0x28, 32 }, /* A8 */
+ { 10, 0x2c, 32 }, /* A9 */
+ { 11, 0x30, 32 }, /* A10 */
+ { 12, 0x34, 32 }, /* A11 */
+ { 13, 0x38, 32 }, /* A12 */
+ { 14, 0x3c, 32 }, /* A13 */
+ { 15, 0x40, 32 }, /* A14 */
+ { 16, 0x44, 32 }, /* A15 */
+ /* A16-A63 aren't in the stack frame because they've been flushed to the stack earlier */
+ { 17, -1, 32 }, /* A16 */
+ { 18, -1, 32 }, /* A17 */
+ { 19, -1, 32 }, /* A18 */
+ { 20, -1, 32 }, /* A19 */
+ { 21, -1, 32 }, /* A20 */
+ { 22, -1, 32 }, /* A21 */
+ { 23, -1, 32 }, /* A22 */
+ { 24, -1, 32 }, /* A23 */
+ { 25, -1, 32 }, /* A24 */
+ { 26, -1, 32 }, /* A25 */
+ { 27, -1, 32 }, /* A26 */
+ { 28, -1, 32 }, /* A27 */
+ { 29, -1, 32 }, /* A28 */
+ { 30, -1, 32 }, /* A29 */
+ { 31, -1, 32 }, /* A30 */
+ { 32, -1, 32 }, /* A31 */
+ { 33, -1, 32 }, /* A32 */
+ { 34, -1, 32 }, /* A33 */
+ { 35, -1, 32 }, /* A34 */
+ { 36, -1, 32 }, /* A35 */
+ { 37, -1, 32 }, /* A36 */
+ { 38, -1, 32 }, /* A37 */
+ { 39, -1, 32 }, /* A38 */
+ { 40, -1, 32 }, /* A39 */
+ { 41, -1, 32 }, /* A40 */
+ { 42, -1, 32 }, /* A41 */
+ { 43, -1, 32 }, /* A42 */
+ { 44, -1, 32 }, /* A43 */
+ { 45, -1, 32 }, /* A44 */
+ { 46, -1, 32 }, /* A45 */
+ { 47, -1, 32 }, /* A46 */
+ { 48, -1, 32 }, /* A47 */
+ { 49, -1, 32 }, /* A48 */
+ { 50, -1, 32 }, /* A49 */
+ { 51, -1, 32 }, /* A50 */
+ { 52, -1, 32 }, /* A51 */
+ { 53, -1, 32 }, /* A52 */
+ { 54, -1, 32 }, /* A53 */
+ { 55, -1, 32 }, /* A54 */
+ { 56, -1, 32 }, /* A55 */
+ { 57, -1, 32 }, /* A56 */
+ { 58, -1, 32 }, /* A57 */
+ { 59, -1, 32 }, /* A58 */
+ { 60, -1, 32 }, /* A59 */
+ { 61, -1, 32 }, /* A60 */
+ { 62, -1, 32 }, /* A61 */
+ { 63, -1, 32 }, /* A62 */
+ { 64, -1, 32 }, /* A63 */
+ { 65, 0x58, 32 }, /* lbeg */
+ { 66, 0x5c, 32 }, /* lend */
+ { 67, 0x60, 32 }, /* lcount */
+ { 68, 0x48, 32 }, /* SAR */
+ { 69, -1, 32 }, /* windowbase */
+ { 70, -1, 32 }, /* windowstart */
+ { 71, -1, 32 }, /* configid0 */
+ { 72, -1, 32 }, /* configid1 */
+ { 73, 0x04, 32 }, /* PS */
+ { 74, -1, 32 }, /* threadptr */
+ { 75, -1, 32 }, /* br */
+ { 76, 0x54, 32 }, /* scompare1 */
+ { 77, -1, 32 }, /* acclo */
+ { 78, -1, 32 }, /* acchi */
+ { 79, -1, 32 }, /* m0 */
+ { 80, -1, 32 }, /* m1 */
+ { 81, -1, 32 }, /* m2 */
+ { 82, -1, 32 }, /* m3 */
+ { 83, -1, 32 }, /* expstate */
+ { 84, -1, 32 }, /* f64r_lo */
+ { 85, -1, 32 }, /* f64r_hi */
+ { 86, -1, 32 }, /* f64s */
+ { 87, -1, 32 }, /* f0 */
+ { 88, -1, 32 }, /* f1 */
+ { 89, -1, 32 }, /* f2 */
+ { 90, -1, 32 }, /* f3 */
+ { 91, -1, 32 }, /* f4 */
+ { 92, -1, 32 }, /* f5 */
+ { 93, -1, 32 }, /* f6 */
+ { 94, -1, 32 }, /* f7 */
+ { 95, -1, 32 }, /* f8 */
+ { 96, -1, 32 }, /* f9 */
+ { 97, -1, 32 }, /* f10 */
+ { 98, -1, 32 }, /* f11 */
+ { 99, -1, 32 }, /* f12 */
+ { 100, -1, 32 }, /* f13 */
+ { 101, -1, 32 }, /* f14 */
+ { 102, -1, 32 }, /* f15 */
+ { 103, -1, 32 }, /* fcr */
+ { 104, -1, 32 }, /* fsr */
+};
+
+const struct rtos_register_stacking nuttx_esp32_stacking = {
+ .stack_registers_size = 26 * 4,
+ .stack_growth_direction = -1,
+ .num_output_registers = ARRAY_SIZE(nuttx_stack_offsets_esp32),
+ .calculate_process_stack = rtos_generic_stack_align8,
+ .register_offsets = nuttx_stack_offsets_esp32,
+ .read_stack = nuttx_esp_xtensa_stack_read,
+};
+
+static const struct stack_register_offset nuttx_stack_offsets_esp32s2[] = {
+ { 0, 0x00, 32 }, /* PC */
+ { 1, 0x08, 32 }, /* A0 */
+ { 2, 0x0c, 32 }, /* A1 */
+ { 3, 0x10, 32 }, /* A2 */
+ { 4, 0x14, 32 }, /* A3 */
+ { 5, 0x18, 32 }, /* A4 */
+ { 6, 0x1c, 32 }, /* A5 */
+ { 7, 0x20, 32 }, /* A6 */
+ { 8, 0x24, 32 }, /* A7 */
+ { 9, 0x28, 32 }, /* A8 */
+ { 10, 0x2c, 32 }, /* A9 */
+ { 11, 0x30, 32 }, /* A10 */
+ { 12, 0x34, 32 }, /* A11 */
+ { 13, 0x38, 32 }, /* A12 */
+ { 14, 0x3c, 32 }, /* A13 */
+ { 15, 0x40, 32 }, /* A14 */
+ { 16, 0x44, 32 }, /* A15 */
+ /* A16-A63 aren't in the stack frame because they've been flushed to the stack earlier */
+ { 17, -1, 32 }, /* A16 */
+ { 18, -1, 32 }, /* A17 */
+ { 19, -1, 32 }, /* A18 */
+ { 20, -1, 32 }, /* A19 */
+ { 21, -1, 32 }, /* A20 */
+ { 22, -1, 32 }, /* A21 */
+ { 23, -1, 32 }, /* A22 */
+ { 24, -1, 32 }, /* A23 */
+ { 25, -1, 32 }, /* A24 */
+ { 26, -1, 32 }, /* A25 */
+ { 27, -1, 32 }, /* A26 */
+ { 28, -1, 32 }, /* A27 */
+ { 29, -1, 32 }, /* A28 */
+ { 30, -1, 32 }, /* A29 */
+ { 31, -1, 32 }, /* A30 */
+ { 32, -1, 32 }, /* A31 */
+ { 33, -1, 32 }, /* A32 */
+ { 34, -1, 32 }, /* A33 */
+ { 35, -1, 32 }, /* A34 */
+ { 36, -1, 32 }, /* A35 */
+ { 37, -1, 32 }, /* A36 */
+ { 38, -1, 32 }, /* A37 */
+ { 39, -1, 32 }, /* A38 */
+ { 40, -1, 32 }, /* A39 */
+ { 41, -1, 32 }, /* A40 */
+ { 42, -1, 32 }, /* A41 */
+ { 43, -1, 32 }, /* A42 */
+ { 44, -1, 32 }, /* A43 */
+ { 45, -1, 32 }, /* A44 */
+ { 46, -1, 32 }, /* A45 */
+ { 47, -1, 32 }, /* A46 */
+ { 48, -1, 32 }, /* A47 */
+ { 49, -1, 32 }, /* A48 */
+ { 50, -1, 32 }, /* A49 */
+ { 51, -1, 32 }, /* A50 */
+ { 52, -1, 32 }, /* A51 */
+ { 53, -1, 32 }, /* A52 */
+ { 54, -1, 32 }, /* A53 */
+ { 55, -1, 32 }, /* A54 */
+ { 56, -1, 32 }, /* A55 */
+ { 57, -1, 32 }, /* A56 */
+ { 58, -1, 32 }, /* A57 */
+ { 59, -1, 32 }, /* A58 */
+ { 60, -1, 32 }, /* A59 */
+ { 61, -1, 32 }, /* A60 */
+ { 62, -1, 32 }, /* A61 */
+ { 63, -1, 32 }, /* A62 */
+ { 64, -1, 32 }, /* A63 */
+ { 65, 0x48, 32 }, /* SAR */
+ { 66, -1, 32 }, /* windowbase */
+ { 67, -1, 32 }, /* windowstart */
+ { 68, -1, 32 }, /* configid0 */
+ { 69, -1, 32 }, /* configid1 */
+ { 70, 0x04, 32 }, /* PS */
+ { 71, -1, 32 }, /* threadptr */
+ { 72, -1, 32 }, /* gpio_out */
+};
+
+const struct rtos_register_stacking nuttx_esp32s2_stacking = {
+ .stack_registers_size = 25 * 4,
+ .stack_growth_direction = -1,
+ .num_output_registers = ARRAY_SIZE(nuttx_stack_offsets_esp32s2),
+ .calculate_process_stack = rtos_generic_stack_align8,
+ .register_offsets = nuttx_stack_offsets_esp32s2,
+ .read_stack = nuttx_esp_xtensa_stack_read,
+};
+
+static const struct stack_register_offset nuttx_stack_offsets_esp32s3[] = {
+ { 0, 0x00, 32 }, /* PC */
+ { 1, 0x08, 32 }, /* A0 */
+ { 2, 0x0c, 32 }, /* A1 */
+ { 3, 0x10, 32 }, /* A2 */
+ { 4, 0x14, 32 }, /* A3 */
+ { 5, 0x18, 32 }, /* A4 */
+ { 6, 0x1c, 32 }, /* A5 */
+ { 7, 0x20, 32 }, /* A6 */
+ { 8, 0x24, 32 }, /* A7 */
+ { 9, 0x28, 32 }, /* A8 */
+ { 10, 0x2c, 32 }, /* A9 */
+ { 11, 0x30, 32 }, /* A10 */
+ { 12, 0x34, 32 }, /* A11 */
+ { 13, 0x38, 32 }, /* A12 */
+ { 14, 0x3c, 32 }, /* A13 */
+ { 15, 0x40, 32 }, /* A14 */
+ { 16, 0x44, 32 }, /* A15 */
+ /* A16-A63 aren't in the stack frame because they've been flushed to the stack earlier */
+ { 17, -1, 32 }, /* A16 */
+ { 18, -1, 32 }, /* A17 */
+ { 19, -1, 32 }, /* A18 */
+ { 20, -1, 32 }, /* A19 */
+ { 21, -1, 32 }, /* A20 */
+ { 22, -1, 32 }, /* A21 */
+ { 23, -1, 32 }, /* A22 */
+ { 24, -1, 32 }, /* A23 */
+ { 25, -1, 32 }, /* A24 */
+ { 26, -1, 32 }, /* A25 */
+ { 27, -1, 32 }, /* A26 */
+ { 28, -1, 32 }, /* A27 */
+ { 29, -1, 32 }, /* A28 */
+ { 30, -1, 32 }, /* A29 */
+ { 31, -1, 32 }, /* A30 */
+ { 32, -1, 32 }, /* A31 */
+ { 33, -1, 32 }, /* A32 */
+ { 34, -1, 32 }, /* A33 */
+ { 35, -1, 32 }, /* A34 */
+ { 36, -1, 32 }, /* A35 */
+ { 37, -1, 32 }, /* A36 */
+ { 38, -1, 32 }, /* A37 */
+ { 39, -1, 32 }, /* A38 */
+ { 40, -1, 32 }, /* A39 */
+ { 41, -1, 32 }, /* A40 */
+ { 42, -1, 32 }, /* A41 */
+ { 43, -1, 32 }, /* A42 */
+ { 44, -1, 32 }, /* A43 */
+ { 45, -1, 32 }, /* A44 */
+ { 46, -1, 32 }, /* A45 */
+ { 47, -1, 32 }, /* A46 */
+ { 48, -1, 32 }, /* A47 */
+ { 49, -1, 32 }, /* A48 */
+ { 50, -1, 32 }, /* A49 */
+ { 51, -1, 32 }, /* A50 */
+ { 52, -1, 32 }, /* A51 */
+ { 53, -1, 32 }, /* A52 */
+ { 54, -1, 32 }, /* A53 */
+ { 55, -1, 32 }, /* A54 */
+ { 56, -1, 32 }, /* A55 */
+ { 57, -1, 32 }, /* A56 */
+ { 58, -1, 32 }, /* A57 */
+ { 59, -1, 32 }, /* A58 */
+ { 60, -1, 32 }, /* A59 */
+ { 61, -1, 32 }, /* A60 */
+ { 62, -1, 32 }, /* A61 */
+ { 63, -1, 32 }, /* A62 */
+ { 64, -1, 32 }, /* A63 */
+ { 65, 0x58, 32 }, /* lbeg */
+ { 66, 0x5c, 32 }, /* lend */
+ { 67, 0x60, 32 }, /* lcount */
+ { 68, 0x48, 32 }, /* SAR */
+ { 69, -1, 32 }, /* windowbase */
+ { 70, -1, 32 }, /* windowstart */
+ { 71, -1, 32 }, /* configid0 */
+ { 72, -1, 32 }, /* configid1 */
+ { 73, 0x04, 32 }, /* PS */
+ { 74, -1, 32 }, /* threadptr */
+ { 75, -1, 32 }, /* br */
+ { 76, 0x54, 32 }, /* scompare1 */
+ { 77, -1, 32 }, /* acclo */
+ { 78, -1, 32 }, /* acchi */
+ { 79, -1, 32 }, /* m0 */
+ { 80, -1, 32 }, /* m1 */
+ { 81, -1, 32 }, /* m2 */
+ { 82, -1, 32 }, /* m3 */
+ { 83, -1, 32 }, /* gpio_out */
+ { 84, -1, 32 }, /* f0 */
+ { 85, -1, 32 }, /* f1 */
+ { 86, -1, 32 }, /* f2 */
+ { 87, -1, 32 }, /* f3 */
+ { 88, -1, 32 }, /* f4 */
+ { 89, -1, 32 }, /* f5 */
+ { 90, -1, 32 }, /* f6 */
+ { 91, -1, 32 }, /* f7 */
+ { 92, -1, 32 }, /* f8 */
+ { 93, -1, 32 }, /* f9 */
+ { 94, -1, 32 }, /* f10 */
+ { 95, -1, 32 }, /* f11 */
+ { 96, -1, 32 }, /* f12 */
+ { 97, -1, 32 }, /* f13 */
+ { 98, -1, 32 }, /* f14 */
+ { 99, -1, 32 }, /* f15 */
+ { 100, -1, 32 }, /* fcr */
+ { 101, -1, 32 }, /* fsr */
+ { 102, -1, 32 }, /* accx_0 */
+ { 103, -1, 32 }, /* accx_1 */
+ { 104, -1, 32 }, /* qacc_h_0 */
+ { 105, -1, 32 }, /* qacc_h_1 */
+ { 106, -1, 32 }, /* qacc_h_2 */
+ { 107, -1, 32 }, /* qacc_h_3 */
+ { 108, -1, 32 }, /* qacc_h_4 */
+ { 109, -1, 32 }, /* qacc_l_0 */
+ { 110, -1, 32 }, /* qacc_l_1 */
+ { 111, -1, 32 }, /* qacc_l_2 */
+ { 112, -1, 32 }, /* qacc_l_3 */
+ { 113, -1, 32 }, /* qacc_l_4 */
+ { 114, -1, 32 }, /* sar_byte */
+ { 115, -1, 32 }, /* fft_bit_width */
+ { 116, -1, 32 }, /* ua_state_0 */
+ { 117, -1, 32 }, /* ua_state_1 */
+ { 118, -1, 32 }, /* ua_state_2 */
+ { 119, -1, 32 }, /* ua_state_3 */
+ { 120, -1, 128 }, /* q0 */
+ { 121, -1, 128 }, /* q1 */
+ { 122, -1, 128 }, /* q2 */
+ { 123, -1, 128 }, /* q3 */
+ { 124, -1, 128 }, /* q4 */
+ { 125, -1, 128 }, /* q5 */
+ { 126, -1, 128 }, /* q6 */
+ { 127, -1, 128 }, /* q7 */
+};
+
+const struct rtos_register_stacking nuttx_esp32s3_stacking = {
+ .stack_registers_size = 26 * 4,
+ .stack_growth_direction = -1,
+ .num_output_registers = ARRAY_SIZE(nuttx_stack_offsets_esp32s3),
+ .calculate_process_stack = rtos_generic_stack_align8,
+ .register_offsets = nuttx_stack_offsets_esp32s3,
+ .read_stack = nuttx_esp_xtensa_stack_read,
+};
-----------------------------------------------------------------------
Summary of changes:
src/rtos/rtos_nuttx_stackings.c | 358 ++++++++++++++++++++++++++++++++++++++++
1 file changed, 358 insertions(+)
hooks/post-receive
--
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From: openocd-gerrit <ope...@us...> - 2023-01-28 15:51:05
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".
The branch, master has been updated
via 59bc761d56f9ce9a76c917e267a2c37f1a680611 (commit)
via dfbbfac4d72e247e8094a49c8573b2f49689b6d5 (commit)
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- Log -----------------------------------------------------------------
commit 59bc761d56f9ce9a76c917e267a2c37f1a680611
Author: Erhan Kurubas <erh...@es...>
Date: Sat Jan 21 20:10:21 2023 +0100
rtos: add custom stack read function
This is optional field for the targets which has to implement
their custom stack read function.
Signed-off-by: Erhan Kurubas <erh...@es...>
Change-Id: Icbc9ed66a052fc2cc0ef67e3ec4d85ab0c2c1b94
Reviewed-on: https://review.openocd.org/c/openocd/+/7442
Tested-by: jenkins
Reviewed-by: Antonio Borneo <bor...@gm...>
diff --git a/src/rtos/rtos.c b/src/rtos/rtos.c
index 2e76b501a..dfa158d01 100644
--- a/src/rtos/rtos.c
+++ b/src/rtos/rtos.c
@@ -632,7 +632,10 @@ int rtos_generic_stack_read(struct target *target,
if (stacking->stack_growth_direction == 1)
address -= stacking->stack_registers_size;
- retval = target_read_buffer(target, address, stacking->stack_registers_size, stack_data);
+ if (stacking->read_stack)
+ retval = stacking->read_stack(target, address, stacking, stack_data);
+ else
+ retval = target_read_buffer(target, address, stacking->stack_registers_size, stack_data);
if (retval != ERROR_OK) {
free(stack_data);
LOG_ERROR("Error reading stack frame from thread");
diff --git a/src/rtos/rtos.h b/src/rtos/rtos.h
index ace57514a..9128c163c 100644
--- a/src/rtos/rtos.h
+++ b/src/rtos/rtos.h
@@ -102,6 +102,13 @@ struct rtos_register_stacking {
const struct rtos_register_stacking *stacking,
target_addr_t stack_ptr);
const struct stack_register_offset *register_offsets;
+ /* Optional field for targets which may have to implement their own stack read function.
+ * Because stack format can be weird or stack data needed to be edited before passing to the gdb.
+ */
+ int (*read_stack)(struct target *target,
+ int64_t stack_ptr,
+ const struct rtos_register_stacking *stacking,
+ uint8_t *stack_data);
};
#define GDB_THREAD_PACKET_NOT_CONSUMED (-40)
commit dfbbfac4d72e247e8094a49c8573b2f49689b6d5
Author: Erhan Kurubas <erh...@es...>
Date: Wed Oct 5 18:38:23 2022 +0200
rtos/nuttx: add riscv stacking info
Tested with Espressif ESP32-C3 MCU
Signed-off-by: Erhan Kurubas <erh...@es...>
Change-Id: Ia71ace4909f2dc93ddc07a2ec5524cf374f1937c
Reviewed-on: https://review.openocd.org/c/openocd/+/7251
Tested-by: jenkins
Reviewed-by: Antonio Borneo <bor...@gm...>
diff --git a/src/rtos/rtos_nuttx_stackings.c b/src/rtos/rtos_nuttx_stackings.c
index cb3a2b9b2..b59b1356b 100644
--- a/src/rtos/rtos_nuttx_stackings.c
+++ b/src/rtos/rtos_nuttx_stackings.c
@@ -7,6 +7,8 @@
#include "rtos.h"
#include "target/armv7m.h"
#include "rtos_nuttx_stackings.h"
+#include "rtos_standard_stackings.h"
+#include <target/riscv/riscv.h>
/* see arch/arm/include/armv7-m/irq_cmnvector.h */
static const struct stack_register_offset nuttx_stack_offsets_cortex_m[] = {
@@ -62,3 +64,47 @@ const struct rtos_register_stacking nuttx_stacking_cortex_m_fpu = {
.num_output_registers = 17,
.register_offsets = nuttx_stack_offsets_cortex_m_fpu,
};
+
+static const struct stack_register_offset nuttx_stack_offsets_riscv[] = {
+ { GDB_REGNO_ZERO, -1, 32 },
+ { GDB_REGNO_RA, 0x04, 32 },
+ { GDB_REGNO_SP, 0x08, 32 },
+ { GDB_REGNO_GP, 0x0c, 32 },
+ { GDB_REGNO_TP, 0x10, 32 },
+ { GDB_REGNO_T0, 0x14, 32 },
+ { GDB_REGNO_T1, 0x18, 32 },
+ { GDB_REGNO_T2, 0x1c, 32 },
+ { GDB_REGNO_FP, 0x20, 32 },
+ { GDB_REGNO_S1, 0x24, 32 },
+ { GDB_REGNO_A0, 0x28, 32 },
+ { GDB_REGNO_A1, 0x2c, 32 },
+ { GDB_REGNO_A2, 0x30, 32 },
+ { GDB_REGNO_A3, 0x34, 32 },
+ { GDB_REGNO_A4, 0x38, 32 },
+ { GDB_REGNO_A5, 0x3c, 32 },
+ { GDB_REGNO_A6, 0x40, 32 },
+ { GDB_REGNO_A7, 0x44, 32 },
+ { GDB_REGNO_S2, 0x48, 32 },
+ { GDB_REGNO_S3, 0x4c, 32 },
+ { GDB_REGNO_S4, 0x50, 32 },
+ { GDB_REGNO_S5, 0x54, 32 },
+ { GDB_REGNO_S6, 0x58, 32 },
+ { GDB_REGNO_S7, 0x5c, 32 },
+ { GDB_REGNO_S8, 0x60, 32 },
+ { GDB_REGNO_S9, 0x64, 32 },
+ { GDB_REGNO_S10, 0x68, 32 },
+ { GDB_REGNO_S11, 0x6c, 32 },
+ { GDB_REGNO_T3, 0x70, 32 },
+ { GDB_REGNO_T4, 0x74, 32 },
+ { GDB_REGNO_T5, 0x78, 32 },
+ { GDB_REGNO_T6, 0x7c, 32 },
+ { GDB_REGNO_PC, 0x00, 32 },
+};
+
+const struct rtos_register_stacking nuttx_riscv_stacking = {
+ .stack_registers_size = 33 * 4,
+ .stack_growth_direction = -1,
+ .num_output_registers = 33,
+ .calculate_process_stack = rtos_generic_stack_align8,
+ .register_offsets = nuttx_stack_offsets_riscv,
+};
diff --git a/src/rtos/rtos_nuttx_stackings.h b/src/rtos/rtos_nuttx_stackings.h
index bfbc049f8..2e5f09212 100644
--- a/src/rtos/rtos_nuttx_stackings.h
+++ b/src/rtos/rtos_nuttx_stackings.h
@@ -7,5 +7,6 @@
extern const struct rtos_register_stacking nuttx_stacking_cortex_m;
extern const struct rtos_register_stacking nuttx_stacking_cortex_m_fpu;
+extern const struct rtos_register_stacking nuttx_riscv_stacking;
#endif /* INCLUDED_RTOS_NUTTX_STACKINGS_H */
-----------------------------------------------------------------------
Summary of changes:
src/rtos/rtos.c | 5 ++++-
src/rtos/rtos.h | 7 +++++++
src/rtos/rtos_nuttx_stackings.c | 46 +++++++++++++++++++++++++++++++++++++++++
src/rtos/rtos_nuttx_stackings.h | 1 +
4 files changed, 58 insertions(+), 1 deletion(-)
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From: openocd-gerrit <ope...@us...> - 2023-01-28 15:45:59
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This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
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- Log -----------------------------------------------------------------
commit 463df952157227866335e398102abe960ffa4131
Author: Erhan Kurubas <erh...@es...>
Date: Wed Oct 5 17:59:54 2022 +0200
rtos/nuttx: move stacking info to the new nuttx stackings file
Other OSes have separate files to keep stack register offsets.
Adding them for NuttX as well will provide a clearer way to expand.
Signed-off-by: Erhan Kurubas <erh...@es...>
Change-Id: I1428fefefa199a95431f2073c0279dd7028ad8da
Reviewed-on: https://review.openocd.org/c/openocd/+/7250
Tested-by: jenkins
Reviewed-by: Antonio Borneo <bor...@gm...>
diff --git a/src/rtos/Makefile.am b/src/rtos/Makefile.am
index f00d7194e..fc3ab8b42 100644
--- a/src/rtos/Makefile.am
+++ b/src/rtos/Makefile.am
@@ -10,6 +10,7 @@ noinst_LTLIBRARIES += %D%/librtos.la
%D%/rtos_mqx_stackings.c \
%D%/rtos_ucos_iii_stackings.c \
%D%/rtos_riot_stackings.c \
+ %D%/rtos_nuttx_stackings.c \
%D%/FreeRTOS.c \
%D%/ThreadX.c \
%D%/eCos.c \
@@ -32,4 +33,5 @@ noinst_LTLIBRARIES += %D%/librtos.la
%D%/rtos_mqx_stackings.h \
%D%/rtos_riot_stackings.h \
%D%/rtos_ucos_iii_stackings.h \
+ %D%/rtos_nuttx_stackings.h \
%D%/nuttx_header.h
diff --git a/src/rtos/nuttx.c b/src/rtos/nuttx.c
index 87b28c632..993ff84bd 100644
--- a/src/rtos/nuttx.c
+++ b/src/rtos/nuttx.c
@@ -21,7 +21,7 @@
#include "server/gdb_server.h"
#include "nuttx_header.h"
-
+#include "rtos_nuttx_stackings.h"
int rtos_thread_packet(struct connection *connection, const char *packet, int packet_size);
@@ -85,62 +85,6 @@ static char *task_state_str[] = {
#endif /* CONFIG_PAGING */
};
-/* see arch/arm/include/armv7-m/irq_cmnvector.h */
-static const struct stack_register_offset nuttx_stack_offsets_cortex_m[] = {
- { ARMV7M_R0, 0x28, 32 }, /* r0 */
- { ARMV7M_R1, 0x2c, 32 }, /* r1 */
- { ARMV7M_R2, 0x30, 32 }, /* r2 */
- { ARMV7M_R3, 0x34, 32 }, /* r3 */
- { ARMV7M_R4, 0x08, 32 }, /* r4 */
- { ARMV7M_R5, 0x0c, 32 }, /* r5 */
- { ARMV7M_R6, 0x10, 32 }, /* r6 */
- { ARMV7M_R7, 0x14, 32 }, /* r7 */
- { ARMV7M_R8, 0x18, 32 }, /* r8 */
- { ARMV7M_R9, 0x1c, 32 }, /* r9 */
- { ARMV7M_R10, 0x20, 32 }, /* r10 */
- { ARMV7M_R11, 0x24, 32 }, /* r11 */
- { ARMV7M_R12, 0x38, 32 }, /* r12 */
- { ARMV7M_R13, 0, 32 }, /* sp */
- { ARMV7M_R14, 0x3c, 32 }, /* lr */
- { ARMV7M_PC, 0x40, 32 }, /* pc */
- { ARMV7M_XPSR, 0x44, 32 }, /* xPSR */
-};
-
-
-static const struct rtos_register_stacking nuttx_stacking_cortex_m = {
- .stack_registers_size = 0x48,
- .stack_growth_direction = -1,
- .num_output_registers = 17,
- .register_offsets = nuttx_stack_offsets_cortex_m
-};
-
-static const struct stack_register_offset nuttx_stack_offsets_cortex_m_fpu[] = {
- { ARMV7M_R0, 0x6c, 32 }, /* r0 */
- { ARMV7M_R1, 0x70, 32 }, /* r1 */
- { ARMV7M_R2, 0x74, 32 }, /* r2 */
- { ARMV7M_R3, 0x78, 32 }, /* r3 */
- { ARMV7M_R4, 0x08, 32 }, /* r4 */
- { ARMV7M_R5, 0x0c, 32 }, /* r5 */
- { ARMV7M_R6, 0x10, 32 }, /* r6 */
- { ARMV7M_R7, 0x14, 32 }, /* r7 */
- { ARMV7M_R8, 0x18, 32 }, /* r8 */
- { ARMV7M_R9, 0x1c, 32 }, /* r9 */
- { ARMV7M_R10, 0x20, 32 }, /* r10 */
- { ARMV7M_R11, 0x24, 32 }, /* r11 */
- { ARMV7M_R12, 0x7c, 32 }, /* r12 */
- { ARMV7M_R13, 0, 32 }, /* sp */
- { ARMV7M_R14, 0x80, 32 }, /* lr */
- { ARMV7M_PC, 0x84, 32 }, /* pc */
- { ARMV7M_XPSR, 0x88, 32 }, /* xPSR */
-};
-
-static const struct rtos_register_stacking nuttx_stacking_cortex_m_fpu = {
- .stack_registers_size = 0x8c,
- .stack_growth_direction = -1,
- .num_output_registers = 17,
- .register_offsets = nuttx_stack_offsets_cortex_m_fpu
-};
-
static int pid_offset = PID;
static int state_offset = STATE;
static int name_offset = NAME;
diff --git a/src/rtos/rtos_nuttx_stackings.c b/src/rtos/rtos_nuttx_stackings.c
new file mode 100644
index 000000000..cb3a2b9b2
--- /dev/null
+++ b/src/rtos/rtos_nuttx_stackings.c
@@ -0,0 +1,64 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
+#ifdef HAVE_CONFIG_H
+#include "config.h"
+#endif
+
+#include "rtos.h"
+#include "target/armv7m.h"
+#include "rtos_nuttx_stackings.h"
+
+/* see arch/arm/include/armv7-m/irq_cmnvector.h */
+static const struct stack_register_offset nuttx_stack_offsets_cortex_m[] = {
+ { ARMV7M_R0, 0x28, 32 }, /* r0 */
+ { ARMV7M_R1, 0x2c, 32 }, /* r1 */
+ { ARMV7M_R2, 0x30, 32 }, /* r2 */
+ { ARMV7M_R3, 0x34, 32 }, /* r3 */
+ { ARMV7M_R4, 0x08, 32 }, /* r4 */
+ { ARMV7M_R5, 0x0c, 32 }, /* r5 */
+ { ARMV7M_R6, 0x10, 32 }, /* r6 */
+ { ARMV7M_R7, 0x14, 32 }, /* r7 */
+ { ARMV7M_R8, 0x18, 32 }, /* r8 */
+ { ARMV7M_R9, 0x1c, 32 }, /* r9 */
+ { ARMV7M_R10, 0x20, 32 }, /* r10 */
+ { ARMV7M_R11, 0x24, 32 }, /* r11 */
+ { ARMV7M_R12, 0x38, 32 }, /* r12 */
+ { ARMV7M_R13, 0, 32 }, /* sp */
+ { ARMV7M_R14, 0x3c, 32 }, /* lr */
+ { ARMV7M_PC, 0x40, 32 }, /* pc */
+ { ARMV7M_XPSR, 0x44, 32 }, /* xPSR */
+};
+
+const struct rtos_register_stacking nuttx_stacking_cortex_m = {
+ .stack_registers_size = 0x48,
+ .stack_growth_direction = -1,
+ .num_output_registers = 17,
+ .register_offsets = nuttx_stack_offsets_cortex_m,
+};
+
+static const struct stack_register_offset nuttx_stack_offsets_cortex_m_fpu[] = {
+ { ARMV7M_R0, 0x6c, 32 }, /* r0 */
+ { ARMV7M_R1, 0x70, 32 }, /* r1 */
+ { ARMV7M_R2, 0x74, 32 }, /* r2 */
+ { ARMV7M_R3, 0x78, 32 }, /* r3 */
+ { ARMV7M_R4, 0x08, 32 }, /* r4 */
+ { ARMV7M_R5, 0x0c, 32 }, /* r5 */
+ { ARMV7M_R6, 0x10, 32 }, /* r6 */
+ { ARMV7M_R7, 0x14, 32 }, /* r7 */
+ { ARMV7M_R8, 0x18, 32 }, /* r8 */
+ { ARMV7M_R9, 0x1c, 32 }, /* r9 */
+ { ARMV7M_R10, 0x20, 32 }, /* r10 */
+ { ARMV7M_R11, 0x24, 32 }, /* r11 */
+ { ARMV7M_R12, 0x7c, 32 }, /* r12 */
+ { ARMV7M_R13, 0, 32 }, /* sp */
+ { ARMV7M_R14, 0x80, 32 }, /* lr */
+ { ARMV7M_PC, 0x84, 32 }, /* pc */
+ { ARMV7M_XPSR, 0x88, 32 }, /* xPSR */
+};
+
+const struct rtos_register_stacking nuttx_stacking_cortex_m_fpu = {
+ .stack_registers_size = 0x8c,
+ .stack_growth_direction = -1,
+ .num_output_registers = 17,
+ .register_offsets = nuttx_stack_offsets_cortex_m_fpu,
+};
diff --git a/src/rtos/rtos_nuttx_stackings.h b/src/rtos/rtos_nuttx_stackings.h
new file mode 100644
index 000000000..bfbc049f8
--- /dev/null
+++ b/src/rtos/rtos_nuttx_stackings.h
@@ -0,0 +1,11 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
+#ifndef INCLUDED_RTOS_NUTTX_STACKINGS_H
+#define INCLUDED_RTOS_NUTTX_STACKINGS_H
+
+#include "rtos.h"
+
+extern const struct rtos_register_stacking nuttx_stacking_cortex_m;
+extern const struct rtos_register_stacking nuttx_stacking_cortex_m_fpu;
+
+#endif /* INCLUDED_RTOS_NUTTX_STACKINGS_H */
-----------------------------------------------------------------------
Summary of changes:
src/rtos/Makefile.am | 2 ++
src/rtos/nuttx.c | 58 +------------------------------------
src/rtos/rtos_nuttx_stackings.c | 64 +++++++++++++++++++++++++++++++++++++++++
src/rtos/rtos_nuttx_stackings.h | 11 +++++++
4 files changed, 78 insertions(+), 57 deletions(-)
create mode 100644 src/rtos/rtos_nuttx_stackings.c
create mode 100644 src/rtos/rtos_nuttx_stackings.h
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Main OpenOCD repository
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From: openocd-gerrit <ope...@us...> - 2023-01-28 15:44:16
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".
The branch, master has been updated
via 41231db3f08150145fe7ddde53cd027e72128d4c (commit)
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- Log -----------------------------------------------------------------
commit 41231db3f08150145fe7ddde53cd027e72128d4c
Author: Erhan Kurubas <erh...@es...>
Date: Fri Jan 20 18:33:43 2023 +0100
doc:usb_adapters: add lsusb dump of esp_usb_jtag
Also, esp_usb_jtag added to the supported driver list of
"adapter serial" command.
Signed-off-by: Erhan Kurubas <erh...@es...>
Change-Id: Ie65cbf9b44f5de6d7995102d1a281161468f6103
Reviewed-on: https://review.openocd.org/c/openocd/+/7440
Tested-by: jenkins
Reviewed-by: Antonio Borneo <bor...@gm...>
diff --git a/doc/openocd.texi b/doc/openocd.texi
index aa1707b7d..b9ad3ff77 100644
--- a/doc/openocd.texi
+++ b/doc/openocd.texi
@@ -2480,7 +2480,7 @@ This command is only available if your libusb1 is at least version 1.0.16.
Specifies the @var{serial_string} of the adapter to use.
If this command is not specified, serial strings are not checked.
Only the following adapter drivers use the serial string from this command:
-arm-jtag-ew, cmsis_dap, ft232r, ftdi, hla (stlink, ti-icdi), jlink, kitprog, opendus,
+arm-jtag-ew, cmsis_dap, esp_usb_jtag, ft232r, ftdi, hla (stlink, ti-icdi), jlink, kitprog, opendus,
openjtag, osbdm, presto, rlink, st-link, usb_blaster (ublast2), usbprog, vsllink, xds110.
@end deffn
diff --git a/doc/usb_adapters/esp_usb_jtag/303a_1001_esp_usb_jtag.txt b/doc/usb_adapters/esp_usb_jtag/303a_1001_esp_usb_jtag.txt
new file mode 100644
index 000000000..8da58e581
--- /dev/null
+++ b/doc/usb_adapters/esp_usb_jtag/303a_1001_esp_usb_jtag.txt
@@ -0,0 +1,134 @@
+# SPDX-License-Identifier: GPL-2.0-or-later OR GFDL-1.2-no-invariants-or-later
+
+# Optional comment
+
+Bus 002 Device 035: ID 303a:1001
+Device Descriptor:
+ bLength 18
+ bDescriptorType 1
+ bcdUSB 2.00
+ bDeviceClass 239 Miscellaneous Device
+ bDeviceSubClass 2
+ bDeviceProtocol 1 Interface Association
+ bMaxPacketSize0 64
+ idVendor 0x303a
+ idProduct 0x1001
+ bcdDevice 1.01
+ iManufacturer 1 Espressif
+ iProduct 2 USB JTAG/serial debug unit
+ iSerial 3 7C:DF:A1:A2:8F:38
+ bNumConfigurations 1
+ Configuration Descriptor:
+ bLength 9
+ bDescriptorType 2
+ wTotalLength 0x0062
+ bNumInterfaces 3
+ bConfigurationValue 1
+ iConfiguration 0
+ bmAttributes 0xc0
+ Self Powered
+ MaxPower 500mA
+ Interface Association:
+ bLength 8
+ bDescriptorType 11
+ bFirstInterface 0
+ bInterfaceCount 2
+ bFunctionClass 2 Communications
+ bFunctionSubClass 2 Abstract (modem)
+ bFunctionProtocol 0
+ iFunction 0
+ Interface Descriptor:
+ bLength 9
+ bDescriptorType 4
+ bInterfaceNumber 0
+ bAlternateSetting 0
+ bNumEndpoints 1
+ bInterfaceClass 2 Communications
+ bInterfaceSubClass 2 Abstract (modem)
+ bInterfaceProtocol 0
+ iInterface 0
+ CDC Header:
+ bcdCDC 1.10
+ CDC ACM:
+ bmCapabilities 0x02
+ line coding and serial state
+ CDC Union:
+ bMasterInterface 0
+ bSlaveInterface 1
+ CDC Call Management:
+ bmCapabilities 0x03
+ call management
+ use DataInterface
+ bDataInterface 1
+ Endpoint Descriptor:
+ bLength 7
+ bDescriptorType 5
+ bEndpointAddress 0x82 EP 2 IN
+ bmAttributes 3
+ Transfer Type Interrupt
+ Synch Type None
+ Usage Type Data
+ wMaxPacketSize 0x0040 1x 64 bytes
+ bInterval 1
+ Interface Descriptor:
+ bLength 9
+ bDescriptorType 4
+ bInterfaceNumber 1
+ bAlternateSetting 0
+ bNumEndpoints 2
+ bInterfaceClass 10 CDC Data
+ bInterfaceSubClass 2
+ bInterfaceProtocol 0
+ iInterface 0
+ Endpoint Descriptor:
+ bLength 7
+ bDescriptorType 5
+ bEndpointAddress 0x01 EP 1 OUT
+ bmAttributes 2
+ Transfer Type Bulk
+ Synch Type None
+ Usage Type Data
+ wMaxPacketSize 0x0040 1x 64 bytes
+ bInterval 1
+ Endpoint Descriptor:
+ bLength 7
+ bDescriptorType 5
+ bEndpointAddress 0x81 EP 1 IN
+ bmAttributes 2
+ Transfer Type Bulk
+ Synch Type None
+ Usage Type Data
+ wMaxPacketSize 0x0040 1x 64 bytes
+ bInterval 1
+ Interface Descriptor:
+ bLength 9
+ bDescriptorType 4
+ bInterfaceNumber 2
+ bAlternateSetting 0
+ bNumEndpoints 2
+ bInterfaceClass 255 Vendor Specific Class
+ bInterfaceSubClass 255 Vendor Specific Subclass
+ bInterfaceProtocol 1
+ iInterface 0
+ Endpoint Descriptor:
+ bLength 7
+ bDescriptorType 5
+ bEndpointAddress 0x02 EP 2 OUT
+ bmAttributes 2
+ Transfer Type Bulk
+ Synch Type None
+ Usage Type Data
+ wMaxPacketSize 0x0040 1x 64 bytes
+ bInterval 1
+ Endpoint Descriptor:
+ bLength 7
+ bDescriptorType 5
+ bEndpointAddress 0x83 EP 3 IN
+ bmAttributes 2
+ Transfer Type Bulk
+ Synch Type None
+ Usage Type Data
+ wMaxPacketSize 0x0040 1x 64 bytes
+ bInterval 1
+Device Status: 0x0001
+ Self Powered
diff --git a/doc/usb_adapters/readme.txt b/doc/usb_adapters/readme.txt
index 1d995e99f..19df4cf70 100644
--- a/doc/usb_adapters/readme.txt
+++ b/doc/usb_adapters/readme.txt
@@ -15,6 +15,7 @@ OpenOCD gerrit, as explained in HACKING.
The dumps are organized in subfolders corresponding to OpenOCD drivers:
- cmsis_dap;
+- esp_usb_jtag;
- ft232r;
- ftdi;
- icdi;
-----------------------------------------------------------------------
Summary of changes:
doc/openocd.texi | 2 +-
.../303a_1001_esp_usb_jtag.txt} | 89 ++++++++++------------
doc/usb_adapters/readme.txt | 1 +
3 files changed, 42 insertions(+), 50 deletions(-)
copy doc/usb_adapters/{cmsis_dap/2a86_8011_wch_link.txt => esp_usb_jtag/303a_1001_esp_usb_jtag.txt} (68%)
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From: openocd-gerrit <ope...@us...> - 2023-01-28 15:42:49
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".
The branch, master has been updated
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from bc3c07b1768df878d04aa7cc8e9187e90cd93821 (commit)
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- Log -----------------------------------------------------------------
commit 98d816ff772ffb45b1f4fbba06cb48b30ca7d98f
Author: N S <nl...@ya...>
Date: Wed Jan 18 21:58:43 2023 -0800
doc: fix broken link to IgnoreHardwareSerialNumber in README.Windows
URL for Microsoft documentation on IgnoreHardwareSerialNumber
redirects to generic USB driver landing page instead of specific
article. Update link to go to correct page.
Signed-off-by: N S <nl...@ya...>
Change-Id: Ifac6c730a1438242cdfe0a0a2867e043e03ceec7
Reviewed-on: https://review.openocd.org/c/openocd/+/7439
Tested-by: jenkins
Reviewed-by: Antonio Borneo <bor...@gm...>
diff --git a/README.Windows b/README.Windows
index 7326a356c..64bf5c0c6 100644
--- a/README.Windows
+++ b/README.Windows
@@ -52,5 +52,5 @@ port depending on which application to use.
For more information, see:
- http://msdn.microsoft.com/en-us/library/windows/hardware/jj649944(v=vs.85).aspx
+ https://learn.microsoft.com/en-us/windows-hardware/drivers/usbcon/usb-device-specific-registry-settings
http://www.ftdichip.com/Support/Knowledgebase/index.html?ignorehardwareserialnumber.htm
-----------------------------------------------------------------------
Summary of changes:
README.Windows | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
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Main OpenOCD repository
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From: openocd-gerrit <ope...@us...> - 2023-01-21 22:58:44
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".
The branch, master has been updated
via bc3c07b1768df878d04aa7cc8e9187e90cd93821 (commit)
from 6e67f1473af15adc7c4052cee27ad84883b286d4 (commit)
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commit bc3c07b1768df878d04aa7cc8e9187e90cd93821
Author: Andreas Fritiofson <and...@gm...>
Date: Wed Jan 18 09:23:32 2023 +0100
stm32f3x: Allow overriding the flash bank size
Same mechanism as in stm32f1x.cfg reused here.
Change-Id: I81f02feb2b655e8259341b22180f3a8b82e28d05
Signed-off-by: Andreas Fritiofson <and...@gm...>
Reviewed-on: https://review.openocd.org/c/openocd/+/7438
Tested-by: jenkins
Reviewed-by: Antonio Borneo <bor...@gm...>
diff --git a/tcl/target/stm32f3x.cfg b/tcl/target/stm32f3x.cfg
index 4ecc7eda3..aa978d9c8 100644
--- a/tcl/target/stm32f3x.cfg
+++ b/tcl/target/stm32f3x.cfg
@@ -24,6 +24,14 @@ if { [info exists WORKAREASIZE] } {
set _WORKAREASIZE 0x4000
}
+# Allow overriding the Flash bank size
+if { [info exists FLASH_SIZE] } {
+ set _FLASH_SIZE $FLASH_SIZE
+} else {
+ # autodetect size
+ set _FLASH_SIZE 0
+}
+
# JTAG speed should be <= F_CPU/6. F_CPU after reset is 8MHz, so use F_JTAG = 1MHz
#
# Since we may be running of an RC oscilator, we crank down the speed a
@@ -63,7 +71,7 @@ target create $_TARGETNAME cortex_m -endian $_ENDIAN -dap $_CHIPNAME.dap
$_TARGETNAME configure -work-area-phys 0x20000000 -work-area-size $_WORKAREASIZE -work-area-backup 0
set _FLASHNAME $_CHIPNAME.flash
-flash bank $_FLASHNAME stm32f1x 0 0 0 0 $_TARGETNAME
+flash bank $_FLASHNAME stm32f1x 0 $_FLASH_SIZE 0 0 $_TARGETNAME
reset_config srst_nogate
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Summary of changes:
tcl/target/stm32f3x.cfg | 10 +++++++++-
1 file changed, 9 insertions(+), 1 deletion(-)
hooks/post-receive
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Main OpenOCD repository
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