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[OpenOCD-commit] Main OpenOCD repository branch, master, updated. v0.12.0-100-g86827a961

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- Log -----------------------------------------------------------------
commit 86827a961a22815ebd5fa367468ca7444f0ee2e1
Author: Antonio Borneo <bor...@gm...>
Date:   Fri Mar 10 11:50:08 2023 +0100

    svf: fix leaking file descriptor
    
    The file descriptor svf_fd is not closed on command error, thus
    leaking memory.
    
    Close svf_fd on errors.
    While there, properly initialize svf_fd using NULL instead of 0.
    
    Change-Id: I5efe9ce576a3a50588b30000222665e26161dfdc
    Signed-off-by: Antonio Borneo <bor...@gm...>
    Reviewed-on: https://review.openocd.org/c/openocd/+/7532
    Tested-by: jenkins
    Reviewed-by: Tomas Vanek <va...@fb...>
    Reviewed-by: <kai...@ad...>

diff --git a/src/svf/svf.c b/src/svf/svf.c
index 719588067..05fb21d63 100644
--- a/src/svf/svf.c
+++ b/src/svf/svf.c
@@ -377,6 +377,9 @@ COMMAND_HANDLER(handle_svf_command)
 			svf_addcycles = atoi(CMD_ARGV[i + 1]);
 			if (svf_addcycles > SVF_MAX_ADDCYCLES) {
 				command_print(CMD, "addcycles: %s out of range", CMD_ARGV[i + 1]);
+				if (svf_fd)
+					fclose(svf_fd);
+				svf_fd = NULL;
 				return ERROR_FAIL;
 			}
 			i++;
@@ -384,6 +387,9 @@ COMMAND_HANDLER(handle_svf_command)
 			tap = jtag_tap_by_string(CMD_ARGV[i+1]);
 			if (!tap) {
 				command_print(CMD, "Tap: %s unknown", CMD_ARGV[i+1]);
+				if (svf_fd)
+					fclose(svf_fd);
+				svf_fd = NULL;
 				return ERROR_FAIL;
 			}
 			i++;
@@ -546,7 +552,7 @@ COMMAND_HANDLER(handle_svf_command)
 free_all:
 
 	fclose(svf_fd);
-	svf_fd = 0;
+	svf_fd = NULL;
 
 	/* free buffers */
 	free(svf_command_buffer);

-----------------------------------------------------------------------

Summary of changes:
 src/svf/svf.c | 8 +++++++-
 1 file changed, 7 insertions(+), 1 deletion(-)


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- Log -----------------------------------------------------------------
commit 415715d91a11ea4ed6db3a1fd760741a22b6e098
Author: Tomas Vanek <va...@fb...>
Date:   Tue Mar 14 15:11:14 2023 +0100

    target/adi_v5_jtag: fix endianness error in transaction replay
    
    The code for JTAG WAIT recovery did not handle DP_SELECT
    endianness.
    
    While on it, mark missing ADIv6 DP SELECT1 handling as TODO.
    
    Change-Id: I44f3bc8fc9fd2483c0293b6d4f2c51a60ca01873
    Signed-off-by: Tomas Vanek <va...@fb...>
    Reviewed-on: https://review.openocd.org/c/openocd/+/7540
    Tested-by: jenkins
    Reviewed-by: Antonio Borneo <bor...@gm...>

diff --git a/src/target/adi_v5_jtag.c b/src/target/adi_v5_jtag.c
index eeb796be4..9f66adc68 100644
--- a/src/target/adi_v5_jtag.c
+++ b/src/target/adi_v5_jtag.c
@@ -566,14 +566,20 @@ static int jtagdp_overrun_check(struct adiv5_dap *dap)
 		/* restore SELECT register first */
 		if (!list_empty(&replay_list)) {
 			el = list_first_entry(&replay_list, struct dap_cmd, lh);
+
+			uint8_t out_value_buf[4];
+			buf_set_u32(out_value_buf, 0, 32, (uint32_t)(el->dp_select));
+
 			tmp = dap_cmd_new(dap, JTAG_DP_DPACC,
-					  DP_SELECT, DPAP_WRITE, (uint8_t *)&el->dp_select, NULL, 0);
+					  DP_SELECT, DPAP_WRITE, out_value_buf, NULL, 0);
 			if (!tmp) {
 				retval = ERROR_JTAG_DEVICE_ERROR;
 				goto done;
 			}
 			list_add(&tmp->lh, &replay_list);
 
+			/* TODO: ADIv6 DP SELECT1 handling */
+
 			dap->select = DP_SELECT_INVALID;
 		}
 

-----------------------------------------------------------------------

Summary of changes:
 src/target/adi_v5_jtag.c | 8 +++++++-
 1 file changed, 7 insertions(+), 1 deletion(-)


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[OpenOCD-commit] Main OpenOCD repository branch, master, updated. v0.12.0-98-g6ecd99ff9

[openocd-gerrit <ope...@us...>]

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- Log -----------------------------------------------------------------
commit 6ecd99ff9b98778d5655d6b6fc245dd8f344d365
Author: Tomas Vanek <va...@fb...>
Date:   Tue Mar 14 19:43:21 2023 +0100

    target/adi_v5_swd: update comment about SWD capability
    
    The multidrop SWD is also supported.
    
    Change-Id: I9fefc54fc9d40a75194285cd6e0f10c5c347d9b6
    Signed-off-by: Tomas Vanek <va...@fb...>
    Reviewed-on: https://review.openocd.org/c/openocd/+/7537
    Tested-by: jenkins
    Reviewed-by: Antonio Borneo <bor...@gm...>

diff --git a/src/target/adi_v5_swd.c b/src/target/adi_v5_swd.c
index aea730d4d..653f91f13 100644
--- a/src/target/adi_v5_swd.c
+++ b/src/target/adi_v5_swd.c
@@ -13,7 +13,7 @@
  * is a transport level interface, with "target/arm_adi_v5.[hc]" code
  * understanding operation semantics, shared with the JTAG transport.
  *
- * Single-DAP support only.
+ * Single DAP and multidrop-SWD support.
  *
  * for details, see "ARM IHI 0031A"
  * ARM Debug Interface v5 Architecture Specification

-----------------------------------------------------------------------

Summary of changes:
 src/target/adi_v5_swd.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)


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- Log -----------------------------------------------------------------
commit faeae51d7f497d83ab166329abb1f06aa5903774
Author: Erhan Kurubas <erh...@es...>
Date:   Wed Mar 15 01:22:10 2023 +0300

    target/espressif: check common_magic instead of gdb_arch string
    
    The value returned by target_get_gdb_arch() is something specific for GDB.
    There could be several variants of the same CPU.
    If we start implementing all the variants, checking the string value,
    could become incorrect.
    It's better to check for xtensa->common_magic == XTENSA_COMMON_MAGIC
    
    Signed-off-by: Erhan Kurubas <erh...@es...>
    Change-Id: I20f3fdced176c3b9ab00f889743161ecad7280f9
    Reviewed-on: https://review.openocd.org/c/openocd/+/7536
    Tested-by: jenkins
    Reviewed-by: Antonio Borneo <bor...@gm...>

diff --git a/src/target/espressif/esp_semihosting.c b/src/target/espressif/esp_semihosting.c
index 5e9cb9457..51d499866 100644
--- a/src/target/espressif/esp_semihosting.c
+++ b/src/target/espressif/esp_semihosting.c
@@ -17,12 +17,10 @@
 
 static struct esp_semihost_data __attribute__((unused)) *target_to_esp_semihost_data(struct target *target)
 {
-	const char *arch = target_get_gdb_arch(target);
-	if (arch) {
-		if (strncmp(arch, "xtensa", 6) == 0)
-			return &target_to_esp_xtensa(target)->semihost;
-		/* TODO: add riscv */
-	}
+	struct xtensa *xtensa = target->arch_info;
+	if (xtensa->common_magic == XTENSA_COMMON_MAGIC)
+		return &target_to_esp_xtensa(target)->semihost;
+	/* TODO: add riscv */
 	LOG_ERROR("Unknown target arch!");
 	return NULL;
 }

-----------------------------------------------------------------------

Summary of changes:
 src/target/espressif/esp_semihosting.c | 10 ++++------
 1 file changed, 4 insertions(+), 6 deletions(-)


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- Log -----------------------------------------------------------------
commit ee31f1578a333a75737bc5b183cd4ae98cdaf798
Author: Erhan Kurubas <erh...@es...>
Date:   Sun Jan 22 23:43:03 2023 +0100

    rtos/nuttx: add Espressif target support and refactoring
    
    Almost written from the beginning in a modern OpenOCD way.
    - Endiannes support
    - Proper variable types
    - Align with the other rtos implementations
    
    Signed-off-by: Erhan Kurubas <erh...@es...>
    Change-Id: I0868a22da2ed2ab664c82b17c171dc59ede78d10
    Reviewed-on: https://review.openocd.org/c/openocd/+/7444
    Tested-by: jenkins
    Reviewed-by: Antonio Borneo <bor...@gm...>

diff --git a/src/rtos/Makefile.am b/src/rtos/Makefile.am
index b0f7daf5f..0796910de 100644
--- a/src/rtos/Makefile.am
+++ b/src/rtos/Makefile.am
@@ -34,5 +34,4 @@ noinst_LTLIBRARIES += %D%/librtos.la
 	%D%/rtos_mqx_stackings.h \
 	%D%/rtos_riot_stackings.h \
 	%D%/rtos_ucos_iii_stackings.h \
-	%D%/rtos_nuttx_stackings.h \
-	%D%/nuttx_header.h
+	%D%/rtos_nuttx_stackings.h
diff --git a/src/rtos/nuttx.c b/src/rtos/nuttx.c
index 78271181e..0616af0f4 100644
--- a/src/rtos/nuttx.c
+++ b/src/rtos/nuttx.c
@@ -18,53 +18,60 @@
 #include "rtos.h"
 #include "helper/log.h"
 #include "helper/types.h"
-#include "server/gdb_server.h"
-
-#include "nuttx_header.h"
+#include "target/register.h"
 #include "rtos_nuttx_stackings.h"
 
-int rtos_thread_packet(struct connection *connection, const char *packet, int packet_size);
-
-#ifdef CONFIG_DISABLE_SIGNALS
-#define SIG_QUEUE_NUM 0
-#else
-#define SIG_QUEUE_NUM 1
-#endif /* CONFIG_DISABLE_SIGNALS */
-
-#ifdef CONFIG_DISABLE_MQUEUE
-#define M_QUEUE_NUM 0
-#else
-#define M_QUEUE_NUM 2
-#endif /* CONFIG_DISABLE_MQUEUE */
-
-#ifdef CONFIG_PAGING
-#define PAGING_QUEUE_NUM 1
-#else
-#define PAGING_QUEUE_NUM 0
-#endif /* CONFIG_PAGING */
+#define NAME_SIZE       32
+#define EXTRAINFO_SIZE  256
 
+/* Only 32-bit CPUs are supported by the current implementation.  Supporting
+ * other CPUs will require reading this information from the target and
+ * adapting the code accordingly.
+ */
+#define PTR_WIDTH 4
 
-#define TASK_QUEUE_NUM (6 + SIG_QUEUE_NUM + M_QUEUE_NUM + PAGING_QUEUE_NUM)
+struct nuttx_params {
+	const char *target_name;
+	const struct rtos_register_stacking *stacking;
+	const struct rtos_register_stacking *(*select_stackinfo)(struct target *target);
+};
 
+/*
+ * struct tcbinfo_s is located in the sched.h
+ * https://github.com/apache/nuttx/blob/master/include/nuttx/sched.h
+ */
+#define TCBINFO_TARGET_SIZE 22
+struct tcbinfo {
+	uint16_t pid_off;			/* Offset of tcb.pid                */
+	uint16_t state_off;			/* Offset of tcb.task_state         */
+	uint16_t pri_off;			/* Offset of tcb.sched_priority     */
+	uint16_t name_off;			/* Offset of tcb.name               */
+	uint16_t regs_off;			/* Offset of tcb.regs               */
+	uint16_t basic_num;			/* Num of genernal regs             */
+	uint16_t total_num;			/* Num of regs in tcbinfo.reg_offs  */
+	target_addr_t xcpreg_off;	/* Offset pointer of xcp.regs       */
+};
 
-/* see nuttx/sched/os_start.c */
-static char *nuttx_symbol_list[] = {
-	"g_readytorun",            /* 0: must be top of this array */
-	"g_tasklisttable",
-	NULL
+struct symbols {
+	const char *name;
+	bool optional;
 };
 
-/* see nuttx/include/nuttx/sched.h */
-struct tcb {
-	uint32_t flink;
-	uint32_t blink;
-	uint8_t  dat[512];
+/* Used to index the list of retrieved symbols. See nuttx_symbol_list for the order. */
+enum nuttx_symbol_vals {
+	NX_SYM_READYTORUN = 0,
+	NX_SYM_PIDHASH,
+	NX_SYM_NPIDHASH,
+	NX_SYM_TCB_INFO,
 };
 
-static struct {
-	uint32_t addr;
-	uint32_t prio;
-} g_tasklist[TASK_QUEUE_NUM];
+static const struct symbols nuttx_symbol_list[] = {
+	{ "g_readytorun", false },
+	{ "g_pidhash", false },
+	{ "g_npidhash", false },
+	{ "g_tcbinfo", false },
+	{ NULL, false }
+};
 
 static char *task_state_str[] = {
 	"INVALID",
@@ -73,261 +80,363 @@ static char *task_state_str[] = {
 	"RUNNING",
 	"INACTIVE",
 	"WAIT_SEM",
-#ifndef CONFIG_DISABLE_SIGNALS
 	"WAIT_SIG",
-#endif /* CONFIG_DISABLE_SIGNALS */
-#ifndef CONFIG_DISABLE_MQUEUE
 	"WAIT_MQNOTEMPTY",
 	"WAIT_MQNOTFULL",
-#endif /* CONFIG_DISABLE_MQUEUE */
-#ifdef CONFIG_PAGING
 	"WAIT_PAGEFILL",
-#endif /* CONFIG_PAGING */
+	"STOPPED",
 };
 
-static int pid_offset = PID;
-static int state_offset = STATE;
-static int name_offset =  NAME;
-static int xcpreg_offset = XCPREG;
-static int name_size = NAME_SIZE;
+static const struct rtos_register_stacking *cortexm_select_stackinfo(struct target *target);
+
+static const struct nuttx_params nuttx_params_list[] = {
+	{
+		.target_name = "cortex_m",
+		.stacking = NULL,
+		.select_stackinfo = cortexm_select_stackinfo,
+	},
+	{
+		.target_name = "hla_target",
+		.stacking = NULL,
+		.select_stackinfo = cortexm_select_stackinfo,
+	},
+	{
+		.target_name = "esp32",
+		.stacking = &nuttx_esp32_stacking,
+	},
+	{
+		.target_name = "esp32s2",
+		.stacking = &nuttx_esp32s2_stacking,
+	},
+	{
+		.target_name = "esp32s3",
+		.stacking = &nuttx_esp32s3_stacking,
+	},
+	{
+		.target_name = "esp32c3",
+		.stacking = &nuttx_riscv_stacking,
+	},
+};
 
-static int rcmd_offset(const char *cmd, const char *name)
+static bool cortexm_hasfpu(struct target *target)
 {
-	if (strncmp(cmd, name, strlen(name)))
-		return -1;
+	uint32_t cpacr;
+	struct armv7m_common *armv7m_target = target_to_armv7m(target);
 
-	if (strlen(cmd) <= strlen(name) + 1)
-		return -1;
+	if (!is_armv7m(armv7m_target) || armv7m_target->fp_feature == FP_NONE)
+		return false;
 
-	return atoi(cmd + strlen(name));
+	int retval = target_read_u32(target, FPU_CPACR, &cpacr);
+	if (retval != ERROR_OK) {
+		LOG_ERROR("Could not read CPACR register to check FPU state");
+		return false;
+	}
+
+	return cpacr & 0x00F00000;
 }
 
-static int nuttx_thread_packet(struct connection *connection,
-	char const *packet, int packet_size)
+static const struct rtos_register_stacking *cortexm_select_stackinfo(struct target *target)
 {
-	char cmd[GDB_BUFFER_SIZE / 2 + 1] = ""; /* Extra byte for null-termination */
-
-	if (!strncmp(packet, "qRcmd", 5)) {
-		size_t len = unhexify((uint8_t *)cmd, packet + 6, sizeof(cmd));
-		int offset;
-
-		if (len <= 0)
-			goto pass;
-
-		offset = rcmd_offset(cmd, "nuttx.pid_offset");
-
-		if (offset >= 0) {
-			LOG_INFO("pid_offset: %d", offset);
-			pid_offset = offset;
-			goto retok;
-		}
-
-		offset = rcmd_offset(cmd, "nuttx.state_offset");
+	return cortexm_hasfpu(target) ? &nuttx_stacking_cortex_m_fpu : &nuttx_stacking_cortex_m;
+}
 
-		if (offset >= 0) {
-			LOG_INFO("state_offset: %d", offset);
-			state_offset = offset;
-			goto retok;
-		}
+static bool nuttx_detect_rtos(struct target *target)
+{
+	if (target->rtos->symbols &&
+		target->rtos->symbols[NX_SYM_READYTORUN].address != 0 &&
+		target->rtos->symbols[NX_SYM_PIDHASH].address != 0)
+		return true;
+	return false;
+}
 
-		offset = rcmd_offset(cmd, "nuttx.name_offset");
+static int nuttx_create(struct target *target)
+{
+	const struct nuttx_params *param;
+	unsigned int i;
 
-		if (offset >= 0) {
-			LOG_INFO("name_offset: %d", offset);
-			name_offset = offset;
-			goto retok;
+	for (i = 0; i < ARRAY_SIZE(nuttx_params_list); i++) {
+		param = &nuttx_params_list[i];
+		if (strcmp(target_type_name(target), param->target_name) == 0) {
+			LOG_INFO("Detected target \"%s\"", param->target_name);
+			break;
 		}
+	}
 
-		offset = rcmd_offset(cmd, "nuttx.xcpreg_offset");
-
-		if (offset >= 0) {
-			LOG_INFO("xcpreg_offset: %d", offset);
-			xcpreg_offset = offset;
-			goto retok;
-		}
+	if (i >= ARRAY_SIZE(nuttx_params_list)) {
+		LOG_ERROR("Could not find \"%s\" target in NuttX compatibility list", target_type_name(target));
+		return JIM_ERR;
+	}
 
-		offset = rcmd_offset(cmd, "nuttx.name_size");
+	/* We found a target in our list, copy its reference. */
+	target->rtos->rtos_specific_params = (void *)param;
 
-		if (offset >= 0) {
-			LOG_INFO("name_size: %d", offset);
-			name_size = offset;
-			goto retok;
-		}
-	}
-pass:
-	return rtos_thread_packet(connection, packet, packet_size);
-retok:
-	gdb_put_packet(connection, "OK", 2);
-	return ERROR_OK;
+	return JIM_OK;
 }
 
-
-static bool nuttx_detect_rtos(struct target *target)
+static int nuttx_smp_init(struct target *target)
 {
-	if ((target->rtos->symbols) &&
-			(target->rtos->symbols[0].address != 0) &&
-			(target->rtos->symbols[1].address != 0)) {
-		return true;
-	}
-	return false;
+	/* Return OK for now so that the initialisation sequence doesn't stop.
+	 * SMP case will be implemented later. */
+	return ERROR_OK;
 }
 
-static int nuttx_create(struct target *target)
+static target_addr_t target_buffer_get_addr(struct target *target, const uint8_t *buffer)
 {
-
-	target->rtos->gdb_thread_packet = nuttx_thread_packet;
-	LOG_INFO("target type name = %s", target->type->name);
-	return 0;
+#if PTR_WIDTH == 8
+	return target_buffer_get_u64(target, buffer);
+#else
+	return target_buffer_get_u32(target, buffer);
+#endif
 }
 
 static int nuttx_update_threads(struct rtos *rtos)
 {
-	uint32_t thread_count;
-	struct tcb tcb;
-	int ret;
-	uint32_t head;
-	uint32_t tcb_addr;
-	uint32_t i;
+	struct tcbinfo tcbinfo;
+	uint32_t pidhashaddr, npidhash, tcbaddr;
+	uint16_t pid;
 	uint8_t state;
 
 	if (!rtos->symbols) {
-		LOG_ERROR("No symbols for NuttX");
-		return -3;
+		LOG_ERROR("No symbols for nuttx");
+		return ERROR_FAIL;
 	}
 
-	/* free previous thread details */
+	/* Free previous thread details */
 	rtos_free_threadlist(rtos);
 
-	ret = target_read_buffer(rtos->target, rtos->symbols[1].address,
-		sizeof(g_tasklist), (uint8_t *)&g_tasklist);
-	if (ret) {
-		LOG_ERROR("target_read_buffer : ret = %d\n", ret);
+	/* NuttX provides a hash table that keeps track of all the TCBs.
+	 * We first read its size from g_npidhash and its address from g_pidhash.
+	 * Its content is then read from these values.
+	 */
+	int ret = target_read_u32(rtos->target, rtos->symbols[NX_SYM_NPIDHASH].address, &npidhash);
+	if (ret != ERROR_OK) {
+		LOG_ERROR("Failed to read g_npidhash: ret = %d", ret);
 		return ERROR_FAIL;
 	}
 
-	thread_count = 0;
+	LOG_DEBUG("Hash table size (g_npidhash) = %" PRId32, npidhash);
+
+	ret = target_read_u32(rtos->target, rtos->symbols[NX_SYM_PIDHASH].address, &pidhashaddr);
+	if (ret != ERROR_OK) {
+		LOG_ERROR("Failed to read g_pidhash address: ret = %d", ret);
+		return ERROR_FAIL;
+	}
 
-	for (i = 0; i < TASK_QUEUE_NUM; i++) {
+	LOG_DEBUG("Hash table address (g_pidhash) = %" PRIx32, pidhashaddr);
+
+	uint8_t *pidhash = malloc(npidhash * PTR_WIDTH);
+	if (!pidhash) {
+		LOG_ERROR("Failed to allocate pidhash");
+		return ERROR_FAIL;
+	}
 
-		if (g_tasklist[i].addr == 0)
+	ret = target_read_buffer(rtos->target, pidhashaddr, PTR_WIDTH * npidhash, pidhash);
+	if (ret != ERROR_OK) {
+		LOG_ERROR("Failed to read tcbhash: ret = %d", ret);
+		goto errout;
+	}
+
+	/* NuttX provides a struct that contains TCB offsets for required members.
+	 * Read its content from g_tcbinfo.
+	 */
+	uint8_t buff[TCBINFO_TARGET_SIZE];
+	ret = target_read_buffer(rtos->target, rtos->symbols[NX_SYM_TCB_INFO].address, sizeof(buff), buff);
+	if (ret != ERROR_OK) {
+		LOG_ERROR("Failed to read tcbinfo: ret = %d", ret);
+		goto errout;
+	}
+	tcbinfo.pid_off = target_buffer_get_u16(rtos->target, buff);
+	tcbinfo.state_off = target_buffer_get_u16(rtos->target, buff + 2);
+	tcbinfo.pri_off = target_buffer_get_u16(rtos->target, buff + 4);
+	tcbinfo.name_off = target_buffer_get_u16(rtos->target, buff + 6);
+	tcbinfo.regs_off = target_buffer_get_u16(rtos->target, buff + 8);
+	tcbinfo.basic_num = target_buffer_get_u16(rtos->target, buff + 10);
+	tcbinfo.total_num = target_buffer_get_u16(rtos->target, buff + 12);
+	tcbinfo.xcpreg_off = target_buffer_get_addr(rtos->target, buff + 14);
+
+	/* The head of the g_readytorun list is the currently running task.
+	 * Reading in a temporary variable first to avoid endianness issues,
+	 * rtos->current_thread is int64_t. */
+	uint32_t current_thread;
+	ret = target_read_u32(rtos->target, rtos->symbols[NX_SYM_READYTORUN].address, &current_thread);
+	if (ret != ERROR_OK) {
+		LOG_ERROR("Failed to read g_readytorun: ret = %d", ret);
+		goto errout;
+	}
+	rtos->current_thread = current_thread;
+
+	uint32_t thread_count = 0;
+
+	for (unsigned int i = 0; i < npidhash; i++) {
+		tcbaddr = target_buffer_get_u32(rtos->target, &pidhash[i * PTR_WIDTH]);
+
+		if (!tcbaddr)
 			continue;
 
-		ret = target_read_u32(rtos->target, g_tasklist[i].addr,
-			&head);
+		ret = target_read_u16(rtos->target, tcbaddr + tcbinfo.pid_off, &pid);
+		if (ret != ERROR_OK) {
+			LOG_ERROR("Failed to read PID of TCB@0x%x from pidhash[%d]: ret = %d",
+				tcbaddr, i, ret);
+			goto errout;
+		}
 
-		if (ret) {
-			LOG_ERROR("target_read_u32 : ret = %d\n", ret);
-			return ERROR_FAIL;
+		ret = target_read_u8(rtos->target, tcbaddr + tcbinfo.state_off, &state);
+		if (ret != ERROR_OK) {
+			LOG_ERROR("Failed to read state of TCB@0x%x from pidhash[%d]: ret = %d",
+				tcbaddr, i, ret);
+			goto errout;
 		}
 
-		/* readytorun head is current thread */
-		if (g_tasklist[i].addr == rtos->symbols[0].address)
-			rtos->current_thread = head;
+		struct thread_detail *new_thread_details = realloc(rtos->thread_details,
+			sizeof(struct thread_detail) * (thread_count + 1));
+		if (!new_thread_details) {
+			ret = ERROR_FAIL;
+			goto errout;
+		}
 
+		struct thread_detail *thread = &new_thread_details[thread_count];
+		thread->threadid = tcbaddr;
+		thread->exists = true;
+		thread->extra_info_str = NULL;
 
-		tcb_addr = head;
-		while (tcb_addr) {
-			struct thread_detail *thread;
-			ret = target_read_buffer(rtos->target, tcb_addr,
-				sizeof(tcb), (uint8_t *)&tcb);
-			if (ret) {
-				LOG_ERROR("target_read_buffer : ret = %d\n",
-					ret);
-				return ERROR_FAIL;
-			}
-			thread_count++;
-
-			rtos->thread_details = realloc(rtos->thread_details,
-				sizeof(struct thread_detail) * thread_count);
-			thread = &rtos->thread_details[thread_count - 1];
-			thread->threadid = tcb_addr;
-			thread->exists = true;
-
-			state = tcb.dat[state_offset - 8];
-			thread->extra_info_str = NULL;
-			if (state < ARRAY_SIZE(task_state_str)) {
-				thread->extra_info_str = malloc(256);
-				snprintf(thread->extra_info_str, 256, "pid:%d, %s",
-				    tcb.dat[pid_offset - 8] |
-				    tcb.dat[pid_offset - 8 + 1] << 8,
-				    task_state_str[state]);
-			}
+		rtos->thread_details = new_thread_details;
+		thread_count++;
 
-			if (name_offset) {
-				thread->thread_name_str = malloc(name_size + 1);
-				snprintf(thread->thread_name_str, name_size,
-				    "%s", (char *)&tcb.dat[name_offset - 8]);
-			} else {
-				thread->thread_name_str = malloc(sizeof("None"));
-				strcpy(thread->thread_name_str, "None");
+		if (state < ARRAY_SIZE(task_state_str)) {
+			thread->extra_info_str = malloc(EXTRAINFO_SIZE);
+			if (!thread->extra_info_str) {
+				ret = ERROR_FAIL;
+				goto errout;
 			}
+			snprintf(thread->extra_info_str, EXTRAINFO_SIZE, "pid:%d, %s",
+				pid,
+				task_state_str[state]);
+		}
 
-			tcb_addr = tcb.flink;
+		if (tcbinfo.name_off) {
+			thread->thread_name_str = calloc(NAME_SIZE + 1, sizeof(char));
+			if (!thread->thread_name_str) {
+				ret = ERROR_FAIL;
+				goto errout;
+			}
+			ret = target_read_buffer(rtos->target, tcbaddr + tcbinfo.name_off,
+				sizeof(char) * NAME_SIZE, (uint8_t *)thread->thread_name_str);
+			if (ret != ERROR_OK) {
+				LOG_ERROR("Failed to read thread's name: ret = %d", ret);
+				goto errout;
+			}
+		} else {
+			thread->thread_name_str = strdup("None");
 		}
 	}
-	rtos->thread_count = thread_count;
 
-	return 0;
+	ret = ERROR_OK;
+	rtos->thread_count = thread_count;
+errout:
+	free(pidhash);
+	return ret;
 }
 
-
-/*
- * thread_id = tcb address;
- */
-static int nuttx_get_thread_reg_list(struct rtos *rtos, int64_t thread_id,
+static int nuttx_getreg_current_thread(struct rtos *rtos,
 	struct rtos_reg **reg_list, int *num_regs)
 {
-	int retval;
-
-	/* Check for armv7m with *enabled* FPU, i.e. a Cortex-M4F */
-	bool cm4_fpu_enabled = false;
-	struct armv7m_common *armv7m_target = target_to_armv7m(rtos->target);
-	if (is_armv7m(armv7m_target)) {
-		if (armv7m_target->fp_feature == FPV4_SP) {
-			/* Found ARM v7m target which includes a FPU */
-			uint32_t cpacr;
-
-			retval = target_read_u32(rtos->target, FPU_CPACR, &cpacr);
-			if (retval != ERROR_OK) {
-				LOG_ERROR("Could not read CPACR register to check FPU state");
-				return -1;
-			}
+	struct reg **gdb_reg_list;
+
+	/* Registers for currently running thread are not on task's stack and
+	 * should be retrieved from reg caches via target_get_gdb_reg_list */
+	int ret = target_get_gdb_reg_list(rtos->target, &gdb_reg_list, num_regs,
+		REG_CLASS_GENERAL);
+	if (ret != ERROR_OK) {
+		LOG_ERROR("target_get_gdb_reg_list failed %d", ret);
+		return ret;
+	}
 
-			/* Check if CP10 and CP11 are set to full access. */
-			if (cpacr & 0x00F00000) {
-				/* Found target with enabled FPU */
-				cm4_fpu_enabled = 1;
-			}
+	*reg_list = calloc(*num_regs, sizeof(struct rtos_reg));
+	if (!(*reg_list)) {
+		LOG_ERROR("Failed to alloc memory for %d", *num_regs);
+		free(gdb_reg_list);
+		return ERROR_FAIL;
+	}
+
+	for (int i = 0; i < *num_regs; i++) {
+		(*reg_list)[i].number = gdb_reg_list[i]->number;
+		(*reg_list)[i].size = gdb_reg_list[i]->size;
+		memcpy((*reg_list)[i].value, gdb_reg_list[i]->value, ((*reg_list)[i].size + 7) / 8);
+	}
+
+	free(gdb_reg_list);
+
+	return ERROR_OK;
+}
+
+static int nuttx_getregs_fromstack(struct rtos *rtos, int64_t thread_id,
+	struct rtos_reg **reg_list, int *num_regs)
+{
+	uint16_t xcpreg_off;
+	uint32_t regsaddr;
+	const struct nuttx_params *priv = rtos->rtos_specific_params;
+	const struct rtos_register_stacking *stacking = priv->stacking;
+
+	if (!stacking) {
+		if (priv->select_stackinfo) {
+			stacking = priv->select_stackinfo(rtos->target);
+		} else {
+			LOG_ERROR("Can't find a way to get stacking info");
+			return ERROR_FAIL;
 		}
 	}
 
-	const struct rtos_register_stacking *stacking;
-	if (cm4_fpu_enabled)
-		stacking = &nuttx_stacking_cortex_m_fpu;
-	else
-		stacking = &nuttx_stacking_cortex_m;
+	int ret = target_read_u16(rtos->target,
+		rtos->symbols[NX_SYM_TCB_INFO].address + offsetof(struct tcbinfo, regs_off),
+		&xcpreg_off);
+	if (ret != ERROR_OK) {
+		LOG_ERROR("Failed to read registers' offset: ret = %d", ret);
+		return ERROR_FAIL;
+	}
+
+	ret = target_read_u32(rtos->target, thread_id + xcpreg_off, &regsaddr);
+	if (ret != ERROR_OK) {
+		LOG_ERROR("Failed to read registers' address: ret = %d", ret);
+		return ERROR_FAIL;
+	}
 
-	return rtos_generic_stack_read(rtos->target, stacking,
-	    (uint32_t)thread_id + xcpreg_offset, reg_list, num_regs);
+	return rtos_generic_stack_read(rtos->target, stacking, regsaddr, reg_list, num_regs);
 }
 
-static int nuttx_get_symbol_list_to_lookup(struct symbol_table_elem *symbol_list[])
+static int nuttx_get_thread_reg_list(struct rtos *rtos, int64_t thread_id,
+	struct rtos_reg **reg_list, int *num_regs)
 {
-	unsigned int i;
+	if (!rtos) {
+		LOG_ERROR("NUTTX: out of memory");
+		return ERROR_FAIL;
+	}
+
+	if (thread_id == rtos->current_thread)
+		return nuttx_getreg_current_thread(rtos, reg_list, num_regs);
+	return nuttx_getregs_fromstack(rtos, thread_id, reg_list, num_regs);
+}
 
-	*symbol_list = (struct symbol_table_elem *) calloc(1,
-		sizeof(struct symbol_table_elem) * ARRAY_SIZE(nuttx_symbol_list));
+static int nuttx_get_symbol_list_to_lookup(struct symbol_table_elem *symbol_list[])
+{
+	*symbol_list = calloc(ARRAY_SIZE(nuttx_symbol_list), sizeof(**symbol_list));
+	if (!*symbol_list) {
+		LOG_ERROR("NUTTX: out of memory");
+		return ERROR_FAIL;
+	}
 
-	for (i = 0; i < ARRAY_SIZE(nuttx_symbol_list); i++)
-		(*symbol_list)[i].symbol_name = nuttx_symbol_list[i];
+	for (unsigned int i = 0; i < ARRAY_SIZE(nuttx_symbol_list); i++) {
+		(*symbol_list)[i].symbol_name = nuttx_symbol_list[i].name;
+		(*symbol_list)[i].optional = nuttx_symbol_list[i].optional;
+	}
 
-	return 0;
+	return ERROR_OK;
 }
 
 const struct rtos_type nuttx_rtos = {
 	.name = "nuttx",
 	.detect_rtos = nuttx_detect_rtos,
 	.create = nuttx_create,
+	.smp_init = nuttx_smp_init,
 	.update_threads = nuttx_update_threads,
 	.get_thread_reg_list = nuttx_get_thread_reg_list,
 	.get_symbol_list_to_lookup = nuttx_get_symbol_list_to_lookup,
diff --git a/src/rtos/nuttx_header.h b/src/rtos/nuttx_header.h
deleted file mode 100644
index 3436df1eb..000000000
--- a/src/rtos/nuttx_header.h
+++ /dev/null
@@ -1,60 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0-or-later */
-
-/***************************************************************************
- *   Copyright 2016,2017 Sony Video & Sound Products Inc.                  *
- *   Masatoshi Tateishi - Mas...@jp...                   *
- *   Masayuki Ishikawa - Mas...@jp...                     *
- ***************************************************************************/
-
-#ifndef OPENOCD_RTOS_NUTTX_HEADER_H
-#define OPENOCD_RTOS_NUTTX_HEADER_H
-
-/*  gdb script to update the header file
-  according to kernel version and build option
-  before executing function awareness
-  kernel symbol must be loaded : symbol nuttx
-
-define awareness
- set logging off
- set logging file nuttx_header.h
- set logging on
-
- printf "#define PID  %p\n",&((struct tcb_s *)(0))->pid
- printf "#define XCPREG  %p\n",&((struct tcb_s *)(0))->xcp.regs
- printf "#define STATE %p\n",&((struct tcb_s *)(0))->task_state
- printf "#define NAME %p\n",&((struct tcb_s *)(0))->name
- printf "#define NAME_SIZE %d\n",sizeof(((struct tcb_s *)(0))->name)
- end
-
-
- OR ~/.gdbinit
-
-
-define hookpost-file
-
- if &g_readytorun != 0
-  eval "monitor nuttx.pid_offset %d", &((struct tcb_s *)(0))->pid
-  eval "monitor nuttx.xcpreg_offset %d", &((struct tcb_s *)(0))->xcp.regs
-  eval "monitor nuttx.state_offset %d", &((struct tcb_s *)(0))->task_state
-  eval "monitor nuttx.name_offset %d", &((struct tcb_s *)(0))->name
-  eval "monitor nuttx.name_size %d", sizeof(((struct tcb_s *)(0))->name)
- end
-
-end
-
-*/
-
-/* default offset */
-#define PID  0xc
-#define XCPREG  0x70
-#define STATE 0x19
-#define NAME 0xb8
-#define NAME_SIZE 32
-
-/* defconfig of nuttx */
-/* #define CONFIG_DISABLE_SIGNALS */
-#define CONFIG_DISABLE_MQUEUE
-/* #define CONFIG_PAGING */
-
-
-#endif /* OPENOCD_RTOS_NUTTX_HEADER_H */
diff --git a/src/rtos/rtos_nuttx_stackings.h b/src/rtos/rtos_nuttx_stackings.h
index 2e5f09212..213a06033 100644
--- a/src/rtos/rtos_nuttx_stackings.h
+++ b/src/rtos/rtos_nuttx_stackings.h
@@ -8,5 +8,8 @@
 extern const struct rtos_register_stacking nuttx_stacking_cortex_m;
 extern const struct rtos_register_stacking nuttx_stacking_cortex_m_fpu;
 extern const struct rtos_register_stacking nuttx_riscv_stacking;
+extern const struct rtos_register_stacking nuttx_esp32_stacking;
+extern const struct rtos_register_stacking nuttx_esp32s2_stacking;
+extern const struct rtos_register_stacking nuttx_esp32s3_stacking;
 
 #endif	/* INCLUDED_RTOS_NUTTX_STACKINGS_H */

-----------------------------------------------------------------------

Summary of changes:
 src/rtos/Makefile.am            |   3 +-
 src/rtos/nuttx.c                | 541 ++++++++++++++++++++++++----------------
 src/rtos/nuttx_header.h         |  60 -----
 src/rtos/rtos_nuttx_stackings.h |   3 +
 4 files changed, 329 insertions(+), 278 deletions(-)
 delete mode 100644 src/rtos/nuttx_header.h


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-- 
Main OpenOCD repository

[OpenOCD-commit] Main OpenOCD repository branch, master, updated. v0.12.0-95-g9ce6b0898

[openocd-gerrit <ope...@us...>]

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generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".

The branch, master has been updated
       via  9ce6b0898e5c0b2d6b6928b93b18137fecd6a32d (commit)
      from  b6b4f9d46a48aadc1de6bb5152ff4913661c9059 (commit)

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- Log -----------------------------------------------------------------
commit 9ce6b0898e5c0b2d6b6928b93b18137fecd6a32d
Author: Antonio Borneo <bor...@gm...>
Date:   Sun Mar 19 10:57:04 2023 +0100

    helper/compiler: fix build on MacOS
    
    On MacOS, clang defines [1]:
            #define __nonnull _Nonnull
    that creates incompatibility with GCC and with the macro __nonnull
    defined in some libc.
    
    Detect clang on MacOS and undefine __nonnull.
    
    Change-Id: I64fcf51b102ea91c196e657debd8c267943a2b08
    Signed-off-by: Antonio Borneo <bor...@gm...>
    Links: [1] https://github.com/llvm/llvm-project/blob/llvmorg-16.0.0/clang/lib/Frontend/InitPreprocessor.cpp#L1226
    Reviewed-on: https://review.openocd.org/c/openocd/+/7544
    Tested-by: jenkins

diff --git a/src/helper/compiler.h b/src/helper/compiler.h
index 8f6c09950..33a075d64 100644
--- a/src/helper/compiler.h
+++ b/src/helper/compiler.h
@@ -32,7 +32,15 @@
 /*
  * The __nonnull function attribute marks pointer parameters that
  * must not be NULL.
+ *
+ * clang for Apple defines
+ * #define __nonnull _Nonnull
+ * that is a per argument attribute, incompatible with the gcc per function attribute __nonnull__.
+ * Undefine it to keep compatibility among compilers.
  */
+#if defined(__clang__) && defined(__APPLE__)
+# undef __nonnull
+#endif
 #ifndef __nonnull
 # if __has_attribute(__nonnull__)
 #  define __nonnull(params) __attribute__ ((__nonnull__ params))

-----------------------------------------------------------------------

Summary of changes:
 src/helper/compiler.h | 8 ++++++++
 1 file changed, 8 insertions(+)


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       via  b6b4f9d46a48aadc1de6bb5152ff4913661c9059 (commit)
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- Log -----------------------------------------------------------------
commit b6b4f9d46a48aadc1de6bb5152ff4913661c9059
Author: Kai Schmitz <kai...@ad...>
Date:   Thu Jan 5 13:50:53 2023 +0100

    svf: new command line options -noreset and -addcycles
    
    -noreset: when using several SVF input files in a sequence it is not always
     desireable to have a JTAG reset between the execution of the files.
     The -noreset option skips this unwanted reset.
    
    -addcycles <x>: some tests rely on a certain number of extra clock cycles
     between the actual JTAG commands. The -addcycles option injects a number
     x cycles after each SDR instruction.
    
    Signed-off-by: Kai Schmitz <kai...@ad...>
    Change-Id: I31932d6041dbc803be00016cd0a4f23fb2e7dbe1
    Reviewed-on: https://review.openocd.org/c/openocd/+/7433
    Tested-by: jenkins
    Reviewed-by: Antonio Borneo <bor...@gm...>

diff --git a/doc/openocd.texi b/doc/openocd.texi
index 414b4c405..0de101b6d 100644
--- a/doc/openocd.texi
+++ b/doc/openocd.texi
@@ -11433,7 +11433,8 @@ In a debug session using JTAG for its transport protocol,
 OpenOCD supports running such test files.
 
 @deffn {Command} {svf} @file{filename} [@option{-tap @var{tapname}}] [@option{[-]quiet}] @
-                     [@option{[-]nil}] [@option{[-]progress}] [@option{[-]ignore_error}]
+                     [@option{[-]nil}] [@option{[-]progress}] [@option{[-]ignore_error}] @
+                     [@option{-noreset}] [@option{-addcycles @var{cyclecount}}]
 This issues a JTAG reset (Test-Logic-Reset) and then
 runs the SVF script from @file{filename}.
 
@@ -11452,6 +11453,10 @@ on the real interface;
 @item @option{[-]progress} enable progress indication;
 @item @option{[-]ignore_error} continue execution despite TDO check
 errors.
+@item @option{-noreset} omit JTAG reset (Test-Logic-Reset) before executing
+content of the SVF file;
+@item @option{-addcycles @var{cyclecount}} inject @var{cyclecount} number of
+additional TCLK cycles after each SDR scan instruction;
 @end itemize
 @end deffn
 
diff --git a/src/svf/svf.c b/src/svf/svf.c
index a5374316e..719588067 100644
--- a/src/svf/svf.c
+++ b/src/svf/svf.c
@@ -22,6 +22,7 @@
 #include "svf.h"
 #include "helper/system.h"
 #include <helper/time_support.h>
+#include <stdbool.h>
 
 /* SVF command */
 enum svf_command {
@@ -139,6 +140,9 @@ static const struct svf_statemove svf_statemoves[] = {
 #define XXR_TDO				(1 << 1)
 #define XXR_MASK			(1 << 2)
 #define XXR_SMASK			(1 << 3)
+
+#define SVF_MAX_ADDCYCLES	255
+
 struct svf_xxr_para {
 	int len;
 	int data_mask;
@@ -220,6 +224,8 @@ static int svf_buffer_index, svf_buffer_size;
 static int svf_quiet;
 static int svf_nil;
 static int svf_ignore_error;
+static bool svf_noreset;
+static int svf_addcycles;
 
 /* Targeting particular tap */
 static int svf_tap_is_specified;
@@ -343,7 +349,7 @@ int svf_add_statemove(tap_state_t state_to)
 COMMAND_HANDLER(handle_svf_command)
 {
 #define SVF_MIN_NUM_OF_OPTIONS 1
-#define SVF_MAX_NUM_OF_OPTIONS 5
+#define SVF_MAX_NUM_OF_OPTIONS 8
 	int command_num = 0;
 	int ret = ERROR_OK;
 	int64_t time_measure_ms;
@@ -363,8 +369,18 @@ COMMAND_HANDLER(handle_svf_command)
 	svf_nil = 0;
 	svf_progress_enabled = 0;
 	svf_ignore_error = 0;
+	svf_noreset = false;
+	svf_addcycles = 0;
+
 	for (unsigned int i = 0; i < CMD_ARGC; i++) {
-		if (strcmp(CMD_ARGV[i], "-tap") == 0) {
+		if (strcmp(CMD_ARGV[i], "-addcycles") == 0) {
+			svf_addcycles = atoi(CMD_ARGV[i + 1]);
+			if (svf_addcycles > SVF_MAX_ADDCYCLES) {
+				command_print(CMD, "addcycles: %s out of range", CMD_ARGV[i + 1]);
+				return ERROR_FAIL;
+			}
+			i++;
+		} else if (strcmp(CMD_ARGV[i], "-tap") == 0) {
 			tap = jtag_tap_by_string(CMD_ARGV[i+1]);
 			if (!tap) {
 				command_print(CMD, "Tap: %s unknown", CMD_ARGV[i+1]);
@@ -382,6 +398,8 @@ COMMAND_HANDLER(handle_svf_command)
 		else if ((strcmp(CMD_ARGV[i],
 				  "ignore_error") == 0) || (strcmp(CMD_ARGV[i], "-ignore_error") == 0))
 			svf_ignore_error = 1;
+		else if (strcmp(CMD_ARGV[i], "-noreset") == 0)
+			svf_noreset = true;
 		else {
 			svf_fd = fopen(CMD_ARGV[i], "r");
 			if (!svf_fd) {
@@ -424,7 +442,7 @@ COMMAND_HANDLER(handle_svf_command)
 
 	memcpy(&svf_para, &svf_para_init, sizeof(svf_para));
 
-	if (!svf_nil) {
+	if (!svf_nil && !svf_noreset) {
 		/* TAP_RESET */
 		jtag_add_tlr();
 	}
@@ -1189,6 +1207,9 @@ xxr_common:
 							svf_para.dr_end_state);
 				}
 
+				if (svf_addcycles)
+					jtag_add_clocks(svf_addcycles);
+
 				svf_buffer_index += (i + 7) >> 3;
 			} else if (command == SIR) {
 				/* check buffer size first, reallocate if necessary */
@@ -1545,7 +1566,7 @@ static const struct command_registration svf_command_handlers[] = {
 		.handler = handle_svf_command,
 		.mode = COMMAND_EXEC,
 		.help = "Runs a SVF file.",
-		.usage = "[-tap device.tap] <file> [quiet] [nil] [progress] [ignore_error]",
+		.usage = "[-tap device.tap] <file> [quiet] [nil] [progress] [ignore_error] [-noreset] [-addcycles numcycles]",
 	},
 	COMMAND_REGISTRATION_DONE
 };

-----------------------------------------------------------------------

Summary of changes:
 doc/openocd.texi |  7 ++++++-
 src/svf/svf.c    | 29 +++++++++++++++++++++++++----
 2 files changed, 31 insertions(+), 5 deletions(-)


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commit b4e28446b8f2a116b088eef78744c8b529c1a747
Author: Antonio Borneo <bor...@gm...>
Date:   Mon Mar 6 23:18:35 2023 +0100

    tcl: remove exec permission to tcl config files
    
    With the new checkpatch we will not get this type of issues
    anymore.
    In mean time, let's fix what we have missed during the review
    process.
    
    Change-Id: Iecebf9d43f51a29ee09505d360792793afd24b40
    Signed-off-by: Antonio Borneo <bor...@gm...>
    Fixes: 53556fcded05 ("tcl/interface: add Ashling Opella-LD FTDI config files")
    Reviewed-on: https://review.openocd.org/c/openocd/+/7530
    Tested-by: jenkins

diff --git a/tcl/interface/ftdi/ashling-opella-ld-jtag.cfg b/tcl/interface/ftdi/ashling-opella-ld-jtag.cfg
old mode 100755
new mode 100644
diff --git a/tcl/interface/ftdi/ashling-opella-ld-swd.cfg b/tcl/interface/ftdi/ashling-opella-ld-swd.cfg
old mode 100755
new mode 100644

-----------------------------------------------------------------------

Summary of changes:
 tcl/interface/ftdi/ashling-opella-ld-jtag.cfg | 0
 tcl/interface/ftdi/ashling-opella-ld-swd.cfg  | 0
 2 files changed, 0 insertions(+), 0 deletions(-)
 mode change 100755 => 100644 tcl/interface/ftdi/ashling-opella-ld-jtag.cfg
 mode change 100755 => 100644 tcl/interface/ftdi/ashling-opella-ld-swd.cfg


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commit 1528845331ad260bebda6b88b880baf725ffb3c3
Author: Marc Schink <de...@za...>
Date:   Thu Feb 9 11:23:28 2023 +0100

    tcl/tools/test_cpu_speed: Fix register name
    
    Use correct register name after it has beed changed
    in commit 11ee500bffe4 ("target/armv7m: Rename xPSR to xpsr")
    
    Change-Id: I3648848f4b47af2d20d60c3e0ecef78f75f6d605
    Signed-off-by: Marc Schink <de...@za...>
    Reviewed-on: https://review.openocd.org/c/openocd/+/7473
    Tested-by: jenkins
    Reviewed-by: Antonio Borneo <bor...@gm...>

diff --git a/tcl/tools/test_cpu_speed.tcl b/tcl/tools/test_cpu_speed.tcl
index cef2bbbd7..f1a3fb30e 100644
--- a/tcl/tools/test_cpu_speed.tcl
+++ b/tcl/tools/test_cpu_speed.tcl
@@ -18,7 +18,7 @@ proc cortex_m_test_cpu_speed { address { timeout 200 } { cycles_per_loop 4 } } {
 	halt
 
 	# Backup registers and memory.
-	set backup_regs [get_reg -force {pc r0 xPSR}]
+	set backup_regs [get_reg -force {pc r0 xpsr}]
 	set backup_mem [read_memory $address 16 3]
 
 	# We place the following code at the given address to measure the

-----------------------------------------------------------------------

Summary of changes:
 tcl/tools/test_cpu_speed.tcl | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)


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commit dccf323c1f78d015f75db4cef8cdc33523e1abd6
Author: Antonio Borneo <bor...@gm...>
Date:   Sat Mar 4 12:08:58 2023 +0100

    jimtcl: update to version 0.82
    
    The new version modifies it's auto configure in change
            https://github.com/msteveb/jimtcl/commit/ccd47be13019
    stating:
            configure: Default to --full
            Now use --minimal and/or --without-ext to disable things.
    
    With such change jimtcl doesn't build anymore as OpenOCD submodule
    because of errors linking with new dependencies openssl and zlib.
    
    Use option --minimal to keep the same build configuration as with
    former jimtcl 0.81.
    Add option --disable-ssl to avoid a build error on system with no
    ssl libraries installed. This is already fixed in jimtcl upstream
    but not part of 0.82. Note that ssl is not currently used by
    OpenOCD.
    
    Change-Id: I0879891dbd083bfbff1e904daf6cd549c3329bbf
    Signed-off-by: Antonio Borneo <bor...@gm...>
    Reviewed-on: https://review.openocd.org/c/openocd/+/7517
    Tested-by: jenkins

diff --git a/configure.ac b/configure.ac
index cc7139c7c..ac2808e1f 100644
--- a/configure.ac
+++ b/configure.ac
@@ -571,9 +571,9 @@ AS_IF([test "x$enable_buspirate" != "xno"], [
 AS_IF([test "x$use_internal_jimtcl" = "xyes"], [
   AS_IF([test -f "$srcdir/jimtcl/configure"], [
     AS_IF([test "x$use_internal_jimtcl_maintainer" = "xyes"], [
-      jimtcl_config_options="--disable-install-jim --with-ext=json --maintainer"
+      jimtcl_config_options="--disable-install-jim --with-ext=json --minimal --disable-ssl --maintainer"
     ], [
-      jimtcl_config_options="--disable-install-jim --with-ext=json"
+      jimtcl_config_options="--disable-install-jim --with-ext=json --minimal --disable-ssl"
     ])
     AX_CONFIG_SUBDIR_OPTION([jimtcl], [$jimtcl_config_options])
   ], [
diff --git a/jimtcl b/jimtcl
index a77ef1a62..1933e5457 160000
--- a/jimtcl
+++ b/jimtcl
@@ -1 +1 @@
-Subproject commit a77ef1a6218fad4c928ddbdc03c1aedc41007e70
+Subproject commit 1933e5457b9512d39ebbe11ed32578aada149f49

-----------------------------------------------------------------------

Summary of changes:
 configure.ac | 4 ++--
 jimtcl       | 2 +-
 2 files changed, 3 insertions(+), 3 deletions(-)


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commit 45eeeab3080991168a07854af5dded926a22253c
Author: Antonio Borneo <bor...@gm...>
Date:   Mon Mar 6 00:27:58 2023 +0100

    build: fix distcheck for jimtcl
    
    The issues have been highlighted while integrated jimtcl 0.82,
    but were already present.
    
    While building jimtcl as submodule, OpenOCD generates the file
    jimtcl/configure.gnu to pass specific configure flags.
    Issue 1: this file is not included in the distribution.
    This causes the rebuild from the distribution to have a jimtcl
    built with different (the default) configure flags.
    With jimtcl 0.82 the new default is to enable all the features,
    but a bug causes the build to fail when openssl is not installed
    in the build system (the bug is already fixed but after 0.82 [1]).
    All these together cause OpenOCD Jenkins to fail the build for
    target 'distcheck' with jimtcl 0.82.
    
    Add jimtcl/configure.gnu to OpenOCD distribution's file list.
    
    The build system considers jimtcl/configure.gnu as a temporarily
    file that should be removed during 'distclean'.
    Issue 2: 'distcheck' set read-only permission to the source files,
    including jimtcl/configure.gnu, so 'distclean' fails removing it.
    
    Add a leading '-' to ignore errors while trying to remove the
    file.
    
    Issue 3: Now that 'distcheck' properly configures and builds
    jimtcl, 'distcheck' still fails because we have enabled jimtcl
    json support in [2] and jimtcl 'distclean' fails to properly
    remove one object file (fixed after 0.82 [3]).
    
    Make OpenOCD removing the file jimtcl/jsmn/jsmn.o to complete
    the execution of 'distcheck'. Add a comment specifying which of
    the jimtcl versions are affected.
    
    Change-Id: I2f9153c5a41ba66b989b27c7bc57b38d1744cc29
    Signed-off-by: Antonio Borneo <bor...@gm...>
    Link: [1] https://github.com/msteveb/jimtcl/commit/22277943a19c
    Link: [2] 0a36acbf6ac6 ("configure: build jimtcl with json extension")
    Link: [3] https://github.com/msteveb/jimtcl/commit/32a488587a3e
    Reviewed-on: https://review.openocd.org/c/openocd/+/7527
    Tested-by: jenkins
    Reviewed-by: zapb <de...@za...>

diff --git a/Makefile.am b/Makefile.am
index 41daf9522..fa92da912 100644
--- a/Makefile.am
+++ b/Makefile.am
@@ -26,10 +26,14 @@ noinst_LTLIBRARIES =
 info_TEXINFOS =
 dist_man_MANS =
 EXTRA_DIST =
+DISTCLEANFILES =
 
 if INTERNAL_JIMTCL
 SUBDIRS += jimtcl
 DIST_SUBDIRS += jimtcl
+EXTRA_DIST += jimtcl/configure.gnu
+# jimtcl from 0.79 to 0.82 miss cleaning jsmn.o
+DISTCLEANFILES += jimtcl/jsmn/jsmn.o
 endif
 
 # common flags used in openocd build
@@ -129,9 +133,9 @@ uninstall-hook:
 
 distclean-local:
 	rm -rf Doxyfile doxygen
-	rm -f $(srcdir)/jimtcl/configure.gnu
+	-rm -f $(srcdir)/jimtcl/configure.gnu
 
-DISTCLEANFILES = doxygen.log
+DISTCLEANFILES += doxygen.log
 
 METASOURCES = AUTO
 

-----------------------------------------------------------------------

Summary of changes:
 Makefile.am | 8 ++++++--
 1 file changed, 6 insertions(+), 2 deletions(-)


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commit 642735449a3a7297126a3dd9b76ffaaca74a1752
Author: Antonio Borneo <bor...@gm...>
Date:   Sat Mar 4 19:19:16 2023 +0100

    openocd: drop JIM_EMBEDDED macro
    
    The macro JIM_EMBEDDED was required to be defined before including
    jim.h in applications that embed jimtcl.
    This requirement has been dropped in 2010 by removing the file
    dos/Embedder-HOWTO.txt from jimtcl in
    https://github.com/msteveb/jimtcl/commit/2d8564100c86#diff-3e93fa55e666
    
    Drop the macro definition and the comment that mandates it.
    
    Change-Id: I36883f60f25bb25839e4ebf908159569659764dd
    Signed-off-by: Antonio Borneo <bor...@gm...>
    Reviewed-on: https://review.openocd.org/c/openocd/+/7518
    Tested-by: jenkins

diff --git a/src/helper/command.c b/src/helper/command.c
index 12434ec90..b358e18aa 100644
--- a/src/helper/command.c
+++ b/src/helper/command.c
@@ -18,9 +18,6 @@
 #include "config.h"
 #endif
 
-/* see Embedded-HOWTO.txt in Jim Tcl project hosted on BerliOS*/
-#define JIM_EMBEDDED
-
 /* @todo the inclusion of target.h here is a layering violation */
 #include <jtag/jtag.h>
 #include <target/target.h>

-----------------------------------------------------------------------

Summary of changes:
 src/helper/command.c | 3 ---
 1 file changed, 3 deletions(-)


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commit e8f376e3c1874ccd14e148164d9695a93c575def
Author: Antonio Borneo <bor...@gm...>
Date:   Sat Mar 4 23:56:35 2023 +0100

    helper: add compiler.h to handle compiler specific workarounds
    
    Not all compilers nor compiler versions supports the attributes
    used in OpenOCD code.
    Collect in a single file the workaround to handle them.
    
    Change-Id: I92d871337281169134ce8e40b2064591518be71f
    Signed-off-by: Antonio Borneo <bor...@gm...>
    Reviewed-on: https://review.openocd.org/c/openocd/+/7519
    Tested-by: jenkins
    Reviewed-by: Tomas Vanek <va...@fb...>

diff --git a/src/helper/Makefile.am b/src/helper/Makefile.am
index e9c05cfc5..e0fa331ea 100644
--- a/src/helper/Makefile.am
+++ b/src/helper/Makefile.am
@@ -34,7 +34,8 @@ noinst_LTLIBRARIES += %D%/libhelper.la
 	%D%/jep106.h \
 	%D%/jep106.inc \
 	%D%/jim-nvp.h \
-	%D%/nvp.h
+	%D%/nvp.h \
+	%D%/compiler.h
 
 STARTUP_TCL_SRCS += %D%/startup.tcl
 EXTRA_DIST += \
diff --git a/src/helper/compiler.h b/src/helper/compiler.h
new file mode 100644
index 000000000..8f6c09950
--- /dev/null
+++ b/src/helper/compiler.h
@@ -0,0 +1,44 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
+/*
+ * This file contains compiler specific workarounds to handle different
+ * compilers and different compiler versions.
+ * Inspired by Linux's include/linux/compiler_attributes.h
+ * and file sys/cdefs.h in libc and newlib.
+ */
+
+#ifndef OPENOCD_HELPER_COMPILER_H
+#define OPENOCD_HELPER_COMPILER_H
+
+/*
+ * __has_attribute is supported on gcc >= 5, clang >= 2.9 and icc >= 17.
+ */
+#ifndef __has_attribute
+# define __has_attribute(x) 0
+#endif
+
+/*
+ * The __returns_nonnull function attribute marks the return type of the function
+ * as always being non-null.
+ */
+#ifndef __returns_nonnull
+# if __has_attribute(__returns_nonnull__)
+#  define __returns_nonnull __attribute__((__returns_nonnull__))
+# else
+#  define __returns_nonnull
+# endif
+#endif
+
+/*
+ * The __nonnull function attribute marks pointer parameters that
+ * must not be NULL.
+ */
+#ifndef __nonnull
+# if __has_attribute(__nonnull__)
+#  define __nonnull(params) __attribute__ ((__nonnull__ params))
+# else
+#  define __nonnull(params)
+# endif
+#endif
+
+#endif /* OPENOCD_HELPER_COMPILER_H */
diff --git a/src/helper/nvp.h b/src/helper/nvp.h
index 125164e4e..14bd9b028 100644
--- a/src/helper/nvp.h
+++ b/src/helper/nvp.h
@@ -20,6 +20,8 @@
 #ifndef OPENOCD_HELPER_NVP_H
 #define OPENOCD_HELPER_NVP_H
 
+#include <helper/compiler.h>
+
 /** Name Value Pairs, aka: NVP
  *   -  Given a string - return the associated int.
  *   -  Given a number - return the associated string.
@@ -65,9 +67,9 @@ struct command_invocation;
 
 /* Name Value Pairs Operations */
 const struct nvp *nvp_name2value(const struct nvp *nvp_table, const char *name)
-	__attribute__((returns_nonnull, nonnull(1)));
+	__returns_nonnull __nonnull((1));
 const struct nvp *nvp_value2name(const struct nvp *nvp_table, int v)
-	__attribute__((returns_nonnull, nonnull(1)));
+	__returns_nonnull __nonnull((1));
 
 void nvp_unknown_command_print(struct command_invocation *cmd, const struct nvp *nvp,
 	const char *param_name, const char *param_value);

-----------------------------------------------------------------------

Summary of changes:
 src/helper/Makefile.am |  3 ++-
 src/helper/compiler.h  | 44 ++++++++++++++++++++++++++++++++++++++++++++
 src/helper/nvp.h       |  6 ++++--
 3 files changed, 50 insertions(+), 3 deletions(-)
 create mode 100644 src/helper/compiler.h


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commit 904d58c208ab03f09f8d8e7184d49f42f6e16533
Author: Ian Thompson <ia...@ca...>
Date:   Fri Nov 4 14:54:24 2022 -0700

    target/xtensa: add NX support
    
    - Manual integration of NX support from xt0.2 release
    - No new clang static analysis warnings
    
    Signed-off-by: Ian Thompson <ia...@ca...>
    Change-Id: I95b51ccc83e56c0d4dbf09e01969ed6a4a93d497
    Reviewed-on: https://review.openocd.org/c/openocd/+/7356
    Tested-by: jenkins
    Reviewed-by: Antonio Borneo <bor...@gm...>

diff --git a/src/target/xtensa/xtensa.c b/src/target/xtensa/xtensa.c
index b57e2d660..fcd00487c 100644
--- a/src/target/xtensa/xtensa.c
+++ b/src/target/xtensa/xtensa.c
@@ -165,6 +165,7 @@
 #define XT_SR_DDR         (xtensa_regs[XT_REG_IDX_DDR].reg_num)
 #define XT_SR_PS          (xtensa_regs[XT_REG_IDX_PS].reg_num)
 #define XT_SR_WB          (xtensa_regs[XT_REG_IDX_WINDOWBASE].reg_num)
+#define XT_REG_A0         (xtensa_regs[XT_REG_IDX_AR0].reg_num)
 #define XT_REG_A3         (xtensa_regs[XT_REG_IDX_AR3].reg_num)
 #define XT_REG_A4         (xtensa_regs[XT_REG_IDX_AR4].reg_num)
 
@@ -173,6 +174,7 @@
 #define XT_EPC_REG_NUM_BASE         (0xb0U)	/* (EPC1 - 1), for adding DBGLEVEL */
 #define XT_PC_REG_NUM_VIRTUAL       (0xffU)	/* Marker for computing PC (EPC[DBGLEVEL) */
 #define XT_PC_DBREG_NUM_BASE        (0x20U)	/* External (i.e., GDB) access */
+#define XT_NX_IBREAKC_BASE          (0xc0U)	/* (IBREAKC0..IBREAKC1) for NX */
 
 #define XT_SW_BREAKPOINTS_MAX_NUM       32
 #define XT_HW_IBREAK_MAX_NUM            2
@@ -476,7 +478,9 @@ static enum xtensa_reg_id xtensa_windowbase_offset_to_canonical(struct xtensa *x
 		LOG_ERROR("Error: can't convert register %d to non-windowbased register!", reg_idx);
 		return -1;
 	}
-	return ((idx + windowbase * 4) & (xtensa->core_config->aregs_num - 1)) + XT_REG_IDX_AR0;
+	/* Each windowbase value represents 4 registers on LX and 8 on NX */
+	int base_inc = (xtensa->core_config->core_type == XT_LX) ? 4 : 8;
+	return ((idx + windowbase * base_inc) & (xtensa->core_config->aregs_num - 1)) + XT_REG_IDX_AR0;
 }
 
 static enum xtensa_reg_id xtensa_canonical_to_windowbase_offset(struct xtensa *xtensa,
@@ -526,26 +530,29 @@ static int xtensa_queue_pwr_reg_write(struct xtensa *xtensa, unsigned int reg, u
 static int xtensa_window_state_save(struct target *target, uint32_t *woe)
 {
 	struct xtensa *xtensa = target_to_xtensa(target);
-	int woe_dis;
+	unsigned int woe_sr = (xtensa->core_config->core_type == XT_LX) ? XT_SR_PS : XT_SR_WB;
+	uint32_t woe_dis;
 	uint8_t woe_buf[4];
 
 	if (xtensa->core_config->windowed) {
-		/* Save PS (LX) and disable window overflow exceptions prior to AR save */
-		xtensa_queue_exec_ins(xtensa, XT_INS_RSR(xtensa, XT_SR_PS, XT_REG_A3));
+		/* Save PS (LX) or WB (NX) and disable window overflow exceptions prior to AR save */
+		xtensa_queue_exec_ins(xtensa, XT_INS_RSR(xtensa, woe_sr, XT_REG_A3));
 		xtensa_queue_exec_ins(xtensa, XT_INS_WSR(xtensa, XT_SR_DDR, XT_REG_A3));
 		xtensa_queue_dbg_reg_read(xtensa, XDMREG_DDR, woe_buf);
 		int res = xtensa_dm_queue_execute(&xtensa->dbg_mod);
 		if (res != ERROR_OK) {
-			LOG_ERROR("Failed to read PS (%d)!", res);
+			LOG_TARGET_ERROR(target, "Failed to read %s (%d)!",
+				(woe_sr == XT_SR_PS) ? "PS" : "WB", res);
 			return res;
 		}
 		xtensa_core_status_check(target);
 		*woe = buf_get_u32(woe_buf, 0, 32);
-		woe_dis = *woe & ~XT_PS_WOE_MSK;
-		LOG_DEBUG("Clearing PS.WOE (0x%08" PRIx32 " -> 0x%08" PRIx32 ")", *woe, woe_dis);
+		woe_dis = *woe & ~((woe_sr == XT_SR_PS) ? XT_PS_WOE_MSK : XT_WB_S_MSK);
+		LOG_TARGET_DEBUG(target, "Clearing %s (0x%08" PRIx32 " -> 0x%08" PRIx32 ")",
+			(woe_sr == XT_SR_PS) ? "PS.WOE" : "WB.S", *woe, woe_dis);
 		xtensa_queue_dbg_reg_write(xtensa, XDMREG_DDR, woe_dis);
 		xtensa_queue_exec_ins(xtensa, XT_INS_RSR(xtensa, XT_SR_DDR, XT_REG_A3));
-		xtensa_queue_exec_ins(xtensa, XT_INS_WSR(xtensa, XT_SR_PS, XT_REG_A3));
+		xtensa_queue_exec_ins(xtensa, XT_INS_WSR(xtensa, woe_sr, XT_REG_A3));
 	}
 	return ERROR_OK;
 }
@@ -554,12 +561,14 @@ static int xtensa_window_state_save(struct target *target, uint32_t *woe)
 static void xtensa_window_state_restore(struct target *target, uint32_t woe)
 {
 	struct xtensa *xtensa = target_to_xtensa(target);
+	unsigned int woe_sr = (xtensa->core_config->core_type == XT_LX) ? XT_SR_PS : XT_SR_WB;
 	if (xtensa->core_config->windowed) {
 		/* Restore window overflow exception state */
 		xtensa_queue_dbg_reg_write(xtensa, XDMREG_DDR, woe);
 		xtensa_queue_exec_ins(xtensa, XT_INS_RSR(xtensa, XT_SR_DDR, XT_REG_A3));
-		xtensa_queue_exec_ins(xtensa, XT_INS_WSR(xtensa, XT_SR_PS, XT_REG_A3));
-		LOG_DEBUG("Restored PS.WOE (0x%08" PRIx32 ")", woe);
+		xtensa_queue_exec_ins(xtensa, XT_INS_WSR(xtensa, woe_sr, XT_REG_A3));
+		LOG_TARGET_DEBUG(target, "Restored %s (0x%08" PRIx32 ")",
+			(woe_sr == XT_SR_PS) ? "PS.WOE" : "WB", woe);
 	}
 }
 
@@ -596,6 +605,10 @@ static int xtensa_write_dirty_registers(struct target *target)
 	bool preserve_a3 = false;
 	uint8_t a3_buf[4];
 	xtensa_reg_val_t a3 = 0, woe;
+	unsigned int ms_idx = (xtensa->core_config->core_type == XT_NX) ?
+		xtensa->nx_reg_idx[XT_NX_REG_IDX_MS] : reg_list_size;
+	xtensa_reg_val_t ms;
+	bool restore_ms = false;
 
 	LOG_TARGET_DEBUG(target, "start");
 
@@ -627,13 +640,25 @@ static int xtensa_write_dirty_registers(struct target *target)
 					} else if (rlist[ridx].type == XT_REG_FR) {
 						xtensa_queue_exec_ins(xtensa, XT_INS_WFR(xtensa, reg_num, XT_REG_A3));
 					} else {/*SFR */
-						if (reg_num == XT_PC_REG_NUM_VIRTUAL)
-							/* reg number of PC for debug interrupt depends on NDEBUGLEVEL
-							 **/
-							reg_num =
-								(XT_EPC_REG_NUM_BASE +
-								xtensa->core_config->debug.irq_level);
-						xtensa_queue_exec_ins(xtensa, XT_INS_WSR(xtensa, reg_num, XT_REG_A3));
+						if (reg_num == XT_PC_REG_NUM_VIRTUAL) {
+							if (xtensa->core_config->core_type == XT_LX) {
+								/* reg number of PC for debug interrupt depends on NDEBUGLEVEL */
+								reg_num = (XT_EPC_REG_NUM_BASE + xtensa->core_config->debug.irq_level);
+								xtensa_queue_exec_ins(xtensa, XT_INS_WSR(xtensa, reg_num, XT_REG_A3));
+							} else {
+								/* NX PC set through issuing a jump instruction */
+								xtensa_queue_exec_ins(xtensa, XT_INS_JX(xtensa, XT_REG_A3));
+							}
+						} else if (i == ms_idx) {
+							/* MS must be restored after ARs.  This ensures ARs remain in correct
+							 * order even for reversed register groups (overflow/underflow).
+							 */
+							ms = regval;
+							restore_ms = true;
+							LOG_TARGET_DEBUG(target, "Delaying MS write: 0x%x", ms);
+						} else {
+							xtensa_queue_exec_ins(xtensa, XT_INS_WSR(xtensa, reg_num, XT_REG_A3));
+						}
 					}
 				}
 				reg_list[i].dirty = false;
@@ -648,12 +673,12 @@ static int xtensa_write_dirty_registers(struct target *target)
 		xtensa_queue_dbg_reg_write(xtensa, XDMREG_DDR, regval);
 		xtensa_queue_exec_ins(xtensa, XT_INS_RSR(xtensa, XT_SR_DDR, XT_REG_A3));
 		xtensa_queue_exec_ins(xtensa, XT_INS_WSR(xtensa,
-				xtensa_regs[XT_REG_IDX_CPENABLE].reg_num,
-				XT_REG_A3));
+			xtensa_regs[XT_REG_IDX_CPENABLE].reg_num,
+			XT_REG_A3));
 		reg_list[XT_REG_IDX_CPENABLE].dirty = false;
 	}
 
-	preserve_a3 = (xtensa->core_config->windowed);
+	preserve_a3 = (xtensa->core_config->windowed) || (xtensa->core_config->core_type == XT_NX);
 	if (preserve_a3) {
 		/* Save (windowed) A3 for scratch use */
 		xtensa_queue_exec_ins(xtensa, XT_INS_WSR(xtensa, XT_SR_DDR, XT_REG_A3));
@@ -670,7 +695,12 @@ static int xtensa_write_dirty_registers(struct target *target)
 		if (res != ERROR_OK)
 			return res;
 		/* Grab the windowbase, we need it. */
-		windowbase = xtensa_reg_get(target, XT_REG_IDX_WINDOWBASE);
+		uint32_t wb_idx = (xtensa->core_config->core_type == XT_LX) ?
+			XT_REG_IDX_WINDOWBASE : xtensa->nx_reg_idx[XT_NX_REG_IDX_WB];
+		windowbase = xtensa_reg_get(target, wb_idx);
+		if (xtensa->core_config->core_type == XT_NX)
+			windowbase = (windowbase & XT_WB_P_MSK) >> XT_WB_P_SHIFT;
+
 		/* Check if there are mismatches between the ARx and corresponding Ax registers.
 		 * When the user sets a register on a windowed config, xt-gdb may set the ARx
 		 * register directly.  Thus we take ARx as priority over Ax if both are dirty
@@ -748,10 +778,12 @@ static int xtensa_write_dirty_registers(struct target *target)
 					}
 				}
 			}
-			/*Now rotate the window so we'll see the next 16 registers. The final rotate
-			 * will wraparound, */
-			/*leaving us in the state we were. */
-			xtensa_queue_exec_ins(xtensa, XT_INS_ROTW(xtensa, 4));
+
+			/* Now rotate the window so we'll see the next 16 registers. The final rotate
+			 * will wraparound, leaving us in the state we were.
+			 * Each ROTW rotates 4 registers on LX and 8 on NX */
+			int rotw_arg = (xtensa->core_config->core_type == XT_LX) ? 4 : 2;
+			xtensa_queue_exec_ins(xtensa, XT_INS_ROTW(xtensa, rotw_arg));
 		}
 
 		xtensa_window_state_restore(target, woe);
@@ -760,6 +792,14 @@ static int xtensa_write_dirty_registers(struct target *target)
 			xtensa->scratch_ars[s].intval = false;
 	}
 
+	if (restore_ms) {
+		uint32_t ms_regno = xtensa->optregs[ms_idx - XT_NUM_REGS].reg_num;
+		xtensa_queue_dbg_reg_write(xtensa, XDMREG_DDR, ms);
+		xtensa_queue_exec_ins(xtensa, XT_INS_RSR(xtensa, XT_SR_DDR, XT_REG_A3));
+		xtensa_queue_exec_ins(xtensa, XT_INS_WSR(xtensa, ms_regno, XT_REG_A3));
+		LOG_TARGET_DEBUG(target, "Delayed MS (0x%x) write complete: 0x%x", ms_regno, ms);
+	}
+
 	if (preserve_a3) {
 		xtensa_queue_dbg_reg_write(xtensa, XDMREG_DDR, a3);
 		xtensa_queue_exec_ins(xtensa, XT_INS_RSR(xtensa, XT_SR_DDR, XT_REG_A3));
@@ -877,10 +917,41 @@ static inline void xtensa_reg_set_value(struct reg *reg, xtensa_reg_val_t value)
 	reg->dirty = true;
 }
 
+static int xtensa_imprecise_exception_occurred(struct target *target)
+{
+	struct xtensa *xtensa = target_to_xtensa(target);
+	for (enum xtensa_nx_reg_idx idx = XT_NX_REG_IDX_IEVEC; idx <= XT_NX_REG_IDX_MESR; idx++) {
+		enum xtensa_reg_id ridx = xtensa->nx_reg_idx[idx];
+		if (xtensa->nx_reg_idx[idx]) {
+			xtensa_reg_val_t reg = xtensa_reg_get(target, xtensa->nx_reg_idx[idx]);
+			if (reg & XT_IMPR_EXC_MSK) {
+				LOG_TARGET_DEBUG(target, "Imprecise exception: %s: 0x%x",
+					xtensa->core_cache->reg_list[ridx].name, reg);
+				return true;
+			}
+		}
+	}
+	return false;
+}
+
+static void xtensa_imprecise_exception_clear(struct target *target)
+{
+	struct xtensa *xtensa = target_to_xtensa(target);
+	for (enum xtensa_nx_reg_idx idx = XT_NX_REG_IDX_IEVEC; idx <= XT_NX_REG_IDX_MESRCLR; idx++) {
+		enum xtensa_reg_id ridx = xtensa->nx_reg_idx[idx];
+		if (ridx && idx != XT_NX_REG_IDX_MESR) {
+			xtensa_reg_val_t value = (idx == XT_NX_REG_IDX_MESRCLR) ? XT_MESRCLR_IMPR_EXC_MSK : 0;
+			xtensa_reg_set(target, ridx, value);
+			LOG_TARGET_DEBUG(target, "Imprecise exception: clearing %s (0x%x)",
+				xtensa->core_cache->reg_list[ridx].name, value);
+		}
+	}
+}
+
 int xtensa_core_status_check(struct target *target)
 {
 	struct xtensa *xtensa = target_to_xtensa(target);
-	int res, needclear = 0;
+	int res, needclear = 0, needimprclear = 0;
 
 	xtensa_dm_core_status_read(&xtensa->dbg_mod);
 	xtensa_dsr_t dsr = xtensa_dm_core_status_get(&xtensa->dbg_mod);
@@ -904,11 +975,20 @@ int xtensa_core_status_check(struct target *target)
 				dsr);
 		needclear = 1;
 	}
+	if (xtensa->core_config->core_type == XT_NX && (xtensa_imprecise_exception_occurred(target))) {
+		if (!xtensa->suppress_dsr_errors)
+			LOG_TARGET_ERROR(target,
+				"%s: Imprecise exception occurred!", target_name(target));
+		needclear = 1;
+		needimprclear = 1;
+	}
 	if (needclear) {
 		res = xtensa_dm_core_status_clear(&xtensa->dbg_mod,
 			OCDDSR_EXECEXCEPTION | OCDDSR_EXECOVERRUN);
 		if (res != ERROR_OK && !xtensa->suppress_dsr_errors)
 			LOG_TARGET_ERROR(target, "clearing DSR failed!");
+		if (xtensa->core_config->core_type == XT_NX && needimprclear)
+			xtensa_imprecise_exception_clear(target);
 		return ERROR_FAIL;
 	}
 	return ERROR_OK;
@@ -934,8 +1014,12 @@ void xtensa_reg_set(struct target *target, enum xtensa_reg_id reg_id, xtensa_reg
 void xtensa_reg_set_deep_relgen(struct target *target, enum xtensa_reg_id a_idx, xtensa_reg_val_t value)
 {
 	struct xtensa *xtensa = target_to_xtensa(target);
+	uint32_t wb_idx = (xtensa->core_config->core_type == XT_LX) ?
+		XT_REG_IDX_WINDOWBASE : xtensa->nx_reg_idx[XT_NX_REG_IDX_WB];
 	uint32_t windowbase = (xtensa->core_config->windowed ?
-		xtensa_reg_get(target, XT_REG_IDX_WINDOWBASE) : 0);
+		xtensa_reg_get(target, wb_idx) : 0);
+	if (xtensa->core_config->core_type == XT_NX)
+		windowbase = (windowbase & XT_WB_P_MSK) >> XT_WB_P_SHIFT;
 	int ar_idx = xtensa_windowbase_offset_to_canonical(xtensa, a_idx, windowbase);
 	xtensa_reg_set(target, a_idx, value);
 	xtensa_reg_set(target, ar_idx, value);
@@ -944,14 +1028,68 @@ void xtensa_reg_set_deep_relgen(struct target *target, enum xtensa_reg_id a_idx,
 /* Read cause for entering halted state; return bitmask in DEBUGCAUSE_* format */
 uint32_t xtensa_cause_get(struct target *target)
 {
-	return xtensa_reg_get(target, XT_REG_IDX_DEBUGCAUSE);
+	struct xtensa *xtensa = target_to_xtensa(target);
+	if (xtensa->core_config->core_type == XT_LX) {
+		/* LX cause in DEBUGCAUSE */
+		return xtensa_reg_get(target, XT_REG_IDX_DEBUGCAUSE);
+	}
+	if (xtensa->nx_stop_cause & DEBUGCAUSE_VALID)
+		return xtensa->nx_stop_cause;
+
+	/* NX cause determined from DSR.StopCause */
+	if (xtensa_dm_core_status_read(&xtensa->dbg_mod) != ERROR_OK) {
+		LOG_TARGET_ERROR(target, "Read DSR error");
+	} else {
+		uint32_t dsr = xtensa_dm_core_status_get(&xtensa->dbg_mod);
+		/* NX causes are prioritized; only 1 bit can be set */
+		switch ((dsr & OCDDSR_STOPCAUSE) >> OCDDSR_STOPCAUSE_SHIFT) {
+		case OCDDSR_STOPCAUSE_DI:
+			xtensa->nx_stop_cause = DEBUGCAUSE_DI;
+			break;
+		case OCDDSR_STOPCAUSE_SS:
+			xtensa->nx_stop_cause = DEBUGCAUSE_IC;
+			break;
+		case OCDDSR_STOPCAUSE_IB:
+			xtensa->nx_stop_cause = DEBUGCAUSE_IB;
+			break;
+		case OCDDSR_STOPCAUSE_B:
+		case OCDDSR_STOPCAUSE_B1:
+			xtensa->nx_stop_cause = DEBUGCAUSE_BI;
+			break;
+		case OCDDSR_STOPCAUSE_BN:
+			xtensa->nx_stop_cause = DEBUGCAUSE_BN;
+			break;
+		case OCDDSR_STOPCAUSE_DB0:
+		case OCDDSR_STOPCAUSE_DB1:
+			xtensa->nx_stop_cause = DEBUGCAUSE_DB;
+			break;
+		default:
+			LOG_TARGET_ERROR(target, "Unknown stop cause (DSR: 0x%08x)", dsr);
+			break;
+		}
+		if (xtensa->nx_stop_cause)
+			xtensa->nx_stop_cause |= DEBUGCAUSE_VALID;
+	}
+	return xtensa->nx_stop_cause;
 }
 
 void xtensa_cause_clear(struct target *target)
 {
 	struct xtensa *xtensa = target_to_xtensa(target);
-	xtensa_reg_set(target, XT_REG_IDX_DEBUGCAUSE, 0);
-	xtensa->core_cache->reg_list[XT_REG_IDX_DEBUGCAUSE].dirty = false;
+	if (xtensa->core_config->core_type == XT_LX) {
+		xtensa_reg_set(target, XT_REG_IDX_DEBUGCAUSE, 0);
+		xtensa->core_cache->reg_list[XT_REG_IDX_DEBUGCAUSE].dirty = false;
+	} else {
+		/* NX DSR.STOPCAUSE is not writeable; clear cached copy but leave it valid */
+		xtensa->nx_stop_cause = DEBUGCAUSE_VALID;
+	}
+}
+
+void xtensa_cause_reset(struct target *target)
+{
+	/* Clear DEBUGCAUSE_VALID to trigger re-read (on NX) */
+	struct xtensa *xtensa = target_to_xtensa(target);
+	xtensa->nx_stop_cause = 0;
 }
 
 int xtensa_assert_reset(struct target *target)
@@ -1008,9 +1146,11 @@ int xtensa_fetch_all_regs(struct target *target)
 	struct xtensa *xtensa = target_to_xtensa(target);
 	struct reg *reg_list = xtensa->core_cache->reg_list;
 	unsigned int reg_list_size = xtensa->core_cache->num_regs;
-	xtensa_reg_val_t cpenable = 0, windowbase = 0, a3;
+	xtensa_reg_val_t cpenable = 0, windowbase = 0, a0 = 0, a3;
+	unsigned int ms_idx = reg_list_size;
+	uint32_t ms = 0;
 	uint32_t woe;
-	uint8_t a3_buf[4];
+	uint8_t a0_buf[4], a3_buf[4], ms_buf[4];
 	bool debug_dsrs = !xtensa->regs_fetched || LOG_LEVEL_IS(LOG_LVL_DEBUG);
 
 	union xtensa_reg_val_u *regvals = calloc(reg_list_size, sizeof(*regvals));
@@ -1030,6 +1170,25 @@ int xtensa_fetch_all_regs(struct target *target)
 	/* Save (windowed) A3 so cache matches physical AR3; A3 usable as scratch */
 	xtensa_queue_exec_ins(xtensa, XT_INS_WSR(xtensa, XT_SR_DDR, XT_REG_A3));
 	xtensa_queue_dbg_reg_read(xtensa, XDMREG_DDR, a3_buf);
+	if (xtensa->core_config->core_type == XT_NX) {
+		/* Save (windowed) A0 as well--it will be required for reading PC */
+		xtensa_queue_exec_ins(xtensa, XT_INS_WSR(xtensa, XT_SR_DDR, XT_REG_A0));
+		xtensa_queue_dbg_reg_read(xtensa, XDMREG_DDR, a0_buf);
+
+		/* Set MS.DispSt, clear MS.DE prior to accessing ARs.  This ensures ARs remain
+		 * in correct order even for reversed register groups (overflow/underflow).
+		 */
+		ms_idx = xtensa->nx_reg_idx[XT_NX_REG_IDX_MS];
+		uint32_t ms_regno = xtensa->optregs[ms_idx - XT_NUM_REGS].reg_num;
+		xtensa_queue_exec_ins(xtensa, XT_INS_RSR(xtensa, ms_regno, XT_REG_A3));
+		xtensa_queue_exec_ins(xtensa, XT_INS_WSR(xtensa, XT_SR_DDR, XT_REG_A3));
+		xtensa_queue_dbg_reg_read(xtensa, XDMREG_DDR, ms_buf);
+		LOG_TARGET_DEBUG(target, "Overriding MS (0x%x): 0x%x", ms_regno, XT_MS_DISPST_DBG);
+		xtensa_queue_dbg_reg_write(xtensa, XDMREG_DDR, XT_MS_DISPST_DBG);
+		xtensa_queue_exec_ins(xtensa, XT_INS_RSR(xtensa, XT_SR_DDR, XT_REG_A3));
+		xtensa_queue_exec_ins(xtensa, XT_INS_WSR(xtensa, ms_regno, XT_REG_A3));
+	}
+
 	int res = xtensa_window_state_save(target, &woe);
 	if (res != ERROR_OK)
 		goto xtensa_fetch_all_regs_done;
@@ -1052,11 +1211,13 @@ int xtensa_fetch_all_regs(struct target *target)
 						dsrs[XT_REG_IDX_AR0 + i + j].buf);
 			}
 		}
-		if (xtensa->core_config->windowed)
+		if (xtensa->core_config->windowed) {
 			/* Now rotate the window so we'll see the next 16 registers. The final rotate
-			 * will wraparound, */
-			/* leaving us in the state we were. */
-			xtensa_queue_exec_ins(xtensa, XT_INS_ROTW(xtensa, 4));
+			 * will wraparound, leaving us in the state we were.
+			 * Each ROTW rotates 4 registers on LX and 8 on NX */
+			int rotw_arg = (xtensa->core_config->core_type == XT_LX) ? 4 : 2;
+			xtensa_queue_exec_ins(xtensa, XT_INS_ROTW(xtensa, rotw_arg));
+		}
 	}
 	xtensa_window_state_restore(target, woe);
 
@@ -1074,6 +1235,10 @@ int xtensa_fetch_all_regs(struct target *target)
 	xtensa_core_status_check(target);
 
 	a3 = buf_get_u32(a3_buf, 0, 32);
+	if (xtensa->core_config->core_type == XT_NX) {
+		a0 = buf_get_u32(a0_buf, 0, 32);
+		ms = buf_get_u32(ms_buf, 0, 32);
+	}
 
 	if (xtensa->core_config->coproc) {
 		cpenable = buf_get_u32(regvals[XT_REG_IDX_CPENABLE].buf, 0, 32);
@@ -1104,17 +1269,30 @@ int xtensa_fetch_all_regs(struct target *target)
 				break;
 			case XT_REG_SPECIAL:
 				if (reg_num == XT_PC_REG_NUM_VIRTUAL) {
-					/* reg number of PC for debug interrupt depends on NDEBUGLEVEL */
-					reg_num = XT_EPC_REG_NUM_BASE + xtensa->core_config->debug.irq_level;
-				} else if (reg_num == xtensa_regs[XT_REG_IDX_PS].reg_num) {
+					if (xtensa->core_config->core_type == XT_LX) {
+						/* reg number of PC for debug interrupt depends on NDEBUGLEVEL */
+						reg_num = XT_EPC_REG_NUM_BASE + xtensa->core_config->debug.irq_level;
+						xtensa_queue_exec_ins(xtensa, XT_INS_RSR(xtensa, reg_num, XT_REG_A3));
+					} else {
+						/* NX PC read through CALL0(0) and reading A0 */
+						xtensa_queue_exec_ins(xtensa, XT_INS_CALL0(xtensa, 0));
+						xtensa_queue_exec_ins(xtensa, XT_INS_WSR(xtensa, XT_SR_DDR, XT_REG_A0));
+						xtensa_queue_dbg_reg_read(xtensa, XDMREG_DDR, regvals[i].buf);
+						xtensa_queue_dbg_reg_read(xtensa, XDMREG_DSR, dsrs[i].buf);
+						reg_fetched = false;
+					}
+				} else if ((xtensa->core_config->core_type == XT_LX)
+					&& (reg_num == xtensa_regs[XT_REG_IDX_PS].reg_num)) {
 					/* reg number of PS for debug interrupt depends on NDEBUGLEVEL */
 					reg_num = XT_EPS_REG_NUM_BASE + xtensa->core_config->debug.irq_level;
+					xtensa_queue_exec_ins(xtensa, XT_INS_RSR(xtensa, reg_num, XT_REG_A3));
 				} else if (reg_num == xtensa_regs[XT_REG_IDX_CPENABLE].reg_num) {
 					/* CPENABLE already read/updated; don't re-read */
 					reg_fetched = false;
 					break;
+				} else {
+					xtensa_queue_exec_ins(xtensa, XT_INS_RSR(xtensa, reg_num, XT_REG_A3));
 				}
-				xtensa_queue_exec_ins(xtensa, XT_INS_RSR(xtensa, reg_num, XT_REG_A3));
 				break;
 			default:
 				reg_fetched = false;
@@ -1154,9 +1332,15 @@ int xtensa_fetch_all_regs(struct target *target)
 		}
 	}
 
-	if (xtensa->core_config->windowed)
+	if (xtensa->core_config->windowed) {
 		/* We need the windowbase to decode the general addresses. */
-		windowbase = buf_get_u32(regvals[XT_REG_IDX_WINDOWBASE].buf, 0, 32);
+		uint32_t wb_idx = (xtensa->core_config->core_type == XT_LX) ?
+			XT_REG_IDX_WINDOWBASE : xtensa->nx_reg_idx[XT_NX_REG_IDX_WB];
+		windowbase = buf_get_u32(regvals[wb_idx].buf, 0, 32);
+		if (xtensa->core_config->core_type == XT_NX)
+			windowbase = (windowbase & XT_WB_P_MSK) >> XT_WB_P_SHIFT;
+	}
+
 	/* Decode the result and update the cache. */
 	for (unsigned int i = 0; i < reg_list_size; i++) {
 		struct xtensa_reg_desc *rlist = (i < XT_NUM_REGS) ? xtensa_regs : xtensa->optregs;
@@ -1180,6 +1364,16 @@ int xtensa_fetch_all_regs(struct target *target)
 				bool is_dirty = (i == XT_REG_IDX_CPENABLE);
 				if (xtensa_extra_debug_log)
 					LOG_INFO("Register %s: 0x%X", reg_list[i].name, regval);
+				if (rlist[ridx].reg_num == XT_PC_REG_NUM_VIRTUAL &&
+					xtensa->core_config->core_type == XT_NX) {
+					/* A0 from prior CALL0 points to next instruction; decrement it */
+					regval -= 3;
+					is_dirty = 1;
+				} else if (i == ms_idx) {
+					LOG_TARGET_DEBUG(target, "Caching MS: 0x%x", ms);
+					regval = ms;
+					is_dirty = 1;
+				}
 				xtensa_reg_set(target, i, regval);
 				reg_list[i].dirty = is_dirty;	/*always do this _after_ xtensa_reg_set! */
 			}
@@ -1214,6 +1408,11 @@ int xtensa_fetch_all_regs(struct target *target)
 	/* We have used A3 (XT_REG_RELGEN) as a scratch register.  Restore and flag for write-back. */
 	xtensa_reg_set(target, XT_REG_IDX_A3, a3);
 	xtensa_mark_register_dirty(xtensa, XT_REG_IDX_A3);
+	if (xtensa->core_config->core_type == XT_NX) {
+		xtensa_reg_set(target, XT_REG_IDX_A0, a0);
+		xtensa_mark_register_dirty(xtensa, XT_REG_IDX_A0);
+	}
+
 	xtensa->regs_fetched = true;
 xtensa_fetch_all_regs_done:
 	free(regvals);
@@ -1262,7 +1461,7 @@ int xtensa_get_gdb_reg_list(struct target *target,
 			struct xtensa_reg_desc *rlist = (i < XT_NUM_REGS) ? xtensa_regs : xtensa->optregs;
 			unsigned int ridx = (i < XT_NUM_REGS) ? i : i - XT_NUM_REGS;
 			int sparse_idx = rlist[ridx].dbreg_num;
-			if (i == XT_REG_IDX_PS) {
+			if (i == XT_REG_IDX_PS && xtensa->core_config->core_type == XT_LX) {
 				if (xtensa->eps_dbglevel_idx == 0) {
 					LOG_ERROR("eps_dbglevel_idx not set\n");
 					return ERROR_FAIL;
@@ -1372,10 +1571,13 @@ int xtensa_prepare_resume(struct target *target,
 		if (xtensa->hw_brps[slot]) {
 			/* Write IBREAKA[slot] and set bit #slot in IBREAKENABLE */
 			xtensa_reg_set(target, XT_REG_IDX_IBREAKA0 + slot, xtensa->hw_brps[slot]->address);
+			if (xtensa->core_config->core_type == XT_NX)
+				xtensa_reg_set(target, xtensa->nx_reg_idx[XT_NX_REG_IDX_IBREAKC0] + slot, XT_IBREAKC_FB);
 			bpena |= BIT(slot);
 		}
 	}
-	xtensa_reg_set(target, XT_REG_IDX_IBREAKENABLE, bpena);
+	if (xtensa->core_config->core_type == XT_LX)
+		xtensa_reg_set(target, XT_REG_IDX_IBREAKENABLE, bpena);
 
 	/* Here we write all registers to the targets */
 	int res = xtensa_write_dirty_registers(target);
@@ -1390,6 +1592,7 @@ int xtensa_do_resume(struct target *target)
 
 	LOG_TARGET_DEBUG(target, "start");
 
+	xtensa_cause_reset(target);
 	xtensa_queue_exec_ins(xtensa, XT_INS_RFDO(xtensa));
 	int res = xtensa_dm_queue_execute(&xtensa->dbg_mod);
 	if (res != ERROR_OK) {
@@ -1467,13 +1670,14 @@ int xtensa_do_step(struct target *target, int current, target_addr_t address, in
 		return ERROR_TARGET_NOT_HALTED;
 	}
 
-	if (xtensa->eps_dbglevel_idx == 0) {
-		LOG_ERROR("eps_dbglevel_idx not set\n");
+	if (xtensa->eps_dbglevel_idx == 0 && xtensa->core_config->core_type == XT_LX) {
+		LOG_TARGET_ERROR(target, "eps_dbglevel_idx not set\n");
 		return ERROR_FAIL;
 	}
 
 	/* Save old ps (EPS[dbglvl] on LX), pc */
-	oldps = xtensa_reg_get(target, xtensa->eps_dbglevel_idx);
+	oldps = xtensa_reg_get(target, (xtensa->core_config->core_type == XT_LX) ?
+		xtensa->eps_dbglevel_idx : XT_REG_IDX_PS);
 	oldpc = xtensa_reg_get(target, XT_REG_IDX_PC);
 
 	cause = xtensa_cause_get(target);
@@ -1542,7 +1746,7 @@ int xtensa_do_step(struct target *target, int current, target_addr_t address, in
 	if (!handle_breakpoints && (cause & (DEBUGCAUSE_BI | DEBUGCAUSE_BN)))
 		/* handle normal SW breakpoint */
 		xtensa_cause_clear(target);	/* so we don't recurse into the same routine */
-	if ((oldps & 0xf) >= icountlvl) {
+	if (xtensa->core_config->core_type == XT_LX && ((oldps & 0xf) >= icountlvl)) {
 		/* Lower interrupt level to allow stepping, but flag eps[dbglvl] to be restored */
 		ps_lowered = true;
 		uint32_t newps = (oldps & ~0xf) | (icountlvl - 1);
@@ -1554,10 +1758,16 @@ int xtensa_do_step(struct target *target, int current, target_addr_t address, in
 			oldps);
 	}
 	do {
-		xtensa_reg_set(target, XT_REG_IDX_ICOUNTLEVEL, icountlvl);
-		xtensa_reg_set(target, XT_REG_IDX_ICOUNT, icount_val);
+		if (xtensa->core_config->core_type == XT_LX) {
+			xtensa_reg_set(target, XT_REG_IDX_ICOUNTLEVEL, icountlvl);
+			xtensa_reg_set(target, XT_REG_IDX_ICOUNT, icount_val);
+		} else {
+			xtensa_queue_dbg_reg_write(xtensa, XDMREG_DCRSET, OCDDCR_STEPREQUEST);
+		}
 
-		/* Now ICOUNT is set, we can resume as if we were going to run */
+		/* Now that ICOUNT (LX) or DCR.StepRequest (NX) is set,
+		 * we can resume as if we were going to run
+		 */
 		res = xtensa_prepare_resume(target, current, address, 0, 0);
 		if (res != ERROR_OK) {
 			LOG_TARGET_ERROR(target, "Failed to prepare resume for single step");
@@ -2108,6 +2318,22 @@ int xtensa_poll(struct target *target)
 				OCDDSR_DEBUGPENDBREAK | OCDDSR_DEBUGINTBREAK | OCDDSR_DEBUGPENDTRAX |
 				OCDDSR_DEBUGINTTRAX |
 				OCDDSR_DEBUGPENDHOST | OCDDSR_DEBUGINTHOST);
+			if (xtensa->core_config->core_type == XT_NX) {
+				/* Enable imprecise exceptions while in halted state */
+				xtensa_reg_val_t ps = xtensa_reg_get(target, XT_REG_IDX_PS);
+				xtensa_reg_val_t newps = ps & ~(XT_PS_DIEXC_MSK);
+				xtensa_mark_register_dirty(xtensa, XT_REG_IDX_PS);
+				LOG_TARGET_DEBUG(target, "Enabling PS.DIEXC: 0x%08x -> 0x%08x", ps, newps);
+				xtensa_queue_dbg_reg_write(xtensa, XDMREG_DDR, newps);
+				xtensa_queue_exec_ins(xtensa, XT_INS_RSR(xtensa, XT_SR_DDR, XT_REG_A3));
+				xtensa_queue_exec_ins(xtensa, XT_INS_WSR(xtensa, XT_SR_PS, XT_REG_A3));
+				res = xtensa_dm_queue_execute(&xtensa->dbg_mod);
+				if (res != ERROR_OK) {
+					LOG_TARGET_ERROR(target, "Failed to write PS.DIEXC (%d)!", res);
+					return res;
+				}
+				xtensa_core_status_check(target);
+			}
 		}
 	} else {
 		target->debug_reason = DBG_REASON_NOTHALTED;
@@ -2326,6 +2552,8 @@ int xtensa_breakpoint_remove(struct target *target, struct breakpoint *breakpoin
 		return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
 	}
 	xtensa->hw_brps[slot] = NULL;
+	if (xtensa->core_config->core_type == XT_NX)
+		xtensa_reg_set(target, xtensa->nx_reg_idx[XT_NX_REG_IDX_IBREAKC0] + slot, 0);
 	LOG_TARGET_DEBUG(target, "cleared HW breakpoint %u @ " TARGET_ADDR_FMT, slot, breakpoint->address);
 	return ERROR_OK;
 }
@@ -3073,8 +3301,10 @@ COMMAND_HELPER(xtensa_cmd_xtdef_do, struct xtensa *xtensa)
 	const char *core_name = CMD_ARGV[0];
 	if (strcasecmp(core_name, "LX") == 0) {
 		xtensa->core_config->core_type = XT_LX;
+	} else if (strcasecmp(core_name, "NX") == 0) {
+		xtensa->core_config->core_type = XT_NX;
 	} else {
-		LOG_ERROR("xtdef [LX]\n");
+		LOG_ERROR("xtdef [LX|NX]\n");
 		return ERROR_COMMAND_SYNTAX_ERROR;
 	}
 	return ERROR_OK;
@@ -3456,6 +3686,33 @@ COMMAND_HELPER(xtensa_cmd_xtreg_do, struct xtensa *xtensa)
 			xtensa->eps_dbglevel_idx = XT_NUM_REGS + xtensa->num_optregs - 1;
 			LOG_DEBUG("Setting PS (%s) index to %d", rptr->name, xtensa->eps_dbglevel_idx);
 		}
+		if (xtensa->core_config->core_type == XT_NX) {
+			enum xtensa_nx_reg_idx idx = XT_NX_REG_IDX_NUM;
+			if (strcmp(rptr->name, "ibreakc0") == 0)
+				idx = XT_NX_REG_IDX_IBREAKC0;
+			else if (strcmp(rptr->name, "wb") == 0)
+				idx = XT_NX_REG_IDX_WB;
+			else if (strcmp(rptr->name, "ms") == 0)
+				idx = XT_NX_REG_IDX_MS;
+			else if (strcmp(rptr->name, "ievec") == 0)
+				idx = XT_NX_REG_IDX_IEVEC;
+			else if (strcmp(rptr->name, "ieextern") == 0)
+				idx = XT_NX_REG_IDX_IEEXTERN;
+			else if (strcmp(rptr->name, "mesr") == 0)
+				idx = XT_NX_REG_IDX_MESR;
+			else if (strcmp(rptr->name, "mesrclr") == 0)
+				idx = XT_NX_REG_IDX_MESRCLR;
+			if (idx < XT_NX_REG_IDX_NUM) {
+				if (xtensa->nx_reg_idx[idx] != 0) {
+					LOG_ERROR("nx_reg_idx[%d] previously set to %d",
+						idx, xtensa->nx_reg_idx[idx]);
+					return ERROR_FAIL;
+				}
+				xtensa->nx_reg_idx[idx] = XT_NUM_REGS + xtensa->num_optregs - 1;
+				LOG_DEBUG("NX reg %s: index %d (%d)",
+					rptr->name, xtensa->nx_reg_idx[idx], idx);
+			}
+		}
 	} else if (strcmp(rptr->name, "cpenable") == 0) {
 		xtensa->core_config->coproc = true;
 	}
@@ -3640,6 +3897,12 @@ COMMAND_HELPER(xtensa_cmd_mask_interrupts_do, struct xtensa *xtensa)
 		command_print(CMD, "Current ISR step mode: %s", st);
 		return ERROR_OK;
 	}
+
+	if (xtensa->core_config->core_type == XT_NX) {
+		command_print(CMD, "ERROR: ISR step mode only supported on Xtensa LX");
+		return ERROR_FAIL;
+	}
+
 	/* Masking is ON -> interrupts during stepping are OFF, and vice versa */
 	if (!strcasecmp(CMD_ARGV[0], "off"))
 		state = XT_STEPPING_ISR_ON;
diff --git a/src/target/xtensa/xtensa.h b/src/target/xtensa/xtensa.h
index 4d98f3a36..4216ae24f 100644
--- a/src/target/xtensa/xtensa.h
+++ b/src/target/xtensa/xtensa.h
@@ -35,6 +35,7 @@
 
 #define XT_ISNS_SZ_MAX                          3
 
+/* PS register bits (LX) */
 #define XT_PS_RING(_v_)                         ((uint32_t)((_v_) & 0x3) << 6)
 #define XT_PS_RING_MSK                          (0x3 << 6)
 #define XT_PS_RING_GET(_v_)                     (((_v_) >> 6) & 0x3)
@@ -42,6 +43,31 @@
 #define XT_PS_OWB_MSK                           (0xF << 8)
 #define XT_PS_WOE_MSK                           BIT(18)
 
+/* PS register bits (NX) */
+#define XT_PS_DIEXC_MSK                         BIT(2)
+
+/* MS register bits (NX) */
+#define XT_MS_DE_MSK                            BIT(5)
+#define XT_MS_DISPST_MSK                        (0x1f)
+#define XT_MS_DISPST_DBG                        (0x10)
+
+/* WB register bits (NX) */
+#define XT_WB_P_SHIFT                           (0)
+#define XT_WB_P_MSK                             (0x7U << XT_WB_P_SHIFT)
+#define XT_WB_C_SHIFT                           (4)
+#define XT_WB_C_MSK                             (0x7U << XT_WB_C_SHIFT)
+#define XT_WB_N_SHIFT                           (8)
+#define XT_WB_N_MSK                             (0x7U << XT_WB_N_SHIFT)
+#define XT_WB_S_SHIFT                           (30)
+#define XT_WB_S_MSK                             (0x3U << XT_WB_S_SHIFT)
+
+/* IBREAKC register bits (NX) */
+#define XT_IBREAKC_FB                           (0x80000000)
+
+/* Definitions for imprecise exception registers (NX) */
+#define XT_IMPR_EXC_MSK                         (0x00000013)
+#define XT_MESRCLR_IMPR_EXC_MSK                 (0x00000090)
+
 #define XT_LOCAL_MEM_REGIONS_NUM_MAX            8
 
 #define XT_AREGS_NUM_MAX                        64
@@ -79,6 +105,7 @@ struct xtensa_keyval_info_s {
 enum xtensa_type {
 	XT_UNDEF = 0,
 	XT_LX,
+	XT_NX,
 };
 
 struct xtensa_cache_config {
@@ -167,6 +194,17 @@ enum xtensa_stepping_isr_mode {
 	XT_STEPPING_ISR_ON,		/* interrupts are enabled during stepping */
 };
 
+enum xtensa_nx_reg_idx {
+	XT_NX_REG_IDX_IBREAKC0 = 0,
+	XT_NX_REG_IDX_WB,
+	XT_NX_REG_IDX_MS,
+	XT_NX_REG_IDX_IEVEC,		/* IEVEC, IEEXTERN, and MESR must be contiguous */
+	XT_NX_REG_IDX_IEEXTERN,
+	XT_NX_REG_IDX_MESR,
+	XT_NX_REG_IDX_MESRCLR,
+	XT_NX_REG_IDX_NUM
+};
+
 /* Only supported in cores with in-CPU MMU. None of Espressif chips as of now. */
 enum xtensa_mode {
 	XT_MODE_RING0,
@@ -232,6 +270,8 @@ struct xtensa {
 	uint8_t come_online_probes_num;
 	bool proc_syscall;
 	bool halt_request;
+	uint32_t nx_stop_cause;
+	uint32_t nx_reg_idx[XT_NX_REG_IDX_NUM];
 	struct xtensa_keyval_info_s scratch_ars[XT_AR_SCRATCH_NUM];
 	bool regs_fetched;	/* true after first register fetch completed successfully */
 };
diff --git a/src/target/xtensa/xtensa_debug_module.h b/src/target/xtensa/xtensa_debug_module.h
index b382e03db..46b29354c 100644
--- a/src/target/xtensa/xtensa_debug_module.h
+++ b/src/target/xtensa/xtensa_debug_module.h
@@ -246,6 +246,7 @@ struct xtensa_dm_reg_offsets {
 #define OCDDCR_ENABLEOCD            BIT(0)
 #define OCDDCR_DEBUGINTERRUPT       BIT(1)
 #define OCDDCR_INTERRUPTALLCONDS    BIT(2)
+#define OCDDCR_STEPREQUEST          BIT(3)		/* NX only */
 #define OCDDCR_BREAKINEN            BIT(16)
 #define OCDDCR_BREAKOUTEN           BIT(17)
 #define OCDDCR_DEBUGSWACTIVE        BIT(20)
@@ -259,6 +260,8 @@ struct xtensa_dm_reg_offsets {
 #define OCDDSR_EXECBUSY             BIT(2)
 #define OCDDSR_EXECOVERRUN          BIT(3)
 #define OCDDSR_STOPPED              BIT(4)
+#define OCDDSR_STOPCAUSE            (0xF << 5)	/* NX only */
+#define OCDDSR_STOPCAUSE_SHIFT      (5)			/* NX only */
 #define OCDDSR_COREWROTEDDR         BIT(10)
 #define OCDDSR_COREREADDDR          BIT(11)
 #define OCDDSR_HOSTWROTEDDR         BIT(14)
@@ -275,12 +278,24 @@ struct xtensa_dm_reg_offsets {
 #define OCDDSR_BREAKINITI           BIT(26)
 #define OCDDSR_DBGMODPOWERON        BIT(31)
 
+/* NX stop cause */
+#define OCDDSR_STOPCAUSE_DI         (0)		/* Debug Interrupt */
+#define OCDDSR_STOPCAUSE_SS         (1)		/* Single-step completed */
+#define OCDDSR_STOPCAUSE_IB         (2)		/* HW breakpoint (IBREAKn match) */
+#define OCDDSR_STOPCAUSE_B1         (4)		/* SW breakpoint (BREAK.1 instruction) */
+#define OCDDSR_STOPCAUSE_BN         (5)		/* SW breakpoint (BREAK.N instruction) */
+#define OCDDSR_STOPCAUSE_B          (6)		/* SW breakpoint (BREAK instruction) */
+#define OCDDSR_STOPCAUSE_DB0        (8)		/* HW watchpoint (DBREAK0 match) */
+#define OCDDSR_STOPCAUSE_DB1        (9)		/* HW watchpoint (DBREAK0 match) */
+
+/* LX stop cause */
 #define DEBUGCAUSE_IC               BIT(0)	/* ICOUNT exception */
 #define DEBUGCAUSE_IB               BIT(1)	/* IBREAK exception */
 #define DEBUGCAUSE_DB               BIT(2)	/* DBREAK exception */
 #define DEBUGCAUSE_BI               BIT(3)	/* BREAK instruction encountered */
 #define DEBUGCAUSE_BN               BIT(4)	/* BREAK.N instruction encountered */
 #define DEBUGCAUSE_DI               BIT(5)	/* Debug Interrupt */
+#define DEBUGCAUSE_VALID            BIT(31)	/* Pseudo-value to trigger reread (NX only) */
 
 #define TRAXCTRL_TREN               BIT(0)	/* Trace enable. Tracing starts on 0->1 */
 #define TRAXCTRL_TRSTP              BIT(1)	/* Trace Stop. Make 1 to stop trace. */

-----------------------------------------------------------------------

Summary of changes:
 src/target/xtensa/xtensa.c              | 367 +++++++++++++++++++++++++++-----
 src/target/xtensa/xtensa.h              |  40 ++++
 src/target/xtensa/xtensa_debug_module.h |  15 ++
 3 files changed, 370 insertions(+), 52 deletions(-)


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- Log -----------------------------------------------------------------
commit 047b1a8fc237af480e3bab66a9827a358afd7547
Author: Peter Collingbourne <pc...@go...>
Date:   Wed Mar 1 20:20:29 2023 -0800

    target/image: zero-initialize ELF segments up to p_memsz
    
    We were previously not zero-initializing ELF segments between p_filesz
    and p_memsz (aka BSS). However, this may be necessary depending on the
    user's application. Therefore, start doing so.
    
    Change-Id: I5a743390069583aca7ee276f53afeccf2cac0855
    Signed-off-by: Peter Collingbourne <pc...@go...>
    Reviewed-on: https://review.openocd.org/c/openocd/+/7513
    Tested-by: jenkins
    Reviewed-by: Antonio Borneo <bor...@gm...>

diff --git a/src/target/image.c b/src/target/image.c
index f8de7a23e..6aa609d39 100644
--- a/src/target/image.c
+++ b/src/target/image.c
@@ -407,12 +407,10 @@ static int image_elf32_read_headers(struct image *image)
 		return ERROR_FILEIO_OPERATION_FAILED;
 	}
 
-	/* count useful segments (loadable), ignore BSS section */
+	/* count useful segments (loadable) */
 	image->num_sections = 0;
 	for (i = 0; i < elf->segment_count; i++)
-		if ((field32(elf,
-			elf->segments32[i].p_type) == PT_LOAD) &&
-			(field32(elf, elf->segments32[i].p_filesz) != 0))
+		if (field32(elf, elf->segments32[i].p_type) == PT_LOAD)
 			image->num_sections++;
 
 	if (image->num_sections == 0) {
@@ -449,10 +447,8 @@ static int image_elf32_read_headers(struct image *image)
 	}
 
 	for (i = 0, j = 0; i < elf->segment_count; i++) {
-		if ((field32(elf,
-			elf->segments32[i].p_type) == PT_LOAD) &&
-			(field32(elf, elf->segments32[i].p_filesz) != 0)) {
-			image->sections[j].size = field32(elf, elf->segments32[i].p_filesz);
+		if (field32(elf, elf->segments32[i].p_type) == PT_LOAD) {
+			image->sections[j].size = field32(elf, elf->segments32[i].p_memsz);
 			if (load_to_vaddr)
 				image->sections[j].base_address = field32(elf,
 						elf->segments32[i].p_vaddr);
@@ -532,12 +528,10 @@ static int image_elf64_read_headers(struct image *image)
 		return ERROR_FILEIO_OPERATION_FAILED;
 	}
 
-	/* count useful segments (loadable), ignore BSS section */
+	/* count useful segments (loadable) */
 	image->num_sections = 0;
 	for (i = 0; i < elf->segment_count; i++)
-		if ((field32(elf,
-			elf->segments64[i].p_type) == PT_LOAD) &&
-			(field64(elf, elf->segments64[i].p_filesz) != 0))
+		if (field32(elf, elf->segments64[i].p_type) == PT_LOAD)
 			image->num_sections++;
 
 	if (image->num_sections == 0) {
@@ -574,10 +568,8 @@ static int image_elf64_read_headers(struct image *image)
 	}
 
 	for (i = 0, j = 0; i < elf->segment_count; i++) {
-		if ((field32(elf,
-			elf->segments64[i].p_type) == PT_LOAD) &&
-			(field64(elf, elf->segments64[i].p_filesz) != 0)) {
-			image->sections[j].size = field64(elf, elf->segments64[i].p_filesz);
+		if (field32(elf, elf->segments64[i].p_type) == PT_LOAD) {
+			image->sections[j].size = field64(elf, elf->segments64[i].p_memsz);
 			if (load_to_vaddr)
 				image->sections[j].base_address = field64(elf,
 						elf->segments64[i].p_vaddr);
@@ -651,6 +643,8 @@ static int image_elf32_read_section(struct image *image,
 {
 	struct image_elf *elf = image->type_private;
 	Elf32_Phdr *segment = (Elf32_Phdr *)image->sections[section].private;
+	uint32_t filesz = field32(elf, segment->p_filesz);
+	uint32_t memsz = field32(elf, segment->p_memsz);
 	size_t read_size, really_read;
 	int retval;
 
@@ -659,9 +653,9 @@ static int image_elf32_read_section(struct image *image,
 	LOG_DEBUG("load segment %d at 0x%" TARGET_PRIxADDR " (sz = 0x%" PRIx32 ")", section, offset, size);
 
 	/* read initialized data in current segment if any */
-	if (offset < field32(elf, segment->p_filesz)) {
+	if (offset < filesz) {
 		/* maximal size present in file for the current segment */
-		read_size = MIN(size, field32(elf, segment->p_filesz) - offset);
+		read_size = MIN(size, filesz - offset);
 		LOG_DEBUG("read elf: size = 0x%zx at 0x%" TARGET_PRIxADDR "", read_size,
 			field32(elf, segment->p_offset) + offset);
 		/* read initialized area of the segment */
@@ -675,6 +669,8 @@ static int image_elf32_read_section(struct image *image,
 			LOG_ERROR("cannot read ELF segment content, read failed");
 			return retval;
 		}
+		buffer += read_size;
+		offset += read_size;
 		size -= read_size;
 		*size_read += read_size;
 		/* need more data ? */
@@ -682,6 +678,13 @@ static int image_elf32_read_section(struct image *image,
 			return ERROR_OK;
 	}
 
+	/* clear bss in current segment if any */
+	if (offset >= filesz) {
+		uint32_t memset_size = MIN(size, memsz - filesz);
+		memset(buffer, 0, memset_size);
+		*size_read += memset_size;
+	}
+
 	return ERROR_OK;
 }
 
@@ -694,6 +697,8 @@ static int image_elf64_read_section(struct image *image,
 {
 	struct image_elf *elf = image->type_private;
 	Elf64_Phdr *segment = (Elf64_Phdr *)image->sections[section].private;
+	uint64_t filesz = field64(elf, segment->p_filesz);
+	uint64_t memsz = field64(elf, segment->p_memsz);
 	size_t read_size, really_read;
 	int retval;
 
@@ -702,9 +707,9 @@ static int image_elf64_read_section(struct image *image,
 	LOG_DEBUG("load segment %d at 0x%" TARGET_PRIxADDR " (sz = 0x%" PRIx32 ")", section, offset, size);
 
 	/* read initialized data in current segment if any */
-	if (offset < field64(elf, segment->p_filesz)) {
+	if (offset < filesz) {
 		/* maximal size present in file for the current segment */
-		read_size = MIN(size, field64(elf, segment->p_filesz) - offset);
+		read_size = MIN(size, filesz - offset);
 		LOG_DEBUG("read elf: size = 0x%zx at 0x%" TARGET_PRIxADDR "", read_size,
 			field64(elf, segment->p_offset) + offset);
 		/* read initialized area of the segment */
@@ -718,6 +723,8 @@ static int image_elf64_read_section(struct image *image,
 			LOG_ERROR("cannot read ELF segment content, read failed");
 			return retval;
 		}
+		buffer += read_size;
+		offset += read_size;
 		size -= read_size;
 		*size_read += read_size;
 		/* need more data ? */
@@ -725,6 +732,13 @@ static int image_elf64_read_section(struct image *image,
 			return ERROR_OK;
 	}
 
+	/* clear bss in current segment if any */
+	if (offset >= filesz) {
+		uint64_t memset_size = MIN(size, memsz - filesz);
+		memset(buffer, 0, memset_size);
+		*size_read += memset_size;
+	}
+
 	return ERROR_OK;
 }
 

-----------------------------------------------------------------------

Summary of changes:
 src/target/image.c | 54 ++++++++++++++++++++++++++++++++++--------------------
 1 file changed, 34 insertions(+), 20 deletions(-)


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commit a7f8a1d7fb8e6628f34340a5777ce600dc27f8d8
Author: Chao Du <du...@es...>
Date:   Wed Mar 8 07:17:13 2023 +0000

    doc: add missing FreeRTOS symbol
    
    A new FreeRTOS symbol xSchedulerRunning was added into the symbol list.
    But the doc was not updated accordingly.
    
    Signed-off-by: Chao Du <du...@es...>
    Change-Id: If1b18591e2681477ad96f1dea566cc2547097767
    Reviewed-on: https://review.openocd.org/c/openocd/+/7531
    Tested-by: jenkins
    Reviewed-by: Tomas Vanek <va...@fb...>
    Reviewed-by: Antonio Borneo <bor...@gm...>

diff --git a/doc/openocd.texi b/doc/openocd.texi
index 6c853f2ce..414b4c405 100644
--- a/doc/openocd.texi
+++ b/doc/openocd.texi
@@ -11887,7 +11887,7 @@ _tx_thread_current_ptr, _tx_thread_created_ptr, _tx_thread_created_count.
 @raggedright
 pxCurrentTCB, pxReadyTasksLists, xDelayedTaskList1, xDelayedTaskList2,
 pxDelayedTaskList, pxOverflowDelayedTaskList, xPendingReadyList,
-uxCurrentNumberOfTasks, uxTopUsedPriority.
+uxCurrentNumberOfTasks, uxTopUsedPriority, xSchedulerRunning.
 @end raggedright
 @item linux symbols
 init_task.

-----------------------------------------------------------------------

Summary of changes:
 doc/openocd.texi | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)


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commit 8d1261c248796d5eee9ec8e646d16d653be984a6
Author: Andrew Lalaev <and...@gm...>
Date:   Sun Mar 5 20:41:14 2023 +0100

    flash/nor/at91samd: add missing SAMR34/35 part numbers
    
    All DIDs are taken from "SAM R34/R35 Errata Sheet" (DS80000834A).
    
    Signed-off-by: Andrew Lalaev <and...@gm...>
    Change-Id: Ie35f58e61bb02919c0676c91938c90192481d995
    Reviewed-on: https://review.openocd.org/c/openocd/+/7521
    Tested-by: jenkins
    Reviewed-by: Tomas Vanek <va...@fb...>

diff --git a/src/flash/nor/at91samd.c b/src/flash/nor/at91samd.c
index b3252e870..416f07778 100644
--- a/src/flash/nor/at91samd.c
+++ b/src/flash/nor/at91samd.c
@@ -244,7 +244,11 @@ static const struct samd_part saml21_parts[] = {
 
     /* SAMR34/R35 parts have integrated SAML21 with a lora radio */
 	{ 0x28, "SAMR34J18", 256, 40 },
+	{ 0x29, "SAMR34J17", 128, 24 },
+	{ 0x2A, "SAMR34J16", 64, 12 },
 	{ 0x2B, "SAMR35J18", 256, 40 },
+	{ 0x2C, "SAMR35J17", 128, 24 },
+	{ 0x2D, "SAMR35J16", 64, 12 },
 };
 
 /* Known SAML22 parts. */

commit 70d771c7b7d488c76452191fb1a2a8bdfa9a2f25
Author: Andrew Lalaev <and...@gm...>
Date:   Sun Mar 5 20:36:32 2023 +0100

    flash/nor/at91samd: fix RAM size for SAMR34/35
    
    According to the datasheets these MCUs have 40Kb RAM.
    
    Signed-off-by: Andrew Lalaev <and...@gm...>
    Change-Id: I52b8a0c86035bccd6f3c1a478bb2e558bca4ae86
    Reviewed-on: https://review.openocd.org/c/openocd/+/7520
    Tested-by: jenkins
    Reviewed-by: Tomas Vanek <va...@fb...>

diff --git a/src/flash/nor/at91samd.c b/src/flash/nor/at91samd.c
index 33e86c76e..b3252e870 100644
--- a/src/flash/nor/at91samd.c
+++ b/src/flash/nor/at91samd.c
@@ -243,8 +243,8 @@ static const struct samd_part saml21_parts[] = {
 	{ 0x1F, "SAMR30E18A", 256, 32 },
 
     /* SAMR34/R35 parts have integrated SAML21 with a lora radio */
-	{ 0x28, "SAMR34J18", 256, 32 },
-	{ 0x2B, "SAMR35J18", 256, 32 },
+	{ 0x28, "SAMR34J18", 256, 40 },
+	{ 0x2B, "SAMR35J18", 256, 40 },
 };
 
 /* Known SAML22 parts. */

-----------------------------------------------------------------------

Summary of changes:
 src/flash/nor/at91samd.c | 8 ++++++--
 1 file changed, 6 insertions(+), 2 deletions(-)


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commit a8bc4e75b3dda3d32345fa310a3be724235d8fa8
Author: Tomas Vanek <va...@fb...>
Date:   Mon Mar 6 15:37:43 2023 +0100

    drivers/ftdi: prevent misleading error msg when more vid/pids configured
    
    The driver tries to open mpsse engine for each vid pid
    pair in sequence. If more vid/pid pairs are configured and
    the USB device does not correspond to the first pair,
    the driver shows 'unable to open ftdi device ...' error.
    
    Match vid pid with the whole list as used in jtag_libusb_open()
    instead of multiple mpsse_open() in for loop over vid/pid pairs.
    
    Change-Id: I8ef55205be221c727607fe25b81ae21de0d96f02
    Signed-off-by: Tomas Vanek <va...@fb...>
    Reviewed-on: https://review.openocd.org/c/openocd/+/7529
    Tested-by: jenkins
    Reviewed-by: Antonio Borneo <bor...@gm...>
    Reviewed-by: Wolfram Sang <ws...@ke...>

diff --git a/src/jtag/drivers/ftdi.c b/src/jtag/drivers/ftdi.c
index 3097d4129..6356a4929 100644
--- a/src/jtag/drivers/ftdi.c
+++ b/src/jtag/drivers/ftdi.c
@@ -658,13 +658,8 @@ static int ftdi_initialize(void)
 		return ERROR_JTAG_INIT_FAILED;
 	}
 
-	for (int i = 0; ftdi_vid[i] || ftdi_pid[i]; i++) {
-		mpsse_ctx = mpsse_open(&ftdi_vid[i], &ftdi_pid[i], ftdi_device_desc,
+	mpsse_ctx = mpsse_open(ftdi_vid, ftdi_pid, ftdi_device_desc,
 				adapter_get_required_serial(), adapter_usb_get_location(), ftdi_channel);
-		if (mpsse_ctx)
-			break;
-	}
-
 	if (!mpsse_ctx)
 		return ERROR_JTAG_INIT_FAILED;
 
diff --git a/src/jtag/drivers/mpsse.c b/src/jtag/drivers/mpsse.c
index 18aeb38a4..9f2fdde9f 100644
--- a/src/jtag/drivers/mpsse.c
+++ b/src/jtag/drivers/mpsse.c
@@ -13,6 +13,7 @@
 #include "helper/log.h"
 #include "helper/replacements.h"
 #include "helper/time_support.h"
+#include "libusb_helper.h"
 #include <libusb.h>
 
 /* Compatibility define for older libusb-1.0 */
@@ -148,7 +149,7 @@ static bool device_location_equal(struct libusb_device *device, const char *loca
  * Set any field to 0 as a wildcard. If the device is found true is returned, with ctx containing
  * the already opened handle. ctx->interface must be set to the desired interface (channel) number
  * prior to calling this function. */
-static bool open_matching_device(struct mpsse_ctx *ctx, const uint16_t *vid, const uint16_t *pid,
+static bool open_matching_device(struct mpsse_ctx *ctx, const uint16_t vids[], const uint16_t pids[],
 	const char *product, const char *serial, const char *location)
 {
 	struct libusb_device **list;
@@ -169,9 +170,7 @@ static bool open_matching_device(struct mpsse_ctx *ctx, const uint16_t *vid, con
 			continue;
 		}
 
-		if (vid && *vid != desc.idVendor)
-			continue;
-		if (pid && *pid != desc.idProduct)
+		if (!jtag_libusb_match_ids(&desc, vids, pids))
 			continue;
 
 		err = libusb_open(device, &ctx->usb_dev);
@@ -203,7 +202,7 @@ static bool open_matching_device(struct mpsse_ctx *ctx, const uint16_t *vid, con
 	libusb_free_device_list(list, 1);
 
 	if (!found) {
-		LOG_ERROR("no device found");
+		/* The caller reports detailed error desc */
 		return false;
 	}
 
@@ -307,7 +306,7 @@ error:
 	return false;
 }
 
-struct mpsse_ctx *mpsse_open(const uint16_t *vid, const uint16_t *pid, const char *description,
+struct mpsse_ctx *mpsse_open(const uint16_t vids[], const uint16_t pids[], const char *description,
 	const char *serial, const char *location, int channel)
 {
 	struct mpsse_ctx *ctx = calloc(1, sizeof(*ctx));
@@ -343,14 +342,9 @@ struct mpsse_ctx *mpsse_open(const uint16_t *vid, const uint16_t *pid, const cha
 		goto error;
 	}
 
-	if (!open_matching_device(ctx, vid, pid, description, serial, location)) {
-		/* Four hex digits plus terminating zero each */
-		char vidstr[5];
-		char pidstr[5];
-		LOG_ERROR("unable to open ftdi device with vid %s, pid %s, description '%s', "
+	if (!open_matching_device(ctx, vids, pids, description, serial, location)) {
+		LOG_ERROR("unable to open ftdi device with description '%s', "
 				"serial '%s' at bus location '%s'",
-				vid ? sprintf(vidstr, "%04x", *vid), vidstr : "*",
-				pid ? sprintf(pidstr, "%04x", *pid), pidstr : "*",
 				description ? description : "*",
 				serial ? serial : "*",
 				location ? location : "*");

-----------------------------------------------------------------------

Summary of changes:
 src/jtag/drivers/ftdi.c  |  7 +------
 src/jtag/drivers/mpsse.c | 20 +++++++-------------
 2 files changed, 8 insertions(+), 19 deletions(-)


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commit c7e0040689db1fc2673c117e038ffb3a88f6562b
Author: Tomas Vanek <va...@fb...>
Date:   Mon Mar 6 15:31:08 2023 +0100

    drivers/libusb_helper: allow external use of jtag_libusb_match_ids()
    
    Can be employed by a driver with custom libusb open.
    
    Change-Id: I00c8a01df8780891a8b7c30e2e34ab191acdf9a8
    Signed-off-by: Tomas Vanek <va...@fb...>
    Reviewed-on: https://review.openocd.org/c/openocd/+/7528
    Tested-by: jenkins
    Reviewed-by: Wolfram Sang <ws...@ke...>
    Reviewed-by: Antonio Borneo <bor...@gm...>

diff --git a/src/jtag/drivers/libusb_helper.c b/src/jtag/drivers/libusb_helper.c
index 53dfd502d..4b098b482 100644
--- a/src/jtag/drivers/libusb_helper.c
+++ b/src/jtag/drivers/libusb_helper.c
@@ -50,7 +50,7 @@ static int jtag_libusb_error(int err)
 	}
 }
 
-static bool jtag_libusb_match_ids(struct libusb_device_descriptor *dev_desc,
+bool jtag_libusb_match_ids(struct libusb_device_descriptor *dev_desc,
 		const uint16_t vids[], const uint16_t pids[])
 {
 	for (unsigned i = 0; vids[i]; i++) {
diff --git a/src/jtag/drivers/libusb_helper.h b/src/jtag/drivers/libusb_helper.h
index 172c34598..799e3e6a9 100644
--- a/src/jtag/drivers/libusb_helper.h
+++ b/src/jtag/drivers/libusb_helper.h
@@ -30,6 +30,8 @@
 typedef char * (*adapter_get_alternate_serial_fn)(struct libusb_device_handle *device,
 		struct libusb_device_descriptor *dev_desc);
 
+bool jtag_libusb_match_ids(struct libusb_device_descriptor *dev_desc,
+		const uint16_t vids[], const uint16_t pids[]);
 int jtag_libusb_open(const uint16_t vids[], const uint16_t pids[],
 		struct libusb_device_handle **out,
 		adapter_get_alternate_serial_fn adapter_get_alternate_serial);

-----------------------------------------------------------------------

Summary of changes:
 src/jtag/drivers/libusb_helper.c | 2 +-
 src/jtag/drivers/libusb_helper.h | 2 ++
 2 files changed, 3 insertions(+), 1 deletion(-)


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- Log -----------------------------------------------------------------
commit c8f56b4f00a1b8d7cc74f08b34466b2017c1f1dc
Author: Wolfram Sang <ws...@ke...>
Date:   Fri Mar 3 17:00:19 2023 +0100

    TODO: remove outdated AT91SAM92xx entry
    
    SAM9260 gained good generic infrastructure since 2009. And we always
    want "improvements", no need for a TODO item.
    
    Signed-off-by: Wolfram Sang <ws...@ke...>
    Change-Id: I92551ef9d42ee47ad7441f2354587bbb45edc97e
    Reviewed-on: https://review.openocd.org/c/openocd/+/7526
    Tested-by: jenkins
    Reviewed-by: Tomas Vanek <va...@fb...>
    Reviewed-by: Antonio Borneo <bor...@gm...>

diff --git a/TODO b/TODO
index ebb6c9980..e4dded0ce 100644
--- a/TODO
+++ b/TODO
@@ -202,8 +202,6 @@ https://lists.berlios.de/pipermail/openocd-development/2009-October/011506.html
 - MC1322x support (JW/DE?)
   - integrate and test support from JW (and DE?)
   - get working with a known good interface (i.e. not today's jlink)
-- AT91SAM92xx:
-  - improvements for unknown-board-atmel-at91sam9260.cfg (RD)
 - STR9x: (ZW)
   - improvements to str912.cfg to be more general purpose
 - AVR: (SQ)

-----------------------------------------------------------------------

Summary of changes:
 TODO | 2 --
 1 file changed, 2 deletions(-)


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commit e1b0d5759a1e9221d534400505c6eb7e43abd051
Author: Wolfram Sang <ws...@ke...>
Date:   Fri Mar 3 16:50:38 2023 +0100

    tcl/board/at91sam9g20-ek: remove outdated FIXME
    
    It was fixed by e94180571 ("at91sam9: factorise cpu support") in 2011.
    
    Signed-off-by: Wolfram Sang <ws...@ke...>
    Change-Id: I95ea149b45a9902424bf9068b4a2830c17ddc6be
    Reviewed-on: https://review.openocd.org/c/openocd/+/7525
    Tested-by: jenkins
    Reviewed-by: Tomas Vanek <va...@fb...>

diff --git a/tcl/board/at91sam9g20-ek.cfg b/tcl/board/at91sam9g20-ek.cfg
index a5831cd91..4740471c8 100644
--- a/tcl/board/at91sam9g20-ek.cfg
+++ b/tcl/board/at91sam9g20-ek.cfg
@@ -7,10 +7,6 @@
 #												#
 #################################################################################################
 
-# FIXME use some standard target config, maybe create one from this
-#
-#	source [find target/...cfg]
-
 source [find target/at91sam9g20.cfg]
 
 set _FLASHTYPE nandflash_cs3

-----------------------------------------------------------------------

Summary of changes:
 tcl/board/at91sam9g20-ek.cfg | 4 ----
 1 file changed, 4 deletions(-)


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- Log -----------------------------------------------------------------
commit fc30feb51a76e893646e2794c99a78dbdc0d251f
Author: Tomas Deingruber <Dei...@gm...>
Date:   Tue Feb 28 23:17:56 2023 +0000

    tlc/interface: does fix source of raspberrypi-gpio-connector.cfg
    in raspberrypi-native.cfg
    
    Fixes: bec6c0eb094f (tcl/interface: universal config for all Raspberry Pi models)
    Signed-off-by: Tomas Deingruber <Dei...@gm...>
    Change-Id: I632c8acd84974937849b5fdf2943239def17bd6d
    Reviewed-on: https://review.openocd.org/c/openocd/+/7512
    Tested-by: jenkins
    Reviewed-by: Tomas Vanek <va...@fb...>
    Reviewed-by: Antonio Borneo <bor...@gm...>

diff --git a/tcl/interface/raspberrypi-native.cfg b/tcl/interface/raspberrypi-native.cfg
index 95426c226..7224723d6 100644
--- a/tcl/interface/raspberrypi-native.cfg
+++ b/tcl/interface/raspberrypi-native.cfg
@@ -68,4 +68,4 @@ set speed_coeff [expr { $clock / $clocks_per_timing_loop }]
 # The coefficients depend on system clock and CPU frequency scaling.
 bcm2835gpio speed_coeffs $speed_coeff $speed_offset
 
-source raspberrypi-gpio-connector.cfg
+source [find interface/raspberrypi-gpio-connector.cfg]

-----------------------------------------------------------------------

Summary of changes:
 tcl/interface/raspberrypi-native.cfg | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)


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commit 0a20e78b759efa86a676b4a9fed4027fdd84e90c
Author: Peter Collingbourne <pc...@go...>
Date:   Fri Feb 17 18:26:05 2023 -0800

    jtag/drivers/cmsis_dap: run queue on reaching transaction limit
    
    We currently fail the transfer when issuing more than 255 transactions
    at once, e.g.
    
    > read_memory 0x10000000 32 256
    CMSIS-DAP transfer count mismatch: expected 257, got 1
    
    This is because the protocol only supports 255 transactions per packet
    (65535 for block transactions), and as a result we truncate the
    transaction count when assembling the packet. Fix it by running the
    queue when we hit the limit.
    
    Change-Id: Ia9e01e3af5ad035f2cf2a32292c9d66e57eafae9
    Signed-off-by: Peter Collingbourne <pc...@go...>
    Fixes: 40bac8e8c4e5 ("jtag/drivers/cmsis_dap: improve USB packets filling")
    Reviewed-on: https://review.openocd.org/c/openocd/+/7483
    Tested-by: jenkins
    Reviewed-by: Tomas Vanek <va...@fb...>

diff --git a/src/jtag/drivers/cmsis_dap.c b/src/jtag/drivers/cmsis_dap.c
index 0c42a7f1e..1e7a851e4 100644
--- a/src/jtag/drivers/cmsis_dap.c
+++ b/src/jtag/drivers/cmsis_dap.c
@@ -1001,12 +1001,14 @@ static void cmsis_dap_swd_queue_cmd(uint8_t cmd, uint32_t *dst, uint32_t data)
 													block_cmd);
 	unsigned int resp_size = cmsis_dap_tfer_resp_size(write_count, read_count,
 													block_cmd);
+	unsigned int max_transfer_count = block_cmd ? 65535 : 255;
 
 	/* Does the DAP Transfer command and the expected response fit into one packet?
 	 * Run the queue also before a targetsel - it cannot be queued */
 	if (cmd_size > tfer_max_command_size
 			|| resp_size > tfer_max_response_size
-			|| targetsel_cmd) {
+			|| targetsel_cmd
+			|| write_count + read_count > max_transfer_count) {
 		if (cmsis_dap_handle->pending_fifo_block_count)
 			cmsis_dap_swd_read_process(cmsis_dap_handle, 0);
 

-----------------------------------------------------------------------

Summary of changes:
 src/jtag/drivers/cmsis_dap.c | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)


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commit c99c043f3f6e79e391debee29371360b0965b2d6
Author: Antonio Borneo <bor...@gm...>
Date:   Mon Dec 19 19:41:46 2022 +0100

    helper: command: drop last LF ('\n') from sequence of command_print()
    
    The OpenOCD commands produce their TCL text result through the
    pair command_print() and command_print_sameline().
    The latter is used to concatenate output in a single line.
    
    At the end of a sequence of command_print(), the last LF is taken
    as part of the command result, while it is not always needed, and
    it is even annoying when the output of two commands needs to be
    concatenate in a single line.
    
    Using command_print_sameline() in place of the last call to
    command_print() would solve the problem but it's quite expensive
    in term of coding to fix all the existing commands.
    
    Drop the last LF, if present.
    Commands that would specifically need a LF as last char, can add
    an extra LF at the end of the output.
    Document this behavior in command.h.
    
    Change-Id: I6757c20fbfce923dd393083146e8d5a1f3b790b4
    Signed-off-by: Antonio Borneo <bor...@gm...>
    Reviewed-on: https://review.openocd.org/c/openocd/+/7471
    Tested-by: jenkins
    Reviewed-by: Tomas Vanek <va...@fb...>

diff --git a/src/helper/command.c b/src/helper/command.c
index ca66cf7dd..12434ec90 100644
--- a/src/helper/command.c
+++ b/src/helper/command.c
@@ -543,8 +543,16 @@ static int run_command(struct command_context *context,
 		if (retval != ERROR_OK)
 			LOG_DEBUG("Command '%s' failed with error code %d",
 						words[0], retval);
-		/* Use the command output as the Tcl result */
-		Jim_SetResult(context->interp, cmd.output);
+		/*
+		 * Use the command output as the Tcl result.
+		 * Drop last '\n' to allow command output concatenation
+		 * while keep using command_print() everywhere.
+		 */
+		const char *output_txt = Jim_String(cmd.output);
+		int len = strlen(output_txt);
+		if (len && output_txt[len - 1] == '\n')
+			--len;
+		Jim_SetResultString(context->interp, output_txt, len);
 	}
 	Jim_DecrRefCount(context->interp, cmd.output);
 
diff --git a/src/helper/command.h b/src/helper/command.h
index 478e5c8ad..42cb9cb7d 100644
--- a/src/helper/command.h
+++ b/src/helper/command.h
@@ -370,10 +370,21 @@ struct command_context *copy_command_context(struct command_context *cmd_ctx);
  */
 void command_done(struct command_context *context);
 
+/*
+ * command_print() and command_print_sameline() are used to produce the TCL
+ * output of OpenOCD commands. command_print() automatically adds a '\n' at
+ * the end or the format string. Use command_print_sameline() to avoid the
+ * trailing '\n', e.g. to concatenate the command output in the same line.
+ * The very last '\n' of the command is stripped away (see run_command()).
+ * For commands that strictly require a '\n' as last output character, add
+ * it explicitly with either an empty command_print() or with a '\n' in the
+ * last command_print() and add a comment to document it.
+ */
 void command_print(struct command_invocation *cmd, const char *format, ...)
 __attribute__ ((format (PRINTF_ATTRIBUTE_FORMAT, 2, 3)));
 void command_print_sameline(struct command_invocation *cmd, const char *format, ...)
 __attribute__ ((format (PRINTF_ATTRIBUTE_FORMAT, 2, 3)));
+
 int command_run_line(struct command_context *context, char *line);
 int command_run_linef(struct command_context *context, const char *format, ...)
 __attribute__ ((format (PRINTF_ATTRIBUTE_FORMAT, 2, 3)));

-----------------------------------------------------------------------

Summary of changes:
 src/helper/command.c | 12 ++++++++++--
 src/helper/command.h | 11 +++++++++++
 2 files changed, 21 insertions(+), 2 deletions(-)


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commit 79caea8745284ac1d2e8931335b58c679cd11882
Author: Daniel Anselmi <dan...@gm...>
Date:   Thu Dec 22 22:28:21 2022 +0100

    flash/nor/spi: add 25pe{10/20/40/80/16}
    
    Change-Id: Ic5660bff83b8636ef397482a3313971ecdff72c0
    Signed-off-by: Daniel Anselmi <dan...@gm...>
    Reviewed-on: https://review.openocd.org/c/openocd/+/7416
    Tested-by: jenkins
    Reviewed-by: Andreas Bolsch <hyp...@gm...>
    Reviewed-by: Antonio Borneo <bor...@gm...>

diff --git a/src/flash/nor/spi.c b/src/flash/nor/spi.c
index b83df9677..3bcaa9f61 100644
--- a/src/flash/nor/spi.c
+++ b/src/flash/nor/spi.c
@@ -26,6 +26,11 @@ const struct flash_device flash_devices[] = {
 	 * pagesize, sectorsize, size_in_bytes
 	 * note: device id is usually 3 bytes long, however the unused highest byte counts
 	 * continuation codes for manufacturer id as per JEP106xx */
+	FLASH_ID("st m25pe10",          0x03, 0x00, 0x02, 0xd8, 0x00, 0x00118020, 0x100, 0x10000, 0x20000),
+	FLASH_ID("st m25pe20",          0x03, 0x00, 0x02, 0xd8, 0x00, 0x00128020, 0x100, 0x10000, 0x40000),
+	FLASH_ID("st m25pe40",          0x03, 0x00, 0x02, 0xd8, 0x00, 0x00138020, 0x100, 0x10000, 0x80000),
+	FLASH_ID("st m25pe80",          0x03, 0x00, 0x02, 0xd8, 0xc7, 0x00148020, 0x100, 0x10000, 0x100000),
+	FLASH_ID("st m25pe16",          0x03, 0x00, 0x02, 0xd8, 0xc7, 0x00158020, 0x100, 0x10000, 0x200000),
 	FLASH_ID("st m25p05",           0x03, 0x00, 0x02, 0xd8, 0xc7, 0x00102020, 0x80,  0x8000,  0x10000),
 	FLASH_ID("st m25p10",           0x03, 0x00, 0x02, 0xd8, 0xc7, 0x00112020, 0x80,  0x8000,  0x20000),
 	FLASH_ID("st m25p20",           0x03, 0x00, 0x02, 0xd8, 0xc7, 0x00122020, 0x100, 0x10000, 0x40000),

-----------------------------------------------------------------------

Summary of changes:
 src/flash/nor/spi.c | 5 +++++
 1 file changed, 5 insertions(+)


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