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From: openocd-gerrit <ope...@us...> - 2024-07-18 08:19:05
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".
The branch, master has been updated
via 6554d176e926e1e46b90e1b00d1b3ed1bd20b9ff (commit)
from 7f2d3e2925833c952ee73fb178c8fdee637c844e (commit)
Those revisions listed above that are new to this repository have
not appeared on any other notification email; so we list those
revisions in full, below.
- Log -----------------------------------------------------------------
commit 6554d176e926e1e46b90e1b00d1b3ed1bd20b9ff
Author: Tarek BOCHKATI <tar...@gm...>
Date: Fri Dec 3 13:16:50 2021 +0100
flash/stm32l4x: support STM32U59/U5Ax devices
STM32U59/U5Ax devices are similar to U57/U58x devices
with 2 flash banks up to 2 MB each
while at there update STM32U57x/U58x revisions
Change-Id: I7e5c1700acf8c9fda34f660c9274bfd8bcb1381b
Signed-off-by: Tarek BOCHKATI <tar...@gm...>
Reviewed-on: https://review.openocd.org/c/openocd/+/6875
Tested-by: jenkins
Reviewed-by: Tomas Vanek <va...@fb...>
diff --git a/src/flash/nor/stm32l4x.c b/src/flash/nor/stm32l4x.c
index 039938512..b6fa3d651 100644
--- a/src/flash/nor/stm32l4x.c
+++ b/src/flash/nor/stm32l4x.c
@@ -120,6 +120,12 @@
* http://www.st.com/resource/en/reference_manual/dm00346336.pdf
*/
+/* STM32U5xxx series for reference.
+ *
+ * RM0456 (STM32U5xx)
+ * http://www.st.com/resource/en/reference_manual/dm00477635.pdf
+ */
+
/* Erase time can be as high as 25ms, 10x this and assume it's toast... */
#define FLASH_ERASE_TIMEOUT 250
@@ -346,7 +352,11 @@ static const struct stm32l4_rev stm32g49_g4axx_revs[] = {
static const struct stm32l4_rev stm32u57_u58xx_revs[] = {
{ 0x1000, "A" }, { 0x1001, "Z" }, { 0x1003, "Y" }, { 0x2000, "B" },
- { 0x2001, "X" }, { 0x3000, "C" },
+ { 0x2001, "X" }, { 0x3000, "C" }, { 0x3001, "W" },
+};
+
+static const struct stm32l4_rev stm32u59_u5axx_revs[] = {
+ { 0x3001, "X" },
};
static const struct stm32l4_rev stm32wba5x_revs[] = {
@@ -574,6 +584,18 @@ static const struct stm32l4_part_info stm32l4_parts[] = {
.otp_base = 0x1FFF7000,
.otp_size = 1024,
},
+ {
+ .id = DEVID_STM32U59_U5AXX,
+ .revs = stm32u59_u5axx_revs,
+ .num_revs = ARRAY_SIZE(stm32u59_u5axx_revs),
+ .device_str = "STM32U59/U5Axx",
+ .max_flash_size_kb = 4096,
+ .flags = F_HAS_DUAL_BANK | F_QUAD_WORD_PROG | F_HAS_TZ | F_HAS_L5_FLASH_REGS,
+ .flash_regs_base = 0x40022000,
+ .fsize_addr = 0x0BFA07A0,
+ .otp_base = 0x0BFA0000,
+ .otp_size = 512,
+ },
{
.id = DEVID_STM32U57_U58XX,
.revs = stm32u57_u58xx_revs,
@@ -2000,9 +2022,10 @@ static int stm32l4_probe(struct flash_bank *bank)
stm32l4_info->bank1_sectors = num_pages / 2;
}
break;
+ case DEVID_STM32U59_U5AXX:
case DEVID_STM32U57_U58XX:
- /* if flash size is max (2M) the device is always dual bank
- * otherwise check DUALBANK
+ /* if flash size is more than 1M the device is always dual bank
+ * otherwise check DUALBANK bit
*/
page_size_kb = 8;
num_pages = flash_size_kb / page_size_kb;
diff --git a/src/flash/nor/stm32l4x.h b/src/flash/nor/stm32l4x.h
index 3dc090955..95b6c84a6 100644
--- a/src/flash/nor/stm32l4x.h
+++ b/src/flash/nor/stm32l4x.h
@@ -102,6 +102,7 @@
#define DEVID_STM32L4P_L4QXX 0x471
#define DEVID_STM32L55_L56XX 0x472
#define DEVID_STM32G49_G4AXX 0x479
+#define DEVID_STM32U59_U5AXX 0x481
#define DEVID_STM32U57_U58XX 0x482
#define DEVID_STM32WBA5X 0x492
#define DEVID_STM32WB1XX 0x494
-----------------------------------------------------------------------
Summary of changes:
src/flash/nor/stm32l4x.c | 29 ++++++++++++++++++++++++++---
src/flash/nor/stm32l4x.h | 1 +
2 files changed, 27 insertions(+), 3 deletions(-)
hooks/post-receive
--
Main OpenOCD repository
|
|
From: openocd-gerrit <ope...@us...> - 2024-07-13 22:31:50
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".
The branch, master has been updated
via 7f2d3e2925833c952ee73fb178c8fdee637c844e (commit)
from 812fad02fee0627d917b7ba746947f06244ed3b1 (commit)
Those revisions listed above that are new to this repository have
not appeared on any other notification email; so we list those
revisions in full, below.
- Log -----------------------------------------------------------------
commit 7f2d3e2925833c952ee73fb178c8fdee637c844e
Author: Evgeniy Naydanov <evg...@sy...>
Date: Tue Oct 31 20:51:48 2023 +0300
rtos/hwthread: derive threadid from SMP index
As defined in `target/target.h`, `coreid` is the index of the target on
the TAP, so, if an SMP group includes targets from multiple TAPs, it can
not be used as the base for `threadid`.
Change-Id: Ied7cfa42197aaf4908ef6628c6436f28d4856ebe
Signed-off-by: Evgeniy Naydanov <evg...@sy...>
Reviewed-on: https://review.openocd.org/c/openocd/+/7957
Tested-by: jenkins
Reviewed-by: Mark Zhuang <mar...@sp...>
Reviewed-by: Antonio Borneo <bor...@gm...>
diff --git a/src/rtos/hwthread.c b/src/rtos/hwthread.c
index 937d01b87..748e71c3d 100644
--- a/src/rtos/hwthread.c
+++ b/src/rtos/hwthread.c
@@ -33,7 +33,18 @@ static int hwthread_write_buffer(struct rtos *rtos, target_addr_t address,
static inline threadid_t threadid_from_target(const struct target *target)
{
- return target->coreid + 1;
+ if (!target->smp)
+ return 1;
+
+ threadid_t threadid = 1;
+ struct target_list *head;
+ foreach_smp_target(head, target->smp_targets) {
+ if (target == head->target)
+ return threadid;
+ ++threadid;
+ }
+ assert(0 && "Target is not found in it's own SMP group!");
+ return -1;
}
const struct rtos_type hwthread_rtos = {
@@ -54,14 +65,13 @@ struct hwthread_params {
int dummy_param;
};
-static int hwthread_fill_thread(struct rtos *rtos, struct target *curr, int thread_num)
+static int hwthread_fill_thread(struct rtos *rtos, struct target *curr, int thread_num, threadid_t tid)
{
char tmp_str[HW_THREAD_NAME_STR_SIZE];
- threadid_t tid = threadid_from_target(curr);
memset(tmp_str, 0, HW_THREAD_NAME_STR_SIZE);
- /* thread-id is the core-id of this core inside the SMP group plus 1 */
+ /* thread-id is the index of this core inside the SMP group plus 1 */
rtos->thread_details[thread_num].threadid = tid;
/* create the thread name */
rtos->thread_details[thread_num].exists = true;
@@ -123,9 +133,8 @@ static int hwthread_update_threads(struct rtos *rtos)
if (!target_was_examined(curr))
continue;
- threadid_t tid = threadid_from_target(curr);
-
- hwthread_fill_thread(rtos, curr, threads_found);
+ threadid_t tid = threads_found + 1;
+ hwthread_fill_thread(rtos, curr, threads_found, tid);
/* find an interesting thread to set as current */
switch (current_reason) {
@@ -182,8 +191,8 @@ static int hwthread_update_threads(struct rtos *rtos)
threads_found++;
}
} else {
- hwthread_fill_thread(rtos, target, threads_found);
- current_thread = threadid_from_target(target);
+ current_thread = 1;
+ hwthread_fill_thread(rtos, target, threads_found, current_thread);
threads_found++;
}
@@ -206,19 +215,17 @@ static int hwthread_smp_init(struct target *target)
return hwthread_update_threads(target->rtos);
}
-static struct target *hwthread_find_thread(struct target *target, int64_t thread_id)
+static struct target *hwthread_find_thread(struct target *target, threadid_t thread_id)
{
- /* Find the thread with that thread_id */
- if (!target)
- return NULL;
- if (target->smp) {
- struct target_list *head;
- foreach_smp_target(head, target->smp_targets) {
- if (thread_id == threadid_from_target(head->target))
- return head->target;
- }
- } else if (thread_id == threadid_from_target(target)) {
+ /* Find the thread with that thread_id (index in SMP group plus 1)*/
+ if (!(target && target->smp))
return target;
+ struct target_list *head;
+ threadid_t tid = 1;
+ foreach_smp_target(head, target->smp_targets) {
+ if (thread_id == tid)
+ return head->target;
+ ++tid;
}
return NULL;
}
@@ -297,7 +304,7 @@ static int hwthread_get_thread_reg(struct rtos *rtos, int64_t thread_id,
}
if (!target_was_examined(curr)) {
- LOG_ERROR("Target %d hasn't been examined yet.", curr->coreid);
+ LOG_TARGET_ERROR(curr, "Target hasn't been examined yet.");
return ERROR_FAIL;
}
@@ -382,9 +389,9 @@ static int hwthread_thread_packet(struct connection *connection, const char *pac
return ERROR_FAIL;
}
target->rtos->current_thread = current_threadid;
- } else
- if (current_threadid == 0 || current_threadid == -1)
+ } else if (current_threadid == 0 || current_threadid == -1) {
target->rtos->current_thread = threadid_from_target(target);
+ }
target->rtos->current_threadid = current_threadid;
-----------------------------------------------------------------------
Summary of changes:
src/rtos/hwthread.c | 53 ++++++++++++++++++++++++++++++-----------------------
1 file changed, 30 insertions(+), 23 deletions(-)
hooks/post-receive
--
Main OpenOCD repository
|
|
From: openocd-gerrit <ope...@us...> - 2024-07-13 22:30:35
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".
The branch, master has been updated
via 812fad02fee0627d917b7ba746947f06244ed3b1 (commit)
from 40a6af6eda6e12768ab4341de10f78140f925e25 (commit)
Those revisions listed above that are new to this repository have
not appeared on any other notification email; so we list those
revisions in full, below.
- Log -----------------------------------------------------------------
commit 812fad02fee0627d917b7ba746947f06244ed3b1
Author: Nishanth Menon <nm...@ti...>
Date: Thu May 16 15:49:37 2024 -0500
tcl/board: Add am62p/am62a7/j722s native swd configuration
Direct memory driver swd native configuration for am62a7, am62p and
J722S SoCs. All three share common memory map for the debug address
map, so there is a strong reuse. However, introduce board file
specific to the board to allow users to directly get started.
Change-Id: I5609925a2e9918fd4c91d9fd40fbee98de27fdbc
Signed-off-by: Nishanth Menon <nm...@ti...>
Reviewed-on: https://review.openocd.org/c/openocd/+/8283
Tested-by: jenkins
Reviewed-by: Vaishnav M A <vai...@be...>
Reviewed-by: Antonio Borneo <bor...@gm...>
Reviewed-by: Oleksij Rempel <li...@re...>
diff --git a/tcl/board/ti_am62a7_swd_native.cfg b/tcl/board/ti_am62a7_swd_native.cfg
new file mode 100644
index 000000000..99fc0b0b3
--- /dev/null
+++ b/tcl/board/ti_am62a7_swd_native.cfg
@@ -0,0 +1,22 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+# Copyright (C) 2024 Texas Instruments Incorporated - http://www.ti.com/
+#
+# Texas Instruments AM62A7
+# Link: https://www.ti.com/product/AM62A7
+#
+# This configuration file is used as a self hosted debug configuration that
+# works on every AM62A7 platform based on firewall configuration permitted
+# in the system.
+#
+# In this system openOCD runs on one of the CPUs inside AM62A7 and provides
+# network ports that can then be used to debug the microcontrollers on the
+# SoC - either self hosted IDE OR remotely.
+
+# We are using dmem, which uses dapdirect_swd transport
+adapter driver dmem
+
+if { ![info exists SOC] } {
+ set SOC am62a7
+}
+
+source [find target/ti_k3.cfg]
diff --git a/tcl/board/ti_am62p_swd_native.cfg b/tcl/board/ti_am62p_swd_native.cfg
new file mode 100644
index 000000000..fa549f358
--- /dev/null
+++ b/tcl/board/ti_am62p_swd_native.cfg
@@ -0,0 +1,22 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+# Copyright (C) 2024 Texas Instruments Incorporated - http://www.ti.com/
+#
+# Texas Instruments am62p
+# Link: https://www.ti.com/product/AM62P
+#
+# This configuration file is used as a self hosted debug configuration that
+# works on every AM62P platform based on firewall configuration permitted
+# in the system.
+#
+# In this system openOCD runs on one of the CPUs inside AM62P and provides
+# network ports that can then be used to debug the microcontrollers on the
+# SoC - either self hosted IDE OR remotely.
+
+# We are using dmem, which uses dapdirect_swd transport
+adapter driver dmem
+
+if { ![info exists SOC] } {
+ set SOC am62p
+}
+
+source [find target/ti_k3.cfg]
diff --git a/tcl/board/ti_j722s_swd_native.cfg b/tcl/board/ti_j722s_swd_native.cfg
new file mode 100644
index 000000000..bbe0d508c
--- /dev/null
+++ b/tcl/board/ti_j722s_swd_native.cfg
@@ -0,0 +1,23 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+# Copyright (C) 2024 Texas Instruments Incorporated - http://www.ti.com/
+#
+# Texas Instruments J722S/AM67/TDA4VEN
+# Link: https://www.ti.com/product/AM67
+# Link: https://www.ti.com/product/TDA4VEN-Q1
+#
+# This configuration file is used as a self hosted debug configuration that
+# works on every J722S platform based on firewall configuration permitted
+# in the system.
+#
+# In this system openOCD runs on one of the CPUs inside J722S and provides
+# network ports that can then be used to debug the microcontrollers on the
+# SoC - either self hosted IDE OR remotely.
+
+# We are using dmem, which uses dapdirect_swd transport
+adapter driver dmem
+
+if { ![info exists SOC] } {
+ set SOC j722s
+}
+
+source [find target/ti_k3.cfg]
diff --git a/tcl/target/ti_k3.cfg b/tcl/target/ti_k3.cfg
index ebea82179..2ae0f75b8 100644
--- a/tcl/target/ti_k3.cfg
+++ b/tcl/target/ti_k3.cfg
@@ -209,6 +209,16 @@ switch $_soc {
# Sysctrl power-ap unlock offsets
set _sysctrl_ap_unlock_offsets {0xf0 0x78}
+ # Setup DMEM access descriptions
+ # DAPBUS (Debugger) description
+ set _dmem_base_address 0x740002000
+ set _dmem_ap_address_offset 0x100
+ set _dmem_max_aps 10
+ # Emulated AP description
+ set _dmem_emu_base_address 0x760000000
+ set _dmem_emu_base_address_map_to 0x1d500000
+ set _dmem_emu_ap_list 1
+
# Overrides for am62p
if { "$_soc" == "am62p" } {
set _K3_DAP_TAPID 0x0bb9d02f
-----------------------------------------------------------------------
Summary of changes:
.../{ti_j721e_swd_native.cfg => ti_am62a7_swd_native.cfg} | 13 +++++++------
.../{ti_am625_swd_native.cfg => ti_am62p_swd_native.cfg} | 12 ++++++------
.../{ti_am625_swd_native.cfg => ti_j722s_swd_native.cfg} | 13 +++++++------
tcl/target/ti_k3.cfg | 10 ++++++++++
4 files changed, 30 insertions(+), 18 deletions(-)
copy tcl/board/{ti_j721e_swd_native.cfg => ti_am62a7_swd_native.cfg} (58%)
copy tcl/board/{ti_am625_swd_native.cfg => ti_am62p_swd_native.cfg} (59%)
copy tcl/board/{ti_am625_swd_native.cfg => ti_j722s_swd_native.cfg} (55%)
hooks/post-receive
--
Main OpenOCD repository
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|
From: openocd-gerrit <ope...@us...> - 2024-07-13 22:30:06
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".
The branch, master has been updated
via 40a6af6eda6e12768ab4341de10f78140f925e25 (commit)
from 73b15194eaf0c6d1a52e82d05c3d6771d89c9886 (commit)
Those revisions listed above that are new to this repository have
not appeared on any other notification email; so we list those
revisions in full, below.
- Log -----------------------------------------------------------------
commit 40a6af6eda6e12768ab4341de10f78140f925e25
Author: Marc Schink <de...@za...>
Date: Mon Jun 17 16:39:10 2024 +0200
tcl: Replace 'tcl_' prefix with 'tcl' command group
Change-Id: Iee1e84a87d07172aa6b0adfb7b85fb465cefb979
Signed-off-by: Marc Schink <de...@za...>
Reviewed-on: https://review.openocd.org/c/openocd/+/8345
Tested-by: jenkins
Reviewed-by: Antonio Borneo <bor...@gm...>
diff --git a/tcl/interface/vdebug.cfg b/tcl/interface/vdebug.cfg
index 116ac8a75..9097c33da 100644
--- a/tcl/interface/vdebug.cfg
+++ b/tcl/interface/vdebug.cfg
@@ -24,7 +24,7 @@ vdebug server $_VDEBUGHOST:$_VDEBUGPORT
bindto 0.0.0.0
#gdb port 3333
#telnet_port disabled
-tcl_port disabled
+tcl port disabled
# transaction batching: 0 - no batching, 1 - (default) wr, 2 - rw
vdebug batching 1
diff --git a/tcl/target/u8500.cfg b/tcl/target/u8500.cfg
index 932ef8c20..b87d2613a 100644
--- a/tcl/target/u8500.cfg
+++ b/tcl/target/u8500.cfg
@@ -142,7 +142,7 @@ proc enable_apetap {} {
}
}
-tcl_port 5555
+tcl port 5555
telnet_port 4444
gdb port 3333
-----------------------------------------------------------------------
Summary of changes:
tcl/interface/vdebug.cfg | 2 +-
tcl/target/u8500.cfg | 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
hooks/post-receive
--
Main OpenOCD repository
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From: openocd-gerrit <ope...@us...> - 2024-07-13 22:29:40
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".
The branch, master has been updated
via 73b15194eaf0c6d1a52e82d05c3d6771d89c9886 (commit)
from b764fc2a4dda2dacba7e9d3dd901fc6b8b1ad34b (commit)
Those revisions listed above that are new to this repository have
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- Log -----------------------------------------------------------------
commit 73b15194eaf0c6d1a52e82d05c3d6771d89c9886
Author: Marc Schink <de...@za...>
Date: Mon Jun 17 09:12:34 2024 +0200
server/tcl: Restructure commands
Use a command group 'tcl' with subcommands instead of individual
commands with 'tcl_' prefix.
The old commands are still available to ensure backwards compatibility,
but are marked as deprecated.
Change-Id: I1efd8a0e2c1403833f8cb656510a54d5ab0b2740
Signed-off-by: Marc Schink <de...@za...>
Reviewed-on: https://review.openocd.org/c/openocd/+/8344
Reviewed-by: Antonio Borneo <bor...@gm...>
Tested-by: jenkins
diff --git a/doc/openocd.texi b/doc/openocd.texi
index 58f1d0421..7169ef08b 100644
--- a/doc/openocd.texi
+++ b/doc/openocd.texi
@@ -2217,7 +2217,7 @@ gdb (with 'set remotetimeout') is recommended. An insufficient timeout may
cause initialization to fail with "Unknown remote qXfer reply: OK".
@end deffn
-@deffn {Config Command} {tcl_port} [number]
+@deffn {Config Command} {tcl port} [number]
Specify or query the port used for a simplified RPC
connection that can be used by clients to issue TCL commands and get the
output from the Tcl engine.
@@ -10588,7 +10588,7 @@ the destination of the trace data:
@item @option{external} -- configure TPIU/SWO to let user capture trace
output externally, either with an additional UART or with a logic analyzer (default);
@item @option{-} -- configure TPIU/SWO and debug adapter to gather trace data
-and forward it to @command{tcl_trace} command;
+and forward it to @command{tcl trace} command;
@item @option{:}@var{port} -- configure TPIU/SWO and debug adapter to gather
trace data, open a TCP server at port @var{port} and send the trace data to
each connected client;
@@ -12776,7 +12776,7 @@ OpenOCD provides a simple RPC server that allows to run arbitrary Tcl
commands and receive the results.
To access it, your application needs to connect to a configured TCP port
-(see @command{tcl_port}). Then it can pass any string to the
+(see @command{tcl port}). Then it can pass any string to the
interpreter terminating it with @code{0x1a} and wait for the return
value (it will be terminated with @code{0x1a} as well). This can be
repeated as many times as desired without reopening the connection.
@@ -12802,7 +12802,7 @@ type target_state state [state-name]
type target_reset mode [reset-mode]
@end verbatim
-@deffn {Command} {tcl_notifications} [on/off]
+@deffn {Command} {tcl notifications} [on/off]
Toggle output of target notifications to the current Tcl RPC server.
Only available from the Tcl RPC server.
Defaults to off.
@@ -12821,7 +12821,7 @@ Target trace data is emitted as a Tcl associative array in the following format.
type target_trace data [trace-data-hex-encoded]
@end verbatim
-@deffn {Command} {tcl_trace} [on/off]
+@deffn {Command} {tcl trace} [on/off]
Toggle output of target trace data to the current Tcl RPC server.
Only available from the Tcl RPC server.
Defaults to off.
diff --git a/src/server/startup.tcl b/src/server/startup.tcl
index 93f718927..ebfb0562e 100644
--- a/src/server/startup.tcl
+++ b/src/server/startup.tcl
@@ -95,3 +95,21 @@ proc "gdb_save_tdesc" {} {
echo "DEPRECATED! use 'gdb save_tdesc', not 'gdb_save_tdesc'"
eval gdb save_tdesc
}
+
+lappend _telnet_autocomplete_skip "tcl_port"
+proc "tcl_port" {args} {
+ echo "DEPRECATED! use 'tcl port' not 'tcl_port'"
+ eval tcl port $args
+}
+
+lappend _telnet_autocomplete_skip "tcl_notifications"
+proc "tcl_notifications" {state} {
+ echo "DEPRECATED! use 'tcl notifications' not 'tcl_notifications'"
+ eval tcl notifications $state
+}
+
+lappend _telnet_autocomplete_skip "tcl_trace"
+proc "tcl_trace" {state} {
+ echo "DEPRECATED! use 'tcl trace' not 'tcl_trace'"
+ eval tcl trace $state
+}
diff --git a/src/server/tcl_server.c b/src/server/tcl_server.c
index 06a7096d8..16cc55e29 100644
--- a/src/server/tcl_server.c
+++ b/src/server/tcl_server.c
@@ -323,9 +323,9 @@ COMMAND_HANDLER(handle_tcl_trace_command)
}
}
-static const struct command_registration tcl_command_handlers[] = {
+static const struct command_registration tcl_subcommand_handlers[] = {
{
- .name = "tcl_port",
+ .name = "port",
.handler = handle_tcl_port_command,
.mode = COMMAND_CONFIG,
.help = "Specify port on which to listen "
@@ -334,14 +334,14 @@ static const struct command_registration tcl_command_handlers[] = {
.usage = "[port_num]",
},
{
- .name = "tcl_notifications",
+ .name = "notifications",
.handler = handle_tcl_notifications_command,
.mode = COMMAND_EXEC,
.help = "Target Notification output",
.usage = "[on|off]",
},
{
- .name = "tcl_trace",
+ .name = "trace",
.handler = handle_tcl_trace_command,
.mode = COMMAND_EXEC,
.help = "Target trace output",
@@ -350,6 +350,17 @@ static const struct command_registration tcl_command_handlers[] = {
COMMAND_REGISTRATION_DONE
};
+static const struct command_registration tcl_command_handlers[] = {
+ {
+ .name = "tcl",
+ .mode = COMMAND_ANY,
+ .help = "tcl command group",
+ .usage = "",
+ .chain = tcl_subcommand_handlers,
+ },
+ COMMAND_REGISTRATION_DONE
+};
+
int tcl_register_commands(struct command_context *cmd_ctx)
{
tcl_port = strdup("6666");
-----------------------------------------------------------------------
Summary of changes:
doc/openocd.texi | 10 +++++-----
src/server/startup.tcl | 18 ++++++++++++++++++
src/server/tcl_server.c | 19 +++++++++++++++----
3 files changed, 38 insertions(+), 9 deletions(-)
hooks/post-receive
--
Main OpenOCD repository
|
|
From: openocd-gerrit <ope...@us...> - 2024-07-13 22:29:09
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".
The branch, master has been updated
via b764fc2a4dda2dacba7e9d3dd901fc6b8b1ad34b (commit)
from 44cfdef0a40d6c5d4514a927d9e46f5c2acc1586 (commit)
Those revisions listed above that are new to this repository have
not appeared on any other notification email; so we list those
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- Log -----------------------------------------------------------------
commit b764fc2a4dda2dacba7e9d3dd901fc6b8b1ad34b
Author: Marc Schink <de...@za...>
Date: Fri Jun 14 16:28:38 2024 +0200
tcl: Replace 'gdb_' prefix with 'gdb' command group
Change-Id: I0490b4c112c1a922bf77a4b37df2a630a8f6cea1
Signed-off-by: Marc Schink <de...@za...>
Reviewed-on: https://review.openocd.org/c/openocd/+/8337
Reviewed-by: Antonio Borneo <bor...@gm...>
Tested-by: jenkins
diff --git a/tcl/board/actux3.cfg b/tcl/board/actux3.cfg
index edb529c88..7c2ce0677 100644
--- a/tcl/board/actux3.cfg
+++ b/tcl/board/actux3.cfg
@@ -50,7 +50,7 @@ reset init
# setup to debug u-boot in flash
proc uboot_debug {} {
- gdb_breakpoint_override hard
+ gdb breakpoint_override hard
xscale vector_catch 0xFF
xscale vector_table low 1 0xe59ff018
diff --git a/tcl/board/mini2440.cfg b/tcl/board/mini2440.cfg
index 85d9a35b9..5642cb1ab 100644
--- a/tcl/board/mini2440.cfg
+++ b/tcl/board/mini2440.cfg
@@ -128,7 +128,7 @@ reset_config trst_and_srst
# GDB Setup
#-------------------------------------------------------------------------
- gdb_breakpoint_override hard
+ gdb breakpoint_override hard
#------------------------------------------------
# ARM SPECIFIC
diff --git a/tcl/board/mini6410.cfg b/tcl/board/mini6410.cfg
index 18f9e8d25..276e7180e 100644
--- a/tcl/board/mini6410.cfg
+++ b/tcl/board/mini6410.cfg
@@ -95,7 +95,7 @@ adapter srst delay 100
jtag_ntrst_delay 100
reset_config trst_and_srst
-gdb_breakpoint_override hard
+gdb breakpoint_override hard
targets
nand device $_CHIPNAME.flash s3c6400 $_CHIPNAME.cpu
diff --git a/tcl/board/or1k_generic.cfg b/tcl/board/or1k_generic.cfg
index 915a0de24..b6cf3a097 100644
--- a/tcl/board/or1k_generic.cfg
+++ b/tcl/board/or1k_generic.cfg
@@ -22,7 +22,7 @@ poll_period 1
adapter speed 3000
# Enable the target description feature
-gdb_target_description enable
+gdb target_description enable
# Add a new register in the cpu register list. This register will be
# included in the generated target descriptor file.
diff --git a/tcl/interface/vdebug.cfg b/tcl/interface/vdebug.cfg
index 7350bb9a9..116ac8a75 100644
--- a/tcl/interface/vdebug.cfg
+++ b/tcl/interface/vdebug.cfg
@@ -22,7 +22,7 @@ vdebug server $_VDEBUGHOST:$_VDEBUGPORT
# example config listen on all interfaces, disable tcl/telnet server
bindto 0.0.0.0
-#gdb_port 3333
+#gdb port 3333
#telnet_port disabled
tcl_port disabled
diff --git a/tcl/target/esi32xx.cfg b/tcl/target/esi32xx.cfg
index a8b0823da..d29c636cf 100644
--- a/tcl/target/esi32xx.cfg
+++ b/tcl/target/esi32xx.cfg
@@ -35,4 +35,4 @@ reset_config none
# The default linker scripts provided by the eSi-RISC toolchain do not
# specify attributes on memory regions, which results in incorrect
# application of software breakpoints by GDB.
-gdb_breakpoint_override hard
+gdb breakpoint_override hard
diff --git a/tcl/target/esp_common.cfg b/tcl/target/esp_common.cfg
index ac8cd6a19..e9a188f9f 100644
--- a/tcl/target/esp_common.cfg
+++ b/tcl/target/esp_common.cfg
@@ -181,7 +181,7 @@ proc configure_esp_xtensa_default_settings { } {
$_TARGETNAME_0 xtensa smpbreak BreakIn BreakOut
}
- gdb_breakpoint_override hard
+ gdb breakpoint_override hard
if { [info exists _FLASH_VOLTAGE] } {
$_TARGETNAME_0 $_CHIPNAME flashbootstrap $_FLASH_VOLTAGE
diff --git a/tcl/target/omap4430.cfg b/tcl/target/omap4430.cfg
index a448550f6..4bc7fe1bf 100644
--- a/tcl/target/omap4430.cfg
+++ b/tcl/target/omap4430.cfg
@@ -128,4 +128,4 @@ $_CHIPNAME.m30 configure -event reset-assert { }
$_CHIPNAME.m31 configure -event reset-assert { }
# Soft breakpoints don't currently work due to broken cache handling
-gdb_breakpoint_override hard
+gdb breakpoint_override hard
diff --git a/tcl/target/omap4460.cfg b/tcl/target/omap4460.cfg
index bbc824b2a..85ba96c51 100644
--- a/tcl/target/omap4460.cfg
+++ b/tcl/target/omap4460.cfg
@@ -128,4 +128,4 @@ $_CHIPNAME.m30 configure -event reset-assert { }
$_CHIPNAME.m31 configure -event reset-assert { }
# Soft breakpoints don't currently work due to broken cache handling
-gdb_breakpoint_override hard
+gdb breakpoint_override hard
diff --git a/tcl/target/omapl138.cfg b/tcl/target/omapl138.cfg
index 2d670b98a..78c456d5c 100644
--- a/tcl/target/omapl138.cfg
+++ b/tcl/target/omapl138.cfg
@@ -64,5 +64,5 @@ arm7_9 dcc_downloads enable
etm config $_TARGETNAME 16 normal full etb
etb config $_TARGETNAME $_CHIPNAME.etb
-gdb_breakpoint_override hard
+gdb breakpoint_override hard
arm7_9 dbgrq enable
diff --git a/tcl/target/rp2040.cfg b/tcl/target/rp2040.cfg
index de76b4e29..5e78c6931 100644
--- a/tcl/target/rp2040.cfg
+++ b/tcl/target/rp2040.cfg
@@ -96,7 +96,7 @@ if { $_USE_CORE == 1 } {
set _FLASH_TARGET $_TARGETNAME_0
}
# Backup the work area. The flash probe runs an algorithm on the target CPU.
-# The flash is probed during gdb connect if gdb_memory_map is enabled (by default).
+# The flash is probed during gdb connect if gdb memory_map is enabled (by default).
$_FLASH_TARGET configure -work-area-phys 0x20010000 -work-area-size $_WORKAREASIZE -work-area-backup 1
set _FLASHNAME $_CHIPNAME.flash
flash bank $_FLASHNAME rp2040_flash 0x10000000 0 0 0 $_FLASH_TARGET
diff --git a/tcl/target/u8500.cfg b/tcl/target/u8500.cfg
index 417fdd18f..932ef8c20 100644
--- a/tcl/target/u8500.cfg
+++ b/tcl/target/u8500.cfg
@@ -144,7 +144,7 @@ proc enable_apetap {} {
tcl_port 5555
telnet_port 4444
-gdb_port 3333
+gdb port 3333
if { [info exists CHIPNAME] } {
global _CHIPNAME
@@ -319,7 +319,7 @@ global _MAXSPEED
adapter speed $_MAXSPEED
-gdb_breakpoint_override hard
+gdb breakpoint_override hard
set mem inaccessible-by-default-off
jtag_ntrst_delay 100
diff --git a/tcl/target/xtensa.cfg b/tcl/target/xtensa.cfg
index 561131d84..c277673e4 100644
--- a/tcl/target/xtensa.cfg
+++ b/tcl/target/xtensa.cfg
@@ -67,4 +67,4 @@ if { $_XTENSA_NUM_CORES == 1 } {
$_TARGETNAME configure -event reset-assert-post { soft_reset_halt }
}
-gdb_report_register_access_error enable
+gdb report_register_access_error enable
-----------------------------------------------------------------------
Summary of changes:
tcl/board/actux3.cfg | 2 +-
tcl/board/mini2440.cfg | 2 +-
tcl/board/mini6410.cfg | 2 +-
tcl/board/or1k_generic.cfg | 2 +-
tcl/interface/vdebug.cfg | 2 +-
tcl/target/esi32xx.cfg | 2 +-
tcl/target/esp_common.cfg | 2 +-
tcl/target/omap4430.cfg | 2 +-
tcl/target/omap4460.cfg | 2 +-
tcl/target/omapl138.cfg | 2 +-
tcl/target/rp2040.cfg | 2 +-
tcl/target/u8500.cfg | 4 ++--
tcl/target/xtensa.cfg | 2 +-
13 files changed, 14 insertions(+), 14 deletions(-)
hooks/post-receive
--
Main OpenOCD repository
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|
From: openocd-gerrit <ope...@us...> - 2024-07-13 22:28:54
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".
The branch, master has been updated
via 44cfdef0a40d6c5d4514a927d9e46f5c2acc1586 (commit)
from 2992ec909588bebf89fe87e1db0aae0f51f0ff07 (commit)
Those revisions listed above that are new to this repository have
not appeared on any other notification email; so we list those
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- Log -----------------------------------------------------------------
commit 44cfdef0a40d6c5d4514a927d9e46f5c2acc1586
Author: Marc Schink <de...@za...>
Date: Fri Jun 14 16:19:56 2024 +0200
server/gdb: Restructure commands
Use a command group 'gdb' with subcommands instead of individual
commands with 'gdb_' prefix.
The old commands are still available to ensure backwards compatibility,
but are marked as deprecated.
Change-Id: I037dc58554e589d5710cf46924e0a00f863aa300
Signed-off-by: Marc Schink <de...@za...>
Reviewed-on: https://review.openocd.org/c/openocd/+/8336
Tested-by: jenkins
Reviewed-by: Antonio Borneo <bor...@gm...>
diff --git a/doc/openocd.texi b/doc/openocd.texi
index a7c1e6d08..58f1d0421 100644
--- a/doc/openocd.texi
+++ b/doc/openocd.texi
@@ -930,8 +930,8 @@ a board with an Atmel AT91SAM7X256 microcontroller:
source [find interface/ftdi/signalyzer.cfg]
# GDB can also flash my flash!
-gdb_memory_map enable
-gdb_flash_program enable
+gdb memory_map enable
+gdb flash_program enable
source [find target/sam7x256.cfg]
@end example
@@ -940,8 +940,8 @@ Here is the command line equivalent of that configuration:
@example
openocd -f interface/ftdi/signalyzer.cfg \
- -c "gdb_memory_map enable" \
- -c "gdb_flash_program enable" \
+ -c "gdb memory_map enable" \
+ -c "gdb flash_program enable" \
-f target/sam7x256.cfg
@end example
@@ -2183,12 +2183,12 @@ In such cases, just specify the relevant port number as "disabled".
You can request the operating system to select one of the available
ports for the server by specifying the relevant port number as "0".
-@anchor{gdb_port}
-@deffn {Config Command} {gdb_port} [number]
+@anchor{gdb port}
+@deffn {Config Command} {gdb port} [number]
@cindex GDB server
Normally gdb listens to a TCP/IP port, but GDB can also
communicate via pipes(stdin/out or named pipes). The name
-"gdb_port" stuck because it covers probably more than 90% of
+"gdb port" stuck because it covers probably more than 90% of
the normal use cases.
No arguments reports GDB port. "pipe" means listen to stdin
@@ -2203,7 +2203,7 @@ Output pipe is the same name as input pipe, but with 'o' appended,
e.g. /var/gdb, /var/gdbo.
The GDB port for the first target will be the base port, the
-second target will listen on gdb_port + 1, and so on.
+second target will listen on port + 1, and so on.
When not specified during the configuration stage,
the port @var{number} defaults to 3333.
When @var{number} is not a numeric value, incrementing it to compute
@@ -2212,7 +2212,7 @@ the next port number does not work. In this case, specify the proper
commands @command{target create} or @command{$target_name configure}.
@xref{gdbportoverride,,option -gdb-port}.
-Note: when using "gdb_port pipe", increasing the default remote timeout in
+Note: when using "gdb port pipe", increasing the default remote timeout in
gdb (with 'set remotetimeout') is recommended. An insufficient timeout may
cause initialization to fail with "Unknown remote qXfer reply: OK".
@end deffn
@@ -2246,7 +2246,7 @@ The ones listed here are static and global.
@xref{targetevents,,Target Events}, about configuring target-specific event handling.
@anchor{gdbbreakpointoverride}
-@deffn {Command} {gdb_breakpoint_override} [@option{hard}|@option{soft}|@option{disable}]
+@deffn {Command} {gdb breakpoint_override} [@option{hard}|@option{soft}|@option{disable}]
Force breakpoint type for gdb @command{break} commands.
This option supports GDB GUIs which don't
distinguish hard versus soft breakpoints, if the default OpenOCD and
@@ -2255,41 +2255,41 @@ breakpoints if the memory map has been set up for flash regions.
@end deffn
@anchor{gdbflashprogram}
-@deffn {Config Command} {gdb_flash_program} (@option{enable}|@option{disable})
+@deffn {Config Command} {gdb flash_program} (@option{enable}|@option{disable})
Set to @option{enable} to cause OpenOCD to program the flash memory when a
vFlash packet is received.
The default behaviour is @option{enable}.
@end deffn
-@deffn {Config Command} {gdb_memory_map} (@option{enable}|@option{disable})
+@deffn {Config Command} {gdb memory_map} (@option{enable}|@option{disable})
Set to @option{enable} to cause OpenOCD to send the memory configuration to GDB when
requested. GDB will then know when to set hardware breakpoints, and program flash
-using the GDB load command. @command{gdb_flash_program enable} must also be enabled
+using the GDB load command. @command{gdb flash_program enable} must also be enabled
for flash programming to work.
Default behaviour is @option{enable}.
-@xref{gdbflashprogram,,gdb_flash_program}.
+@xref{gdbflashprogram,,gdb flash_program}.
@end deffn
-@deffn {Config Command} {gdb_report_data_abort} (@option{enable}|@option{disable})
+@deffn {Config Command} {gdb report_data_abort} (@option{enable}|@option{disable})
Specifies whether data aborts cause an error to be reported
by GDB memory read packets.
The default behaviour is @option{disable};
use @option{enable} see these errors reported.
@end deffn
-@deffn {Config Command} {gdb_report_register_access_error} (@option{enable}|@option{disable})
+@deffn {Config Command} {gdb report_register_access_error} (@option{enable}|@option{disable})
Specifies whether register accesses requested by GDB register read/write
packets report errors or not.
The default behaviour is @option{disable};
use @option{enable} see these errors reported.
@end deffn
-@deffn {Config Command} {gdb_target_description} (@option{enable}|@option{disable})
+@deffn {Config Command} {gdb target_description} (@option{enable}|@option{disable})
Set to @option{enable} to cause OpenOCD to send the target descriptions to gdb via qXfer:features:read packet.
The default behaviour is @option{enable}.
@end deffn
-@deffn {Command} {gdb_save_tdesc}
+@deffn {Command} {gdb save_tdesc}
Saves the target description file to the local file system.
The file name is @i{target_name}.xml.
@@ -5198,11 +5198,11 @@ where it is a mandatory configuration for the target run control.
for instruction on how to declare and control a CTI instance.
@anchor{gdbportoverride}
-@item @code{-gdb-port} @var{number} -- see command @command{gdb_port} for the
+@item @code{-gdb-port} @var{number} -- @xref{gdb port,,command gdb port} for the
possible values of the parameter @var{number}, which are not only numeric values.
Use this option to override, for this target only, the global parameter set with
-command @command{gdb_port}.
-@xref{gdb_port,,command gdb_port}.
+command @command{gdb port}.
+@xref{gdb port,,command gdb port}.
@item @code{-gdb-max-connections} @var{number} -- EXPERIMENTAL: set the maximum
number of GDB connections that are allowed for the target. Default is 1.
@@ -12417,7 +12417,7 @@ target remote localhost:3333
A pipe connection is typically started as follows:
@example
target extended-remote | \
- openocd -c "gdb_port pipe; log_output openocd.log"
+ openocd -c "gdb port pipe; log_output openocd.log"
@end example
This would cause GDB to run OpenOCD and communicate using pipes (stdin/stdout).
Using this method has the advantage of GDB starting/stopping OpenOCD for the debug
@@ -12501,7 +12501,7 @@ using @command{gdb -x filename}.
By default the target memory map is sent to GDB. This can be disabled by
the following OpenOCD configuration option:
@example
-gdb_memory_map disable
+gdb memory_map disable
@end example
For this to function correctly a valid flash configuration must also be set
in OpenOCD. For faster performance you should also configure a valid
@@ -12509,8 +12509,8 @@ working area.
Informing GDB of the memory map of the target will enable GDB to protect any
flash areas of the target and use hardware breakpoints by default. This means
-that the OpenOCD option @command{gdb_breakpoint_override} is not required when
-using a memory map. @xref{gdbbreakpointoverride,,gdb_breakpoint_override}.
+that the OpenOCD option @command{gdb breakpoint_override} is not required when
+using a memory map. @xref{gdbbreakpointoverride,,gdb breakpoint_override}.
To view the configured memory map in GDB, use the GDB command @option{info mem}.
All other unassigned addresses within GDB are treated as RAM.
@@ -12521,7 +12521,7 @@ This can be changed to the old behaviour by using the following GDB command
set mem inaccessible-by-default off
@end example
-If @command{gdb_flash_program enable} is also used, GDB will be able to
+If @command{gdb flash_program enable} is also used, GDB will be able to
program any flash memory using the vFlash interface.
GDB will look at the target memory map when a load command is given, if any
@@ -12560,9 +12560,9 @@ $_TARGETNAME configure -event gdb-attach @{@}
@end example
If any of installed flash banks does not support probe on running target,
-switch off gdb_memory_map:
+switch off gdb memory_map:
@example
-gdb_memory_map disable
+gdb memory_map disable
@end example
Ensure GDB is configured without interrupt-on-connect.
@@ -12571,7 +12571,7 @@ Some GDB versions set it by default, some does not.
set remote interrupt-on-connect off
@end example
-If you switched gdb_memory_map off, you may want to setup GDB memory map
+If you switched gdb memory_map off, you may want to setup GDB memory map
manually or issue @command{set mem inaccessible-by-default off}
Now you can issue GDB command @command{target extended-remote ...} and inspect memory
diff --git a/src/server/gdb_server.c b/src/server/gdb_server.c
index 58326f77b..2db3123a0 100644
--- a/src/server/gdb_server.c
+++ b/src/server/gdb_server.c
@@ -1548,7 +1548,7 @@ static int gdb_read_memory_packet(struct connection *connection,
* cmd = view%20audit-trail&database = gdb&pr = 2395
*
* For now, the default is to fix up things to make current GDB versions work.
- * This can be overwritten using the gdb_report_data_abort <'enable'|'disable'> command.
+ * This can be overwritten using the "gdb report_data_abort <'enable'|'disable'>" command.
*/
memset(buffer, 0, len);
retval = ERROR_OK;
@@ -3938,7 +3938,7 @@ COMMAND_HANDLER(handle_gdb_sync_command)
if (!current_gdb_connection) {
command_print(CMD,
- "gdb_sync command can only be run from within gdb using \"monitor gdb_sync\"");
+ "gdb sync command can only be run from within gdb using \"monitor gdb sync\"");
return ERROR_FAIL;
}
@@ -3947,7 +3947,6 @@ COMMAND_HANDLER(handle_gdb_sync_command)
return ERROR_OK;
}
-/* daemon configuration command gdb_port */
COMMAND_HANDLER(handle_gdb_port_command)
{
int retval = CALL_COMMAND_HANDLER(server_pipe_command, &gdb_port);
@@ -3994,7 +3993,6 @@ COMMAND_HANDLER(handle_gdb_report_register_access_error)
return ERROR_OK;
}
-/* gdb_breakpoint_override */
COMMAND_HANDLER(handle_gdb_breakpoint_override_command)
{
if (CMD_ARGC == 0) {
@@ -4071,9 +4069,9 @@ out:
return retval;
}
-static const struct command_registration gdb_command_handlers[] = {
+static const struct command_registration gdb_subcommand_handlers[] = {
{
- .name = "gdb_sync",
+ .name = "sync",
.handler = handle_gdb_sync_command,
.mode = COMMAND_ANY,
.help = "next stepi will return immediately allowing "
@@ -4082,7 +4080,7 @@ static const struct command_registration gdb_command_handlers[] = {
.usage = ""
},
{
- .name = "gdb_port",
+ .name = "port",
.handler = handle_gdb_port_command,
.mode = COMMAND_CONFIG,
.help = "Normally gdb listens to a TCP/IP port. Each subsequent GDB "
@@ -4095,35 +4093,35 @@ static const struct command_registration gdb_command_handlers[] = {
.usage = "[port_num]",
},
{
- .name = "gdb_memory_map",
+ .name = "memory_map",
.handler = handle_gdb_memory_map_command,
.mode = COMMAND_CONFIG,
.help = "enable or disable memory map",
.usage = "('enable'|'disable')"
},
{
- .name = "gdb_flash_program",
+ .name = "flash_program",
.handler = handle_gdb_flash_program_command,
.mode = COMMAND_CONFIG,
.help = "enable or disable flash program",
.usage = "('enable'|'disable')"
},
{
- .name = "gdb_report_data_abort",
+ .name = "report_data_abort",
.handler = handle_gdb_report_data_abort_command,
.mode = COMMAND_CONFIG,
.help = "enable or disable reporting data aborts",
.usage = "('enable'|'disable')"
},
{
- .name = "gdb_report_register_access_error",
+ .name = "report_register_access_error",
.handler = handle_gdb_report_register_access_error,
.mode = COMMAND_CONFIG,
.help = "enable or disable reporting register access errors",
.usage = "('enable'|'disable')"
},
{
- .name = "gdb_breakpoint_override",
+ .name = "breakpoint_override",
.handler = handle_gdb_breakpoint_override_command,
.mode = COMMAND_ANY,
.help = "Display or specify type of breakpoint "
@@ -4131,14 +4129,14 @@ static const struct command_registration gdb_command_handlers[] = {
.usage = "('hard'|'soft'|'disable')"
},
{
- .name = "gdb_target_description",
+ .name = "target_description",
.handler = handle_gdb_target_description_command,
.mode = COMMAND_CONFIG,
.help = "enable or disable target description",
.usage = "('enable'|'disable')"
},
{
- .name = "gdb_save_tdesc",
+ .name = "save_tdesc",
.handler = handle_gdb_save_tdesc_command,
.mode = COMMAND_EXEC,
.help = "Save the target description file",
@@ -4147,6 +4145,17 @@ static const struct command_registration gdb_command_handlers[] = {
COMMAND_REGISTRATION_DONE
};
+static const struct command_registration gdb_command_handlers[] = {
+ {
+ .name = "gdb",
+ .mode = COMMAND_ANY,
+ .help = "GDB commands",
+ .chain = gdb_subcommand_handlers,
+ .usage = "",
+ },
+ COMMAND_REGISTRATION_DONE
+};
+
int gdb_register_commands(struct command_context *cmd_ctx)
{
gdb_port = strdup("3333");
diff --git a/src/server/startup.tcl b/src/server/startup.tcl
index 1d30b1dd3..93f718927 100644
--- a/src/server/startup.tcl
+++ b/src/server/startup.tcl
@@ -41,3 +41,57 @@ proc _telnet_autocomplete_helper pattern {
return [lsort $cmds]
}
+
+lappend _telnet_autocomplete_skip "gdb_sync"
+proc "gdb_sync" {} {
+ echo "DEPRECATED! use 'gdb sync', not 'gdb_sync'"
+ eval gdb sync
+}
+
+lappend _telnet_autocomplete_skip "gdb_port"
+proc "gdb_port" {args} {
+ echo "DEPRECATED! use 'gdb port', not 'gdb_port'"
+ eval gdb port $args
+}
+
+lappend _telnet_autocomplete_skip "gdb_memory_map"
+proc "gdb_memory_map" {state} {
+ echo "DEPRECATED! use 'gdb memory_map', not 'gdb_memory_map'"
+ eval gdb memory_map $state
+}
+
+lappend _telnet_autocomplete_skip "gdb_flash_program"
+proc "gdb_flash_program" {state} {
+ echo "DEPRECATED! use 'gdb flash_program', not 'gdb_flash_program'"
+ eval gdb flash_program $state
+}
+
+lappend _telnet_autocomplete_skip "gdb_report_data_abort"
+proc "gdb_report_data_abort" {state} {
+ echo "DEPRECATED! use 'gdb report_data_abort', not 'gdb_report_data_abort'"
+ eval gdb report_data_abort $state
+}
+
+lappend _telnet_autocomplete_skip "gdb_report_register_access_error"
+proc "gdb_report_register_access_error" {state} {
+ echo "DEPRECATED! use 'gdb report_register_access_error', not 'gdb_report_register_access_error'"
+ eval gdb report_register_access_error $state
+}
+
+lappend _telnet_autocomplete_skip "gdb_breakpoint_override"
+proc "gdb_breakpoint_override" {override} {
+ echo "DEPRECATED! use 'gdb breakpoint_override', not 'gdb_breakpoint_override'"
+ eval gdb breakpoint_override $override
+}
+
+lappend _telnet_autocomplete_skip "gdb_target_description"
+proc "gdb_target_description" {state} {
+ echo "DEPRECATED! use 'gdb target_description', not 'gdb_target_description'"
+ eval gdb target_description $state
+}
+
+lappend _telnet_autocomplete_skip "gdb_save_tdesc"
+proc "gdb_save_tdesc" {} {
+ echo "DEPRECATED! use 'gdb save_tdesc', not 'gdb_save_tdesc'"
+ eval gdb save_tdesc
+}
diff --git a/src/server/tcl_server.c b/src/server/tcl_server.c
index 16cbedc76..06a7096d8 100644
--- a/src/server/tcl_server.c
+++ b/src/server/tcl_server.c
@@ -330,7 +330,7 @@ static const struct command_registration tcl_command_handlers[] = {
.mode = COMMAND_CONFIG,
.help = "Specify port on which to listen "
"for incoming Tcl syntax. "
- "Read help on 'gdb_port'.",
+ "Read help on 'gdb port'.",
.usage = "[port_num]",
},
{
diff --git a/src/server/telnet_server.c b/src/server/telnet_server.c
index 938bc5b06..72171cb3f 100644
--- a/src/server/telnet_server.c
+++ b/src/server/telnet_server.c
@@ -992,7 +992,7 @@ static const struct command_registration telnet_command_handlers[] = {
.mode = COMMAND_CONFIG,
.help = "Specify port on which to listen "
"for incoming telnet connections. "
- "Read help on 'gdb_port'.",
+ "Read help on 'gdb port'.",
.usage = "[port_num]",
},
COMMAND_REGISTRATION_DONE
diff --git a/src/target/esirisc.c b/src/target/esirisc.c
index 0f76b5982..14d34ff04 100644
--- a/src/target/esirisc.c
+++ b/src/target/esirisc.c
@@ -483,7 +483,7 @@ static int esirisc_add_breakpoint(struct target *target, struct breakpoint *brea
* The default linker scripts provided by the eSi-RISC toolchain do
* not specify attributes on memory regions, which results in
* incorrect application of software breakpoints by GDB. Targets
- * must be configured with `gdb_breakpoint_override hard` as
+ * must be configured with `gdb breakpoint_override hard` as
* software breakpoints are not supported.
*/
if (breakpoint->type != BKPT_HARD)
-----------------------------------------------------------------------
Summary of changes:
doc/openocd.texi | 58 +++++++++++++++++++++++-----------------------
src/server/gdb_server.c | 37 ++++++++++++++++++-----------
src/server/startup.tcl | 54 ++++++++++++++++++++++++++++++++++++++++++
src/server/tcl_server.c | 2 +-
src/server/telnet_server.c | 2 +-
src/target/esirisc.c | 2 +-
6 files changed, 109 insertions(+), 46 deletions(-)
hooks/post-receive
--
Main OpenOCD repository
|
|
From: openocd-gerrit <ope...@us...> - 2024-07-13 22:24:15
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".
The branch, master has been updated
via 2992ec909588bebf89fe87e1db0aae0f51f0ff07 (commit)
from 53b94fad58ab32b02531f13299968c41f49947fa (commit)
Those revisions listed above that are new to this repository have
not appeared on any other notification email; so we list those
revisions in full, below.
- Log -----------------------------------------------------------------
commit 2992ec909588bebf89fe87e1db0aae0f51f0ff07
Author: Jonathan Forrest <jon...@gm...>
Date: Wed May 1 14:25:32 2024 +1000
jtag/drivers/mpsse: Added FT4232HA
Added FT4232HA varianet of FTDI's FT4232H which has a different bcd.
Also added default PID/VID for the FT4243HA to contrib/60-openocd.rules.
And added default PID/VIDs for FTDI's HP ICs to contrib/60-openocd.rules
as this wasn't done previously.
BugLink: https://sourceforge.net/p/openocd/tickets/410/
Change-Id: Ia84b566aa004332d3f7815a3d22ac37eee4f522a
Signed-off-by: Jonathan Forrest <jon...@gm...>
Reviewed-on: https://review.openocd.org/c/openocd/+/8225
Tested-by: jenkins
Reviewed-by: Antonio Borneo <bor...@gm...>
diff --git a/contrib/60-openocd.rules b/contrib/60-openocd.rules
index fe8b00cb7..29f8d7a6d 100644
--- a/contrib/60-openocd.rules
+++ b/contrib/60-openocd.rules
@@ -29,6 +29,27 @@ ATTRS{idVendor}=="0403", ATTRS{idProduct}=="6014", MODE="660", GROUP="plugdev",
# Original FT231XQ VID:PID
ATTRS{idVendor}=="0403", ATTRS{idProduct}=="6015", MODE="660", GROUP="plugdev", TAG+="uaccess"
+# Original FT2233HP VID:PID
+ATTRS{idVendor}=="0403", ATTRS{idProduct}=="6040", MODE="660", GROUP="plugdev", TAG+="uaccess"
+
+# Original FT4233HP VID:PID
+ATTRS{idVendor}=="0403", ATTRS{idProduct}=="6041", MODE="660", GROUP="plugdev", TAG+="uaccess"
+
+# Original FT2232HP VID:PID
+ATTRS{idVendor}=="0403", ATTRS{idProduct}=="6042", MODE="660", GROUP="plugdev", TAG+="uaccess"
+
+# Original FT4232HP VID:PID
+ATTRS{idVendor}=="0403", ATTRS{idProduct}=="6043", MODE="660", GROUP="plugdev", TAG+="uaccess"
+
+# Original FT233HP VID:PID
+ATTRS{idVendor}=="0403", ATTRS{idProduct}=="6044", MODE="660", GROUP="plugdev", TAG+="uaccess"
+
+# Original FT232HP VID:PID
+ATTRS{idVendor}=="0403", ATTRS{idProduct}=="6045", MODE="660", GROUP="plugdev", TAG+="uaccess"
+
+# Original FT4232HA VID:PID
+ATTRS{idVendor}=="0403", ATTRS{idProduct}=="6048", MODE="660", GROUP="plugdev", TAG+="uaccess"
+
# DISTORTEC JTAG-lock-pick Tiny 2
ATTRS{idVendor}=="0403", ATTRS{idProduct}=="8220", MODE="660", GROUP="plugdev", TAG+="uaccess"
diff --git a/src/jtag/drivers/mpsse.c b/src/jtag/drivers/mpsse.c
index f3499e386..3decddb0e 100644
--- a/src/jtag/drivers/mpsse.c
+++ b/src/jtag/drivers/mpsse.c
@@ -283,6 +283,9 @@ static bool open_matching_device(struct mpsse_ctx *ctx, const uint16_t vids[], c
case 0x3300:
ctx->type = TYPE_FT232HP;
break;
+ case 0x3600:
+ ctx->type = TYPE_FT4232HA;
+ break;
default:
LOG_ERROR("unsupported FTDI chip type: 0x%04x", desc.bcdDevice);
goto error;
diff --git a/src/jtag/drivers/mpsse.h b/src/jtag/drivers/mpsse.h
index e92a9bb56..737560d95 100644
--- a/src/jtag/drivers/mpsse.h
+++ b/src/jtag/drivers/mpsse.h
@@ -30,6 +30,7 @@ enum ftdi_chip_type {
TYPE_FT4232HP,
TYPE_FT233HP,
TYPE_FT232HP,
+ TYPE_FT4232HA,
};
struct mpsse_ctx;
-----------------------------------------------------------------------
Summary of changes:
contrib/60-openocd.rules | 21 +++++++++++++++++++++
src/jtag/drivers/mpsse.c | 3 +++
src/jtag/drivers/mpsse.h | 1 +
3 files changed, 25 insertions(+)
hooks/post-receive
--
Main OpenOCD repository
|
|
From: openocd-gerrit <ope...@us...> - 2024-07-13 22:23:47
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".
The branch, master has been updated
via 53b94fad58ab32b02531f13299968c41f49947fa (commit)
from c97a8ff10d250ad98597054322fd727dc292a332 (commit)
Those revisions listed above that are new to this repository have
not appeared on any other notification email; so we list those
revisions in full, below.
- Log -----------------------------------------------------------------
commit 53b94fad58ab32b02531f13299968c41f49947fa
Author: Jan Matyas <jan...@co...>
Date: Mon Jun 3 10:23:02 2024 +0200
binarybuffer: Fix str_to_buf() parsing function
The function str_to_buf() was too benevolent and did
not perform sufficient error checking on the input
string being parsed. Especially:
- Invalid numbers were silently ignored.
- Out-of-range numbers were silently truncated.
The following commands that use str_to_buf()
were affected:
- reg (when writing a register value)
- set_reg
- jtag drscan
This pull request fixes that by:
- Rewriting str_to_buf() to add the missing checks.
- Adding function command_parse_str_to_buf() which can
be used in command handlers. It parses the input
numbers and provides user-readable error messages
in case of parsing errors.
Examples:
jtag drscan 10 huh10
- Old behavior: The string "huh10" is silently
converted to 10 and the command is then executed.
No warning error or warning is shown to the user.
- New behavior: Error message is shown:
"'huh10' is not a valid number"
reg pc 0x123456789
Assuming the "pc" is 32 bits wide:
- Old behavior: The register value is silently
truncated to 0x23456789 and the command is performed.
- New behavior: Error message is shown to the user:
"Number 0x123456789 exceeds 32 bits"
Change-Id: I079e19cd153aec853a3c2eb66953024b8542d0f4
Signed-off-by: Jan Matyas <jan...@co...>
Reviewed-on: https://review.openocd.org/c/openocd/+/8315
Tested-by: jenkins
Reviewed-by: Marek Vrbka <mar...@co...>
Reviewed-by: Antonio Borneo <bor...@gm...>
diff --git a/src/helper/binarybuffer.c b/src/helper/binarybuffer.c
index 5f38b43ae..3e09143c6 100644
--- a/src/helper/binarybuffer.c
+++ b/src/helper/binarybuffer.c
@@ -102,7 +102,6 @@ bool buf_cmp_mask(const void *_buf1, const void *_buf2,
return buf_cmp_trailing(buf1[last], buf2[last], mask[last], trailing);
}
-
void *buf_set_ones(void *_buf, unsigned size)
{
uint8_t *buf = _buf;
@@ -206,36 +205,75 @@ char *buf_to_hex_str(const void *_buf, unsigned buf_len)
return str;
}
-/** identify radix, and skip radix-prefix (0, 0x or 0X) */
-static void str_radix_guess(const char **_str, unsigned *_str_len,
- unsigned *_radix)
+static bool str_has_hex_prefix(const char *s)
+{
+ /* Starts with "0x" or "0X" */
+ return (s[0] == '0') && (s[1] == 'x' || s[1] == 'X');
+}
+
+static bool str_has_octal_prefix(const char *s)
+{
+ /* - starts with '0',
+ * - has at least two characters, and
+ * - the second character is not 'x' or 'X' */
+ return (s[0] == '0') && (s[1] != '\0') && (s[1] != 'x') && (s[1] != 'X');
+}
+
+/**
+ * Try to identify the radix of the number by looking at its prefix.
+ * No further validation of the number is preformed.
+ */
+static unsigned int str_radix_guess(const char *str)
+{
+ assert(str);
+
+ if (str_has_hex_prefix(str))
+ return 16;
+
+ if (str_has_octal_prefix(str))
+ return 8;
+
+ /* Otherwise assume a decadic number. */
+ return 10;
+}
+
+/** Strip leading "0x" or "0X" from hex numbers or "0" from octal numbers. */
+static void str_strip_number_prefix_if_present(const char **_str, unsigned int radix)
{
- unsigned radix = *_radix;
- if (radix != 0)
- return;
+ assert(radix == 16 || radix == 10 || radix == 8);
+ assert(_str);
+
const char *str = *_str;
- unsigned str_len = *_str_len;
- if (str[0] == '0' && (str[1] == 'x' || str[1] == 'X')) {
- radix = 16;
+ assert(str);
+
+ if (radix == 16 && str_has_hex_prefix(str))
str += 2;
- str_len -= 2;
- } else if ((str[0] == '0') && (str_len != 1)) {
- radix = 8;
+ else if (radix == 8 && str_has_octal_prefix(str))
str += 1;
- str_len -= 1;
- } else
- radix = 10;
+
+ /* No prefix to strip for radix == 10. */
+
*_str = str;
- *_str_len = str_len;
- *_radix = radix;
}
-int str_to_buf(const char *str, unsigned str_len,
- void *_buf, unsigned buf_len, unsigned radix)
+int str_to_buf(const char *str, void *_buf, unsigned int buf_len,
+ unsigned int radix, unsigned int *_detected_radix)
{
- str_radix_guess(&str, &str_len, &radix);
+ assert(radix == 0 || radix == 8 || radix == 10 || radix == 16);
+
+ if (radix == 0)
+ radix = str_radix_guess(str);
- float factor;
+ if (_detected_radix)
+ *_detected_radix = radix;
+
+ str_strip_number_prefix_if_present(&str, radix);
+
+ const size_t str_len = strlen(str);
+ if (str_len == 0)
+ return ERROR_INVALID_NUMBER;
+
+ float factor = 0.0;
if (radix == 16)
factor = 0.5; /* log(16) / log(256) = 0.5 */
else if (radix == 10)
@@ -243,41 +281,69 @@ int str_to_buf(const char *str, unsigned str_len,
else if (radix == 8)
factor = 0.375; /* log(8) / log(256) = 0.375 */
else
- return 0;
+ assert(false);
- /* copy to zero-terminated buffer */
- char *charbuf = strndup(str, str_len);
+ const unsigned int b256_len = ceil_f_to_u32(str_len * factor);
- /* number of digits in base-256 notation */
- unsigned b256_len = ceil_f_to_u32(str_len * factor);
+ /* Allocate a buffer for digits in base-256 notation */
uint8_t *b256_buf = calloc(b256_len, 1);
+ if (!b256_buf) {
+ LOG_ERROR("Unable to allocate memory");
+ return ERROR_FAIL;
+ }
- /* go through zero terminated buffer
- * input digits (ASCII) */
- unsigned i;
- for (i = 0; charbuf[i]; i++) {
- uint32_t tmp = charbuf[i];
- if ((tmp >= '0') && (tmp <= '9'))
+ /* Go through the zero-terminated buffer
+ * of input digits (ASCII) */
+ for (unsigned int i = 0; str[i]; i++) {
+ uint32_t tmp = str[i];
+ if ((tmp >= '0') && (tmp <= '9')) {
tmp = (tmp - '0');
- else if ((tmp >= 'a') && (tmp <= 'f'))
+ } else if ((tmp >= 'a') && (tmp <= 'f')) {
tmp = (tmp - 'a' + 10);
- else if ((tmp >= 'A') && (tmp <= 'F'))
+ } else if ((tmp >= 'A') && (tmp <= 'F')) {
tmp = (tmp - 'A' + 10);
- else
- continue; /* skip characters other than [0-9,a-f,A-F] */
+ } else {
+ /* Characters other than [0-9,a-f,A-F] are invalid */
+ free(b256_buf);
+ return ERROR_INVALID_NUMBER;
+ }
- if (tmp >= radix)
- continue; /* skip digits invalid for the current radix */
+ if (tmp >= radix) {
+ /* Encountered a digit that is invalid for the current radix */
+ free(b256_buf);
+ return ERROR_INVALID_NUMBER;
+ }
- /* base-256 digits */
- for (unsigned j = 0; j < b256_len; j++) {
+ /* Add the current digit (tmp) to the intermediate result
+ * in b256_buf (base-256 digits) */
+ for (unsigned int j = 0; j < b256_len; j++) {
tmp += (uint32_t)b256_buf[j] * radix;
- b256_buf[j] = (uint8_t)(tmp & 0xFF);
+ b256_buf[j] = (uint8_t)(tmp & 0xFFu);
tmp >>= 8;
}
+ /* The b256_t buffer is large enough to contain the whole result. */
+ assert(tmp == 0);
}
+ /* The result must not contain more bits than buf_len. */
+ /* Check the whole bytes: */
+ for (unsigned int j = DIV_ROUND_UP(buf_len, 8); j < b256_len; j++) {
+ if (b256_buf[j] != 0x0) {
+ free(b256_buf);
+ return ERROR_NUMBER_EXCEEDS_BUFFER;
+ }
+ }
+ /* Check the partial byte: */
+ if (buf_len % 8) {
+ const uint8_t mask = 0xFFu << (buf_len % 8);
+ if ((b256_buf[(buf_len / 8)] & mask) != 0x0) {
+ free(b256_buf);
+ return ERROR_NUMBER_EXCEEDS_BUFFER;
+ }
+ }
+
+ /* Copy the digits to the output buffer */
uint8_t *buf = _buf;
for (unsigned j = 0; j < DIV_ROUND_UP(buf_len, 8); j++) {
if (j < b256_len)
@@ -286,14 +352,8 @@ int str_to_buf(const char *str, unsigned str_len,
buf[j] = 0;
}
- /* mask out bits that don't belong to the buffer */
- if (buf_len % 8)
- buf[(buf_len / 8)] &= 0xff >> (8 - (buf_len % 8));
-
free(b256_buf);
- free(charbuf);
-
- return i;
+ return ERROR_OK;
}
void bit_copy_queue_init(struct bit_copy_queue *q)
diff --git a/src/helper/binarybuffer.h b/src/helper/binarybuffer.h
index 344629681..441374330 100644
--- a/src/helper/binarybuffer.h
+++ b/src/helper/binarybuffer.h
@@ -14,6 +14,9 @@
#include <helper/list.h>
#include <helper/types.h>
+#define ERROR_INVALID_NUMBER (-1700)
+#define ERROR_NUMBER_EXCEEDS_BUFFER (-1701)
+
/** @file
* Support functions to access arbitrary bits in a byte array
*/
@@ -189,8 +192,18 @@ void *buf_set_ones(void *buf, unsigned size);
void *buf_set_buf(const void *src, unsigned src_start,
void *dst, unsigned dst_start, unsigned len);
-int str_to_buf(const char *str, unsigned len,
- void *bin_buf, unsigned buf_size, unsigned radix);
+/**
+ * Parse an unsigned number (provided as a zero-terminated string)
+ * into a bit buffer whose size is buf_len bits.
+ * @param str Input number, zero-terminated string
+ * @param _buf Output buffer, allocated by the caller
+ * @param buf_len Output buffer size in bits
+ * @param radix Base of the input number - 16, 10, 8 or 0.
+ * 0 means auto-detect the radix.
+ */
+int str_to_buf(const char *str, void *_buf, unsigned int buf_len,
+ unsigned int radix, unsigned int *_detected_radix);
+
char *buf_to_hex_str(const void *buf, unsigned size);
/* read a uint32_t from a buffer in target memory endianness */
diff --git a/src/helper/command.c b/src/helper/command.c
index a775c730b..15a9b4a08 100644
--- a/src/helper/command.c
+++ b/src/helper/command.c
@@ -1360,6 +1360,46 @@ int command_parse_bool_arg(const char *in, bool *out)
return ERROR_COMMAND_SYNTAX_ERROR;
}
+static const char *radix_to_str(unsigned int radix)
+{
+ switch (radix) {
+ case 16: return "hexadecimal";
+ case 10: return "decadic";
+ case 8: return "octal";
+ }
+ assert(false);
+ return "";
+}
+
+COMMAND_HELPER(command_parse_str_to_buf, const char *str, void *buf, unsigned int buf_len,
+ unsigned int radix)
+{
+ assert(str);
+ assert(buf);
+
+ int ret = str_to_buf(str, buf, buf_len, radix, NULL);
+ if (ret == ERROR_OK)
+ return ret;
+
+ /* Provide a clear error message to the user */
+ if (ret == ERROR_INVALID_NUMBER) {
+ if (radix == 0) {
+ /* Any radix is accepted, so don't include it in the error message. */
+ command_print(CMD, "'%s' is not a valid number", str);
+ } else {
+ /* Specific radix is required - tell the user what it is. */
+ command_print(CMD, "'%s' is not a valid number (requiring %s number)",
+ str, radix_to_str(radix));
+ }
+ } else if (ret == ERROR_NUMBER_EXCEEDS_BUFFER) {
+ command_print(CMD, "Number %s exceeds %u bits", str, buf_len);
+ } else {
+ command_print(CMD, "Could not parse number '%s'", str);
+ }
+
+ return ERROR_COMMAND_ARGUMENT_INVALID;
+}
+
COMMAND_HELPER(handle_command_parse_bool, bool *out, const char *label)
{
switch (CMD_ARGC) {
diff --git a/src/helper/command.h b/src/helper/command.h
index fc26dda81..7a044e619 100644
--- a/src/helper/command.h
+++ b/src/helper/command.h
@@ -517,6 +517,17 @@ DECLARE_PARSE_WRAPPER(_target_addr, target_addr_t);
int command_parse_bool_arg(const char *in, bool *out);
COMMAND_HELPER(handle_command_parse_bool, bool *out, const char *label);
+/**
+ * Parse a number (base 10, base 16 or base 8) and store the result
+ * into a bit buffer.
+ *
+ * In case of parsing error, a user-readable error message is produced.
+ *
+ * If radix = 0 is given, the function guesses the radix by looking at the number prefix.
+ */
+COMMAND_HELPER(command_parse_str_to_buf, const char *str, void *buf, unsigned int buf_len,
+ unsigned int radix);
+
/** parses an on/off command argument */
#define COMMAND_PARSE_ON_OFF(in, out) \
COMMAND_PARSE_BOOL(in, out, "on", "off")
diff --git a/src/jtag/tcl.c b/src/jtag/tcl.c
index 1a4c4b774..e53413427 100644
--- a/src/jtag/tcl.c
+++ b/src/jtag/tcl.c
@@ -87,8 +87,11 @@ static COMMAND_HELPER(handle_jtag_command_drscan_fields, struct scan_field *fiel
LOG_ERROR("Out of memory");
return ERROR_FAIL;
}
+
fields[field_count].out_value = t;
- str_to_buf(CMD_ARGV[i + 1], strlen(CMD_ARGV[i + 1]), t, bits, 0);
+ int ret = CALL_COMMAND_HANDLER(command_parse_str_to_buf, CMD_ARGV[i + 1], t, bits, 0);
+ if (ret != ERROR_OK)
+ return ret;
fields[field_count].in_value = t;
field_count++;
}
diff --git a/src/target/target.c b/src/target/target.c
index 1f4817d5c..8ff665f47 100644
--- a/src/target/target.c
+++ b/src/target/target.c
@@ -3128,11 +3128,18 @@ COMMAND_HANDLER(handle_reg_command)
/* set register value */
if (CMD_ARGC == 2) {
uint8_t *buf = malloc(DIV_ROUND_UP(reg->size, 8));
- if (!buf)
+ if (!buf) {
+ LOG_ERROR("Failed to allocate memory");
return ERROR_FAIL;
- str_to_buf(CMD_ARGV[1], strlen(CMD_ARGV[1]), buf, reg->size, 0);
+ }
+
+ int retval = CALL_COMMAND_HANDLER(command_parse_str_to_buf, CMD_ARGV[1], buf, reg->size, 0);
+ if (retval != ERROR_OK) {
+ free(buf);
+ return retval;
+ }
- int retval = reg->type->set(reg, buf);
+ retval = reg->type->set(reg, buf);
if (retval != ERROR_OK) {
LOG_ERROR("Could not write to register '%s'", reg->name);
} else {
@@ -4788,63 +4795,64 @@ static int target_jim_get_reg(Jim_Interp *interp, int argc,
return JIM_OK;
}
-static int target_jim_set_reg(Jim_Interp *interp, int argc,
- Jim_Obj * const *argv)
+COMMAND_HANDLER(handle_set_reg_command)
{
- if (argc != 2) {
- Jim_WrongNumArgs(interp, 1, argv, "dict");
- return JIM_ERR;
- }
+ if (CMD_ARGC != 1)
+ return ERROR_COMMAND_SYNTAX_ERROR;
int tmp;
#if JIM_VERSION >= 80
- Jim_Obj **dict = Jim_DictPairs(interp, argv[1], &tmp);
+ Jim_Obj **dict = Jim_DictPairs(CMD_CTX->interp, CMD_JIMTCL_ARGV[0], &tmp);
if (!dict)
- return JIM_ERR;
+ return ERROR_FAIL;
#else
Jim_Obj **dict;
- int ret = Jim_DictPairs(interp, argv[1], &dict, &tmp);
+ int ret = Jim_DictPairs(CMD_CTX->interp, CMD_JIMTCL_ARGV[0], &dict, &tmp);
if (ret != JIM_OK)
- return ret;
+ return ERROR_FAIL;
#endif
const unsigned int length = tmp;
- struct command_context *cmd_ctx = current_command_context(interp);
- assert(cmd_ctx);
- const struct target *target = get_current_target(cmd_ctx);
+
+ const struct target *target = get_current_target(CMD_CTX);
+ assert(target);
for (unsigned int i = 0; i < length; i += 2) {
const char *reg_name = Jim_String(dict[i]);
const char *reg_value = Jim_String(dict[i + 1]);
- struct reg *reg = register_get_by_name(target->reg_cache, reg_name,
- false);
+ struct reg *reg = register_get_by_name(target->reg_cache, reg_name, false);
if (!reg || !reg->exist) {
- Jim_SetResultFormatted(interp, "unknown register '%s'", reg_name);
- return JIM_ERR;
+ command_print(CMD, "unknown register '%s'", reg_name);
+ return ERROR_FAIL;
}
uint8_t *buf = malloc(DIV_ROUND_UP(reg->size, 8));
-
if (!buf) {
LOG_ERROR("Failed to allocate memory");
- return JIM_ERR;
+ return ERROR_FAIL;
}
- str_to_buf(reg_value, strlen(reg_value), buf, reg->size, 0);
- int retval = reg->type->set(reg, buf);
+ int retval = CALL_COMMAND_HANDLER(command_parse_str_to_buf,
+ reg_value, buf, reg->size, 0);
+ if (retval != ERROR_OK) {
+ free(buf);
+ return retval;
+ }
+
+ retval = reg->type->set(reg, buf);
free(buf);
if (retval != ERROR_OK) {
- Jim_SetResultFormatted(interp, "failed to set '%s' to register '%s'",
+ command_print(CMD, "failed to set '%s' to register '%s'",
reg_value, reg_name);
- return JIM_ERR;
+ return retval;
}
}
- return JIM_OK;
+ return ERROR_OK;
}
/**
@@ -5584,7 +5592,7 @@ static const struct command_registration target_instance_command_handlers[] = {
{
.name = "set_reg",
.mode = COMMAND_EXEC,
- .jim_handler = target_jim_set_reg,
+ .handler = handle_set_reg_command,
.help = "Set target register values",
.usage = "dict",
},
@@ -6719,7 +6727,7 @@ static const struct command_registration target_exec_command_handlers[] = {
{
.name = "set_reg",
.mode = COMMAND_EXEC,
- .jim_handler = target_jim_set_reg,
+ .handler = handle_set_reg_command,
.help = "Set target register values",
.usage = "dict",
},
-----------------------------------------------------------------------
Summary of changes:
src/helper/binarybuffer.c | 158 ++++++++++++++++++++++++++++++++--------------
src/helper/binarybuffer.h | 17 ++++-
src/helper/command.c | 40 ++++++++++++
src/helper/command.h | 11 ++++
src/jtag/tcl.c | 5 +-
src/target/target.c | 66 ++++++++++---------
6 files changed, 216 insertions(+), 81 deletions(-)
hooks/post-receive
--
Main OpenOCD repository
|
|
From: openocd-gerrit <ope...@us...> - 2024-07-13 22:22:53
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".
The branch, master has been updated
via c97a8ff10d250ad98597054322fd727dc292a332 (commit)
from f09ccc817b76683b42dc6ad410adddee16a351ed (commit)
Those revisions listed above that are new to this repository have
not appeared on any other notification email; so we list those
revisions in full, below.
- Log -----------------------------------------------------------------
commit c97a8ff10d250ad98597054322fd727dc292a332
Author: Tomas Vanek <va...@fb...>
Date: Sat Jun 8 11:59:29 2024 +0200
flash/nor/nrf5: remove asserts on dereferenced pointers
The driver code works reliably, no need to use assert() everywhere.
Signed-off-by: Tomas Vanek <va...@fb...>
Change-Id: Idb1942bfd31d370a74610b8a8836bc2e64370557
Reviewed-on: https://review.openocd.org/c/openocd/+/8324
Tested-by: jenkins
Reviewed-by: Antonio Borneo <bor...@gm...>
diff --git a/src/flash/nor/nrf5.c b/src/flash/nor/nrf5.c
index 3ad6a9628..5cb552aa9 100644
--- a/src/flash/nor/nrf5.c
+++ b/src/flash/nor/nrf5.c
@@ -345,26 +345,19 @@ const struct flash_driver nrf5_flash, nrf51_flash;
static bool nrf5_bank_is_probed(const struct flash_bank *bank)
{
struct nrf5_bank *nbank = bank->driver_priv;
- assert(nbank);
-
return nbank->probed;
}
static bool nrf5_chip_is_probed(const struct flash_bank *bank)
{
struct nrf5_bank *nbank = bank->driver_priv;
- assert(nbank);
struct nrf5_info *chip = nbank->chip;
- assert(chip);
-
return chip->chip_probed;
}
static bool nrf5_bank_is_uicr(const struct nrf5_bank *nbank)
{
struct nrf5_info *chip = nbank->chip;
- assert(chip);
-
return nbank == &chip->bank[1];
}
@@ -484,9 +477,7 @@ static int nrf51_protect_check_clenr0(struct flash_bank *bank)
uint32_t clenr0;
struct nrf5_bank *nbank = bank->driver_priv;
- assert(nbank);
struct nrf5_info *chip = nbank->chip;
- assert(chip);
res = target_read_u32(chip->target, NRF51_FICR_CLENR0,
&clenr0);
@@ -515,9 +506,7 @@ static int nrf51_protect_check_clenr0(struct flash_bank *bank)
static int nrf52_protect_check_bprot(struct flash_bank *bank)
{
struct nrf5_bank *nbank = bank->driver_priv;
- assert(nbank);
struct nrf5_info *chip = nbank->chip;
- assert(chip);
static uint32_t nrf5_bprot_offsets[4] = { 0x600, 0x604, 0x610, 0x614 };
uint32_t bprot_reg = 0;
@@ -542,9 +531,7 @@ static int nrf52_protect_check_bprot(struct flash_bank *bank)
static int nrf5_protect_check(struct flash_bank *bank)
{
struct nrf5_bank *nbank = bank->driver_priv;
- assert(nbank);
struct nrf5_info *chip = nbank->chip;
- assert(chip);
/* UICR cannot be write protected so just return early */
if (nrf5_bank_is_uicr(nbank))
@@ -568,9 +555,7 @@ static int nrf51_protect_clenr0(struct flash_bank *bank, int set, unsigned int f
uint32_t clenr0, ppfc;
struct nrf5_bank *nbank = bank->driver_priv;
- assert(nbank);
struct nrf5_info *chip = nbank->chip;
- assert(chip);
if (first != 0) {
LOG_ERROR("Code region 0 must start at the beginning of the bank");
@@ -628,9 +613,7 @@ static int nrf5_protect(struct flash_bank *bank, int set, unsigned int first,
unsigned int last)
{
struct nrf5_bank *nbank = bank->driver_priv;
- assert(nbank);
struct nrf5_info *chip = nbank->chip;
- assert(chip);
/* UICR cannot be write protected so just bail out early */
if (nrf5_bank_is_uicr(nbank)) {
@@ -715,9 +698,7 @@ static int nrf5_get_chip_type_str(const struct nrf5_info *chip, char *buf, unsig
static int nrf5_info(struct flash_bank *bank, struct command_invocation *cmd)
{
struct nrf5_bank *nbank = bank->driver_priv;
- assert(nbank);
struct nrf5_info *chip = nbank->chip;
- assert(chip);
char chip_type_str[256];
if (nrf5_get_chip_type_str(chip, chip_type_str, sizeof(chip_type_str)) != ERROR_OK)
@@ -858,9 +839,7 @@ static int nrf5_probe_chip(struct flash_bank *bank)
int res = ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
struct nrf5_bank *nbank = bank->driver_priv;
- assert(nbank);
struct nrf5_info *chip = nbank->chip;
- assert(chip);
struct target *target = chip->target;
chip->spec = NULL;
@@ -1018,9 +997,7 @@ static int nrf5_probe_chip(struct flash_bank *bank)
static int nrf5_setup_bank(struct flash_bank *bank)
{
struct nrf5_bank *nbank = bank->driver_priv;
- assert(nbank);
struct nrf5_info *chip = nbank->chip;
- assert(chip);
if (bank->base == chip->map->flash_base) {
unsigned int flash_size_kb = chip->flash_num_sectors * chip->flash_page_size / 1024;
@@ -1254,9 +1231,7 @@ static int nrf5_write(struct flash_bank *bank, const uint8_t *buffer,
}
struct nrf5_bank *nbank = bank->driver_priv;
- assert(nbank);
struct nrf5_info *chip = nbank->chip;
- assert(chip);
assert(offset % 4 == 0);
assert(count % 4 == 0);
@@ -1316,9 +1291,7 @@ static int nrf5_erase(struct flash_bank *bank, unsigned int first,
}
struct nrf5_bank *nbank = bank->driver_priv;
- assert(nbank);
struct nrf5_info *chip = nbank->chip;
- assert(chip);
/* UICR CLENR0 based protection used on nRF51 prevents erase
* absolutely silently. NVMC has no flag to indicate the protection
@@ -1362,7 +1335,6 @@ error:
static void nrf5_free_driver_priv(struct flash_bank *bank)
{
struct nrf5_bank *nbank = bank->driver_priv;
- assert(nbank);
struct nrf5_info *chip = nbank->chip;
if (!chip)
return;
@@ -1458,17 +1430,13 @@ COMMAND_HANDLER(nrf5_handle_mass_erase_command)
if (res != ERROR_OK)
return res;
- assert(bank);
-
if (target->state != TARGET_HALTED) {
LOG_ERROR("Target not halted");
return ERROR_TARGET_NOT_HALTED;
}
struct nrf5_bank *nbank = bank->driver_priv;
- assert(nbank);
struct nrf5_info *chip = nbank->chip;
- assert(chip);
if (chip->features & NRF5_FEATURE_SERIES_51) {
uint32_t ppfc;
-----------------------------------------------------------------------
Summary of changes:
src/flash/nor/nrf5.c | 32 --------------------------------
1 file changed, 32 deletions(-)
hooks/post-receive
--
Main OpenOCD repository
|
|
From: openocd-gerrit <ope...@us...> - 2024-07-13 22:22:27
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".
The branch, master has been updated
via f09ccc817b76683b42dc6ad410adddee16a351ed (commit)
from c322060fbda4a162b55acd3658388eb145b4c73f (commit)
Those revisions listed above that are new to this repository have
not appeared on any other notification email; so we list those
revisions in full, below.
- Log -----------------------------------------------------------------
commit f09ccc817b76683b42dc6ad410adddee16a351ed
Author: Tomas Vanek <va...@fb...>
Date: Sat Jun 8 11:33:35 2024 +0200
flash/nor/nrf5: split chip and bank probes
nrf5_auto_probe() always re-probed chip hardware to
get flash geometry.
Introduce nrf5_probe_chip() and move chip related probing to it.
Save all flash parameters needed for bank setup to struct nrf5_info.
Introduce nrf5_setup_bank() and move bank setup code to it.
Call both chip probe and bank setup unconditionally from nrf5_probe():
in case of manual issuing 'flash probe' command, we should refresh actual
values from the device.
Call chip probe and bank setup only if not done before from
nrf5_auto_probe().
Signed-off-by: Tomas Vanek <va...@fb...>
Change-Id: Ib090a97fd7a41579b3d4f6e6634a5fdf93836c83
Reviewed-on: https://review.openocd.org/c/openocd/+/8322
Tested-by: jenkins
Reviewed-by: Antonio Borneo <bor...@gm...>
diff --git a/src/flash/nor/nrf5.c b/src/flash/nor/nrf5.c
index f07433e67..3ad6a9628 100644
--- a/src/flash/nor/nrf5.c
+++ b/src/flash/nor/nrf5.c
@@ -117,20 +117,24 @@ struct nrf5_map {
struct nrf5_info {
unsigned int refcount;
+ bool chip_probed;
struct nrf5_bank {
struct nrf5_info *chip;
bool probed;
} bank[2];
+
struct target *target;
- /* chip identification stored in nrf5_probe() for use in nrf5_info() */
+ /* chip identification stored in nrf5_probe_chip()
+ * for use in nrf5_info() and nrf5_setup_bank() */
bool ficr_info_valid;
struct nrf52_ficr_info ficr_info;
const struct nrf5_device_spec *spec;
uint16_t hwid;
enum nrf5_features features;
- unsigned int flash_size_kb;
+ uint32_t flash_page_size;
+ uint32_t flash_num_sectors;
unsigned int ram_size_kb;
const struct nrf5_map *map;
@@ -346,6 +350,16 @@ static bool nrf5_bank_is_probed(const struct flash_bank *bank)
return nbank->probed;
}
+static bool nrf5_chip_is_probed(const struct flash_bank *bank)
+{
+ struct nrf5_bank *nbank = bank->driver_priv;
+ assert(nbank);
+ struct nrf5_info *chip = nbank->chip;
+ assert(chip);
+
+ return chip->chip_probed;
+}
+
static bool nrf5_bank_is_uicr(const struct nrf5_bank *nbank)
{
struct nrf5_info *chip = nbank->chip;
@@ -709,8 +723,9 @@ static int nrf5_info(struct flash_bank *bank, struct command_invocation *cmd)
if (nrf5_get_chip_type_str(chip, chip_type_str, sizeof(chip_type_str)) != ERROR_OK)
return ERROR_FAIL;
+ unsigned int flash_size_kb = chip->flash_num_sectors * chip->flash_page_size / 1024;
command_print_sameline(cmd, "%s %ukB Flash, %ukB RAM",
- chip_type_str, chip->flash_size_kb, chip->ram_size_kb);
+ chip_type_str, flash_size_kb, chip->ram_size_kb);
return ERROR_OK;
}
@@ -838,7 +853,7 @@ static int nrf51_get_ram_size(struct target *target, uint32_t *ram_size)
return res;
}
-static int nrf5_probe(struct flash_bank *bank)
+static int nrf5_probe_chip(struct flash_bank *bank)
{
int res = ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
@@ -968,9 +983,8 @@ static int nrf5_probe(struct flash_bank *bank)
}
/* The value stored in FICR CODEPAGESIZE is the number of bytes in one page of FLASH. */
- uint32_t flash_page_size;
res = target_read_u32(chip->target, ficr_base + ficr_offsets->codepagesize,
- &flash_page_size);
+ &chip->flash_page_size);
if (res != ERROR_OK) {
LOG_ERROR("Couldn't read code page size");
return res;
@@ -978,69 +992,95 @@ static int nrf5_probe(struct flash_bank *bank)
/* Note the register name is misleading,
* FICR CODESIZE is the number of pages in flash memory, not the number of bytes! */
- uint32_t num_sectors;
res = target_read_u32(chip->target, ficr_base + ficr_offsets->codesize,
- &num_sectors);
+ &chip->flash_num_sectors);
if (res != ERROR_OK) {
LOG_ERROR("Couldn't read code memory size");
return res;
}
- chip->flash_size_kb = num_sectors * flash_page_size / 1024;
+ char chip_type_str[256];
+ if (nrf5_get_chip_type_str(chip, chip_type_str, sizeof(chip_type_str)) != ERROR_OK)
+ return ERROR_FAIL;
+
+ unsigned int flash_size_kb = chip->flash_num_sectors * chip->flash_page_size / 1024;
+ const bool device_is_unknown = (!chip->spec && !chip->ficr_info_valid);
+ LOG_INFO("%s%s %ukB Flash, %ukB RAM",
+ device_is_unknown ? "Unknown device: " : "",
+ chip_type_str,
+ flash_size_kb,
+ chip->ram_size_kb);
- if (!chip->bank[0].probed && !chip->bank[1].probed) {
- char chip_type_str[256];
- if (nrf5_get_chip_type_str(chip, chip_type_str, sizeof(chip_type_str)) != ERROR_OK)
- return ERROR_FAIL;
- const bool device_is_unknown = (!chip->spec && !chip->ficr_info_valid);
- LOG_INFO("%s%s %ukB Flash, %ukB RAM",
- device_is_unknown ? "Unknown device: " : "",
- chip_type_str,
- chip->flash_size_kb,
- chip->ram_size_kb);
- }
+ chip->chip_probed = true;
+ return ERROR_OK;
+}
- free(bank->sectors);
+static int nrf5_setup_bank(struct flash_bank *bank)
+{
+ struct nrf5_bank *nbank = bank->driver_priv;
+ assert(nbank);
+ struct nrf5_info *chip = nbank->chip;
+ assert(chip);
if (bank->base == chip->map->flash_base) {
+ unsigned int flash_size_kb = chip->flash_num_sectors * chip->flash_page_size / 1024;
/* Sanity check */
- if (chip->spec && chip->flash_size_kb != chip->spec->flash_size_kb)
+ if (chip->spec && flash_size_kb != chip->spec->flash_size_kb)
LOG_WARNING("Chip's reported Flash capacity does not match expected one");
- if (chip->ficr_info_valid && chip->flash_size_kb != chip->ficr_info.flash)
+ if (chip->ficr_info_valid && flash_size_kb != chip->ficr_info.flash)
LOG_WARNING("Chip's reported Flash capacity does not match FICR INFO.FLASH");
- bank->num_sectors = num_sectors;
- bank->size = num_sectors * flash_page_size;
+ bank->num_sectors = chip->flash_num_sectors;
+ bank->size = chip->flash_num_sectors * chip->flash_page_size;
- bank->sectors = alloc_block_array(0, flash_page_size, num_sectors);
+ bank->sectors = alloc_block_array(0, chip->flash_page_size, bank->num_sectors);
if (!bank->sectors)
return ERROR_FAIL;
chip->bank[0].probed = true;
- } else {
+ } else if (bank->base == chip->map->uicr_base) {
/* UICR bank */
bank->num_sectors = 1;
- bank->size = flash_page_size;
+ bank->size = chip->flash_page_size;
- bank->sectors = alloc_block_array(0, flash_page_size, num_sectors);
+ bank->sectors = alloc_block_array(0, chip->flash_page_size, bank->num_sectors);
if (!bank->sectors)
return ERROR_FAIL;
bank->sectors[0].is_protected = 0;
chip->bank[1].probed = true;
+ } else {
+ LOG_ERROR("Invalid nRF bank address " TARGET_ADDR_FMT, bank->base);
+ return ERROR_FLASH_BANK_INVALID;
}
return ERROR_OK;
}
+static int nrf5_probe(struct flash_bank *bank)
+{
+ /* probe always reads actual info from the device */
+ int res = nrf5_probe_chip(bank);
+ if (res != ERROR_OK)
+ return res;
+
+ return nrf5_setup_bank(bank);
+}
+
static int nrf5_auto_probe(struct flash_bank *bank)
{
if (nrf5_bank_is_probed(bank))
return ERROR_OK;
- return nrf5_probe(bank);
+ if (!nrf5_chip_is_probed(bank)) {
+ int res = nrf5_probe_chip(bank);
+ if (res != ERROR_OK)
+ return res;
+ }
+
+ return nrf5_setup_bank(bank);
}
@@ -1372,8 +1412,8 @@ FLASH_BANK_COMMAND_HANDLER(nrf5_flash_bank_command)
case NRF53NET_UICR_BASE:
break;
default:
- LOG_ERROR("Invalid bank address " TARGET_ADDR_FMT, bank->base);
- return ERROR_FAIL;
+ LOG_ERROR("Invalid nRF bank address " TARGET_ADDR_FMT, bank->base);
+ return ERROR_FLASH_BANK_INVALID;
}
chip = nrf5_get_chip(bank->target);
-----------------------------------------------------------------------
Summary of changes:
src/flash/nor/nrf5.c | 104 +++++++++++++++++++++++++++++++++++----------------
1 file changed, 72 insertions(+), 32 deletions(-)
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From: openocd-gerrit <ope...@us...> - 2024-07-13 22:21:14
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".
The branch, master has been updated
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- Log -----------------------------------------------------------------
commit c322060fbda4a162b55acd3658388eb145b4c73f
Author: Ian Thompson <ia...@ca...>
Date: Tue May 14 15:55:58 2024 -0700
target/xtensa: flag additional write-only registers
intsetN, intclearN (for LX8)
mesrclr (for NX)
Signed-off-by: Ian Thompson <ia...@ca...>
Change-Id: I0bb59728fcec761a71c4789189f733a10bad6375
Reviewed-on: https://review.openocd.org/c/openocd/+/8235
Reviewed-by: Antonio Borneo <bor...@gm...>
Tested-by: jenkins
diff --git a/src/target/xtensa/xtensa.c b/src/target/xtensa/xtensa.c
index 54fcd2ad6..8369cc4e5 100644
--- a/src/target/xtensa/xtensa.c
+++ b/src/target/xtensa/xtensa.c
@@ -3966,10 +3966,10 @@ COMMAND_HELPER(xtensa_cmd_xtreg_do, struct xtensa *xtensa)
rptr->type = XT_REG_OTHER;
}
- /* Register flags */
+ /* Register flags: includes intsetN, intclearN for LX8 */
if ((strcmp(rptr->name, "mmid") == 0) || (strcmp(rptr->name, "eraccess") == 0) ||
- (strcmp(rptr->name, "ddr") == 0) || (strcmp(rptr->name, "intset") == 0) ||
- (strcmp(rptr->name, "intclear") == 0))
+ (strcmp(rptr->name, "ddr") == 0) || (strncmp(rptr->name, "intset", 6) == 0) ||
+ (strncmp(rptr->name, "intclear", 8) == 0) || (strcmp(rptr->name, "mesrclr") == 0))
rptr->flags = XT_REGF_NOREAD;
else
rptr->flags = 0;
-----------------------------------------------------------------------
Summary of changes:
src/target/xtensa/xtensa.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
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From: openocd-gerrit <ope...@us...> - 2024-07-13 22:20:23
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".
The branch, master has been updated
via 6da4025167fdf77e975305422406d696abf7a024 (commit)
from fbb16b05da3b87a5e305a73a5dcca9f1ccdd5885 (commit)
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- Log -----------------------------------------------------------------
commit 6da4025167fdf77e975305422406d696abf7a024
Author: Antonio Borneo <bor...@gm...>
Date: Tue Jun 4 11:50:19 2024 +0200
target: cortex_m: replace 'implementor' with 'implementer'
ARM documentation for Cortex-M reports the field 'implementer' in
the register CPUID.
OpenOCD used the miss-spelled 'implementor'. Fix it!
Change-Id: I854d223971ae7a49346e1f7491c2c0415f5e2c1d
Signed-off-by: Antonio Borneo <bor...@gm...>
Reviewed-on: https://review.openocd.org/c/openocd/+/8318
Tested-by: jenkins
Reviewed-by: zapb <de...@za...>
diff --git a/src/target/arm.h b/src/target/arm.h
index 999dc9ae7..0de322a5a 100644
--- a/src/target/arm.h
+++ b/src/target/arm.h
@@ -58,12 +58,12 @@ enum arm_arch {
ARM_ARCH_V8M,
};
-/** Known ARM implementor IDs */
-enum arm_implementor {
- ARM_IMPLEMENTOR_ARM = 0x41,
- ARM_IMPLEMENTOR_INFINEON = 0x49,
- ARM_IMPLEMENTOR_ARM_CHINA = 0x63,
- ARM_IMPLEMENTOR_REALTEK = 0x72,
+/** Known ARM implementer IDs */
+enum arm_implementer {
+ ARM_IMPLEMENTER_ARM = 0x41,
+ ARM_IMPLEMENTER_INFINEON = 0x49,
+ ARM_IMPLEMENTER_ARM_CHINA = 0x63,
+ ARM_IMPLEMENTER_REALTEK = 0x72,
};
/**
diff --git a/src/target/cortex_m.c b/src/target/cortex_m.c
index cf4e8dfb7..791a43242 100644
--- a/src/target/cortex_m.c
+++ b/src/target/cortex_m.c
@@ -2612,8 +2612,8 @@ int cortex_m_examine(struct target *target)
if (retval != ERROR_OK)
return retval;
- /* Inspect implementor/part to look for recognized cores */
- unsigned int impl_part = cpuid & (ARM_CPUID_IMPLEMENTOR_MASK | ARM_CPUID_PARTNO_MASK);
+ /* Inspect implementer/part to look for recognized cores */
+ unsigned int impl_part = cpuid & (ARM_CPUID_IMPLEMENTER_MASK | ARM_CPUID_PARTNO_MASK);
for (unsigned int n = 0; n < ARRAY_SIZE(cortex_m_parts); n++) {
if (impl_part == cortex_m_parts[n].impl_part) {
diff --git a/src/target/cortex_m.h b/src/target/cortex_m.h
index 0c2995f3a..726fca290 100644
--- a/src/target/cortex_m.h
+++ b/src/target/cortex_m.h
@@ -31,36 +31,36 @@
#define CPUID 0xE000ED00
-#define ARM_CPUID_IMPLEMENTOR_POS 24
-#define ARM_CPUID_IMPLEMENTOR_MASK (0xFF << ARM_CPUID_IMPLEMENTOR_POS)
+#define ARM_CPUID_IMPLEMENTER_POS 24
+#define ARM_CPUID_IMPLEMENTER_MASK (0xFF << ARM_CPUID_IMPLEMENTER_POS)
#define ARM_CPUID_PARTNO_POS 4
#define ARM_CPUID_PARTNO_MASK (0xFFF << ARM_CPUID_PARTNO_POS)
-#define ARM_MAKE_CPUID(impl, partno) ((((impl) << ARM_CPUID_IMPLEMENTOR_POS) & ARM_CPUID_IMPLEMENTOR_MASK) | \
+#define ARM_MAKE_CPUID(impl, partno) ((((impl) << ARM_CPUID_IMPLEMENTER_POS) & ARM_CPUID_IMPLEMENTER_MASK) | \
(((partno) << ARM_CPUID_PARTNO_POS) & ARM_CPUID_PARTNO_MASK))
/** Known Arm Cortex masked CPU Ids
- * This includes the implementor and part number, but _not_ the revision or
+ * This includes the implementer and part number, but _not_ the revision or
* patch fields.
*/
enum cortex_m_impl_part {
CORTEX_M_PARTNO_INVALID,
- STAR_MC1_PARTNO = ARM_MAKE_CPUID(ARM_IMPLEMENTOR_ARM_CHINA, 0x132),
- CORTEX_M0_PARTNO = ARM_MAKE_CPUID(ARM_IMPLEMENTOR_ARM, 0xC20),
- CORTEX_M1_PARTNO = ARM_MAKE_CPUID(ARM_IMPLEMENTOR_ARM, 0xC21),
- CORTEX_M3_PARTNO = ARM_MAKE_CPUID(ARM_IMPLEMENTOR_ARM, 0xC23),
- CORTEX_M4_PARTNO = ARM_MAKE_CPUID(ARM_IMPLEMENTOR_ARM, 0xC24),
- CORTEX_M7_PARTNO = ARM_MAKE_CPUID(ARM_IMPLEMENTOR_ARM, 0xC27),
- CORTEX_M0P_PARTNO = ARM_MAKE_CPUID(ARM_IMPLEMENTOR_ARM, 0xC60),
- CORTEX_M23_PARTNO = ARM_MAKE_CPUID(ARM_IMPLEMENTOR_ARM, 0xD20),
- CORTEX_M33_PARTNO = ARM_MAKE_CPUID(ARM_IMPLEMENTOR_ARM, 0xD21),
- CORTEX_M35P_PARTNO = ARM_MAKE_CPUID(ARM_IMPLEMENTOR_ARM, 0xD31),
- CORTEX_M52_PARTNO = ARM_MAKE_CPUID(ARM_IMPLEMENTOR_ARM_CHINA, 0xD24),
- CORTEX_M55_PARTNO = ARM_MAKE_CPUID(ARM_IMPLEMENTOR_ARM, 0xD22),
- CORTEX_M85_PARTNO = ARM_MAKE_CPUID(ARM_IMPLEMENTOR_ARM, 0xD23),
- INFINEON_SLX2_PARTNO = ARM_MAKE_CPUID(ARM_IMPLEMENTOR_INFINEON, 0xDB0),
- REALTEK_M200_PARTNO = ARM_MAKE_CPUID(ARM_IMPLEMENTOR_REALTEK, 0xd20),
- REALTEK_M300_PARTNO = ARM_MAKE_CPUID(ARM_IMPLEMENTOR_REALTEK, 0xd22),
+ STAR_MC1_PARTNO = ARM_MAKE_CPUID(ARM_IMPLEMENTER_ARM_CHINA, 0x132),
+ CORTEX_M0_PARTNO = ARM_MAKE_CPUID(ARM_IMPLEMENTER_ARM, 0xC20),
+ CORTEX_M1_PARTNO = ARM_MAKE_CPUID(ARM_IMPLEMENTER_ARM, 0xC21),
+ CORTEX_M3_PARTNO = ARM_MAKE_CPUID(ARM_IMPLEMENTER_ARM, 0xC23),
+ CORTEX_M4_PARTNO = ARM_MAKE_CPUID(ARM_IMPLEMENTER_ARM, 0xC24),
+ CORTEX_M7_PARTNO = ARM_MAKE_CPUID(ARM_IMPLEMENTER_ARM, 0xC27),
+ CORTEX_M0P_PARTNO = ARM_MAKE_CPUID(ARM_IMPLEMENTER_ARM, 0xC60),
+ CORTEX_M23_PARTNO = ARM_MAKE_CPUID(ARM_IMPLEMENTER_ARM, 0xD20),
+ CORTEX_M33_PARTNO = ARM_MAKE_CPUID(ARM_IMPLEMENTER_ARM, 0xD21),
+ CORTEX_M35P_PARTNO = ARM_MAKE_CPUID(ARM_IMPLEMENTER_ARM, 0xD31),
+ CORTEX_M52_PARTNO = ARM_MAKE_CPUID(ARM_IMPLEMENTER_ARM_CHINA, 0xD24),
+ CORTEX_M55_PARTNO = ARM_MAKE_CPUID(ARM_IMPLEMENTER_ARM, 0xD22),
+ CORTEX_M85_PARTNO = ARM_MAKE_CPUID(ARM_IMPLEMENTER_ARM, 0xD23),
+ INFINEON_SLX2_PARTNO = ARM_MAKE_CPUID(ARM_IMPLEMENTER_INFINEON, 0xDB0),
+ REALTEK_M200_PARTNO = ARM_MAKE_CPUID(ARM_IMPLEMENTER_REALTEK, 0xd20),
+ REALTEK_M300_PARTNO = ARM_MAKE_CPUID(ARM_IMPLEMENTER_REALTEK, 0xd22),
};
/* Relevant Cortex-M flags, used in struct cortex_m_part_info.flags */
-----------------------------------------------------------------------
Summary of changes:
src/target/arm.h | 12 ++++++------
src/target/cortex_m.c | 4 ++--
src/target/cortex_m.h | 40 ++++++++++++++++++++--------------------
3 files changed, 28 insertions(+), 28 deletions(-)
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From: openocd-gerrit <ope...@us...> - 2024-07-13 22:20:04
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".
The branch, master has been updated
via fbb16b05da3b87a5e305a73a5dcca9f1ccdd5885 (commit)
from df7a31f5367d61e4b61b990a0e265a786ba90fd4 (commit)
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- Log -----------------------------------------------------------------
commit fbb16b05da3b87a5e305a73a5dcca9f1ccdd5885
Author: Antonio Borneo <bor...@gm...>
Date: Tue Jun 4 11:11:25 2024 +0200
target: cortex_m: add detection for Cortex-M52
Add Cortex-M52 to the list of known Cortex-M implementations to
allow detection of the core.
Values checked against the ARM document "Arm China Cortex®-M52
Processor Technical Reference Manual" 102776_0002_06_en.
Reported-by: Joseph Yiu <Jos...@ar...>
Change-Id: Id0bde8a0476f76799b7274835db9690f975e2dd6
Signed-off-by: Antonio Borneo <bor...@gm...>
Reviewed-on: https://review.openocd.org/c/openocd/+/8317
Tested-by: jenkins
diff --git a/src/target/cortex_m.c b/src/target/cortex_m.c
index 9b00a2796..cf4e8dfb7 100644
--- a/src/target/cortex_m.c
+++ b/src/target/cortex_m.c
@@ -99,6 +99,12 @@ static const struct cortex_m_part_info cortex_m_parts[] = {
.arch = ARM_ARCH_V8M,
.flags = CORTEX_M_F_HAS_FPV5,
},
+ {
+ .impl_part = CORTEX_M52_PARTNO,
+ .name = "Cortex-M52",
+ .arch = ARM_ARCH_V8M,
+ .flags = CORTEX_M_F_HAS_FPV5,
+ },
{
.impl_part = CORTEX_M55_PARTNO,
.name = "Cortex-M55",
diff --git a/src/target/cortex_m.h b/src/target/cortex_m.h
index 847bb9518..0c2995f3a 100644
--- a/src/target/cortex_m.h
+++ b/src/target/cortex_m.h
@@ -55,6 +55,7 @@ enum cortex_m_impl_part {
CORTEX_M23_PARTNO = ARM_MAKE_CPUID(ARM_IMPLEMENTOR_ARM, 0xD20),
CORTEX_M33_PARTNO = ARM_MAKE_CPUID(ARM_IMPLEMENTOR_ARM, 0xD21),
CORTEX_M35P_PARTNO = ARM_MAKE_CPUID(ARM_IMPLEMENTOR_ARM, 0xD31),
+ CORTEX_M52_PARTNO = ARM_MAKE_CPUID(ARM_IMPLEMENTOR_ARM_CHINA, 0xD24),
CORTEX_M55_PARTNO = ARM_MAKE_CPUID(ARM_IMPLEMENTOR_ARM, 0xD22),
CORTEX_M85_PARTNO = ARM_MAKE_CPUID(ARM_IMPLEMENTOR_ARM, 0xD23),
INFINEON_SLX2_PARTNO = ARM_MAKE_CPUID(ARM_IMPLEMENTOR_INFINEON, 0xDB0),
-----------------------------------------------------------------------
Summary of changes:
src/target/cortex_m.c | 6 ++++++
src/target/cortex_m.h | 1 +
2 files changed, 7 insertions(+)
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From: openocd-gerrit <ope...@us...> - 2024-07-13 22:19:34
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".
The branch, master has been updated
via df7a31f5367d61e4b61b990a0e265a786ba90fd4 (commit)
from ed80a182ceadbf7ecbc921241526335a6d5cc65e (commit)
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- Log -----------------------------------------------------------------
commit df7a31f5367d61e4b61b990a0e265a786ba90fd4
Author: Antonio Borneo <bor...@gm...>
Date: Tue Jun 4 10:30:20 2024 +0200
target: cortex_m: fix detection of STAR-MC1 device
The detection of Cortex-M STAR-MC1 was introduced with [1], at a
time when OpenOCD was only checking the field PartNo of the CPUID
register.
Later-on [2], OpenOCD extended the check to the field implementer
of CPUID register. The value for ARM (0x41) implementer was used
to all the Cortex-M, but no feedback for STAR-MC1 was available. A
comment reporting the possible mismatch was added.
As reported on OpenOCD mailing-list, the technical reference manual
for STAR-MC1 is now available [3] and it reports the implementer
as ARM China (0x63) [3].
Fix the STAR-MC1 implementer accordingly.
Reported-by: Joseph Yiu <Jos...@ar...>
Change-Id: I8ed1064a847b73065528ee7032be967b5c58b431
Signed-off-by: Antonio Borneo <bor...@gm...>
Link: [1] 7dc4be3157d6 ("target/arm: Add support with identify STAR-MC1")
Fixes: [2] 05ee88915520 ("target/cortex_m: check core implementor field")
Link: [3] https://www.armchina.com/download/Documents/Application-Notes/Technical-Reference-Manual?infoId=160
Reviewed-on: https://review.openocd.org/c/openocd/+/8316
Tested-by: jenkins
Reviewed-by: Tomas Vanek <va...@fb...>
diff --git a/src/target/arm.h b/src/target/arm.h
index 486666b5c..999dc9ae7 100644
--- a/src/target/arm.h
+++ b/src/target/arm.h
@@ -62,6 +62,7 @@ enum arm_arch {
enum arm_implementor {
ARM_IMPLEMENTOR_ARM = 0x41,
ARM_IMPLEMENTOR_INFINEON = 0x49,
+ ARM_IMPLEMENTOR_ARM_CHINA = 0x63,
ARM_IMPLEMENTOR_REALTEK = 0x72,
};
diff --git a/src/target/cortex_m.h b/src/target/cortex_m.h
index eb646e472..847bb9518 100644
--- a/src/target/cortex_m.h
+++ b/src/target/cortex_m.h
@@ -45,7 +45,7 @@
*/
enum cortex_m_impl_part {
CORTEX_M_PARTNO_INVALID,
- STAR_MC1_PARTNO = ARM_MAKE_CPUID(ARM_IMPLEMENTOR_ARM, 0x132), /* FIXME - confirm implementor! */
+ STAR_MC1_PARTNO = ARM_MAKE_CPUID(ARM_IMPLEMENTOR_ARM_CHINA, 0x132),
CORTEX_M0_PARTNO = ARM_MAKE_CPUID(ARM_IMPLEMENTOR_ARM, 0xC20),
CORTEX_M1_PARTNO = ARM_MAKE_CPUID(ARM_IMPLEMENTOR_ARM, 0xC21),
CORTEX_M3_PARTNO = ARM_MAKE_CPUID(ARM_IMPLEMENTOR_ARM, 0xC23),
-----------------------------------------------------------------------
Summary of changes:
src/target/arm.h | 1 +
src/target/cortex_m.h | 2 +-
2 files changed, 2 insertions(+), 1 deletion(-)
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From: openocd-gerrit <ope...@us...> - 2024-07-13 22:19:15
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".
The branch, master has been updated
via ed80a182ceadbf7ecbc921241526335a6d5cc65e (commit)
from 4d99e77419e34fac62e36355e7205e929c712b5c (commit)
Those revisions listed above that are new to this repository have
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- Log -----------------------------------------------------------------
commit ed80a182ceadbf7ecbc921241526335a6d5cc65e
Author: Marc Schink <de...@za...>
Date: Fri Jun 14 16:37:39 2024 +0200
tcl: Replace 'hla_' prefix with 'hla' command group
Change-Id: I99ec2dc7f300352d091cf9eb807a690901c33307
Signed-off-by: Marc Schink <de...@za...>
Reviewed-on: https://review.openocd.org/c/openocd/+/8338
Reviewed-by: Antonio Borneo <bor...@gm...>
Tested-by: jenkins
diff --git a/tcl/interface/nulink.cfg b/tcl/interface/nulink.cfg
index 2a4bc0b93..48dc20e24 100644
--- a/tcl/interface/nulink.cfg
+++ b/tcl/interface/nulink.cfg
@@ -5,9 +5,9 @@
#
adapter driver hla
-hla_layout nulink
-hla_device_desc "Nu-Link"
-hla_vid_pid 0x0416 0x511b 0x0416 0x511c 0x0416 0x511d 0x0416 0x5200 0x0416 0x5201
+hla layout nulink
+hla device_desc "Nu-Link"
+hla vid_pid 0x0416 0x511b 0x0416 0x511c 0x0416 0x511d 0x0416 0x5200 0x0416 0x5201
# Only swd is supported
transport select hla_swd
diff --git a/tcl/interface/stlink.cfg b/tcl/interface/stlink.cfg
index 8578bf219..9b7f1f9eb 100644
--- a/tcl/interface/stlink.cfg
+++ b/tcl/interface/stlink.cfg
@@ -6,9 +6,9 @@
#
adapter driver hla
-hla_layout stlink
-hla_device_desc "ST-LINK"
-hla_vid_pid 0x0483 0x3744 0x0483 0x3748 0x0483 0x374b 0x0483 0x374d 0x0483 0x374e 0x0483 0x374f 0x0483 0x3752 0x0483 0x3753 0x0483 0x3754 0x0483 0x3755 0x0483 0x3757
+hla layout stlink
+hla device_desc "ST-LINK"
+hla vid_pid 0x0483 0x3744 0x0483 0x3748 0x0483 0x374b 0x0483 0x374d 0x0483 0x374e 0x0483 0x374f 0x0483 0x3752 0x0483 0x3753 0x0483 0x3754 0x0483 0x3755 0x0483 0x3757
# Optionally specify the serial number of ST-LINK/V2 usb device. ST-LINK/V2
# devices seem to have serial numbers with unreadable characters. ST-LINK/V2
diff --git a/tcl/interface/ti-icdi.cfg b/tcl/interface/ti-icdi.cfg
index db4e1e0a0..c13d27e8b 100644
--- a/tcl/interface/ti-icdi.cfg
+++ b/tcl/interface/ti-icdi.cfg
@@ -10,8 +10,8 @@
#
adapter driver hla
-hla_layout ti-icdi
-hla_vid_pid 0x1cbe 0x00fd
+hla layout ti-icdi
+hla vid_pid 0x1cbe 0x00fd
# Optionally specify the serial number of TI-ICDI devices, for when using
# multiple devices. Serial numbers can be obtained using lsusb -v
-----------------------------------------------------------------------
Summary of changes:
tcl/interface/nulink.cfg | 6 +++---
tcl/interface/stlink.cfg | 6 +++---
tcl/interface/ti-icdi.cfg | 4 ++--
3 files changed, 8 insertions(+), 8 deletions(-)
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From: openocd-gerrit <ope...@us...> - 2024-07-13 16:49:29
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".
The branch, master has been updated
via 4d99e77419e34fac62e36355e7205e929c712b5c (commit)
from 7957208cf6c50ddbbc4b6d687f8aa278604a363b (commit)
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- Log -----------------------------------------------------------------
commit 4d99e77419e34fac62e36355e7205e929c712b5c
Author: Marc Schink <de...@za...>
Date: Thu Nov 9 11:20:00 2023 +0100
jtag/hla: Restructure commands
Use a command group 'hla' with subcommands instead of individual
commands with 'hla_' prefix.
The old commands are still available to ensure backwards compatibility,
but are marked as deprecated.
Change-Id: I612e3cc080d308735932aea0f11001428eadc570
Signed-off-by: Marc Schink <de...@za...>
Reviewed-on: https://review.openocd.org/c/openocd/+/8335
Tested-by: jenkins
Reviewed-by: Antonio Borneo <bor...@gm...>
diff --git a/doc/openocd.texi b/doc/openocd.texi
index 267430d1f..a7c1e6d08 100644
--- a/doc/openocd.texi
+++ b/doc/openocd.texi
@@ -3197,19 +3197,19 @@ versions of firmware where serial number is reset after first use. Suggest
using ST firmware update utility to upgrade ST-LINK firmware even if current
version reported is V2.J21.S4.
-@deffn {Config Command} {hla_device_desc} description
+@deffn {Config Command} {hla device_desc} description
Currently Not Supported.
@end deffn
-@deffn {Config Command} {hla_layout} (@option{stlink}|@option{icdi}|@option{nulink})
+@deffn {Config Command} {hla layout} (@option{stlink}|@option{icdi}|@option{nulink})
Specifies the adapter layout to use.
@end deffn
-@deffn {Config Command} {hla_vid_pid} [vid pid]+
+@deffn {Config Command} {hla vid_pid} [vid pid]+
Pairs of vendor IDs and product IDs of the device.
@end deffn
-@deffn {Config Command} {hla_stlink_backend} (usb | tcp [port])
+@deffn {Config Command} {hla stlink_backend} (usb | tcp [port])
@emph{ST-Link only:} Choose between 'exclusive' USB communication (the default backend) or
'shared' mode using ST-Link TCP server (the default port is 7184).
@@ -3218,7 +3218,7 @@ available from @url{https://www.st.com/en/development-tools/st-link-server.html,
ST-LINK server software module}.
@end deffn
-@deffn {Command} {hla_command} command
+@deffn {Command} {hla command} command
Execute a custom adapter-specific command. The @var{command} string is
passed as is to the underlying adapter layout handler.
@end deffn
diff --git a/src/jtag/hla/hla_interface.c b/src/jtag/hla/hla_interface.c
index 6ac680128..c73f6c8d3 100644
--- a/src/jtag/hla/hla_interface.c
+++ b/src/jtag/hla/hla_interface.c
@@ -319,37 +319,37 @@ COMMAND_HANDLER(interface_handle_hla_command)
return ERROR_OK;
}
-static const struct command_registration hl_interface_command_handlers[] = {
+static const struct command_registration hl_interface_subcommand_handlers[] = {
{
- .name = "hla_device_desc",
+ .name = "device_desc",
.handler = &hl_interface_handle_device_desc_command,
.mode = COMMAND_CONFIG,
.help = "set the device description of the adapter",
.usage = "description_string",
},
{
- .name = "hla_layout",
+ .name = "layout",
.handler = &hl_interface_handle_layout_command,
.mode = COMMAND_CONFIG,
.help = "set the layout of the adapter",
.usage = "layout_name",
},
{
- .name = "hla_vid_pid",
+ .name = "vid_pid",
.handler = &hl_interface_handle_vid_pid_command,
.mode = COMMAND_CONFIG,
.help = "the vendor and product ID of the adapter",
.usage = "(vid pid)*",
},
{
- .name = "hla_stlink_backend",
+ .name = "stlink_backend",
.handler = &hl_interface_handle_stlink_backend_command,
.mode = COMMAND_CONFIG,
.help = "select which ST-Link backend to use",
.usage = "usb | tcp [port]",
},
{
- .name = "hla_command",
+ .name = "command",
.handler = &interface_handle_hla_command,
.mode = COMMAND_EXEC,
.help = "execute a custom adapter-specific command",
@@ -358,6 +358,17 @@ static const struct command_registration hl_interface_command_handlers[] = {
COMMAND_REGISTRATION_DONE
};
+static const struct command_registration hl_interface_command_handlers[] = {
+ {
+ .name = "hla",
+ .mode = COMMAND_ANY,
+ .help = "perform hla management",
+ .chain = hl_interface_subcommand_handlers,
+ .usage = "",
+ },
+ COMMAND_REGISTRATION_DONE
+};
+
struct adapter_driver hl_adapter_driver = {
.name = "hla",
.transports = hl_transports,
diff --git a/src/jtag/startup.tcl b/src/jtag/startup.tcl
index 41db38e4a..2d8ebf041 100644
--- a/src/jtag/startup.tcl
+++ b/src/jtag/startup.tcl
@@ -1126,6 +1126,36 @@ proc "cmsis_dap_usb" {args} {
eval cmsis-dap usb $args
}
+lappend _telnet_autocomplete_skip "hla_layout"
+proc "hla_layout" {layout} {
+ echo "DEPRECATED! use 'hla layout', not 'hla_layout'"
+ eval hla layout $layout
+}
+
+lappend _telnet_autocomplete_skip "hla_device_desc"
+proc "hla_device_desc" {desc} {
+ echo "DEPRECATED! use 'hla device_desc', not 'hla_device_desc'"
+ eval hla device_desc $desc
+}
+
+lappend _telnet_autocomplete_skip "hla_vid_pid"
+proc "hla_vid_pid" {args} {
+ echo "DEPRECATED! use 'hla vid_pid', not 'hla_vid_pid'"
+ eval hla vid_pid $args
+}
+
+lappend _telnet_autocomplete_skip "hla_command"
+proc "hla_command" {command} {
+ echo "DEPRECATED! use 'hla command', not 'hla_command'"
+ eval hla command $command
+}
+
+lappend _telnet_autocomplete_skip "hla_stlink_backend"
+proc "hla_stlink_backend" {args} {
+ echo "DEPRECATED! use 'hla stlink_backend', not 'hla_stlink_backend'"
+ eval hla stlink_backend $args
+}
+
lappend _telnet_autocomplete_skip "kitprog_init_acquire_psoc"
proc "kitprog_init_acquire_psoc" {} {
echo "DEPRECATED! use 'kitprog init_acquire_psoc', not 'kitprog_init_acquire_psoc'"
-----------------------------------------------------------------------
Summary of changes:
doc/openocd.texi | 10 +++++-----
src/jtag/hla/hla_interface.c | 23 +++++++++++++++++------
src/jtag/startup.tcl | 30 ++++++++++++++++++++++++++++++
3 files changed, 52 insertions(+), 11 deletions(-)
hooks/post-receive
--
Main OpenOCD repository
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|
From: openocd-gerrit <ope...@us...> - 2024-07-13 16:48:13
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".
The branch, master has been updated
via 7957208cf6c50ddbbc4b6d687f8aa278604a363b (commit)
from 990869f7ec8dbb91f14f9edde6f02dc30fd18b8e (commit)
Those revisions listed above that are new to this repository have
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- Log -----------------------------------------------------------------
commit 7957208cf6c50ddbbc4b6d687f8aa278604a363b
Author: Mark Zhuang <mar...@sp...>
Date: Mon Apr 10 11:17:17 2023 +0800
openocd: fix some coding style
Add space around math operators.
Change-Id: I50fce3da283a78ba02bf70b6a752f7bf778d79f5
Signed-off-by: Mark Zhuang <mar...@sp...>
Reviewed-on: https://review.openocd.org/c/openocd/+/7585
Tested-by: jenkins
Reviewed-by: Antonio Borneo <bor...@gm...>
diff --git a/src/flash/nor/em357.c b/src/flash/nor/em357.c
index 043494c78..207346f10 100644
--- a/src/flash/nor/em357.c
+++ b/src/flash/nor/em357.c
@@ -709,7 +709,7 @@ static int em357_probe(struct flash_bank *bank)
em357_info->ppage_size = 4;
- LOG_INFO("flash size = %d KiB", num_pages*page_size/1024);
+ LOG_INFO("flash size = %d KiB", num_pages * page_size / 1024);
free(bank->sectors);
diff --git a/src/target/xtensa/xtensa.c b/src/target/xtensa/xtensa.c
index 702b8fc6b..54fcd2ad6 100644
--- a/src/target/xtensa/xtensa.c
+++ b/src/target/xtensa/xtensa.c
@@ -540,7 +540,7 @@ static void xtensa_queue_exec_ins_wide(struct xtensa *xtensa, uint8_t *ops, uint
for (int32_t i = oplenw - 1; i > 0; i--)
xtensa_queue_dbg_reg_write(xtensa,
XDMREG_DIR0 + i,
- target_buffer_get_u32(xtensa->target, &ops_padded[sizeof(uint32_t)*i]));
+ target_buffer_get_u32(xtensa->target, &ops_padded[sizeof(uint32_t) * i]));
/* Write DIR0EXEC last */
xtensa_queue_dbg_reg_write(xtensa,
XDMREG_DIR0EXEC,
-----------------------------------------------------------------------
Summary of changes:
src/flash/nor/em357.c | 2 +-
src/target/xtensa/xtensa.c | 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
hooks/post-receive
--
Main OpenOCD repository
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|
From: openocd-gerrit <ope...@us...> - 2024-07-13 16:47:41
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".
The branch, master has been updated
via 990869f7ec8dbb91f14f9edde6f02dc30fd18b8e (commit)
from 6ed058933cfc023ef02e8c6d08c37ddc5b0328c2 (commit)
Those revisions listed above that are new to this repository have
not appeared on any other notification email; so we list those
revisions in full, below.
- Log -----------------------------------------------------------------
commit 990869f7ec8dbb91f14f9edde6f02dc30fd18b8e
Author: Antonio Borneo <bor...@gm...>
Date: Fri Jun 21 14:32:45 2024 +0200
openocd: build: prevent old clone to fail on git submodules
Working on an old local git repository, the git sub-modules could
have been set before last changes in .gitmodules.
The script 'bootstrap' does not update the url of the repositories
and this can cause the script to fail.
Add 'git submodule sync' to the script to update the url of the
repositories.
While there, fuse 'git submodule init' and git submodule update'
in a single command.
Reported-by: Karl Hammar <ka...@as...>
Change-Id: I61412f804dbbb7a843aa009139ddb4b8e71beefb
Signed-off-by: Antonio Borneo <bor...@gm...>
Reviewed-on: https://review.openocd.org/c/openocd/+/8375
Tested-by: jenkins
diff --git a/bootstrap b/bootstrap
index cf6167fff..7d4ca37bd 100755
--- a/bootstrap
+++ b/bootstrap
@@ -38,8 +38,8 @@ if [ -n "$SKIP_SUBMODULE" ]; then
echo "Skipping submodule setup"
else
echo "Setting up submodules"
- git submodule init
- git submodule update
+ git submodule sync
+ git submodule update --init
fi
if [ -x src/jtag/drivers/libjaylink/autogen.sh ]; then
-----------------------------------------------------------------------
Summary of changes:
bootstrap | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
hooks/post-receive
--
Main OpenOCD repository
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|
From: openocd-gerrit <ope...@us...> - 2024-07-13 16:47:04
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".
The branch, master has been updated
via 6ed058933cfc023ef02e8c6d08c37ddc5b0328c2 (commit)
from 636f003eee040b41d4aaa48fc1b324b447122b79 (commit)
Those revisions listed above that are new to this repository have
not appeared on any other notification email; so we list those
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- Log -----------------------------------------------------------------
commit 6ed058933cfc023ef02e8c6d08c37ddc5b0328c2
Author: Marc Schink <de...@za...>
Date: Tue Jun 18 17:26:21 2024 +0200
doc: Refurbish manual page
Remove the outdated option '--pipe' and bring the description of OpenOCD
up to date without focus on JTAG only.
Change-Id: If52e936a366dde21c1dd514bd3960d100b540e77
Signed-off-by: Marc Schink <de...@za...>
Reviewed-on: https://review.openocd.org/c/openocd/+/8347
Tested-by: jenkins
Reviewed-by: Antonio Borneo <bor...@gm...>
diff --git a/doc/openocd.1 b/doc/openocd.1
index 4278486e5..34ec7617d 100644
--- a/doc/openocd.1
+++ b/doc/openocd.1
@@ -1,24 +1,21 @@
-.TH "OPENOCD" "1" "November 24, 2009"
+.TH "OPENOCD" "1" "June 18, 2024"
.SH "NAME"
openocd \- A free and open on\-chip debugging, in\-system programming and
-boundary\-scan testing tool for ARM and MIPS systems
+boundary\-scan testing tool for microcontrollers and other embedded devices
.SH "SYNOPSIS"
-.B openocd \fR[\fB\-fsdlcphv\fR] [\fB\-\-file\fR <filename>] [\fB\-\-search\fR <dirname>] [\fB\-\-debug\fR <debuglevel>] [\fB\-\-log_output\fR <filename>] [\fB\-\-command\fR <cmd>] [\fB\-\-pipe\fR] [\fB\-\-help\fR] [\fB\-\-version\fR]
+.B openocd \fR[\fB\-fsdlchv\fR] [\fB\-\-file\fR <filename>] [\fB\-\-search\fR <dirname>] [\fB\-\-debug\fR <debuglevel>] [\fB\-\-log_output\fR <filename>] [\fB\-\-command\fR <cmd>] [\fB\-\-help\fR] [\fB\-\-version\fR]
.SH "DESCRIPTION"
.B OpenOCD
is an on\-chip debugging, in\-system programming and boundary\-scan
-testing tool for various ARM and MIPS systems.
+testing tool for various microcontrollers and other embedded devices.
.PP
-The debugger uses an IEEE 1149\-1 compliant JTAG TAP bus master to access
-on\-chip debug functionality available on ARM based microcontrollers or
-system-on-chip solutions. For MIPS systems the EJTAG interface is supported.
+Various different types of debug adapters as well as transport protocols like
+JTAG and SWD are supported by OpenOCD, please check the \fIopenocd\fR info page
+for the complete list.
.PP
User interaction is realized through a telnet command line interface,
a gdb (the GNU debugger) remote protocol server, and a simplified RPC
connection that can be used to interface with OpenOCD's Jim Tcl engine.
-.PP
-OpenOCD supports various different types of JTAG interfaces/programmers,
-please check the \fIopenocd\fR info page for the complete list.
.SH "OPTIONS"
.TP
.B "\-f, \-\-file <filename>"
@@ -68,8 +65,6 @@ Note that you will need to explicitly invoke
.I init
if the command requires access to a target or flash.
.TP
-.B "\-p, \-\-pipe"
-Use pipes when talking to gdb.
.TP
.B "\-h, \-\-help"
Show a help text and exit.
@@ -82,8 +77,6 @@ Please report any bugs on the mailing list at
.SH "LICENCE"
.B OpenOCD
is covered by the GNU General Public License (GPL), version 2 or later.
-.SH "SEE ALSO"
-.BR jtag (1)
.PP
The full documentation for
.B openocd
-----------------------------------------------------------------------
Summary of changes:
doc/openocd.1 | 21 +++++++--------------
1 file changed, 7 insertions(+), 14 deletions(-)
hooks/post-receive
--
Main OpenOCD repository
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|
From: openocd-gerrit <ope...@us...> - 2024-07-13 16:46:35
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".
The branch, master has been updated
via 636f003eee040b41d4aaa48fc1b324b447122b79 (commit)
from 31e0fc4a7aa049d5cc66a48e2353693b3d52b4a7 (commit)
Those revisions listed above that are new to this repository have
not appeared on any other notification email; so we list those
revisions in full, below.
- Log -----------------------------------------------------------------
commit 636f003eee040b41d4aaa48fc1b324b447122b79
Author: Marc Schink <de...@za...>
Date: Tue Jun 18 11:03:11 2024 +0200
AUTHORS: Refer to source code and Git history
The list of authors and contributors is not maintained and outdated for
years now. Refer to the source code and Git history instead of keeping a
separate list.
Change-Id: I9a92e8e0d5073b56030bc36086b76e28de96389f
Signed-off-by: Marc Schink <de...@za...>
Reviewed-on: https://review.openocd.org/c/openocd/+/8346
Reviewed-by: Jonathan McDowell <noo...@ea...>
Tested-by: jenkins
Reviewed-by: Antonio Borneo <bor...@gm...>
diff --git a/AUTHORS b/AUTHORS
index 2a989f37e..748983464 100644
--- a/AUTHORS
+++ b/AUTHORS
@@ -1,12 +1,2 @@
-Dominic Rath <Dom...@gm...>
-Magnus Lundin <lu...@ml...>
-Michael Fischer <fis...@t-...>
-Spencer Oliver <sp...@sp...>
-Carsten Schlote <sc...@va...>
-Ãyvind Harboe <oyv...@zy...>
-Duane Ellis <op...@du...>
-Michael Schwingen <mi...@sc...>
-Rick Altherr <kc...@us...>
-David Brownell <dbr...@us...>
-Vincint Palatin <vpa...@us...>
-Zachary T Welch <zw...@su...>
+Please check the source code files and/or Git history for a list of all authors
+and contributors.
-----------------------------------------------------------------------
Summary of changes:
AUTHORS | 14 ++------------
1 file changed, 2 insertions(+), 12 deletions(-)
hooks/post-receive
--
Main OpenOCD repository
|
|
From: openocd-gerrit <ope...@us...> - 2024-07-13 16:46:03
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".
The branch, master has been updated
via 31e0fc4a7aa049d5cc66a48e2353693b3d52b4a7 (commit)
from 2fe392ef5085432bb5ae762469ed16e08678f102 (commit)
Those revisions listed above that are new to this repository have
not appeared on any other notification email; so we list those
revisions in full, below.
- Log -----------------------------------------------------------------
commit 31e0fc4a7aa049d5cc66a48e2353693b3d52b4a7
Author: Marc Schink <de...@za...>
Date: Wed Jun 19 08:52:04 2024 +0200
doc: Remove outdated '-pipe' option
Change-Id: Ie3a7a3aaf69485f16b2447bd1dfa7622b584c7c0
Signed-off-by: Marc Schink <de...@za...>
Reviewed-on: https://review.openocd.org/c/openocd/+/8348
Tested-by: jenkins
Reviewed-by: Antonio Borneo <bor...@gm...>
diff --git a/doc/openocd.texi b/doc/openocd.texi
index 667c7a693..267430d1f 100644
--- a/doc/openocd.texi
+++ b/doc/openocd.texi
@@ -2179,8 +2179,6 @@ only during configuration (before those ports are opened).
For reasons including security, you may wish to prevent remote
access using one or more of these ports.
In such cases, just specify the relevant port number as "disabled".
-If you disable all access through TCP/IP, you will need to
-use the command line @option{-pipe} option.
You can request the operating system to select one of the available
ports for the server by specifying the relevant port number as "0".
-----------------------------------------------------------------------
Summary of changes:
doc/openocd.texi | 2 --
1 file changed, 2 deletions(-)
hooks/post-receive
--
Main OpenOCD repository
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|
From: openocd-gerrit <ope...@us...> - 2024-07-13 16:45:24
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".
The branch, master has been updated
via 2fe392ef5085432bb5ae762469ed16e08678f102 (commit)
from c9f22c79dfecf61a7160a324a8b9f4fce695c67c (commit)
Those revisions listed above that are new to this repository have
not appeared on any other notification email; so we list those
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- Log -----------------------------------------------------------------
commit 2fe392ef5085432bb5ae762469ed16e08678f102
Author: Antonio Borneo <bor...@gm...>
Date: Sat Feb 3 14:29:57 2024 +0100
flash: psoc6: drop use of 'coreid' to identify the CPU
The flag '-coreid' is used by the command 'target create' to
specify the debug controller of the target, either in case of a
single debug controller for multiple CPU (e.g. RISC-V harts) or
in case of multiple CPU on a DAP access port (e.g. Cortex-A SMP
cluster).
It is also currently used to specify the CPU ID in a SMP cluster,
but this is going to be reworked.
This flag has no effects on Cortex-M; ARM specifies that only one
CPU Cortex-M can occupy the DAP access port by using hardcoded
addresses.
The flash driver 'psoc6' uses the flag '-coreid' to detect if the
current target is the Cortex-M0 on AP#1 or the Cortex-M4 on AP#2
in the SoC.
There are other ways to run such detection, without using such
unrelated '-coreid' flag, e.g. using the AP number or the arch
type of the target.
Use the arch type to detect Cortex-M0 (ARM_ARCH_V6M) vs Cortex-M4
(ARM_ARCH_V7M).
Drop the flags '-coreid' from the psoc6 configuration file.
Change-Id: I0b9601c160dd4f2421a03ce6e3e7c55c6212f714
Signed-off-by: Antonio Borneo <bor...@gm...>
Reviewed-on: https://review.openocd.org/c/openocd/+/8128
Tested-by: jenkins
Reviewed-by: Tomas Vanek <va...@fb...>
diff --git a/src/flash/nor/psoc6.c b/src/flash/nor/psoc6.c
index 859b3e9ec..47f3ac698 100644
--- a/src/flash/nor/psoc6.c
+++ b/src/flash/nor/psoc6.c
@@ -223,6 +223,8 @@ static int ipc_poll_lock_stat(struct target *target, uint32_t ipc_id, bool lock_
{
int hr;
uint32_t reg_val;
+ struct armv7m_common *armv7m = target_to_armv7m(target);
+ bool is_cm0 = (armv7m->arm.arch == ARM_ARCH_V6M);
struct timeout to;
timeout_init(&to, IPC_TIMEOUT_MS);
@@ -244,7 +246,7 @@ static int ipc_poll_lock_stat(struct target *target, uint32_t ipc_id, bool lock_
return ERROR_OK;
}
- if (target->coreid) {
+ if (!is_cm0) {
LOG_WARNING("SROM API calls via CM4 target are supported on single-core PSoC6 devices only. "
"Please perform all Flash-related operations via CM0+ target on dual-core devices.");
}
@@ -886,7 +888,8 @@ static int handle_reset_halt(struct target *target)
{
int hr;
uint32_t reset_addr;
- bool is_cm0 = (target->coreid == 0);
+ struct armv7m_common *armv7m = target_to_armv7m(target);
+ bool is_cm0 = (armv7m->arm.arch == ARM_ARCH_V6M);
/* Halt target device */
if (target->state != TARGET_HALTED) {
diff --git a/tcl/target/psoc6.cfg b/tcl/target/psoc6.cfg
index d69515cdf..52b04f569 100644
--- a/tcl/target/psoc6.cfg
+++ b/tcl/target/psoc6.cfg
@@ -113,7 +113,7 @@ proc psoc6_deassert_post { target } {
}
if { $_ENABLE_CM0 } {
- target create ${TARGET}.cm0 cortex_m -dap $_CHIPNAME.dap -ap-num 1 -coreid 0
+ target create ${TARGET}.cm0 cortex_m -dap $_CHIPNAME.dap -ap-num 1
${TARGET}.cm0 configure -work-area-phys $_WORKAREAADDR_CM0 -work-area-size $_WORKAREASIZE_CM0 -work-area-backup 0
flash bank main_flash_cm0 psoc6 0x10000000 0 0 0 ${TARGET}.cm0
@@ -128,7 +128,7 @@ if { $_ENABLE_CM0 } {
}
if { $_ENABLE_CM4 } {
- target create ${TARGET}.cm4 cortex_m -dap $_CHIPNAME.dap -ap-num 2 -coreid 1
+ target create ${TARGET}.cm4 cortex_m -dap $_CHIPNAME.dap -ap-num 2
${TARGET}.cm4 configure -work-area-phys $_WORKAREAADDR_CM4 -work-area-size $_WORKAREASIZE_CM4 -work-area-backup 0
flash bank main_flash_cm4 psoc6 0x10000000 0 0 0 ${TARGET}.cm4
-----------------------------------------------------------------------
Summary of changes:
src/flash/nor/psoc6.c | 7 +++++--
tcl/target/psoc6.cfg | 4 ++--
2 files changed, 7 insertions(+), 4 deletions(-)
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From: openocd-gerrit <ope...@us...> - 2024-07-13 16:45:01
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".
The branch, master has been updated
via c9f22c79dfecf61a7160a324a8b9f4fce695c67c (commit)
from 23c33e1d3a332a94ef080451d43c6dc004e34750 (commit)
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- Log -----------------------------------------------------------------
commit c9f22c79dfecf61a7160a324a8b9f4fce695c67c
Author: Antonio Borneo <bor...@gm...>
Date: Sat Feb 3 19:25:21 2024 +0100
doc: document 'target create' flags '-dbgbase' and '-coreid'
Add to the command 'target create' the description for the flags
'-dbgbase' and '-coreid'.
Report that '-coreid' is currently used for purposes other than
CPU detection/examination, and that such uses are going to be
re-considered.
Change-Id: I25c839e3653101234c5862ce9da77019a5bb3249
Signed-off-by: Antonio Borneo <bor...@gm...>
Reviewed-on: https://review.openocd.org/c/openocd/+/8129
Reviewed-by: Tomas Vanek <va...@fb...>
Tested-by: jenkins
diff --git a/doc/openocd.texi b/doc/openocd.texi
index e46e6004b..667c7a693 100644
--- a/doc/openocd.texi
+++ b/doc/openocd.texi
@@ -5161,6 +5161,38 @@ On ADIv6 DAP @var{ap_number} is the base address of the DAP AP the target is con
Use this option with systems where multiple, independent cores are connected
to separate access ports of the same DAP.
+@item @code{-dbgbase} @var{dbg_base_address} -- set the base address of the
+debug controller.
+This is ignored and not required for target types that have the debug controller
+at fixed addresses, like @code{cortex_m}.
+On DAP based SoC, OpenOCD can parse the ROM table in the DAP access port to
+identify the base address of the debug controller, but the parsing can be slow
+on devices with big ROM tables.
+While using @code{-dbgbase} is suggested to speed up the target examination,
+it is often the only viable solution for devices with incorrect ROM table
+content or with ROM table partially not accessible due to clock gating or
+power management.
+
+@item @code{-coreid} @var{coreid} -- set an index to identify the CPU or its
+debug controller.
+
+@itemize @minus
+@item When @code{-dbgbase} option is not provided on devices with multiple
+CPUs on the same DAP access port
+(e.g. @code{cortex_a}, @code{cortex_r4}, @code{aarch64} and @code{armv8r}),
+this option specifies that the ROM table parsing should select the CPU in
+position @var{coreid}.
+
+@item On target type @code{riscv}, @var{coreid} specifies the hart
+(HARdware Threads) on the DM (Debug Module). It is used on multi-hart
+devices to index a specific hart ID.
+When not present, it's default value is zero.
+
+@item This value @var{coreid} is currently also used in other contexts as a
+general CPU index, e.g. in SMP nodes or to select a specific CPU in a chip.
+To avoid confusion, these additional use cases are going to be dropped.
+@end itemize
+
@item @code{-cti} @var{cti_name} -- set Cross-Trigger Interface (CTI) connected
to the target. Currently, only the @code{aarch64} target makes use of this option,
where it is a mandatory configuration for the target run control.
-----------------------------------------------------------------------
Summary of changes:
doc/openocd.texi | 32 ++++++++++++++++++++++++++++++++
1 file changed, 32 insertions(+)
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From: openocd-gerrit <ope...@us...> - 2024-07-01 03:32:59
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".
The branch, master has been updated
via 23c33e1d3a332a94ef080451d43c6dc004e34750 (commit)
from ad87fbd1cf28760795c4e18f3318a2d720e5a8a6 (commit)
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- Log -----------------------------------------------------------------
commit 23c33e1d3a332a94ef080451d43c6dc004e34750
Author: Tomas Vanek <va...@fb...>
Date: Mon Jun 10 13:10:44 2024 +0200
target/cortex_m: workaround Cortex-M7 erratum 3092511
When an asynchronous exception occurs at the same time
as a breakpoint event (either hardware breakpoint or software breakpoint),
it is possible for the processor to halt at the beginning of the
exception handler instead of the instruction address pointed
by the breakpoint.
During debug entry in exception handler state and with BKPT bit set
as the only break reason in DFSR, check if there is a breakpoint, which
have triggered the debug halt. If there is no such breakpoint,
resume execution. The processor services the interrupt and
halts again at the correct breakpoint address.
The workaround is not needed during target algo run (debug_execution)
because interrupts are disabled in PRIMASK register.
Also after single step the workaround resume never takes place:
the situation is treated as error.
Link: https://developer.arm.com/documentation/SDEN1068427/latest/
Signed-off-by: Tomas Vanek <va...@fb...>
Change-Id: I8b23f39cedd7dccabe7e7066d616fb972b69f769
Reviewed-on: https://review.openocd.org/c/openocd/+/8332
Tested-by: jenkins
Reviewed-by: Antonio Borneo <bor...@gm...>
Reviewed-by: Liviu Ionescu
diff --git a/src/target/cortex_m.c b/src/target/cortex_m.c
index 34c7cd4d2..9b00a2796 100644
--- a/src/target/cortex_m.c
+++ b/src/target/cortex_m.c
@@ -797,6 +797,42 @@ static int cortex_m_examine_exception_reason(struct target *target)
return retval;
}
+/* Errata 3092511 workaround
+ * Cortex-M7 can halt in an incorrect address when breakpoint
+ * and exception occurs simultaneously */
+static int cortex_m_erratum_check_breakpoint(struct target *target)
+{
+ struct cortex_m_common *cortex_m = target_to_cm(target);
+ struct armv7m_common *armv7m = &cortex_m->armv7m;
+ struct arm *arm = &armv7m->arm;
+
+ uint32_t pc = buf_get_u32(arm->pc->value, 0, 32);
+
+ /* To reduce the workaround processing cost we assume FPB is in sync
+ * with OpenOCD breakpoints. If the target app writes to FPB
+ * OpenOCD will resume after the break set by app */
+ struct breakpoint *bkpt = breakpoint_find(target, pc);
+ if (bkpt) {
+ LOG_TARGET_DEBUG(target, "Erratum 3092511: breakpoint confirmed");
+ return ERROR_OK;
+ }
+ if (pc >= 0xe0000000u)
+ /* not executable area, do not read instruction @ pc */
+ return ERROR_OK;
+
+ uint16_t insn;
+ int retval = target_read_u16(target, pc, &insn);
+ if (retval != ERROR_OK)
+ return ERROR_OK; /* do not propagate the error, just avoid workaround */
+
+ if ((insn & 0xff00) == (ARMV5_T_BKPT(0) & 0xff00)) {
+ LOG_TARGET_DEBUG(target, "Erratum 3092511: breakpoint embedded in code confirmed");
+ return ERROR_OK;
+ }
+ LOG_TARGET_DEBUG(target, "Erratum 3092511: breakpoint not found, proceed with resume");
+ return ERROR_TARGET_HALTED_DO_RESUME;
+}
+
static int cortex_m_debug_entry(struct target *target)
{
uint32_t xpsr;
@@ -883,6 +919,17 @@ static int cortex_m_debug_entry(struct target *target)
secure_state ? "Secure" : "Non-Secure",
target_state_name(target));
+ /* Errata 3092511 workaround
+ * Cortex-M7 can halt in an incorrect address when breakpoint
+ * and exception occurs simultaneously */
+ if (cortex_m->incorrect_halt_erratum
+ && armv7m->exception_number
+ && cortex_m->nvic_dfsr == (DFSR_BKPT | DFSR_HALTED)) {
+ retval = cortex_m_erratum_check_breakpoint(target);
+ if (retval != ERROR_OK)
+ return retval;
+ }
+
if (armv7m->post_debug_entry) {
retval = armv7m->post_debug_entry(target);
if (retval != ERROR_OK)
@@ -960,6 +1007,28 @@ static int cortex_m_poll_one(struct target *target)
if ((prev_target_state == TARGET_RUNNING) || (prev_target_state == TARGET_RESET)) {
retval = cortex_m_debug_entry(target);
+ /* Errata 3092511 workaround
+ * Cortex-M7 can halt in an incorrect address when breakpoint
+ * and exception occurs simultaneously */
+ if (retval == ERROR_TARGET_HALTED_DO_RESUME) {
+ struct arm *arm = &armv7m->arm;
+ LOG_TARGET_INFO(target, "Resuming after incorrect halt @ PC 0x%08" PRIx32
+ ", ARM Cortex-M7 erratum 3092511",
+ buf_get_u32(arm->pc->value, 0, 32));
+ /* We don't need to restore registers, just restart the core */
+ cortex_m_set_maskints_for_run(target);
+ retval = cortex_m_write_debug_halt_mask(target, 0, C_HALT);
+ if (retval != ERROR_OK)
+ return retval;
+
+ target->debug_reason = DBG_REASON_NOTHALTED;
+ /* registers are now invalid */
+ register_cache_invalidate(armv7m->arm.core_cache);
+
+ target->state = TARGET_RUNNING;
+ return ERROR_OK;
+ }
+
/* arm_semihosting needs to know registers, don't run if debug entry returned error */
if (retval == ERROR_OK && arm_semihosting(target, &retval) != 0)
return retval;
@@ -1582,7 +1651,7 @@ static int cortex_m_step(struct target *target, int current,
cortex_m->dcb_dhcsr, cortex_m->nvic_icsr);
retval = cortex_m_debug_entry(target);
- if (retval != ERROR_OK)
+ if (retval != ERROR_OK && retval != ERROR_TARGET_HALTED_DO_RESUME)
return retval;
target_call_event_callbacks(target, TARGET_EVENT_HALTED);
@@ -2560,14 +2629,22 @@ int cortex_m_examine(struct target *target)
(uint8_t)((cpuid >> 0) & 0xf));
cortex_m->maskints_erratum = false;
+ cortex_m->incorrect_halt_erratum = false;
if (impl_part == CORTEX_M7_PARTNO) {
uint8_t rev, patch;
rev = (cpuid >> 20) & 0xf;
patch = (cpuid >> 0) & 0xf;
if ((rev == 0) && (patch < 2)) {
- LOG_TARGET_WARNING(target, "Silicon bug: single stepping may enter pending exception handler!");
+ LOG_TARGET_WARNING(target, "Erratum 702596: single stepping may enter pending exception handler!");
cortex_m->maskints_erratum = true;
}
+ /* TODO: add revision check when a Cortex-M7 revision with fixed 3092511 is out */
+ LOG_TARGET_WARNING(target, "Erratum 3092511: Cortex-M7 can halt in an incorrect address when breakpoint and exception occurs simultaneously");
+ cortex_m->incorrect_halt_erratum = true;
+ if (armv7m->is_hla_target)
+ LOG_WARNING("No erratum 3092511 workaround on hla adapter");
+ else
+ LOG_INFO("The erratum 3092511 workaround will resume after an incorrect halt");
}
LOG_TARGET_DEBUG(target, "cpuid: 0x%8.8" PRIx32 "", cpuid);
diff --git a/src/target/cortex_m.h b/src/target/cortex_m.h
index a585b786b..eb646e472 100644
--- a/src/target/cortex_m.h
+++ b/src/target/cortex_m.h
@@ -256,6 +256,10 @@ struct cortex_m_common {
/* Whether this target has the erratum that makes C_MASKINTS not apply to
* already pending interrupts */
bool maskints_erratum;
+
+ /* Errata 3092511 Cortex-M7 can halt in an incorrect address when breakpoint
+ * and exception occurs simultaneously */
+ bool incorrect_halt_erratum;
};
static inline bool is_cortex_m_or_hla(const struct cortex_m_common *cortex_m)
diff --git a/src/target/target.h b/src/target/target.h
index d5c0e0e8c..03db3950c 100644
--- a/src/target/target.h
+++ b/src/target/target.h
@@ -799,6 +799,7 @@ int target_profiling_default(struct target *target, uint32_t *samples, uint32_t
#define ERROR_TARGET_ALGO_EXIT (-313)
#define ERROR_TARGET_SIZE_NOT_SUPPORTED (-314)
#define ERROR_TARGET_PACKING_NOT_SUPPORTED (-315)
+#define ERROR_TARGET_HALTED_DO_RESUME (-316) /* used to workaround incorrect debug halt */
extern bool get_target_reset_nag(void);
-----------------------------------------------------------------------
Summary of changes:
src/target/cortex_m.c | 81 +++++++++++++++++++++++++++++++++++++++++++++++++--
src/target/cortex_m.h | 4 +++
src/target/target.h | 1 +
3 files changed, 84 insertions(+), 2 deletions(-)
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