openocd-commit — OpenOCD commit maling list - read only

[Openocd-svn] r1403 - trunk/src/target/interface

[<du...@ma...>]

Author: duane
Date: 2009-03-08 21:29:54 +0100 (Sun, 08 Mar 2009)
New Revision: 1403

Modified:
   trunk/src/target/interface/olimex-jtag-tiny-a.cfg
Log:
Added VID/PID pair to olimex-jtag-tiny-a the non-a version already has the vid pid

Modified: trunk/src/target/interface/olimex-jtag-tiny-a.cfg
===================================================================
--- trunk/src/target/interface/olimex-jtag-tiny-a.cfg	2009-03-08 15:14:18 UTC (rev 1402)
+++ trunk/src/target/interface/olimex-jtag-tiny-a.cfg	2009-03-08 20:29:54 UTC (rev 1403)
@@ -2,3 +2,4 @@
 interface ft2232
 ft2232_device_desc "Olimex OpenOCD JTAG TINY A"
 ft2232_layout olimex-jtag
+ft2232_vid_pid 0x15ba 0x0004

[Openocd-svn] r1402 - in trunk: . contrib doc src/jtag src/target/interface

[<du...@ma...>]

Author: duane
Date: 2009-03-08 16:14:18 +0100 (Sun, 08 Mar 2009)
New Revision: 1402

Added:
   trunk/src/jtag/arm-jtag-ew.c
   trunk/src/target/interface/arm-jtag-ew.cfg
Modified:
   trunk/configure.in
   trunk/contrib/openocd.udev
   trunk/doc/openocd.texi
   trunk/src/jtag/Makefile.am
   trunk/src/jtag/jtag.c
Log:
Patch from Dimitar Dimitrov adding support for Olimex ARM-JTAG-EW

Modified: trunk/configure.in
===================================================================
--- trunk/configure.in	2009-03-07 15:51:26 UTC (rev 1401)
+++ trunk/configure.in	2009-03-08 15:14:18 UTC (rev 1402)
@@ -273,6 +273,10 @@
   AS_HELP_STRING([--enable-rlink], [Enable building support for the Raisonance RLink JTAG Programmer]),
   [build_rlink=$enableval], [build_rlink=no])
 
+AC_ARG_ENABLE(arm-jtag-ew,
+  AS_HELP_STRING([--enable-arm-jtag-ew], [Enable building support for the Olimex ARM-JTAG-EW Programmer]),
+  [build_armjtagew=$enableval], [build_armjtagew=no])
+
 case $host in 
   *-cygwin*) 
     is_win32=yes
@@ -448,6 +452,12 @@
   AC_DEFINE(BUILD_RLINK, 0, [0 if you don't want the RLink JTAG driver.])
 fi
 
+if test $build_armjtagew = yes; then
+  AC_DEFINE(BUILD_ARMJTAGEW, 1, [1 if you want the ARM-JTAG-EW JTAG driver.])
+else
+  AC_DEFINE(BUILD_ARMJTAGEW, 0, [0 if you don't want the ARM-JTAG-EW JTAG driver.])
+fi
+
 #-- Deal with MingW/Cygwin FTD2XX issues
 
 if test $is_win32 = yes; then
@@ -661,6 +671,7 @@
 AM_CONDITIONAL(JLINK, test $build_jlink = yes)
 AM_CONDITIONAL(VSLLINK, test $build_vsllink = yes)
 AM_CONDITIONAL(RLINK, test $build_rlink = yes)
+AM_CONDITIONAL(ARMJTAGEW, test $build_armjtagew = yes)
 AM_CONDITIONAL(IS_CYGWIN, test $is_cygwin = yes)
 AM_CONDITIONAL(IS_MINGW, test $is_mingw = yes)
 AM_CONDITIONAL(IS_WIN32, test $is_win32 = yes)

Modified: trunk/contrib/openocd.udev
===================================================================
--- trunk/contrib/openocd.udev	2009-03-07 15:51:26 UTC (rev 1401)
+++ trunk/contrib/openocd.udev	2009-03-08 15:14:18 UTC (rev 1402)
@@ -21,5 +21,8 @@
 # Raisonance RLink
 SYSFS{idVendor}=="138e", SYSFS{idProduct}=="9000", MODE="664", GROUP="plugdev"
 
+# Olimex ARM-JTAG-EW
+SYSFS{idVendor}=="15ba", SYSFS{idProduct}=="001e", MODE="664", GROUP="plugdev"
+
 LABEL="openocd_rules_end"
 

Modified: trunk/doc/openocd.texi
===================================================================
--- trunk/doc/openocd.texi	2009-03-07 15:51:26 UTC (rev 1401)
+++ trunk/doc/openocd.texi	2009-03-08 15:14:18 UTC (rev 1402)
@@ -265,6 +265,8 @@
 @option{--enable-vsllink}
 @item
 @option{--enable-rlink} - Raisonance.com dongle.
+@item
+@option{--enable-arm-jtag-ew} - Olimex ARM-JTAG-EW dongle.
 @end itemize
 
 @section Parallel Port Dongles
@@ -445,6 +447,9 @@
 
 @item @b{Versaloon-Link}
 @* Link: @url{http://www.simonqian.com/en/Versaloon}
+
+@item @b{ARM-JTAG-EW}
+@* Link: @url{http://www.olimex.com/dev/arm-jtag-ew.html}
 @end itemize
 
 @section IBM PC Parallel Printer Port Based
@@ -1144,6 +1149,10 @@
 parport_cable wiggler
 jtag_speed 0
 @end verbatim
+@b{ARM-JTAG-EW}
+@verbatim
+interface arm-jtag-ew
+@end verbatim
 @section Interface Conmmand
 
 The interface command tells OpenOCD what type of jtag dongle you are
@@ -1192,6 +1201,9 @@
 
 @item @b{vsllink}
 @* vsllink is part of Versaloon which is a versatile USB programmer.
+
+@item @b{arm-jtag-ew}
+@* Olimex ARM-JTAG-EW usb adapter
 @comment - End parameters
 @end itemize
 @comment - End Interface

Modified: trunk/src/jtag/Makefile.am
===================================================================
--- trunk/src/jtag/Makefile.am	2009-03-07 15:51:26 UTC (rev 1401)
+++ trunk/src/jtag/Makefile.am	2009-03-08 15:14:18 UTC (rev 1402)
@@ -102,8 +102,14 @@
 VSLLINKFILES =
 endif
 
+if ARMJTAGEW
+ARMJTAGEWFILES = arm-jtag-ew.c
+else
+ARMJTAGEWFILES =
+endif
+
 libjtag_a_SOURCES = jtag.c $(BITBANGFILES) $(PARPORTFILES) $(DUMMYFILES) $(FT2232FILES) $(AMTJTAGACCELFILES) $(EP93XXFILES) \
-	$(AT91RM9200FILES) $(GW16012FILES) $(BITQFILES) $(PRESTOFILES) $(USBPROGFILES) $(ECOSBOARDFILES) $(JLINKFILES) $(RLINKFILES) $(VSLLINKFILES)
+	$(AT91RM9200FILES) $(GW16012FILES) $(BITQFILES) $(PRESTOFILES) $(USBPROGFILES) $(ECOSBOARDFILES) $(JLINKFILES) $(RLINKFILES) $(VSLLINKFILES) $(ARMJTAGEWFILES)
 
 noinst_HEADERS = bitbang.h jtag.h bitq.h rlink/dtc_cmd.h rlink/ep1_cmd.h rlink/rlink.h rlink/st7.h
 

Added: trunk/src/jtag/arm-jtag-ew.c
===================================================================
--- trunk/src/jtag/arm-jtag-ew.c	2009-03-07 15:51:26 UTC (rev 1401)
+++ trunk/src/jtag/arm-jtag-ew.c	2009-03-08 15:14:18 UTC (rev 1402)
@@ -0,0 +1,903 @@
+// vim:ts=4 sw=4: 
+
+/***************************************************************************
+ *   Copyright (C) 2009 by Dimitar Dimitrov <di...@gm...>            *
+ *   based on Dominic Rath's and Benedikt Sauter's usbprog.c               *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ *                                                                         *
+ *   This program is distributed in the hope that it will be useful,       *
+ *   but WITHOUT ANY WARRANTY; without even the implied warranty of        *
+ *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
+ *   GNU General Public License for more details.                          *
+ *                                                                         *
+ *   You should have received a copy of the GNU General Public License     *
+ *   along with this program; if not, write to the                         *
+ *   Free Software Foundation, Inc.,                                       *
+ *   59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.             *
+ ***************************************************************************/
+
+#ifdef HAVE_CONFIG_H
+#include "config.h"
+#endif
+
+#include "replacements.h"
+
+#include "jtag.h"
+#include <usb.h>
+#include <string.h>
+#include <ctype.h>
+
+/* system includes */
+
+#include "log.h"
+
+/* enable this to debug communication
+ */
+#if 1
+#define _DEBUG_USB_COMMS_
+#define _DEBUG_JTAG_IO_
+#endif
+
+#ifdef _DEBUG_JTAG_IO_
+#define DEBUG_JTAG_IO(expr ...)	LOG_DEBUG(expr)
+#else
+#define DEBUG_JTAG_IO(expr ...)
+#endif
+
+#define USB_VID						0x15ba
+#define USB_PID						0x001e
+
+#define ARMJTAGEW_EPT_BULK_OUT		0x01u
+#define ARMJTAGEW_EPT_BULK_IN		0x82u
+
+#define ARMJTAGEW_USB_TIMEOUT		2000
+
+#define ARMJTAGEW_IN_BUFFER_SIZE	(4*1024)
+#define ARMJTAGEW_OUT_BUFFER_SIZE	(4*1024)
+
+
+/* USB command request codes. */
+#define CMD_GET_VERSION				0x00
+#define CMD_SELECT_DPIMPL			0x10
+#define CMD_SET_TCK_FREQUENCY		0x11
+#define CMD_GET_TCK_FREQUENCY		0x12
+#define CMD_MEASURE_MAX_TCK_FREQ	0x15
+#define CMD_MEASURE_RTCK_RESPONSE	0x16
+#define CMD_TAP_SHIFT				0x17
+#define CMD_SET_TAPHW_STATE			0x20
+#define CMD_GET_TAPHW_STATE			0x21
+#define CMD_TGPWR_SETUP				0x22
+
+/* Global USB buffers */
+static u8 usb_in_buffer[ARMJTAGEW_IN_BUFFER_SIZE];
+static u8 usb_out_buffer[ARMJTAGEW_OUT_BUFFER_SIZE];
+
+/* External interface functions */
+int armjtagew_execute_queue(void);
+int armjtagew_speed(int speed);
+int armjtagew_khz(int khz, int *jtag_speed);
+int armjtagew_register_commands(struct command_context_s *cmd_ctx);
+int armjtagew_init(void);
+int armjtagew_quit(void);
+
+/* CLI command handler functions */
+int armjtagew_handle_armjtagew_info_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
+
+/* Queue command functions */
+void armjtagew_end_state(tap_state_t state);
+void armjtagew_state_move(void);
+void armjtagew_path_move(int num_states, tap_state_t *path);
+void armjtagew_runtest(int num_cycles);
+void armjtagew_scan(int ir_scan, enum scan_type type, u8 *buffer, int scan_size, scan_command_t *command);
+void armjtagew_reset(int trst, int srst);
+void armjtagew_simple_command(u8 command);
+int armjtagew_get_status(void);
+
+/* tap buffer functions */
+void armjtagew_tap_init(void);
+int armjtagew_tap_execute(void);
+void armjtagew_tap_ensure_space(int scans, int bits);
+void armjtagew_tap_append_step(int tms, int tdi);
+void armjtagew_tap_append_scan(int length, u8 *buffer, scan_command_t *command);
+
+/* ARM-JTAG-EW lowlevel functions */
+typedef struct armjtagew_jtag
+{
+	struct usb_dev_handle* usb_handle;
+} armjtagew_jtag_t;
+
+armjtagew_jtag_t *armjtagew_usb_open(void);
+void armjtagew_usb_close(armjtagew_jtag_t *armjtagew_jtag);
+int armjtagew_usb_message(armjtagew_jtag_t *armjtagew_jtag, int out_length, int in_length);
+int armjtagew_usb_write(armjtagew_jtag_t *armjtagew_jtag, int out_length);
+int armjtagew_usb_read(armjtagew_jtag_t *armjtagew_jtag, int exp_in_length);
+
+/* helper functions */
+int armjtagew_get_version_info(void);
+
+#ifdef _DEBUG_USB_COMMS_
+void armjtagew_debug_buffer(u8 *buffer, int length);
+#endif
+
+armjtagew_jtag_t* armjtagew_jtag_handle;
+
+
+
+/***************************************************************************/
+/* External interface implementation */
+
+jtag_interface_t armjtagew_interface =
+{
+	.name = "arm-jtag-ew",
+	.execute_queue = armjtagew_execute_queue,
+	.speed = armjtagew_speed,
+	.khz = armjtagew_khz,
+	.register_commands = armjtagew_register_commands,
+	.init = armjtagew_init,
+	.quit = armjtagew_quit
+};
+
+
+int armjtagew_execute_queue(void)
+{
+	jtag_command_t *cmd = jtag_command_queue;
+	int scan_size;
+	enum scan_type type;
+	u8 *buffer;
+
+	while (cmd != NULL)
+	{
+		switch (cmd->type)
+		{
+			case JTAG_END_STATE:
+				DEBUG_JTAG_IO("end_state: %i", cmd->cmd.end_state->end_state);
+
+				if (cmd->cmd.end_state->end_state != -1)
+				{
+					armjtagew_end_state(cmd->cmd.end_state->end_state);
+				}
+				break;
+
+			case JTAG_RUNTEST:
+				DEBUG_JTAG_IO( "runtest %i cycles, end in %i", cmd->cmd.runtest->num_cycles, \
+					cmd->cmd.runtest->end_state);
+
+				if (cmd->cmd.runtest->end_state != -1)
+				{
+					armjtagew_end_state(cmd->cmd.runtest->end_state);
+				}
+				armjtagew_runtest(cmd->cmd.runtest->num_cycles);
+				break;
+
+			case JTAG_STATEMOVE:
+				DEBUG_JTAG_IO("statemove end in %i", cmd->cmd.statemove->end_state);
+
+				if (cmd->cmd.statemove->end_state != -1)
+				{
+					armjtagew_end_state(cmd->cmd.statemove->end_state);
+				}
+				armjtagew_state_move();
+				break;
+
+			case JTAG_PATHMOVE:
+				DEBUG_JTAG_IO("pathmove: %i states, end in %i", \
+					cmd->cmd.pathmove->num_states, \
+					cmd->cmd.pathmove->path[cmd->cmd.pathmove->num_states - 1]);
+
+				armjtagew_path_move(cmd->cmd.pathmove->num_states, cmd->cmd.pathmove->path);
+				break;
+
+			case JTAG_SCAN:
+				DEBUG_JTAG_IO("scan end in %i", cmd->cmd.scan->end_state);
+
+				if (cmd->cmd.scan->end_state != -1)
+				{
+					armjtagew_end_state(cmd->cmd.scan->end_state);
+				}
+
+				scan_size = jtag_build_buffer(cmd->cmd.scan, &buffer);
+				DEBUG_JTAG_IO("scan input, length = %d", scan_size);
+
+#ifdef _DEBUG_USB_COMMS_
+				armjtagew_debug_buffer(buffer, (scan_size + 7) / 8);
+#endif
+				type = jtag_scan_type(cmd->cmd.scan);
+				armjtagew_scan(cmd->cmd.scan->ir_scan, type, buffer, scan_size, cmd->cmd.scan);
+				break;
+
+			case JTAG_RESET:
+				DEBUG_JTAG_IO("reset trst: %i srst %i", cmd->cmd.reset->trst, cmd->cmd.reset->srst);
+
+				armjtagew_tap_execute();
+
+				if (cmd->cmd.reset->trst == 1)
+				{
+					tap_set_state(TAP_RESET);
+				}
+				armjtagew_reset(cmd->cmd.reset->trst, cmd->cmd.reset->srst);
+				break;
+
+			case JTAG_SLEEP:
+				DEBUG_JTAG_IO("sleep %i", cmd->cmd.sleep->us);
+				armjtagew_tap_execute();
+				jtag_sleep(cmd->cmd.sleep->us);
+				break;
+
+			default:
+				LOG_ERROR("BUG: unknown JTAG command type encountered");
+				exit(-1);
+		}
+		cmd = cmd->next;
+	}
+
+	return armjtagew_tap_execute();
+}
+
+
+/* Sets speed in kHz. */
+int armjtagew_speed(int speed)
+{
+    int result;
+    int speed_real;
+
+
+    usb_out_buffer[0] = CMD_SET_TCK_FREQUENCY;
+	buf_set_u32(usb_out_buffer+1, 0, 32, speed);
+
+    result = armjtagew_usb_message(armjtagew_jtag_handle, 4, 4);
+
+    if (result < 0)
+    {
+        LOG_ERROR("ARM-JTAG-EW setting speed failed (%d)", result);
+        return ERROR_JTAG_DEVICE_ERROR;
+    }
+
+	usb_out_buffer[0] = CMD_GET_TCK_FREQUENCY;
+    result = armjtagew_usb_message(armjtagew_jtag_handle, 1, 4);
+	speed_real = (int)buf_get_u32(usb_in_buffer,0,32);
+	if(result < 0) 
+	{
+        LOG_ERROR("ARM-JTAG-EW getting speed failed (%d)", result);
+        return ERROR_JTAG_DEVICE_ERROR;
+	} 
+	else
+	{
+    	LOG_INFO("Requested speed %dkHz, emulator reported %dkHz.", speed, speed_real);
+	}
+
+    return ERROR_OK;
+}
+
+
+int armjtagew_khz(int khz, int *jtag_speed)
+{
+	*jtag_speed = khz;
+
+	return ERROR_OK;
+}
+
+int armjtagew_register_commands(struct command_context_s *cmd_ctx)
+{
+	register_command(cmd_ctx, NULL, "armjtagew_info", armjtagew_handle_armjtagew_info_command, COMMAND_EXEC,
+		"query armjtagew info");
+	return ERROR_OK;
+}
+
+int armjtagew_init(void)
+{
+	int check_cnt;
+
+	armjtagew_jtag_handle = armjtagew_usb_open();
+
+	if (armjtagew_jtag_handle == 0)
+	{
+		LOG_ERROR("Cannot find ARM-JTAG-EW Interface! Please check connection and permissions.");
+		return ERROR_JTAG_INIT_FAILED;
+	}
+
+	check_cnt = 0;
+	while (check_cnt < 3)
+	{
+		if (armjtagew_get_version_info() == ERROR_OK)
+		{
+			/* attempt to get status */
+			armjtagew_get_status();
+			break;
+		}
+
+		check_cnt++;
+	}
+
+	if (check_cnt == 3)
+	{
+		LOG_INFO("ARM-JTAG-EW initial read failed, don't worry");
+	}
+
+	LOG_INFO("ARM-JTAG-EW JTAG Interface ready");
+
+	armjtagew_reset(0, 0);
+	armjtagew_tap_init();
+
+	return ERROR_OK;
+}
+
+int armjtagew_quit(void)
+{
+	armjtagew_usb_close(armjtagew_jtag_handle);
+	return ERROR_OK;
+}
+
+/***************************************************************************/
+/* Queue command implementations */
+
+void armjtagew_end_state(tap_state_t state)
+{
+	if (tap_is_state_stable(state))
+	{
+		tap_set_end_state(state);
+	}
+	else
+	{
+		LOG_ERROR("BUG: %i is not a valid end state", state);
+		exit(-1);
+	}
+}
+
+/* Goes to the end state. */
+void armjtagew_state_move(void)
+{
+	int i;
+	int tms = 0;
+	u8 tms_scan = tap_get_tms_path(tap_get_state(), tap_get_end_state());
+
+	for (i = 0; i < 7; i++)
+	{
+		tms = (tms_scan >> i) & 1;
+		armjtagew_tap_append_step(tms, 0);
+	}
+
+	tap_set_state(tap_get_end_state());
+}
+
+void armjtagew_path_move(int num_states, tap_state_t *path)
+{
+	int i;
+
+	for (i = 0; i < num_states; i++)
+	{
+		/*
+		 * TODO: The ARM-JTAG-EW hardware delays TDI with 3 TCK cycles when in RTCK mode. 
+		 * Either handle that here, or update the documentation with examples
+		 * how to fix that in the configuration files.
+		 */
+		if (path[i] == tap_state_transition(tap_get_state(), false))
+		{
+			armjtagew_tap_append_step(0, 0);
+		}
+		else if (path[i] == tap_state_transition(tap_get_state(), true))
+		{
+			armjtagew_tap_append_step(1, 0);
+		}
+		else
+		{
+			LOG_ERROR("BUG: %s -> %s isn't a valid TAP transition", tap_state_name(tap_get_state()), tap_state_name(path[i]));
+			exit(-1);
+		}
+
+		tap_set_state(path[i]);
+	}
+
+	tap_set_end_state(tap_get_state());
+}
+
+void armjtagew_runtest(int num_cycles)
+{
+	int i;
+
+	tap_state_t saved_end_state = tap_get_end_state();
+
+	/* only do a state_move when we're not already in IDLE */
+	if (tap_get_state() != TAP_IDLE)
+	{
+		armjtagew_end_state(TAP_IDLE);
+		armjtagew_state_move();
+	}
+
+	/* execute num_cycles */
+	for (i = 0; i < num_cycles; i++)
+	{
+		armjtagew_tap_append_step(0, 0);
+	}
+
+	/* finish in end_state */
+	armjtagew_end_state(saved_end_state);
+	if (tap_get_state() != tap_get_end_state())
+	{
+		armjtagew_state_move();
+	}
+}
+
+void armjtagew_scan(int ir_scan, enum scan_type type, u8 *buffer, int scan_size, scan_command_t *command)
+{
+	tap_state_t saved_end_state;
+
+	armjtagew_tap_ensure_space(1, scan_size + 8);
+
+	saved_end_state = tap_get_end_state();
+
+	/* Move to appropriate scan state */
+	armjtagew_end_state(ir_scan ? TAP_IRSHIFT : TAP_DRSHIFT);
+
+	armjtagew_state_move();
+	armjtagew_end_state(saved_end_state);
+
+	/* Scan */
+	armjtagew_tap_append_scan(scan_size, buffer, command);
+
+	/* We are in Exit1, go to Pause */
+	armjtagew_tap_append_step(0, 0);
+
+	tap_set_state(ir_scan ? TAP_IRPAUSE : TAP_DRPAUSE);
+
+	if (tap_get_state() != tap_get_end_state())
+	{
+		armjtagew_state_move();
+	}
+}
+
+void armjtagew_reset(int trst, int srst)
+{
+	const u8 trst_mask = (1u<<5);
+	const u8 srst_mask = (1u<<6);
+	u8 val = 0;
+	u8 outp_en = 0;
+	u8 change_mask = 0;
+	int result;
+
+	LOG_DEBUG("trst: %i, srst: %i", trst, srst);
+
+	if (srst == 0)
+	{
+		val |= srst_mask;
+		outp_en &= ~srst_mask;		/* tristate */
+		change_mask |= srst_mask;
+	}
+	else if (srst == 1)
+	{
+		val &= ~srst_mask;
+		outp_en |= srst_mask;
+		change_mask |= srst_mask;
+	}
+
+	if (trst == 0)
+	{
+		val |= trst_mask;
+		outp_en &= ~trst_mask;		/* tristate */
+		change_mask |= trst_mask;
+	}
+	else if (trst == 1)
+	{
+		val &= ~trst_mask;
+		outp_en |= trst_mask;
+		change_mask |= trst_mask;
+	}
+
+	usb_out_buffer[0] = CMD_SET_TAPHW_STATE;
+	usb_out_buffer[1] = val;
+	usb_out_buffer[2] = outp_en;
+	usb_out_buffer[3] = change_mask;
+	result = armjtagew_usb_write(armjtagew_jtag_handle, 4);
+	if (result != 4)
+	{
+		LOG_ERROR("ARM-JTAG-EW TRST/SRST pin set failed failed (%d)", result);
+	}
+}
+
+
+int armjtagew_get_status(void)
+{
+	int result;
+
+	usb_out_buffer[0] = CMD_GET_TAPHW_STATE;
+	result = armjtagew_usb_message(armjtagew_jtag_handle, 1, 12);
+
+	if (result == 0)
+	{
+		unsigned int u_tg = buf_get_u32(usb_in_buffer, 0, 16);
+		LOG_INFO("U_tg = %d mV, U_aux = %d mV, U_tgpwr = %d mV, I_tgpwr = %d mA, D1 = %d, Target power %s %s\n", \
+			buf_get_u32(usb_in_buffer + 0, 0, 16), \
+			buf_get_u32(usb_in_buffer + 2, 0, 16), \
+			buf_get_u32(usb_in_buffer + 4, 0, 16), \
+			buf_get_u32(usb_in_buffer + 6, 0, 16), \
+			usb_in_buffer[9], \
+			usb_in_buffer[11] ? "OVERCURRENT" : "OK", \
+			usb_in_buffer[10] ? "enabled" : "disabled");
+
+		if (u_tg < 1500)
+		{
+			LOG_ERROR("Vref too low. Check Target Power\n");
+		}
+	}
+	else
+	{
+		LOG_ERROR("ARM-JTAG-EW command CMD_GET_TAPHW_STATE failed (%d)\n", result);
+	}
+
+	return ERROR_OK;
+}
+
+int armjtagew_get_version_info(void)
+{
+	int result;
+	char sn[16];
+	char auxinfo[257];
+
+	/* query hardware version */
+	usb_out_buffer[0] = CMD_GET_VERSION;
+	result = armjtagew_usb_message(armjtagew_jtag_handle, 1, 4+15+256);
+
+	if (result != 0) 
+	{
+		LOG_ERROR("ARM-JTAG-EW command CMD_GET_VERSION failed (%d)\n", result);
+		return ERROR_JTAG_DEVICE_ERROR;
+	}
+
+
+	memcpy(sn, usb_in_buffer+4, 15);
+	sn[15] = '\0';
+	memcpy(auxinfo, usb_in_buffer+4+15, 256);
+	auxinfo[256] = '\0';
+
+	LOG_INFO("ARM-JTAG-EW firmware version %d.%d, hardware revision %c, SN=%s, Additional info: %s", \
+			usb_in_buffer[1], usb_in_buffer[0], \
+			isgraph(usb_in_buffer[2]) ? usb_in_buffer[2] : 'X', \
+			sn, auxinfo);
+	return ERROR_OK;
+}
+
+int armjtagew_handle_armjtagew_info_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
+{
+	if (armjtagew_get_version_info() == ERROR_OK)
+	{
+		/* attempt to get status */
+		armjtagew_get_status();
+	}
+
+	return ERROR_OK;
+}
+
+/***************************************************************************/
+/* ARM-JTAG-EW tap functions */
+
+/* 2048 is the max value we can use here */
+#define ARMJTAGEW_TAP_BUFFER_SIZE 2048
+
+static int tap_length;
+static u8 tms_buffer[ARMJTAGEW_TAP_BUFFER_SIZE];
+static u8 tdi_buffer[ARMJTAGEW_TAP_BUFFER_SIZE];
+static u8 tdo_buffer[ARMJTAGEW_TAP_BUFFER_SIZE];
+
+typedef struct
+{
+	int first;	/* First bit position in tdo_buffer to read */
+	int length; /* Number of bits to read */
+	scan_command_t *command; /* Corresponding scan command */
+	u8 *buffer;
+} pending_scan_result_t;
+
+#define MAX_PENDING_SCAN_RESULTS 256
+
+static int pending_scan_results_length;
+static pending_scan_result_t pending_scan_results_buffer[MAX_PENDING_SCAN_RESULTS];
+
+static int last_tms;
+
+void armjtagew_tap_init(void)
+{
+	tap_length = 0;
+	pending_scan_results_length = 0;
+}
+
+void armjtagew_tap_ensure_space(int scans, int bits)
+{
+	int available_scans = MAX_PENDING_SCAN_RESULTS - pending_scan_results_length;
+	int available_bits = ARMJTAGEW_TAP_BUFFER_SIZE * 8 - tap_length;
+
+	if (scans > available_scans || bits > available_bits)
+	{
+		armjtagew_tap_execute();
+	}
+}
+
+void armjtagew_tap_append_step(int tms, int tdi)
+{
+	last_tms = tms;
+	int index = tap_length / 8;
+
+	if (index < ARMJTAGEW_TAP_BUFFER_SIZE)
+	{
+		int bit_index = tap_length % 8;
+		u8 bit = 1 << bit_index;
+
+		if (tms)
+		{
+			tms_buffer[index] |= bit;
+		}
+		else
+		{
+			tms_buffer[index] &= ~bit;
+		}
+
+		if (tdi)
+		{
+			tdi_buffer[index] |= bit;
+		}
+		else
+		{
+			tdi_buffer[index] &= ~bit;
+		}
+
+		tap_length++;
+	}
+	else
+	{
+		LOG_ERROR("armjtagew_tap_append_step, overflow");
+	}
+}
+
+void armjtagew_tap_append_scan(int length, u8 *buffer, scan_command_t *command)
+{
+	pending_scan_result_t *pending_scan_result = &pending_scan_results_buffer[pending_scan_results_length];
+	int i;
+
+	pending_scan_result->first = tap_length;
+	pending_scan_result->length = length;
+	pending_scan_result->command = command;
+	pending_scan_result->buffer = buffer;
+
+	for (i = 0; i < length; i++)
+	{
+		armjtagew_tap_append_step((i < length-1 ? 0 : 1), (buffer[i/8] >> (i%8)) & 1);
+	}
+	pending_scan_results_length++;
+}
+
+/* Pad and send a tap sequence to the device, and receive the answer.
+ * For the purpose of padding we assume that we are in idle or pause state. */
+int armjtagew_tap_execute(void)
+{
+	int byte_length;
+	int tms_offset;
+	int tdi_offset;
+	int i;
+	int result;
+
+	if (tap_length > 0)
+	{
+		/* Pad last byte so that tap_length is divisible by 8 */
+		while (tap_length % 8 != 0)
+		{
+			/* More of the last TMS value keeps us in the same state,
+			 * analogous to free-running JTAG interfaces. */
+			armjtagew_tap_append_step(last_tms, 0);
+		}
+
+		byte_length = tap_length / 8;
+
+		usb_out_buffer[0] = CMD_TAP_SHIFT;
+		buf_set_u32(usb_out_buffer+1, 0, 16, byte_length);
+
+		tms_offset = 3;
+		for (i = 0; i < byte_length; i++)
+		{
+			usb_out_buffer[tms_offset + i] = flip_u32(tms_buffer[i],8);
+		}
+
+		tdi_offset = tms_offset + byte_length;
+		for (i = 0; i < byte_length; i++)
+		{
+			usb_out_buffer[tdi_offset + i] = flip_u32(tdi_buffer[i],8);
+		}
+
+		result = armjtagew_usb_message(armjtagew_jtag_handle, 3 + 2 * byte_length, byte_length + 4);
+
+		if (result == 0)
+		{
+			int stat;
+
+			stat = (int)buf_get_u32(usb_in_buffer + byte_length, 0, 32);
+			if(stat) {
+				LOG_ERROR("armjtagew_tap_execute, emulator returned error code %d for a CMD_TAP_SHIFT command", stat);
+				return ERROR_JTAG_QUEUE_FAILED;
+			}
+
+			for (i = 0; i < byte_length; i++)
+			{
+				tdo_buffer[i] = flip_u32(usb_in_buffer[i],8);
+			}
+
+			for (i = 0; i < pending_scan_results_length; i++)
+			{
+				pending_scan_result_t *pending_scan_result = &pending_scan_results_buffer[i];
+				u8 *buffer = pending_scan_result->buffer;
+				int length = pending_scan_result->length;
+				int first = pending_scan_result->first;
+				scan_command_t *command = pending_scan_result->command;
+
+				/* Copy to buffer */
+				buf_set_buf(tdo_buffer, first, buffer, 0, length);
+
+				DEBUG_JTAG_IO("pending scan result, length = %d", length);
+
+#ifdef _DEBUG_USB_COMMS_
+				armjtagew_debug_buffer(buffer, byte_length);
+#endif
+
+				if (jtag_read_buffer(buffer, command) != ERROR_OK)
+				{
+					armjtagew_tap_init();
+					return ERROR_JTAG_QUEUE_FAILED;
+				}
+
+				if (pending_scan_result->buffer != NULL)
+				{
+					free(pending_scan_result->buffer);
+				}
+			}
+		}
+		else
+		{
+			LOG_ERROR("armjtagew_tap_execute, wrong result %d, expected %d", result, byte_length);
+			return ERROR_JTAG_QUEUE_FAILED;
+		}
+
+		armjtagew_tap_init();
+	}
+
+	return ERROR_OK;
+}
+
+/*****************************************************************************/
+/* JLink USB low-level functions */
+
+armjtagew_jtag_t* armjtagew_usb_open()
+{
+	struct usb_bus *busses;
+	struct usb_bus *bus;
+	struct usb_device *dev;
+
+	armjtagew_jtag_t *result;
+
+	result = (armjtagew_jtag_t*) malloc(sizeof(armjtagew_jtag_t));
+
+	usb_init();
+	usb_find_busses();
+	usb_find_devices();
+
+	busses = usb_get_busses();
+
+	/* find armjtagew_jtag device in usb bus */
+
+	for (bus = busses; bus; bus = bus->next)
+	{
+		for (dev = bus->devices; dev; dev = dev->next)
+		{
+			if ((dev->descriptor.idVendor == USB_VID) && (dev->descriptor.idProduct == USB_PID))
+			{
+				result->usb_handle = usb_open(dev);
+
+#if 0
+				/* usb_set_configuration required under win32 */
+				usb_set_configuration(result->usb_handle, dev->config[0].bConfigurationValue);
+#endif
+				usb_claim_interface(result->usb_handle, 0);
+
+#if 0
+				/*
+				 * This makes problems under Mac OS X. And is not needed
+				 * under Windows. Hopefully this will not break a linux build
+				 */
+				usb_set_altinterface(result->usb_handle, 0);
+#endif
+				return result;
+			}
+		}
+	}
+
+	free(result);
+	return NULL;
+}
+
+void armjtagew_usb_close(armjtagew_jtag_t *armjtagew_jtag)
+{
+	usb_close(armjtagew_jtag->usb_handle);
+	free(armjtagew_jtag);
+}
+
+/* Send a message and receive the reply. */
+int armjtagew_usb_message(armjtagew_jtag_t *armjtagew_jtag, int out_length, int in_length)
+{
+	int result;
+
+	result = armjtagew_usb_write(armjtagew_jtag, out_length);
+	if (result == out_length)
+	{
+		result = armjtagew_usb_read(armjtagew_jtag, in_length);
+		if (result != in_length) 
+		{
+			LOG_ERROR("usb_bulk_read failed (requested=%d, result=%d)", in_length, result);
+			return -1;
+		}
+	}
+	else
+	{
+		LOG_ERROR("usb_bulk_write failed (requested=%d, result=%d)", out_length, result);
+		return -1;
+	}
+	return 0;
+}
+
+/* Write data from out_buffer to USB. */
+int armjtagew_usb_write(armjtagew_jtag_t *armjtagew_jtag, int out_length)
+{
+	int result;
+
+	if (out_length > ARMJTAGEW_OUT_BUFFER_SIZE)
+	{
+		LOG_ERROR("armjtagew_jtag_write illegal out_length=%d (max=%d)", out_length, ARMJTAGEW_OUT_BUFFER_SIZE);
+		return -1;
+	}
+
+	result = usb_bulk_write(armjtagew_jtag->usb_handle, ARMJTAGEW_EPT_BULK_OUT, \
+		(char*)usb_out_buffer, out_length, ARMJTAGEW_USB_TIMEOUT);
+
+	DEBUG_JTAG_IO("armjtagew_usb_write, out_length = %d, result = %d", out_length, result);
+
+#ifdef _DEBUG_USB_COMMS_
+	armjtagew_debug_buffer(usb_out_buffer, out_length);
+#endif
+	return result;
+}
+
+/* Read data from USB into in_buffer. */
+int armjtagew_usb_read(armjtagew_jtag_t *armjtagew_jtag, int exp_in_length)
+{
+	int result = usb_bulk_read(armjtagew_jtag->usb_handle, ARMJTAGEW_EPT_BULK_IN, \
+		(char*)usb_in_buffer, exp_in_length, ARMJTAGEW_USB_TIMEOUT);
+
+	DEBUG_JTAG_IO("armjtagew_usb_read, result = %d", result);
+
+#ifdef _DEBUG_USB_COMMS_
+	armjtagew_debug_buffer(usb_in_buffer, result);
+#endif
+	return result;
+}
+
+
+#ifdef _DEBUG_USB_COMMS_
+#define BYTES_PER_LINE  16
+
+void armjtagew_debug_buffer(u8 *buffer, int length)
+{
+	char line[81];
+	char s[4];
+	int i;
+	int j;
+
+	for (i = 0; i < length; i += BYTES_PER_LINE)
+	{
+		snprintf(line, 5, "%04x", i);
+		for (j = i; j < i + BYTES_PER_LINE && j < length; j++)
+		{
+			snprintf(s, 4, " %02x", buffer[j]);
+			strcat(line, s);
+		}
+		LOG_DEBUG(line);
+	}
+}
+#endif
+

Modified: trunk/src/jtag/jtag.c
===================================================================
--- trunk/src/jtag/jtag.c	2009-03-07 15:51:26 UTC (rev 1401)
+++ trunk/src/jtag/jtag.c	2009-03-08 15:14:18 UTC (rev 1402)
@@ -155,6 +155,10 @@
 	extern jtag_interface_t rlink_interface;
 #endif
 
+#if BUILD_ARMJTAGEW == 1
+	extern jtag_interface_t armjtagew_interface;
+#endif
+
 jtag_interface_t *jtag_interfaces[] = {
 #if BUILD_ECOSBOARD == 1
 	&zy1000_interface,
@@ -198,6 +202,9 @@
 #if BUILD_RLINK == 1
 	&rlink_interface,
 #endif
+#if BUILD_ARMJTAGEW == 1
+	&armjtagew_interface,
+#endif
 	NULL,
 };
 

Added: trunk/src/target/interface/arm-jtag-ew.cfg
===================================================================
--- trunk/src/target/interface/arm-jtag-ew.cfg	2009-03-07 15:51:26 UTC (rev 1401)
+++ trunk/src/target/interface/arm-jtag-ew.cfg	2009-03-08 15:14:18 UTC (rev 1402)
@@ -0,0 +1,2 @@
+# Interface ARM-JTAG-EW
+interface arm-jtag-ew

[Openocd-svn] r1401 - trunk/src/jtag

[<du...@ma...>]

Author: duane
Date: 2009-03-07 16:51:26 +0100 (Sat, 07 Mar 2009)
New Revision: 1401

Modified:
   trunk/src/jtag/ft2232.c
Log:
Accept/create both A and Non-A ft2232 based descriptions

Modified: trunk/src/jtag/ft2232.c
===================================================================
--- trunk/src/jtag/ft2232.c	2009-03-07 15:19:21 UTC (rev 1400)
+++ trunk/src/jtag/ft2232.c	2009-03-07 15:51:26 UTC (rev 1401)
@@ -97,6 +97,7 @@
 static int ft2232_stableclocks(int num_cycles, jtag_command_t* cmd);
 
 
+char *        ft2232_device_desc_A = NULL;
 char*         ft2232_device_desc = NULL;
 char*         ft2232_serial  = NULL;
 char*         ft2232_layout  = NULL;
@@ -1570,7 +1571,28 @@
 		return ERROR_JTAG_INIT_FAILED;
 	}
 
-	if ( ( status = FT_OpenEx(openex_string, openex_flags, &ftdih) ) != FT_OK )
+	status = FT_OpenEx(openex_string, openex_flags, &ftdih);
+	if( status != FT_OK ){
+		// under Win32, the FTD2XX driver appends an "A" to the end
+		// of the description, if we tried by the desc, then
+		// try by the alternate "A" description.
+		if( openex_string == ft2232_device_desc ){
+			// Try the alternate method.
+			openex_string = ft2232_device_desc_A;
+			status = FT_OpenEx(openex_string, openex_flags, &ftdih);
+			if( status == FT_OK ){
+				// yea, the "alternate" method worked!
+			} else {
+				// drat, give the user a meaningfull message.
+				// telling the use we tried *BOTH* methods.
+				LOG_WARNING("Unable to open FTDI Device tried: '%s' and '%s'\n",
+							ft2232_device_desc,
+							ft2232_device_desc_A );
+			}
+		}
+	}
+
+	if ( status != FT_OK )
 	{
 		DWORD num_devices;
 
@@ -2414,9 +2436,29 @@
 
 int ft2232_handle_device_desc_command(struct command_context_s* cmd_ctx, char* cmd, char** args, int argc)
 {
+	char *cp;
+	char buf[200];
 	if (argc == 1)
 	{
 		ft2232_device_desc = strdup(args[0]);
+		cp = strchr( ft2232_device_desc, 0 );
+		// under Win32, the FTD2XX driver appends an "A" to the end
+		// of the description, this examines the given desc
+		// and creates the 'missing' _A or non_A variable.
+		if( (cp[-1] == 'A') && (cp[-2]==' ') ){
+			// it was, so make this the "A" version.
+			ft2232_device_desc_A = ft2232_device_desc;
+			// and *CREATE* the non-A version.
+			strcpy( buf, ft2232_device_desc );
+			cp = strchr( buf, 0 );
+			cp[-2] = 0;
+			ft2232_device_desc =  strdup( buf );
+		} else {
+			// <space>A not defined
+			// so create it
+			sprintf( buf, "%s A", ft2232_device_desc );
+			ft2232_device_desc_A = strdup( buf );
+		}
 	}
 	else
 	{

[Openocd-svn] r1400 - in trunk: doc src/helper

[<du...@ma...>]

Author: duane
Date: 2009-03-07 16:19:21 +0100 (Sat, 07 Mar 2009)
New Revision: 1400

Modified:
   trunk/doc/openocd.texi
   trunk/src/helper/command.c
Log:
Added HostOS variable

Modified: trunk/doc/openocd.texi
===================================================================
--- trunk/doc/openocd.texi	2009-03-05 07:41:04 UTC (rev 1399)
+++ trunk/doc/openocd.texi	2009-03-07 15:19:21 UTC (rev 1400)
@@ -3063,9 +3063,10 @@
 can be used.
 
 @node TCL scripting API
-@chapter TCL scripting API
+@chapter TCL scripts
 @cindex TCL scripting API
-API rules
+@cindex TCL scripts
+@section API Rules
 
 The commands are stateless. E.g. the telnet command line has a concept
 of currently active target, the Tcl API proc's take this sort of state
@@ -3102,7 +3103,11 @@
 Lists returned must be relatively small. Otherwise a range
 should be passed in to the proc in question.
 
-Low level commands are prefixed with "openocd_", e.g. openocd_flash_banks
+@section Internal Low Level Commands
+
+By Low level, the intent is a human would not directly use these commands.
+
+Low level commands are (should be) prefixed with "openocd_", e.g. openocd_flash_banks
 is the low level API upon which "flash banks" is implemented.
 
 @itemize @bullet
@@ -3121,7 +3126,25 @@
 startup.tcl "unknown" proc will translate this into a tcl proc
 called "flash_banks".
 
+@section OpenOCD specific Global Variables
 
+@subsection HostOS
+
+Real TCL has ::tcl_platform(), and platform::identify, and many other
+variables. JimTCL, as implimented in OpenOCD creates $HostOS which
+holds one of the following values.
+
+@itemize bullet 
+@item @b{winxx}    Built using Microsoft Visual Studio
+@item @b{linux}    Linux is the underlying operating sytem
+@item @b{darwin}   Darwin (mac-os) is the underlying operating sytem.
+@item @b{cygwin}   Running under Cygwin
+@item @b{mingw32}  Running under MingW32
+@item @b{other}    Unknown, none of the above.
+@end itemize
+
+Note: 'winxx' was choosen because today (March-2009) no distinction is made between Win32 and Win64.
+
 @node Upgrading
 @chapter Deprecated/Removed Commands
 @cindex Deprecated/Removed Commands

Modified: trunk/src/helper/command.c
===================================================================
--- trunk/src/helper/command.c	2009-03-05 07:41:04 UTC (rev 1399)
+++ trunk/src/helper/command.c	2009-03-07 15:19:21 UTC (rev 1400)
@@ -672,6 +672,7 @@
 {
 	command_context_t* context = malloc(sizeof(command_context_t));
 	extern const char startup_tcl[];
+	const char *HostOs;
 
 	context->mode = COMMAND_EXEC;
 	context->commands = NULL;
@@ -687,6 +688,28 @@
 	Jim_RegisterCoreCommands(interp);
 #endif
 
+#if defined( _MSC_VER )
+	/* WinXX - is generic, the forward
+	 * looking problem is this:
+	 * 
+	 *   "win32" or "win64"
+	 *
+	 * "winxx" is generic.
+	 */
+	HostOs = "winxx";
+#elif defined( __LINUX__)
+	HostOs = "linux";
+#elif defined( __DARWIN__ )
+	HostOs = "darwin";
+#elif defined( __CYGWIN__ )
+	HostOs = "cygwin";
+#elif defined( __MINGW32__ )
+	HostOs = "mingw32";
+#else
+	HostOs = "other";
+#endif
+	Jim_SetGlobalVariableStr( interp, "ocd_HOSTOS", Jim_NewStringObj( interp, HostOs , strlen(HostOs)) );
+
 	Jim_CreateCommand(interp, "ocd_find", jim_find, NULL, NULL);
 	Jim_CreateCommand(interp, "echo", jim_echo, NULL, NULL);
 	Jim_CreateCommand(interp, "capture", jim_capture, NULL, NULL);

[Openocd-svn] r1399 - trunk/src/flash

[oharboe at B. <oh...@ma...>]

Author: oharboe
Date: 2009-03-05 08:41:04 +0100 (Thu, 05 Mar 2009)
New Revision: 1399

Modified:
   trunk/src/flash/flash.c
Log:
Audrius Urmanavi?\196?\141ius <did...@gm...>  cleanup flash fill

Modified: trunk/src/flash/flash.c
===================================================================
--- trunk/src/flash/flash.c	2009-03-05 06:55:35 UTC (rev 1398)
+++ trunk/src/flash/flash.c	2009-03-05 07:41:04 UTC (rev 1399)
@@ -727,6 +727,7 @@
 	u32 count;
 	u8 chunk[1024];
 	u32 wrote = 0;
+	u32 cur_size = 0;
 	int chunk_count;
 	char *duration_text;
 	duration_t duration;
@@ -786,9 +787,9 @@
 
 	duration_start_measure(&duration);
 
-	for (wrote=0; wrote<(count*wordsize); wrote+=sizeof(chunk))
+	for (wrote=0; wrote<(count*wordsize); wrote += cur_size)
 	{
-		int cur_size = MIN( (count*wordsize - wrote) , 1024 );
+		cur_size = MIN( (count*wordsize - wrote), sizeof(chunk) );
 		flash_bank_t *bank;
 		bank = get_flash_bank_by_addr(target, address);
 		if(bank == NULL)
@@ -798,7 +799,6 @@
 		err = flash_driver_write(bank, chunk, address - bank->base + wrote, cur_size);
 		if (err!=ERROR_OK)
 			return err;
-		wrote += cur_size;
 	}
 
 	if ((retval = duration_stop_measure(&duration, &duration_text)) != ERROR_OK)

[Openocd-svn] r1398 - trunk/src/target

[oharboe at B. <oh...@ma...>]

Author: oharboe
Date: 2009-03-05 07:55:35 +0100 (Thu, 05 Mar 2009)
New Revision: 1398

Modified:
   trunk/src/target/target.c
Log:
Nicolas Pitre <ni...@ca...> fix "halt 0" to only halt and not to poll/wait afterwards. This follows the intention in the docs.

Modified: trunk/src/target/target.c
===================================================================
--- trunk/src/target/target.c	2009-03-04 21:28:50 UTC (rev 1397)
+++ trunk/src/target/target.c	2009-03-05 06:55:35 UTC (rev 1398)
@@ -1759,6 +1759,16 @@
 		return retval;
 	}
 
+	if (argc == 1)
+	{
+		int wait;
+		char *end;
+
+		wait = strtoul(args[0], &end, 0);
+		if (!*end && !wait)
+			return ERROR_OK;
+	}
+
 	return handle_wait_halt_command(cmd_ctx, cmd, args, argc);
 }
 

[Openocd-svn] r1397 - trunk/src/target/board

[<oh...@ma...>]

Author: oharboe
Date: 2009-03-04 22:28:50 +0100 (Wed, 04 Mar 2009)
New Revision: 1397

Modified:
   trunk/src/target/board/sheevaplug.cfg
Log:
Nicolas Pitre <ni...@ca...> making reset+halt on the
SheevaPlug 100% reliable (needs patch in target.c to fix "halt 0").

Modified: trunk/src/target/board/sheevaplug.cfg
===================================================================
--- trunk/src/target/board/sheevaplug.cfg	2009-03-03 12:05:49 UTC (rev 1396)
+++ trunk/src/target/board/sheevaplug.cfg	2009-03-04 21:28:50 UTC (rev 1397)
@@ -3,8 +3,6 @@
 source [find interface/sheevaplug.cfg]
 source [find target/feroceon.cfg]
 
-$_TARGETNAME configure -event reset-init { sheevaplug_init }
-
 $_TARGETNAME configure \
 	-work-area-phys 0x10000000 \
 	-work-area-size 65536 \
@@ -17,6 +15,13 @@
 
 proc sheevaplug_init { } {
 
+	# We need to assert DBGRQ while holding nSRST down.
+	# However DBGACK will be set only when nSRST is released.
+	jtag_reset 0 1
+	halt 0
+	jtag_reset 0 0
+	wait_halt
+
 	arm926ejs cp15 0 0 1 0 0x00052078
 
 	mww 0xD0001400 0x43000C30 #  DDR SDRAM Configuration Register
@@ -90,8 +95,8 @@
 
 proc sheevaplug_reflash_uboot { } {
 
-	# reflash the u-Boot binary
-	#reset init
+	# reflash the u-Boot binary and reboot into it
+	sheevaplug_init
 	nand probe 0
 	nand erase 0 0 4
 	nand write 0 uboot.bin 0
@@ -101,8 +106,8 @@
 
 proc sheevaplug_load_uboot { } {
 
-	# load u-Boot into RAM
-	#reset init
+	# load u-Boot into RAM and execute it
+	sheevaplug_init
 	load_image /tmp/uboot.elf
 	verify_image uboot.elf
 	resume 0x00600000

[Openocd-svn] r1396 - trunk/src/target

[oharboe at B. <oh...@ma...>]

Author: oharboe
Date: 2009-03-03 13:05:49 +0100 (Tue, 03 Mar 2009)
New Revision: 1396

Modified:
   trunk/src/target/target.c
Log:
test code for elf parsing.

Modified: trunk/src/target/target.c
===================================================================
--- trunk/src/target/target.c	2009-03-02 12:51:42 UTC (rev 1395)
+++ trunk/src/target/target.c	2009-03-03 12:05:49 UTC (rev 1396)
@@ -76,6 +76,7 @@
 int handle_load_image_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
 int handle_dump_image_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
 int handle_verify_image_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
+int handle_test_image_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
 int handle_bp_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
 int handle_rbp_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
 int handle_wp_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
@@ -1329,6 +1330,7 @@
 	register_command(cmd_ctx,  NULL, "load_image", handle_load_image_command, COMMAND_EXEC, "load_image <file> <address> ['bin'|'ihex'|'elf'|'s19'] [min_address] [max_length]");
 	register_command(cmd_ctx,  NULL, "dump_image", handle_dump_image_command, COMMAND_EXEC, "dump_image <file> <address> <size>");
 	register_command(cmd_ctx,  NULL, "verify_image", handle_verify_image_command, COMMAND_EXEC, "verify_image <file> [offset] [type]");
+	register_command(cmd_ctx,  NULL, "test_image", handle_test_image_command, COMMAND_EXEC, "test_image <file> [offset] [type]");
 
 	if((retval = target_request_register_commands(cmd_ctx)) != ERROR_OK)
 		return retval;
@@ -2161,7 +2163,7 @@
 	return ERROR_OK;
 }
 
-int handle_verify_image_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
+int handle_verify_image_command_internal(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc, int verify)
 {
 	u8 *buffer;
 	u32 buf_cnt;
@@ -2225,55 +2227,61 @@
 			break;
 		}
 
-		/* calculate checksum of image */
-		image_calculate_checksum( buffer, buf_cnt, &checksum );
-
-		retval = target_checksum_memory(target, image.sections[i].base_address, buf_cnt, &mem_checksum);
-		if( retval != ERROR_OK )
+		if (verify)
 		{
-			free(buffer);
-			break;
-		}
+			/* calculate checksum of image */
+			image_calculate_checksum( buffer, buf_cnt, &checksum );
 
-		if( checksum != mem_checksum )
-		{
-			/* failed crc checksum, fall back to a binary compare */
-			u8 *data;
+			retval = target_checksum_memory(target, image.sections[i].base_address, buf_cnt, &mem_checksum);
+			if( retval != ERROR_OK )
+			{
+				free(buffer);
+				break;
+			}
 
-			command_print(cmd_ctx, "checksum mismatch - attempting binary compare");
+			if( checksum != mem_checksum )
+			{
+				/* failed crc checksum, fall back to a binary compare */
+				u8 *data;
 
-			data = (u8*)malloc(buf_cnt);
+				command_print(cmd_ctx, "checksum mismatch - attempting binary compare");
 
-			/* Can we use 32bit word accesses? */
-			int size = 1;
-			int count = buf_cnt;
-			if ((count % 4) == 0)
-			{
-				size *= 4;
-				count /= 4;
-			}
-			retval = target->type->read_memory(target, image.sections[i].base_address, size, count, data);
-			if (retval == ERROR_OK)
-			{
-				int t;
-				for (t = 0; t < buf_cnt; t++)
+				data = (u8*)malloc(buf_cnt);
+
+				/* Can we use 32bit word accesses? */
+				int size = 1;
+				int count = buf_cnt;
+				if ((count % 4) == 0)
 				{
-					if (data[t] != buffer[t])
+					size *= 4;
+					count /= 4;
+				}
+				retval = target->type->read_memory(target, image.sections[i].base_address, size, count, data);
+				if (retval == ERROR_OK)
+				{
+					int t;
+					for (t = 0; t < buf_cnt; t++)
 					{
-						command_print(cmd_ctx, "Verify operation failed address 0x%08x. Was 0x%02x instead of 0x%02x\n", t + image.sections[i].base_address, data[t], buffer[t]);
-						free(data);
-						free(buffer);
-						retval=ERROR_FAIL;
-						goto done;
+						if (data[t] != buffer[t])
+						{
+							command_print(cmd_ctx, "Verify operation failed address 0x%08x. Was 0x%02x instead of 0x%02x\n", t + image.sections[i].base_address, data[t], buffer[t]);
+							free(data);
+							free(buffer);
+							retval=ERROR_FAIL;
+							goto done;
+						}
+						if ((t%16384)==0)
+						{
+							keep_alive();
+						}
 					}
-					if ((t%16384)==0)
-					{
-						keep_alive();
-					}
 				}
+
+				free(data);
 			}
-
-			free(data);
+		} else
+		{
+			command_print(cmd_ctx, "address 0x%08x length 0x%08x", image.sections[i].base_address, buf_cnt);
 		}
 
 		free(buffer);
@@ -2298,6 +2306,16 @@
 	return retval;
 }
 
+int handle_verify_image_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
+{
+	return handle_verify_image_command_internal(cmd_ctx, cmd, args, argc, 1);
+}
+
+int handle_test_image_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
+{
+	return handle_verify_image_command_internal(cmd_ctx, cmd, args, argc, 0);
+}
+
 int handle_bp_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
 {
 	int retval;
@@ -4198,17 +4216,18 @@
 	int i;
 	int ms=timeval_ms();
 	int size=0;
+	int retval=ERROR_OK;
 	for (i=0; i<fastload_num;i++)
 	{
-		int retval;
 		target_t *target = get_current_target(cmd_ctx);
-		if ((retval = target_write_buffer(target, fastload[i].address, fastload[i].length, fastload[i].data)) != ERROR_OK)
+		command_print(cmd_ctx, "Write to 0x%08x, length 0x%08x", fastload[i].address, fastload[i].length);
+		if (retval==ERROR_OK)
 		{
-			return retval;
+			retval = target_write_buffer(target, fastload[i].address, fastload[i].length, fastload[i].data);
 		}
 		size+=fastload[i].length;
 	}
 	int after=timeval_ms();
 	command_print(cmd_ctx, "Loaded image %f kBytes/s", (float)(size/1024.0)/((float)(after-ms)/1000.0));
-	return ERROR_OK;
+	return retval;
 }

[Openocd-svn] r1395 - in trunk/src: flash target/board target/interface target/target target/test

[ntfreak at B. <nt...@ma...>]

Author: ntfreak
Date: 2009-03-02 13:51:42 +0100 (Mon, 02 Mar 2009)
New Revision: 1395

Modified:
   trunk/src/flash/orion_nand.c
   trunk/src/target/board/sheevaplug.cfg
   trunk/src/target/interface/sheevaplug.cfg
   trunk/src/target/target/feroceon.cfg
   trunk/src/target/test/syntax1.cfg
Log:
- add missing svn props from previous commit

Modified: trunk/src/flash/orion_nand.c
===================================================================
--- trunk/src/flash/orion_nand.c	2009-03-01 21:07:44 UTC (rev 1394)
+++ trunk/src/flash/orion_nand.c	2009-03-02 12:51:42 UTC (rev 1395)
@@ -1,256 +1,256 @@
-/***************************************************************************
- *   Copyright (C) 2009 by Marvell Semiconductors, Inc.                    *
- *   Written by Nicolas Pitre <nico at marvell.com>                           *
- *                                                                         *
- *   This program is free software; you can redistribute it and/or modify  *
- *   it under the terms of the GNU General Public License as published by  *
- *   the Free Software Foundation; either version 2 of the License, or     *
- *   (at your option) any later version.                                   *
- *                                                                         *
- *   This program is distributed in the hope that it will be useful,       *
- *   but WITHOUT ANY WARRANTY; without even the implied warranty of        *
- *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
- *   GNU General Public License for more details.                          *
- *                                                                         *
- *   You should have received a copy of the GNU General Public License     *
- *   along with this program; if not, write to the                         *
- *   Free Software Foundation, Inc.,                                       *
- *   59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.             *
- ***************************************************************************/
-
-/*
- * NAND controller interface for Marvell Orion/Kirkwood SoCs.
- */
-
-#ifdef HAVE_CONFIG_H
-#include "config.h"
-#endif
-
-#include "replacements.h"
-#include "log.h"
-
-#include <stdlib.h>
-#include <string.h>
-
-#include "nand.h"
-#include "target.h"
-#include "armv4_5.h"
-#include "binarybuffer.h"
-
-typedef struct orion_nand_controller_s
-{
-	struct target_s	*target;
-	working_area_t *copy_area;
-
-	u32		cmd;
-	u32		addr;
-	u32		data;
-} orion_nand_controller_t;
-
-#define CHECK_HALTED \
-	do { \
-		if (target->state != TARGET_HALTED) { \
-			LOG_ERROR("NAND flash access requires halted target"); \
-			return ERROR_NAND_OPERATION_FAILED; \
-		} \
-	} while (0)
-
-int orion_nand_command(struct nand_device_s *device, u8 command)
-{
-	orion_nand_controller_t *hw = device->controller_priv;
-	target_t *target = hw->target;
-
-	CHECK_HALTED;
-	target_write_u8(target, hw->cmd, command);
-	return ERROR_OK;
-}
-
-int orion_nand_address(struct nand_device_s *device, u8 address)
-{
-	orion_nand_controller_t *hw = device->controller_priv;
-	target_t *target = hw->target;
-
-	CHECK_HALTED;
-	target_write_u8(target, hw->addr, address);
-	return ERROR_OK;
-}
-
-int orion_nand_read(struct nand_device_s *device, void *data)
-{
-	orion_nand_controller_t *hw = device->controller_priv;
-	target_t *target = hw->target;
-
-	CHECK_HALTED;
-	target_read_u8(target, hw->data, data);
-	return ERROR_OK;
-}
-
-int orion_nand_write(struct nand_device_s *device, u16 data)
-{
-	orion_nand_controller_t *hw = device->controller_priv;
-	target_t *target = hw->target;
-
-	CHECK_HALTED;
-	target_write_u8(target, hw->data, data);
-	return ERROR_OK;
-}
-
-int orion_nand_slow_block_write(struct nand_device_s *device, u8 *data, int size)
-{
-	while (size--)
-		orion_nand_write(device, *data++);
-	return ERROR_OK;
-}
-
-int orion_nand_fast_block_write(struct nand_device_s *device, u8 *data, int size)
-{
-	orion_nand_controller_t *hw = device->controller_priv;
-	target_t *target = hw->target;
-	armv4_5_algorithm_t algo;
-	reg_param_t reg_params[3];
-	u32 target_buf;
-	int retval;
-
-	static const u32 code[] = {
-		0xe4d13001,	/* ldrb	r3, [r1], #1	*/
-		0xe5c03000,	/* strb	r3, [r0]	*/
-		0xe2522001,	/* subs	r2, r2, #1	*/
-		0x1afffffb,	/* bne	0		*/
-		0xeafffffe,	/* b	.		*/
-	};
-	int code_size = sizeof(code);
-
-	if (!hw->copy_area) {
-		u8 code_buf[code_size];
-		int i;
-
-		/* make sure we have a working area */
-		if (target_alloc_working_area(target,
-					      code_size + device->page_size,
-					      &hw->copy_area) != ERROR_OK)
-		{
-			return orion_nand_slow_block_write(device, data, size);
-		}
-
-		/* copy target instructions to target endianness */
-		for (i = 0; i < code_size/4; i++)
-			target_buffer_set_u32(target, code_buf + i*4, code[i]);
-
-		/* write code to working area */
-                retval = target->type->write_memory(target,
-					hw->copy_area->address,
-					4, code_size/4, code_buf);
-		if (retval != ERROR_OK)
-			return retval;
-	}
-
-	/* copy data to target's memory */
-	target_buf = hw->copy_area->address + code_size;
-	retval = target->type->bulk_write_memory(target, target_buf,
-						 size/4, data);
-	if (retval == ERROR_OK && size & 3) {
-		retval = target->type->write_memory(target,
-					target_buf + (size & ~3),
-					1, size & 3, data + (size & ~3));
-	}
-	if (retval != ERROR_OK)
-		return retval;
-
-	algo.common_magic = ARMV4_5_COMMON_MAGIC;
-	algo.core_mode = ARMV4_5_MODE_SVC;
-	algo.core_state = ARMV4_5_STATE_ARM;
-
-	init_reg_param(&reg_params[0], "r0", 32, PARAM_IN);
-	init_reg_param(&reg_params[1], "r1", 32, PARAM_IN);
-	init_reg_param(&reg_params[2], "r2", 32, PARAM_IN);
-
-	buf_set_u32(reg_params[0].value, 0, 32, hw->data);
-	buf_set_u32(reg_params[1].value, 0, 32, target_buf);
-	buf_set_u32(reg_params[2].value, 0, 32, size);
-
-	retval = target->type->run_algorithm(target, 0, NULL, 3, reg_params,
-					hw->copy_area->address,
-					hw->copy_area->address + code_size - 4,
-					1000, &algo);
-	if (retval != ERROR_OK)
-		LOG_ERROR("error executing hosted NAND write");
-
-	destroy_reg_param(&reg_params[0]);
-	destroy_reg_param(&reg_params[1]);
-	destroy_reg_param(&reg_params[2]);
-	return retval;
-}
-
-int orion_nand_reset(struct nand_device_s *device)
-{
-	return orion_nand_command(device, NAND_CMD_RESET);
-}
-
-int orion_nand_controller_ready(struct nand_device_s *device, int timeout)
-{
-	return 1;
-}
-
-int orion_nand_register_commands(struct command_context_s *cmd_ctx)
-{
-	return ERROR_OK;
-}
-
-int orion_nand_device_command(struct command_context_s *cmd_ctx, char *cmd,
-			      char **args, int argc,
-			      struct nand_device_s *device)
-{
-	orion_nand_controller_t *hw;
-	u32 base;
-	u8 ale, cle;
-
-	if (argc != 3) {
-		LOG_ERROR("arguments must be: <target_number> <NAND_address>\n");
-		return ERROR_NAND_DEVICE_INVALID;
-	}
-
-	hw = calloc(1, sizeof(*hw));
-	if (!hw) {
-		LOG_ERROR("no memory for nand controller\n");
-		return ERROR_NAND_DEVICE_INVALID;
-	}
-
-	device->controller_priv = hw;
-	hw->target = get_target_by_num(strtoul(args[1], NULL, 0));
-	if (!hw->target) {
-		LOG_ERROR("no target '%s' configured", args[1]);
-		free(hw);
-		return ERROR_NAND_DEVICE_INVALID;
-	}
-
-	base = strtoul(args[2], NULL, 0);
-	cle = 0;
-	ale = 1;
-
-	hw->data = base;
-	hw->cmd = base + (1 << cle);
-	hw->addr = base + (1 << ale);
-
-	return ERROR_OK;
-}
-
-int orion_nand_init(struct nand_device_s *device)
-{
-	return ERROR_OK;
-}
-
-nand_flash_controller_t orion_nand_controller =
-{
-	.name			= "orion",
-	.command		= orion_nand_command,
-	.address		= orion_nand_address,
-	.read_data		= orion_nand_read,
-	.write_data		= orion_nand_write,
-	.write_block_data	= orion_nand_fast_block_write,
-	.reset			= orion_nand_reset,
-	.controller_ready	= orion_nand_controller_ready,
-	.nand_device_command	= orion_nand_device_command,
-	.register_commands	= orion_nand_register_commands,
-	.init			= orion_nand_init,
-};
-
+/***************************************************************************
+ *   Copyright (C) 2009 by Marvell Semiconductors, Inc.                    *
+ *   Written by Nicolas Pitre <nico at marvell.com>                           *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ *                                                                         *
+ *   This program is distributed in the hope that it will be useful,       *
+ *   but WITHOUT ANY WARRANTY; without even the implied warranty of        *
+ *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
+ *   GNU General Public License for more details.                          *
+ *                                                                         *
+ *   You should have received a copy of the GNU General Public License     *
+ *   along with this program; if not, write to the                         *
+ *   Free Software Foundation, Inc.,                                       *
+ *   59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.             *
+ ***************************************************************************/
+
+/*
+ * NAND controller interface for Marvell Orion/Kirkwood SoCs.
+ */
+
+#ifdef HAVE_CONFIG_H
+#include "config.h"
+#endif
+
+#include "replacements.h"
+#include "log.h"
+
+#include <stdlib.h>
+#include <string.h>
+
+#include "nand.h"
+#include "target.h"
+#include "armv4_5.h"
+#include "binarybuffer.h"
+
+typedef struct orion_nand_controller_s
+{
+	struct target_s	*target;
+	working_area_t *copy_area;
+
+	u32		cmd;
+	u32		addr;
+	u32		data;
+} orion_nand_controller_t;
+
+#define CHECK_HALTED \
+	do { \
+		if (target->state != TARGET_HALTED) { \
+			LOG_ERROR("NAND flash access requires halted target"); \
+			return ERROR_NAND_OPERATION_FAILED; \
+		} \
+	} while (0)
+
+int orion_nand_command(struct nand_device_s *device, u8 command)
+{
+	orion_nand_controller_t *hw = device->controller_priv;
+	target_t *target = hw->target;
+
+	CHECK_HALTED;
+	target_write_u8(target, hw->cmd, command);
+	return ERROR_OK;
+}
+
+int orion_nand_address(struct nand_device_s *device, u8 address)
+{
+	orion_nand_controller_t *hw = device->controller_priv;
+	target_t *target = hw->target;
+
+	CHECK_HALTED;
+	target_write_u8(target, hw->addr, address);
+	return ERROR_OK;
+}
+
+int orion_nand_read(struct nand_device_s *device, void *data)
+{
+	orion_nand_controller_t *hw = device->controller_priv;
+	target_t *target = hw->target;
+
+	CHECK_HALTED;
+	target_read_u8(target, hw->data, data);
+	return ERROR_OK;
+}
+
+int orion_nand_write(struct nand_device_s *device, u16 data)
+{
+	orion_nand_controller_t *hw = device->controller_priv;
+	target_t *target = hw->target;
+
+	CHECK_HALTED;
+	target_write_u8(target, hw->data, data);
+	return ERROR_OK;
+}
+
+int orion_nand_slow_block_write(struct nand_device_s *device, u8 *data, int size)
+{
+	while (size--)
+		orion_nand_write(device, *data++);
+	return ERROR_OK;
+}
+
+int orion_nand_fast_block_write(struct nand_device_s *device, u8 *data, int size)
+{
+	orion_nand_controller_t *hw = device->controller_priv;
+	target_t *target = hw->target;
+	armv4_5_algorithm_t algo;
+	reg_param_t reg_params[3];
+	u32 target_buf;
+	int retval;
+
+	static const u32 code[] = {
+		0xe4d13001,	/* ldrb	r3, [r1], #1	*/
+		0xe5c03000,	/* strb	r3, [r0]	*/
+		0xe2522001,	/* subs	r2, r2, #1	*/
+		0x1afffffb,	/* bne	0		*/
+		0xeafffffe,	/* b	.		*/
+	};
+	int code_size = sizeof(code);
+
+	if (!hw->copy_area) {
+		u8 code_buf[code_size];
+		int i;
+
+		/* make sure we have a working area */
+		if (target_alloc_working_area(target,
+					      code_size + device->page_size,
+					      &hw->copy_area) != ERROR_OK)
+		{
+			return orion_nand_slow_block_write(device, data, size);
+		}
+
+		/* copy target instructions to target endianness */
+		for (i = 0; i < code_size/4; i++)
+			target_buffer_set_u32(target, code_buf + i*4, code[i]);
+
+		/* write code to working area */
+                retval = target->type->write_memory(target,
+					hw->copy_area->address,
+					4, code_size/4, code_buf);
+		if (retval != ERROR_OK)
+			return retval;
+	}
+
+	/* copy data to target's memory */
+	target_buf = hw->copy_area->address + code_size;
+	retval = target->type->bulk_write_memory(target, target_buf,
+						 size/4, data);
+	if (retval == ERROR_OK && size & 3) {
+		retval = target->type->write_memory(target,
+					target_buf + (size & ~3),
+					1, size & 3, data + (size & ~3));
+	}
+	if (retval != ERROR_OK)
+		return retval;
+
+	algo.common_magic = ARMV4_5_COMMON_MAGIC;
+	algo.core_mode = ARMV4_5_MODE_SVC;
+	algo.core_state = ARMV4_5_STATE_ARM;
+
+	init_reg_param(&reg_params[0], "r0", 32, PARAM_IN);
+	init_reg_param(&reg_params[1], "r1", 32, PARAM_IN);
+	init_reg_param(&reg_params[2], "r2", 32, PARAM_IN);
+
+	buf_set_u32(reg_params[0].value, 0, 32, hw->data);
+	buf_set_u32(reg_params[1].value, 0, 32, target_buf);
+	buf_set_u32(reg_params[2].value, 0, 32, size);
+
+	retval = target->type->run_algorithm(target, 0, NULL, 3, reg_params,
+					hw->copy_area->address,
+					hw->copy_area->address + code_size - 4,
+					1000, &algo);
+	if (retval != ERROR_OK)
+		LOG_ERROR("error executing hosted NAND write");
+
+	destroy_reg_param(&reg_params[0]);
+	destroy_reg_param(&reg_params[1]);
+	destroy_reg_param(&reg_params[2]);
+	return retval;
+}
+
+int orion_nand_reset(struct nand_device_s *device)
+{
+	return orion_nand_command(device, NAND_CMD_RESET);
+}
+
+int orion_nand_controller_ready(struct nand_device_s *device, int timeout)
+{
+	return 1;
+}
+
+int orion_nand_register_commands(struct command_context_s *cmd_ctx)
+{
+	return ERROR_OK;
+}
+
+int orion_nand_device_command(struct command_context_s *cmd_ctx, char *cmd,
+			      char **args, int argc,
+			      struct nand_device_s *device)
+{
+	orion_nand_controller_t *hw;
+	u32 base;
+	u8 ale, cle;
+
+	if (argc != 3) {
+		LOG_ERROR("arguments must be: <target_number> <NAND_address>\n");
+		return ERROR_NAND_DEVICE_INVALID;
+	}
+
+	hw = calloc(1, sizeof(*hw));
+	if (!hw) {
+		LOG_ERROR("no memory for nand controller\n");
+		return ERROR_NAND_DEVICE_INVALID;
+	}
+
+	device->controller_priv = hw;
+	hw->target = get_target_by_num(strtoul(args[1], NULL, 0));
+	if (!hw->target) {
+		LOG_ERROR("no target '%s' configured", args[1]);
+		free(hw);
+		return ERROR_NAND_DEVICE_INVALID;
+	}
+
+	base = strtoul(args[2], NULL, 0);
+	cle = 0;
+	ale = 1;
+
+	hw->data = base;
+	hw->cmd = base + (1 << cle);
+	hw->addr = base + (1 << ale);
+
+	return ERROR_OK;
+}
+
+int orion_nand_init(struct nand_device_s *device)
+{
+	return ERROR_OK;
+}
+
+nand_flash_controller_t orion_nand_controller =
+{
+	.name			= "orion",
+	.command		= orion_nand_command,
+	.address		= orion_nand_address,
+	.read_data		= orion_nand_read,
+	.write_data		= orion_nand_write,
+	.write_block_data	= orion_nand_fast_block_write,
+	.reset			= orion_nand_reset,
+	.controller_ready	= orion_nand_controller_ready,
+	.nand_device_command	= orion_nand_device_command,
+	.register_commands	= orion_nand_register_commands,
+	.init			= orion_nand_init,
+};
+


Property changes on: trunk/src/flash/orion_nand.c
___________________________________________________________________
Name: svn:eol-style
   + native

Modified: trunk/src/target/board/sheevaplug.cfg
===================================================================
--- trunk/src/target/board/sheevaplug.cfg	2009-03-01 21:07:44 UTC (rev 1394)
+++ trunk/src/target/board/sheevaplug.cfg	2009-03-02 12:51:42 UTC (rev 1395)
@@ -1,111 +1,111 @@
-# Marvell SheevaPlug 
-
-source [find interface/sheevaplug.cfg]
-source [find target/feroceon.cfg]
-
-$_TARGETNAME configure -event reset-init { sheevaplug_init }
-
-$_TARGETNAME configure \
-	-work-area-phys 0x10000000 \
-	-work-area-size 65536 \
-	-work-area-backup 0
-
-arm7_9 dcc_downloads enable
-
-# this assumes the hardware default peripherals location before u-Boot moves it
-nand device orion 0 0xd8000000
-
-proc sheevaplug_init { } {
-
-	arm926ejs cp15 0 0 1 0 0x00052078
-
-	mww 0xD0001400 0x43000C30 #  DDR SDRAM Configuration Register
-	mww 0xD0001404 0x39543000 #  Dunit Control Low Register
-	mww 0xD0001408 0x22125451 #  DDR SDRAM Timing (Low) Register
-	mww 0xD000140C 0x00000833 #  DDR SDRAM Timing (High) Register
-	mww 0xD0001410 0x000000CC #  DDR SDRAM Address Control Register
-	mww 0xD0001414 0x00000000 #  DDR SDRAM Open Pages Control Register
-	mww 0xD0001418 0x00000000 #  DDR SDRAM Operation Register
-	mww 0xD000141C 0x00000C52 #  DDR SDRAM Mode Register
-	mww 0xD0001420 0x00000042 #  DDR SDRAM Extended Mode Register
-	mww 0xD0001424 0x0000F17F #  Dunit Control High Register
-	mww 0xD0001428 0x00085520 #  Dunit Control High Register
-	mww 0xD000147c 0x00008552 #  Dunit Control High Register
-	mww 0xD0001504 0x0FFFFFF1 #  CS0n Size Register
-	mww 0xD0001508 0x10000000 #  CS1n Base Register
-	mww 0xD000150C 0x0FFFFFF5 #  CS1n Size Register
-	mww 0xD0001514 0x00000000 #  CS2n Size Register
-	mww 0xD000151C 0x00000000 #  CS3n Size Register
-	mww 0xD0001494 0x003C0000 #  DDR2 SDRAM ODT Control (Low) Register
-	mww 0xD0001498 0x00000000 #  DDR2 SDRAM ODT Control (High) REgister
-	mww 0xD000149C 0x0000F80F #  DDR2 Dunit ODT Control Register
-	mww 0xD0001480 0x00000001 #  DDR SDRAM Initialization Control Register
-	mww 0xD0020204 0x00000000 #  Main IRQ Interrupt Mask Register
-	mww 0xD0020204 0x00000000 #              "
-	mww 0xD0020204 0x00000000 #              "
-	mww 0xD0020204 0x00000000 #              "
-	mww 0xD0020204 0x00000000 #              "
-	mww 0xD0020204 0x00000000 #              "
-	mww 0xD0020204 0x00000000 #              "
-	mww 0xD0020204 0x00000000 #              "
-	mww 0xD0020204 0x00000000 #              "
-	mww 0xD0020204 0x00000000 #              "
-	mww 0xD0020204 0x00000000 #              "
-	mww 0xD0020204 0x00000000 #              "
-	mww 0xD0020204 0x00000000 #              "
-	mww 0xD0020204 0x00000000 #              "
-	mww 0xD0020204 0x00000000 #              "
-	mww 0xD0020204 0x00000000 #              "
-	mww 0xD0020204 0x00000000 #              "
-	mww 0xD0020204 0x00000000 #              "
-	mww 0xD0020204 0x00000000 #              "
-	mww 0xD0020204 0x00000000 #              "
-	mww 0xD0020204 0x00000000 #              "
-	mww 0xD0020204 0x00000000 #              "
-	mww 0xD0020204 0x00000000 #              "
-	mww 0xD0020204 0x00000000 #              "
-	mww 0xD0020204 0x00000000 #              "
-	mww 0xD0020204 0x00000000 #              "
-	mww 0xD0020204 0x00000000 #              "
-	mww 0xD0020204 0x00000000 #              "
-	mww 0xD0020204 0x00000000 #              "
-	mww 0xD0020204 0x00000000 #              "
-	mww 0xD0020204 0x00000000 #              "
-	mww 0xD0020204 0x00000000 #              "
-	mww 0xD0020204 0x00000000 #              "
-	mww 0xD0020204 0x00000000 #              "
-	mww 0xD0020204 0x00000000 #              "
-	mww 0xD0020204 0x00000000 #              "
-	mww 0xD0020204 0x00000000 #              "
-
-	mww 0xD0010000 0x01111111 #  MPP  0 to 7
-	mww 0xD0010004 0x11113322 #  MPP  8 to 15
-	mww 0xD0010008 0x00001111 #  MPP 16 to 23
-
-	mww 0xD0010418 0x003E07CF #  NAND Read Parameters REgister
-	mww 0xD001041C 0x000F0F0F #  NAND Write Parameters Register
-	mww 0xD0010470 0x01C7D943 #  NAND Flash Control Register
-
-}
-
-proc sheevaplug_reflash_uboot { } {
-
-	# reflash the u-Boot binary
-	#reset init
-	nand probe 0
-	nand erase 0 0 4
-	nand write 0 uboot.bin 0
-	reset run
-
-}
-
-proc sheevaplug_load_uboot { } {
-
-	# load u-Boot into RAM
-	#reset init
-	load_image /tmp/uboot.elf
-	verify_image uboot.elf
-	resume 0x00600000
-
-}
-
+# Marvell SheevaPlug 
+
+source [find interface/sheevaplug.cfg]
+source [find target/feroceon.cfg]
+
+$_TARGETNAME configure -event reset-init { sheevaplug_init }
+
+$_TARGETNAME configure \
+	-work-area-phys 0x10000000 \
+	-work-area-size 65536 \
+	-work-area-backup 0
+
+arm7_9 dcc_downloads enable
+
+# this assumes the hardware default peripherals location before u-Boot moves it
+nand device orion 0 0xd8000000
+
+proc sheevaplug_init { } {
+
+	arm926ejs cp15 0 0 1 0 0x00052078
+
+	mww 0xD0001400 0x43000C30 #  DDR SDRAM Configuration Register
+	mww 0xD0001404 0x39543000 #  Dunit Control Low Register
+	mww 0xD0001408 0x22125451 #  DDR SDRAM Timing (Low) Register
+	mww 0xD000140C 0x00000833 #  DDR SDRAM Timing (High) Register
+	mww 0xD0001410 0x000000CC #  DDR SDRAM Address Control Register
+	mww 0xD0001414 0x00000000 #  DDR SDRAM Open Pages Control Register
+	mww 0xD0001418 0x00000000 #  DDR SDRAM Operation Register
+	mww 0xD000141C 0x00000C52 #  DDR SDRAM Mode Register
+	mww 0xD0001420 0x00000042 #  DDR SDRAM Extended Mode Register
+	mww 0xD0001424 0x0000F17F #  Dunit Control High Register
+	mww 0xD0001428 0x00085520 #  Dunit Control High Register
+	mww 0xD000147c 0x00008552 #  Dunit Control High Register
+	mww 0xD0001504 0x0FFFFFF1 #  CS0n Size Register
+	mww 0xD0001508 0x10000000 #  CS1n Base Register
+	mww 0xD000150C 0x0FFFFFF5 #  CS1n Size Register
+	mww 0xD0001514 0x00000000 #  CS2n Size Register
+	mww 0xD000151C 0x00000000 #  CS3n Size Register
+	mww 0xD0001494 0x003C0000 #  DDR2 SDRAM ODT Control (Low) Register
+	mww 0xD0001498 0x00000000 #  DDR2 SDRAM ODT Control (High) REgister
+	mww 0xD000149C 0x0000F80F #  DDR2 Dunit ODT Control Register
+	mww 0xD0001480 0x00000001 #  DDR SDRAM Initialization Control Register
+	mww 0xD0020204 0x00000000 #  Main IRQ Interrupt Mask Register
+	mww 0xD0020204 0x00000000 #              "
+	mww 0xD0020204 0x00000000 #              "
+	mww 0xD0020204 0x00000000 #              "
+	mww 0xD0020204 0x00000000 #              "
+	mww 0xD0020204 0x00000000 #              "
+	mww 0xD0020204 0x00000000 #              "
+	mww 0xD0020204 0x00000000 #              "
+	mww 0xD0020204 0x00000000 #              "
+	mww 0xD0020204 0x00000000 #              "
+	mww 0xD0020204 0x00000000 #              "
+	mww 0xD0020204 0x00000000 #              "
+	mww 0xD0020204 0x00000000 #              "
+	mww 0xD0020204 0x00000000 #              "
+	mww 0xD0020204 0x00000000 #              "
+	mww 0xD0020204 0x00000000 #              "
+	mww 0xD0020204 0x00000000 #              "
+	mww 0xD0020204 0x00000000 #              "
+	mww 0xD0020204 0x00000000 #              "
+	mww 0xD0020204 0x00000000 #              "
+	mww 0xD0020204 0x00000000 #              "
+	mww 0xD0020204 0x00000000 #              "
+	mww 0xD0020204 0x00000000 #              "
+	mww 0xD0020204 0x00000000 #              "
+	mww 0xD0020204 0x00000000 #              "
+	mww 0xD0020204 0x00000000 #              "
+	mww 0xD0020204 0x00000000 #              "
+	mww 0xD0020204 0x00000000 #              "
+	mww 0xD0020204 0x00000000 #              "
+	mww 0xD0020204 0x00000000 #              "
+	mww 0xD0020204 0x00000000 #              "
+	mww 0xD0020204 0x00000000 #              "
+	mww 0xD0020204 0x00000000 #              "
+	mww 0xD0020204 0x00000000 #              "
+	mww 0xD0020204 0x00000000 #              "
+	mww 0xD0020204 0x00000000 #              "
+	mww 0xD0020204 0x00000000 #              "
+
+	mww 0xD0010000 0x01111111 #  MPP  0 to 7
+	mww 0xD0010004 0x11113322 #  MPP  8 to 15
+	mww 0xD0010008 0x00001111 #  MPP 16 to 23
+
+	mww 0xD0010418 0x003E07CF #  NAND Read Parameters REgister
+	mww 0xD001041C 0x000F0F0F #  NAND Write Parameters Register
+	mww 0xD0010470 0x01C7D943 #  NAND Flash Control Register
+
+}
+
+proc sheevaplug_reflash_uboot { } {
+
+	# reflash the u-Boot binary
+	#reset init
+	nand probe 0
+	nand erase 0 0 4
+	nand write 0 uboot.bin 0
+	reset run
+
+}
+
+proc sheevaplug_load_uboot { } {
+
+	# load u-Boot into RAM
+	#reset init
+	load_image /tmp/uboot.elf
+	verify_image uboot.elf
+	resume 0x00600000
+
+}
+


Property changes on: trunk/src/target/board/sheevaplug.cfg
___________________________________________________________________
Name: svn:eol-style
   + native

Modified: trunk/src/target/interface/sheevaplug.cfg
===================================================================
--- trunk/src/target/interface/sheevaplug.cfg	2009-03-01 21:07:44 UTC (rev 1394)
+++ trunk/src/target/interface/sheevaplug.cfg	2009-03-02 12:51:42 UTC (rev 1395)
@@ -1,4 +1,4 @@
-interface ft2232
-ft2232_layout sheevaplug
-ft2232_vid_pid 0x0403 0x6010
-jtag_khz 3000
+interface ft2232
+ft2232_layout sheevaplug
+ft2232_vid_pid 0x0403 0x6010
+jtag_khz 3000


Property changes on: trunk/src/target/interface/sheevaplug.cfg
___________________________________________________________________
Name: svn:eol-style
   + native

Modified: trunk/src/target/target/feroceon.cfg
===================================================================
--- trunk/src/target/target/feroceon.cfg	2009-03-01 21:07:44 UTC (rev 1394)
+++ trunk/src/target/target/feroceon.cfg	2009-03-02 12:51:42 UTC (rev 1395)
@@ -1,30 +1,30 @@
-######################################
-# Target:    Marvell Feroceon CPU core
-######################################
-
-if { [info exists CHIPNAME] } {	
-   set  _CHIPNAME $CHIPNAME    
-} else {	 
-   set  _CHIPNAME feroceon
-}
-
-if { [info exists ENDIAN] } {	
-   set  _ENDIAN $ENDIAN    
-} else {	 
-   set  _ENDIAN little
-}
-
-if { [info exists CPUTAPID ] } {
-   set _CPUTAPID $CPUTAPID
-} else {
-   set _CPUTAPID 0x20a023d3
-}
-
-jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
-set _TARGETNAME [format "%s.cpu" $_CHIPNAME]
-target create $_TARGETNAME feroceon -endian $_ENDIAN -chain-position $_TARGETNAME
-
-reset_config trst_and_srst
-jtag_nsrst_delay 200
-jtag_ntrst_delay 200
-
+######################################
+# Target:    Marvell Feroceon CPU core
+######################################
+
+if { [info exists CHIPNAME] } {	
+   set  _CHIPNAME $CHIPNAME    
+} else {	 
+   set  _CHIPNAME feroceon
+}
+
+if { [info exists ENDIAN] } {	
+   set  _ENDIAN $ENDIAN    
+} else {	 
+   set  _ENDIAN little
+}
+
+if { [info exists CPUTAPID ] } {
+   set _CPUTAPID $CPUTAPID
+} else {
+   set _CPUTAPID 0x20a023d3
+}
+
+jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
+set _TARGETNAME [format "%s.cpu" $_CHIPNAME]
+target create $_TARGETNAME feroceon -endian $_ENDIAN -chain-position $_TARGETNAME
+
+reset_config trst_and_srst
+jtag_nsrst_delay 200
+jtag_ntrst_delay 200
+


Property changes on: trunk/src/target/target/feroceon.cfg
___________________________________________________________________
Name: svn:eol-style
   + native

Modified: trunk/src/target/test/syntax1.cfg
===================================================================
--- trunk/src/target/test/syntax1.cfg	2009-03-01 21:07:44 UTC (rev 1394)
+++ trunk/src/target/test/syntax1.cfg	2009-03-02 12:51:42 UTC (rev 1395)
@@ -1,29 +1,29 @@
-jtag_nsrst_delay 200
-jtag_ntrst_delay 200
-
-#use combined on interfaces or targets that can't set TRST/SRST separately
-reset_config trst_and_srst srst_pulls_trst
-
-#LPCs need reset pulled while RTCK is low. 0 to activate JTAG, power-on reset is not enough
-jtag_reset 1 1
-jtag_reset 0 0
-
-#jtag scan chain
-#format L IRC IRCM IDCODE (Length, IR Capture, IR Capture Mask, IDCODE)
-jtag newtap lpc2148 one -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id 0x4f1f0f0f
-
-#target configuration
-#daemon_startup reset
-
-set _TARGETNAME [format "%s.cpu" lpc2148]
-target create lpc2148.cpu arm7tdmi -endian little -work-area-size 0x4000 -work-area-phys 0x40000000 -work-area-virt 0 -work-area-backup 0
-
-$_TARGETNAME configure -event reset-init { 
-soft_reset_halt 
-mvb 0xE01FC040 0x01 
-}
-
-
-
-flash bank lpc2000 0x0 0x7d000 0 0 0 lpc2000_v2 14765
-
+jtag_nsrst_delay 200
+jtag_ntrst_delay 200
+
+#use combined on interfaces or targets that can't set TRST/SRST separately
+reset_config trst_and_srst srst_pulls_trst
+
+#LPCs need reset pulled while RTCK is low. 0 to activate JTAG, power-on reset is not enough
+jtag_reset 1 1
+jtag_reset 0 0
+
+#jtag scan chain
+#format L IRC IRCM IDCODE (Length, IR Capture, IR Capture Mask, IDCODE)
+jtag newtap lpc2148 one -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id 0x4f1f0f0f
+
+#target configuration
+#daemon_startup reset
+
+set _TARGETNAME [format "%s.cpu" lpc2148]
+target create lpc2148.cpu arm7tdmi -endian little -work-area-size 0x4000 -work-area-phys 0x40000000 -work-area-virt 0 -work-area-backup 0
+
+$_TARGETNAME configure -event reset-init { 
+soft_reset_halt 
+mvb 0xE01FC040 0x01 
+}
+
+
+
+flash bank lpc2000 0x0 0x7d000 0 0 0 lpc2000_v2 14765
+


Property changes on: trunk/src/target/test/syntax1.cfg
___________________________________________________________________
Name: svn:eol-style
   + native

[Openocd-svn] r1394 - trunk/src/jtag

[<oh...@ma...>]

Author: oharboe
Date: 2009-03-01 22:07:44 +0100 (Sun, 01 Mar 2009)
New Revision: 1394

Modified:
   trunk/src/jtag/ft2232.c
Log:
Daniel Gimpelevich <da...@gi...> Cosmetic OpenOCD patch for Flyswatter

Modified: trunk/src/jtag/ft2232.c
===================================================================
--- trunk/src/jtag/ft2232.c	2009-03-01 21:06:06 UTC (rev 1393)
+++ trunk/src/jtag/ft2232.c	2009-03-01 21:07:44 UTC (rev 1394)
@@ -139,6 +139,7 @@
 
 /* blink procedures for layouts that support a blinking led */
 void olimex_jtag_blink(void);
+void flyswatter_jtag_blink(void);
 void turtle_jtag_blink(void);
 
 ft2232_layout_t            ft2232_layouts[] =
@@ -150,7 +151,7 @@
 	{ "signalyzer",           usbjtag_init,              usbjtag_reset,      NULL                    },
 	{ "evb_lm3s811",          usbjtag_init,              usbjtag_reset,      NULL                    },
 	{ "olimex-jtag",          olimex_jtag_init,          olimex_jtag_reset,  olimex_jtag_blink       },
-	{ "flyswatter",           flyswatter_init,           flyswatter_reset,   NULL                    },
+	{ "flyswatter",           flyswatter_init,           flyswatter_reset,   flyswatter_jtag_blink   },
 	{ "turtelizer2",          turtle_init,               turtle_reset,       turtle_jtag_blink       },
 	{ "comstick",             comstick_init,             comstick_reset,     NULL                    },
 	{ "stm32stick",           stm32stick_init,           stm32stick_reset,   NULL                    },
@@ -2136,7 +2137,7 @@
 	high_output    = 0x00;
 	high_direction = 0x0c;
 
-	/* turn red LED1 on, LED2 off */
+	/* turn red LED3 on, LED2 off */
 	high_output |= 0x08;
 
 	/* initialize high port */
@@ -2357,6 +2358,19 @@
 }
 
 
+void flyswatter_jtag_blink(void)
+{
+	/*
+	 * Flyswatter has two LEDs connected to ACBUS2 and ACBUS3
+	 */
+	high_output ^= 0x0c;
+
+	BUFFER_ADD = 0x82;
+	BUFFER_ADD = high_output;
+	BUFFER_ADD = high_direction;
+}
+
+
 void turtle_jtag_blink(void)
 {
 	/*

[Openocd-svn] r1393 - trunk/src/target/interface

[<oh...@ma...>]

Author: oharboe
Date: 2009-03-01 22:06:06 +0100 (Sun, 01 Mar 2009)
New Revision: 1393

Modified:
   trunk/src/target/interface/jtagkey-tiny.cfg
Log:
Kees Jongenburger <kee...@gm...> rename description field of the jtag-tiny.cfg

Modified: trunk/src/target/interface/jtagkey-tiny.cfg
===================================================================
--- trunk/src/target/interface/jtagkey-tiny.cfg	2009-03-01 21:04:00 UTC (rev 1392)
+++ trunk/src/target/interface/jtagkey-tiny.cfg	2009-03-01 21:06:06 UTC (rev 1393)
@@ -1,5 +1,5 @@
 #interface
 interface ft2232
-ft2232_device_desc "Amontec JTAGkey A"
+ft2232_device_desc "Amontec JTAGkey"
 ft2232_layout jtagkey
 ft2232_vid_pid 0x0403 0xcff8

[Openocd-svn] r1392 - trunk/src/target

[<oh...@ma...>]

Author: oharboe
Date: 2009-03-01 22:04:00 +0100 (Sun, 01 Mar 2009)
New Revision: 1392

Modified:
   trunk/src/target/feroceon.c
Log:
Nicolas Pitre nico at cam.org  fix feroceon_bulk_write_memory() wrt uploaded code

Modified: trunk/src/target/feroceon.c
===================================================================
--- trunk/src/target/feroceon.c	2009-03-01 21:02:13 UTC (rev 1391)
+++ trunk/src/target/feroceon.c	2009-03-01 21:04:00 UTC (rev 1392)
@@ -569,7 +569,7 @@
 			target_buffer_set_u32(target, dcc_code_buf + i*4, dcc_code[i]);
 
 		/* write DCC code to working area */
-		if((retval = target->type->write_memory(target, arm7_9->dcc_working_area->address, 4, dcc_size, dcc_code_buf)) != ERROR_OK)
+		if((retval = target->type->write_memory(target, arm7_9->dcc_working_area->address, 4, dcc_size/4, dcc_code_buf)) != ERROR_OK)
 		{
 			return retval;
 		}

[Openocd-svn] r1391 - trunk/src/target/board

[<oh...@ma...>]

Author: oharboe
Date: 2009-03-01 22:02:13 +0100 (Sun, 01 Mar 2009)
New Revision: 1391

Added:
   trunk/src/target/board/sheevaplug.cfg
Log:
Nicolas Pitre nico at cam.org  SheevaPlug board configuration

Added: trunk/src/target/board/sheevaplug.cfg
===================================================================
--- trunk/src/target/board/sheevaplug.cfg	2009-03-01 21:01:11 UTC (rev 1390)
+++ trunk/src/target/board/sheevaplug.cfg	2009-03-01 21:02:13 UTC (rev 1391)
@@ -0,0 +1,111 @@
+# Marvell SheevaPlug 
+
+source [find interface/sheevaplug.cfg]
+source [find target/feroceon.cfg]
+
+$_TARGETNAME configure -event reset-init { sheevaplug_init }
+
+$_TARGETNAME configure \
+	-work-area-phys 0x10000000 \
+	-work-area-size 65536 \
+	-work-area-backup 0
+
+arm7_9 dcc_downloads enable
+
+# this assumes the hardware default peripherals location before u-Boot moves it
+nand device orion 0 0xd8000000
+
+proc sheevaplug_init { } {
+
+	arm926ejs cp15 0 0 1 0 0x00052078
+
+	mww 0xD0001400 0x43000C30 #  DDR SDRAM Configuration Register
+	mww 0xD0001404 0x39543000 #  Dunit Control Low Register
+	mww 0xD0001408 0x22125451 #  DDR SDRAM Timing (Low) Register
+	mww 0xD000140C 0x00000833 #  DDR SDRAM Timing (High) Register
+	mww 0xD0001410 0x000000CC #  DDR SDRAM Address Control Register
+	mww 0xD0001414 0x00000000 #  DDR SDRAM Open Pages Control Register
+	mww 0xD0001418 0x00000000 #  DDR SDRAM Operation Register
+	mww 0xD000141C 0x00000C52 #  DDR SDRAM Mode Register
+	mww 0xD0001420 0x00000042 #  DDR SDRAM Extended Mode Register
+	mww 0xD0001424 0x0000F17F #  Dunit Control High Register
+	mww 0xD0001428 0x00085520 #  Dunit Control High Register
+	mww 0xD000147c 0x00008552 #  Dunit Control High Register
+	mww 0xD0001504 0x0FFFFFF1 #  CS0n Size Register
+	mww 0xD0001508 0x10000000 #  CS1n Base Register
+	mww 0xD000150C 0x0FFFFFF5 #  CS1n Size Register
+	mww 0xD0001514 0x00000000 #  CS2n Size Register
+	mww 0xD000151C 0x00000000 #  CS3n Size Register
+	mww 0xD0001494 0x003C0000 #  DDR2 SDRAM ODT Control (Low) Register
+	mww 0xD0001498 0x00000000 #  DDR2 SDRAM ODT Control (High) REgister
+	mww 0xD000149C 0x0000F80F #  DDR2 Dunit ODT Control Register
+	mww 0xD0001480 0x00000001 #  DDR SDRAM Initialization Control Register
+	mww 0xD0020204 0x00000000 #  Main IRQ Interrupt Mask Register
+	mww 0xD0020204 0x00000000 #              "
+	mww 0xD0020204 0x00000000 #              "
+	mww 0xD0020204 0x00000000 #              "
+	mww 0xD0020204 0x00000000 #              "
+	mww 0xD0020204 0x00000000 #              "
+	mww 0xD0020204 0x00000000 #              "
+	mww 0xD0020204 0x00000000 #              "
+	mww 0xD0020204 0x00000000 #              "
+	mww 0xD0020204 0x00000000 #              "
+	mww 0xD0020204 0x00000000 #              "
+	mww 0xD0020204 0x00000000 #              "
+	mww 0xD0020204 0x00000000 #              "
+	mww 0xD0020204 0x00000000 #              "
+	mww 0xD0020204 0x00000000 #              "
+	mww 0xD0020204 0x00000000 #              "
+	mww 0xD0020204 0x00000000 #              "
+	mww 0xD0020204 0x00000000 #              "
+	mww 0xD0020204 0x00000000 #              "
+	mww 0xD0020204 0x00000000 #              "
+	mww 0xD0020204 0x00000000 #              "
+	mww 0xD0020204 0x00000000 #              "
+	mww 0xD0020204 0x00000000 #              "
+	mww 0xD0020204 0x00000000 #              "
+	mww 0xD0020204 0x00000000 #              "
+	mww 0xD0020204 0x00000000 #              "
+	mww 0xD0020204 0x00000000 #              "
+	mww 0xD0020204 0x00000000 #              "
+	mww 0xD0020204 0x00000000 #              "
+	mww 0xD0020204 0x00000000 #              "
+	mww 0xD0020204 0x00000000 #              "
+	mww 0xD0020204 0x00000000 #              "
+	mww 0xD0020204 0x00000000 #              "
+	mww 0xD0020204 0x00000000 #              "
+	mww 0xD0020204 0x00000000 #              "
+	mww 0xD0020204 0x00000000 #              "
+	mww 0xD0020204 0x00000000 #              "
+
+	mww 0xD0010000 0x01111111 #  MPP  0 to 7
+	mww 0xD0010004 0x11113322 #  MPP  8 to 15
+	mww 0xD0010008 0x00001111 #  MPP 16 to 23
+
+	mww 0xD0010418 0x003E07CF #  NAND Read Parameters REgister
+	mww 0xD001041C 0x000F0F0F #  NAND Write Parameters Register
+	mww 0xD0010470 0x01C7D943 #  NAND Flash Control Register
+
+}
+
+proc sheevaplug_reflash_uboot { } {
+
+	# reflash the u-Boot binary
+	#reset init
+	nand probe 0
+	nand erase 0 0 4
+	nand write 0 uboot.bin 0
+	reset run
+
+}
+
+proc sheevaplug_load_uboot { } {
+
+	# load u-Boot into RAM
+	#reset init
+	load_image /tmp/uboot.elf
+	verify_image uboot.elf
+	resume 0x00600000
+
+}
+

[Openocd-svn] r1390 - in trunk/src: jtag target/interface

[<oh...@ma...>]

Author: oharboe
Date: 2009-03-01 22:01:11 +0100 (Sun, 01 Mar 2009)
New Revision: 1390

Added:
   trunk/src/target/interface/sheevaplug.cfg
Modified:
   trunk/src/jtag/ft2232.c
Log:
Nicolas Pitre nico at cam.org  add ft2232 layout for the Marvell SheevaPlug 

Modified: trunk/src/jtag/ft2232.c
===================================================================
--- trunk/src/jtag/ft2232.c	2009-03-01 21:00:07 UTC (rev 1389)
+++ trunk/src/jtag/ft2232.c	2009-03-01 21:01:11 UTC (rev 1390)
@@ -124,6 +124,7 @@
 int  comstick_init(void);
 int  stm32stick_init(void);
 int  axm0432_jtag_init(void);
+int sheevaplug_init(void);
 
 /* reset procedures for supported layouts */
 void usbjtag_reset(int trst, int srst);
@@ -134,6 +135,7 @@
 void comstick_reset(int trst, int srst);
 void stm32stick_reset(int trst, int srst);
 void axm0432_jtag_reset(int trst, int srst);
+void sheevaplug_reset(int trst, int srst);
 
 /* blink procedures for layouts that support a blinking led */
 void olimex_jtag_blink(void);
@@ -153,6 +155,7 @@
 	{ "comstick",             comstick_init,             comstick_reset,     NULL                    },
 	{ "stm32stick",           stm32stick_init,           stm32stick_reset,   NULL                    },
 	{ "axm0432_jtag",         axm0432_jtag_init,         axm0432_jtag_reset, NULL                    },
+	{"sheevaplug",            sheevaplug_init,           sheevaplug_reset,   NULL                    },
 	{ NULL,                   NULL,                      NULL },
 };
 
@@ -1253,6 +1256,26 @@
 }
 
 
+
+void sheevaplug_reset(int trst, int srst)
+{
+	if (trst == 1)
+		high_output &= ~nTRST;
+	else if (trst == 0)
+		high_output |= nTRST;
+
+	if (srst == 1)
+		high_output &= ~nSRSTnOE;
+	else if (srst == 0)
+		high_output |= nSRSTnOE;
+
+	/* command "set data bits high byte" */
+	BUFFER_ADD = 0x82;
+	BUFFER_ADD = high_output;
+	BUFFER_ADD = high_direction;
+	LOG_DEBUG("trst: %i, srst: %i, high_output: 0x%2.2x, high_direction: 0x%2.2x", trst, srst, high_output, high_direction);
+}
+
 int ft2232_execute_queue()
 {
 	jtag_command_t* cmd = jtag_command_queue;   /* currently processed command */
@@ -2261,6 +2284,57 @@
 }
 
 
+int sheevaplug_init(void)
+{
+	u8 buf[3];
+	u32 bytes_written;
+
+	low_output = 0x08;
+	low_direction = 0x1b;
+
+	/* initialize low byte for jtag */
+	buf[0] = 0x80; /* command "set data bits low byte" */
+	buf[1] = low_output; /* value (TMS=1,TCK=0, TDI=0, nOE=0) */
+	buf[2] = low_direction; /* dir (output=1), TCK/TDI/TMS=out, TDO=in */
+	LOG_DEBUG("%2.2x %2.2x %2.2x", buf[0], buf[1], buf[2]);
+
+	if (((ft2232_write(buf, 3, &bytes_written)) != ERROR_OK) || (bytes_written != 3))
+	{
+		LOG_ERROR("couldn't initialize FT2232 with 'sheevaplug' layout"); 
+		return ERROR_JTAG_INIT_FAILED;
+	}
+
+	nTRSTnOE = 0x1;
+	nTRST = 0x02;
+	nSRSTnOE = 0x4;
+	nSRST = 0x08;
+
+	high_output = 0x0;
+	high_direction = 0x0f;
+
+	/* nTRST is always push-pull */
+	high_output &= ~nTRSTnOE;
+	high_output |= nTRST;
+
+	/* nSRST is always open-drain */
+	high_output |= nSRSTnOE;
+	high_output &= ~nSRST;
+
+	/* initialize high port */
+	buf[0] = 0x82; /* command "set data bits high byte" */
+	buf[1] = high_output; /* value */
+	buf[2] = high_direction;   /* all outputs - xRST */
+	LOG_DEBUG("%2.2x %2.2x %2.2x", buf[0], buf[1], buf[2]);
+
+	if (((ft2232_write(buf, 3, &bytes_written)) != ERROR_OK) || (bytes_written != 3))
+	{
+		LOG_ERROR("couldn't initialize FT2232 with 'sheevaplug' layout"); 
+		return ERROR_JTAG_INIT_FAILED;
+	}
+
+	return ERROR_OK;
+}
+
 void olimex_jtag_blink(void)
 {
 	/* Olimex ARM-USB-OCD has a LED connected to ACBUS3

Added: trunk/src/target/interface/sheevaplug.cfg
===================================================================
--- trunk/src/target/interface/sheevaplug.cfg	2009-03-01 21:00:07 UTC (rev 1389)
+++ trunk/src/target/interface/sheevaplug.cfg	2009-03-01 21:01:11 UTC (rev 1390)
@@ -0,0 +1,4 @@
+interface ft2232
+ft2232_layout sheevaplug
+ft2232_vid_pid 0x0403 0x6010
+jtag_khz 3000

[Openocd-svn] r1389 - in trunk/src/target: . target

[<oh...@ma...>]

Author: oharboe
Date: 2009-03-01 22:00:07 +0100 (Sun, 01 Mar 2009)
New Revision: 1389

Added:
   trunk/src/target/target/feroceon.cfg
Modified:
   trunk/src/target/feroceon.c
Log:
Nicolas Pitre nico at cam.org add Feroceon target config file

Modified: trunk/src/target/feroceon.c
===================================================================
--- trunk/src/target/feroceon.c	2009-03-01 20:59:06 UTC (rev 1388)
+++ trunk/src/target/feroceon.c	2009-03-01 21:00:07 UTC (rev 1389)
@@ -22,7 +22,7 @@
  ***************************************************************************/
 
 /*
- * Marvell Feroceon (88F5182, 88F5281) support.
+ * Marvell Feroceon support, including Orion and Kirkwood SOCs.
  *
  * The Feroceon core mimics the ARM926 ICE interface with the following
  * differences:

Added: trunk/src/target/target/feroceon.cfg
===================================================================
--- trunk/src/target/target/feroceon.cfg	2009-03-01 20:59:06 UTC (rev 1388)
+++ trunk/src/target/target/feroceon.cfg	2009-03-01 21:00:07 UTC (rev 1389)
@@ -0,0 +1,30 @@
+######################################
+# Target:    Marvell Feroceon CPU core
+######################################
+
+if { [info exists CHIPNAME] } {	
+   set  _CHIPNAME $CHIPNAME    
+} else {	 
+   set  _CHIPNAME feroceon
+}
+
+if { [info exists ENDIAN] } {	
+   set  _ENDIAN $ENDIAN    
+} else {	 
+   set  _ENDIAN little
+}
+
+if { [info exists CPUTAPID ] } {
+   set _CPUTAPID $CPUTAPID
+} else {
+   set _CPUTAPID 0x20a023d3
+}
+
+jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
+set _TARGETNAME [format "%s.cpu" $_CHIPNAME]
+target create $_TARGETNAME feroceon -endian $_ENDIAN -chain-position $_TARGETNAME
+
+reset_config trst_and_srst
+jtag_nsrst_delay 200
+jtag_ntrst_delay 200
+

[Openocd-svn] r1388 - trunk/src/flash

[<oh...@ma...>]

Author: oharboe
Date: 2009-03-01 21:59:06 +0100 (Sun, 01 Mar 2009)
New Revision: 1388

Added:
   trunk/src/flash/orion_nand.c
Modified:
   trunk/src/flash/Makefile.am
   trunk/src/flash/nand.c
Log:
Nicolas Pitre nico at cam.org support for NAND flash used with Marvell Orion and Kirkwood SOCs

Modified: trunk/src/flash/Makefile.am
===================================================================
--- trunk/src/flash/Makefile.am	2009-03-01 20:57:34 UTC (rev 1387)
+++ trunk/src/flash/Makefile.am	2009-03-01 20:59:06 UTC (rev 1388)
@@ -3,7 +3,7 @@
 METASOURCES = AUTO
 noinst_LIBRARIES = libflash.a
 libflash_a_SOURCES = flash.c lpc2000.c cfi.c non_cfi.c at91sam7.c at91sam7_old.c str7x.c str9x.c aduc702x.c nand.c lpc3180_nand_controller.c \
-					 stellaris.c str9xpec.c stm32x.c tms470.c ecos.c  \
+		     stellaris.c str9xpec.c stm32x.c tms470.c ecos.c orion_nand.c \
 		     s3c24xx_nand.c s3c2410_nand.c s3c2412_nand.c s3c2440_nand.c s3c2443_nand.c lpc288x.c ocl.c mflash.c pic32mx.c
 noinst_HEADERS = flash.h lpc2000.h cfi.h non_cfi.h at91sam7.h at91sam7_old.h str7x.h str9x.h nand.h lpc3180_nand_controller.h \
 				 stellaris.h str9xpec.h stm32x.h tms470.h s3c24xx_nand.h s3c24xx_regs_nand.h lpc288x.h mflash.h \

Modified: trunk/src/flash/nand.c
===================================================================
--- trunk/src/flash/nand.c	2009-03-01 20:57:34 UTC (rev 1387)
+++ trunk/src/flash/nand.c	2009-03-01 20:59:06 UTC (rev 1388)
@@ -61,6 +61,7 @@
 /* NAND flash controller
  */
 extern nand_flash_controller_t lpc3180_nand_controller;
+extern nand_flash_controller_t orion_nand_controller;
 extern nand_flash_controller_t s3c2410_nand_controller;
 extern nand_flash_controller_t s3c2412_nand_controller;
 extern nand_flash_controller_t s3c2440_nand_controller;
@@ -71,6 +72,7 @@
 nand_flash_controller_t *nand_flash_controllers[] =
 {
 	&lpc3180_nand_controller,
+	&orion_nand_controller,
 	&s3c2410_nand_controller,
 	&s3c2412_nand_controller,
 	&s3c2440_nand_controller,

Added: trunk/src/flash/orion_nand.c
===================================================================
--- trunk/src/flash/orion_nand.c	2009-03-01 20:57:34 UTC (rev 1387)
+++ trunk/src/flash/orion_nand.c	2009-03-01 20:59:06 UTC (rev 1388)
@@ -0,0 +1,256 @@
+/***************************************************************************
+ *   Copyright (C) 2009 by Marvell Semiconductors, Inc.                    *
+ *   Written by Nicolas Pitre <nico at marvell.com>                           *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ *                                                                         *
+ *   This program is distributed in the hope that it will be useful,       *
+ *   but WITHOUT ANY WARRANTY; without even the implied warranty of        *
+ *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
+ *   GNU General Public License for more details.                          *
+ *                                                                         *
+ *   You should have received a copy of the GNU General Public License     *
+ *   along with this program; if not, write to the                         *
+ *   Free Software Foundation, Inc.,                                       *
+ *   59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.             *
+ ***************************************************************************/
+
+/*
+ * NAND controller interface for Marvell Orion/Kirkwood SoCs.
+ */
+
+#ifdef HAVE_CONFIG_H
+#include "config.h"
+#endif
+
+#include "replacements.h"
+#include "log.h"
+
+#include <stdlib.h>
+#include <string.h>
+
+#include "nand.h"
+#include "target.h"
+#include "armv4_5.h"
+#include "binarybuffer.h"
+
+typedef struct orion_nand_controller_s
+{
+	struct target_s	*target;
+	working_area_t *copy_area;
+
+	u32		cmd;
+	u32		addr;
+	u32		data;
+} orion_nand_controller_t;
+
+#define CHECK_HALTED \
+	do { \
+		if (target->state != TARGET_HALTED) { \
+			LOG_ERROR("NAND flash access requires halted target"); \
+			return ERROR_NAND_OPERATION_FAILED; \
+		} \
+	} while (0)
+
+int orion_nand_command(struct nand_device_s *device, u8 command)
+{
+	orion_nand_controller_t *hw = device->controller_priv;
+	target_t *target = hw->target;
+
+	CHECK_HALTED;
+	target_write_u8(target, hw->cmd, command);
+	return ERROR_OK;
+}
+
+int orion_nand_address(struct nand_device_s *device, u8 address)
+{
+	orion_nand_controller_t *hw = device->controller_priv;
+	target_t *target = hw->target;
+
+	CHECK_HALTED;
+	target_write_u8(target, hw->addr, address);
+	return ERROR_OK;
+}
+
+int orion_nand_read(struct nand_device_s *device, void *data)
+{
+	orion_nand_controller_t *hw = device->controller_priv;
+	target_t *target = hw->target;
+
+	CHECK_HALTED;
+	target_read_u8(target, hw->data, data);
+	return ERROR_OK;
+}
+
+int orion_nand_write(struct nand_device_s *device, u16 data)
+{
+	orion_nand_controller_t *hw = device->controller_priv;
+	target_t *target = hw->target;
+
+	CHECK_HALTED;
+	target_write_u8(target, hw->data, data);
+	return ERROR_OK;
+}
+
+int orion_nand_slow_block_write(struct nand_device_s *device, u8 *data, int size)
+{
+	while (size--)
+		orion_nand_write(device, *data++);
+	return ERROR_OK;
+}
+
+int orion_nand_fast_block_write(struct nand_device_s *device, u8 *data, int size)
+{
+	orion_nand_controller_t *hw = device->controller_priv;
+	target_t *target = hw->target;
+	armv4_5_algorithm_t algo;
+	reg_param_t reg_params[3];
+	u32 target_buf;
+	int retval;
+
+	static const u32 code[] = {
+		0xe4d13001,	/* ldrb	r3, [r1], #1	*/
+		0xe5c03000,	/* strb	r3, [r0]	*/
+		0xe2522001,	/* subs	r2, r2, #1	*/
+		0x1afffffb,	/* bne	0		*/
+		0xeafffffe,	/* b	.		*/
+	};
+	int code_size = sizeof(code);
+
+	if (!hw->copy_area) {
+		u8 code_buf[code_size];
+		int i;
+
+		/* make sure we have a working area */
+		if (target_alloc_working_area(target,
+					      code_size + device->page_size,
+					      &hw->copy_area) != ERROR_OK)
+		{
+			return orion_nand_slow_block_write(device, data, size);
+		}
+
+		/* copy target instructions to target endianness */
+		for (i = 0; i < code_size/4; i++)
+			target_buffer_set_u32(target, code_buf + i*4, code[i]);
+
+		/* write code to working area */
+                retval = target->type->write_memory(target,
+					hw->copy_area->address,
+					4, code_size/4, code_buf);
+		if (retval != ERROR_OK)
+			return retval;
+	}
+
+	/* copy data to target's memory */
+	target_buf = hw->copy_area->address + code_size;
+	retval = target->type->bulk_write_memory(target, target_buf,
+						 size/4, data);
+	if (retval == ERROR_OK && size & 3) {
+		retval = target->type->write_memory(target,
+					target_buf + (size & ~3),
+					1, size & 3, data + (size & ~3));
+	}
+	if (retval != ERROR_OK)
+		return retval;
+
+	algo.common_magic = ARMV4_5_COMMON_MAGIC;
+	algo.core_mode = ARMV4_5_MODE_SVC;
+	algo.core_state = ARMV4_5_STATE_ARM;
+
+	init_reg_param(&reg_params[0], "r0", 32, PARAM_IN);
+	init_reg_param(&reg_params[1], "r1", 32, PARAM_IN);
+	init_reg_param(&reg_params[2], "r2", 32, PARAM_IN);
+
+	buf_set_u32(reg_params[0].value, 0, 32, hw->data);
+	buf_set_u32(reg_params[1].value, 0, 32, target_buf);
+	buf_set_u32(reg_params[2].value, 0, 32, size);
+
+	retval = target->type->run_algorithm(target, 0, NULL, 3, reg_params,
+					hw->copy_area->address,
+					hw->copy_area->address + code_size - 4,
+					1000, &algo);
+	if (retval != ERROR_OK)
+		LOG_ERROR("error executing hosted NAND write");
+
+	destroy_reg_param(&reg_params[0]);
+	destroy_reg_param(&reg_params[1]);
+	destroy_reg_param(&reg_params[2]);
+	return retval;
+}
+
+int orion_nand_reset(struct nand_device_s *device)
+{
+	return orion_nand_command(device, NAND_CMD_RESET);
+}
+
+int orion_nand_controller_ready(struct nand_device_s *device, int timeout)
+{
+	return 1;
+}
+
+int orion_nand_register_commands(struct command_context_s *cmd_ctx)
+{
+	return ERROR_OK;
+}
+
+int orion_nand_device_command(struct command_context_s *cmd_ctx, char *cmd,
+			      char **args, int argc,
+			      struct nand_device_s *device)
+{
+	orion_nand_controller_t *hw;
+	u32 base;
+	u8 ale, cle;
+
+	if (argc != 3) {
+		LOG_ERROR("arguments must be: <target_number> <NAND_address>\n");
+		return ERROR_NAND_DEVICE_INVALID;
+	}
+
+	hw = calloc(1, sizeof(*hw));
+	if (!hw) {
+		LOG_ERROR("no memory for nand controller\n");
+		return ERROR_NAND_DEVICE_INVALID;
+	}
+
+	device->controller_priv = hw;
+	hw->target = get_target_by_num(strtoul(args[1], NULL, 0));
+	if (!hw->target) {
+		LOG_ERROR("no target '%s' configured", args[1]);
+		free(hw);
+		return ERROR_NAND_DEVICE_INVALID;
+	}
+
+	base = strtoul(args[2], NULL, 0);
+	cle = 0;
+	ale = 1;
+
+	hw->data = base;
+	hw->cmd = base + (1 << cle);
+	hw->addr = base + (1 << ale);
+
+	return ERROR_OK;
+}
+
+int orion_nand_init(struct nand_device_s *device)
+{
+	return ERROR_OK;
+}
+
+nand_flash_controller_t orion_nand_controller =
+{
+	.name			= "orion",
+	.command		= orion_nand_command,
+	.address		= orion_nand_address,
+	.read_data		= orion_nand_read,
+	.write_data		= orion_nand_write,
+	.write_block_data	= orion_nand_fast_block_write,
+	.reset			= orion_nand_reset,
+	.controller_ready	= orion_nand_controller_ready,
+	.nand_device_command	= orion_nand_device_command,
+	.register_commands	= orion_nand_register_commands,
+	.init			= orion_nand_init,
+};
+

[Openocd-svn] r1387 - trunk/src/flash

[<oh...@ma...>]

Author: oharboe
Date: 2009-03-01 21:57:34 +0100 (Sun, 01 Mar 2009)
New Revision: 1387

Modified:
   trunk/src/flash/nand.c
Log:
Nicolas Pitre nico at cam.org  support for NAND controllers without explicit busy signal

Modified: trunk/src/flash/nand.c
===================================================================
--- trunk/src/flash/nand.c	2009-03-01 20:56:18 UTC (rev 1386)
+++ trunk/src/flash/nand.c	2009-03-01 20:57:34 UTC (rev 1387)
@@ -372,6 +372,27 @@
 	return ERROR_OK;
 }
 
+int nand_poll_ready(struct nand_device_s *device, int timeout)
+{
+	u8 status;
+
+	device->controller->command(device, NAND_CMD_STATUS);
+	do {
+		if (device->device->options & NAND_BUSWIDTH_16) {
+			u16 data;
+			device->controller->read_data(device, &data);
+			status = data & 0xff;
+		} else {
+			device->controller->read_data(device, &status);
+		}
+		if (status & NAND_STATUS_READY)
+			break;
+		alive_sleep(1);
+	} while (timeout--);
+
+	return (status & NAND_STATUS_READY) != 0;
+}
+
 int nand_probe(struct nand_device_s *device)
 {
 	u8 manufacturer_id, device_id;
@@ -648,9 +669,11 @@
 		
 		/* Send erase confirm command */
 		device->controller->command(device, NAND_CMD_ERASE2);
-		
-		if (!device->controller->nand_ready(device, 1000))
-		{
+
+		retval = device->controller->nand_ready ?
+				device->controller->nand_ready(device, 1000) :
+				nand_poll_ready(device, 1000);
+		if (!retval) {
 			LOG_ERROR("timeout waiting for NAND flash block erase to complete");
 			return ERROR_NAND_OPERATION_TIMEOUT;
 		}
@@ -823,8 +846,12 @@
 		device->controller->command(device, NAND_CMD_READSTART);
 	}
 	
-	if (!device->controller->nand_ready(device, 100))
-		return ERROR_NAND_OPERATION_TIMEOUT;
+	if (device->controller->nand_ready) {
+		if (!device->controller->nand_ready(device, 100))
+			return ERROR_NAND_OPERATION_TIMEOUT;
+	} else {
+		alive_sleep(1);
+	}
 	
 	if (data)
 	{
@@ -977,7 +1004,10 @@
 	
 	device->controller->command(device, NAND_CMD_PAGEPROG);
 	
-	if (!device->controller->nand_ready(device, 100))
+	retval = device->controller->nand_ready ?
+			device->controller->nand_ready(device, 100) :
+			nand_poll_ready(device, 100);
+	if (!retval)
 		return ERROR_NAND_OPERATION_TIMEOUT;
 	
 	if ((retval = nand_read_status(device, &status)) != ERROR_OK)

[Openocd-svn] r1386 - trunk/src/flash

[<oh...@ma...>]

Author: oharboe
Date: 2009-03-01 21:56:18 +0100 (Sun, 01 Mar 2009)
New Revision: 1386

Modified:
   trunk/src/flash/nand.c
Log:
Nicolas Pitre nico at cam.org  don't ignore bad options passed to the "nand write" command

Modified: trunk/src/flash/nand.c
===================================================================
--- trunk/src/flash/nand.c	2009-03-01 20:54:22 UTC (rev 1385)
+++ trunk/src/flash/nand.c	2009-03-01 20:56:18 UTC (rev 1386)
@@ -287,7 +287,7 @@
 		register_command(cmd_ctx, nand_cmd, "dump", handle_nand_dump_command, COMMAND_EXEC,
 						 "dump from NAND flash device <num> <filename> <offset> <size> [options]");
 		register_command(cmd_ctx, nand_cmd, "write", handle_nand_write_command, COMMAND_EXEC,
-						 "write to NAND flash device <num> <filename> <offset> [options]");
+						 "write to NAND flash device <num> <filename> <offset> [oob_raw|oob_only]");
 		register_command(cmd_ctx, nand_cmd, "raw_access", handle_nand_raw_access_command, COMMAND_EXEC,
 						 "raw access to NAND flash device <num> ['enable'|'disable']");
 	}
@@ -1254,7 +1254,6 @@
 		u8 *oob = NULL;
 		u32 oob_size = 0;
 			
-		duration_start_measure(&duration);
 		offset = strtoul(args[2], NULL, 0);
 		
 		if (argc > 3)
@@ -1269,10 +1268,13 @@
 				else
 				{
 					command_print(cmd_ctx, "unknown option: %s", args[i]);
+					return ERROR_COMMAND_SYNTAX_ERROR;
 				}
 			}
 		}
 		
+		duration_start_measure(&duration);
+
 		if (fileio_open(&fileio, args[1], FILEIO_READ, FILEIO_BINARY) != ERROR_OK)
 		{
 			return ERROR_OK;

[Openocd-svn] r1385 - trunk/src/flash

[<oh...@ma...>]

Author: oharboe
Date: 2009-03-01 21:54:22 +0100 (Sun, 01 Mar 2009)
New Revision: 1385

Modified:
   trunk/src/flash/nand.c
Log:
Nicolas Pitre nico at cam.org The code unconditionally writes into the oob area all the time.


Modified: trunk/src/flash/nand.c
===================================================================
--- trunk/src/flash/nand.c	2009-03-01 20:53:17 UTC (rev 1384)
+++ trunk/src/flash/nand.c	2009-03-01 20:54:22 UTC (rev 1385)
@@ -911,7 +911,10 @@
 		 * or 2048 for the beginning of OOB area)
 		 */
 		device->controller->address(device, 0x0);
-		device->controller->address(device, 0x8);
+		if (data)
+			device->controller->address(device, 0x0);
+		else
+			device->controller->address(device, 0x8);
 		
 		/* row */
 		device->controller->address(device, page & 0xff);

[Openocd-svn] r1384 - trunk/src/flash

[<oh...@ma...>]

Author: oharboe
Date: 2009-03-01 21:53:17 +0100 (Sun, 01 Mar 2009)
New Revision: 1384

Modified:
   trunk/src/flash/nand.c
Log:
Nicolas Pitre nico at cam.org  spelling

Modified: trunk/src/flash/nand.c
===================================================================
--- trunk/src/flash/nand.c	2009-02-26 10:06:00 UTC (rev 1383)
+++ trunk/src/flash/nand.c	2009-03-01 20:53:17 UTC (rev 1384)
@@ -530,7 +530,7 @@
 			device->address_cycles = 5;
 		else
 		{
-			LOG_ERROR("BUG: small page NAND device with more than 32 GiB encountered");
+			LOG_ERROR("BUG: large page NAND device with more than 32 GiB encountered");
 			device->address_cycles = 6;
 		}
 	}
@@ -1345,7 +1345,7 @@
 		oob = NULL;
 		page = NULL;
 		duration_stop_measure(&duration, &duration_text);
-		command_print(cmd_ctx, "wrote file %s to NAND flash %s at offset 0x%8.8x in %s",
+		command_print(cmd_ctx, "wrote file %s to NAND flash %s up to offset 0x%8.8x in %s",
 			args[1], args[0], offset, duration_text);
 		free(duration_text);
 		duration_text = NULL;

[Openocd-svn] r1383 - trunk/src/flash

[ntfreak at B. <nt...@ma...>]

Author: ntfreak
Date: 2009-02-26 11:06:00 +0100 (Thu, 26 Feb 2009)
New Revision: 1383

Modified:
   trunk/src/flash/stm32x.c
Log:
- stm32x flash driver - add support for stm32105/107 (connectivity line)

Modified: trunk/src/flash/stm32x.c
===================================================================
--- trunk/src/flash/stm32x.c	2009-02-24 06:38:04 UTC (rev 1382)
+++ trunk/src/flash/stm32x.c	2009-02-26 10:06:00 UTC (rev 1383)
@@ -508,7 +508,7 @@
 		0x01, 0x3A,					/* subs	r2, r2, #1 */
 		0xED, 0xD1,					/* bne	write */
 									/* exit: */
-		0xFE, 0xE7,					/* b exit */		           	
+		0xFE, 0xE7,					/* b exit */
 		0x10, 0x20, 0x02, 0x40,		/* STM32_FLASH_CR:	.word 0x40022010 */
 		0x0C, 0x20, 0x02, 0x40		/* STM32_FLASH_SR:	.word 0x4002200C */
 	};
@@ -757,6 +757,21 @@
 			num_pages = 512;
 		}
 	}
+	else if ((device_id & 0x7ff) == 0x418)
+	{
+		/* connectivity line density - we have 1k pages
+		 * 4 pages for a protection area */
+		page_size = 1024;
+		stm32x_info->ppage_size = 4;
+		
+		/* check for early silicon */
+		if (num_pages == 0xffff)
+		{
+			/* number of sectors incorrect on revZ */
+			LOG_WARNING( "STM32 flash size failed, probe inaccurate - assuming 256k flash" );
+			num_pages = 256;
+		}
+	}
 	else
 	{
 		LOG_WARNING( "Cannot identify target as a STM32 family." );
@@ -875,6 +890,23 @@
 				break;
 		}
 	}
+	else if ((device_id & 0x7ff) == 0x418)
+	{
+		printed = snprintf(buf, buf_size, "stm32x (Connectivity) - Rev: ");
+		buf += printed;
+		buf_size -= printed;
+		
+		switch(device_id >> 16)
+		{
+			case 0x1000:
+				snprintf(buf, buf_size, "A");
+				break;
+
+			default:
+				snprintf(buf, buf_size, "unknown");
+				break;
+		}
+	}
 	else
 	{
 		snprintf(buf, buf_size, "Cannot identify target as a stm32x\n");

[Openocd-svn] r1382 - in trunk/testing/examples: . STM32-103

[oharboe at B. <oh...@ma...>]

Author: oharboe
Date: 2009-02-24 07:38:04 +0100 (Tue, 24 Feb 2009)
New Revision: 1382

Added:
   trunk/testing/examples/STM32-103/
   trunk/testing/examples/STM32-103/main.elf
   trunk/testing/examples/STM32-103/readme.txt
Log:
test files for stm32

Added: trunk/testing/examples/STM32-103/main.elf
===================================================================
(Binary files differ)


Property changes on: trunk/testing/examples/STM32-103/main.elf
___________________________________________________________________
Name: svn:mime-type
   + application/octet-stream

Added: trunk/testing/examples/STM32-103/readme.txt
===================================================================
--- trunk/testing/examples/STM32-103/readme.txt	2009-02-23 21:36:23 UTC (rev 1381)
+++ trunk/testing/examples/STM32-103/readme.txt	2009-02-24 06:38:04 UTC (rev 1382)
@@ -0,0 +1,6 @@
+Olimx STM32-p103 board.
+
+main.elf is a file that can be programmed to flash for
+testing purposes(e.g. test GDB load performance).
+
+http://www.olimex.com/dev/stm32-p103.html
\ No newline at end of file

[Openocd-svn] r1381 - zy1000/trunk/ecoshal/hal/zylin/phi/current/include/pkgconf

[oharboe at B. <oh...@ma...>]

Author: oharboe
Date: 2009-02-23 22:36:23 +0100 (Mon, 23 Feb 2009)
New Revision: 1381

Modified:
   zy1000/trunk/ecoshal/hal/zylin/phi/current/include/pkgconf/mlt_zylin_phi_dram_fast.ldi
Log:
cortex perf wip

Modified: zy1000/trunk/ecoshal/hal/zylin/phi/current/include/pkgconf/mlt_zylin_phi_dram_fast.ldi
===================================================================
--- zy1000/trunk/ecoshal/hal/zylin/phi/current/include/pkgconf/mlt_zylin_phi_dram_fast.ldi	2009-02-23 21:26:11 UTC (rev 1380)
+++ zy1000/trunk/ecoshal/hal/zylin/phi/current/include/pkgconf/mlt_zylin_phi_dram_fast.ldi	2009-02-23 21:36:23 UTC (rev 1381)
@@ -176,6 +176,16 @@
 		KEEP (*(.text.*flip_u32*))    ;
 		KEEP (*(.text.*bit_reverse_table256*))    ;
 		//KEEP (*zy1000*)    ;
+
+		KEEP (*(.text.*scan_inout_check_u32*))    ;
+		KEEP (*(.text.*swjdp_scan*))    ;
+		KEEP (*(.text.*ahbap_write_buf_u32*))    ;
+		KEEP (*(.text.*ahbap_write_system_atomic_u32*))    ;
+		KEEP (*(.text.*ahbap_read_system_atomic_u32*))    ;
+		KEEP (*(.text.*swjdp_transaction_endcheck*))    ;
+		KEEP (*(.text.*buf_cmp_mask*))    ;
+		KEEP (*(.text.*buf_cpy*))    ;
+
 		 
 . = ALIGN (4);
        __fastdata_end_load = LOADADDR(.fastdata) + SIZEOF(.fastdata);

[Openocd-svn] r1380 - trunk/src/target

[oharboe at B. <oh...@ma...>]

Author: oharboe
Date: 2009-02-23 22:26:11 +0100 (Mon, 23 Feb 2009)
New Revision: 1380

Modified:
   trunk/src/target/cortex_swjdp.c
   trunk/src/target/target.c
Log:
tinkered a bit with performance for Cortex flash programming. Mainly make it easier to profile as a start.

Modified: trunk/src/target/cortex_swjdp.c
===================================================================
--- trunk/src/target/cortex_swjdp.c	2009-02-23 06:30:15 UTC (rev 1379)
+++ trunk/src/target/cortex_swjdp.c	2009-02-23 21:26:11 UTC (rev 1380)
@@ -5,6 +5,9 @@
  *   Copyright (C) 2008 by Spencer Oliver                                  *
  *   sp...@sp...                                                  *
  *                                                                         *
+ *   Copyright (C) 2009 by Oyvind Harboe                                   *
+ *   oyv...@zy...                                               *
+ *																		   *
  *   This program is free software; you can redistribute it and/or modify  *
  *   it under the terms of the GNU General Public License as published by  *
  *   the Free Software Foundation; either version 2 of the License, or     *
@@ -178,7 +181,7 @@
 	int retval;
 	u32 ctrlstat;
 
-	keep_alive();
+	/* too expensive to call keep_alive() here */
 
 	/* Danger!!!! BROKEN!!!! */
 	scan_inout_check_u32(swjdp, SWJDP_IR_DPACC, DP_CTRL_STAT, DPAP_READ, 0, &ctrlstat);
@@ -199,27 +202,33 @@
 
 	swjdp->ack = swjdp->ack & 0x7;
 
-	long long then=timeval_ms();
-	while (swjdp->ack != 2)
+	if (swjdp->ack != 2)
 	{
-		if (swjdp->ack == 1)
+		long long then=timeval_ms();
+		while (swjdp->ack != 2)
 		{
-			if ((timeval_ms()-then) > 1000)
+			if (swjdp->ack == 1)
 			{
-				LOG_WARNING("Timeout (1000ms) waiting for ACK = OK/FAULT in SWJDP transaction");
+				if ((timeval_ms()-then) > 1000)
+				{
+					LOG_WARNING("Timeout (1000ms) waiting for ACK = OK/FAULT in SWJDP transaction");
+					return ERROR_JTAG_DEVICE_ERROR;
+				}
+			}
+			else
+			{
+				LOG_WARNING("Invalid ACK in SWJDP transaction");
 				return ERROR_JTAG_DEVICE_ERROR;
 			}
+
+			scan_inout_check_u32(swjdp, SWJDP_IR_DPACC, DP_CTRL_STAT, DPAP_READ, 0, &ctrlstat);
+			if ((retval=jtag_execute_queue())!=ERROR_OK)
+				return retval;
+			swjdp->ack = swjdp->ack & 0x7;
 		}
-		else
-		{
-			LOG_WARNING("Invalid ACK in SWJDP transaction");
-			return ERROR_JTAG_DEVICE_ERROR;
-		}
-
-		scan_inout_check_u32(swjdp, SWJDP_IR_DPACC, DP_CTRL_STAT, DPAP_READ, 0, &ctrlstat);
-		if ((retval=jtag_execute_queue())!=ERROR_OK)
-			return retval;
-		swjdp->ack = swjdp->ack & 0x7;
+	} else
+	{
+		/* common code path avoids fn to timeval_ms() */
 	}
 
 	/* Check for STICKYERR and STICKYORUN */

Modified: trunk/src/target/target.c
===================================================================
--- trunk/src/target/target.c	2009-02-23 06:30:15 UTC (rev 1379)
+++ trunk/src/target/target.c	2009-02-23 21:26:11 UTC (rev 1380)
@@ -1700,33 +1700,42 @@
 	return target_wait_state(target, TARGET_HALTED, ms);
 }
 
+/* wait for target state to change. The trick here is to have a low
+ * latency for short waits and not to suck up all the CPU time
+ * on longer waits.
+ *
+ * After 500ms, keep_alive() is invoked
+ */
 int target_wait_state(target_t *target, enum target_state state, int ms)
 {
 	int retval;
-	struct timeval timeout, now;
+	long long then=0, cur;
 	int once=1;
-	gettimeofday(&timeout, NULL);
-	timeval_add_time(&timeout, 0, ms * 1000);
 
 	for (;;)
 	{
 		if ((retval=target_poll(target))!=ERROR_OK)
 			return retval;
-		keep_alive();
 		if (target->state == state)
 		{
 			break;
 		}
+		cur = timeval_ms();
 		if (once)
 		{
 			once=0;
+			then = timeval_ms();
 			LOG_DEBUG("waiting for target %s...",
 				Jim_Nvp_value2name_simple(nvp_target_state,state)->name);
 		}
 
-		gettimeofday(&now, NULL);
-		if ((now.tv_sec > timeout.tv_sec) || ((now.tv_sec == timeout.tv_sec) && (now.tv_usec >= timeout.tv_usec)))
+		if (cur-then>500)
 		{
+			keep_alive();
+		}
+
+		if ((cur-then)>ms)
+		{
 			LOG_ERROR("timed out while waiting for target %s",
 				Jim_Nvp_value2name_simple(nvp_target_state,state)->name);
 			return ERROR_FAIL;

[Openocd-svn] r1379 - trunk/src/target/target

[<oh...@ma...>]

Author: oharboe
Date: 2009-02-23 07:30:15 +0100 (Mon, 23 Feb 2009)
New Revision: 1379

Modified:
   trunk/src/target/target/pxa270.cfg
Log:
Sergey Lapin <sla...@gm...> fix typo

Modified: trunk/src/target/target/pxa270.cfg
===================================================================
--- trunk/src/target/target/pxa270.cfg	2009-02-22 17:01:16 UTC (rev 1378)
+++ trunk/src/target/target/pxa270.cfg	2009-02-23 06:30:15 UTC (rev 1379)
@@ -32,7 +32,7 @@
 
 
 set _TARGETNAME [format "%s.cpu" $_CHIPNAME]
-jtag newtap $_TARGETNAME -irlen 7 -ircapture 0x1 -irmask 0x7f -expected-id $_CPUTAPID
+jtag newtap $_CHIPNAME cpu -irlen 7 -ircapture 0x1 -irmask 0x7f -expected-id $_CPUTAPID
 
 target create $_TARGETNAME xscale -endian $_ENDIAN -chain-position $_TARGETNAME -variant pxa27x
 # maps to PXA internal RAM. If you are using a PXA255