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Simple decade counter runtime errors -- JK flip flops work fine

2017-07-10
2017-07-10
  • Amal Banerjee

    Amal Banerjee - 2017-07-10

    Could some Bgspice guru please help ? I have a simple decade
    counter with 4 JK flip-flops and Level 3 MOSFETs. THe JK flip-flop
    works fine on its own = but when cascaded in series. The netlist
    and error message are listed below. Thanks in advance for your
    help.

    .PARAMS OFFSET=0.0 AMPL=4.5 DLY=0.0 TR=5.0us
    + TF=5.0us PW=15.0us PER=35.0us
    
    .SUBCKT INV 1 2 3
    * 1 VDD
    * 2 IN
    * 3 OUT
    M0 3 2 1 1 M_PMOS L=1.0u W=1.75u
    M1 3 2 0 0 M_NMOS L=1.0u W=5.0u
    .ENDS
    
    .SUBCKT BUFFER 1 2 3 4 5 6 7 8 9
    * 1 VDD
    * 2 IN 1
    * 3 OUT 1
    * 4 IN 2
    * 5 OUT 2
    * 6 IN 3
    * 7 OUT 3
    * 8 IN 4
    * 9 OUT 4
    XINV0 1 2 10 INV
    XINV1 1 10 3 INV
    XINV2 1 4 11 INV
    XINV3 1 11 5 INV
    XINV4 1 6 12 INV
    XINV5 1 12 7 INV
    XINV6 1 8 13 INV
    XINV7 1 13 9 INV
    .ENDS
    
    .SUBCKT NAND2 1 2 3 4
    * 1 VDD
    * 2 IN 1
    * 3 IN 2
    * 4 OUT
    M0 4 2 1 1 M_PMOS L=1.0u W=1.5u
    M1 4 3 1 1 M_PMOS L=1.0u W=1.5u
    M2 4 2 5 5 M_NMOS l=1.0U w=15.0U
    M3 5 3 0 0 M_NMOS L=1.0u W=20.0u
    .ENDS
    
    .SUBCKT NAND3 1 2 3 4 5
    * 1 VDD
    * 2 IN 1
    * 3 IN 2
    * 4 IN 3
    * 5 OUT
    M0 5 2 1 1 M_PMOS L=1.0u W=1.5u
    M1 5 3 1 1 M_PMOS L=1.0u W=1.5u
    M2 5 4 1 1 M_PMOS L=1.0u W=1.5u
    M4 5 2 6 6 M_NMOS L=1.0u W=15.0u
    M5 6 3 7 7 M_NMOS L=1.0u W=20.0u
    M6 7 4 0 0 M_NMOS L=1.0u W=30.0u
    *R0 8 0 1.0M
    .ENDS
    
    .SUBCKT JKFF 1 2 3 4 5 6
    * 1 VDD
    * 2 J
    * 3 K
    * 4 CLK
    * 5 Q
    * 6 QB
    XND0 1 6 4 2 7 NAND3
    XND1 1 5 4 3 8 NAND3
    XND2 1 7 6 5 NAND2
    XND3 1 8 5 6 NAND2
    .ENDS
    
    VDD 1 0 DC 5.0 AC 0.0
    VCLK 2 0 DC 0.0001 PULSE({OFFSET} {AMPL} {DLY} {TR}
    + {TF} {PW} {PER})
    * SINGLE JK FF TEST
    *VP1 3 0 DC 0.0001 PWL(0 0 5.0us 0 10.0us 2 15.0us 3
    *+ 20.0us 4 25.0us 4 30.0us 4 35.0us 3 40.0us 0 45.0us 0)
    *VP2 4 0 DC 0.0001
    *XJK0 1 3 4 2 6 7 JKFF
    
    XINV0 1 2 3 INV
    XBUF 1 4 5 6 7 8 9 10 11 BUFFER
    XJK0 1 12 13 3 14 4 JKFF
    XJK1 1 15 16 5 17 6 JKFF
    XJK2 1 18 19 7 20 8 JKFF
    XJK3 1 21 22 9 23 10 JKFF
    
    .OPTIONS METHOD=GEAR ITER=20000 NOPAGE
    * SINGLE JK FF TEST
    *.TRAN 10.0us 100.0us 5.0us ;UIC
    *.PRINT TRAN V(6) V(7)
    
    * DECADE COUNTER TEST
    .IC V(6)=0.15 V(10)=0.2 V(14)=0.175 V(18)=0.8
    .PROBE
    .TRAN 10.0us 360.0us 5.0us ;UIC
    .PRINT TRAN V(14) V(17)
    .END
    

    ERROR MESSAGE:

    Doing analysis at TEMP = 27.000000 and TNOM = 27.000000
    Note: Starting dynamic gmin stepping

    snip>

    Warning: Dynamic gmin stepping failed
    Note: Starting source stepping

    <snip>

    Supplies reduced to 0.1000% Warning: singular matrix: check nodes 22 and 22
    Supplies reduced to 0.0000% Warning: singular matrix: check nodes 22 and 22
    Warning: source stepping failed
    Transient solution failed -

    <snip>

    doAnalyses: iteration limit reached

    run simulation(s) aborted

     

    Last edit: Robert Larice 2017-07-10
    • Robert Larice

      Robert Larice - 2017-07-10

      Hello Amal,
      ngspice said "check node 22"-

      If you look at node 22, then you will see that this is only connected
      to the "K" input of you JKFF. In other words, it is undriven and dangling in mid air.

      You need to fix your circuit,

      Regards,

       
  • marcel hendrix

    marcel hendrix - 2017-07-10

    You should add the models that you are using (I added the ones you supplied in a previous posting.)

    I agree that the circuit does not converge for the decade counter,
    and that it should.
    BTW: The "decade counter" won't do anything because all the
    J and K inputs are "0". The clk is distributed in a way that you probably
    did not intend.

    -marcel

     
    • marcel hendrix

      marcel hendrix - 2017-07-10

      When Robert's reply is not explicit enough --
      The circuit runs fine when modified as follows
      (all J and K inputs grounded instead of left floating):

      * DECADE COUNTER TEST
      XINV0 1 2 3 INV
      XBUF 1  4  5 6  7  8 9 10 11 BUFFER
      XJK0 1  0  0 3 14  4 JKFF
      XJK1 1  0  0 5 17  6 JKFF
      XJK2 1  0  0 7 20  8 JKFF
      XJK3 1  0  0 9 23 10 JKFF
      .IC V(6)=0.15 V(10)=0.2 V(14)=0.175 $ V(18)=0.8
      .PROBE
      .TRAN 10us 360us 5us $ UIC
      .PRINT TRAN V(14) V(17)
      

      -marcel

       

      Last edit: marcel hendrix 2017-07-10
      • Amal Banerjee

        Amal Banerjee - 2017-07-11

        Thanks yo each of you for your help. In practice, some pins of
        some devices are often left dangling, and circuit works fine. I
        did not realize that the SPICE solver wants all unused pins to
        be grounded.

         
        • marcel hendrix

          marcel hendrix - 2017-07-11

          On 2017-07-11 07:55, Amal Banerjee wrote:

          In practice, some pins of
          some devices are often left dangling, and circuit works fine.

          Yes, but some percentage of the circuits that are build this way
          will fail to work.

          On the other hand, that the circuit works in SPICE with default
          parameters does not mean that 100% of the actually build circuits
          work in the real world.

          -marcel

           
        • Justin Fisher

          Justin Fisher - 2017-07-11

          Amal.

          This is not true. If you ground a low impedance node - as you did in your
          previous example, the circuit will not function.

          High impedance nodes, in SPICE and in reality must be terminated properly.

          --
          Kind regards,
          Justin Fisher.

          Sent from my phone.

           

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