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VHDL 2008/93/87 simulator
Verilog Finite State Machine (FSM) Code Generator
FFT co-processor in Verilog based on the KISS FFT
Powerfull pre-processor
Library of Approximate Adders
cMIPS - an FPGA ready VHDL model for 5-stage pipeline, MIPS32r2 core
Simple CPU for education
VHDL Design Tool - code generation and project management