Search Results for "dxvk-2.0"

Icarus Verilog is an open source Verilog compiler that supports the IEEE-1364 Verilog HDL including IEEE1364-2005 plus extensions.

A new 64-bit RISC platform, complemented by a set of development tools, standards specifications and synthesizable VHDL implementations.

Firmware development/ improvement for the digital storage oscilloscope "Welec 2000a- series".

Tool suite and libraries for developing system-c models. Tools for managing RTL projects.

vrq is verilog parser that supports plugin tools to process verilog. Current plugins include tools to perform x-propagation and to auto build hiearchy.

Tools for FPGA development and IP cores. This project provides tools, cores and documentation to develope FPGA applications. The project focuses on VHDL.

bel_fft is a FFT co-processor that can calculate FFTs with arbitrary radix. It is a hardware implementation of the free software Kiss FFT ("Keep it simple, Stupid!"). The target was to allow a simple replacement of the software code with the hardware implementation. Therefore bel_fft comes with a software driver that is compatible with the Kiss FFT routines. bel_fft also has a modular architecture and allows interfacing different bus architectures. So far AMBA AXI, Altera's Avalon bus and...

GHDL is the leading open source VHDL simulator. *** Now on github.com/tgingold/ghdl *** We have binary distributions for Debian Linux, Mac OSX and Windows. On other systems, getting GHDL from here means downloading the current source package and building GHDL from source. Alternatively you can get the latest source version (warning : occasionally unstable!) by pulling a snapshot from the git repository.

FSMDesigner is a C++ based implementation for a Finite State Machine (FSM) design tool with integrated Hardware Description Language (HDL) generation. FSMDesigner4 uses the Simple-Moore FSM model guaranteeing efficient fast complex control circuits.

NOCEXplore is a Network-on-Chip design exploration tool based on SystemC. It includes libraries and executables for easy and fast upgradeable NoC models and a set of shell scripts. The project started during the PhD of Stefano Gigli at DII of Universita' Politecnica delle Marche (http://www.dii.univpm.it/) under the supervision of Prof. Massimo Conti and contribution of several students.

ASIC research and development

Oscilloscope components, including 100MHz quad A/D, VHDL code for Xilinx FPGA, and driver for Octave or Matlab.

Minimig is an open source FPGA Amiga chipset re-implementation created and designed by Dennis van Weeren - http://home.hetnet.nl/~weeren001/

Sharp MZ800 univerzalni karta periferii 1 ----------------------------------------- Contains peripherals: emulator of FDC WD279x, RTC, single channel SIO, repository manager, LAN10Mbit Chips on the card: STM32F101, XC9356, ENC28J60, FT232RL, MAX3232

MiniLA logic analyzer software and hardware

This project introduces new FPGA architectural tools and Linux OS modifications that aid in supporting Dynamic Partial Reconfiguration (DPR) on FPGAs for concurrent control. It shows that control systems benefit from hardware concurrency, meaning that by moving the control intelligence into hardware, the negative effects inherent to threads and their scheduler are minimized. This leaves software with the role of a high-level administrator rather than an executor, thereby eliminating...

HDL Analyzer and Netlist Architect (HANA): An open source analysis and synthesis tool for design written in Verilog 2001 HDL

Sistema Operacional baseado no Ubuntu 11.04 (natty) 64bits destinado à profissionais e estudantes de eletrônica. O sistema foi gerado principalmente para trabalhos elaborados com o hardware arduino, mas foi evoluindo e hoje trabalha com vários outros equipamentos. A senha para login (Arduino ou root) é arduino. Para baixar pelo DropBox, eis o link: http://dl.dropbox.com/u/65818773/arduloko.iso User: Arduino Pass: arduino User: Root Pass: arduino

Application defines templates of VHDL structures, which allows us comfortly generate most used VHDL structures. It can also work with VHDL testbench templates from which can be created VHDL testbenches of existing projects.

Devellopement d'un controlleur d'affichage (VIC) du commodore 64 embarqué dans un FPGA avec controlleur d'animation integré.

vcd2svg can parse Value Change Dump (VCD) files and draw an impulse diagram using Scalable Vector Graphics (SVG). It works together with the GHDL open-source simulator.

xswifs stands for: cross SoftWare Interfaces. This project provide examples (snippets) for interfacing various software tools and languages with various mechanism. It has been created to help in HW/SW co-simulation and to provide benchmarks.

Collection of VHDL libraries for ASIC/FGPA development

Expansion card for 8 bit computer Sharp MZ-800. Connection to SD / MMC card with FAT16 filesystem. Emulated FD controller. MZF repository. This project is already stoped. Please see the MZ800 Unicard 2nd generation https://sourceforge.net/projects/mz800ukp1/

A methodology to create netlists for printed circuit board layout using a novel PCB specific HDL as the source language.