Search Results for "fpga"
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Showing 161 open source projects for "fpga"
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AWS EC2 FPGA
AWS EC2 FPGA hardware and software development Kit
AWS EC2 FPGA Development Kit is a set of development and runtime tools to develop, simulate, debug, compile and run hardware-accelerated applications on Amazon EC2 F1 instances. It is distributed between this GitHub repository and FPGA Developer AMI - Centos/AL2 provided by AWS with no cost of development tools. After creating an FPGA design (also called CL - Custom logic), developers can create an Amazon FPGA Image (AFI) and easily deploy it to an F1 instance. AFIs are reusable, shareable... -
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dsp-fpga-dip-nn-itba
Archivos para TPs de materias de Ingeniería Electrónica - ITBA
Repositorio de archivos varios para TPs de materias de la carrera Ingeniería Electrónica del Instituto Tecnológico de Buenos Aires (ITBA). En general, son archivos .zip con imágenes o audios, para descargar en notebooks de Python (Jupyter) con wget o similares. 22.49 - Laboratorio de Dsp_fpga --->>> dsp-fpga 22.48 - Procesamiento de Imágenes --->>> dip 25.87 - Redes Neuronales II --->>> nn 22.46 - Procesamiento Adaptativo de Señales --->>> pasa -
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Openwifi
open-source IEEE 802.11 WiFi baseband FPGA (chip) design
Linux mac80211 compatible full-stack IEEE802.11/Wi-Fi design based on SDR (Software Defined Radio). -
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SWUpdate
Software Update for Embedded Systems
SWUpdate is a Linux Update agent with the goal to provide an efficient and safe way to update an embedded Linux system in the field. SWUpdate supports local and OTA updates and multiple update strategies and it is designed with security in mind. To start with SWUpdate, it is suggested you look at the documentation and build for one evaluation board (or you run SWUpdate on your host for a first overview). If you plan to update your device locally or remotely, SWUpdate is the right framework... -
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V4SA Emutos
Emutos version version for v4sa Amiga card, based on Emutos 1.0
This is a version dedicated to Emutos for Apollo V4SA card able to run Atari on this standalone card with 68080 FPGA and SAGA. This version of Emutos is based on Emutos 1.0 version you can find Emutos official at https://github.com/emutos -
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Software interface and gateware for magnetic resonance experiments using the limesdr board, as detailed in https://doi.org/10.1063/1.5127746 December 2019: Initial release containing the software used in the publication. In particular, the FPGA gateware, Cpp interface routines and the limr python class. The Cpp interface routines require compilation and the compilation call is found in the files. The FPGA gateware needs to be downloaded to the FPGA using LimeSuiteGUI. At the time...
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Computer From Scratch
Verilog source files for a basic computer
This project follows The Elements of Computing fundamentals book, except all the hardware is written in Verilog . This is currently a hobby project, eventually I plan on implementing this onto a FPGA and tinkering with it some more. -
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QtPALS
Qt software for positron lifetime measurement
PALS software using DRS4 EVM board (http://www.psi.ch/drs/evaluation-board) to determine time between two pulses. Time distance is then send to histogram and evaluated in odher programs likes LT or PALSFit. 2, 3 or 4 detector PALS setup. DRS4 inputs: Ch1 - Start detector 1274keV, Ch2 - 511keV stop detector1, Ch3 511keV - stop detector 2, Ch4 - external trigger input - after FPGA firmware no external trigger needed. -
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ALCHA
A New Programming Language for FPGA Projects
ALCHA aims to reduce FPGA project develop time by means of automation and abstraction, but without loosing the low-level control that HDLs, such as Verilog, provides. It will support an object oriented programming model, abstract data and signal types, and compile-time scripting. -
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Gwyscope
Open hardware SPM controller with advanced sampling support.
... It is based on a low cost FPGA board Red Pitaya and additional high bit depth AD and DA converters. When put together with the AFM scanning hardware (sensor, scanner and their amplifiers) and user interface software it can serve as a standalone SPM system. Otherwise, it can serve as a sub-module for a custom built SPM system, e.g. providing the feedback loop mechanism only. Finally, it can be used as a board for developing advanced sampling techniques, which was the primary goal. -
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Iris
2-photon scanning software
Iris is a LabVIEW package, developed at the Keller Lab (Basel FMI), for running 2-photon microscopes. It is supplied with auxiliary software for recording additional experimental parameters, such as behavioral states. Iris is freely available. You may modify it as you wish and use it as you wish, so long as you comply with the licence terms (see below). However, please note that we are **unable to offer any guarantee of support**. There are two exceptions to this. 1) If you find a... -
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DarFPGA
FPGA software and hardware
FPGA software and hardware, mainly recreation of old stuff (Arcade or 8bits computer) at low cost. -
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SYSU-OpenEdgeAI
A public account displaying works from SYSU-OpenEdgeAI Club
.... 3. rapidlayout.zip is an end-to-end hard block placement and routing flow for systolic accelerators on FPGA, RapidLayout. It is the sourcecode of our paper:https://ieeexplore.ieee.org/document/9221566 . If you have any question about our projects, please leave reviews and contact us! -
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UFBmod
#6 - Ultra-Fine-Business Modulation
#6 - Ultra-Fine-Business Modulation - Trying a new data modulation to compete with LoRa (R) -
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FUI Audio DAC
FPGA-Based USB-Input Audio Digital to Analogue Converter
An open-hardware and -firmware project that implements a USB-input fully-digital class-D audio amplifier. All processing is done on FPGA, including the USB-physical, USB-SIE, HID interface, clock-recovery, bus voltage regulation, noise-shaping and PWM output. A Microchip PIC based remote control is also included. The remote maps to the media buttons of the USB HID interface. The volume control, next track, previous track, stop and play/pause functions are supported. -
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pyrpl
PyRPL turns your Red Pitaya into a powerful analog feedback device.
The Red Pitaya is a commercial, affordable FPGA board with fast analog inputs and outputs. This makes it useful for quantum optics experiments, in particular as a digital feedback controller for analog systems. Based on the open source software provided by the board manufacturer, PyRPL (Python RedPitaya Lockbox) implements many devices that are needed for optics experiments with the Red Pitaya. PyRPL implements various digital signal processing (DSP) modules (see features below). It allows... -
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High Accuracy Approx Adder for FPGAs
Approximate Adder for FPGA-based Image Processing Applications
Using Approximate Computing, we have designed an innovative approximate adder with real-world image processing applications. The uploaded project includes its Matlab and Verilog models for result reproduction. This is an ongoing study and we aim to formally publish it for better understanding of viewers. -
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stage0
A set of minimal dependency bootstrap binaries
This is a set of manually created hex programs in a Cthulhu Path to madness fashion. Which only have the goal of creating a bootstrapping path to a C compiler capable of compiling GCC, with only the explicit requirement of a single 1 KByte binary or less. Additionally, all code must be able to be understood by 70% of the population of programmers. If the code can not be understood by that volume, it needs to be altered until it satisfies the above requirement. -
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Gen CSRs
Control/Status Register (CSR) Generator for FPGA and ASIC
CSR generator takes an input XML description and generates Verilog CSR implementation on APB bus, documentation, C header files and test collaterals. -
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Wheefun Computer Prototyping Kit
A Toolkit for Designing Computers
... controller). The VAI is designed to fit within an FPGA to be integrated into real designs. This library is licensed under the GPLv3 but also includes the classpath exception so that proprietary software can be linked against it required. -
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SC_CoSiM
SC_CoSiM is a plattform which focuses on validating a full system
SC_CoSiM is a platform which focuses on validating a full system, by performing near real-time, command-to-command co-simulation of the hardware DUT implemented on FPGA as a full system prototype (with CPU, on-chip interconnect, memory, application, drivers, and OS, typically Linux) against its equivalent cycle-approximate system-level model of the DUT. Our work presented at DVCon-Europe 2018 extended the technology demonstrator from David C Black(https://github.com/dcblack... -
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RapidSmith is a research-based FPGA CAD tool framework written in Java for modern Xilinx FPGAs. Based on XDL, its objective is to serve as a rapid prototyping platform for research ideas and algorithms relating to low level FPGA CAD tools.
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darc
Durham Adaptive-optics Real-time Controller
darc, the Durham Adaptive optics Real-time Controller. For documentation or darctalk client only, select "View all files". For the latest bleeding-edge version, please use: git clone git://git.code.sf.net/p/darc2/code darc (no password required) (this changed May 2013 due to a sourceforge update). If you use darc, please cite with: Basden, A and Myers, R, MNRAS Vol 242, page 1483, 2012 -
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ApproxFPGAs
An Open-source Approximate Adder Library for FPGAs
The "ApproxFPGAs" library contains all the RTL (VHDL) and behavioral (MATLAB) models of FPGA-based approximate adder designs presented at DATE 2018. In case of usage please refer to: B. S. Prabakaran, S. Rehman, M. A. Hanif, S. Ullah, G. Mazaheri, A. Kumar, M. Shafique, “DeMAS: An Efficient Design Methodology for Building Approximate Adders for FPGA-Based Systems”, IEEE/ACM 21st Design, Automation and Test in Europe Conference (DATE), March, 2018.