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Managing your therapy and rehab practice is a time-consuming process. You spend hours on paperwork, billing, scheduling, and more. Raintree’s Therapy & Rehab EHR is here to help you manage your practice more efficiently. With our all-in-one solution, you’ll get the tools you need to streamline your therapy and rehab practice, improve patient care, and get back to doing what you love.
This card will capture High Definition Video 1280x720 at 30fps, and soon be capable of 60fps and maybe even 1080p. This is a hardware project so source code, RTL, and board CAD files will be involved. All IC's and parts should be easily available.
This project implements an On Screen Display for FPV (First Person View) for RC planes. Sends telemetry data from GPS & sensors embebed with video information.
FPGAmer is a framework to develop embedded games. Our development platform is the Xilinx University Program Virtex-II-Pro but not limited to that. FPGAmer includes custom hardware components plus a custom software framework and some sample games.
Writing Testbenches for FPGA/ASIC design is always a very fastidious and boring task.
This project helps any FPGA/ASIC designer by providing a full RTL test environment with C support.
From desk booking and visitor management, to space planning and office utilization data, Eptura Workplace helps your entire organization work smarter.
With the world of work changed forever, it’s essential to manage your workplace and assets together to effectively create a high-performing environment. The Eptura experience combines the power of workplace management software with asset management, enabling you to effectively operate your building and facilitate hybrid work.
OpenVGA is an free and open FPGA-based implementation of a VGA compatible graphics adapter, and utilising low-cost hardware. The project includes the PCB schematic and artwork, Verilog HDL, firmware assembly code, and driver source code.
CRC Generator is a command-line application that generates Verilog or VHDL code for CRC of any data width between 1 and 1024 and polynomial width between 1 and 1024. The code is written in C for
Win32, bus easily portable for other platforms
A command-line application that generates Verilog or VHDL code for an LFSR counter of any value up to 63 bit wide. The code is written in C for Win32 platform
Scicos-HDL is a tool to design digital circuit system; it integrates the hardware circuit, algorithm and Scilab/Scicos environment as a plat for digital circuit design, simulation and Hardware Description Language generation. ZhangDong & KangCai
BackBox seamlessly integrates with network monitoring and NetOps platforms and automates configuration backups, restores, and change detection. BackBox also provides before and after config diffs for change management, and automated remediation of discovered network security issues.
Genode FX is a composition of hardware and software components that enable
the creation of fully fledged graphical user interfaces as system-on-chip
solutions using commodity FPGAs such as Xilinx' Spartan3 and Virtex FPGAs.
Software which runs on a gunstix overo, to contron stepper motors, and servos in such a way that they play the piano. The actual stepper motor and servo driver are done on an FPGA board from knjn.com (pluto-3).
Custom Architecture Generator Tool is a software based on the Netbeans Platform, the main purpose is to accelerate the embedded system realisation with a high level description: VHDL code,C2VHDL conversion,Quartus project generation,real time application
HW(VHDL) and SW of logic analyzer and On-Chip-Verification(OCV) for Value Change Dump(VCD) file format that exported to seemd SystemC ,ModelSIM, and many other EDA tools. Very easy and Simple.
The system allows running and controlling the MAC controller on the Xilinx board with Virtex. This way the project provides a set of features and functionality to easy build the application and eCos and TCP/IP FreeBSD with access to Xilinx MAC controller
The SBus is a family of high-speed packet-based databus standards, suitable for both networking and interdevice communication. They are optimized for high data density transactions. This project creates and documents the standards, schematics, and driver
Compiler-like program that checks Verilog source for common design errors. This tool can help beginning Verilog programmers who aren't aware of common design pitfalls and advanced Verilog programmers who want to double check large projects.
A collection of useful software packages to perform engineering tasks, especially electrical engineering and chip design. All packages come as shrink-wrapped installers for Apple's Mac OS X.
This project is a collection of Open Source crypto cores and implementations relating to high speed cryptanalysis/cracking and complex implementations.
m4-la is a Logic Analyzer written in VHDL for the Xilinx ML403 Development board featuring the Virtex4 FPGA. The user interface is written in C for Windows32 based platforms. Xilinx ISE and EDK tools compile the VHDL and MS Visual Studio compiles the UI.
Software to support the JTAG bus (IEEE 1149.1). Primary purpose is for a JTAG programmer/debugger using FPGA's to provide ability to test and program JTAG devices.
A software package that will combine different embedded computing platforms with home exercise equipment and a Qt client program in order to provide tracking of health and exercise performance.