VHDL Test Processor download

Writing Testbenches for FPGA/ASIC design is always a very fastidious and boring task.
This project helps any FPGA/ASIC designer by providing a full RTL test environment with C support.

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License

GNU General Public License version 2.0 (GPLv2)

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Additional Project Details

Operating Systems

BSD, Linux

Intended Audience

Engineering

Programming Language

C, VHDL/Verilog

Related Categories

C Software Testing Tool, VHDL/Verilog Software Testing Tool

Registered

2009-06-27

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