Search Results for "programming c++ library" - Page 2

Project CAPLET is a capacitance extraction toolkit that extract capacitance at field-solver accuracy. CAPLET can directly handle GDS2 layout files into capacitance matrices in both GUI and command line interfaces. The internal extraction algorithm is specialized for VLSI interconnect structures but not exclusively, as long as the structure is of Manhattan geometry and embedded in a uniform dielectric material.

This library consists in a shared library that can be compiled on Linux and Windows. Plus, it has a C# wrapper for Windows and Python Wrapper for Linux.

Highly tunable, simple to use collection of the templates, containing a set of classes for solving unconstrained large scale nonlinear optimization problems. Currently it contains: -- Limited Memory Quasi Newton (L-BFSG) -- BFSG -- Conjugate Gradient -- Gradient Descent -- Wolf condition Line Search -- Backtracking Line Search -- Exact Golden Search -- Golden Search with Wolf condition We also distribute a set of tests with the library.

QConsole is a custom Qt widget implementing a standard console to be inherited to support a specific scripting language or shell, and then embedded in any Qt application. As example, a Tcl console (QtclConsole) is provided for use in EDA applications

This is a collection of tools and a code library to assist engineers who are developing SystemVerilog based verification environments. Components include utility libraries, scoreboard and shutdown manager implementation, register tool, etc.

The Sampa library is a comprehensive C++ library and lua toolset to simulate and analyze system on chip architectures through fast cycle accurate transactional level simulation. Tags: ESL, SoC, NoC, TLM, interconnect, IP, SystemC. More on sampalib.org

This project has been moved to bitbucket.org: - https://bitbucket.org/vahidi/jbdd/wiki/Home - https://bitbucket.org/vahidi/jdd/wiki/Home It includes two libraries for working with decision diagrams: - JBDD: a Java interface to two popular BDD libraries, CUDD and BuDDy - JDD: a native Java library supporting BDD, Z-BDD

Framework for the Analysis and Modification of EDIF netlists (FAME) is a C++ framework, developed at Politecnico di Torino, aimed at automating the analysis and modification of complex circuit netlists described in the standard EDIF 2.0.0 language.

This is a simple viewer for the ``Stream Format'' for CALMA GDSII CAD libraries (``GDS II'', ``.gds'' or ``.sf'') with a couple of limitations. The main functionality is viewing the library layers with different colors.

Hantek DSO-2150 software (Voltcraft/Darkwire/Protek/Acetech e.t.c DSO-2090/2150/2250/5200A e.t.c)

vMAGIC is a Java-API which helps creating VHDL generators and analyzers. vMAGIC comprises three parts: 1st a VHDL'93 compliant parser, 2nd a programming model to easily create and modify VHDL constructs, and 3rd a VHDL Writer to generate code.

Language, compiler and simulator for CDL cycle description language Platforms: OSX, Linux, Cygwin CDL is a C-like language for hardware description; simulator generates C++ models and synthesizable verilog. Includes C++ cycle simulation engine.

GEZEL is a cycle-based hardware description language. The GEZEL tools offer stand-alone - and cosimulation, and code-generation into VHDL code. User-defined library-block extensions in C++ allow to add new cosimulation/cosynthesis interfaces.

Mixed Analog/Digital Simulator framework - parser and elaborator for Verilog and Verilog-AMS, and an extended C++ (ParC - http://parallel.cc) to be used as the simulation engine.

Currently, all existing formal tools are designed to serve as formal verifiers, using one implementation or another. JTLV is a new tool aimed to facilitate and provide a unified framework to the development of formal verification algorithms.

audacity-extra now provides a sleek dark themed version of the Audacity open source sound editor. The project experiments with Audacity variations. There's a vowel-sound target-practice display for language learners and an analog waveform data logger for embedded systems.

gnuProload is a tool for programming the AT89S52 microcontroller over Linux. Actually it is a Linux port of the 'Proload' and (easy-downloader) software created by Sunrom Technologies which can be used to program AT89S52 microcontrollers.

Oagen enables the use of Open Access PCells in a Cadence DFII Framework where Open Access is not supported.

Libraries and sample code for accessing remote toolpath delivery services such as VoluMill. Although much of the code is specific to the VoluMill service, it also defines open standards for exchanging toolpath information, parameters, and geometry.

NGerber is a small class library that allows .NET applications to easily write Gerber files (commonly used for EDA to specify circuit board layouts). Gerber files created with this library are compatible with the RS-274-X standard.

libLCS is a hardware description library in C++ aiming to be as powerfull and easy as the Verilog HDL. It currently supports logic gates, flipflops, clock, and facilitates delays, continuous assignments and variable value dumping into VCD files.

Java source to C source translator, which allows to write MCU programs in Java. Now AVR are supported, others can be added. Convenient Java methods instead of manual register handling.

The comprehensive C++ library MGEN for IC layout and connectivity comes with the X11/Motif full custom layout editor PARIS and the powerful waveform viewer/processor MANIAC. Industry proven, it is the basis for layout generators, placers, routers etc.

vcomp is a verilog compiler for x86 linux targets - it was a commercial product which is now in the process of being GPL'd

Hierarchical VCD Viewer is new trace file viewer. It's based on Qt 3.3.4 (migrating to Qt 4.1) graphic library and its main feature is to provide a hierarchical view of VCD trace file.