Search Results for "icarus verilog gui"
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Showing 17 open source projects for "icarus verilog gui"
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Red Hat Enterprise Linux (RHEL) on Microsoft Azure provides a secure, reliable, and flexible foundation for your cloud infrastructure. Red Hat Enterprise Linux on Microsoft Azure is ideal for enterprises seeking to enhance their cloud environment with seamless integration, consistent performance, and comprehensive support.
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Icarus Verilog is an open source Verilog compiler that supports the IEEE-1364 Verilog HDL including IEEE1364-2005 plus extensions.
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IP-XACT 2009/2014 Platform
Smart GUI/Commandline tools to create IP-XACT( 2009/2014) files
Smart GUI to create or update IP-XACT often needed for the IP packaging. It has capability create Bus Definitions from scratch to populate BusDef library. One can create IP-XACT Component, Design or Registers by importing Ip in System Verilog/Verilog-95/VHDL, instantiate Bus Interfaces with proper port maps and attributes as needed. Smart GUI to create IP-XACT Registers, Memory Maps, Address Blocks for IP- has feature to import XLS or Verilog . It has Tcl/Python API support... -
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pyrpl
PyRPL turns your Red Pitaya into a powerful analog feedback device.
... to arbitrarily interconnect the available DSP modules and retrieve signal values on timescales below 1 ms. The graphical user interface (GUI) provides a realtime display of the various measurement instruments and allows the easy configuration of DSP signal chains and feedback controllers. At the highest abstraction level, arbitrary feedback sequences can be defined to fulfill tasks as complex as approaching and locking a resonance of a high-finesse Fabry-Perot cavity (tested up to finesse=100,000). -
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zamiaCAD is a modular and extensible platform for HW design, analysis, and research. It translates a HW description (VHDL or Verilog) into a language independent IG structure. Applications like a simulator and an eclipse GUI build on top of the IG.
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ADManager Plus is a simple, easy-to-use Windows Active Directory (AD) management and reporting solution that helps AD administrators and help desk technicians in their day-to-day activities. With a centralized and intuitive web-based GUI, the software handles a variety of complex tasks like bulk management of user accounts and other AD objects, delegates role-based access to help desk technicians, and generates an exhaustive list of AD reports, some of which are an essential requirement to satisfy compliance audits. This Active Directory tool also offers mobile AD apps that empower AD admins and technicians to perform important user management tasks, on the move, right from their mobile devices. Create multiple users and groups in Office 365, manage licenses, create Exchange mailboxes, migrate mailboxes, set storage limits, add proxy addresses, and more.
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bel_fft
FFT co-processor in Verilog based on the KISS FFT
bel_fft is a FFT co-processor that can calculate FFTs with arbitrary radix. It is a hardware implementation of the free software Kiss FFT ("Keep it simple, Stupid!"). The target was to allow a simple replacement of the software code with the hardware implementation. Therefore bel_fft comes with a software driver that is compatible with the Kiss FFT routines. bel_fft also has a modular architecture and allows interfacing different bus architectures. So far AMBA AXI, Altera's Avalon bus and... -
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Project 2306 IDE Rad MacOS MCU DeveR
Electronic design and programming tools suite like Eagle, MpLab
... : Similar with mainstream market tools IDE and GUI Wrapper like : LabView©, Proteus©, MPLab©, Eagle CAD©, Tools Suite for Most Market Microcontroller. Tools suite for Arduino, Pinguino, Pic, AVR, ARM, Basic Stamp, Risc, other platform Fully Integrated IDE. Adobe PDF Help section SQL Connectivity Community Avail : https://www.facebook.com/Project-Core-2306-Nextgen-Eda-pcbradide-for-Mcumacoslinuxwindows-138250749681138/?fref=ts -
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CoreTML framework is an open-source template-based configuration system allowing the developer to create parametrized templates by inserting special content to any text files. Its main purpose is to serve as a toolkit for semiconductor IP core creation (based on VHDL/Verilog).
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vHDL Obfuscator GUI
vHDL Obfuscator is an small GUI to obfuscate and reformat HDL files
VHDL and Verilog HDL are standards languages for hardware description. Sometimes is necessary to share the source HDL file but maintaining a little level of control and protection of the intellectual property. This tool generate obfuscated code that is almost unreadable to humans, but is still readable to compilers and simulators. This tool use GHDL (https://sourceforge.net/projects/ghdl-updates/), HDLObf (https://sourceforge.net/projects/hdlobf/), Icarus Verilog (https://sourceforge.net... -
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FSMDesigner is a C++ based implementation for a Finite State Machine (FSM) design tool with integrated Hardware Description Language (HDL) generation. FSMDesigner4 uses the Simple-Moore FSM model guaranteeing efficient fast complex control circuits.
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TrustInSoft Analyzer is a C and C++ source code analyzer powered by formal methods, mathematical & logical reasonings that allow for exhaustive analysis of source code. This analysis can be run without false positives or false negatives, so that every real bug in the code is found. Developers receive several benefits: a user-friendly graphical interface that directs developers to the root cause of bugs, and instant utility to expand the coverage of their existing tests. Unlike traditional source code analysis tools, TrustInSoft’s solution is not only the most comprehensive approach on the market but is also progressive, instantly deployable by developers, even if they lack experience with formal methods, from exhaustive analysis up to a functional proof that the software developed meets specifications.
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libVerilogVPI
SEL for access verilog via PLI/VPI API. Tested with Icarus Verilog.
SFENCE Extension Library (SEL) for access verilog function via PLI/VPI API to calls of standard SFENCE Function_Function objects. -
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herramientas y widgets para escritorios que usen GTK.
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Endit is a text editor mean to HDL source code writing and hacking, like Verilog and VHDL. It integrated a open source verilog compiler , Icarus verilog compiler, in it which is also an excellent open source verilog compiler.
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Covered is a Verilog code coverage utility using VCD/LXT/FST dumpfiles (or VPI interface) and the design to generate line, toggle, memory, combinational logic, FSM state/arc and assertion coverage report metrics viewable via GUI or ASCII format. This project is ported to github and can be found at: https://github.com/chiphackers/covered
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Open source high-level synthesis system developed within the FP7 OSMOSIS project. Includes gcc-based SystemC front-end, database with browsing GUI, scheduler/allocator/binder, and Verilog back-end. (We are under migration to SVN server now)
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HdlEdit is a graphical design entry tool for VHDL and verilog. It's GUI is based on the FOX project. So both platforms linux and windows will be supported. Design entry could be done via block diagrams, flow charts and truth tables.
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Provides a GPL'd test suite for verification of the verilog language. This project is affiliated with the Icarus Verilog compiler effort at icarus.com, and test reports are collected from that project.
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