VeriWell is a full Verilog simulator. It supports nearly all of the IEEE1364-1995 standard, as well as PLI 1.0. Yes, VeriWell *is* the same simulator that was sold by Wellspring Solutions in the mid-1990 and was included with the Thomas and Moorby book
Download VeriWell Verilog Simulator
Project Admins:
elliot00, markhummel
Operating System:
OS Portable (Source code to work with many OS platforms)
License:
GNU General Public License (GPL)
Category:
Electronic Design Automation (EDA)
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Project Admins :
elliot00
, markhummel - Developers : 3
- Development Status : 5 - Production/Stable
- Intended Audience : Developers
- License : GNU General Public License (GPL)
- Operating System : OS Portable (Source code to work with many OS platforms)
- Programming Language : VHDL/Verilog
- Topic : Electronic Design Automation (EDA)
- Project UNIX name : veriwell
- Registered : 2005-09-09 15:31
- Activity Percentile (last week) : 99.01
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