Eclipse Verilog editor is a plugin for the Eclipse IDE. It provides Verilog(IEEE-1364) and VHDL language specific code viewer, contents outline, code assist etc. It helps coding and debugging in hardware development based on Verilog or VHDL.
Release Date:
2009-10-27
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Registered:
2004-03-07
Ratings and Reviews
- Thumbs up: 8
- Thumbs down: 0
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Thumbs up
Похоже неплохой плагин, надо будет присмотрется к ниму.
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nemiosrein created the >500k VHDL file - Outline does not work forum thread -
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nemiosrein created the Code folding for: for, if, while statements forum thread -
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pammerf created the VHDL Parse: generate statement artifact -
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pammerf created the VHDL Parse: file statement in VHDL87 syntax artifact -
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Anonymous created the VHDL93 component binding artifact -
Version 0.7.0 Released
Version 0.7.0 is released. Thanks to Stijn Last and his team for submitting most of the new features. Here's a list of what's new: * Goto Definition now also searches in packages of other files, not ... -
File released: /veditor source/VEditor 0.7.0/veditor_0_7_0.tar.bz
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File released: /veditor runtime/VEditor 0.7.0/net.sourceforge.veditor_0.7.0.jar
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