Eclipse Verilog editor is a plugin for the Eclipse IDE. It provides Verilog(IEEE-1364) and VHDL language specific code viewer, contents outline, code assist etc. It helps coding and debugging in hardware development based on Verilog or VHDL.
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desepe commented on the Folding enhancement artifact
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Anonymous created the VHDL records in auto-complete. artifact
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ihavnoid commented on the Auto formatter incorrectly formats VHDL 'case' statements artifact
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Anonymous created the Auto formatter incorrectly formats VHDL \'case\' statements artifact
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simonmartineau commented on the FormatAction: incorrect truncation at the end of text artifact
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simonmartineau commented on the Tabs space replace by blocks artifact
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simonmartineau commented on the mal-formated in code artifact
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Code committed
simonmartineau committed revision 563 to the Eclipse Verilog editor SVN repository, changing 1 files
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aghoras added aghoras to the Eclipse Verilog editor project
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jmlmanzano created the veditor for newbies (HOWTO) forum thread
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