Eclipse Verilog editor is a plugin for the Eclipse IDE. It provides Verilog(IEEE-1364) and VHDL language specific code viewer, contents outline, code assist etc. It helps coding and debugging in hardware development based on Verilog or VHDL.
Release Date:
2009-10-27
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Registered:
2004-03-07
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Похоже неплохой плагин, надо будет присмотрется к ниму.
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Anonymous commented on the Indentation inserts tabulations even if "spaces" is checked artifact -
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nemiosrein created the Codefolding for: if, for, while statements artifact -
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protik commented on the RE: Purpose forum thread -
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sourcerer777 commented on the RE: >500k VHDL file - Outline does not work forum thread -
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aghoras commented on the RE: Code folding for: for, if, while statements forum thread -
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aghoras commented on the RE: >500k VHDL file - Outline does not work forum thread -
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aghoras commented on the RE: Purpose forum thread -
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nemiosrein created the >500k VHDL file - Outline does not work forum thread
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