VeriWell Verilog Simulator

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VeriWell is a full Verilog simulator. It supports nearly all of the IEEE1364-1995 standard, as well as PLI 1.0. Yes, VeriWell *is* the same simulator that was sold by Wellspring Solutions in the mid-1990 and was included with the Thomas and Moorby book

Download Now! veriwell-2.8.7.tar.gz (875.6 KB) OR View all files

http://veriwell.sourceforge.net

Release Date:

2009-01-07

Topic:

Electronic Design Automation (EDA)

Operating System:

OS Portable (Source code to work with many OS platforms)

License:

GNU General Public License (GPL)

Intended Audience:

Developers

Programming Language:

VHDL/Verilog

Registered:

2005-09-09

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Tracker artifact added

created the Compiling on X86_64 with gcc-4.3.4 breaks veriwell artifact

posted 88 days ago
Tracker artifact added

phase1geo created the Timescale differences between modules in same simulation artifact

posted by phase1geo 268 days ago
Tracker artifact added

phase1geo created the Bad VCD scope output artifact

posted by phase1geo 268 days ago
Tracker comment added

phase1geo commented on the Real value equality not accurate artifact

posted by phase1geo 268 days ago
Tracker artifact added

phase1geo created the Real value equality not accurate artifact

posted by phase1geo 268 days ago
Tracker artifact added

phase1geo created the Real values not output to VCD file correctly artifact

posted by phase1geo 268 days ago
Tracker artifact added

phase1geo created the Pulldown/pullups not outputting correct VCD results artifact

posted by phase1geo 268 days ago
Code committed

markhummel committed patchset 32 of module veriwell to the VeriWell Verilog Simulator CVS repository, changing 7 files

posted by markhummel 398 days ago
File released: /VeriWell/Veriwell 2.8.7/veriwell-2.8.7.tar.gz

posted 398 days ago
VeriWell Veriwell 2.8.7 file released: veriwell-2.8.7.tar.gz

2009-1-6 Mark Hummel * Converged veriuser.h with version used by vrq * Corrected --help text for $lxt2_recordvars and $lxt_recordvars * Fixed bug in dumpvars that skipped initial timestamp in output file * Bumped rev to 2.8.7

posted 398 days ago

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