• Thumbs up

  I've been using Icarus Verilog in a production environment for almost two years. In that time I've used it to tape out a small mixed signal ASIC and develop and simulate a moderately complex FPGA system (5 x Spartan xc3s1400a). I highly recommend this tool, the development is active and relevant and the developers are responsive to bug reports.

  posted by Thomas D. 43 days ago

  If you'd like to rate this review, please log in.
• Thumbs up

  One of the best opensource EDA tool.

  posted by Chitlesh Goorah 33 days ago

  If you'd like to rate this review, please log in.

View all reviews

• Tracker artifact added

  caryr created the Pass correct version information vpi_get_vlog_info artifact

  posted by caryr 2 days ago

• Tracker comment added

  caryr commented on the VCD contains "changes" of unchanged values artifact

  posted by caryr 3 days ago

• Tracker comment added

  stevewilliams commented on the Generated scopes don't bind implicit nets artifact

  posted by stevewilliams 4 days ago

• Tracker artifact added

  stevewilliams created the Generated scopes don\'t bind implicit nets artifact

  posted by stevewilliams 4 days ago

• Tracker comment added

  caryr commented on the Included definitions not available in cell library artifact

  posted by caryr 5 days ago

• Tracker comment added

  caryr commented on the Implement $dumpflush and $dumplimit system tasks artifact

  posted by caryr 5 days ago

• Tracker comment added

  caryr commented on the Metavalue decimal constants not accepted artifact

  posted by caryr 5 days ago

• Tracker comment added

  caryr commented on the Implement sformat & feof system tasks artifact

  posted by caryr 5 days ago

• Tracker comment added

  caryr commented on the several unsupported directives artifact

  posted by caryr 5 days ago

• Tracker comment added

  caryr commented on the make the max number of FDs a command line option artifact

  posted by caryr 5 days ago