Program for creating Verilog synthesizable XOR trees for high performance designs. Supports creation of Hamming Code (ECC) generators, checkers, and GF2 Multipliers.

Features

  • ECC Generation/Checking
  • AES-GCM Multiplier Generator
  • GF2 Multiplier Generator

Project Samples

Dialog for creating ECC generator

Project Activity

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Categories

Code Generators, Electronic Design Automation (EDA)

License

BSD License

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XOR Tree Generator Web Site

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  • oid-3549483 Posted 2011-09-17
    I have used it and it works
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Additional Project Details

Intended Audience

Telecommunications Industry

User Interface

Java Swing, Command-line

Programming Language

Java

Related Categories

Java Code Generators, Java Electronic Design Automation (EDA) Software

Registered

2008-11-15
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