Eclipse Verilog editor Feature Requests

Status: Beta

Brought to you by: aghoras, tadashi-k

Feature Requests Maximize Restore

# Sort A -> Z Sort Z -> A	Summary▾ Sort A -> Z Sort Z -> A	Milestone▾ Sort A -> Z Sort Z -> A Filter by Milestone	Status▾ Sort A -> Z Sort Z -> A Filter by Status	Owner▾ Sort A -> Z Sort Z -> A Filter by Owner	Created▾ Sort A -> Z Sort Z -> A	Updated▾ Sort A -> Z Sort Z -> A
27	Refactoring (at least in VHDL)	None	open		2010-10-19	2010-10-19
26	VHDL library membership	None	open		2010-10-19	2010-10-19
25	Task tag support	None	open		2010-07-12	2010-07-12
24	VHDL-2008 Support	None	open		2010-06-21	2010-06-21
23	VHDL type/constant/generic and package caching	None	open		2010-03-26	2010-03-26
22	Codefolding for: if, for, while statements	None	open		2009-11-17	2009-11-17
21	VHDL93 component binding	None	open		2009-10-29	2009-10-29
20	VHDL records in auto-complete.	None	open		2009-06-04	2009-06-04
14	custom keyword	None	open		2007-10-09	2007-10-09
13	Text hover for instance pins	None	open		2007-08-28	2007-08-28
12	Highlighting matching bracket	None	open		2007-08-28	2007-08-28
10	AUTO verilog support like emacs mode	None	open		2007-04-05	2014-08-14
9	'open declaration' functionality for regs and wires	Next_Release_(example)	open		2007-02-02	2007-02-02
7	Folding	Next_Release_(example)	open		2006-11-27	2006-11-27
6	Array of modules	Next_Release_(example)	open		2006-11-27	2006-11-27
3	Verilog-2001 support	None	open	KOBAYASHI Tadashi	2004-11-04	2004-11-04
1	'_' should not be a word delimiter	None	open	KOBAYASHI Tadashi	2004-08-26	2004-08-28

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