#23 VHDL type/constant/generic and package caching

open
nobody
None
5
2010-03-26
2010-03-26
Garrett
No

It would be nice if veditor would cache any defined generics, constants, types, functions, etc. and apply syntax highlighting when they are used. Preferably each of these would have a different (customizable) color. Ideally veditor would look at USE statements and retrieve all any of these defined keywords from the package that is being used.

So if the statement USE ieee.std_logic_1164.all is used then the parser would go through and find that all the types (e.g. STD_LOGIC_VECTOR) and functions (e.g. TO_STDLOGICVECTOR) keywords would be highlighted in the file using that package. I realise that some common pacakge keywords are already highlighted, but i think it would be better if keywords were dynamically found from standard and custom package files.

The user would most likely have to a set of directories where all the needed libraries such as std_logic_1164 could be found for each project.

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No, thanks