I would like to see a ModelSim(exists in free and pay versions, not opensource) launcher button in veditor.
Although I believe I would be able to make this modification to veditor and submit a patch, I'm not quite sure how to best implement it.
0. If I put together a sensible patch, would there be any interest in accepting it? Is this
a good idea in the first place?
1. Is there a standard for file extensions for ModelSim files? My ModelSim files are named <foo>.do
2. The current directory need to be chosen somehow. ModelSim will place compilation files, etc. in the current directory, so it should not necessarily be in the same directory as the .do
file. In my case the correct working directory is ../sim relative to the .do file, but this is not the case for anybody.
3. ModelSim is not necessarily in the PATH, so the full path to the modelsim.exe file needs to be determined. A small technical exercise, not impossible. I fear a bit of JNI code would be required. Is JNI code a problem?
4. ModelSim exists for Linux(I think). I have never used the Linux version, so I can offer no useful in sights.
I downloaded ModelSim Xilinx Edition Starter a week ago. I am beginner for ModelSim. I have only experiences to launch simulation by GUI.
I understand .do file can launch simulation by command line interface. Is it true?
If so, you can launch shell script or .bat files from Verilog/VHDL simulator pages in project properties. The Simulate command doesn't need to be modelsim.exe. It should be your shell script in this case.
Now veditor cannot support ModelSim error parser. But the next version will support.
For another solution, I am developing .log file viewer now. It loads simulation log file, then parses it and updates problem markers. You can launch simulation by GUI or CUI, then load a log file and check simulation problem. I think launch button doesn't have to be in Eclipse. But problem makers should be updated by simulations.
What do you think?
I welcome your patches.
But I think JNI is not good idea. The big advantage of veditor is platform independence. I'm afraid to develop JNIs of Windows, Linux, Mac OS and Solaris.
If you would like to refer to this comment somewhere else in this project, copy and paste the following link:
>If so, you can launch shell script or .bat files
>from Verilog/VHDL simulator pages in project
>roperties. The Simulate command doesn't need to be >mdelsim.exe. It should be your shell script in this
>case.
I need to look a bit closer on the latest version that I just checked out from CVS.
One thing that threw me off: I didn't know that such a thing as VHDL projects existed.
Some plugins I've used have a "Add VHDL/Verilog Nature" command when I right click on the project as a way to help point the way towards how to make an existing project a VHDL project.
More comments later once I've tested the existing features :-)
If you would like to refer to this comment somewhere else in this project, copy and paste the following link:
The recent version supports Verilog/VHDL project. It has Verilog/VHDL Simulator property. You can edit Verilog/VHDL simulator property page, which is opened by project properties in popup menu.
The page has Working folder, Simulate command, Error parser and Arguments settings for your simulations. I believe any command line simulator can be used. But GUI simulator is not supported.
The Error parser is regular expressions which parse simulator log files. I think ModelSim error parser is:
Error Pattern: [#\*].*Error: (?:\(.*\) )?(.*)\(([0-9]+)\):(.*)
Warning Pattern: [#\*].*Warning: (?:\(.*\) )?(.*)\(([0-9]+)\):(.*)
They can be added in Preferences->Verilog/VHDL editor->Error Parser->New.
If you would like to refer to this comment somewhere else in this project, copy and paste the following link:
I had a few problems with the above patterns because I use both the project build and compiler individually. Here are slightly more generic error parser expressions:
I would like to see a ModelSim(exists in free and pay versions, not opensource) launcher button in veditor.
Although I believe I would be able to make this modification to veditor and submit a patch, I'm not quite sure how to best implement it.
0. If I put together a sensible patch, would there be any interest in accepting it? Is this
a good idea in the first place?
1. Is there a standard for file extensions for ModelSim files? My ModelSim files are named <foo>.do
2. The current directory need to be chosen somehow. ModelSim will place compilation files, etc. in the current directory, so it should not necessarily be in the same directory as the .do
file. In my case the correct working directory is ../sim relative to the .do file, but this is not the case for anybody.
3. ModelSim is not necessarily in the PATH, so the full path to the modelsim.exe file needs to be determined. A small technical exercise, not impossible. I fear a bit of JNI code would be required. Is JNI code a problem?
4. ModelSim exists for Linux(I think). I have never used the Linux version, so I can offer no useful in sights.
Comments?
Øyvind Harboe
http://www.zylin.com
I downloaded ModelSim Xilinx Edition Starter a week ago. I am beginner for ModelSim. I have only experiences to launch simulation by GUI.
I understand .do file can launch simulation by command line interface. Is it true?
If so, you can launch shell script or .bat files from Verilog/VHDL simulator pages in project properties. The Simulate command doesn't need to be modelsim.exe. It should be your shell script in this case.
Now veditor cannot support ModelSim error parser. But the next version will support.
For another solution, I am developing .log file viewer now. It loads simulation log file, then parses it and updates problem markers. You can launch simulation by GUI or CUI, then load a log file and check simulation problem. I think launch button doesn't have to be in Eclipse. But problem makers should be updated by simulations.
What do you think?
I welcome your patches.
But I think JNI is not good idea. The big advantage of veditor is platform independence. I'm afraid to develop JNIs of Windows, Linux, Mac OS and Solaris.
>If so, you can launch shell script or .bat files
>from Verilog/VHDL simulator pages in project
>roperties. The Simulate command doesn't need to be >mdelsim.exe. It should be your shell script in this
>case.
I need to look a bit closer on the latest version that I just checked out from CVS.
One thing that threw me off: I didn't know that such a thing as VHDL projects existed.
Some plugins I've used have a "Add VHDL/Verilog Nature" command when I right click on the project as a way to help point the way towards how to make an existing project a VHDL project.
More comments later once I've tested the existing features :-)
Is there any more update on this. I would be very interested in a ModelSim integration. I may also be able to help develop some of the features.
Thanks
The recent version supports Verilog/VHDL project. It has Verilog/VHDL Simulator property. You can edit Verilog/VHDL simulator property page, which is opened by project properties in popup menu.
The page has Working folder, Simulate command, Error parser and Arguments settings for your simulations. I believe any command line simulator can be used. But GUI simulator is not supported.
The Error parser is regular expressions which parse simulator log files. I think ModelSim error parser is:
Error Pattern: [#\*].*Error: (?:\(.*\) )?(.*)\(([0-9]+)\):(.*)
Warning Pattern: [#\*].*Warning: (?:\(.*\) )?(.*)\(([0-9]+)\):(.*)
They can be added in Preferences->Verilog/VHDL editor->Error Parser->New.
I had a few problems with the above patterns because I use both the project build and compiler individually. Here are slightly more generic error parser expressions:
errors: [#|\*].*Error: ([^\(]*)\(([0-9]*)\): (.*)
warnings: [#|\*].*Warning: \[.*\] ([^\(]*)\(([0-9]*)\): (.*)
I'll add a built-in default ModelSim error parser.
-Ali