The option argument to --code-loc specifies the location where sdcc will place your code. However the place where the startup code from crt0.o is placed is specified in it's source file crt0.s. The default crt0.s places the startup code at address 0. Thus specifying --code-loc 0 will cause problems since sdcc will try to place both your code and the startup code at address 0.
Example for the !ColecoVision with custom crt0.o and already compiled object files in the directory:
sdcc -mz80 --no-std-crt0 --code-loc 0x8080 --data-loc 0x7000 "../colecovision lib/bin/libcvu.lib" "../colecovision lib/bin/libcv.lib" "../colecovision lib/bin/crt0.o" *.o
The example uses two libraries. The program is to be placed into ROM, which is located at 0x8000, while RAM is located at 0x7000. Note that the argument to --code-loc is 0x8080, which leaves 0x80 bytes at 0x8000 for the startup code from crt0.o.
Code generation for memcpy() is very efficient. Don't hesitate to use it. E.g. copying a structure (with at least two member variables) will be much more efficient using memcpy() than by assigning the members.
The port has complete support for the _Bool/bool data type when compiling in c99 or sdcc99 mode. Use bool for condition variables, since sdcc will generate more efficient code than e.g. when using unsigned char.
The Z80 lacks an efficient signed comparison. Using unsigned variables will result in slightly smaller and faster code. On the GBZ80 the situation is even worse, resulting in a more substancial difference in code size and speed.
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Wiki: Regression Testing
after the change in the parameter passing, the next big improvement could be to allow the asm code generation take into account the use of alternative registers and iyh/l ixh/l
https://sourceforge.net/p/sdcc/feature-requests/795/
Unlikely. Multiple SDCC developers are currently working on major improvements in standard compliance. That is a big improvement, and will be done in time for 4.3.0. I don't see use of the alternate register set arriving sooner.
iyl / iyh might arrive for 4.3.0 (if someone else fixes the support in the assembler, I'll implement support on the compiler side), but it is only a small improvement: Lets compare z80 to z80n. The latter has a few extra instructions, and officially supports the iyl / iyh stuff, so SDCC uses them:
Statistics on compiling and executing the regression tests:
That's a 0.1% improvement in code size. Nice to have, but not "big". The reduction in runtime is clearly bigger at 1.6 %, but I suspect it is mostly due to the z80n barrel-shift instructions, not the iyl / iyh use.
Any time you can avoid the use of the stack for dynamic variables and use registers there will be a sensible speed gain. The gain is maximised when thanks to the use of extra registers you can completely skip the use of the stack (and use ixl/h for variables). Alternative register set can do a lot in avoiding the need of allocating variables on the stack.
One of the strongest point of the z80 against the 8080 is the presence of the alternative registers, I see that there are many restrictions in passing values between the two sets, but it is worth the effort. The access to variables in ram through (ix+n) is the slowest method on the z80 even if elegant and supported by many opcodes. Thus it should be used as last option when other solutions using registers are not sufficient.