I'm going to explain better (title is too short...): as of now, critical sections generate this before part:
ld a,i
di
push af
and this after part:
pop af
ret PO
ei
ret
but I read this will not work reliably on nmos z80s, thus I don't feel like using that.
Since I also don't need nested DI/EI I then choose to switch from critical sections to simply using inline asm, so I just place a DI before my critical code and an EI after my critical code.
But this just makes the peephole optimizer stop doing his work on that piece of code. :|
So, is there a way to make critical section generate a simple DI/EI pair?
Or could we add a command line option such as -no-nested-critical or the like?
Thanks for your info/comments on this :)
If you want the peephole optimizer to work over inline assembly as well you can use --peep-asm.
Thanks Maarten, that worked perfectly! :)
Anyway I think this one should remain as an open feature request, as I really think SDCC should support few ways to handle critical sections:
I'd prefer the one that is safe for both NMOS and CMOS to be the default.
Philipp
This is now handled as a bug report, since it apparently affects all Z80: [bugs:#3721].
Related
Bugs: #3721
A change has since been make for the
--nmos-z80case, and further measures are discussed in the bug report, so I'm closing this ticket.