#504 [z80] aligned arrays (and fast access!)

[sverx]

This is a request for an implementation of an attribute to mark arrays as "block aligned and fast accessed" on z80 architecture.
I mean it would be nice to have some way to 'mark' an array (up to 256 bytes) so that it'll start at a 256-bytes aligned address (both in RAM and in ROM) and thus accessing it using two 8 bit instructions (load H, load L) instead of the current three 16 bit instructions (load BC, load HL, sum them).
Generated code would be faster AND smaller.

[Philipp Klaus Krause]

Since this is only useful for some corner cases, and probably requires linker support, I wouldn't consider it as particularly urgent. However, if/when we do it, the syntax will use standard C11 alignment specifiers:

_Alignas(256) char array1[127];
#include <stdalign.h>
alignas(256) char array2[127];

We could then optimize accesses to such arrays as proposed where the alignment specifier and array size are visible at code generation time.

Philipp

P.S.: The infrastructure for alignas is already in place, only the Z80-specific parts need to be implemented. Currently src/z80/main.c, line 928 specifies 1 as the maximum value for alignas for Z80. Before we can increase that we need to be able to tell the linker about alignment.

[Maarten Brock]

I think the assembler already has support for entering alignment (.even .odd .bndry), so the Z80-backend could already emit the required directives. But I'm afraid the linker currently ignores them.

[Philipp Klaus Krause]

It seems complicated to get the linker to keep the alignment. See section 1.4.21 of sdas/doc/asmlnk.txt. Also, it would be hard to get the linker to use the space in between aligned objects for other purposes.

Philipp

[Sergey Belyashov]

Guys, binutils 2.34 is out. GNU LD supports many things. Current binutils master branch contains support for z80, r800, z80n, z180, ez80 (z80/adl), and gbz80. LD passes all except one (sub expression between different sections) elf tests. There is support for all possible types of relocations (I do not add support for interrupt mode and bit number relocations, bacause it is unnecessary):

• 8, 16, 24, 32 -bit generic relocations
• 8-bit pc-relative relocations for jr and djnz
• 8-bit signed relocation for IX/IY indexing
• 16-bit big-endian relocation (z80n: push mn)
• byte0, byte1, byte2, and byte3 8-bit relocations of corresponding bytes of multybyte values
• word0 and word1 16-bit relocations of corresponding words of multyword vslues (hello to fast bank switching calls: ld de,far_func >> 16\ ld hl,far_func >> 0\ call banked_call)