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From: openocd-gerrit <ope...@us...> - 2025-06-29 07:36:24
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".
The branch, master has been updated
via 8194fc48bd3f06071a9068e385a122499447340a (commit)
via c6f18633522e8cbc80e2abb5cf5e87da13440b92 (commit)
via 56c24b9eb22c690f62fc173fe2fbd649070ae3d6 (commit)
via 7fa8a5c257dcf3dbf072103f69959448e57dfa2c (commit)
from d008a02a74cb4edf18d99b0a6d7d1a698ccc4890 (commit)
Those revisions listed above that are new to this repository have
not appeared on any other notification email; so we list those
revisions in full, below.
- Log -----------------------------------------------------------------
commit 8194fc48bd3f06071a9068e385a122499447340a
Author: Marc Schink <de...@za...>
Date: Fri Jun 20 11:18:03 2025 +0200
tcl/board: Add config for TMS570LS12x development kit
Tested on the corresponding hardware.
Change-Id: Ic98141c450bb981cc7853c93b38195c7930bc7d3
Signed-off-by: Marc Schink <de...@za...>
Reviewed-on: https://review.openocd.org/c/openocd/+/8969
Tested-by: jenkins
Reviewed-by: Antonio Borneo <bor...@gm...>
diff --git a/tcl/board/ti/launchxl2-tms57012.cfg b/tcl/board/ti/launchxl2-tms57012.cfg
new file mode 100644
index 000000000..99cb26e20
--- /dev/null
+++ b/tcl/board/ti/launchxl2-tms57012.cfg
@@ -0,0 +1,10 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
+# Hercules TMS570LS12x LaunchPad Development Kit
+# https://www.ti.com/tool/LAUNCHXL2-TMS57012
+
+source [find interface/xds110.cfg]
+
+transport select jtag
+
+source [find target/ti_tms570ls1x.cfg]
commit c6f18633522e8cbc80e2abb5cf5e87da13440b92
Author: Marc Schink <de...@za...>
Date: Fri Jun 20 10:47:23 2025 +0200
target/armv4: Use command_print() instead of LOG_ERROR()
Use command_print() in order to provide an error message to the caller.
Change-Id: I9f1a2ef07a102e1d6e755f3680bed0f7183b5c9c
Signed-off-by: Marc Schink <de...@za...>
Reviewed-on: https://review.openocd.org/c/openocd/+/8968
Reviewed-by: Antonio Borneo <bor...@gm...>
Tested-by: jenkins
diff --git a/src/target/armv4_5.c b/src/target/armv4_5.c
index 22cdba8ce..d90761569 100644
--- a/src/target/armv4_5.c
+++ b/src/target/armv4_5.c
@@ -842,7 +842,7 @@ COMMAND_HANDLER(handle_armv4_5_reg_command)
}
if (!is_arm_mode(arm->core_mode)) {
- LOG_ERROR("not a valid arm core mode - communication failure?");
+ command_print(CMD, "not a valid arm core mode - communication failure?");
return ERROR_FAIL;
}
@@ -954,7 +954,7 @@ COMMAND_HANDLER(handle_arm_disassemble_command)
struct target *target = get_current_target(CMD_CTX);
if (!target) {
- LOG_ERROR("No target selected");
+ command_print(CMD, "No target selected");
return ERROR_FAIL;
}
commit 56c24b9eb22c690f62fc173fe2fbd649070ae3d6
Author: Marc Schink <de...@za...>
Date: Fri Jun 20 10:44:21 2025 +0200
target/armv4: Use LOG_TARGET_xxx()
Use LOG_TARGET_xxx() for log messages as it is used for other targets.
While at it, rework the log messages. For example by removing spaces or
punctuation marks at the end of the message.
Change-Id: I295001876d40527ec8f35c2aec8d562a29e57b26
Signed-off-by: Marc Schink <de...@za...>
Reviewed-on: https://review.openocd.org/c/openocd/+/8967
Tested-by: jenkins
Reviewed-by: Antonio Borneo <bor...@gm...>
diff --git a/src/target/armv4_5.c b/src/target/armv4_5.c
index 597dc8990..22cdba8ce 100644
--- a/src/target/armv4_5.c
+++ b/src/target/armv4_5.c
@@ -437,7 +437,7 @@ const int armv4_5_core_reg_map[9][17] = {
static const char *arm_core_state_string(struct arm *arm)
{
if (arm->core_state > ARRAY_SIZE(arm_state_strings)) {
- LOG_ERROR("core_state exceeds table size");
+ LOG_TARGET_ERROR(arm->target, "core_state exceeds table size");
return "Unknown";
}
@@ -483,20 +483,20 @@ void arm_set_cpsr(struct arm *arm, uint32_t cpsr)
if (cpsr & (1 << 5)) { /* T */
if (cpsr & (1 << 24)) { /* J */
- LOG_WARNING("ThumbEE -- incomplete support");
+ LOG_TARGET_WARNING(arm->target, "ThumbEE -- incomplete support");
state = ARM_STATE_THUMB_EE;
} else
state = ARM_STATE_THUMB;
} else {
if (cpsr & (1 << 24)) { /* J */
- LOG_ERROR("Jazelle state handling is BROKEN!");
+ LOG_TARGET_ERROR(arm->target, "Jazelle state handling is broken");
state = ARM_STATE_JAZELLE;
} else
state = ARM_STATE_ARM;
}
arm->core_state = state;
- LOG_DEBUG("set CPSR %#8.8" PRIx32 ": %s mode, %s state", cpsr,
+ LOG_TARGET_DEBUG(arm->target, "set CPSR %#8.8" PRIx32 ": %s mode, %s state", cpsr,
arm_mode_name(mode),
arm_core_state_string(arm));
}
@@ -521,7 +521,7 @@ struct reg *arm_reg_current(struct arm *arm, unsigned int regnum)
return NULL;
if (!arm->map) {
- LOG_ERROR("Register map is not available yet, the target is not fully initialised");
+ LOG_TARGET_ERROR(arm->target, "Register map is not available yet, the target is not fully initialised");
r = arm->core_cache->reg_list + regnum;
} else
r = arm->core_cache->reg_list + arm->map[regnum];
@@ -530,7 +530,7 @@ struct reg *arm_reg_current(struct arm *arm, unsigned int regnum)
* that doesn't support it...
*/
if (!r) {
- LOG_ERROR("Invalid CPSR mode");
+ LOG_TARGET_ERROR(arm->target, "Invalid CPSR mode");
r = arm->core_cache->reg_list + regnum;
}
@@ -631,7 +631,7 @@ static int armv4_5_set_core_reg(struct reg *reg, uint8_t *buf)
*/
if (armv4_5_target->core_mode !=
(enum arm_mode)(value & 0x1f)) {
- LOG_DEBUG("changing ARM core mode to '%s'",
+ LOG_TARGET_DEBUG(target, "changing ARM core mode to '%s'",
arm_mode_name(value & 0x1f));
value &= ~((1 << 24) | (1 << 5));
uint8_t t[4];
@@ -798,7 +798,7 @@ int arm_arch_state(struct target *target)
struct arm *arm = target_to_arm(target);
if (arm->common_magic != ARM_COMMON_MAGIC) {
- LOG_ERROR("BUG: called for a non-ARM target");
+ LOG_TARGET_ERROR(target, "BUG: called for a non-ARM target");
return ERROR_FAIL;
}
@@ -806,7 +806,7 @@ int arm_arch_state(struct target *target)
if (target->semihosting && target->semihosting->hit_fileio)
return ERROR_OK;
- LOG_USER("target halted in %s state due to %s, current mode: %s\n"
+ LOG_TARGET_USER(target, "target halted in %s state due to %s, current mode: %s\n"
"cpsr: 0x%8.8" PRIx32 " pc: 0x%8.8" PRIx32 "%s%s",
arm_core_state_string(arm),
debug_reason_name(target),
@@ -1291,7 +1291,7 @@ int arm_get_gdb_reg_list(struct target *target,
unsigned int i;
if (!is_arm_mode(arm->core_mode)) {
- LOG_ERROR("not a valid arm core mode - communication failure?");
+ LOG_TARGET_ERROR(target, "not a valid arm core mode - communication failure?");
return ERROR_FAIL;
}
@@ -1362,7 +1362,7 @@ int arm_get_gdb_reg_list(struct target *target,
return ERROR_OK;
default:
- LOG_ERROR("not a valid register class type in query.");
+ LOG_TARGET_ERROR(target, "not a valid register class type in query");
return ERROR_FAIL;
}
}
@@ -1391,8 +1391,7 @@ static int armv4_5_run_algorithm_completion(struct target *target,
/* fast exit: ARMv5+ code can use BKPT */
if (exit_point && buf_get_u32(arm->pc->value, 0, 32) != exit_point) {
- LOG_WARNING(
- "target reentered debug state, but not at the desired exit point: 0x%4.4" PRIx32 "",
+ LOG_TARGET_ERROR(target, "reentered debug state, but not at the desired exit point: 0x%4.4" PRIx32,
buf_get_u32(arm->pc->value, 0, 32));
return ERROR_TARGET_TIMEOUT;
}
@@ -1417,10 +1416,10 @@ int armv4_5_run_algorithm_inner(struct target *target,
int i;
int retval = ERROR_OK;
- LOG_DEBUG("Running algorithm");
+ LOG_TARGET_DEBUG(target, "Running algorithm");
if (arm_algorithm_info->common_magic != ARM_COMMON_MAGIC) {
- LOG_ERROR("current target isn't an ARMV4/5 target");
+ LOG_TARGET_ERROR(target, "current target isn't an ARMV4/5 target");
return ERROR_TARGET_INVALID;
}
@@ -1430,13 +1429,13 @@ int armv4_5_run_algorithm_inner(struct target *target,
}
if (!is_arm_mode(arm->core_mode)) {
- LOG_ERROR("not a valid arm core mode - communication failure?");
+ LOG_TARGET_ERROR(target, "not a valid arm core mode - communication failure?");
return ERROR_FAIL;
}
/* armv5 and later can terminate with BKPT instruction; less overhead */
if (!exit_point && arm->arch == ARM_ARCH_V4) {
- LOG_ERROR("ARMv4 target needs HW breakpoint location");
+ LOG_TARGET_ERROR(target, "ARMv4 target needs HW breakpoint location");
return ERROR_FAIL;
}
@@ -1470,12 +1469,12 @@ int armv4_5_run_algorithm_inner(struct target *target,
struct reg *reg = register_get_by_name(arm->core_cache, reg_params[i].reg_name, false);
if (!reg) {
- LOG_ERROR("BUG: register '%s' not found", reg_params[i].reg_name);
+ LOG_TARGET_ERROR(target, "BUG: register '%s' not found", reg_params[i].reg_name);
return ERROR_COMMAND_SYNTAX_ERROR;
}
if (reg->size != reg_params[i].size) {
- LOG_ERROR("BUG: register '%s' size doesn't match reg_params[i].size",
+ LOG_TARGET_ERROR(target, "BUG: register '%s' size doesn't match reg_params[i].size",
reg_params[i].reg_name);
return ERROR_COMMAND_SYNTAX_ERROR;
}
@@ -1491,12 +1490,12 @@ int armv4_5_run_algorithm_inner(struct target *target,
else if (arm->core_state == ARM_STATE_THUMB)
exit_breakpoint_size = 2;
else {
- LOG_ERROR("BUG: can't execute algorithms when not in ARM or Thumb state");
+ LOG_TARGET_ERROR(target, "BUG: can't execute algorithms when not in ARM or Thumb state");
return ERROR_COMMAND_SYNTAX_ERROR;
}
if (arm_algorithm_info->core_mode != ARM_MODE_ANY) {
- LOG_DEBUG("setting core_mode: 0x%2.2x",
+ LOG_TARGET_DEBUG(target, "setting core_mode: 0x%2.2x",
arm_algorithm_info->core_mode);
buf_set_u32(arm->cpsr->value, 0, 5,
arm_algorithm_info->core_mode);
@@ -1509,7 +1508,7 @@ int armv4_5_run_algorithm_inner(struct target *target,
retval = breakpoint_add(target, exit_point,
exit_breakpoint_size, BKPT_HARD);
if (retval != ERROR_OK) {
- LOG_ERROR("can't add HW breakpoint to terminate algorithm");
+ LOG_TARGET_ERROR(target, "can't add HW breakpoint to terminate algorithm");
return ERROR_TARGET_FAILURE;
}
}
@@ -1542,13 +1541,13 @@ int armv4_5_run_algorithm_inner(struct target *target,
reg_params[i].reg_name,
false);
if (!reg) {
- LOG_ERROR("BUG: register '%s' not found", reg_params[i].reg_name);
+ LOG_TARGET_ERROR(target, "BUG: register '%s' not found", reg_params[i].reg_name);
retval = ERROR_COMMAND_SYNTAX_ERROR;
continue;
}
if (reg->size != reg_params[i].size) {
- LOG_ERROR(
+ LOG_TARGET_ERROR(target,
"BUG: register '%s' size doesn't match reg_params[i].size",
reg_params[i].reg_name);
retval = ERROR_COMMAND_SYNTAX_ERROR;
@@ -1667,7 +1666,7 @@ int arm_checksum_memory(struct target *target,
if (retval == ERROR_OK)
*checksum = buf_get_u32(reg_params[0].value, 0, 32);
else
- LOG_ERROR("error executing ARM crc algorithm");
+ LOG_TARGET_ERROR(target, "error executing ARM CRC algorithm");
destroy_reg_param(®_params[0]);
destroy_reg_param(®_params[1]);
@@ -1702,7 +1701,7 @@ int arm_blank_check_memory(struct target *target,
assert(sizeof(check_code_le) % 4 == 0);
if (erased_value != 0xff) {
- LOG_ERROR("Erase value 0x%02" PRIx8 " not yet supported for ARMv4/v5 targets",
+ LOG_TARGET_ERROR(target, "Erase value 0x%02" PRIx8 " not yet supported for ARMv4/v5 targets",
erased_value);
return ERROR_FAIL;
}
@@ -1781,7 +1780,7 @@ static int arm_default_mrc(struct target *target, int cpnum,
uint32_t crn, uint32_t crm,
uint32_t *value)
{
- LOG_ERROR("%s doesn't implement MRC", target_type_name(target));
+ LOG_TARGET_ERROR(target, "%s doesn't implement MRC", target_type_name(target));
return ERROR_FAIL;
}
@@ -1789,7 +1788,7 @@ static int arm_default_mrrc(struct target *target, int cpnum,
uint32_t op, uint32_t crm,
uint64_t *value)
{
- LOG_ERROR("%s doesn't implement MRRC", target_type_name(target));
+ LOG_TARGET_ERROR(target, "%s doesn't implement MRRC", target_type_name(target));
return ERROR_FAIL;
}
@@ -1798,7 +1797,7 @@ static int arm_default_mcr(struct target *target, int cpnum,
uint32_t crn, uint32_t crm,
uint32_t value)
{
- LOG_ERROR("%s doesn't implement MCR", target_type_name(target));
+ LOG_TARGET_ERROR(target, "%s doesn't implement MCR", target_type_name(target));
return ERROR_FAIL;
}
@@ -1806,7 +1805,7 @@ static int arm_default_mcrr(struct target *target, int cpnum,
uint32_t op, uint32_t crm,
uint64_t value)
{
- LOG_ERROR("%s doesn't implement MCRR", target_type_name(target));
+ LOG_TARGET_ERROR(target, "%s doesn't implement MCRR", target_type_name(target));
return ERROR_FAIL;
}
commit 7fa8a5c257dcf3dbf072103f69959448e57dfa2c
Author: Marc Schink <de...@za...>
Date: Fri Jun 20 10:30:03 2025 +0200
target/armv7a: Use LOG_TARGET_xxx()
Use LOG_TARGET_xxx() to indicate which target the message belongs to.
Change-Id: Ic40c61a779c1a1ebdc96ebc56b27541fff5e6205
Signed-off-by: Marc Schink <de...@za...>
Reviewed-on: https://review.openocd.org/c/openocd/+/8966
Reviewed-by: Antonio Borneo <bor...@gm...>
Tested-by: jenkins
diff --git a/src/target/armv7a.c b/src/target/armv7a.c
index 651241b77..2bbafd420 100644
--- a/src/target/armv7a.c
+++ b/src/target/armv7a.c
@@ -68,9 +68,9 @@ static void armv7a_show_fault_registers(struct target *target)
if (retval != ERROR_OK)
goto done;
- LOG_USER("Data fault registers DFSR: %8.8" PRIx32
+ LOG_TARGET_USER(target, "Data fault registers DFSR: %8.8" PRIx32
", DFAR: %8.8" PRIx32, dfsr, dfar);
- LOG_USER("Instruction fault registers IFSR: %8.8" PRIx32
+ LOG_TARGET_USER(target, "Instruction fault registers IFSR: %8.8" PRIx32
", IFAR: %8.8" PRIx32, ifsr, ifar);
done:
@@ -134,7 +134,7 @@ int armv7a_read_ttbcr(struct target *target)
if (retval != ERROR_OK)
goto done;
- LOG_DEBUG("ttbcr %" PRIx32, ttbcr);
+ LOG_TARGET_DEBUG(target, "ttbcr %" PRIx32, ttbcr);
ttbcr_n = ttbcr & 0x7;
armv7a->armv7a_mmu.ttbcr = ttbcr;
@@ -169,7 +169,7 @@ int armv7a_read_ttbcr(struct target *target)
armv7a->armv7a_mmu.ttbr_mask[0] = 7 << (32 - ttbcr_n);
}
- LOG_DEBUG("ttbr1 %s, ttbr0_mask %" PRIx32 " ttbr1_mask %" PRIx32,
+ LOG_TARGET_DEBUG(target, "ttbr1 %s, ttbr0_mask %" PRIx32 " ttbr1_mask %" PRIx32,
(ttbcr_n != 0) ? "used" : "not used",
armv7a->armv7a_mmu.ttbr_mask[0],
armv7a->armv7a_mmu.ttbr_mask[1]);
@@ -248,14 +248,13 @@ static int armv7a_read_mpidr(struct target *target)
/* Is register in Multiprocessing Extensions register format? */
if (mpidr & MPIDR_MP_EXT) {
- LOG_DEBUG("%s: MPIDR 0x%" PRIx32, target_name(target), mpidr);
+ LOG_TARGET_DEBUG(target, "%s: MPIDR 0x%" PRIx32, target_name(target), mpidr);
armv7a->multi_processor_system = (mpidr >> 30) & 1;
armv7a->multi_threading_processor = (mpidr >> 24) & 1;
armv7a->level2_id = (mpidr >> 16) & 0xf;
armv7a->cluster_id = (mpidr >> 8) & 0xf;
armv7a->cpu_id = mpidr & 0xf;
- LOG_INFO("%s: MPIDR level2 %x, cluster %x, core %x, %s, %s",
- target_name(target),
+ LOG_TARGET_INFO(target, "MPIDR level2 %x, cluster %x, core %x, %s, %s",
armv7a->level2_id,
armv7a->cluster_id,
armv7a->cpu_id,
@@ -263,7 +262,7 @@ static int armv7a_read_mpidr(struct target *target)
armv7a->multi_threading_processor == 1 ? "SMT" : "no SMT");
} else
- LOG_DEBUG("MPIDR not in multiprocessor format");
+ LOG_TARGET_DEBUG(target, "MPIDR not in multiprocessor format");
done:
dpm->finish(dpm);
@@ -338,7 +337,7 @@ int armv7a_identify_cache(struct target *target)
cache->iminline = 4UL << (ctr & 0xf);
cache->dminline = 4UL << ((ctr & 0xf0000) >> 16);
- LOG_DEBUG("ctr %" PRIx32 " ctr.iminline %" PRIu32 " ctr.dminline %" PRIu32,
+ LOG_TARGET_DEBUG(target, "ctr %" PRIx32 " ctr.iminline %" PRIu32 " ctr.dminline %" PRIu32,
ctr, cache->iminline, cache->dminline);
/* retrieve CLIDR
@@ -350,7 +349,7 @@ int armv7a_identify_cache(struct target *target)
goto done;
cache->loc = (clidr & 0x7000000) >> 24;
- LOG_DEBUG("Number of cache levels to PoC %" PRId32, cache->loc);
+ LOG_TARGET_DEBUG(target, "Number of cache levels to PoC %" PRId32, cache->loc);
/* retrieve selected cache for later restore
* MRC p15, 2,<Rd>, c0, c0, 0; Read CSSELR */
@@ -378,13 +377,13 @@ int armv7a_identify_cache(struct target *target)
goto done;
cache->arch[cl].d_u_size = decode_cache_reg(cache_reg);
- LOG_DEBUG("data/unified cache index %" PRIu32 " << %" PRIu32 ", way %" PRIu32 " << %" PRIu32,
+ LOG_TARGET_DEBUG(target, "data/unified cache index %" PRIu32 " << %" PRIu32 ", way %" PRIu32 " << %" PRIu32,
cache->arch[cl].d_u_size.index,
cache->arch[cl].d_u_size.index_shift,
cache->arch[cl].d_u_size.way,
cache->arch[cl].d_u_size.way_shift);
- LOG_DEBUG("cacheline %" PRIu32 " bytes %" PRIu32 " KBytes asso %" PRIu32 " ways",
+ LOG_TARGET_DEBUG(target, "cacheline %" PRIu32 " bytes %" PRIu32 " KBytes asso %" PRIu32 " ways",
cache->arch[cl].d_u_size.linelen,
cache->arch[cl].d_u_size.cachesize,
cache->arch[cl].d_u_size.associativity);
@@ -398,13 +397,13 @@ int armv7a_identify_cache(struct target *target)
goto done;
cache->arch[cl].i_size = decode_cache_reg(cache_reg);
- LOG_DEBUG("instruction cache index %" PRIu32 " << %" PRIu32 ", way %" PRIu32 " << %" PRIu32,
+ LOG_TARGET_DEBUG(target, "instruction cache index %" PRIu32 " << %" PRIu32 ", way %" PRIu32 " << %" PRIu32,
cache->arch[cl].i_size.index,
cache->arch[cl].i_size.index_shift,
cache->arch[cl].i_size.way,
cache->arch[cl].i_size.way_shift);
- LOG_DEBUG("cacheline %" PRIu32 " bytes %" PRIu32 " KBytes asso %" PRIu32 " ways",
+ LOG_TARGET_DEBUG(target, "cacheline %" PRIu32 " bytes %" PRIu32 " KBytes asso %" PRIu32 " ways",
cache->arch[cl].i_size.linelen,
cache->arch[cl].i_size.cachesize,
cache->arch[cl].i_size.associativity);
@@ -445,7 +444,7 @@ static int armv7a_setup_semihosting(struct target *target, int enable)
armv7a->debug_base + CPUDBG_VCR,
&vcr);
if (ret < 0) {
- LOG_ERROR("Failed to read VCR register\n");
+ LOG_TARGET_ERROR(target, "Failed to read VCR register");
return ret;
}
@@ -458,7 +457,7 @@ static int armv7a_setup_semihosting(struct target *target, int enable)
armv7a->debug_base + CPUDBG_VCR,
vcr);
if (ret < 0)
- LOG_ERROR("Failed to write VCR register\n");
+ LOG_TARGET_ERROR(target, "Failed to write VCR register");
return ret;
}
@@ -489,18 +488,18 @@ int armv7a_arch_state(struct target *target)
struct arm *arm = &armv7a->arm;
if (armv7a->common_magic != ARMV7_COMMON_MAGIC) {
- LOG_ERROR("BUG: called for a non-ARMv7A target");
+ LOG_TARGET_ERROR(target, "BUG: called for a non-ARMv7A target");
return ERROR_COMMAND_SYNTAX_ERROR;
}
arm_arch_state(target);
if (armv7a->is_armv7r) {
- LOG_USER("D-Cache: %s, I-Cache: %s",
+ LOG_TARGET_USER(target, "D-Cache: %s, I-Cache: %s",
state[armv7a->armv7a_mmu.armv7a_cache.d_u_cache_enabled],
state[armv7a->armv7a_mmu.armv7a_cache.i_cache_enabled]);
} else {
- LOG_USER("MMU: %s, D-Cache: %s, I-Cache: %s",
+ LOG_TARGET_USER(target, "MMU: %s, D-Cache: %s, I-Cache: %s",
state[armv7a->armv7a_mmu.mmu_enabled],
state[armv7a->armv7a_mmu.armv7a_cache.d_u_cache_enabled],
state[armv7a->armv7a_mmu.armv7a_cache.i_cache_enabled]);
-----------------------------------------------------------------------
Summary of changes:
src/target/armv4_5.c | 63 ++++++++++++++++++-------------------
src/target/armv7a.c | 37 +++++++++++-----------
tcl/board/ti/launchxl2-tms57012.cfg | 10 ++++++
3 files changed, 59 insertions(+), 51 deletions(-)
create mode 100644 tcl/board/ti/launchxl2-tms57012.cfg
hooks/post-receive
--
Main OpenOCD repository
|
|
From: openocd-gerrit <ope...@us...> - 2025-06-29 07:36:06
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".
The branch, master has been updated
via d008a02a74cb4edf18d99b0a6d7d1a698ccc4890 (commit)
via 4d56d580ce9e2f10e8659bd0d0c4e1b333efa45c (commit)
from 46aa9c0e526f39c61b2c08ac1d21c998ad34259e (commit)
Those revisions listed above that are new to this repository have
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- Log -----------------------------------------------------------------
commit d008a02a74cb4edf18d99b0a6d7d1a698ccc4890
Author: Marc Schink <de...@za...>
Date: Fri Jun 20 10:53:09 2025 +0200
target/armv7a: Hide multiprocessing support message
Print a debug message about missing multiprocessing support rather than
an error message.
Change-Id: Ia1581f7284747d8a92096d6f5515f891c8069f71
Signed-off-by: Marc Schink <de...@za...>
Reviewed-on: https://review.openocd.org/c/openocd/+/8965
Tested-by: jenkins
Reviewed-by: Antonio Borneo <bor...@gm...>
diff --git a/src/target/armv7a.c b/src/target/armv7a.c
index 4d353dec6..651241b77 100644
--- a/src/target/armv7a.c
+++ b/src/target/armv7a.c
@@ -263,7 +263,7 @@ static int armv7a_read_mpidr(struct target *target)
armv7a->multi_threading_processor == 1 ? "SMT" : "no SMT");
} else
- LOG_ERROR("MPIDR not in multiprocessor format");
+ LOG_DEBUG("MPIDR not in multiprocessor format");
done:
dpm->finish(dpm);
commit 4d56d580ce9e2f10e8659bd0d0c4e1b333efa45c
Author: Marc Schink <de...@za...>
Date: Fri Jun 20 10:17:12 2025 +0200
target/arm_dpm: Use LOG_TARGET_xxx()
Use LOG_TARGET_xxx() to indicate which target the message belongs to.
While at it, rework the log messages. For example, using correct format
specifiers.
Change-Id: I05031e0ae25fe9e7bc38dfb781b6623a967fd533
Signed-off-by: Marc Schink <de...@za...>
Reviewed-on: https://review.openocd.org/c/openocd/+/8964
Tested-by: jenkins
Reviewed-by: Antonio Borneo <bor...@gm...>
diff --git a/src/target/arm_dpm.c b/src/target/arm_dpm.c
index 0b2db77c5..8ab464d0a 100644
--- a/src/target/arm_dpm.c
+++ b/src/target/arm_dpm.c
@@ -50,9 +50,8 @@ static int dpm_mrc(struct target *target, int cpnum,
if (retval != ERROR_OK)
return retval;
- LOG_DEBUG("MRC p%d, %d, r0, c%d, c%d, %d", cpnum,
- (int) op1, (int) crn,
- (int) crm, (int) op2);
+ LOG_TARGET_DEBUG(target, "MRC p%d, %" PRId32 ", r0, c%" PRId32 ", c%" PRId32 ", %" PRId32,
+ cpnum, op1, crn, crm, op2);
/* read coprocessor register into R0; return via DCC */
retval = dpm->instr_read_data_r0(dpm,
@@ -74,8 +73,8 @@ static int dpm_mrrc(struct target *target, int cpnum,
if (retval != ERROR_OK)
return retval;
- LOG_DEBUG("MRRC p%d, %d, r0, r1, c%d", cpnum,
- (int)op, (int)crm);
+ LOG_TARGET_DEBUG(target, "MRRC p%d, %" PRId32 ", r0, r1, c%" PRId32,
+ cpnum, op, crm);
/* read coprocessor register into R0, R1; return via DCC */
retval = dpm->instr_read_data_r0_r1(dpm,
@@ -98,9 +97,8 @@ static int dpm_mcr(struct target *target, int cpnum,
if (retval != ERROR_OK)
return retval;
- LOG_DEBUG("MCR p%d, %d, r0, c%d, c%d, %d", cpnum,
- (int) op1, (int) crn,
- (int) crm, (int) op2);
+ LOG_TARGET_DEBUG(target, "MCR p%d, %" PRId32 ", r0, c%" PRId32 ", c%" PRId32 ", %" PRId32,
+ cpnum, op1, crn, crm, op2);
/* read DCC into r0; then write coprocessor register from R0 */
retval = dpm->instr_write_data_r0(dpm,
@@ -122,8 +120,8 @@ static int dpm_mcrr(struct target *target, int cpnum,
if (retval != ERROR_OK)
return retval;
- LOG_DEBUG("MCRR p%d, %d, r0, r1, c%d", cpnum,
- (int)op, (int)crm);
+ LOG_TARGET_DEBUG(target, "MCRR p%d, %" PRId32 ", r0, r1, c%" PRId32,
+ cpnum, op, crm);
/* read DCC into r0, r1; then write coprocessor register from R0, R1 */
retval = dpm->instr_write_data_r0_r1(dpm,
@@ -198,7 +196,8 @@ static int dpm_read_reg_u64(struct arm_dpm *dpm, struct reg *r, unsigned int reg
buf_set_u32(r->value + 4, 0, 32, value_r1);
r->valid = true;
r->dirty = false;
- LOG_DEBUG("READ: %s, %8.8" PRIx32 ", %8.8" PRIx32, r->name, value_r0, value_r1);
+ LOG_TARGET_DEBUG(dpm->arm->target, "READ: %s, %8.8" PRIx32 ", %8.8" PRIx32,
+ r->name, value_r0, value_r1);
}
return retval;
@@ -237,10 +236,10 @@ int arm_dpm_read_reg(struct arm_dpm *dpm, struct reg *r, unsigned int regnum)
break;
case ARM_STATE_JAZELLE:
/* core-specific ... ? */
- LOG_WARNING("Jazelle PC adjustment unknown");
+ LOG_TARGET_WARNING(dpm->arm->target, "Jazelle PC adjustment unknown");
break;
default:
- LOG_WARNING("unknown core state");
+ LOG_TARGET_WARNING(dpm->arm->target, "unknown core state");
break;
}
break;
@@ -265,7 +264,8 @@ int arm_dpm_read_reg(struct arm_dpm *dpm, struct reg *r, unsigned int regnum)
buf_set_u32(r->value, 0, 32, value);
r->valid = true;
r->dirty = false;
- LOG_DEBUG("READ: %s, %8.8" PRIx32, r->name, value);
+ LOG_TARGET_DEBUG(dpm->arm->target, "READ: %s, %8.8" PRIx32, r->name,
+ value);
}
return retval;
@@ -301,7 +301,8 @@ static int dpm_write_reg_u64(struct arm_dpm *dpm, struct reg *r, unsigned int re
if (retval == ERROR_OK) {
r->dirty = false;
- LOG_DEBUG("WRITE: %s, %8.8" PRIx32 ", %8.8" PRIx32, r->name, value_r0, value_r1);
+ LOG_TARGET_DEBUG(dpm->arm->target, "WRITE: %s, %8.8" PRIx32 ", %8.8" PRIx32,
+ r->name, value_r0, value_r1);
}
return retval;
@@ -349,7 +350,8 @@ static int dpm_write_reg(struct arm_dpm *dpm, struct reg *r, unsigned int regnum
if (retval == ERROR_OK) {
r->dirty = false;
- LOG_DEBUG("WRITE: %s, %8.8" PRIx32, r->name, value);
+ LOG_TARGET_DEBUG(dpm->arm->target, "WRITE: %s, %8.8" PRIx32, r->name,
+ value);
}
return retval;
@@ -463,9 +465,8 @@ static int dpm_maybe_update_bpwp(struct arm_dpm *dpm, bool bpwp,
xp->address, xp->control);
if (retval != ERROR_OK)
- LOG_ERROR("%s: can't %s HW %spoint %d",
+ LOG_TARGET_ERROR(dpm->arm->target, "can't %s HW %spoint %d",
disable ? "disable" : "enable",
- target_name(dpm->arm->target),
(xp->number < 16) ? "break" : "watch",
xp->number & 0xf);
done:
@@ -670,7 +671,7 @@ static enum arm_mode dpm_mapmode(struct arm *arm,
case ARM_VFP_V3_D0 ... ARM_VFP_V3_FPSCR:
return mode;
default:
- LOG_WARNING("invalid register #%u", num);
+ LOG_TARGET_WARNING(arm->target, "invalid register #%u", num);
break;
}
return ARM_MODE_ANY;
@@ -885,7 +886,7 @@ static int dpm_bpwp_setup(struct arm_dpm *dpm, struct dpm_bpwp *xp,
}
/* FALL THROUGH */
default:
- LOG_ERROR("unsupported {break,watch}point length/alignment");
+ LOG_TARGET_ERROR(dpm->arm->target, "unsupported {break,watch}point length/alignment");
return ERROR_COMMAND_SYNTAX_ERROR;
}
@@ -899,7 +900,7 @@ static int dpm_bpwp_setup(struct arm_dpm *dpm, struct dpm_bpwp *xp,
xp->control = control;
xp->dirty = true;
- LOG_DEBUG("BPWP: addr %8.8" PRIx32 ", control %" PRIx32 ", number %d",
+ LOG_TARGET_DEBUG(dpm->arm->target, "BPWP: addr %8.8" PRIx32 ", control %" PRIx32 ", number %d",
xp->address, control, xp->number);
/* hardware is updated in write_dirty_registers() */
@@ -919,7 +920,7 @@ static int dpm_add_breakpoint(struct target *target, struct breakpoint *bp)
/* FIXME we need a generic solution for software breakpoints. */
if (bp->type == BKPT_SOFT)
- LOG_DEBUG("using HW bkpt, not SW...");
+ LOG_TARGET_DEBUG(dpm->arm->target, "using HW breakpoint instead of SW");
for (unsigned int i = 0; i < dpm->nbp; i++) {
if (!dpm->dbp[i].bp) {
@@ -963,7 +964,7 @@ static int dpm_watchpoint_setup(struct arm_dpm *dpm, unsigned int index_t,
/* this hardware doesn't support data value matching or masking */
if (wp->mask != WATCHPOINT_IGNORE_DATA_VALUE_MASK) {
- LOG_DEBUG("watchpoint values and masking not supported");
+ LOG_TARGET_ERROR(dpm->arm->target, "watchpoint values and masking not supported");
return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
}
@@ -1143,8 +1144,8 @@ int arm_dpm_setup(struct arm_dpm *dpm)
return ERROR_FAIL;
}
- LOG_INFO("%s: hardware has %d breakpoints, %d watchpoints",
- target_name(target), dpm->nbp, dpm->nwp);
+ LOG_TARGET_INFO(target, "hardware has %d breakpoints, %d watchpoints",
+ dpm->nbp, dpm->nwp);
/* REVISIT ... and some of those breakpoints could match
* execution context IDs...
@@ -1172,8 +1173,7 @@ int arm_dpm_initialize(struct arm_dpm *dpm)
(void) dpm->bpwp_disable(dpm, 16 + i);
}
} else
- LOG_WARNING("%s: can't disable breakpoints and watchpoints",
- target_name(dpm->arm->target));
+ LOG_TARGET_WARNING(dpm->arm->target, "can't disable breakpoints and watchpoints");
return ERROR_OK;
}
-----------------------------------------------------------------------
Summary of changes:
src/target/arm_dpm.c | 54 ++++++++++++++++++++++++++--------------------------
src/target/armv7a.c | 2 +-
2 files changed, 28 insertions(+), 28 deletions(-)
hooks/post-receive
--
Main OpenOCD repository
|
|
From: openocd-gerrit <ope...@us...> - 2025-06-29 07:34:21
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".
The branch, master has been updated
via 46aa9c0e526f39c61b2c08ac1d21c998ad34259e (commit)
from 9b660bbd1957ffc1fd86485ceef5200f8968aeb6 (commit)
Those revisions listed above that are new to this repository have
not appeared on any other notification email; so we list those
revisions in full, below.
- Log -----------------------------------------------------------------
commit 46aa9c0e526f39c61b2c08ac1d21c998ad34259e
Author: Jan Matyas <jan...@co...>
Date: Tue Jun 17 13:17:23 2025 +0200
openocd.c: 'init' should fail if GDB service cannot be created
If it is not possible to create a GDB service for a certain target
(for example the given TCP port is already occupied), the "init"
command should fail, but it currently does not.
Fix this by checking the return code of gdb_target_add_all().
Steps to reproduce:
1) Make the port 3333/tcp occupied. For example by:
nc -l 3333
2) In another terminal, launch OpenOCD. Use the gdb_port
3333 (which is the default). For example:
path/to/your/openocd \
-c "adapter driver ..." \
-c "jtag newtap ..."
-c "target create ..."
3) Observe the outcome:
Before this patch:
Error "couldn't bind gdb to socket on port 3333: Address already in use"
is displayed but OpenOCD keeps running.
After this patch:
The error message is displayed and OpenOCD exits - as expected.
Change-Id: I63c283a9a1095167b78e69e9ee879c378a6b9f2a
Signed-off-by: Jan Matyas <jan...@co...>
Reviewed-on: https://review.openocd.org/c/openocd/+/8957
Tested-by: jenkins
Reviewed-by: zapb <de...@za...>
Reviewed-by: Antonio Borneo <bor...@gm...>
diff --git a/src/openocd.c b/src/openocd.c
index 3fbece395..e63a9661a 100644
--- a/src/openocd.c
+++ b/src/openocd.c
@@ -170,7 +170,8 @@ COMMAND_HANDLER(handle_init_command)
jtag_poll_unmask(save_poll_mask);
/* initialize telnet subsystem */
- gdb_target_add_all(all_targets);
+ if (gdb_target_add_all(all_targets) != ERROR_OK)
+ return ERROR_FAIL;
target_register_event_callback(log_target_callback_event_handler, CMD_CTX);
-----------------------------------------------------------------------
Summary of changes:
src/openocd.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
hooks/post-receive
--
Main OpenOCD repository
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From: openocd-gerrit <ope...@us...> - 2025-06-29 07:33:03
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".
The branch, master has been updated
via 9b660bbd1957ffc1fd86485ceef5200f8968aeb6 (commit)
from df525290cb11ab40968253b7d4c5588b1aab7d82 (commit)
Those revisions listed above that are new to this repository have
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- Log -----------------------------------------------------------------
commit 9b660bbd1957ffc1fd86485ceef5200f8968aeb6
Author: Antonio Borneo <bor...@gm...>
Date: Sat Jun 14 15:07:50 2025 +0200
rtos: sort the rtos by alphabetic order
Add comments to require the list of rtos to be kept sorted.
Change-Id: Iecf9250a14f6593d0a24a9f9b8930c0ec8d74bd2
Signed-off-by: Antonio Borneo <bor...@gm...>
Reviewed-on: https://review.openocd.org/c/openocd/+/8953
Tested-by: jenkins
diff --git a/src/rtos/rtos.c b/src/rtos/rtos.c
index 216129b97..2ccccf1b0 100644
--- a/src/rtos/rtos.c
+++ b/src/rtos/rtos.c
@@ -17,20 +17,22 @@
#include "server/gdb_server.h"
static const struct rtos_type *rtos_types[] = {
- &threadx_rtos,
- &freertos_rtos,
- &ecos_rtos,
- &linux_rtos,
+ // Keep in alphabetic order this list of rtos, except hwthread
&chibios_rtos,
&chromium_ec_rtos,
+ &ecos_rtos,
&embkernel_rtos,
+ &freertos_rtos,
+ &linux_rtos,
&mqx_rtos,
- &ucos_iii_rtos,
&nuttx_rtos,
&riot_rtos,
- &zephyr_rtos,
&rtkernel_rtos,
- /* keep this as last, as it always matches with rtos auto */
+ &threadx_rtos,
+ &ucos_iii_rtos,
+ &zephyr_rtos,
+
+ // keep this as last, as it always matches with rtos auto
&hwthread_rtos,
};
diff --git a/src/rtos/rtos.h b/src/rtos/rtos.h
index 05beab145..dbaa7e8ce 100644
--- a/src/rtos/rtos.h
+++ b/src/rtos/rtos.h
@@ -136,6 +136,7 @@ int rtos_read_buffer(struct target *target, target_addr_t address,
int rtos_write_buffer(struct target *target, target_addr_t address,
uint32_t size, const uint8_t *buffer);
+// Keep in alphabetic order this list of rtos
extern const struct rtos_type chibios_rtos;
extern const struct rtos_type chromium_ec_rtos;
extern const struct rtos_type ecos_rtos;
-----------------------------------------------------------------------
Summary of changes:
src/rtos/rtos.c | 16 +++++++++-------
src/rtos/rtos.h | 1 +
2 files changed, 10 insertions(+), 7 deletions(-)
hooks/post-receive
--
Main OpenOCD repository
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From: openocd-gerrit <ope...@us...> - 2025-06-29 07:32:51
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".
The branch, master has been updated
via df525290cb11ab40968253b7d4c5588b1aab7d82 (commit)
via cd749419caae4f083daa2e0717fb2c6747ba033a (commit)
via c92cf66c6714ebf367d1ccb1ba59010491924063 (commit)
via 5d192a9f70a706f8639721a636156547875e9fa8 (commit)
via 6ab6d3475fb3758b60ad670b1b0d2cf3b2d10768 (commit)
via fa0fa25764b4737b42fbceab9f56a467263e12b0 (commit)
from a64ae963be55a3a7e12d8f7a91c9787bf4047778 (commit)
Those revisions listed above that are new to this repository have
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revisions in full, below.
- Log -----------------------------------------------------------------
commit df525290cb11ab40968253b7d4c5588b1aab7d82
Author: Antonio Borneo <bor...@gm...>
Date: Sat Jun 14 15:02:04 2025 +0200
target: use array size to constraint the loop
Instead of using NULL terminated arrays to determine the last
element of the array, use the size of the array.
Change-Id: I3cdc0f6aef8a5110073aeef333c439e61fc54032
Signed-off-by: Antonio Borneo <bor...@gm...>
Reviewed-on: https://review.openocd.org/c/openocd/+/8952
Tested-by: jenkins
Reviewed-by: Brandon Martin
diff --git a/src/target/target.c b/src/target/target.c
index 8bf654a27..995adbc9d 100644
--- a/src/target/target.c
+++ b/src/target/target.c
@@ -110,7 +110,6 @@ static struct target_type *target_types[] = {
&testee_target,
&xscale_target,
&xtensa_chip_target,
- NULL,
};
struct target *all_targets;
@@ -5708,7 +5707,6 @@ static const struct command_registration target_instance_command_handlers[] = {
COMMAND_HANDLER(handle_target_create)
{
int retval = ERROR_OK;
- int x;
if (CMD_ARGC < 2)
return ERROR_COMMAND_SYNTAX_ERROR;
@@ -5732,15 +5730,16 @@ COMMAND_HANDLER(handle_target_create)
LOG_INFO("The selected transport took over low-level target control. The results might differ compared to plain JTAG/SWD");
}
/* now does target type exist */
- for (x = 0 ; target_types[x] ; x++) {
+ size_t x;
+ for (x = 0 ; x < ARRAY_SIZE(target_types) ; x++) {
if (strcmp(cp, target_types[x]->name) == 0) {
/* found */
break;
}
}
- if (!target_types[x]) {
+ if (x == ARRAY_SIZE(target_types)) {
char *all = NULL;
- for (x = 0 ; target_types[x] ; x++) {
+ for (x = 0 ; x < ARRAY_SIZE(target_types) ; x++) {
char *prev = all;
if (all)
all = alloc_printf("%s, %s", all, target_types[x]->name);
@@ -5942,7 +5941,7 @@ COMMAND_HANDLER(handle_target_types)
if (CMD_ARGC != 0)
return ERROR_COMMAND_SYNTAX_ERROR;
- for (unsigned int x = 0; target_types[x]; x++)
+ for (size_t x = 0; x < ARRAY_SIZE(target_types); x++)
command_print(CMD, "%s", target_types[x]->name);
return ERROR_OK;
commit cd749419caae4f083daa2e0717fb2c6747ba033a
Author: Antonio Borneo <bor...@gm...>
Date: Sat Jun 14 14:51:43 2025 +0200
target: sort the targets by alphabetic order
Add comments to require the list of targets to be kept sorted.
Change-Id: Ie3d7e3f5d55a9f9214dc179c5c986b6682f59412
Signed-off-by: Antonio Borneo <bor...@gm...>
Reviewed-on: https://review.openocd.org/c/openocd/+/8951
Tested-by: jenkins
diff --git a/src/target/target.c b/src/target/target.c
index fd0e0116b..8bf654a27 100644
--- a/src/target/target.c
+++ b/src/target/target.c
@@ -71,44 +71,45 @@ static int target_gdb_fileio_end_default(struct target *target, int retcode,
int fileio_errno, bool ctrl_c);
static struct target_type *target_types[] = {
+ // Keep in alphabetic order this list of targets
+ &aarch64_target,
+ &arcv2_target,
+ &arm11_target,
+ &arm720t_target,
&arm7tdmi_target,
- &arm9tdmi_target,
&arm920t_target,
- &arm720t_target,
- &arm966e_target,
- &arm946e_target,
&arm926ejs_target,
- &fa526_target,
- &feroceon_target,
- &dragonite_target,
- &xscale_target,
- &xtensa_chip_target,
- &cortexm_target,
+ &arm946e_target,
+ &arm966e_target,
+ &arm9tdmi_target,
+ &armv8r_target,
+ &avr32_ap7k_target,
+ &avr_target,
&cortexa_target,
+ &cortexm_target,
&cortexr4_target,
- &arm11_target,
- &ls1_sap_target,
- &mips_m4k_target,
- &avr_target,
+ &dragonite_target,
&dsp563xx_target,
&dsp5680xx_target,
- &testee_target,
- &avr32_ap7k_target,
- &hla_target,
- &esp32_target,
+ &esirisc_target,
&esp32s2_target,
&esp32s3_target,
+ &esp32_target,
+ &fa526_target,
+ &feroceon_target,
+ &hla_target,
+ &ls1_sap_target,
+ &mem_ap_target,
+ &mips_m4k_target,
+ &mips_mips64_target,
&or1k_target,
- &quark_x10xx_target,
&quark_d20xx_target,
- &stm8_target,
+ &quark_x10xx_target,
&riscv_target,
- &mem_ap_target,
- &esirisc_target,
- &arcv2_target,
- &aarch64_target,
- &armv8r_target,
- &mips_mips64_target,
+ &stm8_target,
+ &testee_target,
+ &xscale_target,
+ &xtensa_chip_target,
NULL,
};
diff --git a/src/target/target_type.h b/src/target/target_type.h
index 5b0dc5a6c..a146fab76 100644
--- a/src/target/target_type.h
+++ b/src/target/target_type.h
@@ -307,6 +307,7 @@ struct target_type {
unsigned int (*data_bits)(struct target *target);
};
+// Keep in alphabetic order this list of targets
extern struct target_type aarch64_target;
extern struct target_type arcv2_target;
extern struct target_type arm11_target;
commit c92cf66c6714ebf367d1ccb1ba59010491924063
Author: Antonio Borneo <bor...@gm...>
Date: Sat Jun 14 14:39:37 2025 +0200
jtag: interfaces: sort the drivers by alphabetic order
Add comments to require the list of drivers to be kept sorted.
While there:
- align the check on BUILD_PRESTO and BUILD_USB_BLASTER;
- fix indentation of the closing parenthesis.
Change-Id: Ic78281b1cdfb5bf72ea41427233e76516001b429
Signed-off-by: Antonio Borneo <bor...@gm...>
Reviewed-on: https://review.openocd.org/c/openocd/+/8950
Tested-by: jenkins
diff --git a/src/jtag/interface.h b/src/jtag/interface.h
index 475dbed36..834997361 100644
--- a/src/jtag/interface.h
+++ b/src/jtag/interface.h
@@ -371,6 +371,7 @@ int adapter_config_trace(bool enabled, enum tpiu_pin_protocol pin_protocol,
unsigned int traceclkin_freq, uint16_t *prescaler);
int adapter_poll_trace(uint8_t *buf, size_t *size);
+// Keep in alphabetic order this list of drivers
extern struct adapter_driver am335xgpio_adapter_driver;
extern struct adapter_driver amt_jtagaccel_adapter_driver;
extern struct adapter_driver angie_adapter_driver;
diff --git a/src/jtag/interfaces.c b/src/jtag/interfaces.c
index e49bd9e0f..834247245 100644
--- a/src/jtag/interfaces.c
+++ b/src/jtag/interfaces.c
@@ -36,125 +36,128 @@
* drivers that were enabled by the @c configure script.
*/
struct adapter_driver *adapter_drivers[] = {
-#if BUILD_PARPORT == 1
- &parport_adapter_driver,
+ // Keep in alphabetic order this list of drivers
+
+#if BUILD_AM335XGPIO == 1
+ &am335xgpio_adapter_driver,
#endif
-#if BUILD_DUMMY == 1
- &dummy_adapter_driver,
+#if BUILD_AMTJTAGACCEL == 1
+ &amt_jtagaccel_adapter_driver,
#endif
-#if BUILD_FTDI == 1
- &ftdi_adapter_driver,
+#if BUILD_ANGIE == 1
+ &angie_adapter_driver,
#endif
-#if BUILD_USB_BLASTER || BUILD_USB_BLASTER_2 == 1
- &usb_blaster_adapter_driver,
+#if BUILD_ARMJTAGEW == 1
+ &armjtagew_adapter_driver,
#endif
-#if BUILD_ESP_USB_JTAG == 1
- &esp_usb_adapter_driver,
+#if BUILD_AT91RM9200 == 1
+ &at91rm9200_adapter_driver,
#endif
-#if BUILD_JTAG_VPI == 1
- &jtag_vpi_adapter_driver,
+#if BUILD_BCM2835GPIO == 1
+ &bcm2835gpio_adapter_driver,
#endif
-#if BUILD_VDEBUG == 1
- &vdebug_adapter_driver,
+#if BUILD_BUS_PIRATE == 1
+ &buspirate_adapter_driver,
#endif
-#if BUILD_JTAG_DPI == 1
- &jtag_dpi_adapter_driver,
+#if BUILD_CMSIS_DAP_USB == 1 || BUILD_CMSIS_DAP_HID == 1
+ &cmsis_dap_adapter_driver,
#endif
-#if BUILD_FT232R == 1
- &ft232r_adapter_driver,
+#if BUILD_DMEM == 1
+ &dmem_dap_adapter_driver,
#endif
-#if BUILD_AMTJTAGACCEL == 1
- &amt_jtagaccel_adapter_driver,
+#if BUILD_DUMMY == 1
+ &dummy_adapter_driver,
#endif
#if BUILD_EP93XX == 1
&ep93xx_adapter_driver,
#endif
-#if BUILD_AT91RM9200 == 1
- &at91rm9200_adapter_driver,
+#if BUILD_ESP_USB_JTAG == 1
+ &esp_usb_adapter_driver,
+#endif
+#if BUILD_FT232R == 1
+ &ft232r_adapter_driver,
+#endif
+#if BUILD_FTDI == 1
+ &ftdi_adapter_driver,
#endif
#if BUILD_GW16012 == 1
&gw16012_adapter_driver,
#endif
-#if BUILD_PRESTO
- &presto_adapter_driver,
-#endif
-#if BUILD_USBPROG == 1
- &usbprog_adapter_driver,
+#if BUILD_HLADAPTER == 1
+ &hl_adapter_driver,
#endif
-#if BUILD_OPENJTAG == 1
- &openjtag_adapter_driver,
+#if BUILD_IMX_GPIO == 1
+ &imx_gpio_adapter_driver,
#endif
#if BUILD_JLINK == 1
&jlink_adapter_driver,
#endif
-#if BUILD_VSLLINK == 1
- &vsllink_adapter_driver,
-#endif
-#if BUILD_RLINK == 1
- &rlink_adapter_driver,
+#if BUILD_JTAG_DPI == 1
+ &jtag_dpi_adapter_driver,
#endif
-#if BUILD_ULINK == 1
- &ulink_adapter_driver,
+#if BUILD_JTAG_VPI == 1
+ &jtag_vpi_adapter_driver,
#endif
-#if BUILD_ANGIE == 1
- &angie_adapter_driver,
+#if BUILD_KITPROG == 1
+ &kitprog_adapter_driver,
#endif
-#if BUILD_ARMJTAGEW == 1
- &armjtagew_adapter_driver,
+#if BUILD_LINUXGPIOD == 1
+ &linuxgpiod_adapter_driver,
#endif
-#if BUILD_BUS_PIRATE == 1
- &buspirate_adapter_driver,
+#if BUILD_LINUXSPIDEV == 1
+ &linuxspidev_adapter_driver,
#endif
-#if BUILD_REMOTE_BITBANG == 1
- &remote_bitbang_adapter_driver,
+#if BUILD_OPENDOUS == 1
+ &opendous_adapter_driver,
#endif
-#if BUILD_HLADAPTER == 1
- &hl_adapter_driver,
+#if BUILD_OPENJTAG == 1
+ &openjtag_adapter_driver,
#endif
#if BUILD_OSBDM == 1
&osbdm_adapter_driver,
#endif
-#if BUILD_OPENDOUS == 1
- &opendous_adapter_driver,
+#if BUILD_PARPORT == 1
+ &parport_adapter_driver,
#endif
-#if BUILD_SYSFSGPIO == 1
- &sysfsgpio_adapter_driver,
+#if BUILD_PRESTO == 1
+ &presto_adapter_driver,
#endif
-#if BUILD_LINUXGPIOD == 1
- &linuxgpiod_adapter_driver,
+#if BUILD_REMOTE_BITBANG == 1
+ &remote_bitbang_adapter_driver,
#endif
-#if BUILD_LINUXSPIDEV == 1
- &linuxspidev_adapter_driver,
+#if BUILD_RLINK == 1
+ &rlink_adapter_driver,
#endif
-#if BUILD_XLNX_PCIE_XVC == 1
- &xlnx_pcie_xvc_adapter_driver,
+#if BUILD_RSHIM == 1
+ &rshim_dap_adapter_driver,
#endif
-#if BUILD_BCM2835GPIO == 1
- &bcm2835gpio_adapter_driver,
+#if BUILD_HLADAPTER_STLINK == 1
+ &stlink_dap_adapter_driver,
#endif
-#if BUILD_CMSIS_DAP_USB == 1 || BUILD_CMSIS_DAP_HID == 1
- &cmsis_dap_adapter_driver,
+#if BUILD_SYSFSGPIO == 1
+ &sysfsgpio_adapter_driver,
#endif
-#if BUILD_KITPROG == 1
- &kitprog_adapter_driver,
+#if BUILD_ULINK == 1
+ &ulink_adapter_driver,
#endif
-#if BUILD_IMX_GPIO == 1
- &imx_gpio_adapter_driver,
+#if BUILD_USB_BLASTER == 1 || BUILD_USB_BLASTER_2 == 1
+ &usb_blaster_adapter_driver,
#endif
-#if BUILD_XDS110 == 1
- &xds110_adapter_driver,
+#if BUILD_USBPROG == 1
+ &usbprog_adapter_driver,
#endif
-#if BUILD_HLADAPTER_STLINK == 1
- &stlink_dap_adapter_driver,
+#if BUILD_VDEBUG == 1
+ &vdebug_adapter_driver,
#endif
-#if BUILD_RSHIM == 1
- &rshim_dap_adapter_driver,
+#if BUILD_VSLLINK == 1
+ &vsllink_adapter_driver,
#endif
-#if BUILD_DMEM == 1
- &dmem_dap_adapter_driver,
+#if BUILD_XDS110 == 1
+ &xds110_adapter_driver,
#endif
-#if BUILD_AM335XGPIO == 1
- &am335xgpio_adapter_driver,
+#if BUILD_XLNX_PCIE_XVC == 1
+ &xlnx_pcie_xvc_adapter_driver,
#endif
+
NULL,
- };
+};
commit 5d192a9f70a706f8639721a636156547875e9fa8
Author: Antonio Borneo <bor...@gm...>
Date: Sat Jun 14 13:58:38 2025 +0200
flash: nand: use array size to constraint the loop
Instead of using NULL terminated arrays to determine the last
element of the array, use the size of the array.
Change-Id: I532a51a223061348e57bae3bd66ee6b346c1b070
Signed-off-by: Antonio Borneo <bor...@gm...>
Reviewed-on: https://review.openocd.org/c/openocd/+/8949
Tested-by: jenkins
Reviewed-by: Brandon Martin
diff --git a/src/flash/nand/driver.c b/src/flash/nand/driver.c
index 69b3ba961..eda033b5b 100644
--- a/src/flash/nand/driver.c
+++ b/src/flash/nand/driver.c
@@ -10,6 +10,8 @@
#ifdef HAVE_CONFIG_H
#include <config.h>
#endif
+
+#include <helper/types.h>
#include "core.h"
#include "driver.h"
@@ -29,12 +31,11 @@ static struct nand_flash_controller *nand_flash_controllers[] = {
&s3c2440_nand_controller,
&s3c2443_nand_controller,
&s3c6400_nand_controller,
- NULL
};
struct nand_flash_controller *nand_driver_find_by_name(const char *name)
{
- for (unsigned int i = 0; nand_flash_controllers[i]; i++) {
+ for (size_t i = 0; i < ARRAY_SIZE(nand_flash_controllers); i++) {
struct nand_flash_controller *controller = nand_flash_controllers[i];
if (strcmp(name, controller->name) == 0)
return controller;
@@ -43,7 +44,7 @@ struct nand_flash_controller *nand_driver_find_by_name(const char *name)
}
int nand_driver_walk(nand_driver_walker_t f, void *x)
{
- for (unsigned int i = 0; nand_flash_controllers[i]; i++) {
+ for (size_t i = 0; i < ARRAY_SIZE(nand_flash_controllers); i++) {
int retval = (*f)(nand_flash_controllers[i], x);
if (retval != ERROR_OK)
return retval;
commit 6ab6d3475fb3758b60ad670b1b0d2cf3b2d10768
Author: Antonio Borneo <bor...@gm...>
Date: Sat Jun 14 13:53:50 2025 +0200
flash: nand: sort the drivers by alphabetic order
Add comments to require the list of drivers to be kept sorted.
Change-Id: I21b52cc1f5e679b0ebf7797e204248507f53557b
Signed-off-by: Antonio Borneo <bor...@gm...>
Reviewed-on: https://review.openocd.org/c/openocd/+/8948
Tested-by: jenkins
diff --git a/src/flash/nand/driver.c b/src/flash/nand/driver.c
index 5d99102c8..69b3ba961 100644
--- a/src/flash/nand/driver.c
+++ b/src/flash/nand/driver.c
@@ -14,20 +14,21 @@
#include "driver.h"
static struct nand_flash_controller *nand_flash_controllers[] = {
- &nonce_nand_controller,
+ // Keep in alphabetic order the list of drivers
+ &at91sam9_nand_controller,
&davinci_nand_controller,
+ &imx31_nand_flash_controller,
&lpc3180_nand_controller,
&lpc32xx_nand_controller,
+ &mxc_nand_flash_controller,
+ &nonce_nand_controller,
+ &nuc910_nand_controller,
&orion_nand_controller,
&s3c2410_nand_controller,
&s3c2412_nand_controller,
&s3c2440_nand_controller,
&s3c2443_nand_controller,
&s3c6400_nand_controller,
- &mxc_nand_flash_controller,
- &imx31_nand_flash_controller,
- &at91sam9_nand_controller,
- &nuc910_nand_controller,
NULL
};
diff --git a/src/flash/nand/driver.h b/src/flash/nand/driver.h
index 4e84f10fb..d26e77c75 100644
--- a/src/flash/nand/driver.h
+++ b/src/flash/nand/driver.h
@@ -89,6 +89,7 @@ typedef int (*nand_driver_walker_t)(struct nand_flash_controller *c, void *);
*/
int nand_driver_walk(nand_driver_walker_t f, void *x);
+// Keep in alphabetic order the list of drivers
extern struct nand_flash_controller at91sam9_nand_controller;
extern struct nand_flash_controller davinci_nand_controller;
extern struct nand_flash_controller imx31_nand_flash_controller;
commit fa0fa25764b4737b42fbceab9f56a467263e12b0
Author: Antonio Borneo <bor...@gm...>
Date: Sat Jun 14 14:02:25 2025 +0200
flash: nor: use array size to constraint the loop
Instead of using NULL terminated arrays to determine the last
element of the array, use the size of the array.
Change-Id: Ia3d739b0a9f201ba2e7b1d1244d60c8e5546c9c1
Signed-off-by: Antonio Borneo <bor...@gm...>
Reviewed-on: https://review.openocd.org/c/openocd/+/8947
Reviewed-by: Brandon Martin
Tested-by: jenkins
diff --git a/src/flash/nor/drivers.c b/src/flash/nor/drivers.c
index 4f468848b..cb807ec62 100644
--- a/src/flash/nor/drivers.c
+++ b/src/flash/nor/drivers.c
@@ -7,6 +7,8 @@
#ifdef HAVE_CONFIG_H
#include "config.h"
#endif
+
+#include <helper/types.h>
#include "imp.h"
/**
@@ -89,12 +91,11 @@ static const struct flash_driver * const flash_drivers[] = {
&xcf_flash,
&xmc1xxx_flash,
&xmc4xxx_flash,
- NULL,
};
const struct flash_driver *flash_driver_find_by_name(const char *name)
{
- for (unsigned int i = 0; flash_drivers[i]; i++) {
+ for (size_t i = 0; i < ARRAY_SIZE(flash_drivers); i++) {
if (strcmp(name, flash_drivers[i]->name) == 0)
return flash_drivers[i];
}
-----------------------------------------------------------------------
Summary of changes:
src/flash/nand/driver.c | 18 +++---
src/flash/nand/driver.h | 1 +
src/flash/nor/drivers.c | 5 +-
src/jtag/interface.h | 1 +
src/jtag/interfaces.c | 153 ++++++++++++++++++++++++-----------------------
src/target/target.c | 64 ++++++++++----------
src/target/target_type.h | 1 +
7 files changed, 126 insertions(+), 117 deletions(-)
hooks/post-receive
--
Main OpenOCD repository
|
|
From: openocd-gerrit <ope...@us...> - 2025-06-29 07:32:35
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".
The branch, master has been updated
via a64ae963be55a3a7e12d8f7a91c9787bf4047778 (commit)
from a9015ba79d73fcc68fac7b98e679e6d4818472ee (commit)
Those revisions listed above that are new to this repository have
not appeared on any other notification email; so we list those
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- Log -----------------------------------------------------------------
commit a64ae963be55a3a7e12d8f7a91c9787bf4047778
Author: Antonio Borneo <bor...@gm...>
Date: Sat Jun 14 12:36:07 2025 +0200
flash: nor: sort the drivers by alphabetic order
Add comments to require the list of drivers to be kept sorted.
Change-Id: I57382605edc6a38d6c1ac18393421b18ae72215b
Signed-off-by: Antonio Borneo <bor...@gm...>
Reviewed-on: https://review.openocd.org/c/openocd/+/8946
Tested-by: jenkins
diff --git a/src/flash/nor/driver.h b/src/flash/nor/driver.h
index 3b57ef9ff..da649e783 100644
--- a/src/flash/nor/driver.h
+++ b/src/flash/nor/driver.h
@@ -237,6 +237,7 @@ struct flash_driver {
*/
const struct flash_driver *flash_driver_find_by_name(const char *name);
+// Keep in alphabetic order this list of drivers
extern const struct flash_driver aduc702x_flash;
extern const struct flash_driver aducm360_flash;
extern const struct flash_driver ambiqmicro_flash;
diff --git a/src/flash/nor/drivers.c b/src/flash/nor/drivers.c
index 3770bfbd3..4f468848b 100644
--- a/src/flash/nor/drivers.c
+++ b/src/flash/nor/drivers.c
@@ -14,6 +14,7 @@
* @todo Make this dynamically extendable with loadable modules.
*/
static const struct flash_driver * const flash_drivers[] = {
+ // Keep in alphabetic order the list of drivers
&aduc702x_flash,
&aducm360_flash,
&ambiqmicro_flash,
@@ -27,8 +28,8 @@ static const struct flash_driver * const flash_drivers[] = {
&atsamv_flash,
&avr_flash,
&bluenrgx_flash,
- &cc3220sf_flash,
&cc26xx_flash,
+ &cc3220sf_flash,
&cfi_flash,
&dsp5680xx_flash,
&dw_spi_flash,
@@ -37,9 +38,9 @@ static const struct flash_driver * const flash_drivers[] = {
&eneispif_flash,
&esirisc_flash,
&faux_flash,
+ &fespi_flash,
&fm3_flash,
&fm4_flash,
- &fespi_flash,
&jtagspi_flash,
&kinetis_flash,
&kinetis_ke_flash,
@@ -54,40 +55,40 @@ static const struct flash_driver * const flash_drivers[] = {
&mspm0_flash,
&niietcm4_flash,
&npcx_flash,
- &nrf5_flash,
&nrf51_flash,
+ &nrf5_flash,
&numicro_flash,
&ocl_flash,
&pic32mx_flash,
&psoc4_flash,
- &psoc5lp_flash,
&psoc5lp_eeprom_flash,
+ &psoc5lp_flash,
&psoc5lp_nvl_flash,
&psoc6_flash,
&qn908x_flash,
&renesas_rpchf_flash,
&rp2xxx_flash,
+ &rsl10_flash,
&sh_qspi_flash,
&sim3x_flash,
&stellaris_flash,
&stm32f1x_flash,
&stm32f2x_flash,
- &stm32lx_flash,
- &stm32l4x_flash,
&stm32h7x_flash,
- &stmsmi_flash,
+ &stm32l4x_flash,
+ &stm32lx_flash,
&stmqspi_flash,
+ &stmsmi_flash,
&str7x_flash,
&str9x_flash,
&str9xpec_flash,
&swm050_flash,
&tms470_flash,
&virtual_flash,
+ &w600_flash,
&xcf_flash,
&xmc1xxx_flash,
&xmc4xxx_flash,
- &w600_flash,
- &rsl10_flash,
NULL,
};
-----------------------------------------------------------------------
Summary of changes:
src/flash/nor/driver.h | 1 +
src/flash/nor/drivers.c | 19 ++++++++++---------
2 files changed, 11 insertions(+), 9 deletions(-)
hooks/post-receive
--
Main OpenOCD repository
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From: openocd-gerrit <ope...@us...> - 2025-06-21 07:39:26
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".
The branch, master has been updated
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from 1040bdec79d430440a31e77585547eb15c39966a (commit)
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- Log -----------------------------------------------------------------
commit a9015ba79d73fcc68fac7b98e679e6d4818472ee
Author: Marc Schink <de...@za...>
Date: Thu Jun 19 10:28:36 2025 +0200
tcl/target/lsch3_common: Remove 'mem2array'
The 'mem2array' function is deprecated and replaced by 'read_memory'.
Change-Id: Iea54a390d67978d20dbb99ab6f7f4178dda481c2
Reported-by: Paul Fertser <fer...@gm...>
Signed-off-by: Marc Schink <de...@za...>
Reviewed-on: https://review.openocd.org/c/openocd/+/8962
Reviewed-by: Paul Fertser <fer...@gm...>
Tested-by: jenkins
Reviewed-by: Antonio Borneo <bor...@gm...>
diff --git a/tcl/target/lsch3_common.cfg b/tcl/target/lsch3_common.cfg
index f48d59b9d..ad88b2e1b 100644
--- a/tcl/target/lsch3_common.cfg
+++ b/tcl/target/lsch3_common.cfg
@@ -51,8 +51,8 @@ proc release_cpu {cpu} {
}
# Release the cpu; it will start executing something bogus
- mem2array regs 32 $RST_BRRL 1
- mww $RST_BRRL [expr {$regs(0) | 1 << $cpu}]
+ set reg [read_memory $RST_BRRL 32 1]
+ mww $RST_BRRL [expr {$reg | 1 << $cpu}]
if {$not_halted} {
resume
-----------------------------------------------------------------------
Summary of changes:
tcl/target/lsch3_common.cfg | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
hooks/post-receive
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From: openocd-gerrit <ope...@us...> - 2025-06-21 07:38:45
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".
The branch, master has been updated
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- Log -----------------------------------------------------------------
commit 1040bdec79d430440a31e77585547eb15c39966a
Author: Vitaly Cheptsov <vi...@pr...>
Date: Sun May 18 08:49:30 2025 +0300
jlink: add nickname support
Using nicknames provides a human-readable alternative to serial
numbers for convenience purposes. Allow matching adapter serial
with device nickname.
Change-Id: I03b8d28a6c89412a825d42f4f66b3b528f217d9c
Signed-off-by: Vitaly Cheptsov <vi...@pr...>
Reviewed-on: https://review.openocd.org/c/openocd/+/8886
Tested-by: jenkins
Reviewed-by: Antonio Borneo <bor...@gm...>
Reviewed-by: zapb <de...@za...>
diff --git a/doc/openocd.texi b/doc/openocd.texi
index 948372c7c..494042530 100644
--- a/doc/openocd.texi
+++ b/doc/openocd.texi
@@ -2499,6 +2499,9 @@ If this command is not specified, serial strings are not checked.
Only the following adapter drivers use the serial string from this command:
arm-jtag-ew, cmsis_dap, esp_usb_jtag, ft232r, ftdi, hla (stlink, ti-icdi), jlink, kitprog, opendus,
openjtag, osbdm, presto, rlink, st-link, usb_blaster (ublast2), usbprog, vsllink, xds110.
+
+For jlink adapters, the @var{serial_string} is also compared
+against the adapter's nickname.
@end deffn
@section Interface Drivers
diff --git a/src/jtag/drivers/jlink.c b/src/jtag/drivers/jlink.c
index 9caf37f6f..f6bb3099d 100644
--- a/src/jtag/drivers/jlink.c
+++ b/src/jtag/drivers/jlink.c
@@ -23,6 +23,7 @@
#include <stdint.h>
#include <math.h>
+#include <string.h>
#include <jtag/interface.h>
#include <jtag/swd.h>
@@ -40,8 +41,6 @@ static struct jaylink_connection connlist[JAYLINK_MAX_CONNECTIONS];
static enum jaylink_jtag_version jtag_command_version;
static uint8_t caps[JAYLINK_DEV_EXT_CAPS_SIZE];
-static uint32_t serial_number;
-static bool use_serial_number;
static bool use_usb_location;
static enum jaylink_usb_address usb_address;
static bool use_usb_address;
@@ -561,8 +560,9 @@ static int jlink_open_device(uint32_t ifaces, bool *found_device)
}
use_usb_location = !!adapter_usb_get_location();
+ const char *adapter_serial = adapter_get_required_serial();
- if (!use_serial_number && !use_usb_address && !use_usb_location && num_devices > 1) {
+ if (!adapter_serial && !use_usb_address && !use_usb_location && num_devices > 1) {
LOG_ERROR("Multiple devices found, specify the desired device");
LOG_INFO("Found devices:");
for (size_t i = 0; devs[i]; i++) {
@@ -575,7 +575,12 @@ static int jlink_open_device(uint32_t ifaces, bool *found_device)
jaylink_strerror(ret));
continue;
}
- LOG_INFO("Device %zu serial: %" PRIu32, i, serial);
+ char name[JAYLINK_NICKNAME_MAX_LENGTH];
+ int name_ret = jaylink_device_get_nickname(devs[i], name);
+ if (name_ret == JAYLINK_OK)
+ LOG_INFO("Device %zu serial: %" PRIu32 ", nickname %s", i, serial, name);
+ else
+ LOG_INFO("Device %zu serial: %" PRIu32, i, serial);
}
jaylink_free_devices(devs, true);
@@ -585,23 +590,39 @@ static int jlink_open_device(uint32_t ifaces, bool *found_device)
*found_device = false;
+ uint32_t serial_number;
+ ret = jaylink_parse_serial_number(adapter_serial, &serial_number);
+ if (ret != JAYLINK_OK)
+ serial_number = 0;
+
for (size_t i = 0; devs[i]; i++) {
struct jaylink_device *dev = devs[i];
- if (use_serial_number) {
- uint32_t tmp;
- ret = jaylink_device_get_serial_number(dev, &tmp);
-
- if (ret == JAYLINK_ERR_NOT_AVAILABLE) {
- continue;
- } else if (ret != JAYLINK_OK) {
- LOG_WARNING("jaylink_device_get_serial_number() failed: %s",
- jaylink_strerror(ret));
- continue;
+ if (adapter_serial) {
+ /*
+ * Treat adapter serial as a nickname first as it can also be numeric.
+ * If it fails to match (optional) device nickname try to compare
+ * adapter serial with the actual device serial number.
+ */
+ char nickname[JAYLINK_NICKNAME_MAX_LENGTH];
+ ret = jaylink_device_get_nickname(dev, nickname);
+ if (ret != JAYLINK_OK || strcmp(nickname, adapter_serial) != 0) {
+ if (!serial_number)
+ continue;
+
+ uint32_t tmp;
+ ret = jaylink_device_get_serial_number(dev, &tmp);
+ if (ret == JAYLINK_ERR_NOT_AVAILABLE) {
+ continue;
+ } else if (ret != JAYLINK_OK) {
+ LOG_WARNING("jaylink_device_get_serial_number() failed: %s",
+ jaylink_strerror(ret));
+ continue;
+ }
+
+ if (serial_number != tmp)
+ continue;
}
-
- if (serial_number != tmp)
- continue;
}
if (use_usb_address) {
@@ -670,29 +691,15 @@ static int jlink_init(void)
return ERROR_JTAG_INIT_FAILED;
}
- const char *serial = adapter_get_required_serial();
- if (serial) {
- ret = jaylink_parse_serial_number(serial, &serial_number);
- if (ret == JAYLINK_ERR) {
- LOG_ERROR("Invalid serial number: %s", serial);
- jaylink_exit(jayctx);
- return ERROR_JTAG_INIT_FAILED;
- }
- if (ret != JAYLINK_OK) {
- LOG_ERROR("jaylink_parse_serial_number() failed: %s", jaylink_strerror(ret));
- jaylink_exit(jayctx);
- return ERROR_JTAG_INIT_FAILED;
- }
- use_serial_number = true;
+ if (adapter_get_required_serial())
use_usb_address = false;
- }
bool found_device;
ret = jlink_open_device(JAYLINK_HIF_USB, &found_device);
if (ret != ERROR_OK)
return ret;
- if (!found_device && use_serial_number) {
+ if (!found_device && adapter_get_required_serial()) {
ret = jlink_open_device(JAYLINK_HIF_TCP, &found_device);
if (ret != ERROR_OK)
return ret;
-----------------------------------------------------------------------
Summary of changes:
doc/openocd.texi | 3 ++
src/jtag/drivers/jlink.c | 73 ++++++++++++++++++++++++++----------------------
2 files changed, 43 insertions(+), 33 deletions(-)
hooks/post-receive
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From: openocd-gerrit <ope...@us...> - 2025-06-21 07:38:26
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".
The branch, master has been updated
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from 06a0b8451fd7bb81e463abcaa79a9dcaaa8c0e84 (commit)
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- Log -----------------------------------------------------------------
commit 99d642ca5b9c6c56c14325d6128a661cedae41a3
Author: Marc Schink <de...@za...>
Date: Thu Jun 19 23:44:23 2025 +0200
doc: Fix 'add_help_text' and 'add_usage_text' usage
Remove the quotation marks as they are used for strings and not
parameter names.
Change-Id: I7bb25eb251427e89256b73cf697d8ec5c1b401dc
Signed-off-by: Marc Schink <de...@za...>
Reviewed-on: https://review.openocd.org/c/openocd/+/8963
Tested-by: jenkins
Reviewed-by: Antonio Borneo <bor...@gm...>
diff --git a/doc/openocd.texi b/doc/openocd.texi
index df1d8d0be..948372c7c 100644
--- a/doc/openocd.texi
+++ b/doc/openocd.texi
@@ -9870,11 +9870,11 @@ Requests the current target to map the specified @var{virtual_address}
to its corresponding physical address, and displays the result.
@end deffn
-@deffn {Command} {add_help_text} 'command_name' 'help-string'
+@deffn {Command} {add_help_text} command_name help_string
Add or replace help text on the given @var{command_name}.
@end deffn
-@deffn {Command} {add_usage_text} 'command_name' 'help-string'
+@deffn {Command} {add_usage_text} command_name help_string
Add or replace usage text on the given @var{command_name}.
@end deffn
-----------------------------------------------------------------------
Summary of changes:
doc/openocd.texi | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
hooks/post-receive
--
Main OpenOCD repository
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From: openocd-gerrit <ope...@us...> - 2025-06-21 07:38:03
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".
The branch, master has been updated
via 06a0b8451fd7bb81e463abcaa79a9dcaaa8c0e84 (commit)
from 1afa12005ca84d549bddf31cc8a39308b7bdd197 (commit)
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- Log -----------------------------------------------------------------
commit 06a0b8451fd7bb81e463abcaa79a9dcaaa8c0e84
Author: Marc Schink <de...@za...>
Date: Mon Jun 16 10:04:44 2025 +0200
doc: Fix 'find' and 'ocd_find' usage
Remove the quotation marks as they are used for strings and not
parameter names.
Change-Id: Ib0629e1465f821f91cd1e837f4ef8c752013b6b7
Signed-off-by: Marc Schink <de...@za...>
Reviewed-on: https://review.openocd.org/c/openocd/+/8955
Tested-by: jenkins
Reviewed-by: Antonio Borneo <bor...@gm...>
diff --git a/doc/openocd.texi b/doc/openocd.texi
index ec856757d..df1d8d0be 100644
--- a/doc/openocd.texi
+++ b/doc/openocd.texi
@@ -1382,11 +1382,11 @@ Read the OpenOCD source code (and Developer's Guide)
if you have a new kind of hardware interface
and need to provide a driver for it.
-@deffn {Command} {find} 'filename'
+@deffn {Command} {find} filename
Prints full path to @var{filename} according to OpenOCD search rules.
@end deffn
-@deffn {Command} {ocd_find} 'filename'
+@deffn {Command} {ocd_find} filename
Prints full path to @var{filename} according to OpenOCD search rules. This
is a low level function used by the @command{find}. Usually you want
to use @command{find}, instead.
-----------------------------------------------------------------------
Summary of changes:
doc/openocd.texi | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
hooks/post-receive
--
Main OpenOCD repository
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|
From: openocd-gerrit <ope...@us...> - 2025-06-21 07:37:29
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".
The branch, master has been updated
via 1afa12005ca84d549bddf31cc8a39308b7bdd197 (commit)
from 82dc399e5e73495c0464283cff331854271706be (commit)
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- Log -----------------------------------------------------------------
commit 1afa12005ca84d549bddf31cc8a39308b7bdd197
Author: Marc Schink <de...@za...>
Date: Sun Jun 15 22:44:53 2025 +0200
doc: Fix 'add_script_search_dir' usage
The 'directory' parameter is not optional.
Change-Id: Ifbc7b311692157dae0621dfa6d35a24b8fe8cbb2
Signed-off-by: Marc Schink <de...@za...>
Reviewed-on: https://review.openocd.org/c/openocd/+/8954
Reviewed-by: Antonio Borneo <bor...@gm...>
Tested-by: jenkins
diff --git a/doc/openocd.texi b/doc/openocd.texi
index 4ad66ee5f..ec856757d 100644
--- a/doc/openocd.texi
+++ b/doc/openocd.texi
@@ -9335,7 +9335,7 @@ Redirect logging to @var{filename}. If used without an argument or
stderr.
@end deffn
-@deffn {Command} {add_script_search_dir} [directory]
+@deffn {Command} {add_script_search_dir} directory
Add @var{directory} to the file/script search path.
@end deffn
-----------------------------------------------------------------------
Summary of changes:
doc/openocd.texi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
hooks/post-receive
--
Main OpenOCD repository
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From: openocd-gerrit <ope...@us...> - 2025-06-21 07:37:10
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".
The branch, master has been updated
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from 9e4b6b90c960b769bf87cf233e638198d96da647 (commit)
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- Log -----------------------------------------------------------------
commit 82dc399e5e73495c0464283cff331854271706be
Author: Tomas Vanek <va...@fb...>
Date: Sat Jun 14 12:18:53 2025 +0200
target/cortex_m: fix debug reason after reset halt
[1] removed target_halt() from cortex_m_assert_reset()
It broke debug_reason tracking and the previous reason
was shown after reset halt.
Set debug_reason to DBG_REASON_DBGRQ during reset halt
preparation.
Fixes: [1] commit 226085065bdf ("target/cortex_m: drop useless target_halt() call")
Reported-by: Marc Schink <de...@za...>
Change-Id: I685618ed158abde11f6e00eeeee1dfa8ed90952d
Signed-off-by: Tomas Vanek <va...@fb...>
Reviewed-on: https://review.openocd.org/c/openocd/+/8945
Tested-by: jenkins
Reviewed-by: zapb <de...@za...>
diff --git a/src/target/cortex_m.c b/src/target/cortex_m.c
index ba9d83d79..8eaf70f60 100644
--- a/src/target/cortex_m.c
+++ b/src/target/cortex_m.c
@@ -1779,6 +1779,7 @@ static int cortex_m_assert_reset(struct target *target)
int retval2;
retval2 = mem_ap_write_atomic_u32(armv7m->debug_ap, DCB_DEMCR,
TRCENA | VC_HARDERR | VC_BUSERR | VC_CORERESET);
+ target->debug_reason = DBG_REASON_DBGRQ;
if (retval != ERROR_OK || retval2 != ERROR_OK)
LOG_TARGET_INFO(target, "AP write error, reset will not halt");
}
-----------------------------------------------------------------------
Summary of changes:
src/target/cortex_m.c | 1 +
1 file changed, 1 insertion(+)
hooks/post-receive
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From: openocd-gerrit <ope...@us...> - 2025-06-21 07:36:25
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".
The branch, master has been updated
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- Log -----------------------------------------------------------------
commit 9e4b6b90c960b769bf87cf233e638198d96da647
Author: R. Diez <rdi...@rd...>
Date: Sun Jun 8 10:37:21 2025 +0200
configure.ac: show 5 ARM adapters in config summary
Adapters: bcm2835gpio, imx_gpio, am335xgpio, ep93xx and at91rm9200
Allow the user to enable them regardless of the target architecture.
Change-Id: I9fbc7cbefe770ea2e2239b95a3305fd29127fa85
Signed-off-by: R. Diez <rdi...@rd...>
Reviewed-on: https://review.openocd.org/c/openocd/+/8892
Reviewed-by: Antonio Borneo <bor...@gm...>
Tested-by: jenkins
diff --git a/configure.ac b/configure.ac
index b13af86d8..4b9471629 100644
--- a/configure.ac
+++ b/configure.ac
@@ -197,6 +197,15 @@ m4_define([RSHIM_ADAPTER],
m4_define([AMTJTAGACCEL_ADAPTER],
[[[amtjtagaccel], [Amontec JTAG-Accelerator driver], [AMTJTAGACCEL]]])
+m4_define([HOST_ARM_BITBANG_ADAPTERS],
+ [[[ep93xx], [Bitbanging on EP93xx-based SBCs], [EP93XX]],
+ [[at91rm9200], [Bitbanging on AT91RM9200-based SBCs], [AT91RM9200]]])
+
+m4_define([HOST_ARM_OR_AARCH64_BITBANG_ADAPTERS],
+ [[[bcm2835gpio], [Bitbanging on BCM2835 (as found in Raspberry Pi)], [BCM2835GPIO]],
+ [[imx_gpio], [Bitbanging on NXP IMX processors], [IMX_GPIO]],
+ [[am335xgpio], [Bitbanging on AM335x (as found in Beaglebones)], [AM335XGPIO]]])
+
# The word 'Adapter' in "Dummy Adapter" below must begin with a capital letter
# because there is an M4 macro called 'adapter'.
m4_define([DUMMY_ADAPTER],
@@ -336,6 +345,16 @@ AC_ARG_ADAPTERS([
AMTJTAGACCEL_ADAPTER
],[no])
+# The following adapters use bitbanging and can actually be built on all architectures,
+# which is useful to verify that they still build fine.
+# We could enable them automatically only on the architectures where they actually occur:
+# HOST_ARM_BITBANG_ADAPTERS: when ${host_cpu} matches arm*
+# HOST_ARM_OR_AARCH64_BITBANG_ADAPTERS: when ${host_cpu} matches arm*|aarch64
+# However, conditionally changing the meaning of 'auto' requires
+# a more flexible logic around.
+AC_ARG_ADAPTERS([HOST_ARM_BITBANG_ADAPTERS],[no])
+AC_ARG_ADAPTERS([HOST_ARM_OR_AARCH64_BITBANG_ADAPTERS],[no])
+
AC_ARG_ENABLE([parport],
AS_HELP_STRING([--enable-parport], [Enable building the pc parallel port driver]),
[build_parport=$enableval], [build_parport=no])
@@ -350,39 +369,6 @@ AC_ARG_ENABLE([parport_giveio],
[Enable use of giveio for parport (for CygWin only)]),
[parport_use_giveio=$enableval], [parport_use_giveio=])
-AS_CASE(["${host_cpu}"],
- [arm*|aarch64], [
- AC_ARG_ENABLE([bcm2835gpio],
- AS_HELP_STRING([--enable-bcm2835gpio], [Enable building support for bitbanging on BCM2835 (as found in Raspberry Pi)]),
- [build_bcm2835gpio=$enableval], [build_bcm2835gpio=no])
- AC_ARG_ENABLE([imx_gpio],
- AS_HELP_STRING([--enable-imx_gpio], [Enable building support for bitbanging on NXP IMX processors]),
- [build_imx_gpio=$enableval], [build_imx_gpio=no])
- AC_ARG_ENABLE([am335xgpio],
- AS_HELP_STRING([--enable-am335xgpio], [Enable building support for bitbanging on AM335x (as found in Beaglebones)]),
- [build_am335xgpio=$enableval], [build_am335xgpio=no])
- ],
- [
- build_bcm2835gpio=no
- build_imx_gpio=no
- build_am335xgpio=no
-])
-
-AS_CASE(["${host_cpu}"],
- [arm*], [
- AC_ARG_ENABLE([ep93xx],
- AS_HELP_STRING([--enable-ep93xx], [Enable building support for EP93xx based SBCs]),
- [build_ep93xx=$enableval], [build_ep93xx=no])
-
- AC_ARG_ENABLE([at91rm9200],
- AS_HELP_STRING([--enable-at91rm9200], [Enable building support for AT91RM9200 based SBCs]),
- [build_at91rm9200=$enableval], [build_at91rm9200=no])
- ],
- [
- build_ep93xx=no
- build_at91rm9200=no
-])
-
AC_ARG_ENABLE([gw16012],
AS_HELP_STRING([--enable-gw16012], [Enable building support for the Gateworks GW16012 JTAG Programmer]),
[build_gw16012=$enableval], [build_gw16012=no])
@@ -529,41 +515,6 @@ AS_IF([test "x$ADAPTER_VAR([dummy])" != "xno"], [
build_bitbang=yes
])
-AS_IF([test "x$build_ep93xx" = "xyes"], [
- build_bitbang=yes
- AC_DEFINE([BUILD_EP93XX], [1], [1 if you want ep93xx.])
-], [
- AC_DEFINE([BUILD_EP93XX], [0], [0 if you don't want ep93xx.])
-])
-
-AS_IF([test "x$build_at91rm9200" = "xyes"], [
- build_bitbang=yes
- AC_DEFINE([BUILD_AT91RM9200], [1], [1 if you want at91rm9200.])
-], [
- AC_DEFINE([BUILD_AT91RM9200], [0], [0 if you don't want at91rm9200.])
-])
-
-AS_IF([test "x$build_bcm2835gpio" = "xyes"], [
- build_bitbang=yes
- AC_DEFINE([BUILD_BCM2835GPIO], [1], [1 if you want bcm2835gpio.])
-], [
- AC_DEFINE([BUILD_BCM2835GPIO], [0], [0 if you don't want bcm2835gpio.])
-])
-
-AS_IF([test "x$build_imx_gpio" = "xyes"], [
- build_bitbang=yes
- AC_DEFINE([BUILD_IMX_GPIO], [1], [1 if you want imx_gpio.])
-], [
- AC_DEFINE([BUILD_IMX_GPIO], [0], [0 if you don't want imx_gpio.])
-])
-
-AS_IF([test "x$build_am335xgpio" = "xyes"], [
- build_bitbang=yes
- AC_DEFINE([BUILD_AM335XGPIO], [1], [1 if you want am335xgpio.])
-], [
- AC_DEFINE([BUILD_AM335XGPIO], [0], [0 if you don't want am335xgpio.])
-])
-
AS_IF([test "x$parport_use_ppdev" = "xyes"], [
AC_DEFINE([PARPORT_USE_PPDEV], [1], [1 if you want parport to use ppdev.])
], [
@@ -709,6 +660,8 @@ PROCESS_ADAPTERS([JTAG_VPI_ADAPTER], [true], [unused])
PROCESS_ADAPTERS([RSHIM_ADAPTER], ["x$can_build_rshim" = "xyes"],
[internal error: validation should happen beforehand])
PROCESS_ADAPTERS([AMTJTAGACCEL_ADAPTER], [true], [unused])
+PROCESS_ADAPTERS([HOST_ARM_BITBANG_ADAPTERS], [true], [unused])
+PROCESS_ADAPTERS([HOST_ARM_OR_AARCH64_BITBANG_ADAPTERS], [true], [unused])
PROCESS_ADAPTERS([DUMMY_ADAPTER], [true], [unused])
AS_IF([test "x$enable_linuxgpiod" != "xno"], [
@@ -723,6 +676,26 @@ AS_IF([test "x$enable_remote_bitbang" != "xno"], [
build_bitbang=yes
])
+AS_IF([test "x$enable_bcm2835gpio" != "xno"], [
+ build_bitbang=yes
+])
+
+AS_IF([test "x$enable_imx_gpio" != "xno"], [
+ build_bitbang=yes
+])
+
+AS_IF([test "x$enable_am335xgpio" != "xno"], [
+ build_bitbang=yes
+])
+
+AS_IF([test "x$enable_ep93xx" != "xno"], [
+ build_bitbang=yes
+])
+
+AS_IF([test "x$enable_at91rm9200" != "xno"], [
+ build_bitbang=yes
+])
+
AS_IF([test "x$enable_stlink" != "xno" -o "x$enable_ti_icdi" != "xno" -o "x$enable_nulink" != "xno"], [
AC_DEFINE([BUILD_HLADAPTER], [1], [1 if you want the High Level JTAG driver.])
AM_CONDITIONAL([HLADAPTER], [true])
@@ -758,11 +731,6 @@ AS_IF([test "x$enable_esp_usb_jtag" != "xno"], [
AM_CONDITIONAL([RELEASE], [test "x$build_release" = "xyes"])
AM_CONDITIONAL([PARPORT], [test "x$build_parport" = "xyes"])
AM_CONDITIONAL([GIVEIO], [test "x$parport_use_giveio" = "xyes"])
-AM_CONDITIONAL([EP93XX], [test "x$build_ep93xx" = "xyes"])
-AM_CONDITIONAL([AT91RM9200], [test "x$build_at91rm9200" = "xyes"])
-AM_CONDITIONAL([BCM2835GPIO], [test "x$build_bcm2835gpio" = "xyes"])
-AM_CONDITIONAL([IMX_GPIO], [test "x$build_imx_gpio" = "xyes"])
-AM_CONDITIONAL([AM335XGPIO], [test "x$build_am335xgpio" = "xyes"])
AM_CONDITIONAL([BITBANG], [test "x$build_bitbang" = "xyes"])
AM_CONDITIONAL([USB_BLASTER_DRIVER], [test "x$enable_usb_blaster" != "xno" -o "x$enable_usb_blaster_2" != "xno"])
AM_CONDITIONAL([GW16012], [test "x$build_gw16012" = "xyes"])
@@ -884,10 +852,12 @@ m4_foreach([adapter], [USB1_ADAPTERS,
JTAG_VPI_ADAPTER,
RSHIM_ADAPTER,
AMTJTAGACCEL_ADAPTER,
+ HOST_ARM_BITBANG_ADAPTERS,
+ HOST_ARM_OR_AARCH64_BITBANG_ADAPTERS,
DUMMY_ADAPTER,
OPTIONAL_LIBRARIES,
COVERAGE],
- [s=m4_format(["%-41s"], ADAPTER_DESC([adapter]))
+ [s=m4_format(["%-49s"], ADAPTER_DESC([adapter]))
AS_CASE([$ADAPTER_VAR([adapter])],
[auto], [
echo "$s"yes '(auto)'
-----------------------------------------------------------------------
Summary of changes:
configure.ac | 118 ++++++++++++++++++++++-------------------------------------
1 file changed, 44 insertions(+), 74 deletions(-)
hooks/post-receive
--
Main OpenOCD repository
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|
From: openocd-gerrit <ope...@us...> - 2025-06-21 07:36:00
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".
The branch, master has been updated
via 33ebae9abde0b67ad33bb527cf5a2c2f761ab2c4 (commit)
from 1ebff3ab33c77e3f8fb4e1ddda262b606b572af1 (commit)
Those revisions listed above that are new to this repository have
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- Log -----------------------------------------------------------------
commit 33ebae9abde0b67ad33bb527cf5a2c2f761ab2c4
Author: Daniel Goehring <dgo...@os...>
Date: Tue Jan 18 12:34:25 2022 -0500
target/armv8: update MPIDR decoding
Update MPIDR decode to support the multithreading (MT) bit.
If detected, socket, cluster, core and multithread affinity levels are
decoded and displayed.
Change-Id: I43569141fa0eef8ee8fc16c187a4af3c23e97db8
Signed-off-by: Daniel Goehring <dgo...@os...>
Reviewed-on: https://review.openocd.org/c/openocd/+/7190
Reviewed-by: Antonio Borneo <bor...@gm...>
Tested-by: jenkins
diff --git a/src/target/armv8.c b/src/target/armv8.c
index 40390731e..ece49c2a2 100644
--- a/src/target/armv8.c
+++ b/src/target/armv8.c
@@ -883,12 +883,27 @@ int armv8_read_mpidr(struct armv8_common *armv8)
int retval = ERROR_FAIL;
struct arm *arm = &armv8->arm;
struct arm_dpm *dpm = armv8->arm.dpm;
- uint32_t mpidr;
+ uint64_t mpidr;
+ uint8_t multi_processor_system;
+ uint8_t aff3;
+ uint8_t aff2;
+ uint8_t aff1;
+ uint8_t aff0;
+ uint8_t mt;
retval = dpm->prepare(dpm);
if (retval != ERROR_OK)
goto done;
+ /*
+ * TODO: BUG - routine armv8_dpm_modeswitch() doesn't re-evaluate 'arm->dpm->core_state'.
+ * If the core is halted in EL0 AArch32 while EL1 is in AArch64, the modeswitch moves the core
+ * to EL1, but there is no re-evaluation of dpm->arm->core_state. As a result, while the core
+ * is in AArch64, the code considers the system still in AArch32. The read of MPIDR would
+ * select the instruction based on the old core_state. The call to 'armv8_dpm_get_core_state()'
+ * below could also potentially return the incorrect execution state for the current EL.
+ */
+
/* check if we're in an unprivileged mode */
if (armv8_curel_from_core_mode(arm->core_mode) < SYSTEM_CUREL_EL1) {
retval = armv8_dpm_modeswitch(dpm, ARMV8_64_EL1H);
@@ -896,17 +911,39 @@ int armv8_read_mpidr(struct armv8_common *armv8)
return retval;
}
- retval = dpm->instr_read_data_r0(dpm, armv8_opcode(armv8, READ_REG_MPIDR), &mpidr);
+ retval = dpm->instr_read_data_r0_64(dpm, armv8_opcode(armv8, READ_REG_MPIDR), &mpidr);
if (retval != ERROR_OK)
goto done;
if (mpidr & 1U<<31) {
- armv8->multi_processor_system = (mpidr >> 30) & 1;
- armv8->cluster_id = (mpidr >> 8) & 0xf;
- armv8->cpu_id = mpidr & 0x3;
- LOG_INFO("%s cluster %x core %x %s", target_name(armv8->arm.target),
- armv8->cluster_id,
- armv8->cpu_id,
- armv8->multi_processor_system == 0 ? "multi core" : "single core");
+ multi_processor_system = (mpidr >> 30) & 1;
+ aff3 = (mpidr >> 32) & 0xff;
+ aff2 = (mpidr >> 16) & 0xff;
+ aff1 = (mpidr >> 8) & 0xff;
+ aff0 = mpidr & 0xff;
+ mt = (mpidr >> 24) & 0x1;
+ if (armv8_dpm_get_core_state(&armv8->dpm) == ARM_STATE_AARCH64) {
+ if (mt)
+ LOG_INFO("%s socket %" PRIu32 " cluster %" PRIu32 " core %" PRIu32 " thread %" PRIu32 " %s",
+ target_name(armv8->arm.target),
+ aff3, aff2, aff1, aff0,
+ multi_processor_system == 0 ? "multi core" : "single core");
+ else
+ LOG_INFO("%s socket %" PRIu32 " cluster %" PRIu32 " core %" PRIu32 " %s",
+ target_name(armv8->arm.target),
+ aff3, aff1, aff0,
+ multi_processor_system == 0 ? "multi core" : "single core");
+ } else {
+ if (mt)
+ LOG_INFO("%s cluster %" PRIu32 " core %" PRIu32 " thread %" PRIu32 " %s",
+ target_name(armv8->arm.target),
+ aff2, aff1, aff0,
+ multi_processor_system == 0 ? "multi core" : "single core");
+ else
+ LOG_INFO("%s cluster %" PRIu32 " core %" PRIu32 " %s",
+ target_name(armv8->arm.target),
+ aff1, aff0,
+ multi_processor_system == 0 ? "multi core" : "single core");
+ }
} else
LOG_ERROR("mpidr not in multiprocessor format");
diff --git a/src/target/armv8.h b/src/target/armv8.h
index dba12f966..64ca5ec9d 100644
--- a/src/target/armv8.h
+++ b/src/target/armv8.h
@@ -195,11 +195,6 @@ struct armv8_common {
const uint32_t *opcodes;
- /* mdir */
- uint8_t multi_processor_system;
- uint8_t cluster_id;
- uint8_t cpu_id;
-
/* armv8 aarch64 need below information for page translation */
uint8_t va_size;
uint8_t pa_size;
-----------------------------------------------------------------------
Summary of changes:
src/target/armv8.c | 55 +++++++++++++++++++++++++++++++++++++++++++++---------
src/target/armv8.h | 5 -----
2 files changed, 46 insertions(+), 14 deletions(-)
hooks/post-receive
--
Main OpenOCD repository
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|
From: openocd-gerrit <ope...@us...> - 2025-06-14 13:57:03
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".
The branch, master has been updated
via 1ebff3ab33c77e3f8fb4e1ddda262b606b572af1 (commit)
from 9a7c85b163d409ff48e9d445afe4cefbc6c28394 (commit)
Those revisions listed above that are new to this repository have
not appeared on any other notification email; so we list those
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- Log -----------------------------------------------------------------
commit 1ebff3ab33c77e3f8fb4e1ddda262b606b572af1
Author: Antonio Borneo <bor...@gm...>
Date: Sat Jun 14 09:52:57 2025 +0200
jep106: update to revision JEP106BM Jun 2025
Update to latest available document.
Change-Id: Ic1c892b42d3efbb35ad4a6c85deb17ab31ad9997
Signed-off-by: Antonio Borneo <bor...@gm...>
Reviewed-on: https://review.openocd.org/c/openocd/+/8944
Tested-by: jenkins
diff --git a/src/helper/jep106.inc b/src/helper/jep106.inc
index 8bbaf4ca5..5e50e1955 100644
--- a/src/helper/jep106.inc
+++ b/src/helper/jep106.inc
@@ -8,7 +8,7 @@
* identification code list, please visit the JEDEC website at www.jedec.org .
*/
-/* This file is aligned to revision JEP106BL February 2025. */
+/* This file is aligned to revision JEP106BM June 2025. */
[0][0x01 - 1] = "AMD",
[0][0x02 - 1] = "AMI",
@@ -78,7 +78,7 @@
[0][0x42 - 1] = "Macronix",
[0][0x43 - 1] = "Xerox",
[0][0x44 - 1] = "Plus Logic",
-[0][0x45 - 1] = "Western Digital Technologies Inc",
+[0][0x45 - 1] = "SanDisk Technologies Inc",
[0][0x46 - 1] = "Elan Circuit Tech.",
[0][0x47 - 1] = "European Silicon Str.",
[0][0x48 - 1] = "Apple Computer",
@@ -1798,7 +1798,7 @@
[14][0x16 - 1] = "Chiplego Technology (Shanghai) Co Ltd",
[14][0x17 - 1] = "StoreSkill",
[14][0x18 - 1] = "Shenzhen Astou Technology Company",
-[14][0x19 - 1] = "Guangdong LeafFive Technology Limited",
+[14][0x19 - 1] = "Guangdong LeapFive Technology Limited",
[14][0x1a - 1] = "Jin JuQuan",
[14][0x1b - 1] = "Huaxuan Technology (Shenzhen) Co Ltd",
[14][0x1c - 1] = "Gigastone Corporation",
@@ -2049,4 +2049,39 @@
[16][0x15 - 1] = "Hangzhou Lishu Technology Co Ltd",
[16][0x16 - 1] = "Tier IV Inc",
[16][0x17 - 1] = "Wuhan Xuanluzhe Network Technology Co",
+[16][0x18 - 1] = "EA Semi (Shanghai) Limited",
+[16][0x19 - 1] = "Tech Vision Information Technology Co",
+[16][0x1a - 1] = "Zhihe Computing Technology",
+[16][0x1b - 1] = "Beijing Apexichips Tech",
+[16][0x1c - 1] = "Yemas Holdingsl Limited",
+[16][0x1d - 1] = "Eluktronics",
+[16][0x1e - 1] = "Walton Digi-Tech Industries Ltd",
+[16][0x1f - 1] = "Beijing Qixin Gongli Technology Co Ltd",
+[16][0x20 - 1] = "M.RED",
+[16][0x21 - 1] = "Shenzhen Damay Semiconductor Co Ltd",
+[16][0x22 - 1] = "Corelab Tech Singapore Holding PTE LTD",
+[16][0x23 - 1] = "EmBestor Technology Inc",
+[16][0x24 - 1] = "XConn Technologies",
+[16][0x25 - 1] = "Flagchip",
+[16][0x26 - 1] = "CUNNUC",
+[16][0x27 - 1] = "SGMicro",
+[16][0x28 - 1] = "Lanxin Computing (Shenzhen) Technology",
+[16][0x29 - 1] = "FuturePlus Systems LLC",
+[16][0x2a - 1] = "Shenzhen Jielong Storage Technology Co",
+[16][0x2b - 1] = "Precision Planting LLC",
+[16][0x2c - 1] = "Sichuan ZeroneStor Microelectronics Tech",
+[16][0x2d - 1] = "The University of Tokyo",
+[16][0x2e - 1] = "Aodu (Fujian) Information Technology Co",
+[16][0x2f - 1] = "Bytera Memory Inc",
+[16][0x30 - 1] = "XSemitron Technology Inc",
+[16][0x31 - 1] = "Cloud Ridge Ltd",
+[16][0x32 - 1] = "Shenzhen XinChiTai Technology Co Ltd",
+[16][0x33 - 1] = "Shenzhen Xinxin Semiconductor Co Ltd",
+[16][0x34 - 1] = "Shenzhen ShineKing Electronics Co Ltd.",
+[16][0x35 - 1] = "Shenzhen Shande Semiconductor Co. Ltd.",
+[16][0x36 - 1] = "AheadComputing",
+[16][0x37 - 1] = "Beijing Ronghua Kangweiye Technology",
+[16][0x38 - 1] = "Shanghai Yunsilicon Technology Co Ltd",
+[16][0x39 - 1] = "Shenzhen Wolongtai Technology Co Ltd.",
+[16][0x3a - 1] = "Vervesemi Microelectronics",
/* EOF */
-----------------------------------------------------------------------
Summary of changes:
src/helper/jep106.inc | 41 ++++++++++++++++++++++++++++++++++++++---
1 file changed, 38 insertions(+), 3 deletions(-)
hooks/post-receive
--
Main OpenOCD repository
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|
From: openocd-gerrit <ope...@us...> - 2025-06-13 16:32:01
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".
The branch, master has been updated
via 9a7c85b163d409ff48e9d445afe4cefbc6c28394 (commit)
from 8046f2a38f8af0048c0d2d0842b8a708b79c0c57 (commit)
Those revisions listed above that are new to this repository have
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- Log -----------------------------------------------------------------
commit 9a7c85b163d409ff48e9d445afe4cefbc6c28394
Author: R. Diez <rdi...@rd...>
Date: Sun Jun 8 11:22:39 2025 +0200
configure.ac: remove usage of obsolete Automake macro AM_PROG_CC_C_O
Macro AM_PROG_CC_C_O has been obsolete since Automake 1.14,
released in June 2013 (12 years ago).
It used to check whether the C compiler supports the -c and -o options,
but that is now included in AC_PROG_CC.
Increase the minimum required Automake version to 1.14 accordingly.
Also remove the "not a GNU package" comment,
which does not really make sense.
Change-Id: I987ba8686721c7f36fba81e100f1c3ddf77f636d
Signed-off-by: R. Diez <rdi...@rd...>
Reviewed-on: https://review.openocd.org/c/openocd/+/8942
Reviewed-by: Antonio Borneo <bor...@gm...>
Tested-by: jenkins
diff --git a/Makefile.am b/Makefile.am
index b2b6cef00..845543721 100644
--- a/Makefile.am
+++ b/Makefile.am
@@ -1,8 +1,6 @@
# SPDX-License-Identifier: GPL-2.0-or-later
-# not a GNU package. You can remove this line, if
-# have all needed files, that a GNU package needs
-AUTOMAKE_OPTIONS = gnu 1.6
+AUTOMAKE_OPTIONS = gnu 1.14
.DELETE_ON_ERROR:
diff --git a/configure.ac b/configure.ac
index 0bac37e5d..b13af86d8 100644
--- a/configure.ac
+++ b/configure.ac
@@ -24,7 +24,6 @@ AC_LANG([C])
AC_PROG_CC
# autoconf 2.70 obsoletes AC_PROG_CC_C99 and includes it in AC_PROG_CC
m4_version_prereq([2.70],[],[AC_PROG_CC_C99])
-AM_PROG_CC_C_O
AC_PROG_RANLIB
# If macro PKG_PROG_PKG_CONFIG is not available, Autoconf generates a misleading error message,
-----------------------------------------------------------------------
Summary of changes:
Makefile.am | 4 +---
configure.ac | 1 -
2 files changed, 1 insertion(+), 4 deletions(-)
hooks/post-receive
--
Main OpenOCD repository
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|
From: openocd-gerrit <ope...@us...> - 2025-06-13 16:28:05
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".
The branch, master has been updated
via 8046f2a38f8af0048c0d2d0842b8a708b79c0c57 (commit)
from 207ecaab33b985b16a067fc2c054a4f2cc161dc3 (commit)
Those revisions listed above that are new to this repository have
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- Log -----------------------------------------------------------------
commit 8046f2a38f8af0048c0d2d0842b8a708b79c0c57
Author: kryvosheiaivan <Iva...@in...>
Date: Wed May 28 16:52:42 2025 +0300
cmsis-dap: Fix freeing pending transfers on close
Freeing pending transfers on shutdown is done in openOCD
and on libusb side. This created concurrency in freeing
memory and segmentation faults:
https://github.com/libusb/libusb/issues/1627
Bug is reproduced better if many targets are laucnhed.
Bug was reproduced with CMSIS-DAP on targets:
cyw20829, psoc4, stm32l5 if launching multiple times.
Proposed working fix: if some transfers pending/in-flight
on 'shutdown' then apply libusb_handle_events_timeout_completed()
to make transfer complete. In all cases transfer completed
due to tests.
Change-Id: I44621ac6096791714910220d04614d0a19ce47bd
Signed-off-by: kryvosheiaivan <Iva...@in...>
Reviewed-on: https://review.openocd.org/c/openocd/+/8876
Reviewed-by: Tomas Vanek <va...@fb...>
Tested-by: jenkins
Reviewed-by: Antonio Borneo <bor...@gm...>
diff --git a/src/jtag/drivers/cmsis_dap_usb_bulk.c b/src/jtag/drivers/cmsis_dap_usb_bulk.c
index 8fbcb029d..0dd6b2bbc 100644
--- a/src/jtag/drivers/cmsis_dap_usb_bulk.c
+++ b/src/jtag/drivers/cmsis_dap_usb_bulk.c
@@ -414,7 +414,19 @@ static int cmsis_dap_usb_open(struct cmsis_dap *dap, uint16_t vids[], uint16_t p
static void cmsis_dap_usb_close(struct cmsis_dap *dap)
{
for (unsigned int i = 0; i < MAX_PENDING_REQUESTS; i++) {
- libusb_free_transfer(dap->bdata->command_transfers[i].transfer);
+ if (dap->bdata->command_transfers[i].status == CMSIS_DAP_TRANSFER_PENDING) {
+ LOG_DEBUG("busy command USB transfer at %u", dap->pending_fifo_put_idx);
+ struct timeval tv = {
+ .tv_sec = 1,
+ .tv_usec = 1000
+ };
+ /* Complete pending commands */
+ int res = libusb_handle_events_timeout_completed(dap->bdata->usb_ctx, &tv, NULL);
+ if (res == 0)
+ libusb_free_transfer(dap->bdata->command_transfers[i].transfer);
+ } else {
+ libusb_free_transfer(dap->bdata->command_transfers[i].transfer);
+ }
libusb_free_transfer(dap->bdata->response_transfers[i].transfer);
}
cmsis_dap_usb_free(dap);
-----------------------------------------------------------------------
Summary of changes:
src/jtag/drivers/cmsis_dap_usb_bulk.c | 14 +++++++++++++-
1 file changed, 13 insertions(+), 1 deletion(-)
hooks/post-receive
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From: openocd-gerrit <ope...@us...> - 2025-06-13 16:27:22
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".
The branch, master has been updated
via 207ecaab33b985b16a067fc2c054a4f2cc161dc3 (commit)
from 88aec4b49939a3f29fd3d9d5e8954e5bffeda8c9 (commit)
Those revisions listed above that are new to this repository have
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- Log -----------------------------------------------------------------
commit 207ecaab33b985b16a067fc2c054a4f2cc161dc3
Author: Marc Schink <de...@za...>
Date: Wed Oct 9 11:14:21 2024 +0200
adapter: Deprecate Gateworks GW16012 driver
The adapter is not available for years now. There is also no information
about this device from Gateworks. The poor hardware availability and the
lack of users prevents testing, maintenance and adaptations to future
changes.
Mark the adapter as deprecated as a first step to give potential users
the opportunity to upgrade the hardware until the next OpenOCD release.
Change-Id: I037325a6b018b26608733a36bef30db2785858f8
Signed-off-by: Marc Schink <de...@za...>
Reviewed-on: https://review.openocd.org/c/openocd/+/8651
Tested-by: jenkins
Reviewed-by: Antonio Borneo <bor...@gm...>
diff --git a/configure.ac b/configure.ac
index 9561f2ba0..0bac37e5d 100644
--- a/configure.ac
+++ b/configure.ac
@@ -862,6 +862,11 @@ AS_IF([test "x$enable_amtjtagaccel" != "xno"], [
echo
AC_MSG_WARN([Amontec JTAG-Accelerator adapter is deprecated and support will be removed in the next release!])
])
+AS_IF([test "x$build_gw16012" = "xyes"], [
+ echo
+ echo
+ AC_MSG_WARN([Gateworks GW16012 JTAG adapter is deprecated and support will be removed in the next release!])
+])
echo
echo
diff --git a/doc/openocd.texi b/doc/openocd.texi
index 04fa77bd4..4ad66ee5f 100644
--- a/doc/openocd.texi
+++ b/doc/openocd.texi
@@ -2929,6 +2929,8 @@ image. To be used with USB-Blaster II only.
@end deffn
@deffn {Interface Driver} {gw16012}
+@b{Note: This adapter is deprecated and support will be removed in the next release!}
+
Gateworks GW16012 JTAG programmer.
This has one driver-specific command:
diff --git a/src/jtag/drivers/gw16012.c b/src/jtag/drivers/gw16012.c
index 805065f1f..98f775422 100644
--- a/src/jtag/drivers/gw16012.c
+++ b/src/jtag/drivers/gw16012.c
@@ -461,6 +461,8 @@ static int gw16012_init(void)
{
uint8_t status_port;
+ LOG_WARNING("This adapter is deprecated and support will be removed in the next release!");
+
if (gw16012_init_device() != ERROR_OK)
return ERROR_JTAG_INIT_FAILED;
-----------------------------------------------------------------------
Summary of changes:
configure.ac | 5 +++++
doc/openocd.texi | 2 ++
src/jtag/drivers/gw16012.c | 2 ++
3 files changed, 9 insertions(+)
hooks/post-receive
--
Main OpenOCD repository
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|
From: openocd-gerrit <ope...@us...> - 2025-06-13 16:27:08
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".
The branch, master has been updated
via 88aec4b49939a3f29fd3d9d5e8954e5bffeda8c9 (commit)
from c77ba0cf57f0632ecbdca500516f449853e017f4 (commit)
Those revisions listed above that are new to this repository have
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- Log -----------------------------------------------------------------
commit 88aec4b49939a3f29fd3d9d5e8954e5bffeda8c9
Author: Marc Schink <de...@za...>
Date: Wed Oct 9 11:13:42 2024 +0200
adapter: Deprecate Amontec JTAG Accelerator driver
The adapter is not available for years now and Amontec is not even a
company anymore. The poor hardware availability and the lack of users
prevents testing, maintenance and adaptations to future changes.
Mark the adapter as deprecated as a first step to give potential users
the opportunity to upgrade the hardware until the next OpenOCD release.
Change-Id: Idd9fb75588246bc39e12ea17a71435ed77f0f50b
Signed-off-by: Marc Schink <de...@za...>
Reviewed-on: https://review.openocd.org/c/openocd/+/8349
Reviewed-by: Antonio Borneo <bor...@gm...>
Tested-by: jenkins
diff --git a/configure.ac b/configure.ac
index 3e1d9a2ba..9561f2ba0 100644
--- a/configure.ac
+++ b/configure.ac
@@ -857,6 +857,12 @@ AS_IF([test "x$use_internal_jimtcl" = "xyes"], [
AC_MSG_WARN([Using the internal jimtcl is deprecated and will not be possible in the future.])
])
+AS_IF([test "x$enable_amtjtagaccel" != "xno"], [
+ echo
+ echo
+ AC_MSG_WARN([Amontec JTAG-Accelerator adapter is deprecated and support will be removed in the next release!])
+])
+
echo
echo
echo OpenOCD configuration summary
diff --git a/doc/openocd.texi b/doc/openocd.texi
index bd6b3704a..04fa77bd4 100644
--- a/doc/openocd.texi
+++ b/doc/openocd.texi
@@ -2508,6 +2508,8 @@ enabled when OpenOCD is configured, in order to be made
available at run time.
@deffn {Interface Driver} {amt_jtagaccel}
+@b{Note: This adapter is deprecated and support will be removed in the next release!}
+
Amontec Chameleon in its JTAG Accelerator configuration,
connected to a PC's EPP mode parallel port.
This defines some driver-specific commands:
diff --git a/src/jtag/drivers/amt_jtagaccel.c b/src/jtag/drivers/amt_jtagaccel.c
index 633c20413..d3f8bb61e 100644
--- a/src/jtag/drivers/amt_jtagaccel.c
+++ b/src/jtag/drivers/amt_jtagaccel.c
@@ -419,6 +419,8 @@ static int amt_jtagaccel_init(void)
#endif
uint8_t ar_status;
+ LOG_WARNING("This adapter is deprecated and support will be removed in the next release!");
+
#if PARPORT_USE_PPDEV == 1
if (device_handle > 0) {
LOG_ERROR("device is already opened");
-----------------------------------------------------------------------
Summary of changes:
configure.ac | 6 ++++++
doc/openocd.texi | 2 ++
src/jtag/drivers/amt_jtagaccel.c | 2 ++
3 files changed, 10 insertions(+)
hooks/post-receive
--
Main OpenOCD repository
|
|
From: openocd-gerrit <ope...@us...> - 2025-06-13 16:26:23
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".
The branch, master has been updated
via c77ba0cf57f0632ecbdca500516f449853e017f4 (commit)
from fa83ca0bea5532afa1cb7b994b77cc3b6d77f7db (commit)
Those revisions listed above that are new to this repository have
not appeared on any other notification email; so we list those
revisions in full, below.
- Log -----------------------------------------------------------------
commit c77ba0cf57f0632ecbdca500516f449853e017f4
Author: Antonio Borneo <bor...@gm...>
Date: Tue Jun 3 11:52:59 2025 +0200
HACKING: describe keeping the 'Change-Id' on new patch versions
We often get on Gerrit a new version of an old patch with a new
'Change-Id' value. This breaks the history of the review, adding
more work to the review process.
Describe in HACKING why the hook 'commit-msg' is required and how
to handle the 'Change-Id' on new patch versions.
Change-Id: I5c060b19f966add7422704912b38e1ab2f788e5f
Signed-off-by: Antonio Borneo <bor...@gm...>
Reviewed-on: https://review.openocd.org/c/openocd/+/8940
Tested-by: jenkins
diff --git a/HACKING b/HACKING
index 8988b1617..785179efe 100644
--- a/HACKING
+++ b/HACKING
@@ -169,7 +169,9 @@ git remote add review https://USERNAME:PAS...@re.../p/openocd.git
Gerrit server, even if you plan to use several local branches for different
topics. It is possible because @c for/master is not a traditional Git
branch.
- -# You will need to install this hook, we will look into a better solution:
+ -# You will need to install this hook to automatically add the
+ field "Change-Id:" in the commit message, as required by Gerrit.
+ We will look into a better solution:
@code
wget https://review.openocd.org/tools/hooks/commit-msg
mv commit-msg .git/hooks
@@ -246,6 +248,12 @@ doc: fix typos
@code
git pull --rebase origin master
@endcode
+
+-# When you create a new version of an old patch, check that the new patch
+ keeps the same 'Change-Id:' field of the old patch.
+ This allows the Gerrit server to recognize the patch as a new version of
+ the older one and keeps track of the history and the review process.
+
-# Send the patches to the Gerrit server for review:
@code
git push review
-----------------------------------------------------------------------
Summary of changes:
HACKING | 10 +++++++++-
1 file changed, 9 insertions(+), 1 deletion(-)
hooks/post-receive
--
Main OpenOCD repository
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|
From: openocd-gerrit <ope...@us...> - 2025-06-13 16:25:21
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".
The branch, master has been updated
via fa83ca0bea5532afa1cb7b994b77cc3b6d77f7db (commit)
via e171959edec1275fd417617f69cec7ede529ec14 (commit)
from 2da332fa83b1aa55a61a44e6fe4d2089a9bb34b9 (commit)
Those revisions listed above that are new to this repository have
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- Log -----------------------------------------------------------------
commit fa83ca0bea5532afa1cb7b994b77cc3b6d77f7db
Author: Electric Worry <me...@el...>
Date: Thu May 29 11:31:59 2025 +0100
tcl/board/orange_pi_zero_3: Add Orange Pi Zero 3 board
The Orange Pi Zero 3 is an SBC that uses an Allwinner H618
SoC. As such, JTAG support is fully available, however the
SoC multiplexes JTAG function with UART1 and microSD.
Unfortunately Xunlong has used UART1 for the Wifi-BT
chip, leaving JTAG accessible only via the microSD using
a microSD breakout board (for example).
Change-Id: I0dc078cd2f3176815271917eb5e948cc8ef94525
Signed-off-by: Electric Worry <me...@el...>
Reviewed-on: https://review.openocd.org/c/openocd/+/8938
Tested-by: jenkins
Reviewed-by: Antonio Borneo <bor...@gm...>
Reviewed-by: Tomas Vanek <va...@fb...>
diff --git a/tcl/board/orange_pi_zero_3.cfg b/tcl/board/orange_pi_zero_3.cfg
new file mode 100644
index 000000000..2af983c65
--- /dev/null
+++ b/tcl/board/orange_pi_zero_3.cfg
@@ -0,0 +1,24 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
+# This is the Orange Pi Zero 3 board with Allwinner H618 chip
+# http://www.orangepi.org/html/hardWare/computerAndMicrocontrollers/details/Orange-Pi-Zero-3.html
+#
+# Accessing JTAG signals on Orange Pi Zero 3 board requires connection to pins
+# on the microSD card slot.
+# 1 - DAT2 - TCK
+# 2 - CD/DAT3 - NC
+# 3 - CMD - TDO
+# 4 - VDD - NC
+# 5 - CLK - NC
+# 6 - VSS - NC
+# 7 - DAT0 - TDI
+# 8 - DAT1 - TMS
+#
+# PF Configure Register 0 at address 0x0300b0b4 must be set 0x07373733 to set
+# the JTAG function on these pins (which is what the factory installed image on
+# the SPI flash does when the board is powered without a microSD inserted).
+
+source [find target/allwinner_h618.cfg]
+
+# To this contributor's knowledge, the board neither exposes TRST nor SRST.
+reset_config none
commit e171959edec1275fd417617f69cec7ede529ec14
Author: Electric Worry <me...@el...>
Date: Thu May 29 10:51:59 2025 +0100
target: add support for Allwinner H618 SoC
The Allwinner H618 is an updated H616 but appears functionally
equivalent. It is used in small boards such as Orange Pi Zero 3.
Change-Id: I299a42be746189f3e8e31070aa26b83ab7d806a4
Signed-off-by: Electric Worry <me...@el...>
Reviewed-on: https://review.openocd.org/c/openocd/+/8936
Reviewed-by: Antonio Borneo <bor...@gm...>
Tested-by: jenkins
diff --git a/tcl/target/allwinner_h618.cfg b/tcl/target/allwinner_h618.cfg
new file mode 100644
index 000000000..98d3ace0d
--- /dev/null
+++ b/tcl/target/allwinner_h618.cfg
@@ -0,0 +1,57 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
+# This is the Allwinner H618 chip. It is an updated version of the Allwinner H616.
+
+# Information is available on linux-sunxi.org:
+# Datasheet: https://linux-sunxi.org/images/b/b9/H616_Datasheet_V1.0_cleaned.pdf
+# Manual: https://linux-sunxi.org/images/2/24/H616_User_Manual_V1.0_cleaned.pdf
+
+if { [info exists CHIPNAME] } {
+ set _CHIPNAME $CHIPNAME
+} else {
+ set _CHIPNAME h618
+}
+
+if { [info exists USE_SMP] } {
+ set _USE_SMP $USE_SMP
+} else {
+ set _USE_SMP 0
+}
+
+if { [info exists DAP_TAPID] } {
+ set _DAP_TAPID $DAP_TAPID
+} else {
+ set _DAP_TAPID 0x5ba00477
+}
+
+set _cores 4
+jtag newtap $_CHIPNAME cpu -expected-id $_DAP_TAPID -irlen 4
+adapter speed 4000
+
+dap create $_CHIPNAME.dap -chain-position $_CHIPNAME.cpu
+
+# MEM-AP for direct access
+target create $_CHIPNAME.ap mem_ap -dap $_CHIPNAME.dap -ap-num 1
+
+# these addresses are obtained from the ROM table via 'dap info 1' command
+set _DBGBASE {0x81410000 0x81510000 0x81610000 0x81710000}
+set _CTIBASE {0x81420000 0x81520000 0x81620000 0x81720000}
+
+set _smp_command "target smp"
+
+for { set _core 0 } { $_core < $_cores } { incr _core } {
+ set _CTINAME $_CHIPNAME.cti$_core
+ set _TARGETNAME $_CHIPNAME.cpu$_core
+
+ cti create $_CTINAME -dap $_CHIPNAME.dap -ap-num 1 -baseaddr [lindex $_CTIBASE $_core]
+ target create $_TARGETNAME aarch64 -dap $_CHIPNAME.dap -ap-num 1 -dbgbase [lindex $_DBGBASE $_core] -cti $_CTINAME
+
+ set _smp_command "$_smp_command $_TARGETNAME"
+}
+
+if {$_USE_SMP} {
+ eval $_smp_command
+}
+
+# default target is cpu0
+targets $_CHIPNAME.cpu0
-----------------------------------------------------------------------
Summary of changes:
tcl/board/orange_pi_zero_3.cfg | 24 ++++++++++++++++++++
tcl/target/{bcm2711.cfg => allwinner_h618.cfg} | 31 +++++++++++---------------
2 files changed, 37 insertions(+), 18 deletions(-)
create mode 100644 tcl/board/orange_pi_zero_3.cfg
copy tcl/target/{bcm2711.cfg => allwinner_h618.cfg} (56%)
hooks/post-receive
--
Main OpenOCD repository
|
|
From: openocd-gerrit <ope...@us...> - 2025-06-13 16:23:53
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".
The branch, master has been updated
via 2da332fa83b1aa55a61a44e6fe4d2089a9bb34b9 (commit)
from 37a0f013f8893ae5041136900a2198ef16d38226 (commit)
Those revisions listed above that are new to this repository have
not appeared on any other notification email; so we list those
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- Log -----------------------------------------------------------------
commit 2da332fa83b1aa55a61a44e6fe4d2089a9bb34b9
Author: HAOUES Ahmed <ahm...@st...>
Date: Tue May 27 11:42:42 2025 +0100
flash/bluenrg-x: support programming without loader
fallback programming without loader when resources are not available
while at there refactor reused code
(wait for interrupt and command execution)
Change-Id: I2cba0f53d3470bc324f4a72614c236cebf196f64
Signed-off-by: BOCHKATI Tarek <tar...@st...>
Signed-off-by: HAOUES Ahmed <ahm...@st...>
Reviewed-on: https://review.openocd.org/c/openocd/+/8883
Tested-by: jenkins
Reviewed-by: Antonio Borneo <bor...@gm...>
diff --git a/src/flash/nor/bluenrg-x.c b/src/flash/nor/bluenrg-x.c
index a953e9b28..ccbbcc66e 100644
--- a/src/flash/nor/bluenrg-x.c
+++ b/src/flash/nor/bluenrg-x.c
@@ -143,8 +143,45 @@ static inline int bluenrgx_write_flash_reg(struct flash_bank *bank, uint32_t reg
return target_write_u32(bank->target, bluenrgx_get_flash_reg(bank, reg_offset), value);
}
-static int bluenrgx_erase(struct flash_bank *bank, unsigned int first,
- unsigned int last)
+static int bluenrgx_wait_for_interrupt(struct flash_bank *bank, uint32_t interrupt_flag)
+{
+ bool flag_raised = false;
+ for (unsigned int j = 0; j < 100; j++) {
+ uint32_t value;
+ if (bluenrgx_read_flash_reg(bank, FLASH_REG_IRQRAW, &value) != ERROR_OK) {
+ LOG_ERROR("Register read failed");
+ return ERROR_FAIL;
+ }
+
+ if (value & interrupt_flag) {
+ flag_raised = true;
+ break;
+ }
+ }
+
+ /* clear the interrupt */
+ if (flag_raised) {
+ if (bluenrgx_write_flash_reg(bank, FLASH_REG_IRQRAW, interrupt_flag) != ERROR_OK) {
+ LOG_ERROR("Cannot clear interrupt flag");
+ return ERROR_FAIL;
+ }
+
+ return ERROR_OK;
+ }
+
+ LOG_ERROR("Erase command failed (timeout)");
+ return ERROR_TIMEOUT_REACHED;
+}
+
+static inline int bluenrgx_wait_for_command(struct flash_bank *bank)
+{
+ if (bluenrgx_wait_for_interrupt(bank, FLASH_INT_CMDSTART) == ERROR_OK)
+ return bluenrgx_wait_for_interrupt(bank, FLASH_INT_CMDDONE);
+
+ return ERROR_FAIL;
+}
+
+static int bluenrgx_erase(struct flash_bank *bank, unsigned int first, unsigned int last)
{
int retval = ERROR_OK;
struct bluenrgx_flash_bank *bluenrgx_info = bank->driver_priv;
@@ -186,19 +223,8 @@ static int bluenrgx_erase(struct flash_bank *bank, unsigned int first,
return ERROR_FAIL;
}
- for (unsigned int i = 0; i < 100; i++) {
- uint32_t value;
- if (bluenrgx_read_flash_reg(bank, FLASH_REG_IRQRAW, &value)) {
- LOG_ERROR("Register write failed");
- return ERROR_FAIL;
- }
- if (value & FLASH_INT_CMDDONE)
- break;
- if (i == 99) {
- LOG_ERROR("Mass erase command failed (timeout)");
- retval = ERROR_FAIL;
- }
- }
+ if (bluenrgx_wait_for_command(bank) != ERROR_OK)
+ return ERROR_FAIL;
} else {
command = FLASH_CMD_ERASE_PAGE;
@@ -222,19 +248,8 @@ static int bluenrgx_erase(struct flash_bank *bank, unsigned int first,
return ERROR_FAIL;
}
- for (unsigned int j = 0; j < 100; j++) {
- uint32_t value;
- if (bluenrgx_read_flash_reg(bank, FLASH_REG_IRQRAW, &value)) {
- LOG_ERROR("Register write failed");
- return ERROR_FAIL;
- }
- if (value & FLASH_INT_CMDDONE)
- break;
- if (j == 99) {
- LOG_ERROR("Erase command failed (timeout)");
- retval = ERROR_FAIL;
- }
- }
+ if (bluenrgx_wait_for_command(bank) != ERROR_OK)
+ return ERROR_FAIL;
}
}
@@ -242,7 +257,7 @@ static int bluenrgx_erase(struct flash_bank *bank, unsigned int first,
}
-static int bluenrgx_write(struct flash_bank *bank, const uint8_t *buffer,
+static int bluenrgx_write_with_loader(struct flash_bank *bank, const uint8_t *buffer,
uint32_t offset, uint32_t count)
{
struct bluenrgx_flash_bank *bluenrgx_info = bank->driver_priv;
@@ -264,22 +279,6 @@ static int bluenrgx_write(struct flash_bank *bank, const uint8_t *buffer,
#include "../../../contrib/loaders/flash/bluenrg-x/bluenrg-x_write.inc"
};
- /* check preconditions */
- if (!bluenrgx_info->probed)
- return ERROR_FLASH_BANK_NOT_PROBED;
-
- if ((offset + count) > bank->size) {
- LOG_ERROR("Requested write past beyond of flash size: (offset+count) = %" PRIu32 ", size=%" PRIu32,
- (offset + count),
- bank->size);
- return ERROR_FLASH_DST_OUT_OF_BANK;
- }
-
- if (bank->target->state != TARGET_HALTED) {
- LOG_ERROR("Target not halted");
- return ERROR_TARGET_NOT_HALTED;
- }
-
if (target_alloc_working_area(target, sizeof(bluenrgx_flash_write_code),
&write_algorithm) != ERROR_OK) {
LOG_WARNING("no working area available, can't do block memory writes");
@@ -366,6 +365,7 @@ static int bluenrgx_write(struct flash_bank *bank, const uint8_t *buffer,
if (error != 0)
LOG_ERROR("flash write failed = %08" PRIx32, error);
}
+
if (retval == ERROR_OK) {
uint32_t rp;
/* Read back rp and check that is valid */
@@ -377,6 +377,7 @@ static int bluenrgx_write(struct flash_bank *bank, const uint8_t *buffer,
}
}
}
+
target_free_working_area(target, source);
target_free_working_area(target, write_algorithm);
target_free_working_area(target, write_algorithm_stack);
@@ -391,6 +392,80 @@ static int bluenrgx_write(struct flash_bank *bank, const uint8_t *buffer,
return retval;
}
+static int bluenrgx_write_without_loader(struct flash_bank *bank, const uint8_t *buffer,
+ uint32_t offset, uint32_t count)
+{
+ struct target *target = bank->target;
+ unsigned int data_count = count / FLASH_DATA_WIDTH;
+
+ while (data_count--) {
+ /* clear flags */
+ if (bluenrgx_write_flash_reg(bank, FLASH_REG_IRQRAW, 0x3f) != ERROR_OK) {
+ LOG_ERROR("Register write failed");
+ return ERROR_FAIL;
+ }
+
+ if (bluenrgx_write_flash_reg(bank, FLASH_REG_ADDRESS, offset >> 2) != ERROR_OK) {
+ LOG_ERROR("Register write failed");
+ return ERROR_FAIL;
+ }
+
+ if (target_write_memory(target, bluenrgx_get_flash_reg(bank, FLASH_REG_DATA0),
+ FLASH_WORD_LEN, FLASH_DATA_WIDTH_W, buffer) != ERROR_OK) {
+ LOG_ERROR("Failed to write data");
+ return ERROR_FAIL;
+ }
+
+ if (bluenrgx_write_flash_reg(bank, FLASH_REG_COMMAND, FLASH_CMD_BURSTWRITE) != ERROR_OK) {
+ LOG_ERROR("Failed");
+ return ERROR_FAIL;
+ }
+
+ if (bluenrgx_wait_for_command(bank) != ERROR_OK)
+ return ERROR_FAIL;
+
+ /* increment offset, and buffer */
+ offset += FLASH_DATA_WIDTH;
+ buffer += FLASH_DATA_WIDTH;
+ }
+
+ return ERROR_OK;
+}
+
+static int bluenrgx_write(struct flash_bank *bank, const uint8_t *buffer,
+ uint32_t offset, uint32_t count)
+{
+ struct bluenrgx_flash_bank *bluenrgx_info = bank->driver_priv;
+ int retval = ERROR_OK;
+
+ /* check preconditions */
+ if (!bluenrgx_info->probed)
+ return ERROR_FLASH_BANK_NOT_PROBED;
+
+ if ((offset + count) > bank->size) {
+ LOG_ERROR("Requested write past beyond of flash size: (offset+count) = %" PRIu32 ", size=%" PRIu32,
+ (offset + count),
+ bank->size);
+ return ERROR_FLASH_DST_OUT_OF_BANK;
+ }
+
+ if (bank->target->state != TARGET_HALTED) {
+ LOG_ERROR("Target not halted");
+ return ERROR_TARGET_NOT_HALTED;
+ }
+
+ assert(offset % FLASH_WORD_LEN == 0);
+ assert(count % FLASH_WORD_LEN == 0);
+
+ retval = bluenrgx_write_with_loader(bank, buffer, offset, count);
+ /* if resources are not available write without a loader */
+ if (retval == ERROR_TARGET_RESOURCE_NOT_AVAILABLE) {
+ LOG_WARNING("falling back to programming without a flash loader (slower)");
+ retval = bluenrgx_write_without_loader(bank, buffer, offset, count);
+ }
+ return retval;
+}
+
static int bluenrgx_probe(struct flash_bank *bank)
{
struct bluenrgx_flash_bank *bluenrgx_info = bank->driver_priv;
@@ -428,7 +503,7 @@ static int bluenrgx_probe(struct flash_bank *bank)
return retval;
bank->size = (size_info + 1) * FLASH_WORD_LEN;
- bank->num_sectors = bank->size/FLASH_PAGE_SIZE(bluenrgx_info);
+ bank->num_sectors = bank->size / FLASH_PAGE_SIZE(bluenrgx_info);
bank->sectors = realloc(bank->sectors, sizeof(struct flash_sector) * bank->num_sectors);
for (unsigned int i = 0; i < bank->num_sectors; i++) {
diff --git a/src/flash/nor/bluenrg-x.h b/src/flash/nor/bluenrg-x.h
index 720cb6e61..03c66cd81 100644
--- a/src/flash/nor/bluenrg-x.h
+++ b/src/flash/nor/bluenrg-x.h
@@ -28,7 +28,12 @@
#define FLASH_CMD_WRITE 0x33
#define FLASH_CMD_BURSTWRITE 0xCC
#define FLASH_INT_CMDDONE 0x01
+#define FLASH_INT_CMDSTART 0x02
+/* Flash Controller constants */
#define FLASH_WORD_LEN 4
+#define FLASH_DATA_WIDTH_W 4
+#define FLASH_DATA_WIDTH 16
+
#endif /* OPENOCD_FLASH_NOR_BLUENRGX_H */
-----------------------------------------------------------------------
Summary of changes:
src/flash/nor/bluenrg-x.c | 167 +++++++++++++++++++++++++++++++++-------------
src/flash/nor/bluenrg-x.h | 5 ++
2 files changed, 126 insertions(+), 46 deletions(-)
hooks/post-receive
--
Main OpenOCD repository
|
|
From: openocd-gerrit <ope...@us...> - 2025-06-13 16:23:23
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".
The branch, master has been updated
via 37a0f013f8893ae5041136900a2198ef16d38226 (commit)
from 0644a88a1ba60ccc2730a10954d255342a276309 (commit)
Those revisions listed above that are new to this repository have
not appeared on any other notification email; so we list those
revisions in full, below.
- Log -----------------------------------------------------------------
commit 37a0f013f8893ae5041136900a2198ef16d38226
Author: HAOUES Ahmed <ahm...@st...>
Date: Thu May 29 10:01:20 2025 +0100
flash/bluenrg-x: fix programming for devices with 512k flash
flash ADDRESS register is encoded in 17 bits (was 16),
so fix the cast to uint32_t
Change-Id: I13384ee8967e65890577b12a42a0eb4f1e2a7467
Signed-off-by: HAOUES Ahmed <ahm...@st...>
Reviewed-on: https://review.openocd.org/c/openocd/+/8882
Tested-by: jenkins
Reviewed-by: Antonio Borneo <bor...@gm...>
diff --git a/contrib/loaders/flash/bluenrg-x/bluenrg-x_write.c b/contrib/loaders/flash/bluenrg-x/bluenrg-x_write.c
index 1bc72d592..3c1988f11 100644
--- a/contrib/loaders/flash/bluenrg-x/bluenrg-x_write.c
+++ b/contrib/loaders/flash/bluenrg-x/bluenrg-x_write.c
@@ -52,7 +52,7 @@ static inline __attribute__((always_inline)) uint32_t flashWrite(uint32_t addres
/* Clear the IRQ flags */
*((volatile uint32_t *)(flash_regs_base + FLASH_REG_IRQRAW)) = 0x0000003F;
/* Load the flash address to write */
- *((volatile uint32_t *)(flash_regs_base + FLASH_REG_ADDRESS)) = (uint16_t)((address + index - MFB_BOTTOM) >> 2);
+ *((volatile uint32_t *)(flash_regs_base + FLASH_REG_ADDRESS)) = (uint32_t)((address + index - MFB_BOTTOM) >> 2);
/* Prepare and load the data to flash */
*((volatile uint32_t *)(flash_regs_base + FLASH_REG_DATA0)) = flash_word[0];
*((volatile uint32_t *)(flash_regs_base + FLASH_REG_DATA1)) = flash_word[1];
diff --git a/contrib/loaders/flash/bluenrg-x/bluenrg-x_write.inc b/contrib/loaders/flash/bluenrg-x/bluenrg-x_write.inc
index ff05634bb..146a6bede 100644
--- a/contrib/loaders/flash/bluenrg-x/bluenrg-x_write.inc
+++ b/contrib/loaders/flash/bluenrg-x/bluenrg-x_write.inc
@@ -1,17 +1,19 @@
/* Autogenerated with ../../../../src/helper/bin2char.sh */
-0x05,0x93,0x43,0x68,0x14,0x9e,0x09,0x93,0x05,0x9b,0x05,0x00,0x07,0x91,0x06,0x92,
-0x01,0x24,0xb1,0x46,0x00,0x2b,0x68,0xd0,0x6a,0x68,0x2b,0x68,0x9a,0x42,0xfb,0xd0,
-0x2b,0x68,0x00,0x2b,0x61,0xd0,0x6a,0x68,0x2b,0x68,0x9a,0x42,0x5e,0xd9,0x6b,0x68,
-0x07,0x9a,0xd3,0x1a,0x0f,0x2b,0xef,0xdd,0x4a,0x46,0x00,0x21,0x03,0x93,0xd1,0x60,
-0x00,0x2b,0x42,0xd0,0x40,0x22,0x4a,0x44,0x90,0x46,0x44,0x22,0x4a,0x44,0x00,0x92,
-0x48,0x22,0x4a,0x44,0x93,0x46,0x4c,0x22,0x27,0x4f,0x4a,0x44,0xbc,0x46,0x4e,0x46,
-0x92,0x46,0x06,0x99,0x4b,0x46,0x61,0x44,0x08,0x00,0x00,0x99,0x18,0x36,0x6a,0x68,
-0x08,0x95,0x8c,0x46,0x55,0x46,0xda,0x46,0xb3,0x46,0x10,0x33,0x04,0x92,0x11,0x68,
-0x5e,0x46,0x00,0x91,0x51,0x68,0x97,0x68,0x01,0x91,0xd1,0x68,0x02,0x91,0x3f,0x21,
-0x19,0x60,0x81,0x03,0x09,0x0c,0x31,0x60,0x46,0x46,0x00,0x99,0x31,0x60,0x66,0x46,
-0x01,0x99,0x31,0x60,0x56,0x46,0x02,0x99,0x37,0x60,0x29,0x60,0xcc,0x26,0x49,0x46,
-0x0e,0x60,0x19,0x68,0x0c,0x42,0xfc,0xd0,0x04,0x99,0x03,0x9e,0x10,0x32,0x10,0x30,
-0x51,0x1a,0x8e,0x42,0xdb,0xd8,0x08,0x9d,0x6a,0x60,0x03,0x9a,0x06,0x9b,0x94,0x46,
-0x63,0x44,0x06,0x93,0x07,0x9a,0x6b,0x68,0x9a,0x42,0x01,0xd8,0x09,0x9b,0x6b,0x60,
-0x05,0x9b,0x03,0x9a,0x9b,0x1a,0x05,0x93,0x96,0xd1,0x00,0xbe,0x2b,0x68,0x6a,0x68,
-0x9b,0x1a,0x9f,0xd5,0x90,0xe7,0xc0,0x46,0x00,0x00,0xfc,0xef,
+0x16,0x9e,0x05,0x00,0x01,0x24,0xb1,0x46,0x06,0x93,0x43,0x68,0x08,0x91,0x07,0x92,
+0x09,0x93,0x06,0x9b,0x00,0x2b,0x6f,0xd0,0x6a,0x68,0x2b,0x68,0x9a,0x42,0xfb,0xd0,
+0x2b,0x68,0x00,0x2b,0x68,0xd0,0x6a,0x68,0x2b,0x68,0x9a,0x42,0x65,0xd9,0x6b,0x68,
+0x08,0x9a,0xd3,0x1a,0x0b,0x93,0x0b,0x9b,0x0f,0x2b,0xea,0xdd,0x4a,0x46,0x00,0x21,
+0x0b,0x9b,0xd1,0x60,0x04,0x93,0x00,0x2b,0x43,0xd0,0x31,0x4a,0x07,0x9b,0x94,0x46,
+0x40,0x22,0x4a,0x44,0x90,0x46,0x44,0x22,0x4a,0x44,0x63,0x44,0x94,0x46,0x48,0x22,
+0x4a,0x44,0x93,0x46,0x05,0x93,0x4c,0x22,0x4b,0x46,0x4a,0x44,0x10,0x33,0x4e,0x46,
+0x92,0x46,0x00,0x93,0x2b,0x00,0x18,0x36,0x6a,0x68,0x55,0x46,0xb2,0x46,0x5e,0x46,
+0x9b,0x46,0x10,0x68,0x57,0x68,0x01,0x90,0x3f,0x20,0x00,0x9b,0x02,0x97,0x97,0x68,
+0x03,0x97,0xd7,0x68,0x18,0x60,0x53,0x46,0x05,0x98,0x40,0x18,0x80,0x08,0x18,0x60,
+0x43,0x46,0x01,0x98,0x18,0x60,0x63,0x46,0x02,0x98,0x18,0x60,0x03,0x98,0x4b,0x46,
+0x30,0x60,0xcc,0x20,0x2f,0x60,0x18,0x60,0x00,0x9b,0x18,0x68,0x04,0x42,0xfc,0xd0,
+0x58,0x46,0x10,0x32,0x42,0x60,0x04,0x98,0x10,0x31,0x00,0x93,0x88,0x42,0xd8,0xd8,
+0x5d,0x46,0x07,0x9a,0x0b,0x9b,0x94,0x46,0x9c,0x44,0x63,0x46,0x08,0x9a,0x07,0x93,
+0x6b,0x68,0x93,0x42,0x01,0xd3,0x09,0x9b,0x6b,0x60,0x06,0x9a,0x0b,0x9b,0xd3,0x1a,
+0x06,0x93,0x06,0x9b,0x00,0x2b,0x8f,0xd1,0x00,0xbe,0x2b,0x68,0x6a,0x68,0x9b,0x1a,
+0x0b,0x93,0x0b,0x9b,0x00,0x2b,0x00,0xdb,0x95,0xe7,0x00,0x23,0x0b,0x93,0x92,0xe7,
+0x00,0x00,0xfc,0xef,
diff --git a/src/flash/nor/bluenrg-x.c b/src/flash/nor/bluenrg-x.c
index cde4af5e3..a953e9b28 100644
--- a/src/flash/nor/bluenrg-x.c
+++ b/src/flash/nor/bluenrg-x.c
@@ -315,10 +315,10 @@ static int bluenrgx_write(struct flash_bank *bank, const uint8_t *buffer,
init_reg_param(®_params[4], "sp", 32, PARAM_OUT);
/* Put the 4th parameter at the location in the stack frame of target write() function.
* See contrib/loaders/flash/bluenrg-x/bluenrg-x_write.lst
- * 34 ldr r6, [sp, #80]
+ * 34 ldr r6, [sp, #88]
* ^^^ offset
*/
- init_mem_param(&mem_params[0], write_algorithm_stack->address + 80, 32, PARAM_OUT);
+ init_mem_param(&mem_params[0], write_algorithm_stack->address + 88, 32, PARAM_OUT);
/* Stack for target write algorithm - target write() function has
* __attribute__((naked)) so it does not setup the new stack frame.
* Therefore the stack frame uses the area from SP upwards!
-----------------------------------------------------------------------
Summary of changes:
contrib/loaders/flash/bluenrg-x/bluenrg-x_write.c | 2 +-
.../loaders/flash/bluenrg-x/bluenrg-x_write.inc | 34 ++++++++++++----------
src/flash/nor/bluenrg-x.c | 4 +--
3 files changed, 21 insertions(+), 19 deletions(-)
hooks/post-receive
--
Main OpenOCD repository
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|
From: openocd-gerrit <ope...@us...> - 2025-06-13 16:23:08
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".
The branch, master has been updated
via 0644a88a1ba60ccc2730a10954d255342a276309 (commit)
via 990ee1be73bcc0e901282c4898ee14c663c781c6 (commit)
from 4732e40637682a805956fd99832c151a9d4a691e (commit)
Those revisions listed above that are new to this repository have
not appeared on any other notification email; so we list those
revisions in full, below.
- Log -----------------------------------------------------------------
commit 0644a88a1ba60ccc2730a10954d255342a276309
Author: HAOUES Ahmed <ahm...@st...>
Date: Tue May 27 11:34:24 2025 +0100
flash/bluenrg-x: Support STM32WB09 AKA BlueNRG-LPF device
The BlueNRG-LPF has a flash size up to 512 Kb
Change-Id: I4c71b716330351004f4f2ab8bf8eac7d5bb694eb
Signed-off-by: HAOUES Ahmed <ahm...@st...>
Reviewed-on: https://review.openocd.org/c/openocd/+/8881
Tested-by: jenkins
Reviewed-by: Antonio Borneo <bor...@gm...>
diff --git a/src/flash/nor/bluenrg-x.c b/src/flash/nor/bluenrg-x.c
index d019c1165..cde4af5e3 100644
--- a/src/flash/nor/bluenrg-x.c
+++ b/src/flash/nor/bluenrg-x.c
@@ -19,6 +19,7 @@
#define BLUENRG2_JTAG_REG (flash_priv_data_2.jtag_idcode_reg)
#define BLUENRGLP_JTAG_REG (flash_priv_data_lp.jtag_idcode_reg)
+#define BLUENRGLPF_JTAG_REG (flash_priv_data_lpf.jtag_idcode_reg)
#define DIE_ID_REG(bluenrgx_info) (bluenrgx_info->flash_ptr->die_id_reg)
#define JTAG_IDCODE_REG(bluenrgx_info) (bluenrgx_info->flash_ptr->jtag_idcode_reg)
@@ -76,6 +77,16 @@ static const struct flash_ctrl_priv_data flash_priv_data_lps = {
.part_name = "STM32WB05 (BLUENRG-LPS)",
};
+static const struct flash_ctrl_priv_data flash_priv_data_lpf = {
+ .die_id_reg = 0x40000000,
+ .jtag_idcode_reg = 0x40000004,
+ .flash_base = 0x10040000,
+ .flash_regs_base = 0x40001000,
+ .flash_page_size = 2048,
+ .jtag_idcode = 0x02032041,
+ .part_name = "STM32WB09 (BLUENRG-LPF)",
+};
+
struct bluenrgx_flash_bank {
bool probed;
uint32_t die_id;
@@ -86,7 +97,9 @@ static const struct flash_ctrl_priv_data *flash_ctrl[] = {
&flash_priv_data_1,
&flash_priv_data_2,
&flash_priv_data_lp,
- &flash_priv_data_lps};
+ &flash_priv_data_lps,
+ &flash_priv_data_lpf
+};
/* flash_bank bluenrg-x 0 0 0 0 <target#> */
FLASH_BANK_COMMAND_HANDLER(bluenrgx_flash_bank_command)
@@ -387,7 +400,8 @@ static int bluenrgx_probe(struct flash_bank *bank)
if (retval != ERROR_OK)
return retval;
- if ((idcode != flash_priv_data_lp.jtag_idcode) && (idcode != flash_priv_data_lps.jtag_idcode)) {
+ if (idcode != flash_priv_data_lp.jtag_idcode && idcode != flash_priv_data_lps.jtag_idcode
+ && idcode != flash_priv_data_lpf.jtag_idcode) {
retval = target_read_u32(bank->target, BLUENRG2_JTAG_REG, &idcode);
if (retval != ERROR_OK)
return retval;
commit 990ee1be73bcc0e901282c4898ee14c663c781c6
Author: HAOUES Ahmed <ahm...@st...>
Date: Tue May 27 11:22:09 2025 +0100
flash/bluenrg-x: Add blueNRG alternate names
BlueNRG-LP -> STM32WB07
BlueNRG-LPS -> STM32WB05
Change-Id: I8e05ea29e84d3a7842e145fb66f448d0c82bd004
Signed-off-by: HAOUES Ahmed <ahm...@st...>
Reviewed-on: https://review.openocd.org/c/openocd/+/8880
Reviewed-by: Antonio Borneo <bor...@gm...>
Tested-by: jenkins
Reviewed-by: Tomas Vanek <va...@fb...>
diff --git a/src/flash/nor/bluenrg-x.c b/src/flash/nor/bluenrg-x.c
index 9ced2e971..d019c1165 100644
--- a/src/flash/nor/bluenrg-x.c
+++ b/src/flash/nor/bluenrg-x.c
@@ -63,7 +63,7 @@ static const struct flash_ctrl_priv_data flash_priv_data_lp = {
.flash_regs_base = 0x40001000,
.flash_page_size = 2048,
.jtag_idcode = 0x0201E041,
- .part_name = "BLUENRG-LP",
+ .part_name = "STM32WB07 (BLUENRG-LP)",
};
static const struct flash_ctrl_priv_data flash_priv_data_lps = {
@@ -73,7 +73,7 @@ static const struct flash_ctrl_priv_data flash_priv_data_lps = {
.flash_regs_base = 0x40001000,
.flash_page_size = 2048,
.jtag_idcode = 0x02028041,
- .part_name = "BLUENRG-LPS",
+ .part_name = "STM32WB05 (BLUENRG-LPS)",
};
struct bluenrgx_flash_bank {
-----------------------------------------------------------------------
Summary of changes:
src/flash/nor/bluenrg-x.c | 22 ++++++++++++++++++----
1 file changed, 18 insertions(+), 4 deletions(-)
hooks/post-receive
--
Main OpenOCD repository
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|
From: openocd-gerrit <ope...@us...> - 2025-06-07 10:24:28
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".
The branch, master has been updated
via 4732e40637682a805956fd99832c151a9d4a691e (commit)
from 1347b693a508179db5b19279cd6a37753fe0dfd5 (commit)
Those revisions listed above that are new to this repository have
not appeared on any other notification email; so we list those
revisions in full, below.
- Log -----------------------------------------------------------------
commit 4732e40637682a805956fd99832c151a9d4a691e
Author: Antonio Borneo <bor...@gm...>
Date: Tue Jun 3 10:34:29 2025 +0200
configure: hide build issue of amt_jtagaccel driver by disabling it
With commit d8a2f6dbcf5f ("configure.ac: show the Amontec
JTAG-Accelerator driver in the config summary") the driver
amt_jtagaccel is now build by default on Linux.
This highlights the dependency of some include files, dependency
that is not properly managed and that can cause build failure.
The driver is queued to be dropped soon, so there is no real
interest to fix the dependencies.
Change the default so the driver is not built if the user does not
require it at configure time.
Change-Id: Ifb74e2c802abda290efbf59ca4ce02048c94e6f8
Signed-off-by: Antonio Borneo <bor...@gm...>
Reviewed-on: https://review.openocd.org/c/openocd/+/8939
Reviewed-by: R. Diez <rdi...@rd...>
Tested-by: jenkins
diff --git a/configure.ac b/configure.ac
index c44d902d2..3e1d9a2ba 100644
--- a/configure.ac
+++ b/configure.ac
@@ -329,11 +329,14 @@ AC_ARG_ADAPTERS([
JTAG_DPI_ADAPTER,
JTAG_VPI_ADAPTER,
RSHIM_ADAPTER,
- AMTJTAGACCEL_ADAPTER,
PCIE_ADAPTERS,
LIBJAYLINK_ADAPTERS
],[auto])
+AC_ARG_ADAPTERS([
+ AMTJTAGACCEL_ADAPTER
+ ],[no])
+
AC_ARG_ENABLE([parport],
AS_HELP_STRING([--enable-parport], [Enable building the pc parallel port driver]),
[build_parport=$enableval], [build_parport=no])
-----------------------------------------------------------------------
Summary of changes:
configure.ac | 5 ++++-
1 file changed, 4 insertions(+), 1 deletion(-)
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Main OpenOCD repository
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