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From: openocd-gerrit <ope...@us...> - 2023-01-15 15:09:37
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".
The branch, master has been updated
via 40bac8e8c4e556faaf9c8adc1a030dbc52080fdb (commit)
from 3d3d35c9b87243a14b37478f1120c4c8d0a6d0bb (commit)
Those revisions listed above that are new to this repository have
not appeared on any other notification email; so we list those
revisions in full, below.
- Log -----------------------------------------------------------------
commit 40bac8e8c4e556faaf9c8adc1a030dbc52080fdb
Author: Tomas Vanek <va...@fb...>
Date: Sat Nov 19 07:21:10 2022 +0100
jtag/drivers/cmsis_dap: improve USB packets filling
DAP write transaction occupies 5 bytes of a command packet.
DAP read transaction needs just one byte in a command packet
and expect 4 bytes in a response.
The fixed maximal number of transactions in a packet caused
packet filling less than optimal.
Compute both command and expected response sizes based on
read or write direction of each transaction.
Run the queue if one of sizes does not fit into a packet.
The change increases the speed of the mostly read transfer
from 36 KiB/s to almost 40 KiB/s @ USB FS, adapter speed 1000
due to reduction of adapter inserted RDBUFF reads.
Signed-off-by: Tomas Vanek <va...@fb...>
Change-Id: Ib70812600eaae0403b8ee8673b6f897348496569
Reviewed-on: https://review.openocd.org/c/openocd/+/7364
Tested-by: jenkins
Reviewed-by: Antonio Borneo <bor...@gm...>
diff --git a/src/jtag/drivers/cmsis_dap.c b/src/jtag/drivers/cmsis_dap.c
index 364a17746..10e663862 100644
--- a/src/jtag/drivers/cmsis_dap.c
+++ b/src/jtag/drivers/cmsis_dap.c
@@ -222,6 +222,8 @@ struct pending_scan_result {
/* Each block in FIFO can contain up to pending_queue_len transfers */
static unsigned int pending_queue_len;
+static unsigned int tfer_max_command_size;
+static unsigned int tfer_max_response_size;
/* pointers to buffers that will receive jtag scan results on the next flush */
#define MAX_PENDING_SCAN_RESULTS 256
@@ -742,11 +744,18 @@ static int cmsis_dap_cmd_dap_swo_data(
return ERROR_OK;
}
+
static void cmsis_dap_swd_write_from_queue(struct cmsis_dap *dap)
{
uint8_t *command = dap->command;
struct pending_request_block *block = &dap->pending_fifo[dap->pending_fifo_put_idx];
+ assert(dap->write_count + dap->read_count == block->transfer_count);
+
+ /* Reset packet size check counters for the next packet */
+ dap->write_count = 0;
+ dap->read_count = 0;
+
LOG_DEBUG_IO("Executing %d queued transactions from FIFO index %u",
block->transfer_count, dap->pending_fifo_put_idx);
@@ -913,11 +922,43 @@ static int cmsis_dap_swd_run_queue(void)
return retval;
}
+static unsigned int cmsis_dap_tfer_cmd_size(unsigned int write_count,
+ unsigned int read_count)
+{
+ unsigned int size = 3; /* header */
+ size += write_count * (1 + 4); /* DAP register + data */
+ size += read_count; /* DAP register */
+ return size;
+}
+
+static unsigned int cmsis_dap_tfer_resp_size(unsigned int write_count,
+ unsigned int read_count)
+{
+ unsigned int size = 3; /* header */
+ size += read_count * 4; /* data */
+ return size;
+}
+
static void cmsis_dap_swd_queue_cmd(uint8_t cmd, uint32_t *dst, uint32_t data)
{
+ /* Compute sizes of the DAP Transfer command and the expected response
+ * for all queued and this operation */
bool targetsel_cmd = swd_cmd(false, false, DP_TARGETSEL) == cmd;
- if (cmsis_dap_handle->pending_fifo[cmsis_dap_handle->pending_fifo_put_idx].transfer_count == pending_queue_len
+ unsigned int write_count = cmsis_dap_handle->write_count;
+ unsigned int read_count = cmsis_dap_handle->read_count;
+ if (cmd & SWD_CMD_RNW)
+ read_count++;
+ else
+ write_count++;
+
+ unsigned int cmd_size = cmsis_dap_tfer_cmd_size(write_count, read_count);
+ unsigned int resp_size = cmsis_dap_tfer_resp_size(write_count, read_count);
+
+ /* Does the DAP Transfer command and the expected response fit into one packet?
+ * Run the queue also before a targetsel - it cannot be queued */
+ if (cmd_size > tfer_max_command_size
+ || resp_size > tfer_max_response_size
|| targetsel_cmd) {
if (cmsis_dap_handle->pending_fifo_block_count)
cmsis_dap_swd_read_process(cmsis_dap_handle, 0);
@@ -929,6 +970,8 @@ static void cmsis_dap_swd_queue_cmd(uint8_t cmd, uint32_t *dst, uint32_t data)
cmsis_dap_swd_read_process(cmsis_dap_handle, LIBUSB_TIMEOUT_MS);
}
+ assert(cmsis_dap_handle->pending_fifo[cmsis_dap_handle->pending_fifo_put_idx].transfer_count < pending_queue_len);
+
if (queued_retval != ERROR_OK)
return;
@@ -944,6 +987,9 @@ static void cmsis_dap_swd_queue_cmd(uint8_t cmd, uint32_t *dst, uint32_t data)
if (cmd & SWD_CMD_RNW) {
/* Queue a read transaction */
transfer->buffer = dst;
+ cmsis_dap_handle->read_count++;
+ } else {
+ cmsis_dap_handle->write_count++;
}
block->transfer_count++;
}
@@ -1183,7 +1229,6 @@ static int cmsis_dap_init(void)
/* Be conservative and suppress submitting multiple HID requests
* until we get packet count info from the adaptor */
cmsis_dap_handle->packet_count = 1;
- pending_queue_len = 12;
/* INFO_ID_PKT_SZ - short */
retval = cmsis_dap_cmd_dap_info(INFO_ID_PKT_SZ, &data);
@@ -1193,12 +1238,6 @@ static int cmsis_dap_init(void)
if (data[0] == 2) { /* short */
uint16_t pkt_sz = data[1] + (data[2] << 8);
if (pkt_sz != cmsis_dap_handle->packet_size) {
-
- /* 4 bytes of command header + 5 bytes per register
- * write. For bulk read sequences just 4 bytes are
- * needed per transfer, so this is suboptimal. */
- pending_queue_len = (pkt_sz - 4) / 5;
-
free(cmsis_dap_handle->packet_buffer);
retval = cmsis_dap_handle->backend->packet_buffer_alloc(cmsis_dap_handle, pkt_sz);
if (retval != ERROR_OK)
@@ -1208,6 +1247,16 @@ static int cmsis_dap_init(void)
}
}
+ /* Maximal number of transfers which fit to one packet:
+ * Limited by response size: 3 bytes of response header + 4 per read
+ * Plus writes to full command size: 3 bytes cmd header + 1 per read + 5 per write */
+ tfer_max_command_size = cmsis_dap_handle->packet_usable_size;
+ tfer_max_response_size = cmsis_dap_handle->packet_usable_size;
+ unsigned int max_reads = tfer_max_response_size / 4;
+ pending_queue_len = max_reads + (tfer_max_command_size - max_reads) / 5;
+ cmsis_dap_handle->write_count = 0;
+ cmsis_dap_handle->read_count = 0;
+
/* INFO_ID_PKT_CNT - byte */
retval = cmsis_dap_cmd_dap_info(INFO_ID_PKT_CNT, &data);
if (retval != ERROR_OK)
diff --git a/src/jtag/drivers/cmsis_dap.h b/src/jtag/drivers/cmsis_dap.h
index 72e07fb04..1c30975da 100644
--- a/src/jtag/drivers/cmsis_dap.h
+++ b/src/jtag/drivers/cmsis_dap.h
@@ -33,6 +33,11 @@ struct cmsis_dap {
uint8_t *command;
uint8_t *response;
+ /* DAP register r/w operation counters used for checking the packet size
+ * that would result from the queue run */
+ unsigned int write_count;
+ unsigned int read_count;
+
/* Pending requests are organized as a FIFO - circular buffer */
struct pending_request_block pending_fifo[MAX_PENDING_REQUESTS];
unsigned int packet_count;
-----------------------------------------------------------------------
Summary of changes:
src/jtag/drivers/cmsis_dap.c | 65 ++++++++++++++++++++++++++++++++++++++------
src/jtag/drivers/cmsis_dap.h | 5 ++++
2 files changed, 62 insertions(+), 8 deletions(-)
hooks/post-receive
--
Main OpenOCD repository
|
|
From: openocd-gerrit <ope...@us...> - 2023-01-15 15:09:18
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".
The branch, master has been updated
via 3d3d35c9b87243a14b37478f1120c4c8d0a6d0bb (commit)
from 600d0165cc041a36d3707168aeb113d7a2e6747f (commit)
Those revisions listed above that are new to this repository have
not appeared on any other notification email; so we list those
revisions in full, below.
- Log -----------------------------------------------------------------
commit 3d3d35c9b87243a14b37478f1120c4c8d0a6d0bb
Author: Tomas Vanek <va...@fb...>
Date: Sat Nov 19 07:16:30 2022 +0100
jtag/drivers/cmsis_dap: introduce packet_usable_size
USB bulk backend needs to avoid zero sized USB packets
sent after each full sized packed for performance reasons.
HID backend uses fixed size HID reports so the full size
of the report can be utilized.
Introduce packet_usable_size to reflect it.
Signed-off-by: Tomas Vanek <va...@fb...>
Change-Id: I34094c9edac5730624480711cbd6aa65883c47c7
Reviewed-on: https://review.openocd.org/c/openocd/+/7363
Tested-by: jenkins
Reviewed-by: Antonio Borneo <bor...@gm...>
diff --git a/src/jtag/drivers/cmsis_dap.c b/src/jtag/drivers/cmsis_dap.c
index 5e01d0647..364a17746 100644
--- a/src/jtag/drivers/cmsis_dap.c
+++ b/src/jtag/drivers/cmsis_dap.c
@@ -229,7 +229,7 @@ static int pending_scan_result_count;
static struct pending_scan_result pending_scan_results[MAX_PENDING_SCAN_RESULTS];
/* queued JTAG sequences that will be executed on the next flush */
-#define QUEUED_SEQ_BUF_LEN (cmsis_dap_handle->packet_size - 3)
+#define QUEUED_SEQ_BUF_LEN (cmsis_dap_handle->packet_usable_size - 3)
static int queued_seq_count;
static int queued_seq_buf_end;
static int queued_seq_tdo_ptr;
diff --git a/src/jtag/drivers/cmsis_dap.h b/src/jtag/drivers/cmsis_dap.h
index 80044199b..72e07fb04 100644
--- a/src/jtag/drivers/cmsis_dap.h
+++ b/src/jtag/drivers/cmsis_dap.h
@@ -27,6 +27,7 @@ struct cmsis_dap {
struct cmsis_dap_backend_data *bdata;
const struct cmsis_dap_backend *backend;
unsigned int packet_size;
+ unsigned int packet_usable_size;
unsigned int packet_buffer_size;
uint8_t *packet_buffer;
uint8_t *command;
diff --git a/src/jtag/drivers/cmsis_dap_usb_bulk.c b/src/jtag/drivers/cmsis_dap_usb_bulk.c
index 55b9a558a..6599c414c 100644
--- a/src/jtag/drivers/cmsis_dap_usb_bulk.c
+++ b/src/jtag/drivers/cmsis_dap_usb_bulk.c
@@ -352,25 +352,17 @@ static int cmsis_dap_usb_open(struct cmsis_dap *dap, uint16_t vids[], uint16_t p
return ERROR_FAIL;
}
- dap->packet_size = packet_size;
- dap->packet_buffer_size = packet_size;
dap->bdata->usb_ctx = ctx;
dap->bdata->dev_handle = dev_handle;
dap->bdata->ep_out = ep_out;
dap->bdata->ep_in = ep_in;
dap->bdata->interface = interface_num;
- dap->packet_buffer = malloc(dap->packet_buffer_size);
- if (!dap->packet_buffer) {
- LOG_ERROR("unable to allocate memory");
+ err = cmsis_dap_usb_alloc(dap, packet_size);
+ if (err != ERROR_OK)
cmsis_dap_usb_close(dap);
- return ERROR_FAIL;
- }
-
- dap->command = dap->packet_buffer;
- dap->response = dap->packet_buffer;
- return ERROR_OK;
+ return err;
}
libusb_close(dev_handle);
@@ -445,6 +437,8 @@ static int cmsis_dap_usb_alloc(struct cmsis_dap *dap, unsigned int pkt_sz)
dap->packet_buffer = buf;
dap->packet_size = pkt_sz;
dap->packet_buffer_size = pkt_sz;
+ /* Prevent sending zero size USB packets */
+ dap->packet_usable_size = pkt_sz - 1;
dap->command = dap->packet_buffer;
dap->response = dap->packet_buffer;
diff --git a/src/jtag/drivers/cmsis_dap_usb_hid.c b/src/jtag/drivers/cmsis_dap_usb_hid.c
index 592eb0925..52dfd7616 100644
--- a/src/jtag/drivers/cmsis_dap_usb_hid.c
+++ b/src/jtag/drivers/cmsis_dap_usb_hid.c
@@ -213,6 +213,7 @@ static int cmsis_dap_hid_alloc(struct cmsis_dap *dap, unsigned int pkt_sz)
dap->packet_buffer = buf;
dap->packet_size = pkt_sz;
+ dap->packet_usable_size = pkt_sz;
dap->packet_buffer_size = packet_buffer_size;
dap->command = dap->packet_buffer + REPORT_ID_SIZE;
-----------------------------------------------------------------------
Summary of changes:
src/jtag/drivers/cmsis_dap.c | 2 +-
src/jtag/drivers/cmsis_dap.h | 1 +
src/jtag/drivers/cmsis_dap_usb_bulk.c | 16 +++++-----------
src/jtag/drivers/cmsis_dap_usb_hid.c | 1 +
4 files changed, 8 insertions(+), 12 deletions(-)
hooks/post-receive
--
Main OpenOCD repository
|
|
From: openocd-gerrit <ope...@us...> - 2023-01-15 15:08:47
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".
The branch, master has been updated
via 600d0165cc041a36d3707168aeb113d7a2e6747f (commit)
from a9b48a6f481344c592e7e05ca06564cdadfe0721 (commit)
Those revisions listed above that are new to this repository have
not appeared on any other notification email; so we list those
revisions in full, below.
- Log -----------------------------------------------------------------
commit 600d0165cc041a36d3707168aeb113d7a2e6747f
Author: Tomas Vanek <va...@fb...>
Date: Sat Nov 19 07:08:32 2022 +0100
jtag/drivers/cmsis_dap: use unsigned types
Not all variables converted, JTAG part is left as is.
Signed-off-by: Tomas Vanek <va...@fb...>
Change-Id: Ie9cc890769a2f53cb3a07fd457030e1b98910d44
Reviewed-on: https://review.openocd.org/c/openocd/+/7362
Tested-by: jenkins
Reviewed-by: Antonio Borneo <bor...@gm...>
diff --git a/src/jtag/drivers/cmsis_dap.c b/src/jtag/drivers/cmsis_dap.c
index 49181ad90..5e01d0647 100644
--- a/src/jtag/drivers/cmsis_dap.c
+++ b/src/jtag/drivers/cmsis_dap.c
@@ -211,17 +211,17 @@ static const char * const info_caps_str[INFO_CAPS__NUM_CAPS] = {
struct pending_scan_result {
/** Offset in bytes in the CMD_DAP_JTAG_SEQ response buffer. */
- unsigned first;
+ unsigned int first;
/** Number of bits to read. */
- unsigned length;
+ unsigned int length;
/** Location to store the result */
uint8_t *buffer;
/** Offset in the destination buffer */
- unsigned buffer_offset;
+ unsigned int buffer_offset;
};
/* Each block in FIFO can contain up to pending_queue_len transfers */
-static int pending_queue_len;
+static unsigned int pending_queue_len;
/* pointers to buffers that will receive jtag scan results on the next flush */
#define MAX_PENDING_SCAN_RESULTS 256
@@ -292,7 +292,7 @@ static void cmsis_dap_close(struct cmsis_dap *dap)
free(dap->packet_buffer);
- for (int i = 0; i < MAX_PENDING_REQUESTS; i++) {
+ for (unsigned int i = 0; i < MAX_PENDING_REQUESTS; i++) {
free(dap->pending_fifo[i].transfers);
dap->pending_fifo[i].transfers = NULL;
}
@@ -403,7 +403,7 @@ static int cmsis_dap_cmd_dap_swj_sequence(uint8_t s_len, const uint8_t *sequence
#ifdef CMSIS_DAP_JTAG_DEBUG
LOG_DEBUG("cmsis-dap TMS sequence: len=%d", s_len);
- for (int i = 0; i < DIV_ROUND_UP(s_len, 8); ++i)
+ for (unsigned int i = 0; i < DIV_ROUND_UP(s_len, 8); ++i)
printf("%02X ", sequence[i]);
printf("\n");
@@ -763,7 +763,7 @@ static void cmsis_dap_swd_write_from_queue(struct cmsis_dap *dap)
command[2] = block->transfer_count;
size_t idx = 3;
- for (int i = 0; i < block->transfer_count; i++) {
+ for (unsigned int i = 0; i < block->transfer_count; i++) {
struct pending_transfer_result *transfer = &(block->transfers[i]);
uint8_t cmd = transfer->cmd;
uint32_t data = transfer->data;
@@ -844,7 +844,7 @@ static void cmsis_dap_swd_read_process(struct cmsis_dap *dap, int timeout_ms)
goto skip;
}
- uint8_t transfer_count = resp[1];
+ unsigned int transfer_count = resp[1];
uint8_t ack = resp[2] & 0x07;
if (resp[2] & 0x08) {
LOG_DEBUG("CMSIS-DAP Protocol Error @ %d (wrong parity)", transfer_count);
@@ -865,8 +865,8 @@ static void cmsis_dap_swd_read_process(struct cmsis_dap *dap, int timeout_ms)
LOG_DEBUG_IO("Received results of %d queued transactions FIFO index %u timeout %i",
transfer_count, dap->pending_fifo_get_idx, timeout_ms);
- size_t idx = 3;
- for (int i = 0; i < transfer_count; i++) {
+ unsigned int idx = 3;
+ for (unsigned int i = 0; i < transfer_count; i++) {
struct pending_transfer_result *transfer = &(block->transfers[i]);
if (transfer->cmd & SWD_CMD_RNW) {
static uint32_t last_read;
@@ -1005,7 +1005,7 @@ static int cmsis_dap_get_caps_info(void)
cmsis_dap_handle->caps = caps;
- for (int i = 0; i < INFO_CAPS__NUM_CAPS; ++i) {
+ for (unsigned int i = 0; i < INFO_CAPS__NUM_CAPS; ++i) {
if (caps & BIT(i))
LOG_INFO("CMSIS-DAP: %s", info_caps_str[i]);
}
@@ -1351,7 +1351,7 @@ static void cmsis_dap_end_state(tap_state_t state)
}
#ifdef SPRINT_BINARY
-static void sprint_binary(char *s, const uint8_t *buf, int offset, int len)
+static void sprint_binary(char *s, const uint8_t *buf, unsigned int offset, unsigned int len)
{
if (!len)
return;
@@ -1362,7 +1362,7 @@ static void sprint_binary(char *s, const uint8_t *buf, int offset, int len)
buf = { 0xc0 0x18 } offset=3 len=10 should result in: 11000 11000
i=3 there means i/8 = 0 so c = 0xFF, and
*/
- for (int i = offset; i < offset + len; ++i) {
+ for (unsigned int i = offset; i < offset + len; ++i) {
uint8_t c = buf[i / 8], mask = 1 << (i % 8);
if ((i != offset) && !(i % 8))
putchar(' ');
@@ -1476,10 +1476,11 @@ static void cmsis_dap_flush(void)
* sequence=NULL means clock out zeros on TDI
* tdo_buffer=NULL means don't capture TDO
*/
-static void cmsis_dap_add_jtag_sequence(int s_len, const uint8_t *sequence, int s_offset,
- bool tms, uint8_t *tdo_buffer, int tdo_buffer_offset)
+static void cmsis_dap_add_jtag_sequence(unsigned int s_len, const uint8_t *sequence,
+ unsigned int s_offset, bool tms,
+ uint8_t *tdo_buffer, unsigned int tdo_buffer_offset)
{
- LOG_DEBUG_IO("[at %d] %d bits, tms %s, seq offset %d, tdo buf %p, tdo offset %d",
+ LOG_DEBUG_IO("[at %d] %u bits, tms %s, seq offset %u, tdo buf %p, tdo offset %u",
queued_seq_buf_end,
s_len, tms ? "HIGH" : "LOW", s_offset, tdo_buffer, tdo_buffer_offset);
@@ -1488,11 +1489,11 @@ static void cmsis_dap_add_jtag_sequence(int s_len, const uint8_t *sequence, int
if (s_len > 64) {
LOG_DEBUG_IO("START JTAG SEQ SPLIT");
- for (int offset = 0; offset < s_len; offset += 64) {
- int len = s_len - offset;
+ for (unsigned int offset = 0; offset < s_len; offset += 64) {
+ unsigned int len = s_len - offset;
if (len > 64)
len = 64;
- LOG_DEBUG_IO("Splitting long jtag sequence: %d-bit chunk starting at offset %d", len, offset);
+ LOG_DEBUG_IO("Splitting long jtag sequence: %u-bit chunk starting at offset %u", len, offset);
cmsis_dap_add_jtag_sequence(
len,
sequence,
@@ -1506,7 +1507,7 @@ static void cmsis_dap_add_jtag_sequence(int s_len, const uint8_t *sequence, int
return;
}
- int cmd_len = 1 + DIV_ROUND_UP(s_len, 8);
+ unsigned int cmd_len = 1 + DIV_ROUND_UP(s_len, 8);
if (queued_seq_count >= 255 || queued_seq_buf_end + cmd_len > QUEUED_SEQ_BUF_LEN)
/* empty out the buffer */
cmsis_dap_flush();
diff --git a/src/jtag/drivers/cmsis_dap.h b/src/jtag/drivers/cmsis_dap.h
index 7eaa1f216..80044199b 100644
--- a/src/jtag/drivers/cmsis_dap.h
+++ b/src/jtag/drivers/cmsis_dap.h
@@ -20,15 +20,15 @@ struct pending_transfer_result {
struct pending_request_block {
struct pending_transfer_result *transfers;
- int transfer_count;
+ unsigned int transfer_count;
};
struct cmsis_dap {
struct cmsis_dap_backend_data *bdata;
const struct cmsis_dap_backend *backend;
- uint16_t packet_size;
+ unsigned int packet_size;
+ unsigned int packet_buffer_size;
uint8_t *packet_buffer;
- uint16_t packet_buffer_size;
uint8_t *command;
uint8_t *response;
-----------------------------------------------------------------------
Summary of changes:
src/jtag/drivers/cmsis_dap.c | 41 +++++++++++++++++++++--------------------
src/jtag/drivers/cmsis_dap.h | 6 +++---
2 files changed, 24 insertions(+), 23 deletions(-)
hooks/post-receive
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From: openocd-gerrit <ope...@us...> - 2023-01-15 15:08:08
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".
The branch, master has been updated
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via 128736d23f0e92a245d51c10e889ed3e6da4c2b1 (commit)
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- Log -----------------------------------------------------------------
commit a9b48a6f481344c592e7e05ca06564cdadfe0721
Author: Tomas Vanek <va...@fb...>
Date: Sat Nov 19 07:08:32 2022 +0100
jtag/drivers/cmsis_dap: use dap parameter instead of cmsis_dap_handle
Replace the direct dereference of cmsis_dap_handle by dereference
of the dap function parameter wherever possible.
Signed-off-by: Tomas Vanek <va...@fb...>
Change-Id: I32601dbe0270267642720a8524706aa76d187c3b
Reviewed-on: https://review.openocd.org/c/openocd/+/7361
Tested-by: jenkins
Reviewed-by: Antonio Borneo <bor...@gm...>
diff --git a/src/jtag/drivers/cmsis_dap.c b/src/jtag/drivers/cmsis_dap.c
index c2f01f33d..49181ad90 100644
--- a/src/jtag/drivers/cmsis_dap.c
+++ b/src/jtag/drivers/cmsis_dap.c
@@ -290,14 +290,15 @@ static void cmsis_dap_close(struct cmsis_dap *dap)
dap->backend = NULL;
}
- free(cmsis_dap_handle->packet_buffer);
- free(cmsis_dap_handle);
- cmsis_dap_handle = NULL;
+ free(dap->packet_buffer);
for (int i = 0; i < MAX_PENDING_REQUESTS; i++) {
free(dap->pending_fifo[i].transfers);
dap->pending_fifo[i].transfers = NULL;
}
+
+ free(cmsis_dap_handle);
+ cmsis_dap_handle = NULL;
}
static void cmsis_dap_flush_read(struct cmsis_dap *dap)
@@ -328,7 +329,7 @@ static int cmsis_dap_xfer(struct cmsis_dap *dap, int txlen)
dap->pending_fifo_get_idx = 0;
}
- uint8_t current_cmd = cmsis_dap_handle->command[0];
+ uint8_t current_cmd = dap->command[0];
int retval = dap->backend->write(dap, txlen, LIBUSB_TIMEOUT_MS);
if (retval < 0)
return retval;
@@ -338,7 +339,7 @@ static int cmsis_dap_xfer(struct cmsis_dap *dap, int txlen)
if (retval < 0)
return retval;
- uint8_t *resp = cmsis_dap_handle->response;
+ uint8_t *resp = dap->response;
if (resp[0] == DAP_ERROR) {
LOG_ERROR("CMSIS-DAP command 0x%" PRIx8 " not implemented", current_cmd);
return ERROR_NOT_IMPLEMENTED;
@@ -743,7 +744,7 @@ static int cmsis_dap_cmd_dap_swo_data(
static void cmsis_dap_swd_write_from_queue(struct cmsis_dap *dap)
{
- uint8_t *command = cmsis_dap_handle->command;
+ uint8_t *command = dap->command;
struct pending_request_block *block = &dap->pending_fifo[dap->pending_fifo_put_idx];
LOG_DEBUG_IO("Executing %d queued transactions from FIFO index %u",
commit 128736d23f0e92a245d51c10e889ed3e6da4c2b1
Author: Tomas Vanek <va...@fb...>
Date: Sat Nov 19 06:57:56 2022 +0100
jtag/drivers/cmsis_dap: move pending request FIFO
Move all pending request FIFO related variables to
the struct cmsis_dap
Pure refactoring, no functional changes.
Signed-off-by: Tomas Vanek <va...@fb...>
Change-Id: I2cea9c1e265ac102ec0f314767b8b9afdcda9ee9
Reviewed-on: https://review.openocd.org/c/openocd/+/7360
Tested-by: jenkins
Reviewed-by: Antonio Borneo <bor...@gm...>
diff --git a/src/jtag/drivers/cmsis_dap.c b/src/jtag/drivers/cmsis_dap.c
index 44a7dd8cb..c2f01f33d 100644
--- a/src/jtag/drivers/cmsis_dap.c
+++ b/src/jtag/drivers/cmsis_dap.c
@@ -209,17 +209,6 @@ static const char * const info_caps_str[INFO_CAPS__NUM_CAPS] = {
"UART via USB COM port supported",
};
-struct pending_transfer_result {
- uint8_t cmd;
- uint32_t data;
- void *buffer;
-};
-
-struct pending_request_block {
- struct pending_transfer_result *transfers;
- int transfer_count;
-};
-
struct pending_scan_result {
/** Offset in bytes in the CMD_DAP_JTAG_SEQ response buffer. */
unsigned first;
@@ -231,16 +220,8 @@ struct pending_scan_result {
unsigned buffer_offset;
};
-/* Up to MIN(packet_count, MAX_PENDING_REQUESTS) requests may be issued
- * until the first response arrives */
-#define MAX_PENDING_REQUESTS 3
-
-/* Pending requests are organized as a FIFO - circular buffer */
/* Each block in FIFO can contain up to pending_queue_len transfers */
static int pending_queue_len;
-static struct pending_request_block pending_fifo[MAX_PENDING_REQUESTS];
-static int pending_fifo_put_idx, pending_fifo_get_idx;
-static int pending_fifo_block_count;
/* pointers to buffers that will receive jtag scan results on the next flush */
#define MAX_PENDING_SCAN_RESULTS 256
@@ -314,8 +295,8 @@ static void cmsis_dap_close(struct cmsis_dap *dap)
cmsis_dap_handle = NULL;
for (int i = 0; i < MAX_PENDING_REQUESTS; i++) {
- free(pending_fifo[i].transfers);
- pending_fifo[i].transfers = NULL;
+ free(dap->pending_fifo[i].transfers);
+ dap->pending_fifo[i].transfers = NULL;
}
}
@@ -337,14 +318,14 @@ static void cmsis_dap_flush_read(struct cmsis_dap *dap)
/* Send a message and receive the reply */
static int cmsis_dap_xfer(struct cmsis_dap *dap, int txlen)
{
- if (pending_fifo_block_count) {
- LOG_ERROR("pending %d blocks, flushing", pending_fifo_block_count);
- while (pending_fifo_block_count) {
+ if (dap->pending_fifo_block_count) {
+ LOG_ERROR("pending %u blocks, flushing", dap->pending_fifo_block_count);
+ while (dap->pending_fifo_block_count) {
dap->backend->read(dap, 10);
- pending_fifo_block_count--;
+ dap->pending_fifo_block_count--;
}
- pending_fifo_put_idx = 0;
- pending_fifo_get_idx = 0;
+ dap->pending_fifo_put_idx = 0;
+ dap->pending_fifo_get_idx = 0;
}
uint8_t current_cmd = cmsis_dap_handle->command[0];
@@ -763,9 +744,10 @@ static int cmsis_dap_cmd_dap_swo_data(
static void cmsis_dap_swd_write_from_queue(struct cmsis_dap *dap)
{
uint8_t *command = cmsis_dap_handle->command;
- struct pending_request_block *block = &pending_fifo[pending_fifo_put_idx];
+ struct pending_request_block *block = &dap->pending_fifo[dap->pending_fifo_put_idx];
- LOG_DEBUG_IO("Executing %d queued transactions from FIFO index %d", block->transfer_count, pending_fifo_put_idx);
+ LOG_DEBUG_IO("Executing %d queued transactions from FIFO index %u",
+ block->transfer_count, dap->pending_fifo_put_idx);
if (queued_retval != ERROR_OK) {
LOG_DEBUG("Skipping due to previous errors: %d", queued_retval);
@@ -824,10 +806,10 @@ static void cmsis_dap_swd_write_from_queue(struct cmsis_dap *dap)
queued_retval = ERROR_OK;
}
- pending_fifo_put_idx = (pending_fifo_put_idx + 1) % dap->packet_count;
- pending_fifo_block_count++;
- if (pending_fifo_block_count > dap->packet_count)
- LOG_ERROR("too much pending writes %d", pending_fifo_block_count);
+ dap->pending_fifo_put_idx = (dap->pending_fifo_put_idx + 1) % dap->packet_count;
+ dap->pending_fifo_block_count++;
+ if (dap->pending_fifo_block_count > dap->packet_count)
+ LOG_ERROR("too much pending writes %u", dap->pending_fifo_block_count);
return;
@@ -837,9 +819,9 @@ skip:
static void cmsis_dap_swd_read_process(struct cmsis_dap *dap, int timeout_ms)
{
- struct pending_request_block *block = &pending_fifo[pending_fifo_get_idx];
+ struct pending_request_block *block = &dap->pending_fifo[dap->pending_fifo_get_idx];
- if (pending_fifo_block_count == 0)
+ if (dap->pending_fifo_block_count == 0)
LOG_ERROR("no pending write");
/* get reply */
@@ -880,8 +862,8 @@ static void cmsis_dap_swd_read_process(struct cmsis_dap *dap, int timeout_ms)
LOG_ERROR("CMSIS-DAP transfer count mismatch: expected %d, got %d",
block->transfer_count, transfer_count);
- LOG_DEBUG_IO("Received results of %d queued transactions FIFO index %d",
- transfer_count, pending_fifo_get_idx);
+ LOG_DEBUG_IO("Received results of %d queued transactions FIFO index %u timeout %i",
+ transfer_count, dap->pending_fifo_get_idx, timeout_ms);
size_t idx = 3;
for (int i = 0; i < transfer_count; i++) {
struct pending_transfer_result *transfer = &(block->transfers[i]);
@@ -907,22 +889,22 @@ static void cmsis_dap_swd_read_process(struct cmsis_dap *dap, int timeout_ms)
skip:
block->transfer_count = 0;
- pending_fifo_get_idx = (pending_fifo_get_idx + 1) % dap->packet_count;
- pending_fifo_block_count--;
+ dap->pending_fifo_get_idx = (dap->pending_fifo_get_idx + 1) % dap->packet_count;
+ dap->pending_fifo_block_count--;
}
static int cmsis_dap_swd_run_queue(void)
{
- if (pending_fifo_block_count)
+ if (cmsis_dap_handle->pending_fifo_block_count)
cmsis_dap_swd_read_process(cmsis_dap_handle, 0);
cmsis_dap_swd_write_from_queue(cmsis_dap_handle);
- while (pending_fifo_block_count)
+ while (cmsis_dap_handle->pending_fifo_block_count)
cmsis_dap_swd_read_process(cmsis_dap_handle, LIBUSB_TIMEOUT_MS);
- pending_fifo_put_idx = 0;
- pending_fifo_get_idx = 0;
+ cmsis_dap_handle->pending_fifo_put_idx = 0;
+ cmsis_dap_handle->pending_fifo_get_idx = 0;
int retval = queued_retval;
queued_retval = ERROR_OK;
@@ -934,15 +916,15 @@ static void cmsis_dap_swd_queue_cmd(uint8_t cmd, uint32_t *dst, uint32_t data)
{
bool targetsel_cmd = swd_cmd(false, false, DP_TARGETSEL) == cmd;
- if (pending_fifo[pending_fifo_put_idx].transfer_count == pending_queue_len
- || targetsel_cmd) {
- if (pending_fifo_block_count)
+ if (cmsis_dap_handle->pending_fifo[cmsis_dap_handle->pending_fifo_put_idx].transfer_count == pending_queue_len
+ || targetsel_cmd) {
+ if (cmsis_dap_handle->pending_fifo_block_count)
cmsis_dap_swd_read_process(cmsis_dap_handle, 0);
/* Not enough room in the queue. Run the queue. */
cmsis_dap_swd_write_from_queue(cmsis_dap_handle);
- if (pending_fifo_block_count >= cmsis_dap_handle->packet_count)
+ if (cmsis_dap_handle->pending_fifo_block_count >= cmsis_dap_handle->packet_count)
cmsis_dap_swd_read_process(cmsis_dap_handle, LIBUSB_TIMEOUT_MS);
}
@@ -954,7 +936,7 @@ static void cmsis_dap_swd_queue_cmd(uint8_t cmd, uint32_t *dst, uint32_t data)
return;
}
- struct pending_request_block *block = &pending_fifo[pending_fifo_put_idx];
+ struct pending_request_block *block = &cmsis_dap_handle->pending_fifo[cmsis_dap_handle->pending_fifo_put_idx];
struct pending_transfer_result *transfer = &(block->transfers[block->transfer_count]);
transfer->data = data;
transfer->cmd = cmd;
@@ -1231,17 +1213,18 @@ static int cmsis_dap_init(void)
goto init_err;
if (data[0] == 1) { /* byte */
- int pkt_cnt = data[1];
+ unsigned int pkt_cnt = data[1];
if (pkt_cnt > 1)
cmsis_dap_handle->packet_count = MIN(MAX_PENDING_REQUESTS, pkt_cnt);
- LOG_DEBUG("CMSIS-DAP: Packet Count = %d", pkt_cnt);
+ LOG_DEBUG("CMSIS-DAP: Packet Count = %u", pkt_cnt);
}
- LOG_DEBUG("Allocating FIFO for %d pending packets", cmsis_dap_handle->packet_count);
- for (int i = 0; i < cmsis_dap_handle->packet_count; i++) {
- pending_fifo[i].transfers = malloc(pending_queue_len * sizeof(struct pending_transfer_result));
- if (!pending_fifo[i].transfers) {
+ LOG_DEBUG("Allocating FIFO for %u pending packets", cmsis_dap_handle->packet_count);
+ for (unsigned int i = 0; i < cmsis_dap_handle->packet_count; i++) {
+ cmsis_dap_handle->pending_fifo[i].transfers = malloc(pending_queue_len
+ * sizeof(struct pending_transfer_result));
+ if (!cmsis_dap_handle->pending_fifo[i].transfers) {
LOG_ERROR("Unable to allocate memory for CMSIS-DAP queue");
retval = ERROR_FAIL;
goto init_err;
diff --git a/src/jtag/drivers/cmsis_dap.h b/src/jtag/drivers/cmsis_dap.h
index cf929b069..7eaa1f216 100644
--- a/src/jtag/drivers/cmsis_dap.h
+++ b/src/jtag/drivers/cmsis_dap.h
@@ -7,17 +7,37 @@
struct cmsis_dap_backend;
struct cmsis_dap_backend_data;
-struct command_registration;
+
+struct pending_transfer_result {
+ uint8_t cmd;
+ uint32_t data;
+ void *buffer;
+};
+
+/* Up to MIN(packet_count, MAX_PENDING_REQUESTS) requests may be issued
+ * until the first response arrives */
+#define MAX_PENDING_REQUESTS 4
+
+struct pending_request_block {
+ struct pending_transfer_result *transfers;
+ int transfer_count;
+};
struct cmsis_dap {
struct cmsis_dap_backend_data *bdata;
const struct cmsis_dap_backend *backend;
uint16_t packet_size;
- int packet_count;
uint8_t *packet_buffer;
uint16_t packet_buffer_size;
uint8_t *command;
uint8_t *response;
+
+ /* Pending requests are organized as a FIFO - circular buffer */
+ struct pending_request_block pending_fifo[MAX_PENDING_REQUESTS];
+ unsigned int packet_count;
+ unsigned int pending_fifo_put_idx, pending_fifo_get_idx;
+ unsigned int pending_fifo_block_count;
+
uint16_t caps;
uint8_t mode;
uint32_t swo_buf_sz;
-----------------------------------------------------------------------
Summary of changes:
src/jtag/drivers/cmsis_dap.c | 104 ++++++++++++++++++-------------------------
src/jtag/drivers/cmsis_dap.h | 24 +++++++++-
2 files changed, 66 insertions(+), 62 deletions(-)
hooks/post-receive
--
Main OpenOCD repository
|
|
From: openocd-gerrit <ope...@us...> - 2023-01-15 15:07:22
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".
The branch, master has been updated
via 9dac3b247b43d8b91821560b7c99fbd33d736419 (commit)
from 6d76a915214f06a4960710ae171434265409a705 (commit)
Those revisions listed above that are new to this repository have
not appeared on any other notification email; so we list those
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- Log -----------------------------------------------------------------
commit 9dac3b247b43d8b91821560b7c99fbd33d736419
Author: Antonio Borneo <bor...@gm...>
Date: Sun Nov 13 15:46:19 2022 +0100
tools: add disassembler helper for files .inc
We are moving the binary helpers in files .inc in contrib/loaders/
but we have no support to disassemble them for checking their
content, nor documentation to give any hint.
Add a simple script that uses objdump to directly disassemble a
file .inc
Use Cortex-M settings as default, but provide the flexibility to
reuse the script for any other target CPU.
Change-Id: I12e79580f2936b1622fb7231d9a2484a763ba72a
Signed-off-by: Antonio Borneo <bor...@gm...>
Reviewed-on: https://review.openocd.org/c/openocd/+/7347
Tested-by: jenkins
Reviewed-by: Tomas Vanek <va...@fb...>
diff --git a/tools/disassemble_inc.sh b/tools/disassemble_inc.sh
new file mode 100755
index 000000000..d4b5f80dc
--- /dev/null
+++ b/tools/disassemble_inc.sh
@@ -0,0 +1,50 @@
+#!/bin/sh
+# SPDX-License-Identifier: GPL-2.0-or-later
+
+# Simple script to disassemble a file .inc generated by
+# src/helper/bin2char.sh
+# Can be useful to check the correctness of the file .inc
+#
+# By default it decodes ARM thumb little-endian, e.g. cortex-m.
+# Set CROSS_COMPILE for other toolchains.
+# Set OBJDUMP_FLAGS for different objdump flags.
+#
+# Usage:
+# contrib/loaders/disassemble_inc.sh file.inc
+
+default_CROSS_COMPILE="arm-none-eabi-"
+default_OBJDUMP_FLAGS="-m arm -EL -M force-thumb"
+
+if [ $# != 1 -o ! -f "$1" ]; then
+ echo "Usage:"
+ echo " $0 path/to/file.inc"
+ echo ""
+ echo "Set CROSS_COMPILE and/or OBJDUMP_FLAGS to override current default:"
+ echo " export CROSS_COMPILE=\"${default_CROSS_COMPILE}\""
+ echo " export OBJDUMP_FLAGS=\"${default_OBJDUMP_FLAGS}\""
+ exit 1
+fi
+
+if [ -z "${CROSS_COMPILE}" ]; then
+ CROSS_COMPILE="${default_CROSS_COMPILE}"
+fi
+
+if [ -z "${OBJDUMP_FLAGS}" ]; then
+ OBJDUMP_FLAGS="${default_OBJDUMP_FLAGS}"
+fi
+
+perl -v > /dev/null 2>&1
+if [ $? != 0 ]; then
+ echo "Error: 'perl' interpreter not available."
+ exit 1
+fi
+
+tmpfile=$(mktemp --suffix=.bin)
+
+echo "Disassemble $1:"
+echo "${CROSS_COMPILE}objdump ${OBJDUMP_FLAGS} -b binary -D ${tmpfile}"
+
+perl -e 'while (<>){while ($_=~/(0x..)/g){print chr(hex($1));}}' $1 > ${tmpfile}
+${CROSS_COMPILE}objdump ${OBJDUMP_FLAGS} -b binary -D ${tmpfile}
+
+rm ${tmpfile}
-----------------------------------------------------------------------
Summary of changes:
tools/disassemble_inc.sh | 50 ++++++++++++++++++++++++++++++++++++++++++++++++
1 file changed, 50 insertions(+)
create mode 100755 tools/disassemble_inc.sh
hooks/post-receive
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|
From: openocd-gerrit <ope...@us...> - 2023-01-15 15:05:40
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".
The branch, master has been updated
via 6d76a915214f06a4960710ae171434265409a705 (commit)
from e0059dfffae4f8a55c39e25d0e8b2285559db65c (commit)
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commit 6d76a915214f06a4960710ae171434265409a705
Author: Antonio Borneo <bor...@gm...>
Date: Sat Oct 22 17:58:28 2022 +0200
doc: usb_adapters: add other adapters
Mainly get from web or from OpenOCD users
Change-Id: Id4d6354bc9b6972622adfacf3549c7c3e0549bc2
Signed-off-by: Antonio Borneo <bor...@gm...>
Reviewed-on: https://review.openocd.org/c/openocd/+/7298
Tested-by: jenkins
diff --git a/doc/usb_adapters/cmsis_dap/04b4_f155_cypress_kitprog3.txt b/doc/usb_adapters/cmsis_dap/04b4_f155_cypress_kitprog3.txt
new file mode 100644
index 000000000..3109c6912
--- /dev/null
+++ b/doc/usb_adapters/cmsis_dap/04b4_f155_cypress_kitprog3.txt
@@ -0,0 +1,173 @@
+# SPDX-License-Identifier: GPL-2.0-or-later OR GFDL-1.2-no-invariants-or-later
+
+# KitProg3 Firmware 1.01
+# Has inconsistent class code 0 for CMSIS-DAP interface
+
+Bus 002 Device 017: ID 04b4:f155 Cypress Semiconductor Corp.
+Device Descriptor:
+ bLength 18
+ bDescriptorType 1
+ bcdUSB 2.00
+ bDeviceClass 239 Miscellaneous Device
+ bDeviceSubClass 2 ?
+ bDeviceProtocol 1 Interface Association
+ bMaxPacketSize0 8
+ idVendor 0x04b4 Cypress Semiconductor Corp.
+ idProduct 0xf155
+ bcdDevice 1.01
+ iManufacturer 1 Cypress Semiconductor
+ iProduct 6 KitProg3 CMSIS-DAP
+ iSerial 128 102015B003137400
+ bNumConfigurations 1
+ Configuration Descriptor:
+ bLength 9
+ bDescriptorType 2
+ wTotalLength 130
+ bNumInterfaces 4
+ bConfigurationValue 1
+ iConfiguration 11 KitProg3 CMSIS-DAP
+ bmAttributes 0x80
+ (Bus Powered)
+ MaxPower 400mA
+ Interface Descriptor:
+ bLength 9
+ bDescriptorType 4
+ bInterfaceNumber 0
+ bAlternateSetting 0
+ bNumEndpoints 2
+ bInterfaceClass 0 (Defined at Interface level)
+ bInterfaceSubClass 0
+ bInterfaceProtocol 0
+ iInterface 6 KitProg3 CMSIS-DAP
+ Endpoint Descriptor:
+ bLength 7
+ bDescriptorType 5
+ bEndpointAddress 0x01 EP 1 OUT
+ bmAttributes 2
+ Transfer Type Bulk
+ Synch Type None
+ Usage Type Data
+ wMaxPacketSize 0x0040 1x 64 bytes
+ bInterval 0
+ Endpoint Descriptor:
+ bLength 7
+ bDescriptorType 5
+ bEndpointAddress 0x82 EP 2 IN
+ bmAttributes 2
+ Transfer Type Bulk
+ Synch Type None
+ Usage Type Data
+ wMaxPacketSize 0x0040 1x 64 bytes
+ bInterval 0
+ Interface Descriptor:
+ bLength 9
+ bDescriptorType 4
+ bInterfaceNumber 1
+ bAlternateSetting 0
+ bNumEndpoints 2
+ bInterfaceClass 3 Human Interface Device
+ bInterfaceSubClass 0 No Subclass
+ bInterfaceProtocol 0 None
+ iInterface 12 KitProg3 bridge
+ HID Device Descriptor:
+ bLength 9
+ bDescriptorType 33
+ bcdHID 1.11
+ bCountryCode 0 Not supported
+ bNumDescriptors 1
+ bDescriptorType 34 Report
+ wDescriptorLength 43
+ Report Descriptors:
+ ** UNAVAILABLE **
+ Endpoint Descriptor:
+ bLength 7
+ bDescriptorType 5
+ bEndpointAddress 0x86 EP 6 IN
+ bmAttributes 3
+ Transfer Type Interrupt
+ Synch Type None
+ Usage Type Data
+ wMaxPacketSize 0x0040 1x 64 bytes
+ bInterval 1
+ Endpoint Descriptor:
+ bLength 7
+ bDescriptorType 5
+ bEndpointAddress 0x07 EP 7 OUT
+ bmAttributes 3
+ Transfer Type Interrupt
+ Synch Type None
+ Usage Type Data
+ wMaxPacketSize 0x0040 1x 64 bytes
+ bInterval 1
+ Interface Association:
+ bLength 8
+ bDescriptorType 11
+ bFirstInterface 2
+ bInterfaceCount 2
+ bFunctionClass 2 Communications
+ bFunctionSubClass 2 Abstract (modem)
+ bFunctionProtocol 0 None
+ iFunction 0
+ Interface Descriptor:
+ bLength 9
+ bDescriptorType 4
+ bInterfaceNumber 2
+ bAlternateSetting 0
+ bNumEndpoints 1
+ bInterfaceClass 2 Communications
+ bInterfaceSubClass 2 Abstract (modem)
+ bInterfaceProtocol 1 AT-commands (v.25ter)
+ iInterface 15 KitProg3 USBUART
+ CDC Header:
+ bcdCDC 1.10
+ CDC ACM:
+ bmCapabilities 0x02
+ line coding and serial state
+ CDC Union:
+ bMasterInterface 2
+ bSlaveInterface 3
+ CDC Call Management:
+ bmCapabilities 0x00
+ bDataInterface 3
+ Endpoint Descriptor:
+ bLength 7
+ bDescriptorType 5
+ bEndpointAddress 0x83 EP 3 IN
+ bmAttributes 3
+ Transfer Type Interrupt
+ Synch Type None
+ Usage Type Data
+ wMaxPacketSize 0x0008 1x 8 bytes
+ bInterval 2
+ Interface Descriptor:
+ bLength 9
+ bDescriptorType 4
+ bInterfaceNumber 3
+ bAlternateSetting 0
+ bNumEndpoints 2
+ bInterfaceClass 10 CDC Data
+ bInterfaceSubClass 0 Unused
+ bInterfaceProtocol 0
+ iInterface 4 KitProg3 USBUART
+ Endpoint Descriptor:
+ bLength 7
+ bDescriptorType 5
+ bEndpointAddress 0x84 EP 4 IN
+ bmAttributes 2
+ Transfer Type Bulk
+ Synch Type None
+ Usage Type Data
+ wMaxPacketSize 0x0040 1x 64 bytes
+ bInterval 0
+ Endpoint Descriptor:
+ bLength 7
+ bDescriptorType 5
+ bEndpointAddress 0x05 EP 5 OUT
+ bmAttributes 2
+ Transfer Type Bulk
+ Synch Type None
+ Usage Type Data
+ wMaxPacketSize 0x0040 1x 64 bytes
+ bInterval 0
+Device Status: 0x0000
+ (Bus Powered)
diff --git a/doc/usb_adapters/cmsis_dap/1a6a_2000_spansion_sk_fm4.txt b/doc/usb_adapters/cmsis_dap/1a6a_2000_spansion_sk_fm4.txt
new file mode 100644
index 000000000..368ec2a2b
--- /dev/null
+++ b/doc/usb_adapters/cmsis_dap/1a6a_2000_spansion_sk_fm4.txt
@@ -0,0 +1,143 @@
+# SPDX-License-Identifier: GPL-2.0-or-later OR GFDL-1.2-no-invariants-or-later
+
+# Reported in https://en.opensuse.org/User:A_faerber/SK-FM4-176L-S6E2CC
+
+Bus 002 Device 009: ID 1a6a:2000 Spansion Inc.
+Device Descriptor:
+ bLength 18
+ bDescriptorType 1
+ bcdUSB 1.01
+ bDeviceClass 0 (Defined at Interface level)
+ bDeviceSubClass 0
+ bDeviceProtocol 0
+ bMaxPacketSize0 64
+ idVendor 0x1a6a Spansion Inc.
+ idProduct 0x2000
+ bcdDevice 1.60
+ iManufacturer 1 Spansion
+ iProduct 2 Spansion CMSIS-DAP + COM Port
+ iSerial 0
+ bNumConfigurations 1
+ Configuration Descriptor:
+ bLength 9
+ bDescriptorType 2
+ wTotalLength 107
+ bNumInterfaces 3
+ bConfigurationValue 1
+ iConfiguration 0
+ bmAttributes 0x00
+ (Missing must-be-set bit!)
+ (Bus Powered)
+ MaxPower 62mA
+ Interface Descriptor:
+ bLength 9
+ bDescriptorType 4
+ bInterfaceNumber 0
+ bAlternateSetting 0
+ bNumEndpoints 2
+ bInterfaceClass 3 Human Interface Device
+ bInterfaceSubClass 0 No Subclass
+ bInterfaceProtocol 0 None
+ iInterface 4 Spansion CMSIS-DAP
+ HID Device Descriptor:
+ bLength 9
+ bDescriptorType 33
+ bcdHID 1.11
+ bCountryCode 0 Not supported
+ bNumDescriptors 1
+ bDescriptorType 34 Report
+ wDescriptorLength 29
+ Report Descriptors:
+ ** UNAVAILABLE **
+ Endpoint Descriptor:
+ bLength 7
+ bDescriptorType 5
+ bEndpointAddress 0x81 EP 1 IN
+ bmAttributes 3
+ Transfer Type Interrupt
+ Synch Type None
+ Usage Type Data
+ wMaxPacketSize 0x0040 1x 64 bytes
+ bInterval 1
+ Endpoint Descriptor:
+ bLength 7
+ bDescriptorType 5
+ bEndpointAddress 0x02 EP 2 OUT
+ bmAttributes 3
+ Transfer Type Interrupt
+ Synch Type None
+ Usage Type Data
+ wMaxPacketSize 0x0040 1x 64 bytes
+ bInterval 1
+ Interface Association:
+ bLength 8
+ bDescriptorType 11
+ bFirstInterface 1
+ bInterfaceCount 2
+ bFunctionClass 2 Communications
+ bFunctionSubClass 2 Abstract (modem)
+ bFunctionProtocol 1 AT-commands (v.25ter)
+ iFunction 5 Spansion USB Serial Port
+ Interface Descriptor:
+ bLength 9
+ bDescriptorType 4
+ bInterfaceNumber 1
+ bAlternateSetting 0
+ bNumEndpoints 1
+ bInterfaceClass 2 Communications
+ bInterfaceSubClass 2 Abstract (modem)
+ bInterfaceProtocol 1 AT-commands (v.25ter)
+ iInterface 0
+ CDC Header:
+ bcdCDC 10.01
+ CDC ACM:
+ bmCapabilities 0x00
+ CDC Union:
+ bMasterInterface 1
+ bSlaveInterface 2
+ CDC Call Management:
+ bmCapabilities 0x01
+ call management
+ bDataInterface 2
+ Endpoint Descriptor:
+ bLength 7
+ bDescriptorType 5
+ bEndpointAddress 0x83 EP 3 IN
+ bmAttributes 3
+ Transfer Type Interrupt
+ Synch Type None
+ Usage Type Data
+ wMaxPacketSize 0x0040 1x 64 bytes
+ bInterval 255
+ Interface Descriptor:
+ bLength 9
+ bDescriptorType 4
+ bInterfaceNumber 2
+ bAlternateSetting 0
+ bNumEndpoints 2
+ bInterfaceClass 10 CDC Data
+ bInterfaceSubClass 0 Unused
+ bInterfaceProtocol 0
+ iInterface 0
+ Endpoint Descriptor:
+ bLength 7
+ bDescriptorType 5
+ bEndpointAddress 0x04 EP 4 OUT
+ bmAttributes 2
+ Transfer Type Bulk
+ Synch Type None
+ Usage Type Data
+ wMaxPacketSize 0x0040 1x 64 bytes
+ bInterval 0
+ Endpoint Descriptor:
+ bLength 7
+ bDescriptorType 5
+ bEndpointAddress 0x85 EP 5 IN
+ bmAttributes 2
+ Transfer Type Bulk
+ Synch Type None
+ Usage Type Data
+ wMaxPacketSize 0x0040 1x 64 bytes
+ bInterval 0
+Device Status: 0x0000
+ (Bus Powered)
diff --git a/doc/usb_adapters/cmsis_dap/2a86_8011_wch_link.txt b/doc/usb_adapters/cmsis_dap/2a86_8011_wch_link.txt
new file mode 100644
index 000000000..f27d9932f
--- /dev/null
+++ b/doc/usb_adapters/cmsis_dap/2a86_8011_wch_link.txt
@@ -0,0 +1,143 @@
+# SPDX-License-Identifier: GPL-2.0-or-later OR GFDL-1.2-no-invariants-or-later
+
+# Reported in https://github.com/pyocd/pyOCD/issues/1395
+
+Bus 003 Device 118: ID 2a86:8011 wch.cn WCH-Link
+Device Descriptor:
+ bLength 18
+ bDescriptorType 1
+ bcdUSB 2.00
+ bDeviceClass 239 Miscellaneous Device
+ bDeviceSubClass 2
+ bDeviceProtocol 1 Interface Association
+ bMaxPacketSize0 8
+ idVendor 0x2a86
+ idProduct 0x8011
+ bcdDevice 1.00
+ iManufacturer 1 wch.cn
+ iProduct 2 WCH-Link
+ iSerial 3 0001A0000001
+ bNumConfigurations 1
+ Configuration Descriptor:
+ bLength 9
+ bDescriptorType 2
+ wTotalLength 0x006b
+ bNumInterfaces 3
+ bConfigurationValue 1
+ iConfiguration 0
+ bmAttributes 0x80
+ (Bus Powered)
+ MaxPower 500mA
+ Interface Association:
+ bLength 8
+ bDescriptorType 11
+ bFirstInterface 0
+ bInterfaceCount 2
+ bFunctionClass 2 Communications
+ bFunctionSubClass 2 Abstract (modem)
+ bFunctionProtocol 1 AT-commands (v.25ter)
+ iFunction 4 QYF CMSIS-DAP
+ Interface Descriptor:
+ bLength 9
+ bDescriptorType 4
+ bInterfaceNumber 0
+ bAlternateSetting 0
+ bNumEndpoints 1
+ bInterfaceClass 2 Communications
+ bInterfaceSubClass 2 Abstract (modem)
+ bInterfaceProtocol 0
+ iInterface 4 QYF CMSIS-DAP
+ CDC Header:
+ bcdCDC 1.10
+ CDC Call Management:
+ bmCapabilities 0x01
+ call management
+ bDataInterface 1
+ CDC ACM:
+ bmCapabilities 0x02
+ line coding and serial state
+ CDC Union:
+ bMasterInterface 0
+ bSlaveInterface 1
+ Endpoint Descriptor:
+ bLength 7
+ bDescriptorType 5
+ bEndpointAddress 0x84 EP 4 IN
+ bmAttributes 3
+ Transfer Type Interrupt
+ Synch Type None
+ Usage Type Data
+ wMaxPacketSize 0x0040 1x 64 bytes
+ bInterval 2
+ Interface Descriptor:
+ bLength 9
+ bDescriptorType 4
+ bInterfaceNumber 1
+ bAlternateSetting 0
+ bNumEndpoints 2
+ bInterfaceClass 10 CDC Data
+ bInterfaceSubClass 0
+ bInterfaceProtocol 0
+ iInterface 5 (error)
+ Endpoint Descriptor:
+ bLength 7
+ bDescriptorType 5
+ bEndpointAddress 0x03 EP 3 OUT
+ bmAttributes 2
+ Transfer Type Bulk
+ Synch Type None
+ Usage Type Data
+ wMaxPacketSize 0x0040 1x 64 bytes
+ bInterval 0
+ Endpoint Descriptor:
+ bLength 7
+ bDescriptorType 5
+ bEndpointAddress 0x83 EP 3 IN
+ bmAttributes 2
+ Transfer Type Bulk
+ Synch Type None
+ Usage Type Data
+ wMaxPacketSize 0x0040 1x 64 bytes
+ bInterval 0
+ Interface Descriptor:
+ bLength 9
+ bDescriptorType 4
+ bInterfaceNumber 2
+ bAlternateSetting 0
+ bNumEndpoints 2
+ bInterfaceClass 3 Human Interface Device
+ bInterfaceSubClass 0
+ bInterfaceProtocol 0
+ iInterface 6 QYF CMSIS-DAP
+ HID Device Descriptor:
+ bLength 9
+ bDescriptorType 33
+ bcdHID 1.00
+ bCountryCode 0 Not supported
+ bNumDescriptors 1
+ bDescriptorType 34 Report
+ wDescriptorLength 33
+ Report Descriptors:
+ ** UNAVAILABLE **
+ Endpoint Descriptor:
+ bLength 7
+ bDescriptorType 5
+ bEndpointAddress 0x81 EP 1 IN
+ bmAttributes 3
+ Transfer Type Interrupt
+ Synch Type None
+ Usage Type Data
+ wMaxPacketSize 0x0040 1x 64 bytes
+ bInterval 1
+ Endpoint Descriptor:
+ bLength 7
+ bDescriptorType 5
+ bEndpointAddress 0x01 EP 1 OUT
+ bmAttributes 3
+ Transfer Type Interrupt
+ Synch Type None
+ Usage Type Data
+ wMaxPacketSize 0x0040 1x 64 bytes
+ bInterval 1
+Device Status: 0x0000
+ (Bus Powered)
diff --git a/doc/usb_adapters/cmsis_dap/c251_2723_keil_ulink_me.txt b/doc/usb_adapters/cmsis_dap/c251_2723_keil_ulink_me.txt
new file mode 100644
index 000000000..df2b9243e
--- /dev/null
+++ b/doc/usb_adapters/cmsis_dap/c251_2723_keil_ulink_me.txt
@@ -0,0 +1,72 @@
+# SPDX-License-Identifier: GPL-2.0-or-later OR GFDL-1.2-no-invariants-or-later
+
+# Reported in https://stackoverflow.com/questions/27087281/jtag-adapter-ulink-me-and-openocd-on-archlinux
+
+Bus 005 Device 026: ID c251:2723 Keil Software, Inc.
+Device Descriptor:
+ bLength 18
+ bDescriptorType 1
+ bcdUSB 2.00
+ bDeviceClass 0 (Defined at Interface level)
+ bDeviceSubClass 0
+ bDeviceProtocol 0
+ bMaxPacketSize0 64
+ idVendor 0xc251 Keil Software, Inc.
+ idProduct 0x2723
+ bcdDevice 1.00
+ iManufacturer 1 Keil Software
+ iProduct 2 Keil ULINK-ME CMSIS-DAP
+ iSerial 3 M0489MAE
+ bNumConfigurations 1
+ Configuration Descriptor:
+ bLength 9
+ bDescriptorType 2
+ wTotalLength 41
+ bNumInterfaces 1
+ bConfigurationValue 1
+ iConfiguration 0
+ bmAttributes 0x80
+ (Bus Powered)
+ MaxPower 100mA
+ Interface Descriptor:
+ bLength 9
+ bDescriptorType 4
+ bInterfaceNumber 0
+ bAlternateSetting 0
+ bNumEndpoints 2
+ bInterfaceClass 3 Human Interface Device
+ bInterfaceSubClass 0 No Subclass
+ bInterfaceProtocol 0 None
+ iInterface 4 CMSIS-DAP
+ HID Device Descriptor:
+ bLength 9
+ bDescriptorType 33
+ bcdHID 1.00
+ bCountryCode 0 Not supported
+ bNumDescriptors 1
+ bDescriptorType 34 Report
+ wDescriptorLength 33
+ Report Descriptors:
+ ** UNAVAILABLE **
+ Endpoint Descriptor:
+ bLength 7
+ bDescriptorType 5
+ bEndpointAddress 0x81 EP 1 IN
+ bmAttributes 3
+ Transfer Type Interrupt
+ Synch Type None
+ Usage Type Data
+ wMaxPacketSize 0x0040 1x 64 bytes
+ bInterval 1
+ Endpoint Descriptor:
+ bLength 7
+ bDescriptorType 5
+ bEndpointAddress 0x01 EP 1 OUT
+ bmAttributes 3
+ Transfer Type Interrupt
+ Synch Type None
+ Usage Type Data
+ wMaxPacketSize 0x0040 1x 64 bytes
+ bInterval 1
+Device Status: 0x0000
+ (Bus Powered)
diff --git a/doc/usb_adapters/cmsis_dap/c251_2750_keil_ulinkplus.txt b/doc/usb_adapters/cmsis_dap/c251_2750_keil_ulinkplus.txt
new file mode 100644
index 000000000..4504ef0eb
--- /dev/null
+++ b/doc/usb_adapters/cmsis_dap/c251_2750_keil_ulinkplus.txt
@@ -0,0 +1,161 @@
+# SPDX-License-Identifier: GPL-2.0-or-later OR GFDL-1.2-no-invariants-or-later
+
+# firmware 2.0.11
+
+Bus 001 Device 005: ID c251:2750 Keil Software, Inc.
+Device Descriptor:
+ bLength 18
+ bDescriptorType 1
+ bcdUSB 2.00
+ bDeviceClass 0 (Defined at Interface level)
+ bDeviceSubClass 0
+ bDeviceProtocol 0
+ bMaxPacketSize0 64
+ idVendor 0xc251 Keil Software, Inc.
+ idProduct 0x2750
+ bcdDevice 1.00
+ iManufacturer 1 KEIL - Tools By ARM
+ iProduct 2 Keil ULINKplus
+ iSerial 3 L78440715A
+ bNumConfigurations 1
+ Configuration Descriptor:
+ bLength 9
+ bDescriptorType 2
+ wTotalLength 101
+ bNumInterfaces 4
+ bConfigurationValue 1
+ iConfiguration 0
+ bmAttributes 0x80
+ (Bus Powered)
+ MaxPower 500mA
+ Interface Descriptor:
+ bLength 9
+ bDescriptorType 4
+ bInterfaceNumber 0
+ bAlternateSetting 0
+ bNumEndpoints 3
+ bInterfaceClass 255 Vendor Specific Class
+ bInterfaceSubClass 0
+ bInterfaceProtocol 0
+ iInterface 4 ULINKplus CMSIS-DAP
+ Endpoint Descriptor:
+ bLength 7
+ bDescriptorType 5
+ bEndpointAddress 0x01 EP 1 OUT
+ bmAttributes 2
+ Transfer Type Bulk
+ Synch Type None
+ Usage Type Data
+ wMaxPacketSize 0x0200 1x 512 bytes
+ bInterval 0
+ Endpoint Descriptor:
+ bLength 7
+ bDescriptorType 5
+ bEndpointAddress 0x81 EP 1 IN
+ bmAttributes 2
+ Transfer Type Bulk
+ Synch Type None
+ Usage Type Data
+ wMaxPacketSize 0x0200 1x 512 bytes
+ bInterval 0
+ Endpoint Descriptor:
+ bLength 7
+ bDescriptorType 5
+ bEndpointAddress 0x85 EP 5 IN
+ bmAttributes 2
+ Transfer Type Bulk
+ Synch Type None
+ Usage Type Data
+ wMaxPacketSize 0x0200 1x 512 bytes
+ bInterval 0
+ Interface Descriptor:
+ bLength 9
+ bDescriptorType 4
+ bInterfaceNumber 1
+ bAlternateSetting 0
+ bNumEndpoints 2
+ bInterfaceClass 255 Vendor Specific Class
+ bInterfaceSubClass 0
+ bInterfaceProtocol 0
+ iInterface 5 ULINKplus Digital I/O
+ Endpoint Descriptor:
+ bLength 7
+ bDescriptorType 5
+ bEndpointAddress 0x02 EP 2 OUT
+ bmAttributes 2
+ Transfer Type Bulk
+ Synch Type None
+ Usage Type Data
+ wMaxPacketSize 0x0200 1x 512 bytes
+ bInterval 0
+ Endpoint Descriptor:
+ bLength 7
+ bDescriptorType 5
+ bEndpointAddress 0x82 EP 2 IN
+ bmAttributes 2
+ Transfer Type Bulk
+ Synch Type None
+ Usage Type Data
+ wMaxPacketSize 0x0200 1x 512 bytes
+ bInterval 0
+ Interface Descriptor:
+ bLength 9
+ bDescriptorType 4
+ bInterfaceNumber 2
+ bAlternateSetting 0
+ bNumEndpoints 2
+ bInterfaceClass 255 Vendor Specific Class
+ bInterfaceSubClass 0
+ bInterfaceProtocol 0
+ iInterface 6 ULINKplus Analog I/O
+ Endpoint Descriptor:
+ bLength 7
+ bDescriptorType 5
+ bEndpointAddress 0x03 EP 3 OUT
+ bmAttributes 2
+ Transfer Type Bulk
+ Synch Type None
+ Usage Type Data
+ wMaxPacketSize 0x0200 1x 512 bytes
+ bInterval 0
+ Endpoint Descriptor:
+ bLength 7
+ bDescriptorType 5
+ bEndpointAddress 0x83 EP 3 IN
+ bmAttributes 2
+ Transfer Type Bulk
+ Synch Type None
+ Usage Type Data
+ wMaxPacketSize 0x0200 1x 512 bytes
+ bInterval 0
+ Interface Descriptor:
+ bLength 9
+ bDescriptorType 4
+ bInterfaceNumber 3
+ bAlternateSetting 0
+ bNumEndpoints 1
+ bInterfaceClass 255 Vendor Specific Class
+ bInterfaceSubClass 0
+ bInterfaceProtocol 0
+ iInterface 7 ULINKplus Power Probe
+ Endpoint Descriptor:
+ bLength 7
+ bDescriptorType 5
+ bEndpointAddress 0x84 EP 4 IN
+ bmAttributes 2
+ Transfer Type Bulk
+ Synch Type None
+ Usage Type Data
+ wMaxPacketSize 0x0200 1x 512 bytes
+ bInterval 0
+Device Qualifier (for other device speed):
+ bLength 10
+ bDescriptorType 6
+ bcdUSB 2.00
+ bDeviceClass 0 (Defined at Interface level)
+ bDeviceSubClass 0
+ bDeviceProtocol 0
+ bMaxPacketSize0 64
+ bNumConfigurations 1
+Device Status: 0x0000
+ (Bus Powered)
diff --git a/doc/usb_adapters/cmsis_dap/c251_f001_jixin.pro.txt b/doc/usb_adapters/cmsis_dap/c251_f001_jixin.pro.txt
new file mode 100644
index 000000000..c08f679a6
--- /dev/null
+++ b/doc/usb_adapters/cmsis_dap/c251_f001_jixin.pro.txt
@@ -0,0 +1,143 @@
+# SPDX-License-Identifier: GPL-2.0-or-later OR GFDL-1.2-no-invariants-or-later
+
+# Reported in https://sourceforge.net/p/openocd/tickets/368/
+
+Bus 001 Device 008: ID c251:f001 Keil Software, Inc.
+Device Descriptor:
+ bLength 18
+ bDescriptorType 1
+ bcdUSB 2.00
+ bDeviceClass 239 Miscellaneous Device
+ bDeviceSubClass 2 ?
+ bDeviceProtocol 1 Interface Association
+ bMaxPacketSize0 64
+ idVendor 0xc251 Keil Software, Inc.
+ idProduct 0xf001
+ bcdDevice 1.00
+ iManufacturer 1 jixin.pro
+ iProduct 2 CMSIS-DAP_LU
+ iSerial 3 LU_2022_8888
+ bNumConfigurations 1
+ Configuration Descriptor:
+ bLength 9
+ bDescriptorType 2
+ wTotalLength 107
+ bNumInterfaces 3
+ bConfigurationValue 1
+ iConfiguration 0
+ bmAttributes 0x80
+ (Bus Powered)
+ MaxPower 100mA
+ Interface Association:
+ bLength 8
+ bDescriptorType 11
+ bFirstInterface 0
+ bInterfaceCount 2
+ bFunctionClass 2 Communications
+ bFunctionSubClass 2 Abstract (modem)
+ bFunctionProtocol 1 AT-commands (v.25ter)
+ iFunction 4 CMSIS-DAP CDC
+ Interface Descriptor:
+ bLength 9
+ bDescriptorType 4
+ bInterfaceNumber 0
+ bAlternateSetting 0
+ bNumEndpoints 1
+ bInterfaceClass 2 Communications
+ bInterfaceSubClass 2 Abstract (modem)
+ bInterfaceProtocol 0 None
+ iInterface 4 CMSIS-DAP CDC
+ CDC Header:
+ bcdCDC 1.10
+ CDC Call Management:
+ bmCapabilities 0x01
+ call management
+ bDataInterface 1
+ CDC ACM:
+ bmCapabilities 0x02
+ line coding and serial state
+ CDC Union:
+ bMasterInterface 0
+ bSlaveInterface 1
+ Endpoint Descriptor:
+ bLength 7
+ bDescriptorType 5
+ bEndpointAddress 0x81 EP 1 IN
+ bmAttributes 3
+ Transfer Type Interrupt
+ Synch Type None
+ Usage Type Data
+ wMaxPacketSize 0x0040 1x 64 bytes
+ bInterval 2
+ Interface Descriptor:
+ bLength 9
+ bDescriptorType 4
+ bInterfaceNumber 1
+ bAlternateSetting 0
+ bNumEndpoints 2
+ bInterfaceClass 10 CDC Data
+ bInterfaceSubClass 0 Unused
+ bInterfaceProtocol 0
+ iInterface 5 CMSIS-DAP DCI
+ Endpoint Descriptor:
+ bLength 7
+ bDescriptorType 5
+ bEndpointAddress 0x02 EP 2 OUT
+ bmAttributes 2
+ Transfer Type Bulk
+ Synch Type None
+ Usage Type Data
+ wMaxPacketSize 0x0040 1x 64 bytes
+ bInterval 0
+ Endpoint Descriptor:
+ bLength 7
+ bDescriptorType 5
+ bEndpointAddress 0x82 EP 2 IN
+ bmAttributes 2
+ Transfer Type Bulk
+ Synch Type None
+ Usage Type Data
+ wMaxPacketSize 0x0040 1x 64 bytes
+ bInterval 0
+ Interface Descriptor:
+ bLength 9
+ bDescriptorType 4
+ bInterfaceNumber 2
+ bAlternateSetting 0
+ bNumEndpoints 2
+ bInterfaceClass 3 Human Interface Device
+ bInterfaceSubClass 0 No Subclass
+ bInterfaceProtocol 0 None
+ iInterface 6 CMSIS-DAP_LU
+ HID Device Descriptor:
+ bLength 9
+ bDescriptorType 33
+ bcdHID 1.00
+ bCountryCode 0 Not supported
+ bNumDescriptors 1
+ bDescriptorType 34 Report
+ wDescriptorLength 33
+ Report Descriptors:
+ ** UNAVAILABLE **
+ Endpoint Descriptor:
+ bLength 7
+ bDescriptorType 5
+ bEndpointAddress 0x83 EP 3 IN
+ bmAttributes 3
+ Transfer Type Interrupt
+ Synch Type None
+ Usage Type Data
+ wMaxPacketSize 0x0040 1x 64 bytes
+ bInterval 1
+ Endpoint Descriptor:
+ bLength 7
+ bDescriptorType 5
+ bEndpointAddress 0x03 EP 3 OUT
+ bmAttributes 3
+ Transfer Type Interrupt
+ Synch Type None
+ Usage Type Data
+ wMaxPacketSize 0x0040 1x 64 bytes
+ bInterval 1
+Device Status: 0x0000
+ (Bus Powered)
diff --git a/doc/usb_adapters/ftdi/0403_6014_digilent_hs2.txt b/doc/usb_adapters/ftdi/0403_6014_digilent_hs2.txt
new file mode 100644
index 000000000..68fc119e1
--- /dev/null
+++ b/doc/usb_adapters/ftdi/0403_6014_digilent_hs2.txt
@@ -0,0 +1,71 @@
+# SPDX-License-Identifier: GPL-2.0-or-later OR GFDL-1.2-no-invariants-or-later
+
+# Reported in https://sourceforge.net/p/openocd/tickets/357/
+
+Bus 001 Device 084: ID 0403:6014 Future Technology Devices International, Ltd FT232H Single HS USB-UART/FIFO IC
+Device Descriptor:
+ bLength 18
+ bDescriptorType 1
+ bcdUSB 2.00
+ bDeviceClass 0
+ bDeviceSubClass 0
+ bDeviceProtocol 0
+ bMaxPacketSize0 64
+ idVendor 0x0403 Future Technology Devices International, Ltd
+ idProduct 0x6014 FT232H Single HS USB-UART/FIFO IC
+ bcdDevice 9.00
+ iManufacturer 1 Digilent
+ iProduct 2 Digilent USB Device
+ iSerial 3 210249AFCD0B
+ bNumConfigurations 1
+ Configuration Descriptor:
+ bLength 9
+ bDescriptorType 2
+ wTotalLength 0x0020
+ bNumInterfaces 1
+ bConfigurationValue 1
+ iConfiguration 0
+ bmAttributes 0x80
+ (Bus Powered)
+ MaxPower 500mA
+ Interface Descriptor:
+ bLength 9
+ bDescriptorType 4
+ bInterfaceNumber 0
+ bAlternateSetting 0
+ bNumEndpoints 2
+ bInterfaceClass 255 Vendor Specific Class
+ bInterfaceSubClass 255 Vendor Specific Subclass
+ bInterfaceProtocol 255 Vendor Specific Protocol
+ iInterface 2 Digilent USB Device
+ Endpoint Descriptor:
+ bLength 7
+ bDescriptorType 5
+ bEndpointAddress 0x81 EP 1 IN
+ bmAttributes 2
+ Transfer Type Bulk
+ Synch Type None
+ Usage Type Data
+ wMaxPacketSize 0x0200 1x 512 bytes
+ bInterval 0
+ Endpoint Descriptor:
+ bLength 7
+ bDescriptorType 5
+ bEndpointAddress 0x02 EP 2 OUT
+ bmAttributes 2
+ Transfer Type Bulk
+ Synch Type None
+ Usage Type Data
+ wMaxPacketSize 0x0200 1x 512 bytes
+ bInterval 0
+Device Qualifier (for other device speed):
+ bLength 10
+ bDescriptorType 6
+ bcdUSB 2.00
+ bDeviceClass 0
+ bDeviceSubClass 0
+ bDeviceProtocol 0
+ bMaxPacketSize0 64
+ bNumConfigurations 1
+Device Status: 0x0000
+ (Bus Powered)
diff --git a/doc/usb_adapters/ftdi/9e88_9e8f_sheevaplug_jtagkey.txt b/doc/usb_adapters/ftdi/9e88_9e8f_sheevaplug_jtagkey.txt
new file mode 100644
index 000000000..c61044335
--- /dev/null
+++ b/doc/usb_adapters/ftdi/9e88_9e8f_sheevaplug_jtagkey.txt
@@ -0,0 +1,92 @@
+# SPDX-License-Identifier: GPL-2.0-or-later OR GFDL-1.2-no-invariants-or-later
+
+# Reported in https://bugs.debian.org/cgi-bin/bugreport.cgi?bug=837989
+
+Bus 003 Device 002: ID 9e88:9e8f
+Device Descriptor:
+ bLength 18
+ bDescriptorType 1
+ bcdUSB 2.00
+ bDeviceClass 0 (Defined at Interface level)
+ bDeviceSubClass 0
+ bDeviceProtocol 0
+ bMaxPacketSize0 8
+ idVendor 0x9e88
+ idProduct 0x9e8f
+ bcdDevice 5.00
+ iManufacturer 1 FTDI
+ iProduct 2 SheevaPlug JTAGKey FT2232D B
+ iSerial 3 FTU85Z4Y
+ bNumConfigurations 1
+ Configuration Descriptor:
+ bLength 9
+ bDescriptorType 2
+ wTotalLength 55
+ bNumInterfaces 2
+ bConfigurationValue 1
+ iConfiguration 0
+ bmAttributes 0xc0
+ Self Powered
+ MaxPower 0mA
+ Interface Descriptor:
+ bLength 9
+ bDescriptorType 4
+ bInterfaceNumber 0
+ bAlternateSetting 0
+ bNumEndpoints 2
+ bInterfaceClass 255 Vendor Specific Class
+ bInterfaceSubClass 255 Vendor Specific Subclass
+ bInterfaceProtocol 255 Vendor Specific Protocol
+ iInterface 2 SheevaPlug JTAGKey FT2232D B
+ Endpoint Descriptor:
+ bLength 7
+ bDescriptorType 5
+ bEndpointAddress 0x81 EP 1 IN
+ bmAttributes 2
+ Transfer Type Bulk
+ Synch Type None
+ Usage Type Data
+ wMaxPacketSize 0x0040 1x 64 bytes
+ bInterval 0
+ Endpoint Descriptor:
+ bLength 7
+ bDescriptorType 5
+ bEndpointAddress 0x02 EP 2 OUT
+ bmAttributes 2
+ Transfer Type Bulk
+ Synch Type None
+ Usage Type Data
+ wMaxPacketSize 0x0040 1x 64 bytes
+ bInterval 0
+ Interface Descriptor:
+ bLength 9
+ bDescriptorType 4
+ bInterfaceNumber 1
+ bAlternateSetting 0
+ bNumEndpoints 2
+ bInterfaceClass 255 Vendor Specific Class
+ bInterfaceSubClass 255 Vendor Specific Subclass
+ bInterfaceProtocol 255 Vendor Specific Protocol
+ iInterface 2 SheevaPlug JTAGKey FT2232D B
+ Endpoint Descriptor:
+ bLength 7
+ bDescriptorType 5
+ bEndpointAddress 0x83 EP 3 IN
+ bmAttributes 2
+ Transfer Type Bulk
+ Synch Type None
+ Usage Type Data
+ wMaxPacketSize 0x0040 1x 64 bytes
+ bInterval 0
+ Endpoint Descriptor:
+ bLength 7
+ bDescriptorType 5
+ bEndpointAddress 0x04 EP 4 OUT
+ bmAttributes 2
+ Transfer Type Bulk
+ Synch Type None
+ Usage Type Data
+ wMaxPacketSize 0x0040 1x 64 bytes
+ bInterval 0
+Device Status: 0x0000
+ (Bus Powered)
diff --git a/doc/usb_adapters/jlink/1366_0101_segger_jlink.txt b/doc/usb_adapters/jlink/1366_0101_segger_jlink.txt
new file mode 100644
index 000000000..8fa4e7d29
--- /dev/null
+++ b/doc/usb_adapters/jlink/1366_0101_segger_jlink.txt
@@ -0,0 +1,62 @@
+# SPDX-License-Identifier: GPL-2.0-or-later OR GFDL-1.2-no-invariants-or-later
+
+# Reported in https://forums.gentoo.org/viewtopic-t-781442-start-0.html
+
+Bus 002 Device 002: ID 1366:0101
+Device Descriptor:
+ bLength 18
+ bDescriptorType 1
+ bcdUSB 1.10
+ bDeviceClass 0 (Defined at Interface level)
+ bDeviceSubClass 0
+ bDeviceProtocol 0
+ bMaxPacketSize0 8
+ idVendor 0x1366
+ idProduct 0x0101
+ bcdDevice 0.01
+ iManufacturer 1 SEGGER
+ iProduct 2 J-Link
+ iSerial 3 123456
+ bNumConfigurations 1
+ Configuration Descriptor:
+ bLength 9
+ bDescriptorType 2
+ wTotalLength 32
+ bNumInterfaces 1
+ bConfigurationValue 1
+ iConfiguration 0
+ bmAttributes 0xc0
+ Self Powered
+ MaxPower 100mA
+ Interface Descriptor:
+ bLength 9
+ bDescriptorType 4
+ bInterfaceNumber 0
+ bAlternateSetting 0
+ bNumEndpoints 2
+ bInterfaceClass 255 Vendor Specific Class
+ bInterfaceSubClass 255 Vendor Specific Subclass
+ bInterfaceProtocol 255 Vendor Specific Protocol
+ iInterface 0
+ Endpoint Descriptor:
+ bLength 7
+ bDescriptorType 5
+ bEndpointAddress 0x81 EP 1 IN
+ bmAttributes 2
+ Transfer Type Bulk
+ Synch Type None
+ Usage Type Data
+ wMaxPacketSize 0x0040 1x 64 bytes
+ bInterval 0
+ Endpoint Descriptor:
+ bLength 7
+ bDescriptorType 5
+ bEndpointAddress 0x02 EP 2 OUT
+ bmAttributes 2
+ Transfer Type Bulk
+ Synch Type None
+ Usage Type Data
+ wMaxPacketSize 0x0040 1x 64 bytes
+ bInterval 0
+Device Status: 0x0001
+ Self Powered
diff --git a/doc/usb_adapters/kitprog/04b4_f139_cypress_kitprog.txt b/doc/usb_adapters/kitprog/04b4_f139_cypress_kitprog.txt
new file mode 100644
index 000000000..e3430d87e
--- /dev/null
+++ b/doc/usb_adapters/kitprog/04b4_f139_cypress_kitprog.txt
@@ -0,0 +1,172 @@
+# SPDX-License-Identifier: GPL-2.0-or-later OR GFDL-1.2-no-invariants-or-later
+
+# Reported in http://false.ekta.is/tag/unboxing/
+
+Bus 003 Device 011: ID 04b4:f139 Cypress Semiconductor Corp.
+Device Descriptor:
+ bLength 18
+ bDescriptorType 1
+ bcdUSB 2.00
+ bDeviceClass 239 Miscellaneous Device
+ bDeviceSubClass 2 ?
+ bDeviceProtocol 1 Interface Association
+ bMaxPacketSize0 8
+ idVendor 0x04b4 Cypress Semiconductor Corp.
+ idProduct 0xf139
+ bcdDevice 2.0b
+ iManufacturer 1 Cypress Semiconductor
+ iProduct 2 Cypress KitProg
+ iSerial 128 1C210338012E4400
+ bNumConfigurations 1
+ Configuration Descriptor:
+ bLength 9
+ bDescriptorType 2
+ wTotalLength 130
+ bNumInterfaces 4
+ bConfigurationValue 1
+ iConfiguration 2 Cypress KitProg
+ bmAttributes 0x80
+ (Bus Powered)
+ MaxPower 400mA
+ Interface Descriptor:
+ bLength 9
+ bDescriptorType 4
+ bInterfaceNumber 0
+ bAlternateSetting 0
+ bNumEndpoints 2
+ bInterfaceClass 3 Human Interface Device
+ bInterfaceSubClass 0 No Subclass
+ bInterfaceProtocol 0 None
+ iInterface 3 KitBridge
+ HID Device Descriptor:
+ bLength 9
+ bDescriptorType 33
+ bcdHID 1.11
+ bCountryCode 0 Not supported
+ bNumDescriptors 1
+ bDescriptorType 34 Report
+ wDescriptorLength 43
+ Report Descriptors:
+ ** UNAVAILABLE **
+ Endpoint Descriptor:
+ bLength 7
+ bDescriptorType 5
+ bEndpointAddress 0x83 EP 3 IN
+ bmAttributes 3
+ Transfer Type Interrupt
+ Synch Type None
+ Usage Type Data
+ wMaxPacketSize 0x0040 1x 64 bytes
+ bInterval 1
+ Endpoint Descriptor:
+ bLength 7
+ bDescriptorType 5
+ bEndpointAddress 0x04 EP 4 OUT
+ bmAttributes 3
+ Transfer Type Interrupt
+ Synch Type None
+ Usage Type Data
+ wMaxPacketSize 0x0040 1x 64 bytes
+ bInterval 1
+ Interface Descriptor:
+ bLength 9
+ bDescriptorType 4
+ bInterfaceNumber 1
+ bAlternateSetting 0
+ bNumEndpoints 2
+ bInterfaceClass 255 Vendor Specific Class
+ bInterfaceSubClass 0
+ bInterfaceProtocol 0
+ iInterface 5 KitProg Programmer
+ Endpoint Descriptor:
+ bLength 7
+ bDescriptorType 5
+ bEndpointAddress 0x81 EP 1 IN
+ bmAttributes 2
+ Transfer Type Bulk
+ Synch Type None
+ Usage Type Data
+ wMaxPacketSize 0x0040 1x 64 bytes
+ bInterval 0
+ Endpoint Descriptor:
+ bLength 7
+ bDescriptorType 5
+ bEndpointAddress 0x02 EP 2 OUT
+ bmAttributes 2
+ Transfer Type Bulk
+ Synch Type None
+ Usage Type Data
+ wMaxPacketSize 0x0040 1x 64 bytes
+ bInterval 0
+ Interface Association:
+ bLength 8
+ bDescriptorType 11
+ bFirstInterface 2
+ bInterfaceCount 2
+ bFunctionClass 2 Communications
+ bFunctionSubClass 0
+ bFunctionProtocol 0
+ iFunction 0
+ Interface Descriptor:
+ bLength 9
+ bDescriptorType 4
+ bInterfaceNumber 2
+ bAlternateSetting 0
+ bNumEndpoints 1
+ bInterfaceClass 2 Communications
+ bInterfaceSubClass 2 Abstract (modem)
+ bInterfaceProtocol 0 None
+ iInterface 4 KitProg USBUART
+ CDC Header:
+ bcdCDC 1.10
+ CDC ACM:
+ bmCapabilities 0x02
+ line coding and serial state
+ CDC Union:
+ bMasterInterface 2
+ bSlaveInterface 1
+ CDC Call Management:
+ bmCapabilities 0x00
+ bDataInterface 1
+ Endpoint Descriptor:
+ bLength 7
+ bDescriptorType 5
+ bEndpointAddress 0x85 EP 5 IN
+ bmAttributes 3
+ Transfer Type Interrupt
+ Synch Type None
+ Usage Type Data
+ wMaxPacketSize 0x0008 1x 8 bytes
+ bInterval 2
+ Interface Descriptor:
+ bLength 9
+ bDescriptorType 4
+ bInterfaceNumber 3
+ bAlternateSetting 0
+ bNumEndpoints 2
+ bInterfaceClass 10 CDC Data
+ bInterfaceSubClass 0 Unused
+ bInterfaceProtocol 0
+ iInterface 4 KitProg USBUART
+ Endpoint Descriptor:
+ bLength 7
+ bDescriptorType 5
+ bEndpointAddress 0x86 EP 6 IN
+ bmAttributes 2
+ Transfer Type Bulk
+ Synch Type None
+ Usage Type Data
+ wMaxPacketSize 0x0040 1x 64 bytes
+ bInterval 0
+ Endpoint Descriptor:
+ bLength 7
+ bDescriptorType 5
+ bEndpointAddress 0x07 EP 7 OUT
+ bmAttributes 2
+ Transfer Type Bulk
+ Synch Type None
+ Usage Type Data
+ wMaxPacketSize 0x0040 1x 64 bytes
+ bInterval 0
+Device Status: 0x0000
+ (Bus Powered)
-----------------------------------------------------------------------
Summary of changes:
..._daplink.txt => 04b4_f155_cypress_kitprog3.txt} | 94 +++++++-------
.../1a6a_2000_spansion_sk_fm4.txt} | 61 ++++-----
.../2a86_8011_wch_link.txt} | 135 ++++++++++----------
...keil_ulink2.txt => c251_2723_keil_ulink_me.txt} | 18 +--
.../c251_2750_keil_ulinkplus.txt} | 117 ++++++++----------
.../c251_f001_jixin.pro.txt} | 137 +++++++++++----------
.../0403_6014_digilent_hs2.txt} | 28 ++---
...t2232h.txt => 9e88_9e8f_sheevaplug_jtagkey.txt} | 49 +++-----
.../1366_0101_segger_jlink.txt} | 34 +++--
.../04b4_f139_cypress_kitprog.txt} | 135 ++++++++++----------
10 files changed, 386 insertions(+), 422 deletions(-)
copy doc/usb_adapters/cmsis_dap/{0d28_0204_nxp_daplink.txt => 04b4_f155_cypress_kitprog3.txt} (75%)
copy doc/usb_adapters/{nulink/0416_511d_nuvoton_nulink.txt => cmsis_dap/1a6a_2000_spansion_sk_fm4.txt} (79%)
copy doc/usb_adapters/{nulink/0416_511d_nuvoton_nulink.txt => cmsis_dap/2a86_8011_wch_link.txt} (78%)
copy doc/usb_adapters/cmsis_dap/{c251_2722_keil_ulink2.txt => c251_2723_keil_ulink_me.txt} (82%)
copy doc/usb_adapters/{stlink/0483_374e_stlinkv3.txt => cmsis_dap/c251_2750_keil_ulinkplus.txt} (67%)
copy doc/usb_adapters/{nulink/0416_511d_nuvoton_nulink.txt => cmsis_dap/c251_f001_jixin.pro.txt} (76%)
copy doc/usb_adapters/{stlink/0483_374d_stlinkv3.txt => ftdi/0403_6014_digilent_hs2.txt} (73%)
copy doc/usb_adapters/ftdi/{0403_6010_ft2232h.txt => 9e88_9e8f_sheevaplug_jtagkey.txt} (68%)
copy doc/usb_adapters/{ftdi/09fb_6001_altera_blaster.txt => jlink/1366_0101_segger_jlink.txt} (72%)
copy doc/usb_adapters/{cmsis_dap/0d28_0204_nxp_daplink.txt => kitprog/04b4_f139_cypress_kitprog.txt} (74%)
hooks/post-receive
--
Main OpenOCD repository
|
|
From: openocd-gerrit <ope...@us...> - 2023-01-15 15:05:26
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".
The branch, master has been updated
via e0059dfffae4f8a55c39e25d0e8b2285559db65c (commit)
via 2c191ef1da1f7f4dd38606c9936948a958aece20 (commit)
from 9ffda10298eff870bde12dec580f98de6f497257 (commit)
Those revisions listed above that are new to this repository have
not appeared on any other notification email; so we list those
revisions in full, below.
- Log -----------------------------------------------------------------
commit e0059dfffae4f8a55c39e25d0e8b2285559db65c
Author: Antonio Borneo <bor...@gm...>
Date: Sat Oct 22 18:16:59 2022 +0200
doc: usb_adapters: add lsusb dump of few adapters
Real dumps from adapters I have access to.
Serial numbers have been manually edited but are still consistent.
Change-Id: Iee2d16e09615746e29588f91fdfb77eb9fad4daa
Signed-off-by: Antonio Borneo <bor...@gm...>
Reviewed-on: https://review.openocd.org/c/openocd/+/7297
Tested-by: jenkins
diff --git a/doc/usb_adapters/cmsis_dap/0d28_0204_nxp_daplink.txt b/doc/usb_adapters/cmsis_dap/0d28_0204_nxp_daplink.txt
new file mode 100644
index 000000000..2ec0d58e2
--- /dev/null
+++ b/doc/usb_adapters/cmsis_dap/0d28_0204_nxp_daplink.txt
@@ -0,0 +1,175 @@
+# SPDX-License-Identifier: GPL-2.0-or-later OR GFDL-1.2-no-invariants-or-later
+
+# Board: NXP FRDM-K64F
+
+Bus 001 Device 006: ID 0d28:0204 NXP ARM mbed
+Device Descriptor:
+ bLength 18
+ bDescriptorType 1
+ bcdUSB 2.00
+ bDeviceClass 239 Miscellaneous Device
+ bDeviceSubClass 2
+ bDeviceProtocol 1 Interface Association
+ bMaxPacketSize0 64
+ idVendor 0x0d28 NXP
+ idProduct 0x0204 ARM mbed
+ bcdDevice 10.00
+ iManufacturer 1 ARM
+ iProduct 2 DAPLink CMSIS-DAP
+ iSerial 3 0240000031754e45002f00199485002b6461000097969900
+ bNumConfigurations 1
+ Configuration Descriptor:
+ bLength 9
+ bDescriptorType 2
+ wTotalLength 0x0082
+ bNumInterfaces 4
+ bConfigurationValue 1
+ iConfiguration 0
+ bmAttributes 0x80
+ (Bus Powered)
+ MaxPower 500mA
+ Interface Descriptor:
+ bLength 9
+ bDescriptorType 4
+ bInterfaceNumber 0
+ bAlternateSetting 0
+ bNumEndpoints 2
+ bInterfaceClass 8 Mass Storage
+ bInterfaceSubClass 6 SCSI
+ bInterfaceProtocol 80 Bulk-Only
+ iInterface 7 USB_MSC
+ Endpoint Descriptor:
+ bLength 7
+ bDescriptorType 5
+ bEndpointAddress 0x82 EP 2 IN
+ bmAttributes 2
+ Transfer Type Bulk
+ Synch Type None
+ Usage Type Data
+ wMaxPacketSize 0x0040 1x 64 bytes
+ bInterval 0
+ Endpoint Descriptor:
+ bLength 7
+ bDescriptorType 5
+ bEndpointAddress 0x02 EP 2 OUT
+ bmAttributes 2
+ Transfer Type Bulk
+ Synch Type None
+ Usage Type Data
+ wMaxPacketSize 0x0040 1x 64 bytes
+ bInterval 0
+ Interface Descriptor:
+ bLength 9
+ bDescriptorType 4
+ bInterfaceNumber 3
+ bAlternateSetting 0
+ bNumEndpoints 2
+ bInterfaceClass 3 Human Interface Device
+ bInterfaceSubClass 0
+ bInterfaceProtocol 0
+ iInterface 6 CMSIS-DAP
+ HID Device Descriptor:
+ bLength 9
+ bDescriptorType 33
+ bcdHID 1.00
+ bCountryCode 0 Not supported
+ bNumDescriptors 1
+ bDescriptorType 34 Report
+ wDescriptorLength 33
+ Report Descriptors:
+ ** UNAVAILABLE **
+ Endpoint Descriptor:
+ bLength 7
+ bDescriptorType 5
+ bEndpointAddress 0x81 EP 1 IN
+ bmAttributes 3
+ Transfer Type Interrupt
+ Synch Type None
+ Usage Type Data
+ wMaxPacketSize 0x0040 1x 64 bytes
+ bInterval 1
+ Endpoint Descriptor:
+ bLength 7
+ bDescriptorType 5
+ bEndpointAddress 0x01 EP 1 OUT
+ bmAttributes 3
+ Transfer Type Interrupt
+ Synch Type None
+ Usage Type Data
+ wMaxPacketSize 0x0040 1x 64 bytes
+ bInterval 1
+ Interface Association:
+ bLength 8
+ bDescriptorType 11
+ bFirstInterface 1
+ bInterfaceCount 2
+ bFunctionClass 2 Communications
+ bFunctionSubClass 2 Abstract (modem)
+ bFunctionProtocol 1 AT-commands (v.25ter)
+ iFunction 4 mbed Serial Port
+ Interface Descriptor:
+ bLength 9
+ bDescriptorType 4
+ bInterfaceNumber 1
+ bAlternateSetting 0
+ bNumEndpoints 1
+ bInterfaceClass 2 Communications
+ bInterfaceSubClass 2 Abstract (modem)
+ bInterfaceProtocol 1 AT-commands (v.25ter)
+ iInterface 4 mbed Serial Port
+ CDC Header:
+ bcdCDC 1.10
+ CDC Call Management:
+ bmCapabilities 0x03
+ call management
+ use DataInterface
+ bDataInterface 2
+ CDC ACM:
+ bmCapabilities 0x06
+ sends break
+ line coding and serial state
+ CDC Union:
+ bMasterInterface 1
+ bSlaveInterface 2
+ Endpoint Descriptor:
+ bLength 7
+ bDescriptorType 5
+ bEndpointAddress 0x83 EP 3 IN
+ bmAttributes 3
+ Transfer Type Interrupt
+ Synch Type None
+ Usage Type Data
+ wMaxPacketSize 0x0010 1x 16 bytes
+ bInterval 32
+ Interface Descriptor:
+ bLength 9
+ bDescriptorType 4
+ bInterfaceNumber 2
+ bAlternateSetting 0
+ bNumEndpoints 2
+ bInterfaceClass 10 CDC Data
+ bInterfaceSubClass 0
+ bInterfaceProtocol 0
+ iInterface 5 mbed Serial Port
+ Endpoint Descriptor:
+ bLength 7
+ bDescriptorType 5
+ bEndpointAddress 0x04 EP 4 OUT
+ bmAttributes 2
+ Transfer Type Bulk
+ Synch Type None
+ Usage Type Data
+ wMaxPacketSize 0x0040 1x 64 bytes
+ bInterval 0
+ Endpoint Descriptor:
+ bLength 7
+ bDescriptorType 5
+ bEndpointAddress 0x84 EP 4 IN
+ bmAttributes 2
+ Transfer Type Bulk
+ Synch Type None
+ Usage Type Data
+ wMaxPacketSize 0x0040 1x 64 bytes
+ bInterval 0
+Device Status: 0x0000
+ (Bus Powered)
diff --git a/doc/usb_adapters/cmsis_dap/c251_2722_keil_ulink2.txt b/doc/usb_adapters/cmsis_dap/c251_2722_keil_ulink2.txt
new file mode 100644
index 000000000..520f7c553
--- /dev/null
+++ b/doc/usb_adapters/cmsis_dap/c251_2722_keil_ulink2.txt
@@ -0,0 +1,72 @@
+# SPDX-License-Identifier: GPL-2.0-or-later OR GFDL-1.2-no-invariants-or-later
+
+# Standalone adapter
+
+Bus 001 Device 010: ID c251:2722 Keil Software, Inc. Keil ULINK2 CMSIS-DAP
+Device Descriptor:
+ bLength 18
+ bDescriptorType 1
+ bcdUSB 2.00
+ bDeviceClass 0
+ bDeviceSubClass 0
+ bDeviceProtocol 0
+ bMaxPacketSize0 64
+ idVendor 0xc251 Keil Software, Inc.
+ idProduct 0x2722
+ bcdDevice 1.00
+ iManufacturer 1 Keil Software
+ iProduct 2 Keil ULINK2 CMSIS-DAP
+ iSerial 3 V0022U9E
+ bNumConfigurations 1
+ Configuration Descriptor:
+ bLength 9
+ bDescriptorType 2
+ wTotalLength 0x0029
+ bNumInterfaces 1
+ bConfigurationValue 1
+ iConfiguration 0
+ bmAttributes 0x80
+ (Bus Powered)
+ MaxPower 100mA
+ Interface Descriptor:
+ bLength 9
+ bDescriptorType 4
+ bInterfaceNumber 0
+ bAlternateSetting 0
+ bNumEndpoints 2
+ bInterfaceClass 3 Human Interface Device
+ bInterfaceSubClass 0
+ bInterfaceProtocol 0
+ iInterface 4 CMSIS-DAP
+ HID Device Descriptor:
+ bLength 9
+ bDescriptorType 33
+ bcdHID 1.00
+ bCountryCode 0 Not supported
+ bNumDescriptors 1
+ bDescriptorType 34 Report
+ wDescriptorLength 33
+ Report Descriptors:
+ ** UNAVAILABLE **
+ Endpoint Descriptor:
+ bLength 7
+ bDescriptorType 5
+ bEndpointAddress 0x81 EP 1 IN
+ bmAttributes 3
+ Transfer Type Interrupt
+ Synch Type None
+ Usage Type Data
+ wMaxPacketSize 0x0040 1x 64 bytes
+ bInterval 1
+ Endpoint Descriptor:
+ bLength 7
+ bDescriptorType 5
+ bEndpointAddress 0x01 EP 1 OUT
+ bmAttributes 3
+ Transfer Type Interrupt
+ Synch Type None
+ Usage Type Data
+ wMaxPacketSize 0x0040 1x 64 bytes
+ bInterval 1
+Device Status: 0x0000
+ (Bus Powered)
diff --git a/doc/usb_adapters/ft232r/0403_6001_ft232r.txt b/doc/usb_adapters/ft232r/0403_6001_ft232r.txt
new file mode 100644
index 000000000..8bfb058fd
--- /dev/null
+++ b/doc/usb_adapters/ft232r/0403_6001_ft232r.txt
@@ -0,0 +1,64 @@
+# SPDX-License-Identifier: GPL-2.0-or-later OR GFDL-1.2-no-invariants-or-later
+
+# Board: FT232RL
+# Chip: FT232RL
+
+Bus 001 Device 005: ID 0403:6001 Future Technology Devices International, Ltd FT232 Serial (UART) IC
+Device Descriptor:
+ bLength 18
+ bDescriptorType 1
+ bcdUSB 2.00
+ bDeviceClass 0
+ bDeviceSubClass 0
+ bDeviceProtocol 0
+ bMaxPacketSize0 8
+ idVendor 0x0403 Future Technology Devices International, Ltd
+ idProduct 0x6001 FT232 Serial (UART) IC
+ bcdDevice 6.00
+ iManufacturer 1 FTDI
+ iProduct 2 FT232R USB UART
+ iSerial 3 A50285BI
+ bNumConfigurations 1
+ Configuration Descriptor:
+ bLength 9
+ bDescriptorType 2
+ wTotalLength 0x0020
+ bNumInterfaces 1
+ bConfigurationValue 1
+ iConfiguration 0
+ bmAttributes 0xa0
+ (Bus Powered)
+ Remote Wakeup
+ MaxPower 90mA
+ Interface Descriptor:
+ bLength 9
+ bDescriptorType 4
+ bInterfaceNumber 0
+ bAlternateSetting 0
+ bNumEndpoints 2
+ bInterfaceClass 255 Vendor Specific Class
+ bInterfaceSubClass 255 Vendor Specific Subclass
+ bInterfaceProtocol 255 Vendor Specific Protocol
+ iInterface 2 FT232R USB UART
+ Endpoint Descriptor:
+ bLength 7
+ bDescriptorType 5
+ bEndpointAddress 0x81 EP 1 IN
+ bmAttributes 2
+ Transfer Type Bulk
+ Synch Type None
+ Usage Type Data
+ wMaxPacketSize 0x0040 1x 64 bytes
+ bInterval 0
+ Endpoint Descriptor:
+ bLength 7
+ bDescriptorType 5
+ bEndpointAddress 0x02 EP 2 OUT
+ bmAttributes 2
+ Transfer Type Bulk
+ Synch Type None
+ Usage Type Data
+ wMaxPacketSize 0x0040 1x 64 bytes
+ bInterval 0
+Device Status: 0x0000
+ (Bus Powered)
diff --git a/doc/usb_adapters/ftdi/0403_6010_ft2232h.txt b/doc/usb_adapters/ftdi/0403_6010_ft2232h.txt
new file mode 100644
index 000000000..8bb33e6e5
--- /dev/null
+++ b/doc/usb_adapters/ftdi/0403_6010_ft2232h.txt
@@ -0,0 +1,103 @@
+# SPDX-License-Identifier: GPL-2.0-or-later OR GFDL-1.2-no-invariants-or-later
+
+# Board: Steppenprobe
+# Link: https://github.com/diegoherranz/steppenprobe
+# Chip: FT2232HL
+
+Bus 001 Device 012: ID 0403:6010 Future Technology Devices International, Ltd FT2232C/D/H Dual UART/FIFO IC
+Device Descriptor:
+ bLength 18
+ bDescriptorType 1
+ bcdUSB 2.00
+ bDeviceClass 0
+ bDeviceSubClass 0
+ bDeviceProtocol 0
+ bMaxPacketSize0 64
+ idVendor 0x0403 Future Technology Devices International, Ltd
+ idProduct 0x6010 FT2232C/D/H Dual UART/FIFO IC
+ bcdDevice 7.00
+ iManufacturer 1 FTDI
+ iProduct 2 Dual RS232-HS
+ iSerial 0
+ bNumConfigurations 1
+ Configuration Descriptor:
+ bLength 9
+ bDescriptorType 2
+ wTotalLength 0x0037
+ bNumInterfaces 2
+ bConfigurationValue 1
+ iConfiguration 0
+ bmAttributes 0x80
+ (Bus Powered)
+ MaxPower 500mA
+ Interface Descriptor:
+ bLength 9
+ bDescriptorType 4
+ bInterfaceNumber 0
+ bAlternateSetting 0
+ bNumEndpoints 2
+ bInterfaceClass 255 Vendor Specific Class
+ bInterfaceSubClass 255 Vendor Specific Subclass
+ bInterfaceProtocol 255 Vendor Specific Protocol
+ iInterface 2 Dual RS232-HS
+ Endpoint Descriptor:
+ bLength 7
+ bDescriptorType 5
+ bEndpointAddress 0x81 EP 1 IN
+ bmAttributes 2
+ Transfer Type Bulk
+ Synch Type None
+ Usage Type Data
+ wMaxPacketSize 0x0200 1x 512 bytes
+ bInterval 0
+ Endpoint Descriptor:
+ bLength 7
+ bDescriptorType 5
+ bEndpointAddress 0x02 EP 2 OUT
+ bmAttributes 2
+ Transfer Type Bulk
+ Synch Type None
+ Usage Type Data
+ wMaxPacketSize 0x0200 1x 512 bytes
+ bInterval 0
+ Interface Descriptor:
+ bLength 9
+ bDescriptorType 4
+ bInterfaceNumber 1
+ bAlternateSetting 0
+ bNumEndpoints 2
+ bInterfaceClass 255 Vendor Specific Class
+ bInterfaceSubClass 255 Vendor Specific Subclass
+ bInterfaceProtocol 255 Vendor Specific Protocol
+ iInterface 2 Dual RS232-HS
+ Endpoint Descriptor:
+ bLength 7
+ bDescriptorType 5
+ bEndpointAddress 0x83 EP 3 IN
+ bmAttributes 2
+ Transfer Type Bulk
+ Synch Type None
+ Usage Type Data
+ wMaxPacketSize 0x0200 1x 512 bytes
+ bInterval 0
+ Endpoint Descriptor:
+ bLength 7
+ bDescriptorType 5
+ bEndpointAddress 0x04 EP 4 OUT
+ bmAttributes 2
+ Transfer Type Bulk
+ Synch Type None
+ Usage Type Data
+ wMaxPacketSize 0x0200 1x 512 bytes
+ bInterval 0
+Device Qualifier (for other device speed):
+ bLength 10
+ bDescriptorType 6
+ bcdUSB 2.00
+ bDeviceClass 0
+ bDeviceSubClass 0
+ bDeviceProtocol 0
+ bMaxPacketSize0 64
+ bNumConfigurations 1
+Device Status: 0x0000
+ (Bus Powered)
diff --git a/doc/usb_adapters/ftdi/0403_cff8_amontec_jtagkey2.txt b/doc/usb_adapters/ftdi/0403_cff8_amontec_jtagkey2.txt
new file mode 100644
index 000000000..f056502ad
--- /dev/null
+++ b/doc/usb_adapters/ftdi/0403_cff8_amontec_jtagkey2.txt
@@ -0,0 +1,104 @@
+# SPDX-License-Identifier: GPL-2.0-or-later OR GFDL-1.2-no-invariants-or-later
+
+# Link: http://www.amontec.com
+# Casing: Hi-Speed JTAGkey-2 (c) 2009, Amontec
+# PCB: Amontec JTAGkey2 v5.3
+# Chip: FT2232HQ
+
+Bus 001 Device 017: ID 0403:cff8 Future Technology Devices International, Ltd Amontec JTAGkey
+Device Descriptor:
+ bLength 18
+ bDescriptorType 1
+ bcdUSB 2.00
+ bDeviceClass 0
+ bDeviceSubClass 0
+ bDeviceProtocol 0
+ bMaxPacketSize0 64
+ idVendor 0x0403 Future Technology Devices International, Ltd
+ idProduct 0xcff8 Amontec JTAGkey
+ bcdDevice 7.00
+ iManufacturer 1 Amontec
+ iProduct 2 Amontec JTAGkey-2
+ iSerial 3 53U2ML49
+ bNumConfigurations 1
+ Configuration Descriptor:
+ bLength 9
+ bDescriptorType 2
+ wTotalLength 0x0037
+ bNumInterfaces 2
+ bConfigurationValue 1
+ iConfiguration 0
+ bmAttributes 0x80
+ (Bus Powered)
+ MaxPower 100mA
+ Interface Descriptor:
+ bLength 9
+ bDescriptorType 4
+ bInterfaceNumber 0
+ bAlternateSetting 0
+ bNumEndpoints 2
+ bInterfaceClass 255 Vendor Specific Class
+ bInterfaceSubClass 255 Vendor Specific Subclass
+ bInterfaceProtocol 255 Vendor Specific Protocol
+ iInterface 2 Amontec JTAGkey-2
+ Endpoint Descriptor:
+ bLength 7
+ bDescriptorType 5
+ bEndpointAddress 0x81 EP 1 IN
+ bmAttributes 2
+ Transfer Type Bulk
+ Synch Type None
+ Usage Type Data
+ wMaxPacketSize 0x0200 1x 512 bytes
+ bInterval 0
+ Endpoint Descriptor:
+ bLength 7
+ bDescriptorType 5
+ bEndpointAddress 0x02 EP 2 OUT
+ bmAttributes 2
+ Transfer Type Bulk
+ Synch Type None
+ Usage Type Data
+ wMaxPacketSize 0x0200 1x 512 bytes
+ bInterval 0
+ Interface Descriptor:
+ bLength 9
+ bDescriptorType 4
+ bInterfaceNumber 1
+ bAlternateSetting 0
+ bNumEndpoints 2
+ bInterfaceClass 255 Vendor Specific Class
+ bInterfaceSubClass 255 Vendor Specific Subclass
+ bInterfaceProtocol 255 Vendor Specific Protocol
+ iInterface 2 Amontec JTAGkey-2
+ Endpoint Descriptor:
+ bLength 7
+ bDescriptorType 5
+ bEndpointAddress 0x83 EP 3 IN
+ bmAttributes 2
+ Transfer Type Bulk
+ Synch Type None
+ Usage Type Data
+ wMaxPacketSize 0x0200 1x 512 bytes
+ bInterval 0
+ Endpoint Descriptor:
+ bLength 7
+ bDescriptorType 5
+ bEndpointAddress 0x04 EP 4 OUT
+ bmAttributes 2
+ Transfer Type Bulk
+ Synch Type None
+ Usage Type Data
+ wMaxPacketSize 0x0200 1x 512 bytes
+ bInterval 0
+Device Qualifier (for other device speed):
+ bLength 10
+ bDescriptorType 6
+ bcdUSB 2.00
+ bDeviceClass 0
+ bDeviceSubClass 0
+ bDeviceProtocol 0
+ bMaxPacketSize0 64
+ bNumConfigurations 1
+Device Status: 0x0000
+ (Bus Powered)
diff --git a/doc/usb_adapters/ftdi/09fb_6001_altera_blaster.txt b/doc/usb_adapters/ftdi/09fb_6001_altera_blaster.txt
new file mode 100644
index 000000000..25f43a416
--- /dev/null
+++ b/doc/usb_adapters/ftdi/09fb_6001_altera_blaster.txt
@@ -0,0 +1,64 @@
+# SPDX-License-Identifier: GPL-2.0-or-later OR GFDL-1.2-no-invariants-or-later
+
+# Clone www.terasic.com "USB Blaster"
+# PCB reports: "USB Blaster-B", "FOR ALTERA ONLY"
+# Chip: FT245BL
+
+Bus 001 Device 005: ID 09fb:6001 Altera Blaster
+Device Descriptor:
+ bLength 18
+ bDescriptorType 1
+ bcdUSB 1.10
+ bDeviceClass 0
+ bDeviceSubClass 0
+ bDeviceProtocol 0
+ bMaxPacketSize0 8
+ idVendor 0x09fb Altera
+ idProduct 0x6001 Blaster
+ bcdDevice 4.00
+ iManufacturer 1 Altera
+ iProduct 2 USB-Blaster
+ iSerial 3 91f28492
+ bNumConfigurations 1
+ Configuration Descriptor:
+ bLength 9
+ bDescriptorType 2
+ wTotalLength 0x0020
+ bNumInterfaces 1
+ bConfigurationValue 1
+ iConfiguration 0
+ bmAttributes 0x80
+ (Bus Powered)
+ MaxPower 150mA
+ Interface Descriptor:
+ bLength 9
+ bDescriptorType 4
+ bInterfaceNumber 0
+ bAlternateSetting 0
+ bNumEndpoints 2
+ bInterfaceClass 255 Vendor Specific Class
+ bInterfaceSubClass 255 Vendor Specific Subclass
+ bInterfaceProtocol 255 Vendor Specific Protocol
+ iInterface 2 USB-Blaster
+ Endpoint Descriptor:
+ bLength 7
+ bDescriptorType 5
+ bEndpointAddress 0x81 EP 1 IN
+ bmAttributes 2
+ Transfer Type Bulk
+ Synch Type None
+ Usage Type Data
+ wMaxPacketSize 0x0040 1x 64 bytes
+ bInterval 0
+ Endpoint Descriptor:
+ bLength 7
+ bDescriptorType 5
+ bEndpointAddress 0x02 EP 2 OUT
+ bmAttributes 2
+ Transfer Type Bulk
+ Synch Type None
+ Usage Type Data
+ wMaxPacketSize 0x0040 1x 64 bytes
+ bInterval 0
+Device Status: 0x0000
+ (Bus Powered)
diff --git a/doc/usb_adapters/icdi/1cbe_00fd_ti_icdi.txt b/doc/usb_adapters/icdi/1cbe_00fd_ti_icdi.txt
new file mode 100644
index 000000000..14fc86fd6
--- /dev/null
+++ b/doc/usb_adapters/icdi/1cbe_00fd_ti_icdi.txt
@@ -0,0 +1,156 @@
+# SPDX-License-Identifier: GPL-2.0-or-later OR GFDL-1.2-no-invariants-or-later
+
+# Board: TI Tiva C Series TM4C1294 Connected LaunchPad
+# ICDI firmware update to add OpenOCD support
+
+Bus 001 Device 016: ID 1cbe:00fd Luminary Micro Inc. In-Circuit Debug Interface
+Device Descriptor:
+ bLength 18
+ bDescriptorType 1
+ bcdUSB 1.10
+ bDeviceClass 239 Miscellaneous Device
+ bDeviceSubClass 2
+ bDeviceProtocol 1 Interface Association
+ bMaxPacketSize0 64
+ idVendor 0x1cbe Luminary Micro Inc.
+ idProduct 0x00fd In-Circuit Debug Interface
+ bcdDevice 1.00
+ iManufacturer 1 Texas Instruments
+ iProduct 2 In-Circuit Debug Interface
+ iSerial 3 0F00CAC2
+ bNumConfigurations 1
+ Configuration Descriptor:
+ bLength 9
+ bDescriptorType 2
+ wTotalLength 0x0074
+ bNumInterfaces 4
+ bConfigurationValue 1
+ iConfiguration 0
+ bmAttributes 0x80
+ (Bus Powered)
+ MaxPower 250mA
+ Interface Association:
+ bLength 8
+ bDescriptorType 11
+ bFirstInterface 0
+ bInterfaceCount 2
+ bFunctionClass 2 Communications
+ bFunctionSubClass 2 Abstract (modem)
+ bFunctionProtocol 1 AT-commands (v.25ter)
+ iFunction 0
+ Interface Descriptor:
+ bLength 9
+ bDescriptorType 4
+ bInterfaceNumber 0
+ bAlternateSetting 0
+ bNumEndpoints 1
+ bInterfaceClass 2 Communications
+ bInterfaceSubClass 2 Abstract (modem)
+ bInterfaceProtocol 1 AT-commands (v.25ter)
+ iInterface 0
+ CDC Header:
+ bcdCDC 1.10
+ CDC ACM:
+ bmCapabilities 0x06
+ sends break
+ line coding and serial state
+ CDC Union:
+ bMasterInterface 0
+ bSlaveInterface 1
+ CDC Call Management:
+ bmCapabilities 0x01
+ call management
+ bDataInterface 1
+ Endpoint Descriptor:
+ bLength 7
+ bDescriptorType 5
+ bEndpointAddress 0x81 EP 1 IN
+ bmAttributes 3
+ Transfer Type Interrupt
+ Synch Type None
+ Usage Type Data
+ wMaxPacketSize 0x0010 1x 16 bytes
+ bInterval 1
+ Interface Descriptor:
+ bLength 9
+ bDescriptorType 4
+ bInterfaceNumber 1
+ bAlternateSetting 0
+ bNumEndpoints 2
+ bInterfaceClass 10 CDC Data
+ bInterfaceSubClass 0
+ bInterfaceProtocol 0
+ iInterface 0
+ Endpoint Descriptor:
+ bLength 7
+ bDescriptorType 5
+ bEndpointAddress 0x82 EP 2 IN
+ bmAttributes 2
+ Transfer Type Bulk
+ Synch Type None
+ Usage Type Data
+ wMaxPacketSize 0x0040 1x 64 bytes
+ bInterval 0
+ Endpoint Descriptor:
+ bLength 7
+ bDescriptorType 5
+ bEndpointAddress 0x01 EP 1 OUT
+ bmAttributes 2
+ Transfer Type Bulk
+ Synch Type None
+ Usage Type Data
+ wMaxPacketSize 0x0040 1x 64 bytes
+ bInterval 0
+ Interface Descriptor:
+ bLength 9
+ bDescriptorType 4
+ bInterfaceNumber 2
+ bAlternateSetting 0
+ bNumEndpoints 2
+ bInterfaceClass 255 Vendor Specific Class
+ bInterfaceSubClass 0
+ bInterfaceProtocol 0
+ iInterface 0
+ Endpoint Descriptor:
+ bLength 7
+ bDescriptorType 5
+ bEndpointAddress 0x83 EP 3 IN
+ bmAttributes 2
+ Transfer Type Bulk
+ Synch Type None
+ Usage Type Data
+ wMaxPacketSize 0x0040 1x 64 bytes
+ bInterval 0
+ Endpoint Descriptor:
+ bLength 7
+ bDescriptorType 5
+ bEndpointAddress 0x02 EP 2 OUT
+ bmAttributes 2
+ Transfer Type Bulk
+ Synch Type None
+ Usage Type Data
+ wMaxPacketSize 0x0040 1x 64 bytes
+ bInterval 0
+ Interface Descriptor:
+ bLength 9
+ bDescriptorType 4
+ bInterfaceNumber 3
+ bAlternateSetting 0
+ bNumEndpoints 0
+ bInterfaceClass 254 Application Specific Interface
+ bInterfaceSubClass 1 Device Firmware Update
+ bInterfaceProtocol 1
+ iInterface 0
+ Device Firmware Upgrade Interface Descriptor:
+ bLength 9
+ bDescriptorType 33
+ bmAttributes 15
+ Will Detach
+ Manifestation Tolerant
+ Upload Supported
+ Download Supported
+ wDetachTimeout 65535 milliseconds
+ wTransferSize 1024 bytes
+ bcdDFUVersion 1.10
+Device Status: 0x0000
+ (Bus Powered)
diff --git a/doc/usb_adapters/jlink/1366_0101_segger_jlink_plus_10_1.txt b/doc/usb_adapters/jlink/1366_0101_segger_jlink_plus_10_1.txt
new file mode 100644
index 000000000..fd31e9c78
--- /dev/null
+++ b/doc/usb_adapters/jlink/1366_0101_segger_jlink_plus_10_1.txt
@@ -0,0 +1,71 @@
+# SPDX-License-Identifier: GPL-2.0-or-later OR GFDL-1.2-no-invariants-or-later
+
+# Standalone adapter, original Segger, HW version 10.1
+
+Bus 001 Device 005: ID 1366:0101 SEGGER J-Link PLUS
+Device Descriptor:
+ bLength 18
+ bDescriptorType 1
+ bcdUSB 2.00
+ bDeviceClass 0
+ bDeviceSubClass 0
+ bDeviceProtocol 0
+ bMaxPacketSize0 64
+ idVendor 0x1366 SEGGER
+ idProduct 0x0101 J-Link PLUS
+ bcdDevice 1.00
+ iManufacturer 1 SEGGER
+ iProduct 2 J-Link
+ iSerial 3 123456
+ bNumConfigurations 1
+ Configuration Descriptor:
+ bLength 9
+ bDescriptorType 2
+ wTotalLength 0x0020
+ bNumInterfaces 1
+ bConfigurationValue 1
+ iConfiguration 4 Configuration
+ bmAttributes 0x80
+ (Bus Powered)
+ MaxPower 100mA
+ Interface Descriptor:
+ bLength 9
+ bDescriptorType 4
+ bInterfaceNumber 0
+ bAlternateSetting 0
+ bNumEndpoints 2
+ bInterfaceClass 255 Vendor Specific Class
+ bInterfaceSubClass 255 Vendor Specific Subclass
+ bInterfaceProtocol 255 Vendor Specific Protocol
+ iInterface 5 BULK interface
+ Endpoint Descriptor:
+ bLength 7
+ bDescriptorType 5
+ bEndpointAddress 0x81 EP 1 IN
+ bmAttributes 2
+ Transfer Type Bulk
+ Synch Type None
+ Usage Type Data
+ wMaxPacketSize 0x0200 1x 512 bytes
+ bInterval 1
+ Endpoint Descriptor:
+ bLength 7
+ bDescriptorType 5
+ bEndpointAddress 0x01 EP 1 OUT
+ bmAttributes 2
+ Transfer Type Bulk
+ Synch Type None
+ Usage Type Data
+ wMaxPacketSize 0x0200 1x 512 bytes
+ bInterval 1
+Device Qualifier (for other device speed):
+ bLength 10
+ bDescriptorType 6
+ bcdUSB 2.00
+ bDeviceClass 0
+ bDeviceSubClass 0
+ bDeviceProtocol 0
+ bMaxPacketSize0 64
+ bNumConfigurations 1
+Device Status: 0x0000
+ (Bus Powered)
diff --git a/doc/usb_adapters/nulink/0416_511d_nuvoton_nulink.txt b/doc/usb_adapters/nulink/0416_511d_nuvoton_nulink.txt
new file mode 100644
index 000000000..fb4392351
--- /dev/null
+++ b/doc/usb_adapters/nulink/0416_511d_nuvoton_nulink.txt
@@ -0,0 +1,142 @@
+# SPDX-License-Identifier: GPL-2.0-or-later OR GFDL-1.2-no-invariants-or-later
+
+# Board: nuvoTon NuMaker-PFM-M2351
+# Adapter: ICE V3.0
+
+Bus 001 Device 013: ID 0416:511d Winbond Electronics Corp. Nuvoton Nu-Link1 ICE/VCOM
+Device Descriptor:
+ bLength 18
+ bDescriptorType 1
+ bcdUSB 1.10
+ bDeviceClass 239 Miscellaneous Device
+ bDeviceSubClass 2
+ bDeviceProtocol 1 Interface Association
+ bMaxPacketSize0 64
+ idVendor 0x0416 Winbond Electronics Corp.
+ idProduct 0x511d Nuvoton Nu-Link1 ICE/VCOM
+ bcdDevice 1.00
+ iManufacturer 1 Nuvoton
+ iProduct 2 Nu-Link
+ iSerial 0
+ bNumConfigurations 1
+ Configuration Descriptor:
+ bLength 9
+ bDescriptorType 2
+ wTotalLength 0x006b
+ bNumInterfaces 3
+ bConfigurationValue 1
+ iConfiguration 0
+ bmAttributes 0x80
+ (Bus Powered)
+ MaxPower 100mA
+ Interface Descriptor:
+ bLength 9
+ bDescriptorType 4
+ bInterfaceNumber 0
+ bAlternateSetting 0
+ bNumEndpoints 2
+ bInterfaceClass 3 Human Interface Device
+ bInterfaceSubClass 0
+ bInterfaceProtocol 0
+ iInterface 0
+ HID Device Descriptor:
+ bLength 9
+ bDescriptorType 33
+ bcdHID 1.10
+ bCountryCode 0 Not supported
+ bNumDescriptors 1
+ bDescriptorType 34 Report
+ wDescriptorLength 28
+ Report Descriptors:
+ ** UNAVAILABLE **
+ Endpoint Descriptor:
+ bLength 7
+ bDescriptorType 5
+ bEndpointAddress 0x81 EP 1 IN
+ bmAttributes 3
+ Transfer Type Interrupt
+ Synch Type None
+ Usage Type Data
+ wMaxPacketSize 0x0040 1x 64 bytes
+ bInterval 1
+ Endpoint Descriptor:
+ bLength 7
+ bDescriptorType 5
+ bEndpointAddress 0x02 EP 2 OUT
+ bmAttributes 3
+ Transfer Type Interrupt
+ Synch Type None
+ Usage Type Data
+ wMaxPacketSize 0x0040 1x 64 bytes
+ bInterval 1
+ Interface Association:
+ bLength 8
+ bDescriptorType 11
+ bFirstInterface 1
+ bInterfaceCount 2
+ bFunctionClass 2 Communications
+ bFunctionSubClass 2 Abstract (modem)
+ bFunctionProtocol 1 AT-commands (v.25ter)
+ iFunction 2 Nu-Link
+ Interface Descriptor:
+ bLength 9
+ bDescriptorType 4
+ bInterfaceNumber 1
+ bAlternateSetting 0
+ bNumEndpoints 1
+ bInterfaceClass 2 Communications
+ bInterfaceSubClass 2 Abstract (modem)
+ bInterfaceProtocol 1 AT-commands (v.25ter)
+ iInterface 0
+ CDC Header:
+ bcdCDC 1.10
+ CDC Call Management:
+ bmCapabilities 0x00
+ bDataInterface 1
+ CDC ACM:
+ bmCapabilities 0x00
+ CDC Union:
+ bMasterInterface 1
+ bSlaveInterface 2
+ Endpoint Descriptor:
+ bLength 7
+ bDescriptorType 5
+ bEndpointAddress 0x85 EP 5 IN
+ bmAttributes 3
+ Transfer Type Interrupt
+ Synch Type None
+ Usage Type Data
+ wMaxPacketSize 0x0008 1x 8 bytes
+ bInterval 255
+ Interface Descriptor:
+ bLength 9
+ bDescriptorType 4
+ bInterfaceNumber 2
+ bAlternateSetting 0
+ bNumEndpoints 2
+ bInterfaceClass 10 CDC Data
+ bInterfaceSubClass 0
+ bInterfaceProtocol 0
+ iInterface 0
+ Endpoint Descriptor:
+ bLength 7
+ bDescriptorType 5
+ bEndpointAddress 0x83 EP 3 IN
+ bmAttributes 2
+ Transfer Type Bulk
+ Synch Type None
+ Usage Type Data
+ wMaxPacketSize 0x0040 1x 64 bytes
+ bInterval 0
+ Endpoint Descriptor:
+ bLength 7
+ bDescriptorType 5
+ bEndpointAddress 0x04 EP 4 OUT
+ bmAttributes 2
+ Transfer Type Bulk
+ Synch Type None
+ Usage Type Data
+ wMaxPacketSize 0x0040 1x 64 bytes
+ bInterval 0
+Device Status: 0x0000
+ (Bus Powered)
diff --git a/doc/usb_adapters/nulink/0416_5200_nuvoton_nulink.txt b/doc/usb_adapters/nulink/0416_5200_nuvoton_nulink.txt
new file mode 100644
index 000000000..1d8661f18
--- /dev/null
+++ b/doc/usb_adapters/nulink/0416_5200_nuvoton_nulink.txt
@@ -0,0 +1,211 @@
+# SPDX-License-Identifier: GPL-2.0-or-later OR GFDL-1.2-no-invariants-or-later
+
+# Board: nuvoTon NuMaker-M483KG V1.1
+# Adapter: Nu-Link2-Me V1.0
+
+Bus 001 Device 014: ID 0416:5200 Winbond Electronics Corp. Nuvoton Nu-Link2-ME ICE/MSC/VCOM
+Device Descriptor:
+ bLength 18
+ bDescriptorType 1
+ bcdUSB 2.00
+ bDeviceClass 239 Miscellaneous Device
+ bDeviceSubClass 2
+ bDeviceProtocol 1 Interface Association
+ bMaxPacketSize0 64
+ idVendor 0x0416 Winbond Electronics Corp.
+ idProduct 0x5200 Nuvoton Nu-Link2-ME ICE/MSC/VCOM
+ bcdDevice 0.00
+ iManufacturer 1 Nuvoton
+ iProduct 2 Nu-Link2 Bulk
+ iSerial 6 13010000AAAAAAAAAAAAAAAAAAAAAAAA
+ bNumConfigurations 1
+ Configuration Descriptor:
+ bLength 9
+ bDescriptorType 2
+ wTotalLength 0x0099
+ bNumInterfaces 5
+ bConfigurationValue 1
+ iConfiguration 0
+ bmAttributes 0x80
+ (Bus Powered)
+ MaxPower 100mA
+ Interface Descriptor:
+ bLength 9
+ bDescriptorType 4
+ bInterfaceNumber 0
+ bAlternateSetting 0
+ bNumEndpoints 2
+ bInterfaceClass 255 Vendor Specific Class
+ bInterfaceSubClass 0
+ bInterfaceProtocol 0
+ iInterface 0
+ Endpoint Descriptor:
+ bLength 7
+ bDescriptorType 5
+ bEndpointAddress 0x81 EP 1 IN
+ bmAttributes 2
+ Transfer Type Bulk
+ Synch Type None
+ Usage Type Data
+ wMaxPacketSize 0x0200 1x 512 bytes
+ bInterval 0
+ Endpoint Descriptor:
+ bLength 7
+ bDescriptorType 5
+ bEndpointAddress 0x02 EP 2 OUT
+ bmAttributes 2
+ Transfer Type Bulk
+ Synch Type None
+ Usage Type Data
+ wMaxPacketSize 0x0200 1x 512 bytes
+ bInterval 0
+ Interface Association:
+ bLength 8
+ bDescriptorType 11
+ bFirstInterface 1
+ bInterfaceCount 2
+ bFunctionClass 2 Communications
+ bFunctionSubClass 2 Abstract (modem)
+ bFunctionProtocol 1 AT-commands (v.25ter)
+ iFunction 0
+ Interface Descriptor:
+ bLength 9
+ bDescriptorType 4
+ bInterfaceNumber 1
+ bAlternateSetting 0
+ bNumEndpoints 1
+ bInterfaceClass 2 Communications
+ bInterfaceSubClass 2 Abstract (modem)
+ bInterfaceProtocol 1 AT-commands (v.25ter)
+ iInterface 3 Nu-Link2 VCOM
+ CDC Header:
+ bcdCDC 1.10
+ CDC Call Management:
+ bmCapabilities 0x00
+ bDataInterface 1
+ CDC ACM:
+ bmCapabilities 0x00
+ CDC Union:
+ bMasterInterface 1
+ bSlaveInterface 2
+ Endpoint Descriptor:
+ bLength 7
+ bDescriptorType 5
+ bEndpointAddress 0x85 EP 5 IN
+ bmAttributes 3
+ Transfer Type Interrupt
+ Synch Type None
+ Usage Type Data
+ wMaxPacketSize 0x0040 1x 64 bytes
+ bInterval 1
+ Interface Descriptor:
+ bLength 9
+ bDescriptorType 4
+ bInterfaceNumber 2
+ bAlternateSetting 0
+ bNumEndpoints 2
+ bInterfaceClass 10 CDC Data
+ bInterfaceSubClass 0
+ bInterfaceProtocol 0
+ iInterface 0
+ Endpoint Descriptor:
+ bLength 7
+ bDescriptorType 5
+ bEndpointAddress 0x83 EP 3 IN
+ bmAttributes 2
+ Transfer Type Bulk
+ Synch Type None
+ Usage Type Data
+ wMaxPacketSize 0x0100 1x 256 bytes
+ bInterval 0
+ Endpoint Descriptor:
+ bLength 7
+ bDescriptorType 5
+ bEndpointAddress 0x04 EP 4 OUT
+ bmAttributes 2
+ Transfer Type Bulk
+ Synch Type None
+ Usage Type Data
+ wMaxPacketSize 0x0100 1x 256 bytes
+ bInterval 0
+ Interface Descriptor:
+ bLength 9
+ bDescriptorType 4
+ bInterfaceNumber 3
+ bAlternateSetting 0
+ bNumEndpoints 2
+ bInterfaceClass 3 Human Interface Device
+ bInterfaceSubClass 0
+ bInterfaceProtocol 0
+ iInterface 4 Nu-Link2 HID
+ HID Device Descriptor:
+ bLength 9
+ bDescriptorType 33
+ bcdHID 1.10
+ bCountryCode 0 Not supported
+ bNumDescriptors 1
+ bDescriptorType 34 Report
+ wDescriptorLength 35
+ Report Descriptors:
+ ** UNAVAILABLE **
+ Endpoint Descriptor:
+ bLength 7
+ bDescriptorType 5
+ bEndpointAddress 0x86 EP 6 IN
+ bmAttributes 3
+ Transfer Type Interrupt
+ Synch Type None
+ Usage Type Data
+ wMaxPacketSize 0x0400 1x 1024 bytes
+ bInterval 4
+ Endpoint Descriptor:
+ bLength 7
+ bDescriptorType 5
+ bEndpointAddress 0x07 EP 7 OUT
+ bmAttributes 3
+ Transfer Type Interrupt
+ Synch Type None
+ Usage Type Data
+ wMaxPacketSize 0x0400 1x 1024 bytes
+ bInterval 4
+ Interface Descriptor:
+ bLength 9
+ bDescriptorType 4
+ bInterfaceNumber 4
+ bAlternateSetting 0
+ bNumEndpoints 2
+ bInterfaceClass 8 Mass Storage
+ bInterfaceSubClass 6 SCSI
+ bInterfaceProtocol 80 Bulk-Only
+ iInterface 5 Nu-Link2 MSC
+ Endpoint Descriptor:
+ bLength 7
+ bDescriptorType 5
+ bEndpointAddress 0x88 EP 8 IN
+ bmAttributes 2
+ Transfer Type Bulk
+ Synch Type None
+ Usage Type Data
+ wMaxPacketSize 0x0040 1x 64 bytes
+ bInterval 0
+ Endpoint Descriptor:
+ bLength 7
+ bDescriptorType 5
+ bEndpointAddress 0x09 EP 9 OUT
+ bmAttributes 2
+ Transfer Type Bulk
+ Synch Type None
+ Usage Type Data
+ wMaxPacketSize 0x0040 1x 64 bytes
+ bInterval 0
+Device Qualifier (for other device speed):
+ bLength 10
+ bDescriptorType 6
+ bcdUSB 2.00
+ bDeviceClass 0
+ bDeviceSubClass 0
+ bDeviceProtocol 0
+ bMaxPacketSize0 64
+ bNumConfigurations 1
+Device Status: 0x0000
+ (Bus Powered)
diff --git a/doc/usb_adapters/stlink/0483_3744_stlinkv1.txt b/doc/usb_adapters/stlink/0483_3744_stlinkv1.txt
new file mode 100644
index 000000000..b887f7971
--- /dev/null
+++ b/doc/usb_adapters/stlink/0483_3744_stlinkv1.txt
@@ -0,0 +1,62 @@
+# SPDX-License-Identifier: GPL-2.0-or-later OR GFDL-1.2-no-invariants-or-later
+
+# Standalone adapter
+
+Bus 001 Device 009: ID 0483:3744 STMicroelectronics ST-LINK/V1
+Device Descriptor:
+ bLength 18
+ bDescriptorType 1
+ bcdUSB 2.00
+ bDeviceClass 0
+ bDeviceSubClass 0
+ bDeviceProtocol 0
+ bMaxPacketSize0 64
+ idVendor 0x0483 STMicroelectronics
+ idProduct 0x3744 ST-LINK/V1
+ bcdDevice 1.00
+ iManufacturer 1 STMicroelectronics
+ iProduct 2 STM32 STLink
+ iSerial 3 0000001
+ bNumConfigurations 1
+ Configuration Descriptor:
+ bLength 9
+ bDescriptorType 2
+ wTotalLength 0x0020
+ bNumInterfaces 1
+ bConfigurationValue 1
+ iConfiguration 0
+ bmAttributes 0x80
+ (Bus Powered)
+ MaxPower 100mA
+ Interface Descriptor:
+ bLength 9
+ bDescriptorType 4
+ bInterfaceNumber 0
+ bAlternateSetting 0
+ bNumEndpoints 2
+ bInterfaceClass 8 Mass Storage
+ bInterfaceSubClass 6 SCSI
+ bInterfaceProtocol 80 Bulk-Only
+ iInterface 4 ST Link
+ Endpoint Descriptor:
+ bLength 7
+ bDescriptorType 5
+ bEndpointAddress 0x81 EP 1 IN
+ bmAttributes 2
+ Transfer Type Bulk
+ Synch Type None
+ Usage Type Data
+ wMaxPacketSize 0x0040 1x 64 bytes
+ bInterval 0
+ Endpoint Descriptor:
+ bLength 7
+ bDescriptorType 5
+ bEndpointAddress 0x02 EP 2 OUT
+ bmAttributes 2
+ Transfer Type Bulk
+ Synch Type None
+ Usage Type Data
+ wMaxPacketSize 0x0040 1x 64 bytes
+ bInterval 0
+Device Status: 0x0000
+ (Bus Powered)
diff --git a/doc/usb_adapters/stlink/0483_3748_stlinkv2.txt b/doc/usb_adapters/stlink/0483_3748_stlinkv2.txt
new file mode 100644
index 000000000..ac6dfc7f6
--- /dev/null
+++ b/doc/usb_adapters/stlink/0483_3748_stlinkv2.txt
@@ -0,0 +1,72 @@
+# SPDX-License-Identifier: GPL-2.0-or-later OR GFDL-1.2-no-invariants-or-later
+
+# ST-Link/V2 standalone or ST-Link/V2 in firmware update mode
+
+Bus 001 Device 006: ID 0483:3748 STMicroelectronics ST-LINK/V2
+Device Descriptor:
+ bLength 18
+ bDescriptorType 1
+ bcdUSB 2.00
+ bDeviceClass 0
+ bDeviceSubClass 0
+ bDeviceProtocol 0
+ bMaxPacketSize0 64
+ idVendor 0x0483 STMicroelectronics
+ idProduct 0x3748 ST-LINK/V2
+ bcdDevice 1.00
+ iManufacturer 1 STMicroelectronics
+ iProduct 2 STM32 STLink
+ iSerial 3 0668FF323637414257071827
+ bNumConfigurations 1
+ Configuration Descriptor:
+ bLength 9
+ bDescriptorType 2
+ wTotalLength 0x0027
+ bNumInterfaces 1
+ bConfigurationValue 1
+ iConfiguration 0
+ bmAttributes 0x80
+ (Bus Powered)
+ MaxPower 100mA
+ Interface Descriptor:
+ bLength 9
+ bDescriptorType 4
+ bInterfaceNumber 0
+ bAlternateSetting 0
+ bNumEndpoints 3
+ bInterfaceClass 255 Vendor Specific Class
+ bInterfaceSubClass 255 Vendor Specific Subclass
+ bInterfaceProtocol 255 Vendor Specific Protocol
+ iInterface 4 ST Link
+ Endpoint Descriptor:
+ bLength 7
+ bDescriptorType 5
+ bEndpointAddress 0x81 EP 1 IN
+ bmAttributes 2
+ Transfer Type Bulk
+ Synch Type None
+ Usage Type Data
+ wMaxPacketSize 0x0040 1x 64 bytes
+ bInterval 0
+ Endpoint Descriptor:
+ bLength 7
+ bDescriptorType 5
+ bEndpointAddress 0x02 EP 2 OUT
+ bmAttributes 2
+ Transfer Type Bulk
+ Synch Type None
+ Usage Type Data
+ wMaxPacketSize 0x0040 1x 64 bytes
+ bInterval 0
+ Endpoint Descriptor:
+ bLength 7
+ bDescriptorType 5
+ bEndpointAddress 0x83 EP 3 IN
+ bmAttributes 2
+ Transfer Type Bulk
+ Synch Type None
+ Usage Type Data
+ wMaxPacketSize 0x0040 1x 64 bytes
+ bInterval 0
+Device Status: 0x0000
+ (Bus Powered)
diff --git a/doc/usb_adapters/stlink/0483_374b_stlinkv2.txt b/doc/usb_adapters/stlink/0483_374b_stlinkv2.txt
new file mode 100644
index 000000000..cc0156d74
--- /dev/null
+++ b/doc/usb_adapters/stlink/0483_374b_stlinkv2.txt
@@ -0,0 +1,173 @@
+# SPDX-License-Identifier: GPL-2.0-or-later OR GFDL-1.2-no-invariants-or-later
+
+# Board: ST Nucleo F411
+
+Bus 001 Device 007: ID 0483:374b STMicroelectronics ST-LINK/V2.1
+Device Descriptor:
+ bLength 18
+ bDescriptorType 1
+ bcdUSB 2.00
+ bDeviceClass 239 Miscellaneous Device
+ bDeviceSubClass 2
+ bDeviceProtocol 1 Interface Association
+ bMaxPacketSize0 64
+ idVendor 0x0483 STMicroelectronics
+ idProduct 0x374b ST-LINK/V2.1
+ bcdDevice 1.00
+ iManufacturer 1 STMicroelectronics
+ iProduct 2 STM32 STLink
+ iSerial 3 066EFF373535503457062922
+ bNumConfigurations 1
+ Configuration Descriptor:
+ bLength 9
+ bDescriptorType 2
+ wTotalLength 0x0080
+ bNumInterfaces 4
+ bConfigurationValue 1
+ iConfiguration 0
+ bmAttributes 0x80
+ (Bus Powered)
+ MaxPower 100mA
+ Interface Descriptor:
+ bLength 9
+ bDescriptorType 4
+ bInterfaceNumber 0
+ bAlternateSetting 0
+ bNumEndpoints 3
+ bInterfaceClass 255 Vendor Specific Class
+ bInterfaceSubClass 255 Vendor Specific Subclass
+ bInterfaceProtocol 255 Vendor Specific Protocol
+ iInterface 4 ST-Link Debug
+ Endpoint Descriptor:
+ bLength 7
+ bDescriptorType 5
+ bEndpointAddress 0x81 EP 1 IN
+ bmAttributes 2
+ Transfer Type Bulk
+ Synch Type None
+ Usage Type Data
+ wMaxPacketSize 0x0040 1x 64 bytes
+ bInterval 0
+ Endpoint Descriptor:
+ bLength 7
+ bDescriptorType 5
+ bEndpointAddress 0x01 EP 1 OUT
+ bmAttributes 2
+ Transfer Type Bulk
+ Synch Type None
+ Usage Type Data
+ wMaxPacketSize 0x0040 1x 64 bytes
+ bInterval 0
+ Endpoint Descriptor:
+ bLength 7
+ bDescriptorType 5
+ bEndpointAddress 0x82 EP 2 IN
+ bmAttributes 2
+ Transfer Type Bulk
+ Synch Type None
+ Usage Type Data
+ wMaxPacketSize 0x0020 1x 32 bytes
+ bInterval 0
+ Interface Descriptor:
+ bLength 9
+ bDescriptorType 4
+ bInterfaceNumber 1
+ bAlternateSetting 0
+ bNumEndpoints 2
+ bInterfaceClass 8 Mass Storage
+ bInterfaceSubClass 6 SCSI
+ bInterfaceProtocol 80 Bulk-Only
+ iInterface 5 ST-Link mass storage
+ Endpoint Descriptor:
+ bLength 7
+ bDescriptorType 5
+ bEndpointAddress 0x83 EP 3 IN
+ bmAttributes 2
+ Transfer Type Bulk
+ Synch Type None
+ Usage Type Data
+ wMaxPacketSize 0x0040 1x 64 bytes
+ bInterval 0
+ Endpoint Descriptor:
+ bLength 7
+ bDescriptorType 5
+ bEndpointAddress 0x03 EP 3 OUT
+ bmAttributes 2
+ Transfer Type Bulk
+ Synch Type None
+ Usage Type Data
+ wMaxPacketSize 0x0040 1x 64 bytes
+ bInterval 0
+ Interface Association:
+ bLength 8
+ bDescriptorType 11
+ bFirstInterface 2
+ bInterfaceCount 2
+ bFunctionClass 2 Communications
+ bFunctionSubClass 2 Abstract (modem)
+ bFunctionProtocol 1 AT-commands (v.25ter)
+ iFunction 6 ST-Link VCP Ctrl
+ Interface Descriptor:
+ bLength 9
+ bDescriptorType 4
+ bInterfaceNumber 2
+ bAlternateSetting 0
+ bNumEndpoints 1
+ bInterfaceClass 2 Communications
+ bInterfaceSubClass 2 Abstract (modem)
+ bInterfaceProtocol 1 AT-commands (v.25ter)
+ iInterface 6 ST-Link VCP Ctrl
+ CDC Header:
+ bcdCDC 1.10
+ CDC Call Management:
+ bmCapabilities 0x00
+ bDataInterface 3
+ CDC ACM:
+ bmCapabilities 0x06
+ sends break
+ line coding and serial state
+ CDC Union:
+ bMasterInterface 2
+ bSlaveInterface 3
+ Endpoint Descriptor:
+ bLength 7
+ bDescriptorType 5
+ bEndpointAddress 0x84 EP 4 IN
+ bmAttributes 3
+ Transfer Type Interrupt
+ Synch Type None
+ Usage Type Data
+ wMaxPacketSize 0x0002 1x 2 bytes
+ bInterval 255
+ Interface Descriptor:
+ bLength 9
+ bDescriptorType 4
+ bInterfaceNumber 3
+ bAlternateSetting 0
+ bNumEndpoints 2
+ bInterfaceClass 10 CDC Data
+ bInterfaceSubClass 0
+ bInterfaceProtocol 0
+ iInterface 7 ST-Link VCP Data
+ Endpoint Descriptor:
+ bLength 7
+ bDescriptorType 5
+ bEndpointAddress 0x05 EP 5 OUT
+ bmAttributes 2
+ Transfer Type Bulk
+ Synch Type None
+ Usage Type Data
+ wMaxPacketSize 0x0008 1x 8 bytes
+ bInterval 0
+ Endpoint Descriptor:
+ bLength 7
+ bDescriptorType 5
+ bEndpointAddress 0x85 EP 5 IN
+ bmAttributes 2
+ Transfer Type Bulk
+ Synch Type None
+ Usage Type Data
+ wMaxPacketSize 0x0010 1x 16 bytes
+ bInterval 0
+Device Status: 0x0000
+ (Bus Powered)
diff --git a/doc/usb_adapters/stlink/0483_374d_stlinkv3.txt b/doc/usb_adapters/stlink/0483_374d_stlinkv3.txt
new file mode 100644
index 000000000..e964872c3
--- /dev/null
+++ b/doc/usb_adapters/stlink/0483_374d_stlinkv3.txt
@@ -0,0 +1,71 @@
+# SPDX-License-Identifier: GPL-2.0-or-later OR GFDL-1.2-no-invariants-or-later
+
+# ST-Link/V3 in firmware update mode
+
+Bus 001 Device 009: ID 0483:374d STMicroelectronics STLINK-V3 Loader
+Device Descriptor:
+ bLength 18
+ bDescriptorType 1
+ bcdUSB 2.00
+ bDeviceClass 0
+ bDeviceSubClass 0
+ bDeviceProtocol 0
+ bMaxPacketSize0 64
+ idVendor 0x0483 STMicroelectronics
+ idProduct 0x374d STLINK-V3 Loader
+ bcdDevice 2.00
+ iManufacturer 1 STMicroelectronics
+ iProduct 2 STM32 ST-LINK/V3
+ iSerial 3 003500463137510239383538
+ bNumConfigurations 1
+ Configuration Descriptor:
+ bLength 9
+ bDescriptorType 2
+ wTotalLength 0x0020
+ bNumInterfaces 1
+ bConfigurationValue 1
+ iConfiguration 4 DFU Config
+ bmAttributes 0x80
+ (Bus Powered)
+ MaxPower 100mA
+ Interface Descriptor:
+ bLength 9
+ bDescriptorType 4
+ bInterfaceNumber 0
+ bAlternateSetting 0
+ bNumEndpoints 2
+ bInterfaceClass 255 Vendor Specific Class
+ bInterfaceSubClass 255 Vendor Specific Subclass
+ bInterfaceProtocol 255 Vendor Specific Protocol
+ iInterface 5 ST-LINK/V3
+ Endpoint Descriptor:
+ bLength 7
+ bDescriptorType 5
+ bEndpointAddress 0x81 EP 1 IN
+ bmAttributes 2
+ Transfer Type Bulk
+ Synch Type None
+ Usage Type Data
+ wMaxPacketSize 0x0200 1x 512 bytes
+ bInterval 0
+ Endpoint Descriptor:
+ bLength 7
+ bDescriptorType 5
+ bEndpointAddress 0x01 EP 1 OUT
+ bmAttributes 2
+ Transfer Type Bulk
+ Synch Type None
+ Usage Type Data
+ wMaxPacketSize 0x0200 1x 512 bytes
+ bInterval 0
+Device Qualifier (for other device speed):
+ bLength 10
+ bDescriptorType 6
+ bcdUSB 2.00
+ bDeviceClass 0
+ bDeviceSubClass 0
+ bDeviceProtocol 0
+ bMaxPacketSize0 64
+ bNumConfigurations 1
+Device Status: 0x0001
+ Self Powered
diff --git a/doc/usb_adapters/stlink/0483_374e_stlinkv3.txt b/doc/usb_adapters/stlink/0483_374e_stlinkv3.txt
new file mode 100644
index 000000000..55c968cce
--- /dev/null
+++ b/doc/usb_adapters/stlink/0483_374e_stlinkv3.txt
@@ -0,0 +1,182 @@
+# SPDX-License-Identifier: GPL-2.0-or-later OR GFDL-1.2-no-invariants-or-later
+
+# Board: ST Nucleo-H...
[truncated message content] |
|
From: openocd-gerrit <ope...@us...> - 2023-01-15 15:04:57
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".
The branch, master has been updated
via 9ffda10298eff870bde12dec580f98de6f497257 (commit)
from 63336f4aaf672899db78de4ce6781c9451851472 (commit)
Those revisions listed above that are new to this repository have
not appeared on any other notification email; so we list those
revisions in full, below.
- Log -----------------------------------------------------------------
commit 9ffda10298eff870bde12dec580f98de6f497257
Author: Jian-Hong Pan <chi...@gm...>
Date: Sun Nov 13 12:43:14 2022 +0800
flash/nor, contrib/loaders: move numicro M0 write assembly to contrib/loaders
Simply move numicro M0 flash write assembly to contrib/loaders. Also,
modify corresponding Makefile and generated numicro_m0.inc.
To make the path more general, this patch rename the path
"contrib/loaders/flash/numicro_m4" to "contrib/loaders/flash/numicro" as
well.
Signed-off-by: Jian-Hong Pan <chi...@gm...>
Change-Id: I9adea24c2b3c97319a9b015cf50257f3d131dc26
Reviewed-on: https://review.openocd.org/c/openocd/+/7346
Tested-by: jenkins
Reviewed-by: Antonio Borneo <bor...@gm...>
diff --git a/contrib/loaders/flash/numicro_m4/Makefile b/contrib/loaders/flash/numicro/Makefile
similarity index 82%
rename from contrib/loaders/flash/numicro_m4/Makefile
rename to contrib/loaders/flash/numicro/Makefile
index 0f9c507cd..e4f44417c 100644
--- a/contrib/loaders/flash/numicro_m4/Makefile
+++ b/contrib/loaders/flash/numicro/Makefile
@@ -9,9 +9,9 @@ OBJCOPY=$(CROSS_COMPILE)objcopy
OBJDUMP=$(CROSS_COMPILE)objdump
-AFLAGS = -static -nostartfiles -mlittle-endian -mcpu=cortex-m4 -Wa,-EL
+AFLAGS = -static -nostartfiles -mlittle-endian -Wa,-EL
-all: numicro_m4.inc
+all: numicro_m0.inc numicro_m4.inc
.PHONY: clean
diff --git a/contrib/loaders/flash/numicro_m4/numicro_m4.S b/contrib/loaders/flash/numicro/numicro_m0.S
similarity index 82%
copy from contrib/loaders/flash/numicro_m4/numicro_m4.S
copy to contrib/loaders/flash/numicro/numicro_m0.S
index 6c59cca57..37d435532 100644
--- a/contrib/loaders/flash/numicro_m4/numicro_m4.S
+++ b/contrib/loaders/flash/numicro/numicro_m0.S
@@ -1,6 +1,9 @@
/* SPDX-License-Identifier: GPL-2.0-or-later */
/***************************************************************************
+ * Copyright (C) 2015 Nemui Trinomius *
+ * nem...@li... *
+ * *
* Copyright (C) 2017 Zale Yu *
* CY...@nu... *
* *
@@ -9,7 +12,7 @@
***************************************************************************/
.text
- .cpu cortex-m4
+ .cpu cortex-m0
.thumb
/* Params:
@@ -64,7 +67,7 @@
.L9:
bkpt #0
.L8:
- .word 0x4000C004
- .word 0x4000C008
- .word 0x4000C010
- .word 0x4000C000
+ .word 0x5000C004
+ .word 0x5000C008
+ .word 0x5000C010
+ .word 0x5000C000
diff --git a/contrib/loaders/flash/numicro_m4/numicro_m4.inc b/contrib/loaders/flash/numicro/numicro_m0.inc
similarity index 78%
copy from contrib/loaders/flash/numicro_m4/numicro_m4.inc
copy to contrib/loaders/flash/numicro/numicro_m0.inc
index c3e605292..db9c7742f 100644
--- a/contrib/loaders/flash/numicro_m4/numicro_m4.inc
+++ b/contrib/loaders/flash/numicro/numicro_m0.inc
@@ -2,4 +2,4 @@
0x04,0x1c,0x00,0x23,0x0d,0x1a,0x67,0x19,0x93,0x42,0x0c,0xd0,0x08,0x4e,0x37,0x60,
0x80,0xcc,0x08,0x4d,0x2f,0x60,0x08,0x4d,0x01,0x26,0x2e,0x60,0x2f,0x68,0xff,0x07,
0xfc,0xd4,0x01,0x33,0xee,0xe7,0x05,0x4b,0x18,0x68,0x40,0x21,0x08,0x40,0x00,0xbe,
-0x04,0xc0,0x00,0x40,0x08,0xc0,0x00,0x40,0x10,0xc0,0x00,0x40,0x00,0xc0,0x00,0x40,
+0x04,0xc0,0x00,0x50,0x08,0xc0,0x00,0x50,0x10,0xc0,0x00,0x50,0x00,0xc0,0x00,0x50,
diff --git a/contrib/loaders/flash/numicro_m4/numicro_m4.S b/contrib/loaders/flash/numicro/numicro_m4.S
similarity index 100%
rename from contrib/loaders/flash/numicro_m4/numicro_m4.S
rename to contrib/loaders/flash/numicro/numicro_m4.S
diff --git a/contrib/loaders/flash/numicro_m4/numicro_m4.inc b/contrib/loaders/flash/numicro/numicro_m4.inc
similarity index 100%
rename from contrib/loaders/flash/numicro_m4/numicro_m4.inc
rename to contrib/loaders/flash/numicro/numicro_m4.inc
diff --git a/src/flash/nor/numicro.c b/src/flash/nor/numicro.c
index cbd2450b0..0b04ce4b7 100644
--- a/src/flash/nor/numicro.c
+++ b/src/flash/nor/numicro.c
@@ -681,66 +681,11 @@ static uint32_t numicro_fmc_cmd(struct target *target, uint32_t cmd, uint32_t ad
/* NuMicro Program-LongWord Microcodes */
static const uint8_t numicro_flash_write_code[] = {
- /* Params:
- * r0 - workarea buffer / result
- * r1 - target address
- * r2 - wordcount
- * Clobbered:
- * r4 - tmp
- * r5 - tmp
- * r6 - tmp
- * r7 - tmp
- */
-
- /* .L1: */
- /* for(register uint32_t i=0;i<wcount;i++){ */
- 0x04, 0x1C, /* mov r4, r0 */
- 0x00, 0x23, /* mov r3, #0 */
- /* .L2: */
- 0x0D, 0x1A, /* sub r5, r1, r0 */
- 0x67, 0x19, /* add r7, r4, r7 */
- 0x93, 0x42, /* cmp r3, r2 */
- 0x0C, 0xD0, /* beq .L7 */
- /* .L4: */
- /* NUMICRO_FLASH_ISPADR = faddr; */
- 0x08, 0x4E, /* ldr r6, .L8 */
- 0x37, 0x60, /* str r7, [r6] */
- /* NUMICRO_FLASH_ISPDAT = *pLW; */
- 0x80, 0xCC, /* ldmia r4!, {r7} */
- 0x08, 0x4D, /* ldr r5, .L8+4 */
- 0x2F, 0x60, /* str r7, [r5] */
- /* faddr += 4; */
- /* pLW++; */
- /* Trigger write action */
- /* NUMICRO_FLASH_ISPTRG = ISPTRG_ISPGO; */
- 0x08, 0x4D, /* ldr r5, .L8+8 */
- 0x01, 0x26, /* mov r6, #1 */
- 0x2E, 0x60, /* str r6, [r5] */
- /* .L3: */
- /* while((NUMICRO_FLASH_ISPTRG & ISPTRG_ISPGO) == ISPTRG_ISPGO){}; */
- 0x2F, 0x68, /* ldr r7, [r5] */
- 0xFF, 0x07, /* lsl r7, r7, #31 */
- 0xFC, 0xD4, /* bmi .L3 */
-
- 0x01, 0x33, /* add r3, r3, #1 */
- 0xEE, 0xE7, /* b .L2 */
- /* .L7: */
- /* return (NUMICRO_FLASH_ISPCON & ISPCON_ISPFF); */
- 0x05, 0x4B, /* ldr r3, .L8+12 */
- 0x18, 0x68, /* ldr r0, [r3] */
- 0x40, 0x21, /* mov r1, #64 */
- 0x08, 0x40, /* and r0, r1 */
- /* .L9: */
- 0x00, 0xBE, /* bkpt #0 */
- /* .L8: */
- 0x04, 0xC0, 0x00, 0x50,/* .word 1342226436 */
- 0x08, 0xC0, 0x00, 0x50,/* .word 1342226440 */
- 0x10, 0xC0, 0x00, 0x50,/* .word 1342226448 */
- 0x00, 0xC0, 0x00, 0x50 /* .word 1342226432 */
+#include "../../../contrib/loaders/flash/numicro/numicro_m0.inc"
};
static const uint8_t numicro_m4_flash_write_code[] = {
-#include "../../../contrib/loaders/flash/numicro_m4/numicro_m4.inc"
+#include "../../../contrib/loaders/flash/numicro/numicro_m4.inc"
};
/* Program LongWord Block Write */
-----------------------------------------------------------------------
Summary of changes:
.../loaders/flash/{numicro_m4 => numicro}/Makefile | 4 +-
.../numicro_m4.S => numicro/numicro_m0.S} | 13 +++--
.../numicro_m4.inc => numicro/numicro_m0.inc} | 2 +-
.../flash/{numicro_m4 => numicro}/numicro_m4.S | 0
.../flash/{numicro_m4 => numicro}/numicro_m4.inc | 0
src/flash/nor/numicro.c | 59 +---------------------
6 files changed, 13 insertions(+), 65 deletions(-)
rename contrib/loaders/flash/{numicro_m4 => numicro}/Makefile (82%)
copy contrib/loaders/flash/{numicro_m4/numicro_m4.S => numicro/numicro_m0.S} (82%)
copy contrib/loaders/flash/{numicro_m4/numicro_m4.inc => numicro/numicro_m0.inc} (78%)
rename contrib/loaders/flash/{numicro_m4 => numicro}/numicro_m4.S (100%)
rename contrib/loaders/flash/{numicro_m4 => numicro}/numicro_m4.inc (100%)
hooks/post-receive
--
Main OpenOCD repository
|
|
From: openocd-gerrit <ope...@us...> - 2023-01-15 15:04:43
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".
The branch, master has been updated
via 63336f4aaf672899db78de4ce6781c9451851472 (commit)
from 21b14028ad7565f4916ae05a6c28b465eceb9150 (commit)
Those revisions listed above that are new to this repository have
not appeared on any other notification email; so we list those
revisions in full, below.
- Log -----------------------------------------------------------------
commit 63336f4aaf672899db78de4ce6781c9451851472
Author: Jian-Hong Pan <chi...@gm...>
Date: Thu Nov 10 00:14:10 2022 +0800
flash/nor, contrib/loaders: move numicro M4 write assembly to contrib/loaders
Simply move numicro M4 flash write assembly to contrib/loaders. Also,
add corresponding Makefile and generated numicro_m4.inc.
Signed-off-by: Jian-Hong Pan <chi...@gm...>
Change-Id: I22b8be0a245857335b11bd0b538db415fc34748d
Reviewed-on: https://review.openocd.org/c/openocd/+/7343
Tested-by: jenkins
Reviewed-by: Antonio Borneo <bor...@gm...>
diff --git a/contrib/loaders/flash/numicro_m4/Makefile b/contrib/loaders/flash/numicro_m4/Makefile
new file mode 100644
index 000000000..0f9c507cd
--- /dev/null
+++ b/contrib/loaders/flash/numicro_m4/Makefile
@@ -0,0 +1,31 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
+BIN2C = ../../../../src/helper/bin2char.sh
+
+CROSS_COMPILE ?= arm-none-eabi-
+
+CC=$(CROSS_COMPILE)gcc
+OBJCOPY=$(CROSS_COMPILE)objcopy
+OBJDUMP=$(CROSS_COMPILE)objdump
+
+
+AFLAGS = -static -nostartfiles -mlittle-endian -mcpu=cortex-m4 -Wa,-EL
+
+all: numicro_m4.inc
+
+.PHONY: clean
+
+%.elf: %.S
+ $(CC) $(AFLAGS) $< -o $@
+
+%.lst: %.elf
+ $(OBJDUMP) -S $< > $@
+
+%.bin: %.elf
+ $(OBJCOPY) -Obinary $< $@
+
+%.inc: %.bin
+ $(BIN2C) < $< > $@
+
+clean:
+ -rm -f *.elf *.lst *.bin *.inc
diff --git a/contrib/loaders/flash/numicro_m4/numicro_m4.S b/contrib/loaders/flash/numicro_m4/numicro_m4.S
new file mode 100644
index 000000000..6c59cca57
--- /dev/null
+++ b/contrib/loaders/flash/numicro_m4/numicro_m4.S
@@ -0,0 +1,70 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
+/***************************************************************************
+ * Copyright (C) 2017 Zale Yu *
+ * CY...@nu... *
+ * *
+ * Copyright (C) 2022 Jian-Hong Pan *
+ * chi...@gm... *
+ ***************************************************************************/
+
+ .text
+ .cpu cortex-m4
+ .thumb
+
+ /* Params:
+ * r0 - workarea buffer / result
+ * r1 - target address
+ * r2 - wordcount
+ * Clobbered:
+ * r4 - tmp
+ * r5 - tmp
+ * r6 - tmp
+ * r7 - tmp
+ */
+
+.L1:
+ /* for(register uint32_t i=0;i<wcount;i++){ */
+ mov r4, r0
+ mov r3, #0
+.L2:
+ sub r5, r1, r0
+ add r7, r4, r5
+ cmp r3, r2
+ beq .L7
+.L4:
+ /* NUMICRO_FLASH_ISPADR = faddr; */
+ ldr r6, .L8
+ str r7, [r6]
+ /* NUMICRO_FLASH_ISPDAT = *pLW; */
+ ldmia r4!, {r7}
+ ldr r5, .L8+4
+ str r7, [r5]
+ /* faddr += 4; */
+ /* pLW++; */
+ /* Trigger write action */
+ /* NUMICRO_FLASH_ISPTRG = ISPTRG_ISPGO; */
+ ldr r5, .L8+8
+ mov r6, #1
+ str r6, [r5]
+.L3:
+ /* while((NUMICRO_FLASH_ISPTRG & ISPTRG_ISPGO) == ISPTRG_ISPGO){}; */
+ ldr r7, [r5]
+ lsl r7, r7, #31
+ bmi .L3
+
+ add r3, r3, #1
+ b .L2
+.L7:
+ /* return (NUMICRO_FLASH_ISPCON & ISPCON_ISPFF); */
+ ldr r3, .L8+12
+ ldr r0, [r3]
+ mov r1, #64
+ and r0, r1
+.L9:
+ bkpt #0
+.L8:
+ .word 0x4000C004
+ .word 0x4000C008
+ .word 0x4000C010
+ .word 0x4000C000
diff --git a/contrib/loaders/flash/numicro_m4/numicro_m4.inc b/contrib/loaders/flash/numicro_m4/numicro_m4.inc
new file mode 100644
index 000000000..c3e605292
--- /dev/null
+++ b/contrib/loaders/flash/numicro_m4/numicro_m4.inc
@@ -0,0 +1,5 @@
+/* Autogenerated with ../../../../src/helper/bin2char.sh */
+0x04,0x1c,0x00,0x23,0x0d,0x1a,0x67,0x19,0x93,0x42,0x0c,0xd0,0x08,0x4e,0x37,0x60,
+0x80,0xcc,0x08,0x4d,0x2f,0x60,0x08,0x4d,0x01,0x26,0x2e,0x60,0x2f,0x68,0xff,0x07,
+0xfc,0xd4,0x01,0x33,0xee,0xe7,0x05,0x4b,0x18,0x68,0x40,0x21,0x08,0x40,0x00,0xbe,
+0x04,0xc0,0x00,0x40,0x08,0xc0,0x00,0x40,0x10,0xc0,0x00,0x40,0x00,0xc0,0x00,0x40,
diff --git a/src/flash/nor/numicro.c b/src/flash/nor/numicro.c
index 2bba7b746..cbd2450b0 100644
--- a/src/flash/nor/numicro.c
+++ b/src/flash/nor/numicro.c
@@ -740,62 +740,7 @@ static const uint8_t numicro_flash_write_code[] = {
};
static const uint8_t numicro_m4_flash_write_code[] = {
- /* Params:
- * r0 - workarea buffer / result
- * r1 - target address
- * r2 - wordcount
- * Clobbered:
- * r4 - tmp
- * r5 - tmp
- * r6 - tmp
- * r7 - tmp
- */
-
- /* .L1: */
- /* for(register uint32_t i=0;i<wcount;i++){ */
- 0x04, 0x1C, /* mov r4, r0 */
- 0x00, 0x23, /* mov r3, #0 */
- /* .L2: */
- 0x0D, 0x1A, /* sub r5, r1, r0 */
- 0x67, 0x19, /* add r7, r4, r7 */
- 0x93, 0x42, /* cmp r3, r2 */
- 0x0C, 0xD0, /* beq .L7 */
- /* .L4: */
- /* NUMICRO_FLASH_ISPADR = faddr; */
- 0x08, 0x4E, /* ldr r6, .L8 */
- 0x37, 0x60, /* str r7, [r6] */
- /* NUMICRO_FLASH_ISPDAT = *pLW; */
- 0x80, 0xCC, /* ldmia r4!, {r7} */
- 0x08, 0x4D, /* ldr r5, .L8+4 */
- 0x2F, 0x60, /* str r7, [r5] */
- /* faddr += 4; */
- /* pLW++; */
- /* Trigger write action */
- /* NUMICRO_FLASH_ISPTRG = ISPTRG_ISPGO; */
- 0x08, 0x4D, /* ldr r5, .L8+8 */
- 0x01, 0x26, /* mov r6, #1 */
- 0x2E, 0x60, /* str r6, [r5] */
- /* .L3: */
- /* while((NUMICRO_FLASH_ISPTRG & ISPTRG_ISPGO) == ISPTRG_ISPGO){}; */
- 0x2F, 0x68, /* ldr r7, [r5] */
- 0xFF, 0x07, /* lsl r7, r7, #31 */
- 0xFC, 0xD4, /* bmi .L3 */
-
- 0x01, 0x33, /* add r3, r3, #1 */
- 0xEE, 0xE7, /* b .L2 */
- /* .L7: */
- /* return (NUMICRO_FLASH_ISPCON & ISPCON_ISPFF); */
- 0x05, 0x4B, /* ldr r3, .L8+12 */
- 0x18, 0x68, /* ldr r0, [r3] */
- 0x40, 0x21, /* mov r1, #64 */
- 0x08, 0x40, /* and r0, r1 */
- /* .L9: */
- 0x00, 0xBE, /* bkpt #0 */
- /* .L8: */
- 0x04, 0xC0, 0x00, 0x40,/* .word 0x4000C004 */
- 0x08, 0xC0, 0x00, 0x40,/* .word 0x4000C008 */
- 0x10, 0xC0, 0x00, 0x40,/* .word 0x4000C010 */
- 0x00, 0xC0, 0x00, 0x40 /* .word 0x4000C000 */
+#include "../../../contrib/loaders/flash/numicro_m4/numicro_m4.inc"
};
/* Program LongWord Block Write */
-----------------------------------------------------------------------
Summary of changes:
.../loaders/flash/{nrf5 => numicro_m4}/Makefile | 7 ++-
contrib/loaders/flash/numicro_m4/numicro_m4.S | 70 ++++++++++++++++++++++
contrib/loaders/flash/numicro_m4/numicro_m4.inc | 5 ++
src/flash/nor/numicro.c | 57 +-----------------
4 files changed, 80 insertions(+), 59 deletions(-)
copy contrib/loaders/flash/{nrf5 => numicro_m4}/Makefile (76%)
create mode 100644 contrib/loaders/flash/numicro_m4/numicro_m4.S
create mode 100644 contrib/loaders/flash/numicro_m4/numicro_m4.inc
hooks/post-receive
--
Main OpenOCD repository
|
|
From: openocd-gerrit <ope...@us...> - 2023-01-15 15:04:16
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".
The branch, master has been updated
via 21b14028ad7565f4916ae05a6c28b465eceb9150 (commit)
from d1b0cb2b774c1033a6ca8e531781df82baac40f7 (commit)
Those revisions listed above that are new to this repository have
not appeared on any other notification email; so we list those
revisions in full, below.
- Log -----------------------------------------------------------------
commit 21b14028ad7565f4916ae05a6c28b465eceb9150
Author: Zale Yu <cy...@nu...>
Date: Fri Nov 4 23:07:29 2022 +0800
tcl: add a configuration file for Nuvoton M541 & NUC442/472 series
This patch is picked from the tcl part of OpenOCD-Nuvoton's commit
("flash: supported Nuvoton M4 series. jtag: Used HW reset instead of
auto reset. tcl: added a configuration file for Nuvoton M4 series.") [1]
to support the communication with Nuvoton's Cortex-M4 chips: M541 &
NUC442/472 series.
This patch has been tested with Nuvoton's NuTiny-SDK-NUC472 development
board [2].
The code comes from the commit basically. Jian-Hong Pan tweaked for the
compatibility with current OpenOCD. So, leave the author as Zale Yu.
[1]: https://github.com/OpenNuvoton/OpenOCD-Nuvoton/commit/c2d5b8bfc705
[2]: https://www.nuvoton.com/export/resource-files/UM_NuTiny-SDK-
NUC472_EN_Rev1.02.pdf
Signed-off-by: Zale Yu <cy...@nu...>
Signed-off-by: Jian-Hong Pan <chi...@gm...>
Change-Id: I27ac58dd1c98a76e791a4f1117c31060cf5522e8
Reviewed-on: https://review.openocd.org/c/openocd/+/7330
Tested-by: jenkins
Reviewed-by: Antonio Borneo <bor...@gm...>
diff --git a/tcl/target/numicro_m4.cfg b/tcl/target/numicro_m4.cfg
new file mode 100644
index 000000000..1302515d3
--- /dev/null
+++ b/tcl/target/numicro_m4.cfg
@@ -0,0 +1,62 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
+# script for Nuvoton MuMicro Cortex-M4 Series
+
+source [find target/swj-dp.tcl]
+
+# Set Chipname
+if { [info exists CHIPNAME] } {
+ set _CHIPNAME $CHIPNAME
+} else {
+ set _CHIPNAME NuMicro
+}
+
+# SWD DP-ID Nuvoton NuMicro Cortex-M4 has SWD Transport only.
+if { [info exists CPUDAPID] } {
+ set _CPUDAPID $CPUDAPID
+} else {
+ set _CPUDAPID 0x2BA01477
+}
+
+# Work-area is a space in RAM used for flash programming
+# By default use 16kB
+if { [info exists WORKAREASIZE] } {
+ set _WORKAREASIZE $WORKAREASIZE
+} else {
+ set _WORKAREASIZE 0x4000
+}
+
+
+# Debug Adapter Target Settings
+swj_newdap $_CHIPNAME cpu -irlen 4 -expected-id $_CPUDAPID
+dap create $_CHIPNAME.dap -chain-position $_CHIPNAME.cpu
+set _TARGETNAME $_CHIPNAME.cpu
+target create $_TARGETNAME cortex_m -dap $_CHIPNAME.dap
+
+$_TARGETNAME configure -work-area-phys 0x20000000 -work-area-size $_WORKAREASIZE -work-area-backup 0
+
+# flash bank <name> numicro <base> <size(autodetect,set to 0)> 0 0 <target#>
+#set _FLASHNAME $_CHIPNAME.flash
+#flash bank $_FLASHNAME numicro 0 $_FLASHSIZE 0 0 $_TARGETNAME
+# flash size will be probed
+set _FLASHNAME $_CHIPNAME.flash_aprom
+flash bank $_FLASHNAME numicro 0x00000000 0 0 0 $_TARGETNAME
+set _FLASHNAME $_CHIPNAME.flash_data
+flash bank $_FLASHNAME numicro 0x0001F000 0 0 0 $_TARGETNAME
+set _FLASHNAME $_CHIPNAME.flash_ldrom
+flash bank $_FLASHNAME numicro 0x00100000 0 0 0 $_TARGETNAME
+set _FLASHNAME $_CHIPNAME.flash_config
+flash bank $_FLASHNAME numicro 0x00300000 0 0 0 $_TARGETNAME
+
+# set default SWCLK frequency
+adapter speed 1000
+
+# set default srst setting "none"
+reset_config none
+
+# HLA doesn't have cortex_m commands
+if {![using_hla]} {
+ # if srst is not fitted use SYSRESETREQ to
+ # perform a soft reset
+ cortex_m reset_config sysresetreq
+}
-----------------------------------------------------------------------
Summary of changes:
tcl/target/{numicro.cfg => numicro_m4.cfg} | 11 +++++------
1 file changed, 5 insertions(+), 6 deletions(-)
copy tcl/target/{numicro.cfg => numicro_m4.cfg} (87%)
hooks/post-receive
--
Main OpenOCD repository
|
|
From: openocd-gerrit <ope...@us...> - 2023-01-15 15:03:39
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".
The branch, master has been updated
via d1b0cb2b774c1033a6ca8e531781df82baac40f7 (commit)
from 776e045de0a2ce6644ae19de99820f02628dfbcc (commit)
Those revisions listed above that are new to this repository have
not appeared on any other notification email; so we list those
revisions in full, below.
- Log -----------------------------------------------------------------
commit d1b0cb2b774c1033a6ca8e531781df82baac40f7
Author: Zale Yu <cy...@nu...>
Date: Sun Nov 6 23:32:22 2022 +0800
flash: support Nuvoton M541 & NUC442/472 series
This patch is picked from the flash part of OpenOCD-Nuvoton's commit
("flash: supported Nuvoton M4 series. jtag: Used HW reset instead of
auto reset. tcl: added a configuration file for Nuvoton M4 series.") [1]
to support flashing Nuvoton's Cortex-M4 chips: M541 & NUC442/472 series.
The code comes from the commit basically. Jian-Hong Pan tweaked for the
compatibility with current OpenOCD. So, leave the author as Zale Yu.
[1]: https://github.com/OpenNuvoton/OpenOCD-Nuvoton/commit/c2d5b8bfc705
Signed-off-by: Zale Yu <cy...@nu...>
Signed-off-by: Jian-Hong Pan <chi...@gm...>
Change-Id: I9dc69eccb851df14c1b0ce2f619d7b3da0aa92aa
Reviewed-on: https://review.openocd.org/c/openocd/+/7329
Tested-by: jenkins
Reviewed-by: Antonio Borneo <bor...@gm...>
diff --git a/src/flash/nor/numicro.c b/src/flash/nor/numicro.c
index bafad80ce..2bba7b746 100644
--- a/src/flash/nor/numicro.c
+++ b/src/flash/nor/numicro.c
@@ -466,6 +466,65 @@ static const struct numicro_cpu_type numicro_parts[] = {
{"NUC240SE3AE", 0x10024027, NUMICRO_BANKS_GENERAL(128 * 1024, 0 * 1024, 8 * 1024, 8)},
{"NUC240VE3AE", 0x10024018, NUMICRO_BANKS_GENERAL(128 * 1024, 0 * 1024, 8 * 1024, 8)},
+ /* M451 */
+ {"M451LC3AE", 0x00945101, NUMICRO_BANKS_GENERAL(40 * 1024, 0 * 1024, 4 * 1024, 8)},
+ {"M451LD3AE", 0x00945100, NUMICRO_BANKS_GENERAL(72 * 1024, 0 * 1024, 4 * 1024, 8)},
+ {"M451LE6AE", 0x00845101, NUMICRO_BANKS_GENERAL(128 * 1024, 0 * 1024, 4 * 1024, 8)},
+ {"M451LG6AE", 0x00845100, NUMICRO_BANKS_GENERAL(256 * 1024, 0 * 1024, 4 * 1024, 8)},
+ {"M451MLC3AE", 0x00945001, NUMICRO_BANKS_GENERAL(40 * 1024, 0 * 1024, 4 * 1024, 8)},
+ {"M451MLD3AE", 0x00945000, NUMICRO_BANKS_GENERAL(72 * 1024, 0 * 1024, 4 * 1024, 8)},
+ {"M451MLE6AE", 0x00845001, NUMICRO_BANKS_GENERAL(128 * 1024, 0 * 1024, 4 * 1024, 8)},
+ {"M451MLG6AE", 0x00845000, NUMICRO_BANKS_GENERAL(256 * 1024, 0 * 1024, 4 * 1024, 8)},
+ {"M451MSC3AE", 0x00945011, NUMICRO_BANKS_GENERAL(40 * 1024, 0 * 1024, 4 * 1024, 8)},
+ {"M451MSD3AE", 0x00945010, NUMICRO_BANKS_GENERAL(72 * 1024, 0 * 1024, 4 * 1024, 8)},
+ {"M451RC3AE", 0x00945121, NUMICRO_BANKS_GENERAL(40 * 1024, 0 * 1024, 4 * 1024, 8)},
+ {"M451RD3AE", 0x00945120, NUMICRO_BANKS_GENERAL(72 * 1024, 0 * 1024, 4 * 1024, 8)},
+ {"M451RE6AE", 0x00845121, NUMICRO_BANKS_GENERAL(128 * 1024, 0 * 1024, 4 * 1024, 8)},
+ {"M451RG6AE", 0x00845120, NUMICRO_BANKS_GENERAL(256 * 1024, 0 * 1024, 4 * 1024, 8)},
+ {"M451VE6AE", 0x00845131, NUMICRO_BANKS_GENERAL(128 * 1024, 0 * 1024, 4 * 1024, 8)},
+ {"M451VG6AE", 0x00845130, NUMICRO_BANKS_GENERAL(256 * 1024, 0 * 1024, 4 * 1024, 8)},
+ {"M452LC3AE", 0x00945201, NUMICRO_BANKS_GENERAL(40 * 1024, 0 * 1024, 4 * 1024, 8)},
+ {"M452LD3AE", 0x00945200, NUMICRO_BANKS_GENERAL(72 * 1024, 0 * 1024, 4 * 1024, 8)},
+ {"M452LE6AE", 0x00845201, NUMICRO_BANKS_GENERAL(128 * 1024, 0 * 1024, 4 * 1024, 8)},
+ {"M452LG6AE", 0x00845200, NUMICRO_BANKS_GENERAL(256 * 1024, 0 * 1024, 4 * 1024, 8)},
+ {"M452RD3AE", 0x00945220, NUMICRO_BANKS_GENERAL(72 * 1024, 0 * 1024, 4 * 1024, 8)},
+ {"M452RE6AE", 0x00845221, NUMICRO_BANKS_GENERAL(128 * 1024, 0 * 1024, 4 * 1024, 8)},
+ {"M452RG6AE", 0x00845220, NUMICRO_BANKS_GENERAL(256 * 1024, 0 * 1024, 4 * 1024, 8)},
+ {"M453LC3AE", 0x00945301, NUMICRO_BANKS_GENERAL(40 * 1024, 0 * 1024, 4 * 1024, 8)},
+ {"M453LD3AE", 0x00945300, NUMICRO_BANKS_GENERAL(72 * 1024, 0 * 1024, 4 * 1024, 8)},
+ {"M453LE6AE", 0x00845301, NUMICRO_BANKS_GENERAL(128 * 1024, 0 * 1024, 4 * 1024, 8)},
+ {"M453LG6AE", 0x00845300, NUMICRO_BANKS_GENERAL(256 * 1024, 0 * 1024, 4 * 1024, 8)},
+ {"M453RD3AE", 0x00945320, NUMICRO_BANKS_GENERAL(72 * 1024, 0 * 1024, 4 * 1024, 8)},
+ {"M453RE6AE", 0x00845321, NUMICRO_BANKS_GENERAL(128 * 1024, 0 * 1024, 4 * 1024, 8)},
+ {"M453RG6AE", 0x00845320, NUMICRO_BANKS_GENERAL(256 * 1024, 0 * 1024, 4 * 1024, 8)},
+ {"M453VD3AE", 0x00945330, NUMICRO_BANKS_GENERAL(72 * 1024, 0 * 1024, 4 * 1024, 8)},
+ {"M453VE6AE", 0x00845331, NUMICRO_BANKS_GENERAL(128 * 1024, 0 * 1024, 4 * 1024, 8)},
+ {"M453VG6AE", 0x00845330, NUMICRO_BANKS_GENERAL(256 * 1024, 0 * 1024, 4 * 1024, 8)},
+ {"M4TKVG6AE", 0x00845430, NUMICRO_BANKS_GENERAL(256 * 1024, 0 * 1024, 4 * 1024, 8)},
+ {"M4TKVE6AE", 0x00845431, NUMICRO_BANKS_GENERAL(128 * 1024, 0 * 1024, 4 * 1024, 8)},
+ {"M4TKRG6AE", 0x00845420, NUMICRO_BANKS_GENERAL(256 * 1024, 0 * 1024, 4 * 1024, 8)},
+ {"M4TKRE6AE", 0x00845421, NUMICRO_BANKS_GENERAL(128 * 1024, 0 * 1024, 4 * 1024, 8)},
+ {"M4TKLG6AE", 0x00845400, NUMICRO_BANKS_GENERAL(256 * 1024, 0 * 1024, 4 * 1024, 8)},
+ {"M4TKLE6AE", 0x00845401, NUMICRO_BANKS_GENERAL(128 * 1024, 0 * 1024, 4 * 1024, 8)},
+
+ /* NUC442_472 */
+ {"NUC442JG8AE", 0x00044203, NUMICRO_BANKS_GENERAL(256 * 1024, 0 * 1024, 16 * 1024, 16)},
+ {"NUC442JI8AE", 0x00044201, NUMICRO_BANKS_GENERAL(512 * 1024, 0 * 1024, 16 * 1024, 16)},
+ {"NUC442KG8AE", 0x00044206, NUMICRO_BANKS_GENERAL(256 * 1024, 0 * 1024, 16 * 1024, 16)},
+ {"NUC442KI8AE", 0x00044204, NUMICRO_BANKS_GENERAL(512 * 1024, 0 * 1024, 16 * 1024, 16)},
+ {"NUC442RG8AE", 0x00044212, NUMICRO_BANKS_GENERAL(256 * 1024, 0 * 1024, 16 * 1024, 16)},
+ {"NUC442RI8AE", 0x00044210, NUMICRO_BANKS_GENERAL(512 * 1024, 0 * 1024, 16 * 1024, 16)},
+ {"NUC442VG8AE", 0x00044209, NUMICRO_BANKS_GENERAL(256 * 1024, 0 * 1024, 16 * 1024, 16)},
+ {"NUC442VI8AE", 0x00044207, NUMICRO_BANKS_GENERAL(512 * 1024, 0 * 1024, 16 * 1024, 16)},
+ {"NUC472HG8AE", 0x00047203, NUMICRO_BANKS_GENERAL(256 * 1024, 0 * 1024, 16 * 1024, 16)},
+ {"NUC472HI8AE", 0x00047201, NUMICRO_BANKS_GENERAL(512 * 1024, 0 * 1024, 16 * 1024, 16)},
+ {"NUC472JG8AE", 0x00047206, NUMICRO_BANKS_GENERAL(256 * 1024, 0 * 1024, 16 * 1024, 16)},
+ {"NUC472JI8AE", 0x00047204, NUMICRO_BANKS_GENERAL(512 * 1024, 0 * 1024, 16 * 1024, 16)},
+ {"NUC472KG8AE", 0x00047209, NUMICRO_BANKS_GENERAL(256 * 1024, 0 * 1024, 16 * 1024, 16)},
+ {"NUC472KI8AE", 0x00047207, NUMICRO_BANKS_GENERAL(512 * 1024, 0 * 1024, 16 * 1024, 16)},
+ {"NUC472VG8AE", 0x00047212, NUMICRO_BANKS_GENERAL(256 * 1024, 0 * 1024, 16 * 1024, 16)},
+ {"NUC472VI8AE", 0x00047210, NUMICRO_BANKS_GENERAL(512 * 1024, 0 * 1024, 16 * 1024, 16)},
+
{"UNKNOWN", 0x00000000, NUMICRO_BANKS_GENERAL(128 * 1024, 0 * 1024, 16 * 1024, 8)},
};
@@ -476,32 +535,53 @@ struct numicro_flash_bank {
const struct numicro_cpu_type *cpu;
};
+/* Private variables */
+uint32_t m_page_size = NUMICRO_PAGESIZE;
+uint32_t m_address_bias_offset;
+
/* Private methods */
+static int numicro_get_arm_arch(struct target *target)
+{
+ struct armv7m_common *armv7m = target_to_armv7m(target);
+
+ if (armv7m->arm.arch != ARM_ARCH_V6M) {
+ LOG_DEBUG("NuMicro arm architecture: armv7m\n");
+ m_page_size = NUMICRO_PAGESIZE * 4;
+ m_address_bias_offset = 0x10000000;
+ } else {
+ LOG_DEBUG("NuMicro arm architecture: armv6m\n");
+ m_page_size = NUMICRO_PAGESIZE;
+ m_address_bias_offset = 0x0;
+ }
+
+ return ERROR_OK;
+}
+
static int numicro_reg_unlock(struct target *target)
{
uint32_t is_protected;
int retval = ERROR_OK;
/* Check to see if NUC is register unlocked or not */
- retval = target_read_u32(target, NUMICRO_SYS_WRPROT, &is_protected);
+ retval = target_read_u32(target, NUMICRO_SYS_WRPROT - m_address_bias_offset, &is_protected);
if (retval != ERROR_OK)
return retval;
LOG_DEBUG("protected = 0x%08" PRIx32 "", is_protected);
if (is_protected == 0) { /* means protected - so unlock it */
/* unlock flash registers */
- retval = target_write_u32(target, NUMICRO_SYS_WRPROT, REG_KEY1);
+ retval = target_write_u32(target, NUMICRO_SYS_WRPROT - m_address_bias_offset, REG_KEY1);
if (retval != ERROR_OK)
return retval;
- retval = target_write_u32(target, NUMICRO_SYS_WRPROT, REG_KEY2);
+ retval = target_write_u32(target, NUMICRO_SYS_WRPROT - m_address_bias_offset, REG_KEY2);
if (retval != ERROR_OK)
return retval;
- retval = target_write_u32(target, NUMICRO_SYS_WRPROT, REG_KEY3);
+ retval = target_write_u32(target, NUMICRO_SYS_WRPROT - m_address_bias_offset, REG_KEY3);
if (retval != ERROR_OK)
return retval;
}
/* Check that unlock worked */
- retval = target_read_u32(target, NUMICRO_SYS_WRPROT, &is_protected);
+ retval = target_read_u32(target, NUMICRO_SYS_WRPROT - m_address_bias_offset, &is_protected);
if (retval != ERROR_OK)
return retval;
@@ -529,27 +609,27 @@ static int numicro_init_isp(struct target *target)
return retval;
/* Enable ISP/SRAM/TICK Clock */
- retval = target_read_u32(target, NUMICRO_SYSCLK_AHBCLK, ®_stat);
+ retval = target_read_u32(target, NUMICRO_SYSCLK_AHBCLK - m_address_bias_offset, ®_stat);
if (retval != ERROR_OK)
return retval;
reg_stat |= AHBCLK_ISP_EN | AHBCLK_SRAM_EN | AHBCLK_TICK_EN;
- retval = target_write_u32(target, NUMICRO_SYSCLK_AHBCLK, reg_stat);
+ retval = target_write_u32(target, NUMICRO_SYSCLK_AHBCLK - m_address_bias_offset, reg_stat);
if (retval != ERROR_OK)
return retval;
/* Enable ISP */
- retval = target_read_u32(target, NUMICRO_FLASH_ISPCON, ®_stat);
+ retval = target_read_u32(target, NUMICRO_FLASH_ISPCON - m_address_bias_offset, ®_stat);
if (retval != ERROR_OK)
return retval;
reg_stat |= ISPCON_ISPFF | ISPCON_LDUEN | ISPCON_APUEN | ISPCON_CFGUEN | ISPCON_ISPEN;
- retval = target_write_u32(target, NUMICRO_FLASH_ISPCON, reg_stat);
+ retval = target_write_u32(target, NUMICRO_FLASH_ISPCON - m_address_bias_offset, reg_stat);
if (retval != ERROR_OK)
return retval;
/* Write one to undocumented flash control register */
- retval = target_write_u32(target, NUMICRO_FLASH_CHEAT, 1);
+ retval = target_write_u32(target, NUMICRO_FLASH_CHEAT - m_address_bias_offset, 1);
if (retval != ERROR_OK)
return retval;
@@ -561,29 +641,28 @@ static uint32_t numicro_fmc_cmd(struct target *target, uint32_t cmd, uint32_t ad
uint32_t timeout, status;
int retval = ERROR_OK;
- retval = target_write_u32(target, NUMICRO_FLASH_ISPCMD, cmd);
+ retval = target_write_u32(target, NUMICRO_FLASH_ISPCMD - m_address_bias_offset, cmd);
if (retval != ERROR_OK)
return retval;
- retval = target_write_u32(target, NUMICRO_FLASH_ISPDAT, wdata);
+ retval = target_write_u32(target, NUMICRO_FLASH_ISPDAT - m_address_bias_offset, wdata);
if (retval != ERROR_OK)
return retval;
- retval = target_write_u32(target, NUMICRO_FLASH_ISPADR, addr);
+ retval = target_write_u32(target, NUMICRO_FLASH_ISPADR - m_address_bias_offset, addr);
if (retval != ERROR_OK)
return retval;
- retval = target_write_u32(target, NUMICRO_FLASH_ISPTRG, ISPTRG_ISPGO);
+ retval = target_write_u32(target, NUMICRO_FLASH_ISPTRG - m_address_bias_offset, ISPTRG_ISPGO);
if (retval != ERROR_OK)
return retval;
/* Wait for busy to clear - check the GO flag */
timeout = 100;
for (;;) {
- retval = target_read_u32(target, NUMICRO_FLASH_ISPTRG, &status);
+ retval = target_read_u32(target, NUMICRO_FLASH_ISPTRG - m_address_bias_offset, &status);
if (retval != ERROR_OK)
return retval;
- LOG_DEBUG("status: 0x%" PRIx32 "", status);
if ((status & (ISPTRG_ISPGO)) == 0)
break;
if (timeout-- <= 0) {
@@ -593,79 +672,138 @@ static uint32_t numicro_fmc_cmd(struct target *target, uint32_t cmd, uint32_t ad
busy_sleep(1); /* can use busy sleep for short times. */
}
- retval = target_read_u32(target, NUMICRO_FLASH_ISPDAT, rdata);
+ retval = target_read_u32(target, NUMICRO_FLASH_ISPDAT - m_address_bias_offset, rdata);
if (retval != ERROR_OK)
return retval;
return ERROR_OK;
}
-
/* NuMicro Program-LongWord Microcodes */
static const uint8_t numicro_flash_write_code[] = {
- /* Params:
- * r0 - workarea buffer / result
- * r1 - target address
- * r2 - wordcount
- * Clobbered:
- * r4 - tmp
- * r5 - tmp
- * r6 - tmp
- * r7 - tmp
- */
-
- /* .L1: */
- /* for(register uint32_t i=0;i<wcount;i++){ */
+ /* Params:
+ * r0 - workarea buffer / result
+ * r1 - target address
+ * r2 - wordcount
+ * Clobbered:
+ * r4 - tmp
+ * r5 - tmp
+ * r6 - tmp
+ * r7 - tmp
+ */
+
+ /* .L1: */
+ /* for(register uint32_t i=0;i<wcount;i++){ */
0x04, 0x1C, /* mov r4, r0 */
0x00, 0x23, /* mov r3, #0 */
- /* .L2: */
+ /* .L2: */
0x0D, 0x1A, /* sub r5, r1, r0 */
0x67, 0x19, /* add r7, r4, r7 */
0x93, 0x42, /* cmp r3, r2 */
0x0C, 0xD0, /* beq .L7 */
- /* .L4: */
- /* NUMICRO_FLASH_ISPADR = faddr; */
+ /* .L4: */
+ /* NUMICRO_FLASH_ISPADR = faddr; */
0x08, 0x4E, /* ldr r6, .L8 */
0x37, 0x60, /* str r7, [r6] */
- /* NUMICRO_FLASH_ISPDAT = *pLW; */
+ /* NUMICRO_FLASH_ISPDAT = *pLW; */
0x80, 0xCC, /* ldmia r4!, {r7} */
0x08, 0x4D, /* ldr r5, .L8+4 */
0x2F, 0x60, /* str r7, [r5] */
- /* faddr += 4; */
- /* pLW++; */
- /* Trigger write action */
- /* NUMICRO_FLASH_ISPTRG = ISPTRG_ISPGO; */
+ /* faddr += 4; */
+ /* pLW++; */
+ /* Trigger write action */
+ /* NUMICRO_FLASH_ISPTRG = ISPTRG_ISPGO; */
0x08, 0x4D, /* ldr r5, .L8+8 */
0x01, 0x26, /* mov r6, #1 */
0x2E, 0x60, /* str r6, [r5] */
- /* .L3: */
- /* while((NUMICRO_FLASH_ISPTRG & ISPTRG_ISPGO) == ISPTRG_ISPGO){}; */
+ /* .L3: */
+ /* while((NUMICRO_FLASH_ISPTRG & ISPTRG_ISPGO) == ISPTRG_ISPGO){}; */
0x2F, 0x68, /* ldr r7, [r5] */
0xFF, 0x07, /* lsl r7, r7, #31 */
0xFC, 0xD4, /* bmi .L3 */
0x01, 0x33, /* add r3, r3, #1 */
0xEE, 0xE7, /* b .L2 */
- /* .L7: */
- /* return (NUMICRO_FLASH_ISPCON & ISPCON_ISPFF); */
+ /* .L7: */
+ /* return (NUMICRO_FLASH_ISPCON & ISPCON_ISPFF); */
0x05, 0x4B, /* ldr r3, .L8+12 */
0x18, 0x68, /* ldr r0, [r3] */
0x40, 0x21, /* mov r1, #64 */
0x08, 0x40, /* and r0, r1 */
- /* .L9: */
+ /* .L9: */
0x00, 0xBE, /* bkpt #0 */
- /* .L8: */
+ /* .L8: */
0x04, 0xC0, 0x00, 0x50,/* .word 1342226436 */
0x08, 0xC0, 0x00, 0x50,/* .word 1342226440 */
0x10, 0xC0, 0x00, 0x50,/* .word 1342226448 */
0x00, 0xC0, 0x00, 0x50 /* .word 1342226432 */
};
+
+static const uint8_t numicro_m4_flash_write_code[] = {
+ /* Params:
+ * r0 - workarea buffer / result
+ * r1 - target address
+ * r2 - wordcount
+ * Clobbered:
+ * r4 - tmp
+ * r5 - tmp
+ * r6 - tmp
+ * r7 - tmp
+ */
+
+ /* .L1: */
+ /* for(register uint32_t i=0;i<wcount;i++){ */
+ 0x04, 0x1C, /* mov r4, r0 */
+ 0x00, 0x23, /* mov r3, #0 */
+ /* .L2: */
+ 0x0D, 0x1A, /* sub r5, r1, r0 */
+ 0x67, 0x19, /* add r7, r4, r7 */
+ 0x93, 0x42, /* cmp r3, r2 */
+ 0x0C, 0xD0, /* beq .L7 */
+ /* .L4: */
+ /* NUMICRO_FLASH_ISPADR = faddr; */
+ 0x08, 0x4E, /* ldr r6, .L8 */
+ 0x37, 0x60, /* str r7, [r6] */
+ /* NUMICRO_FLASH_ISPDAT = *pLW; */
+ 0x80, 0xCC, /* ldmia r4!, {r7} */
+ 0x08, 0x4D, /* ldr r5, .L8+4 */
+ 0x2F, 0x60, /* str r7, [r5] */
+ /* faddr += 4; */
+ /* pLW++; */
+ /* Trigger write action */
+ /* NUMICRO_FLASH_ISPTRG = ISPTRG_ISPGO; */
+ 0x08, 0x4D, /* ldr r5, .L8+8 */
+ 0x01, 0x26, /* mov r6, #1 */
+ 0x2E, 0x60, /* str r6, [r5] */
+ /* .L3: */
+ /* while((NUMICRO_FLASH_ISPTRG & ISPTRG_ISPGO) == ISPTRG_ISPGO){}; */
+ 0x2F, 0x68, /* ldr r7, [r5] */
+ 0xFF, 0x07, /* lsl r7, r7, #31 */
+ 0xFC, 0xD4, /* bmi .L3 */
+
+ 0x01, 0x33, /* add r3, r3, #1 */
+ 0xEE, 0xE7, /* b .L2 */
+ /* .L7: */
+ /* return (NUMICRO_FLASH_ISPCON & ISPCON_ISPFF); */
+ 0x05, 0x4B, /* ldr r3, .L8+12 */
+ 0x18, 0x68, /* ldr r0, [r3] */
+ 0x40, 0x21, /* mov r1, #64 */
+ 0x08, 0x40, /* and r0, r1 */
+ /* .L9: */
+ 0x00, 0xBE, /* bkpt #0 */
+ /* .L8: */
+ 0x04, 0xC0, 0x00, 0x40,/* .word 0x4000C004 */
+ 0x08, 0xC0, 0x00, 0x40,/* .word 0x4000C008 */
+ 0x10, 0xC0, 0x00, 0x40,/* .word 0x4000C010 */
+ 0x00, 0xC0, 0x00, 0x40 /* .word 0x4000C000 */
+};
+
/* Program LongWord Block Write */
static int numicro_writeblock(struct flash_bank *bank, const uint8_t *buffer,
uint32_t offset, uint32_t count)
{
struct target *target = bank->target;
- uint32_t buffer_size = 1024; /* Default minimum value */
+ uint32_t buffer_size = 1024; /* Default minimum value */
struct working_area *write_algorithm;
struct working_area *source;
uint32_t address = bank->base + offset;
@@ -693,18 +831,34 @@ static int numicro_writeblock(struct flash_bank *bank, const uint8_t *buffer,
LOG_WARNING("offset 0x%" PRIx32 " breaks required 2-byte alignment", offset);
return ERROR_FLASH_DST_BREAKS_ALIGNMENT;
}
+ /* Difference between M0 and M4 */
+ if (m_page_size == NUMICRO_PAGESIZE) {
+ /* allocate working area with flash programming code */
+ if (target_alloc_working_area(target, sizeof(numicro_flash_write_code),
+ &write_algorithm) != ERROR_OK) {
+ LOG_WARNING("no working area available, can't do block memory writes");
+ return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
+ }
- /* allocate working area with flash programming code */
- if (target_alloc_working_area(target, sizeof(numicro_flash_write_code),
+ retval = target_write_buffer(target, write_algorithm->address,
+ sizeof(numicro_flash_write_code), numicro_flash_write_code);
+ if (retval != ERROR_OK)
+ return retval;
+ } else { /* for M4 */
+ /* allocate working area with flash programming code */
+ if (target_alloc_working_area(target, sizeof(numicro_m4_flash_write_code),
&write_algorithm) != ERROR_OK) {
- LOG_WARNING("no working area available, can't do block memory writes");
- return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
- }
+ LOG_WARNING("no working area available, can't do block memory writes");
+ return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
+ }
- retval = target_write_buffer(target, write_algorithm->address,
- sizeof(numicro_flash_write_code), numicro_flash_write_code);
- if (retval != ERROR_OK)
- return retval;
+ retval = target_write_buffer(target, write_algorithm->address,
+ sizeof(numicro_m4_flash_write_code), numicro_m4_flash_write_code);
+ if (retval != ERROR_OK)
+ return retval;
+
+ buffer_size = m_page_size;
+ }
/* memory buffer */
while (target_alloc_working_area(target, buffer_size, &source) != ERROR_OK) {
@@ -775,13 +929,14 @@ static int numicro_protect_check(struct flash_bank *bank)
LOG_INFO("Nuvoton NuMicro: Flash Lock Check...");
+ numicro_get_arm_arch(target);
retval = numicro_init_isp(target);
if (retval != ERROR_OK)
return retval;
/* Read CONFIG0,CONFIG1 */
- numicro_fmc_cmd(target, ISPCMD_READ, NUMICRO_CONFIG0, 0 , &config[0]);
- numicro_fmc_cmd(target, ISPCMD_READ, NUMICRO_CONFIG1, 0 , &config[1]);
+ numicro_fmc_cmd(target, ISPCMD_READ, NUMICRO_CONFIG0 - m_address_bias_offset, 0, &config[0]);
+ numicro_fmc_cmd(target, ISPCMD_READ, NUMICRO_CONFIG1 - m_address_bias_offset, 0, &config[1]);
LOG_DEBUG("CONFIG0: 0x%" PRIx32 ",CONFIG1: 0x%" PRIx32 "", config[0], config[1]);
@@ -821,31 +976,34 @@ static int numicro_erase(struct flash_bank *bank, unsigned int first,
LOG_INFO("Nuvoton NuMicro: Sector Erase ... (%u to %u)", first, last);
+ numicro_get_arm_arch(target);
retval = numicro_init_isp(target);
if (retval != ERROR_OK)
return retval;
- retval = target_write_u32(target, NUMICRO_FLASH_ISPCMD, ISPCMD_ERASE);
+ retval = target_write_u32(target, NUMICRO_FLASH_ISPCMD - m_address_bias_offset, ISPCMD_ERASE);
if (retval != ERROR_OK)
return retval;
for (unsigned int i = first; i <= last; i++) {
- LOG_DEBUG("erasing sector %u at address " TARGET_ADDR_FMT, i,
- bank->base + bank->sectors[i].offset);
- retval = target_write_u32(target, NUMICRO_FLASH_ISPADR, bank->base + bank->sectors[i].offset);
+ LOG_DEBUG("erasing sector %u at address " TARGET_ADDR_FMT, i, bank->base + bank->sectors[i].offset);
+ retval = target_write_u32(target,
+ NUMICRO_FLASH_ISPADR - m_address_bias_offset,
+ bank->base + bank->sectors[i].offset);
if (retval != ERROR_OK)
return retval;
- retval = target_write_u32(target, NUMICRO_FLASH_ISPTRG, ISPTRG_ISPGO); /* This is the only bit available */
+ retval = target_write_u32(target,
+ NUMICRO_FLASH_ISPTRG - m_address_bias_offset,
+ ISPTRG_ISPGO); /* This is the only bit available */
if (retval != ERROR_OK)
return retval;
/* wait for busy to clear - check the GO flag */
timeout = 100;
for (;;) {
- retval = target_read_u32(target, NUMICRO_FLASH_ISPTRG, &status);
+ retval = target_read_u32(target, NUMICRO_FLASH_ISPTRG - m_address_bias_offset, &status);
if (retval != ERROR_OK)
return retval;
- LOG_DEBUG("status: 0x%" PRIx32 "", status);
if (status == 0)
break;
if (timeout-- <= 0) {
@@ -856,13 +1014,13 @@ static int numicro_erase(struct flash_bank *bank, unsigned int first,
}
/* check for failure */
- retval = target_read_u32(target, NUMICRO_FLASH_ISPCON, &status);
+ retval = target_read_u32(target, NUMICRO_FLASH_ISPCON - m_address_bias_offset, &status);
if (retval != ERROR_OK)
return retval;
if ((status & ISPCON_ISPFF) != 0) {
LOG_DEBUG("failure: 0x%" PRIx32 "", status);
/* if bit is set, then must write to it to clear it. */
- retval = target_write_u32(target, NUMICRO_FLASH_ISPCON, (status | ISPCON_ISPFF));
+ retval = target_write_u32(target, NUMICRO_FLASH_ISPCON - m_address_bias_offset, (status | ISPCON_ISPFF));
if (retval != ERROR_OK)
return retval;
}
@@ -889,11 +1047,12 @@ static int numicro_write(struct flash_bank *bank, const uint8_t *buffer,
LOG_INFO("Nuvoton NuMicro: Flash Write ...");
+ numicro_get_arm_arch(target);
retval = numicro_init_isp(target);
if (retval != ERROR_OK)
return retval;
- retval = target_write_u32(target, NUMICRO_FLASH_ISPCMD, ISPCMD_WRITE);
+ retval = target_write_u32(target, NUMICRO_FLASH_ISPCMD - m_address_bias_offset, ISPCMD_WRITE);
if (retval != ERROR_OK)
return retval;
@@ -913,26 +1072,34 @@ static int numicro_write(struct flash_bank *bank, const uint8_t *buffer,
/* program command */
for (uint32_t i = 0; i < count; i += 4) {
+ /* write 4 bytes each time with 0xff padding to avoid unaligned case */
+ uint8_t padding[4] = {0xff, 0xff, 0xff, 0xff};
+ memcpy(padding, buffer + i, MIN(4, count - i));
- LOG_DEBUG("write longword @ %08" PRIX32, offset + i);
-
- retval = target_write_u32(target, NUMICRO_FLASH_ISPADR, bank->base + offset + i);
+ retval = target_write_u32(target,
+ NUMICRO_FLASH_ISPADR - m_address_bias_offset,
+ bank->base + offset + i);
if (retval != ERROR_OK)
return retval;
- retval = target_write_memory(target, NUMICRO_FLASH_ISPDAT, 4, 1, buffer + i);
+ retval = target_write_memory(target,
+ NUMICRO_FLASH_ISPDAT - m_address_bias_offset,
+ 4, 1, padding);
if (retval != ERROR_OK)
return retval;
- retval = target_write_u32(target, NUMICRO_FLASH_ISPTRG, ISPTRG_ISPGO);
+ retval = target_write_u32(target,
+ NUMICRO_FLASH_ISPTRG - m_address_bias_offset,
+ ISPTRG_ISPGO);
if (retval != ERROR_OK)
return retval;
/* wait for busy to clear - check the GO flag */
timeout = 100;
for (;;) {
- retval = target_read_u32(target, NUMICRO_FLASH_ISPTRG, &status);
+ retval = target_read_u32(target,
+ NUMICRO_FLASH_ISPTRG - m_address_bias_offset,
+ &status);
if (retval != ERROR_OK)
return retval;
- LOG_DEBUG("status: 0x%" PRIx32 "", status);
if (status == 0)
break;
if (timeout-- <= 0) {
@@ -946,13 +1113,15 @@ static int numicro_write(struct flash_bank *bank, const uint8_t *buffer,
}
/* check for failure */
- retval = target_read_u32(target, NUMICRO_FLASH_ISPCON, &status);
+ retval = target_read_u32(target, NUMICRO_FLASH_ISPCON - m_address_bias_offset, &status);
if (retval != ERROR_OK)
return retval;
if ((status & ISPCON_ISPFF) != 0) {
LOG_DEBUG("failure: 0x%" PRIx32 "", status);
/* if bit is set, then must write to it to clear it. */
- retval = target_write_u32(target, NUMICRO_FLASH_ISPCON, (status | ISPCON_ISPFF));
+ retval = target_write_u32(target,
+ NUMICRO_FLASH_ISPCON - m_address_bias_offset,
+ (status | ISPCON_ISPFF));
if (retval != ERROR_OK)
return retval;
} else {
@@ -970,8 +1139,9 @@ static int numicro_get_cpu_type(struct target *target, const struct numicro_cpu_
uint32_t part_id;
int retval = ERROR_OK;
+ numicro_get_arm_arch(target);
/* Read NuMicro PartID */
- retval = target_read_u32(target, NUMICRO_SYS_BASE, &part_id);
+ retval = target_read_u32(target, NUMICRO_SYS_BASE - m_address_bias_offset, &part_id);
if (retval != ERROR_OK) {
LOG_WARNING("NuMicro flash driver: Failed to Get PartID\n");
return ERROR_FLASH_OPERATION_FAILED;
@@ -1023,7 +1193,7 @@ static int numicro_probe(struct flash_bank *bank)
return ERROR_FLASH_OPERATION_FAILED;
}
- num_pages = flash_size / NUMICRO_PAGESIZE;
+ num_pages = flash_size / m_page_size;
bank->num_sectors = num_pages;
bank->sectors = malloc(sizeof(struct flash_sector) * num_pages);
@@ -1031,10 +1201,10 @@ static int numicro_probe(struct flash_bank *bank)
for (int i = 0; i < num_pages; i++) {
bank->sectors[i].offset = offset;
- bank->sectors[i].size = NUMICRO_PAGESIZE;
+ bank->sectors[i].size = m_page_size;
bank->sectors[i].is_erased = -1;
bank->sectors[i].is_protected = 0;
- offset += NUMICRO_PAGESIZE;
+ offset += m_page_size;
}
struct numicro_flash_bank *numicro_info = bank->driver_priv;
@@ -1073,7 +1243,6 @@ FLASH_BANK_COMMAND_HANDLER(numicro_flash_bank_command)
bank->write_start_alignment = bank->write_end_alignment = 4;
return ERROR_OK;
-
}
COMMAND_HANDLER(numicro_handle_read_isp_command)
@@ -1089,6 +1258,7 @@ COMMAND_HANDLER(numicro_handle_read_isp_command)
struct target *target = get_current_target(CMD_CTX);
+ numicro_get_arm_arch(target);
retval = numicro_init_isp(target);
if (retval != ERROR_OK)
return retval;
@@ -1116,6 +1286,7 @@ COMMAND_HANDLER(numicro_handle_write_isp_command)
struct target *target = get_current_target(CMD_CTX);
+ numicro_get_arm_arch(target);
retval = numicro_init_isp(target);
if (retval != ERROR_OK)
return retval;
@@ -1138,6 +1309,7 @@ COMMAND_HANDLER(numicro_handle_chip_erase_command)
struct target *target = get_current_target(CMD_CTX);
+ numicro_get_arm_arch(target);
retval = numicro_init_isp(target);
if (retval != ERROR_OK)
return retval;
-----------------------------------------------------------------------
Summary of changes:
src/flash/nor/numicro.c | 334 ++++++++++++++++++++++++++++++++++++------------
1 file changed, 253 insertions(+), 81 deletions(-)
hooks/post-receive
--
Main OpenOCD repository
|
|
From: openocd-gerrit <ope...@us...> - 2023-01-15 15:01:55
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".
The branch, master has been updated
via 776e045de0a2ce6644ae19de99820f02628dfbcc (commit)
from 11ee500bffe488eba95cea37c99cee6b196e04ff (commit)
Those revisions listed above that are new to this repository have
not appeared on any other notification email; so we list those
revisions in full, below.
- Log -----------------------------------------------------------------
commit 776e045de0a2ce6644ae19de99820f02628dfbcc
Author: Zale Yu <cy...@nu...>
Date: Sun Nov 6 22:54:37 2022 +0800
flash/nor/numicro: reorder the parts list
This patch is picked from the flash part of OpenOCD-Nuvoton's commit
("flash: supported Nuvoton M4 series. jtag: Used HW reset instead of
auto reset. tcl: added a configuration file for Nuvoton M4 series.") [1]
It reorders Nuvoton MCU part list and spreads out the way to define the
banks' base address & size of the parts.
The code comes from the commit basically. Jian-Hong Pan tweaked for the
compatibility with current OpenOCD. So, leave the author as Zale Yu.
[1]: https://github.com/OpenNuvoton/OpenOCD-Nuvoton/commit/c2d5b8bfc705
Signed-off-by: Zale Yu <cy...@nu...>
Signed-off-by: Jian-Hong Pan <chi...@gm...>
Change-Id: I1f21f54dfdf53e5b8ea04d803347d1dbc8c321a0
Reviewed-on: https://review.openocd.org/c/openocd/+/7339
Tested-by: jenkins
Reviewed-by: Antonio Borneo <bor...@gm...>
diff --git a/src/flash/nor/numicro.c b/src/flash/nor/numicro.c
index 1a73eb26d..bafad80ce 100644
--- a/src/flash/nor/numicro.c
+++ b/src/flash/nor/numicro.c
@@ -12,6 +12,12 @@
* *
* Copyright (C) 2015 Nemui Trinomius *
* nem...@li... *
+ * *
+ * Copyright (C) 2017 Zale Yu *
+ * CY...@nu... *
+ * *
+ * Copyright (C) 2022 Jian-Hong Pan *
+ * chi...@gm... *
***************************************************************************/
#ifdef HAVE_CONFIG_H
@@ -114,1008 +120,353 @@ struct numicro_cpu_type {
struct numicro_flash_bank_type bank[NUMICRO_MAX_FLASH_BANKS];
};
-/* TODO : Support variable DataFlash region for 128kB Flash model */
-#define NUMICRO_BANKS_NUC100(aprom_size) \
- .n_banks = 4, \
- { {NUMICRO_APROM_BASE, (aprom_size)}, {NUMICRO_DATA_BASE, 4*1024}, {NUMICRO_LDROM_BASE, 4*1024}, \
- {NUMICRO_CONFIG_BASE, 1024} }
-
-#define NUMICRO_BANKS_M051(aprom_size) \
- .n_banks = 4, \
- { {NUMICRO_APROM_BASE, (aprom_size)}, {NUMICRO_DATA_BASE, 4*1024}, {NUMICRO_LDROM_BASE, 4*1024}, \
- {NUMICRO_CONFIG_BASE, 1024} }
-
-#define NUMICRO_BANKS_MINI51(aprom_size) \
- .n_banks = 3, \
- { {NUMICRO_APROM_BASE, (aprom_size)}, {NUMICRO_LDROM_BASE, 2*1024}, {NUMICRO_CONFIG_BASE, 512} }
-
-#define NUMICRO_BANKS_NANO(aprom_size) \
+/* If DataFlash size equals zero, it means the actual size depends on config settings. */
+#define NUMICRO_BANKS_GENERAL(aprom_size, data_size, ldrom_size, config_size) \
.n_banks = 4, \
- { {NUMICRO_APROM_BASE, (aprom_size)}, {NUMICRO_DATA_BASE, 4*1024}, {NUMICRO_LDROM_BASE, 4*1024}, \
- {NUMICRO_CONFIG_BASE, 1024} }
-
-#define NUMICRO_BANKS_NUC400(aprom_size) \
- .n_banks = 4, \
- { {NUMICRO_APROM_BASE, (aprom_size)}, {NUMICRO_DATA_BASE, 4*1024}, {NUMICRO_LDROM_BASE, 16*1024}, \
- {NUMICRO_CONFIG_BASE, 1024} }
-
+ {{NUMICRO_APROM_BASE, (aprom_size)}, \
+ {NUMICRO_DATA_BASE, (data_size)}, \
+ {NUMICRO_LDROM_BASE, (ldrom_size)}, \
+ {NUMICRO_CONFIG_BASE, (config_size)}}
static const struct numicro_cpu_type numicro_parts[] = {
/*PART NO*/ /*PART ID*/ /*Banks*/
- /* NUC100 Version B */
- {"NUC100LD2BN", 0x10010004, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC100LD1BN", 0x10010005, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC100LD0BN", 0x10010027, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC100LC2BN", 0x10010007, NUMICRO_BANKS_NUC100(32*1024)},
- {"NUC100LC1BN", 0x10010008, NUMICRO_BANKS_NUC100(32*1024)},
- {"NUC100LC0BN", 0x10010028, NUMICRO_BANKS_NUC100(32*1024)},
- {"NUC100LB2BN", 0x10010029, NUMICRO_BANKS_NUC100(16*1024)},
- {"NUC100LB1BN", 0x10010030, NUMICRO_BANKS_NUC100(16*1024)},
- {"NUC100LB0BN", 0x10010031, NUMICRO_BANKS_NUC100(16*1024)},
- {"NUC100LA2BN", 0x10010032, NUMICRO_BANKS_NUC100(8*1024)},
- {"NUC100LA1BN", 0x10010033, NUMICRO_BANKS_NUC100(8*1024)},
- {"NUC100LA0BN", 0x10010034, NUMICRO_BANKS_NUC100(8*1024)},
-
- {"NUC100RD2BN", 0x10010013, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC100RD1BN", 0x10010014, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC100RD0BN", 0x10010035, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC100RC2BN", 0x10010016, NUMICRO_BANKS_NUC100(32*1024)},
- {"NUC100RC1BN", 0x10010017, NUMICRO_BANKS_NUC100(32*1024)},
- {"NUC100RC0BN", 0x10010036, NUMICRO_BANKS_NUC100(32*1024)},
- {"NUC100RB2BN", 0x10010037, NUMICRO_BANKS_NUC100(16*1024)},
- {"NUC100RB1BN", 0x10010038, NUMICRO_BANKS_NUC100(16*1024)},
- {"NUC100RB0BN", 0x10010039, NUMICRO_BANKS_NUC100(16*1024)},
- {"NUC100RA2BN", 0x10010040, NUMICRO_BANKS_NUC100(8*1024)},
- {"NUC100RA1BN", 0x10010041, NUMICRO_BANKS_NUC100(8*1024)},
- {"NUC100RA0BN", 0x10010042, NUMICRO_BANKS_NUC100(8*1024)},
-
- /* NUC100 Version C */
- {"NUC100LE3CN", 0x20010000, NUMICRO_BANKS_NUC100(128*1024)},
- {"NUC100LE2CN", 0x20010001, NUMICRO_BANKS_NUC100(128*1024)},
- {"NUC100LE1CN", 0x20010002, NUMICRO_BANKS_NUC100(128*1024)},
- {"NUC100LD3CN", 0x20010003, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC100LD2CN", 0x20010004, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC100LD1CN", 0x20010005, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC100LC3CN", 0x20010006, NUMICRO_BANKS_NUC100(32*1024)},
- {"NUC100LC2CN", 0x20010007, NUMICRO_BANKS_NUC100(32*1024)},
- {"NUC100LC1CN", 0x20010008, NUMICRO_BANKS_NUC100(32*1024)},
- {"NUC100RE3CN", 0x20010009, NUMICRO_BANKS_NUC100(128*1024)},
- {"NUC100RE2CN", 0x20010010, NUMICRO_BANKS_NUC100(128*1024)},
- {"NUC100RE1CN", 0x20010011, NUMICRO_BANKS_NUC100(128*1024)},
- {"NUC100RD3CN", 0x20010012, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC100RD2CN", 0x20010013, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC100RD1CN", 0x20010014, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC100RC3CN", 0x20010015, NUMICRO_BANKS_NUC100(32*1024)},
- {"NUC100RC2CN", 0x20010016, NUMICRO_BANKS_NUC100(32*1024)},
- {"NUC100RC1CN", 0x20010017, NUMICRO_BANKS_NUC100(32*1024)},
- {"NUC100VE3CN", 0x20010018, NUMICRO_BANKS_NUC100(128*1024)},
- {"NUC100VE2CN", 0x20010019, NUMICRO_BANKS_NUC100(128*1024)},
- {"NUC100VE1CN", 0x20010020, NUMICRO_BANKS_NUC100(128*1024)},
- {"NUC100VD3CN", 0x20010021, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC100VD2CN", 0x20010022, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC100VD1CN", 0x20010023, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC100VC3CN", 0x20010024, NUMICRO_BANKS_NUC100(32*1024)},
- {"NUC100VC2CN", 0x20010025, NUMICRO_BANKS_NUC100(32*1024)},
- {"NUC100VC1CN", 0x20010026, NUMICRO_BANKS_NUC100(32*1024)},
-
- /* NUC100 Version B */
- {"NUC101YD2BN", 0x10010143, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC101YD1BN", 0x10010144, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC101YD0BN", 0x10010145, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC101YC2BN", 0x10010146, NUMICRO_BANKS_NUC100(32*1024)},
- {"NUC101YC1BN", 0x10010147, NUMICRO_BANKS_NUC100(32*1024)},
- {"NUC101YC0BN", 0x10010148, NUMICRO_BANKS_NUC100(32*1024)},
- {"NUC101YB2BN", 0x10010149, NUMICRO_BANKS_NUC100(16*1024)},
- {"NUC101YB1BN", 0x10010150, NUMICRO_BANKS_NUC100(16*1024)},
- {"NUC101YB0BN", 0x10010151, NUMICRO_BANKS_NUC100(16*1024)},
- {"NUC101YA2BN", 0x10010152, NUMICRO_BANKS_NUC100(8*1024)},
- {"NUC101YA1BN", 0x10010153, NUMICRO_BANKS_NUC100(8*1024)},
- {"NUC101YA0BN", 0x10010154, NUMICRO_BANKS_NUC100(8*1024)},
-
- {"NUC101LD2BN", 0x10010104, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC101LD1BN", 0x10010105, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC101LD0BN", 0x10010127, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC101LC2BN", 0x10010107, NUMICRO_BANKS_NUC100(32*1024)},
- {"NUC101LC1BN", 0x10010108, NUMICRO_BANKS_NUC100(32*1024)},
- {"NUC101LC0BN", 0x10010128, NUMICRO_BANKS_NUC100(32*1024)},
- {"NUC101LB2BN", 0x10010129, NUMICRO_BANKS_NUC100(16*1024)},
- {"NUC101LB1BN", 0x10010130, NUMICRO_BANKS_NUC100(16*1024)},
- {"NUC101LB0BN", 0x10010131, NUMICRO_BANKS_NUC100(16*1024)},
- {"NUC101LA2BN", 0x10010132, NUMICRO_BANKS_NUC100(8*1024)},
- {"NUC101LA1BN", 0x10010133, NUMICRO_BANKS_NUC100(8*1024)},
- {"NUC101LA0BN", 0x10010134, NUMICRO_BANKS_NUC100(8*1024)},
-
- {"NUC101RD2BN", 0x10010113, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC101RD1BN", 0x10010114, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC101RD0BN", 0x10010135, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC101RC2BN", 0x10010116, NUMICRO_BANKS_NUC100(32*1024)},
- {"NUC101RC1BN", 0x10010117, NUMICRO_BANKS_NUC100(32*1024)},
- {"NUC101RC0BN", 0x10010136, NUMICRO_BANKS_NUC100(32*1024)},
- {"NUC101RB2BN", 0x10010137, NUMICRO_BANKS_NUC100(16*1024)},
- {"NUC101RB1BN", 0x10010138, NUMICRO_BANKS_NUC100(16*1024)},
- {"NUC101RB0BN", 0x10010139, NUMICRO_BANKS_NUC100(16*1024)},
- {"NUC101RA2BN", 0x10010140, NUMICRO_BANKS_NUC100(8*1024)},
- {"NUC101RA1BN", 0x10010141, NUMICRO_BANKS_NUC100(8*1024)},
- {"NUC101RA0BN", 0x10010142, NUMICRO_BANKS_NUC100(8*1024)},
-
- /* NUC101 Version C */
- {"NUC101LE3CN", 0x20010100, NUMICRO_BANKS_NUC100(128*1024)},
- {"NUC101LE2CN", 0x20010101, NUMICRO_BANKS_NUC100(128*1024)},
- {"NUC101LE1CN", 0x20010102, NUMICRO_BANKS_NUC100(128*1024)},
- {"NUC101LD3CN", 0x20010103, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC101LD2CN", 0x20010104, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC101LD1CN", 0x20010105, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC101LC3CN", 0x20010106, NUMICRO_BANKS_NUC100(32*1024)},
- {"NUC101LC2CN", 0x20010107, NUMICRO_BANKS_NUC100(32*1024)},
- {"NUC101LC1CN", 0x20010108, NUMICRO_BANKS_NUC100(32*1024)},
- {"NUC101RE3CN", 0x20010109, NUMICRO_BANKS_NUC100(128*1024)},
- {"NUC101RE2CN", 0x20010110, NUMICRO_BANKS_NUC100(128*1024)},
- {"NUC101RE1CN", 0x20010111, NUMICRO_BANKS_NUC100(128*1024)},
-
- {"NUC101RD3CN", 0x20010112, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC101RD2CN", 0x20010113, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC101RD1CN", 0x20010114, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC101RC3CN", 0x20010115, NUMICRO_BANKS_NUC100(32*1024)},
- {"NUC101RC2CN", 0x20010116, NUMICRO_BANKS_NUC100(32*1024)},
- {"NUC101RC1CN", 0x20010117, NUMICRO_BANKS_NUC100(32*1024)},
- {"NUC101VE3CN", 0x20010118, NUMICRO_BANKS_NUC100(128*1024)},
- {"NUC101VE2CN", 0x20010119, NUMICRO_BANKS_NUC100(128*1024)},
- {"NUC101VE1CN", 0x20010120, NUMICRO_BANKS_NUC100(128*1024)},
- {"NUC101VD3CN", 0x20010121, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC101VD2CN", 0x20010122, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC101VD1CN", 0x20010123, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC101VC3CN", 0x20010124, NUMICRO_BANKS_NUC100(32*1024)},
- {"NUC101VC2CN", 0x20010125, NUMICRO_BANKS_NUC100(32*1024)},
- {"NUC101VC1CN", 0x20010126, NUMICRO_BANKS_NUC100(32*1024)},
-
- /* NUC102 Version A */
- {"NUC102ZD2AN", 0x00010231, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC102ZC1AN", 0x00010235, NUMICRO_BANKS_NUC100(32*1024)},
- {"NUC102LD2AN", 0x00010204, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC102LC1AN", 0x00010208, NUMICRO_BANKS_NUC100(32*1024)},
-
- {"NUC102RB3AN", 0x00010248, NUMICRO_BANKS_NUC100(16*1024)},
- {"NUC102RB2AN", 0x00010249, NUMICRO_BANKS_NUC100(16*1024)},
- {"NUC102RB1AN", 0x00010250, NUMICRO_BANKS_NUC100(16*1024)},
- {"NUC102RA3AN", 0x00010251, NUMICRO_BANKS_NUC100(8*1024)},
- {"NUC102RA2AN", 0x00010252, NUMICRO_BANKS_NUC100(8*1024)},
- {"NUC102RA1AN", 0x00010253, NUMICRO_BANKS_NUC100(8*1024)},
- {"NUC102VB3AN", 0x00010254, NUMICRO_BANKS_NUC100(16*1024)},
- {"NUC102VB2AN", 0x00010255, NUMICRO_BANKS_NUC100(16*1024)},
- {"NUC102VB1AN", 0x00010256, NUMICRO_BANKS_NUC100(16*1024)},
- {"NUC102VA3AN", 0x00010257, NUMICRO_BANKS_NUC100(8*1024)},
- {"NUC102VA2AN", 0x00010258, NUMICRO_BANKS_NUC100(8*1024)},
- {"NUC102VA1AN", 0x00010259, NUMICRO_BANKS_NUC100(8*1024)},
- {"NUC102LA0AN", 0x00010260, NUMICRO_BANKS_NUC100(8*1024)},
- {"NUC102LB0AN", 0x00010261, NUMICRO_BANKS_NUC100(16*1024)},
- {"NUC102LC0AN", 0x00010262, NUMICRO_BANKS_NUC100(32*1024)},
- {"NUC102LD0AN", 0x00010263, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC102RA0AN", 0x00010264, NUMICRO_BANKS_NUC100(8*1024)},
- {"NUC102RB0AN", 0x00010265, NUMICRO_BANKS_NUC100(16*1024)},
- {"NUC102RC0AN", 0x00010266, NUMICRO_BANKS_NUC100(32*1024)},
- {"NUC102RD0AN", 0x00010267, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC102VA0AN", 0x00010268, NUMICRO_BANKS_NUC100(8*1024)},
- {"NUC102VB0AN", 0x00010269, NUMICRO_BANKS_NUC100(16*1024)},
- {"NUC102VC0AN", 0x00010270, NUMICRO_BANKS_NUC100(32*1024)},
- {"NUC102VD0AN", 0x00010271, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC102ZA0AN", 0x00010272, NUMICRO_BANKS_NUC100(8*1024)},
- {"NUC102ZB0AN", 0x00010273, NUMICRO_BANKS_NUC100(16*1024)},
- {"NUC102ZC0AN", 0x00010274, NUMICRO_BANKS_NUC100(32*1024)},
- {"NUC102ZD0AN", 0x00010275, NUMICRO_BANKS_NUC100(64*1024)},
-
- /* NUC102 Version A */
- {"NUC122LD2AN", 0x00012204, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC122LD1AN", 0x00012205, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC122LC2AN", 0x00012207, NUMICRO_BANKS_NUC100(32*1024)},
- {"NUC122LC1AN", 0x00012208, NUMICRO_BANKS_NUC100(32*1024)},
- {"NUC122RD2AN", 0x00012213, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC122RD1AN", 0x00012214, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC122RC2AN", 0x00012216, NUMICRO_BANKS_NUC100(32*1024)},
- {"NUC122RC1AN", 0x00012217, NUMICRO_BANKS_NUC100(32*1024)},
- {"NUC122SD2AN", 0x00012222, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC122SD1AN", 0x00012223, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC122SC2AN", 0x00012225, NUMICRO_BANKS_NUC100(32*1024)},
- {"NUC122SC1AN", 0x00012226, NUMICRO_BANKS_NUC100(32*1024)},
- {"NUC122ZD2AN", 0x00012231, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC122ZD1AN", 0x00012232, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC122ZC2AN", 0x00012234, NUMICRO_BANKS_NUC100(32*1024)},
- {"NUC122ZC1AN", 0x00012235, NUMICRO_BANKS_NUC100(32*1024)},
- {"NUC122ZB2AN", 0x00012237, NUMICRO_BANKS_NUC100(16*1024)},
- {"NUC122ZB1AN", 0x00012238, NUMICRO_BANKS_NUC100(16*1024)},
- {"NUC122ZA2AN", 0x00012240, NUMICRO_BANKS_NUC100(8*1024)},
- {"NUC122ZA1AN", 0x00012241, NUMICRO_BANKS_NUC100(8*1024)},
- {"NUC122LB2AN", 0x00012243, NUMICRO_BANKS_NUC100(16*1024)},
- {"NUC122LB1AN", 0x00012244, NUMICRO_BANKS_NUC100(16*1024)},
- {"NUC122LA2AN", 0x00012246, NUMICRO_BANKS_NUC100(8*1024)},
- {"NUC122LA1AN", 0x00012247, NUMICRO_BANKS_NUC100(8*1024)},
- {"NUC122RB2AN", 0x00012249, NUMICRO_BANKS_NUC100(16*1024)},
- {"NUC122RB1AN", 0x00012250, NUMICRO_BANKS_NUC100(16*1024)},
- {"NUC122RA2AN", 0x00012252, NUMICRO_BANKS_NUC100(8*1024)},
- {"NUC122RA1AN", 0x00012253, NUMICRO_BANKS_NUC100(8*1024)},
- {"NUC122SB2AN", 0x00012255, NUMICRO_BANKS_NUC100(16*1024)},
- {"NUC122SB1AN", 0x00012256, NUMICRO_BANKS_NUC100(16*1024)},
- {"NUC122SA2AN", 0x00012258, NUMICRO_BANKS_NUC100(8*1024)},
- {"NUC122SA1AN", 0x00012259, NUMICRO_BANKS_NUC100(8*1024)},
- {"NUC122LA0AN", 0x00012260, NUMICRO_BANKS_NUC100(8*1024)},
- {"NUC122LB0AN", 0x00012261, NUMICRO_BANKS_NUC100(16*1024)},
- {"NUC122LC0AN", 0x00012262, NUMICRO_BANKS_NUC100(32*1024)},
- {"NUC122LD0AN", 0x00012263, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC122RA0AN", 0x00012264, NUMICRO_BANKS_NUC100(8*1024)},
- {"NUC122RB0AN", 0x00012265, NUMICRO_BANKS_NUC100(16*1024)},
- {"NUC122RC0AN", 0x00012266, NUMICRO_BANKS_NUC100(32*1024)},
- {"NUC122RD0AN", 0x00012267, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC122SA0AN", 0x00012268, NUMICRO_BANKS_NUC100(8*1024)},
- {"NUC122SB0AN", 0x00012269, NUMICRO_BANKS_NUC100(16*1024)},
- {"NUC122SC0AN", 0x00012270, NUMICRO_BANKS_NUC100(32*1024)},
- {"NUC122SD0AN", 0x00012271, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC122ZA0AN", 0x00012272, NUMICRO_BANKS_NUC100(8*1024)},
- {"NUC122ZB0AN", 0x00012273, NUMICRO_BANKS_NUC100(16*1024)},
- {"NUC122ZC0AN", 0x00012274, NUMICRO_BANKS_NUC100(32*1024)},
- {"NUC122ZD0AN", 0x00012275, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC122YD2AN", 0x00012277, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC122YD1AN", 0x00012278, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC122YD0AN", 0x00012279, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC122YC2AN", 0x00012281, NUMICRO_BANKS_NUC100(32*1024)},
- {"NUC122YC1AN", 0x00012282, NUMICRO_BANKS_NUC100(32*1024)},
- {"NUC122YC0AN", 0x00012283, NUMICRO_BANKS_NUC100(32*1024)},
- {"NUC122YB2AN", 0x00012285, NUMICRO_BANKS_NUC100(16*1024)},
- {"NUC122YB1AN", 0x00012286, NUMICRO_BANKS_NUC100(16*1024)},
- {"NUC122YB0AN", 0x00012287, NUMICRO_BANKS_NUC100(16*1024)},
- {"NUC122YA2AN", 0x00012289, NUMICRO_BANKS_NUC100(8*1024)},
- {"NUC122YA1AN", 0x00012290, NUMICRO_BANKS_NUC100(8*1024)},
- {"NUC122YA0AN", 0x00012291, NUMICRO_BANKS_NUC100(8*1024)},
-
- /* NUC120 Version C */
- {"NUC120LD2BN", 0x10012004, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC120LD1BN", 0x10012005, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC120LD0BN", 0x10012027, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC120LC2BN", 0x10012007, NUMICRO_BANKS_NUC100(32*1024)},
- {"NUC120LC1BN", 0x10012008, NUMICRO_BANKS_NUC100(32*1024)},
- {"NUC120LC0BN", 0x10012028, NUMICRO_BANKS_NUC100(32*1024)},
- {"NUC120LB2BN", 0x10012029, NUMICRO_BANKS_NUC100(16*1024)},
- {"NUC120LB1BN", 0x10012030, NUMICRO_BANKS_NUC100(16*1024)},
- {"NUC120LB0BN", 0x10012031, NUMICRO_BANKS_NUC100(16*1024)},
- {"NUC120LA2BN", 0x10012032, NUMICRO_BANKS_NUC100(8*1024)},
- {"NUC120LA1BN", 0x10012033, NUMICRO_BANKS_NUC100(8*1024)},
- {"NUC120LA0BN", 0x10012034, NUMICRO_BANKS_NUC100(8*1024)},
-
- {"NUC120RD2BN", 0x10012013, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC120RD1BN", 0x10012014, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC120RD0BN", 0x10012035, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC120RC2BN", 0x10012016, NUMICRO_BANKS_NUC100(32*1024)},
- {"NUC120RC1BN", 0x10012017, NUMICRO_BANKS_NUC100(32*1024)},
- {"NUC120RC0BN", 0x10012036, NUMICRO_BANKS_NUC100(32*1024)},
- {"NUC120RB2BN", 0x10012037, NUMICRO_BANKS_NUC100(16*1024)},
- {"NUC120RB1BN", 0x10012038, NUMICRO_BANKS_NUC100(16*1024)},
- {"NUC120RB0BN", 0x10012039, NUMICRO_BANKS_NUC100(16*1024)},
- {"NUC120RA2BN", 0x10012040, NUMICRO_BANKS_NUC100(8*1024)},
- {"NUC120RA1BN", 0x10012041, NUMICRO_BANKS_NUC100(8*1024)},
- {"NUC120RA0BN", 0x10012042, NUMICRO_BANKS_NUC100(8*1024)},
-
- /* NUC120 Version C */
- {"NUC120LE3CN", 0x20012000, NUMICRO_BANKS_NUC100(128*1024)},
- {"NUC120LE2CN", 0x20012001, NUMICRO_BANKS_NUC100(128*1024)},
- {"NUC120LE1CN", 0x20012002, NUMICRO_BANKS_NUC100(128*1024)},
- {"NUC120LD3CN", 0x20012003, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC120LD2CN", 0x20012004, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC120LD1CN", 0x20012005, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC120LC3CN", 0x20012006, NUMICRO_BANKS_NUC100(32*1024)},
- {"NUC120LC2CN", 0x20012007, NUMICRO_BANKS_NUC100(32*1024)},
- {"NUC120LC1CN", 0x20012008, NUMICRO_BANKS_NUC100(32*1024)},
- {"NUC120RE3CN", 0x20012009, NUMICRO_BANKS_NUC100(128*1024)},
- {"NUC120RE2CN", 0x20012010, NUMICRO_BANKS_NUC100(128*1024)},
- {"NUC120RE1CN", 0x20012011, NUMICRO_BANKS_NUC100(128*1024)},
-
- {"NUC120RD3CN", 0x20012012, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC120RD2CN", 0x20012013, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC120RD1CN", 0x20012014, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC120RC3CN", 0x20012015, NUMICRO_BANKS_NUC100(32*1024)},
- {"NUC120RC2CN", 0x20012016, NUMICRO_BANKS_NUC100(32*1024)},
- {"NUC120RC1CN", 0x20012017, NUMICRO_BANKS_NUC100(32*1024)},
- {"NUC120VE3CN", 0x20012018, NUMICRO_BANKS_NUC100(128*1024)},
- {"NUC120VE2CN", 0x20012019, NUMICRO_BANKS_NUC100(128*1024)},
- {"NUC120VE1CN", 0x20012020, NUMICRO_BANKS_NUC100(128*1024)},
- {"NUC120VD3CN", 0x20012021, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC120VD2CN", 0x20012022, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC120VD1CN", 0x20012023, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC120VC3CN", 0x20012024, NUMICRO_BANKS_NUC100(32*1024)},
- {"NUC120VC2CN", 0x20012025, NUMICRO_BANKS_NUC100(32*1024)},
- {"NUC120VC1CN", 0x20012026, NUMICRO_BANKS_NUC100(32*1024)},
-
- /* NUC120 Version B */
- {"NUC130LD2BN", 0x10013004, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC130LD1BN", 0x10013005, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC130LD0BN", 0x10013027, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC130LC2BN", 0x10013007, NUMICRO_BANKS_NUC100(32*1024)},
- {"NUC130LC1BN", 0x10013008, NUMICRO_BANKS_NUC100(32*1024)},
- {"NUC130LC0BN", 0x10013028, NUMICRO_BANKS_NUC100(32*1024)},
- {"NUC130LB2BN", 0x10013029, NUMICRO_BANKS_NUC100(16*1024)},
- {"NUC130LB1BN", 0x10013030, NUMICRO_BANKS_NUC100(16*1024)},
- {"NUC130LB0BN", 0x10013031, NUMICRO_BANKS_NUC100(16*1024)},
- {"NUC130LA2BN", 0x10013032, NUMICRO_BANKS_NUC100(8*1024)},
- {"NUC130LA1BN", 0x10013033, NUMICRO_BANKS_NUC100(8*1024)},
- {"NUC130LA0BN", 0x10013034, NUMICRO_BANKS_NUC100(8*1024)},
-
- {"NUC130RD2BN", 0x10013013, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC130RD1BN", 0x10013014, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC130RD0BN", 0x10013035, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC130RC2BN", 0x10013016, NUMICRO_BANKS_NUC100(32*1024)},
- {"NUC130RC1BN", 0x10013017, NUMICRO_BANKS_NUC100(32*1024)},
- {"NUC130RC0BN", 0x10013036, NUMICRO_BANKS_NUC100(32*1024)},
- {"NUC130RB2BN", 0x10013037, NUMICRO_BANKS_NUC100(16*1024)},
- {"NUC130RB1BN", 0x10013038, NUMICRO_BANKS_NUC100(16*1024)},
- {"NUC130RB0BN", 0x10013039, NUMICRO_BANKS_NUC100(16*1024)},
- {"NUC130RA2BN", 0x10013040, NUMICRO_BANKS_NUC100(8*1024)},
- {"NUC130RA1BN", 0x10013041, NUMICRO_BANKS_NUC100(8*1024)},
- {"NUC130RA0BN", 0x10013042, NUMICRO_BANKS_NUC100(8*1024)},
-
- /* NUC130 Version C */
- {"NUC130LE3CN", 0x20013000, NUMICRO_BANKS_NUC100(128*1024)},
- {"NUC130LE2CN", 0x20013001, NUMICRO_BANKS_NUC100(128*1024)},
- {"NUC130LE1CN", 0x20013002, NUMICRO_BANKS_NUC100(128*1024)},
- {"NUC130LD3CN", 0x20013003, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC130LD2CN", 0x20013004, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC130LD1CN", 0x20013005, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC130LC3CN", 0x20013006, NUMICRO_BANKS_NUC100(32*1024)},
- {"NUC130LC2CN", 0x20013007, NUMICRO_BANKS_NUC100(32*1024)},
- {"NUC130LC1CN", 0x20013008, NUMICRO_BANKS_NUC100(32*1024)},
- {"NUC130RE3CN", 0x20013009, NUMICRO_BANKS_NUC100(128*1024)},
- {"NUC130RE2CN", 0x20013010, NUMICRO_BANKS_NUC100(128*1024)},
- {"NUC130RE1CN", 0x20013011, NUMICRO_BANKS_NUC100(128*1024)},
-
- {"NUC130RD3CN", 0x20013012, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC130RD2CN", 0x20013013, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC130RD1CN", 0x20013014, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC130RC3CN", 0x20013015, NUMICRO_BANKS_NUC100(32*1024)},
- {"NUC130RC2CN", 0x20013016, NUMICRO_BANKS_NUC100(32*1024)},
- {"NUC130RC1CN", 0x20013017, NUMICRO_BANKS_NUC100(32*1024)},
- {"NUC130VE3CN", 0x20013018, NUMICRO_BANKS_NUC100(128*1024)},
- {"NUC130VE2CN", 0x20013019, NUMICRO_BANKS_NUC100(128*1024)},
- {"NUC130VE1CN", 0x20013020, NUMICRO_BANKS_NUC100(128*1024)},
- {"NUC130VD3CN", 0x20013021, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC130VD2CN", 0x20013022, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC130VD1CN", 0x20013023, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC130VC3CN", 0x20013024, NUMICRO_BANKS_NUC100(32*1024)},
- {"NUC130VC2CN", 0x20013025, NUMICRO_BANKS_NUC100(32*1024)},
- {"NUC130VC1CN", 0x20013026, NUMICRO_BANKS_NUC100(32*1024)},
-
- /* NUC140 Version B */
- {"NUC140LD2BN", 0x10014004, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC140LD1BN", 0x10014005, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC140LD0BN", 0x10014027, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC140LC2BN", 0x10014007, NUMICRO_BANKS_NUC100(32*1024)},
- {"NUC140LC1BN", 0x10014008, NUMICRO_BANKS_NUC100(32*1024)},
- {"NUC140LC0BN", 0x10014028, NUMICRO_BANKS_NUC100(32*1024)},
- {"NUC140LB2BN", 0x10014029, NUMICRO_BANKS_NUC100(16*1024)},
- {"NUC140LB1BN", 0x10014030, NUMICRO_BANKS_NUC100(16*1024)},
- {"NUC140LB0BN", 0x10014031, NUMICRO_BANKS_NUC100(16*1024)},
- {"NUC140LA2BN", 0x10014032, NUMICRO_BANKS_NUC100(8*1024)},
- {"NUC140LA1BN", 0x10014033, NUMICRO_BANKS_NUC100(8*1024)},
- {"NUC140LA0BN", 0x10014034, NUMICRO_BANKS_NUC100(8*1024)},
-
- {"NUC140RD2BN", 0x10014013, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC140RD1BN", 0x10014014, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC140RD0BN", 0x10014035, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC140RC2BN", 0x10014016, NUMICRO_BANKS_NUC100(32*1024)},
- {"NUC140RC1BN", 0x10014017, NUMICRO_BANKS_NUC100(32*1024)},
- {"NUC140RC0BN", 0x10014036, NUMICRO_BANKS_NUC100(32*1024)},
- {"NUC140RB2BN", 0x10014037, NUMICRO_BANKS_NUC100(16*1024)},
- {"NUC140RB1BN", 0x10014038, NUMICRO_BANKS_NUC100(16*1024)},
- {"NUC140RB0BN", 0x10014039, NUMICRO_BANKS_NUC100(16*1024)},
- {"NUC140RA2BN", 0x10014040, NUMICRO_BANKS_NUC100(8*1024)},
- {"NUC140RA1BN", 0x10014041, NUMICRO_BANKS_NUC100(8*1024)},
- {"NUC140RA0BN", 0x10014042, NUMICRO_BANKS_NUC100(8*1024)},
-
- /* NUC140 Version C */
- {"NUC140LE3CN", 0x20014000, NUMICRO_BANKS_NUC100(128*1024)},
- {"NUC140LE2CN", 0x20014001, NUMICRO_BANKS_NUC100(128*1024)},
- {"NUC140LE1CN", 0x20014002, NUMICRO_BANKS_NUC100(128*1024)},
- {"NUC140LD3CN", 0x20014003, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC140LD2CN", 0x20014004, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC140LD1CN", 0x20014005, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC140LC3CN", 0x20014006, NUMICRO_BANKS_NUC100(32*1024)},
- {"NUC140LC2CN", 0x20014007, NUMICRO_BANKS_NUC100(32*1024)},
- {"NUC140LC1CN", 0x20014008, NUMICRO_BANKS_NUC100(32*1024)},
- {"NUC140RE3CN", 0x20014009, NUMICRO_BANKS_NUC100(128*1024)},
- {"NUC140RE2CN", 0x20014010, NUMICRO_BANKS_NUC100(128*1024)},
- {"NUC140RE1CN", 0x20014011, NUMICRO_BANKS_NUC100(128*1024)},
-
- {"NUC140RD3CN", 0x20014012, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC140RD2CN", 0x20014013, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC140RD1CN", 0x20014014, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC140RC3CN", 0x20014015, NUMICRO_BANKS_NUC100(32*1024)},
- {"NUC140RC2CN", 0x20014016, NUMICRO_BANKS_NUC100(32*1024)},
- {"NUC140RC1CN", 0x20014017, NUMICRO_BANKS_NUC100(32*1024)},
- {"NUC140VE3CN", 0x20014018, NUMICRO_BANKS_NUC100(128*1024)},
- {"NUC140VE2CN", 0x20014019, NUMICRO_BANKS_NUC100(128*1024)},
- {"NUC140VE1CN", 0x20014020, NUMICRO_BANKS_NUC100(128*1024)},
- {"NUC140VD3CN", 0x20014021, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC140VD2CN", 0x20014022, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC140VD1CN", 0x20014023, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC140VC3CN", 0x20014024, NUMICRO_BANKS_NUC100(32*1024)},
- {"NUC140VC2CN", 0x20014025, NUMICRO_BANKS_NUC100(32*1024)},
- {"NUC140VC1CN", 0x20014026, NUMICRO_BANKS_NUC100(32*1024)},
-
- /* NUC100 Version A */
- {"NUC100LE3AN", 0x00010000, NUMICRO_BANKS_NUC100(128*1024)},
- {"NUC100LE2AN", 0x00010001, NUMICRO_BANKS_NUC100(128*1024)},
- {"NUC100LE1AN", 0x00010002, NUMICRO_BANKS_NUC100(128*1024)},
- {"NUC100LD3AN", 0x00010003, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC100LD2AN", 0x00010004, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC100LD1AN", 0x00010005, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC100LC3AN", 0x00010006, NUMICRO_BANKS_NUC100(32*1024)},
- {"NUC100LC2AN", 0x00010007, NUMICRO_BANKS_NUC100(32*1024)},
- {"NUC100LC1AN", 0x00010008, NUMICRO_BANKS_NUC100(32*1024)},
- {"NUC100RE3AN", 0x00010009, NUMICRO_BANKS_NUC100(128*1024)},
- {"NUC100RE2AN", 0x00010010, NUMICRO_BANKS_NUC100(128*1024)},
- {"NUC100RE1AN", 0x00010011, NUMICRO_BANKS_NUC100(128*1024)},
- {"NUC100RD3AN", 0x00010012, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC100RD2AN", 0x00010013, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC100RD1AN", 0x00010014, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC100RC3AN", 0x00010015, NUMICRO_BANKS_NUC100(32*1024)},
- {"NUC100RC2AN", 0x00010016, NUMICRO_BANKS_NUC100(32*1024)},
- {"NUC100RC1AN", 0x00010017, NUMICRO_BANKS_NUC100(32*1024)},
- {"NUC100VE3AN", 0x00010018, NUMICRO_BANKS_NUC100(128*1024)},
- {"NUC100VE2AN", 0x00010019, NUMICRO_BANKS_NUC100(128*1024)},
- {"NUC100VE1AN", 0x00010020, NUMICRO_BANKS_NUC100(128*1024)},
- {"NUC100VD3AN", 0x00010021, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC100VD2AN", 0x00010022, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC100VD1AN", 0x00010023, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC100VC3AN", 0x00010024, NUMICRO_BANKS_NUC100(32*1024)},
- {"NUC100VC2AN", 0x00010025, NUMICRO_BANKS_NUC100(32*1024)},
- {"NUC100VC1AN", 0x00010026, NUMICRO_BANKS_NUC100(32*1024)},
-
- /* NUC100 Version A */
- {"NUC101LE3AN", 0x00010100, NUMICRO_BANKS_NUC100(128*1024)},
- {"NUC101LE2AN", 0x00010101, NUMICRO_BANKS_NUC100(128*1024)},
- {"NUC101LE1AN", 0x00010102, NUMICRO_BANKS_NUC100(128*1024)},
- {"NUC101LD3AN", 0x00010103, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC101LD2AN", 0x00010104, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC101LD1AN", 0x00010105, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC101LC3AN", 0x00010106, NUMICRO_BANKS_NUC100(32*1024)},
- {"NUC101LC2AN", 0x00010107, NUMICRO_BANKS_NUC100(32*1024)},
- {"NUC101LC1AN", 0x00010108, NUMICRO_BANKS_NUC100(32*1024)},
- {"NUC101RE3AN", 0x00010109, NUMICRO_BANKS_NUC100(128*1024)},
- {"NUC101RE2AN", 0x00010110, NUMICRO_BANKS_NUC100(128*1024)},
- {"NUC101RE1AN", 0x00010111, NUMICRO_BANKS_NUC100(128*1024)},
- {"NUC101RD3AN", 0x00010112, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC101RD2AN", 0x00010113, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC101RD1AN", 0x00010114, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC101RC3AN", 0x00010115, NUMICRO_BANKS_NUC100(32*1024)},
- {"NUC101RC2AN", 0x00010116, NUMICRO_BANKS_NUC100(32*1024)},
- {"NUC101RC1AN", 0x00010117, NUMICRO_BANKS_NUC100(32*1024)},
- {"NUC101VE3AN", 0x00010118, NUMICRO_BANKS_NUC100(128*1024)},
- {"NUC101VE2AN", 0x00010119, NUMICRO_BANKS_NUC100(128*1024)},
- {"NUC101VE1AN", 0x00010120, NUMICRO_BANKS_NUC100(128*1024)},
- {"NUC101VD3AN", 0x00010121, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC101VD2AN", 0x00010122, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC101VD1AN", 0x00010123, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC101VC3AN", 0x00010124, NUMICRO_BANKS_NUC100(32*1024)},
- {"NUC101VC2AN", 0x00010125, NUMICRO_BANKS_NUC100(32*1024)},
- {"NUC101VC1AN", 0x00010126, NUMICRO_BANKS_NUC100(32*1024)},
-
- /* NUC120 Version A */
- {"NUC120LE3AN", 0x00012000, NUMICRO_BANKS_NUC100(128*1024)},
- {"NUC120LE2AN", 0x00012001, NUMICRO_BANKS_NUC100(128*1024)},
- {"NUC120LE1AN", 0x00012002, NUMICRO_BANKS_NUC100(128*1024)},
- {"NUC120LD3AN", 0x00012003, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC120LD2AN", 0x00012004, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC120LD1AN", 0x00012005, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC120LC3AN", 0x00012006, NUMICRO_BANKS_NUC100(32*1024)},
- {"NUC120LC2AN", 0x00012007, NUMICRO_BANKS_NUC100(32*1024)},
- {"NUC120LC1AN", 0x00012008, NUMICRO_BANKS_NUC100(32*1024)},
- {"NUC120RE3AN", 0x00012009, NUMICRO_BANKS_NUC100(128*1024)},
- {"NUC120RE2AN", 0x00012010, NUMICRO_BANKS_NUC100(128*1024)},
- {"NUC120RE1AN", 0x00012011, NUMICRO_BANKS_NUC100(128*1024)},
- {"NUC120RD3AN", 0x00012012, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC120RD2AN", 0x00012013, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC120RD1AN", 0x00012014, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC120RC3AN", 0x00012015, NUMICRO_BANKS_NUC100(32*1024)},
- {"NUC120RC2AN", 0x00012016, NUMICRO_BANKS_NUC100(32*1024)},
- {"NUC120RC1AN", 0x00012017, NUMICRO_BANKS_NUC100(32*1024)},
- {"NUC120VE3AN", 0x00012018, NUMICRO_BANKS_NUC100(128*1024)},
- {"NUC120VE2AN", 0x00012019, NUMICRO_BANKS_NUC100(128*1024)},
- {"NUC120VE1AN", 0x00012020, NUMICRO_BANKS_NUC100(128*1024)},
- {"NUC120VD3AN", 0x00012021, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC120VD2AN", 0x00012022, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC120VD1AN", 0x00012023, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC120VC3AN", 0x00012024, NUMICRO_BANKS_NUC100(32*1024)},
- {"NUC120VC2AN", 0x00012025, NUMICRO_BANKS_NUC100(32*1024)},
- {"NUC120VC1AN", 0x00012026, NUMICRO_BANKS_NUC100(32*1024)},
-
- /* NUC120 Version A */
- {"NUC130LE3AN", 0x00013000, NUMICRO_BANKS_NUC100(128*1024)},
- {"NUC130LE2AN", 0x00013001, NUMICRO_BANKS_NUC100(128*1024)},
- {"NUC130LE1AN", 0x00013002, NUMICRO_BANKS_NUC100(128*1024)},
- {"NUC130LD3AN", 0x00013003, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC130LD2AN", 0x00013004, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC130LD1AN", 0x00013005, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC130LC3AN", 0x00013006, NUMICRO_BANKS_NUC100(32*1024)},
- {"NUC130LC2AN", 0x00013007, NUMICRO_BANKS_NUC100(32*1024)},
- {"NUC130LC1AN", 0x00013008, NUMICRO_BANKS_NUC100(32*1024)},
- {"NUC130RE3AN", 0x00013009, NUMICRO_BANKS_NUC100(128*1024)},
- {"NUC130RE2AN", 0x00013010, NUMICRO_BANKS_NUC100(128*1024)},
- {"NUC130RE1AN", 0x00013011, NUMICRO_BANKS_NUC100(128*1024)},
- {"NUC130RD3AN", 0x00013012, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC130RD2AN", 0x00013013, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC130RD1AN", 0x00013014, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC130RC3AN", 0x00013015, NUMICRO_BANKS_NUC100(32*1024)},
- {"NUC130RC2AN", 0x00013016, NUMICRO_BANKS_NUC100(32*1024)},
- {"NUC130RC1AN", 0x00013017, NUMICRO_BANKS_NUC100(32*1024)},
- {"NUC130VE3AN", 0x00013018, NUMICRO_BANKS_NUC100(128*1024)},
- {"NUC130VE2AN", 0x00013019, NUMICRO_BANKS_NUC100(128*1024)},
- {"NUC130VE1AN", 0x00013020, NUMICRO_BANKS_NUC100(128*1024)},
- {"NUC130VD3AN", 0x00013021, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC130VD2AN", 0x00013022, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC130VD1AN", 0x00013023, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC130VC3AN", 0x00013024, NUMICRO_BANKS_NUC100(32*1024)},
- {"NUC130VC2AN", 0x00013025, NUMICRO_BANKS_NUC100(32*1024)},
- {"NUC130VC1AN", 0x00013026, NUMICRO_BANKS_NUC100(32*1024)},
-
- /* NUC140 Version A */
- {"NUC140LE3AN", 0x00014000, NUMICRO_BANKS_NUC100(128*1024)},
- {"NUC140LE2AN", 0x00014001, NUMICRO_BANKS_NUC100(128*1024)},
- {"NUC140LE1AN", 0x00014002, NUMICRO_BANKS_NUC100(128*1024)},
- {"NUC140LD3AN", 0x00014003, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC140LD2AN", 0x00014004, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC140LD1AN", 0x00014005, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC140LC3AN", 0x00014006, NUMICRO_BANKS_NUC100(32*1024)},
- {"NUC140LC2AN", 0x00014007, NUMICRO_BANKS_NUC100(32*1024)},
- {"NUC140LC1AN", 0x00014008, NUMICRO_BANKS_NUC100(32*1024)},
- {"NUC140RE3AN", 0x00014009, NUMICRO_BANKS_NUC100(128*1024)},
- {"NUC140RE2AN", 0x00014010, NUMICRO_BANKS_NUC100(128*1024)},
- {"NUC140RE1AN", 0x00014011, NUMICRO_BANKS_NUC100(128*1024)},
- {"NUC140RD3AN", 0x00014012, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC140RD2AN", 0x00014013, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC140RD1AN", 0x00014014, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC140RC3AN", 0x00014015, NUMICRO_BANKS_NUC100(32*1024)},
- {"NUC140RC2AN", 0x00014016, NUMICRO_BANKS_NUC100(32*1024)},
- {"NUC140RC1AN", 0x00014017, NUMICRO_BANKS_NUC100(32*1024)},
- {"NUC140VE3AN", 0x00014018, NUMICRO_BANKS_NUC100(128*1024)},
- {"NUC140VE2AN", 0x00014019, NUMICRO_BANKS_NUC100(128*1024)},
- {"NUC140VE1AN", 0x00014020, NUMICRO_BANKS_NUC100(128*1024)},
- {"NUC140VD3AN", 0x00014021, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC140VD2AN", 0x00014022, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC140VD1AN", 0x00014023, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC140VC3AN", 0x00014024, NUMICRO_BANKS_NUC100(32*1024)},
- {"NUC140VC2AN", 0x00014025, NUMICRO_BANKS_NUC100(32*1024)},
- {"NUC140VC1AN", 0x00014026, NUMICRO_BANKS_NUC100(32*1024)},
-
-
- /* M052 */
- {"M052LAN" , 0x00005200, NUMICRO_BANKS_M051(8*1024)},
- {"M052PAN" , 0x00005201, NUMICRO_BANKS_M051(8*1024)},
- {"M052YAN" , 0x00005202, NUMICRO_BANKS_M051(8*1024)},
- {"M052ZAN" , 0x00005203, NUMICRO_BANKS_M051(8*1024)},
-
- /* M054 */
- {"M054LAN" , 0x00005400, NUMICRO_BANKS_M051(16*1024)},
- {"M054PAN" , 0x00005401, NUMICRO_BANKS_M051(16*1024)},
- {"M054YAN" , 0x00005402, NUMICRO_BANKS_M051(16*1024)},
- {"M054ZAN" , 0x00005403, NUMICRO_BANKS_M051(16*1024)},
-
- /* M058 */
- {"M058LAN" , 0x00005800, NUMICRO_BANKS_M051(32*1024)},
- {"M058PAN" , 0x00005801, NUMICRO_BANKS_M051(32*1024)},
- {"M058YAN" , 0x00005802, NUMICRO_BANKS_M051(32*1024)},
- {"M058ZAN" , 0x00005803, NUMICRO_BANKS_M051(32*1024)},
-
- /* M0516 */
- {"M0516LAN" , 0x00005A00, NUMICRO_BANKS_M051(64*1024)},
- {"M0516PAN" , 0x00005A01, NUMICRO_BANKS_M051(64*1024)},
- {"M0516YAN" , 0x00005A02, NUMICRO_BANKS_M051(64*1024)},
- {"M0516ZAN" , 0x00005A03, NUMICRO_BANKS_M051(64*1024)},
- {"M051LBN" , 0x10005100, NUMICRO_BANKS_M051(4*1024)},
- {"M051PBN" , 0x10005101, NUMICRO_BANKS_M051(4*1024)},
- {"M051YBN" , 0x10005102, NUMICRO_BANKS_M051(4*1024)},
- {"M051ZBN" , 0x10005103, NUMICRO_BANKS_M051(4*1024)},
- {"M052LBN" , 0x10005200, NUMICRO_BANKS_M051(8*1024)},
- {"M052PBN" , 0x10005201, NUMICRO_BANKS_M051(8*1024)},
- {"M052YBN" , 0x10005202, NUMICRO_BANKS_M051(8*1024)},
- {"M052ZBN" , 0x10005203, NUMICRO_BANKS_M051(8*1024)},
- {"M054LBN" , 0x10005400, NUMICRO_BANKS_M051(16*1024)},
- {"M054PBN" , 0x10005401, NUMICRO_BANKS_M051(16*1024)},
- {"M054YBN" , 0x10005402, NUMICRO_BANKS_M051(16*1024)},
- {"M054ZBN" , 0x10005403, NUMICRO_BANKS_M051(16*1024)},
- {"M058LBN" , 0x10005800, NUMICRO_BANKS_M051(32*1024)},
- {"M058PBN" , 0x10005801, NUMICRO_BANKS_M051(32*1024)},
- {"M058YBN" , 0x10005802, NUMICRO_BANKS_M051(32*1024)},
- {"M058ZBN" , 0x10005803, NUMICRO_BANKS_M051(32*1024)},
- {"M0516LBN" , 0x10005A00, NUMICRO_BANKS_M051(64*1024)},
- {"M0516PBN" , 0x10005A01, NUMICRO_BANKS_M051(64*1024)},
- {"M0516YBN" , 0x10005A02, NUMICRO_BANKS_M051(64*1024)},
- {"M0516ZBN" , 0x10005A03, NUMICRO_BANKS_M051(64*1024)},
- {"M052LDN" , 0x20005200, NUMICRO_BANKS_M051(8*1024)},
- {"M054LDN" , 0x20005400, NUMICRO_BANKS_M051(16*1024)},
- {"M058LDN" , 0x20005800, NUMICRO_BANKS_M051(32*1024)},
- {"M0516LDN" , 0x20005A00, NUMICRO_BANKS_M051(64*1024)},
- {"M052ZDN" , 0x20005203, NUMICRO_BANKS_M051(8*1024)},
- {"M054ZDN" , 0x20005403, NUMICRO_BANKS_M051(16*1024)},
- {"M058ZDN" , 0x20005803, NUMICRO_BANKS_M051(32*1024)},
- {"M0516ZDN" , 0x20005A03, NUMICRO_BANKS_M051(64*1024)},
- {"M052TDN" , 0x20005204, NUMICRO_BANKS_M051(8*1024)},
- {"M054TDN" , 0x20005404, NUMICRO_BANKS_M051(16*1024)},
- {"M058TDN" , 0x20005804, NUMICRO_BANKS_M051(32*1024)},
- {"M0516TDN" , 0x20005A04, NUMICRO_BANKS_M051(64*1024)},
- {"M052XDN" , 0x20005205, NUMICRO_BANKS_M051(8*1024)},
- {"M054XDN" , 0x20005405, NUMICRO_BANKS_M051(16*1024)},
- {"M058XDN" , 0x20005805, NUMICRO_BANKS_M051(32*1024)},
- {"M0516XDN" , 0x20005A05, NUMICRO_BANKS_M051(64*1024)},
- {"M052LDE" , 0x30005200, NUMICRO_BANKS_M051(8*1024)},
- {"M054LDE" , 0x30005400, NUMICRO_BANKS_M051(16*1024)},
- {"M058LDE" , 0x30005800, NUMICRO_BANKS_M051(32*1024)},
- {"M0516LDE" , 0x30005A00, NUMICRO_BANKS_M051(64*1024)},
- {"M052ZDE" , 0x30005203, NUMICRO_BANKS_M051(8*1024)},
- {"M054ZDE" , 0x30005403, NUMICRO_BANKS_M051(16*1024)},
- {"M058ZDE" , 0x30005803, NUMICRO_BANKS_M051(32*1024)},
- {"M0516ZDE" , 0x30005A03, NUMICRO_BANKS_M051(64*1024)},
- {"M052TDE" , 0x30005204, NUMICRO_BANKS_M051(8*1024)},
- {"M054TDE" , 0x30005404, NUMICRO_BANKS_M051(16*1024)},
- {"M058TDE" , 0x30005804, NUMICRO_BANKS_M051(32*1024)},
- {"M0516TDE" , 0x30005A04, NUMICRO_BANKS_M051(64*1024)},
- {"M052XDE" , 0x30005205, NUMICRO_BANKS_M051(8*1024)},
- {"M054XDE" , 0x30005405, NUMICRO_BANKS_M051(16*1024)},
- {"M058XDE" , 0x30005805, NUMICRO_BANKS_M051(32*1024)},
- {"M0516XDE" , 0x30005A05, NUMICRO_BANKS_M051(64*1024)},
-
- /* Mini51 */
- {"MINI51LAN", 0x00205100, NUMICRO_BANKS_MINI51(4*1024)},
- {"MINI51QAN", 0x00205101, NUMICRO_BANKS_MINI51(4*1024)},
- {"MINI51 ", 0x00205102, NUMICRO_BANKS_MINI51(4*1024)},
- {"MINI51ZAN", 0x00205103, NUMICRO_BANKS_MINI51(4*1024)},
- {"MINI51TAN", 0x00205104, NUMICRO_BANKS_MINI51(4*1024)},
- {"MINI52LAN", 0x00205200, NUMICRO_BANKS_MINI51(8*1024)},
- {"MINI52QAN", 0x00205201, NUMICRO_BANKS_MINI51(8*1024)},
- {"MINI52 ", 0x00205202, NUMICRO_BANKS_MINI51(8*1024)},
- {"MINI52ZAN", 0x00205203, NUMICRO_BANKS_MINI51(8*1024)},
- {"MINI52TAN", 0x00205204, NUMICRO_BANKS_MINI51(8*1024)},
- {"MINI54LAN", 0x00205400, NUMICRO_BANKS_MINI51(16*1024)},
- {"MINI54QAN", 0x00205401, NUMICRO_BANKS_MINI51(16*1024)},
- {"MINI54 ", 0x00205402, NUMICRO_BANKS_MINI51(16*1024)},
- {"MINI54ZAN", 0x00205403, NUMICRO_BANKS_MINI51(16*1024)},
- {"MINI54TAN", 0x00205404, NUMICRO_BANKS_MINI51(16*1024)},
- {"MINI51LBN", 0x10205100, NUMICRO_BANKS_MINI51(4*1024)},
- {"MINI51QBN", 0x10205101, NUMICRO_BANKS_MINI51(4*1024)},
- {"MINI51 ", 0x10205102, NUMICRO_BANKS_MINI51(4*1024)},
- {"MINI51ZBN", 0x10205103, NUMICRO_BANKS_MINI51(4*1024)},
- {"MINI51TBN", 0x10205104, NUMICRO_BANKS_MINI51(4*1024)},
- {"MINI52LBN", 0x10205200, NUMICRO_BANKS_MINI51(8*1024)},
- {"MINI52QBN", 0x10205201, NUMICRO_BANKS_MINI51(8*1024)},
- {"MINI52 ", 0x10205202, NUMICRO_BANKS_MINI51(8*1024)},
- {"MINI52ZBN", 0x10205203, NUMICRO_BANKS_MINI51(8*1024)},
- {"MINI52TBN", 0x10205204, NUMICRO_BANKS_MINI51(8*1024)},
- {"MINI54LBN", 0x10205400, NUMICRO_BANKS_MINI51(16*1024)},
- {"MINI54QBN", 0x10205401, NUMICRO_BANKS_MINI51(16*1024)},
- {"MINI54 ", 0x10205402, NUMICRO_BANKS_MINI51(16*1024)},
- {"MINI54ZBN" , 0x10205403, NUMICRO_BANKS_MINI51(16*1024)},
- {"MINI54TBN" , 0x10205404, NUMICRO_BANKS_MINI51(16*1024)},
- {"MINI51LDE" , 0x20205100, NUMICRO_BANKS_MINI51(4*1024)},
- {"MINI51QDE" , 0x20205101, NUMICRO_BANKS_MINI51(4*1024)},
- {"MINI51 " , 0x20205102, NUMICRO_BANKS_MINI51(4*1024)},
- {"MINI51ZDE" , 0x20205103, NUMICRO_BANKS_MINI51(4*1024)},
- {"MINI51TDE" , 0x20205104, NUMICRO_BANKS_MINI51(4*1024)},
- {"MINI51FDE" , 0x20205105, NUMICRO_BANKS_MINI51(4*1024)},
- {"MINI52LDE" , 0x20205200, NUMICRO_BANKS_MINI51(8*1024)},
- {"MINI52QDE" , 0x20205201, NUMICRO_BANKS_MINI51(8*1024)},
- {"MINI52 " , 0x20205202, NUMICRO_BANKS_MINI51(8*1024)},
- {"MINI52ZDE" , 0x20205203, NUMICRO_BANKS_MINI51(8*1024)},
- {"MINI52TDE" , 0x20205204, NUMICRO_BANKS_MINI51(8*1024)},
- {"MINI52FDE" , 0x20205205, NUMICRO_BANKS_MINI51(8*1024)},
- {"MINI54LDE" , 0x20205400, NUMICRO_BANKS_MINI51(16*1024)},
- {"MINI54QDE" , 0x20205401, NUMICRO_BANKS_MINI51(16*1024)},
- {"MINI54 " , 0x20205402, NUMICRO_BANKS_MINI51(16*1024)},
- {"MINI54ZDE" , 0x20205403, NUMICRO_BANKS_MINI51(16*1024)},
- {"MINI54TDE" , 0x20205404, NUMICRO_BANKS_MINI51(16*1024)},
- {"MINI54FDE" , 0x20205405, NUMICRO_BANKS_MINI51(16*1024)},
- {"MINI55LDE" , 0x20205500, NUMICRO_BANKS_MINI51(16*1024)},
-
- /* NANO100 */
- {"NANO100VF3AN" , 0x00110000, NUMICRO_BANKS_NANO(256*1024)},
- {"NANO100VF2AN" , 0x00110001, NUMICRO_BANKS_NANO(256*1024)},
- {"NANO100RF3AN" , 0x00110002, NUMICRO_BANKS_NANO(256*1024)},
- {"NANO100RF2AN" , 0x00110003, NUMICRO_BANKS_NANO(256*1024)},
- {"NANO100LF3AN" , 0x00110004, NUMICRO_BANKS_NANO(256*1024)},
- {"NANO100LF2AN" , 0x00110005, NUMICRO_BANKS_NANO(256*1024)},
- {"NANO100VE3AN" , 0x00110006, NUMICRO_BANKS_NANO(128*1024)},
- {"NANO100VE2AN" , 0x00110007, NUMICRO_BANKS_NANO(128*1024)},
- {"NANO100RE3AN" , 0x00110008, NUMICRO_BANKS_NANO(128*1024)},
- {"NANO100RE2AN" , 0x00110009, NUMICRO_BANKS_NANO(128*1024)},
- {"NANO100LE3AN" , 0x00110010, NUMICRO_BANKS_NANO(128*1024)},
- {"NANO100LE2AN" , 0x00110011, NUMICRO_BANKS_NANO(128*1024)},
- {"NANO100VD3AN" , 0x00110012, NUMICRO_BANKS_NANO(64*1024)},
- {"NANO100VD2AN" , 0x00110013, NUMICRO_BANKS_NANO(64*1024)},
- {"NANO100VD1AN" , 0x00110014, NUMICRO_BANKS_NANO(64*1024)},
- {"NANO100RD3AN" , 0x00110015, NUMICRO_BANKS_NANO(64*1024)},
- {"NANO100RD2AN" , 0x00110016, NUMICRO_BANKS_NANO(64*1024)},
- {"NANO100RD1AN" , 0x00110017, NUMICRO_BANKS_NANO(64*1024)},
- {"NANO100LD3AN" , 0x00110018, NUMICRO_BANKS_NANO(64*1024)},
- {"NANO100LD2AN" , 0x00110019, NUMICRO_BANKS_NANO(64*1024)},
- {"NANO100LD1AN" , 0x00110020, NUMICRO_BANKS_NANO(64*1024)},
- {"NANO100VC2AN" , 0x00110021, NUMICRO_BANKS_NANO(32*1024)},
- {"NANO100VC1AN" , 0x00110022, NUMICRO_BANKS_NANO(32*1024)},
- {"NANO100RC2AN" , 0x00110023, NUMICRO_BANKS_NANO(32*1024)},
- {"NANO100RC1AN" , 0x00110024, NUMICRO_BANKS_NANO(32*1024)},
- {"NANO100LC2AN" , 0x00110025, NUMICRO_BANKS_NANO(32*1024)},
- {"NANO100LC1AN" , 0x00110026, NUMICRO_BANKS_NANO(32*1024)},
- {"NANO100VB1AN" , 0x00110027, NUMICRO_BANKS_NANO(16*1024)},
- {"NANO100VB0AN" , 0x00110028, NUMICRO_BANKS_NANO(16*1024)},
- {"NANO100RB1AN" , 0x00110029, NUMICRO_BANKS_NANO(16*1024)},
-
- {"NANO110VF3AN" , 0x00111000, NUMICRO_BANKS_NANO(256*1024)},
- {"NANO110VF2AN" , 0x00111001, NUMICRO_BANKS_NANO(256*1024)},
- {"NANO110RF3AN" , 0x00111002, NUMICRO_BANKS_NANO(256*1024)},
- {"NANO110RF2AN" , 0x00111003, NUMICRO_BANKS_NANO(256*1024)},
- {"NANO110VE3AN" , 0x00111006, NUMICRO_BANKS_NANO(128*1024)},
- {"NANO110VE2AN" , 0x00111007, NUMICRO_BANKS_NANO(128*1024)},
- {"NANO110RE3AN" , 0x00111008, NUMICRO_BANKS_NANO(128*1024)},
- {"NANO110RE2AN" , 0x00111009, NUMICRO_BANKS_NANO(128*1024)},
- {"NANO110VD3AN" , 0x00111012, NUMICRO_BANKS_NANO(64*1024)},
- {"NANO110VD2AN" , 0x00111013, NUMICRO_BANKS_NANO(64*1024)},
- {"NANO110VD1AN" , 0x00111014, NUMICRO_BANKS_NANO(64*1024)},
- {"NANO110RD3AN" , 0x00111015, NUMICRO_BANKS_NANO(64*1024)},
- {"NANO110RD2AN" , 0x00111016, NUMICRO_BANKS_NANO(64*1024)},
- {"NANO110RD1AN" , 0x00111017, NUMICRO_BANKS_NANO(64*1024)},
- {"NANO110VC2AN" , 0x00111021, NUMICRO_BANKS_NANO(32*1024)},
- {"NANO110VC1AN" , 0x00111022, NUMICRO_BANKS_NANO(32*1024)},
- {"NANO110SC2AN" , 0x00111023, NUMICRO_BANKS_NANO(32*1024)},
- {"NANO110SC1AN" , 0x00111024, NUMICRO_BANKS_NANO(32*1024)},
- {"NANO120VF3AN" , 0x00112000, NUMICRO_BANKS_NANO(256*1024)},
- {"NANO120VF2AN" , 0x00112001, NUMICRO_BANKS_NANO(256*1024)},
- {"NANO120RF3AN" , 0x00112002, NUMICRO_BANKS_NANO(256*1024)},
- {"NANO120RF2AN" , 0x00112003, NUMICRO_BANKS_NANO(256*1024)},
- {"NANO120LF3AN" , 0x00112004, NUMICRO_BANKS_NANO(256*1024)},
- {"NANO120LF2AN" , 0x00112005, NUMICRO_BANKS_NANO(256*1024)},
- {"NANO120VE3AN" , 0x00112006, NUMICRO_BANKS_NANO(128*1024)},
- {"NANO120VE2AN" , 0x00112007, NUMICRO_BANKS_NANO(128*1024)},
- {"NANO120RE3AN" , 0x00112008, NUMICRO_BANKS_NANO(128*1024)},
- {"NANO120RE2AN" , 0x00112009, NUMICRO_BANKS_NANO(128*1024)},
- {"NANO120LE3AN" , 0x00112010, NUMICRO_BANKS_NANO(128*1024)},
- {"NANO120LE2AN" , 0x00112011, NUMICRO_BANKS_NANO(128*1024)},
- {"NANO120VD3AN" , 0x00112012, NUMICRO_BANKS_NANO(64*1024)},
- {"NANO120VD2AN" , 0x00112013, NUMICRO_BANKS_NANO(64*1024)},
- {"NANO120VD1AN" , 0x00112014, NUMICRO_BANKS_NANO(64*1024)},
- {"NANO120SD3AN" , 0x00112015, NUMICRO_BANKS_NANO(64*1024)},
- {"NANO120SD2AN" , 0x00112016, NUMICRO_BANKS_NANO(64*1024)},
- {"NANO120SD1AN" , 0x00112017, NUMICRO_BANKS_NANO(64*1024)},
- {"NANO120LD3AN" , 0x00112018, NUMICRO_BANKS_NANO(64*1024)},
- {"NANO120LD2AN" , 0x00112019, NUMICRO_BANKS_NANO(64*1024)},
- {"NANO120LD1AN" , 0x00112020, NUMICRO_BANKS_NANO(64*1024)},
- {"NANO120VC2AN" , 0x00112021, NUMICRO_BANKS_NANO(32*1024)},
- {"NANO120VC1AN" , 0x00112022, NUMICRO_BANKS_NANO(32*1024)},
- {"NANO120SC2AN" , 0x00112023, NUMICRO_BANKS_NANO(32*1024)},
- {"NANO120SC1AN" , 0x00112024, NUMICRO_BANKS_NANO(32*1024)},
- {"NANO120LC2AN" , 0x00112025, NUMICRO_BANKS_NANO(32*1024)},
- {"NANO120LC1AN" , 0x00112026, NUMICRO_BANKS_NANO(32*1024)},
- {"NANO130VF3AN" , 0x00113000, NUMICRO_BANKS_NANO(256*1024)},
- {"NANO130VF2AN" , 0x00113001, NUMICRO_BANKS_NANO(256*1024)},
- {"NANO130SF3AN" , 0x00113002, NUMICRO_BANKS_NANO(256*1024)},
- {"NANO130SF2AN" , 0x00113003, NUMICRO_BANKS_NANO(256*1024)},
- {"NANO130VE3AN" , 0x00113006, NUMICRO_BANKS_NANO(128*1024)},
- {"NANO130VE2AN" , 0x00113007, NUMICRO_BANKS_NANO(128*1024)},
- {"NANO130SE3AN" , 0x00113008, NUMICRO_BANKS_NANO(128*1024)},
- {"NANO130SE2AN" , 0x00113009, NUMICRO_BANKS_NANO(128*1024)},
- {"NANO130VD3AN" , 0x00113012, NUMICRO_BANKS_NANO(64*1024)},
- {"NANO130VD2AN" , 0x00113013, NUMICRO_BANKS_NANO(64*1024)},
- {"NANO130VD1AN" , 0x00113014, NUMICRO_BANKS_NANO(64*1024)},
- {"NANO130SD3AN" , 0x00113015, NUMICRO_BANKS_NANO(64*1024)},
- {"NANO130SD2AN" , 0x00113016, NUMICRO_BANKS_NANO(64*1024)},
- {"NANO130SD1AN" , 0x00113017, NUMICRO_BANKS_NANO(64*1024)},
- {"NANO130VC2AN" , 0x00113021, NUMICRO_BANKS_NANO(32*1024)},
- {"NANO130VC1AN" , 0x00113022, NUMICRO_BANKS_NANO(32*1024)},
- {"NANO130SC2AN" , 0x00113023, NUMICRO_BANKS_NANO(32*1024)},
- {"NANO130SC1AN" , 0x00113024, NUMICRO_BANKS_NANO(32*1024)},
- {"NANO100KE3BN" , 0x00110030, NUMICRO_BANKS_NANO(128*1024)},
- {"NANO100KE2BN" , 0x00110031, NUMICRO_BANKS_NANO(128*1024)},
- {"NANO100VE3BN" , 0x00110032, NUMICRO_BANKS_NANO(128*1024)},
- {"NANO100VE2BN" , 0x00110033, NUMICRO_BANKS_NANO(128*1024)},
- {"NANO100SE3BN" , 0x00110034, NUMICRO_BANKS_NANO(128*1024)},
- {"NANO100SE2BN" , 0x00110035, NUMICRO_BANKS_NANO(128*1024)},
- {"NANO100LE3BN" , 0x00110036, NUMICRO_BANKS_NANO(128*1024)},
- {"NANO100LE2BN" , 0x00110037, NUMICRO_BANKS_NANO(128*1024)},
- {"NANO100KD3BN" , 0x00110038, NUMICRO_BANKS_NANO(64*1024)},
- {"NANO100KD2BN" , 0x00110039, NUMICRO_BANKS_NANO(64*1024)},
- {"NANO100VD3BN" , 0x0011003A, NUMICRO_BANKS_NANO(64*1024)},
- {"NANO100VD2BN" , 0x0011003B, NUMICRO_BANKS_NANO(64*1024)},
- {"NANO100SD3BN" , 0x0011003C, NUMICRO_BANKS_NANO(64*1024)},
- {"NANO100SD2BN" , 0x0011003D, NUMICRO_BANKS_NANO(64*1024)},
- {"NANO100LD3BN" , 0x0011003E, NUMICRO_BANKS_NANO(64*1024)},
- {"NANO100LD2BN" , 0x0011003F, NUMICRO_BANKS_NANO(64*1024)},
- {"NANO100KC2BN" , 0x00110040, NUMICRO_BANKS_NANO(32*1024)},
- {"NANO100VC2BN" , 0x00110041, NUMICRO_BANKS_NANO(32*1024)},
- {"NANO100SC2BN" , 0x00110042, NUMICRO_BANKS_NANO(32*1024)},
- {"NANO100LC2BN" , 0x00110043, NUMICRO_BANKS_NANO(32*1024)},
- {"NANO110KE3BN" , 0x00111030, NUMICRO_BANKS_NANO(128*1024)},
- {"NANO110KE2BN" , 0x00111031, NUMICRO_BANKS_NANO(128*1024)},
- {"NANO110VE3BN" , 0x00111032, NUMICRO_BANKS_NANO(128*1024)},
- {"NANO110VE2BN" , 0x00111033, NUMICRO_BANKS_NANO(128*1024)},
- {"NANO110SE3BN" , 0x00111034, NUMICRO_BANKS_NANO(128*1024)},
- {"NANO110SE2BN" , 0x00111035, NUMICRO_BANKS_NANO(128*1024)},
- {"NANO110KD3BN" , 0x00111038, NUMICRO_BANKS_NANO(64*1024)},
- {"NANO110KD2BN" , 0x00111039, NUMICRO_BANKS_NANO(64*1024)},
- {"NANO110VD3BN" , 0x0011103A, NUMICRO_BANKS_NANO(64*1024)},
- {"NANO110VD2BN" , 0x0011103B, NUMICRO_BANKS_NANO(64*1024)},
- {"NANO110SD3BN" , 0x0011103C, NUMICRO_BANKS_NANO(64*1024)},
- {"NANO110SD2BN" , 0x0011103D, NUMICRO_BANKS_NANO(64*1024)},
- {"NANO110KC2BN" , 0x00111040, NUMICRO_BANKS_NANO(32*1024)},
- {"NANO110VC2BN" , 0x00111041, NUMICRO_BANKS_NANO(32*1024)},
- {"NANO110SC2BN" , 0x00111042, NUMICRO_BANKS_NANO(32*1024)},
- {"NANO120KE3BN" , 0x00112030, NUMICRO_BANKS_NANO(128*1024)},
- {"NANO120KE2BN" , 0x00112031, NUMICRO_BANKS_NANO(128*1024)},
- {"NANO120VE3BN" , 0x00112032, NUMICRO_BANKS_NANO(128*1024)},
- {"NANO120VE2BN" , 0x00112033, NUMICRO_BANKS_NANO(128*1024)},
- {"NANO120SE3BN" , 0x00112034, NUMICRO_BANKS_NANO(128*1024)},
- {"NANO120SE2BN" , 0x00112035, NUMICRO_BANKS_NANO(128*1024)},
- {"NANO120LE3BN" , 0x00112036, NUMICRO_BANKS_NANO(128*1024)},
- {"NANO120LE2BN" , 0x00112037, NUMICRO_BANKS_NANO(128*1024)},
- {"NANO120KD3BN" , 0x00112038, NUMICRO_BANKS_NANO(64*1024)},
- {"NANO120KD2BN" , 0x00112039, NUMICRO_BANKS_NANO(64*1024)},
- {"NANO120VD3BN" , 0x0011203A, NUMICRO_BANKS_NANO(64*1024)},
- {"NANO120VD2BN" , 0x0011203B, NUMICRO_BANKS_NANO(64*1024)},
- {"NANO120SD3BN" , 0x0011203C, NUMICRO_BANKS_NANO(64*1024)},
- {"NANO120SD2BN" , 0x0011203D, NUMICRO_BANKS_NANO(64*1024)},
- {"NANO120LD3BN" , 0x0011203E, NUMICRO_BANKS_NANO(64*1024)},
- {"NANO120LD2BN" , 0x0011203F, NUMICRO_BANKS_NANO(64*1024)},
- {"NANO120KC2BN" , 0x00112040, NUMICRO_BANKS_NANO(32*1024)},
- {"NANO120VC2BN" , 0x00112041, NUMICRO_BANKS_NANO(32*1024)},
- {"NANO120SC2BN" , 0x00112042, NUMICRO_BANKS_NANO(32*1024)},
- {"NANO120LC2BN" , 0x00112043, NUMICRO_BANKS_NANO(32*1024)},
- {"NANO130KE3BN" , 0x00113030, NUMICRO_BANKS_NANO(123*1024)},
- {"NANO130KE2BN" , 0x00113031, NUMICRO_BANKS_NANO(123*1024)},
- {"NANO130VE3BN" , 0x00113032, NUMICRO_BANKS_NANO(123*1024)},
- {"NANO130VE2BN" , 0x00113033, NUMICRO_BANKS_NANO(123*1024)},
- {"NANO130SE3BN" , 0x00113034, NUMICRO_BANKS_NANO(123*1024)},
- {"NANO130SE2BN" , 0x00113035, NUMICRO_BANKS_NANO(123*1024)},
- {"NANO130KD3BN" , 0x00113038, NUMICRO_BANKS_NANO(64*1024)},
- {"NANO130KD2BN" , 0x00113039, NUMICRO_BANKS_NANO(64*1024)},
- {"NANO130VD3BN" , 0x0011303A, NUMICRO_BANKS_NANO(64*1024)},
- {"NANO130VD2BN" , 0x0011303B, NUMICRO_BANKS_NANO(64*1024)},
- {"NANO130SD3BN" , 0x0011303C, NUMICRO_BANKS_NANO(64*1024)},
- {"NANO130SD2BN" , 0x0011303D, NUMICRO_BANKS_NANO(64*1024)},
- {"NANO130KC2BN" , 0x00113040, NUMICRO_BANKS_NANO(32*1024)},
- {"NANO130VC2BN" , 0x00113041, NUMICRO_BANKS_NANO(32*1024)},
- {"NANO130SC2BN" , 0x00113042, NUMICRO_BANKS_NANO(32*1024)},
- {"N512DC4" , 0x00100000, NUMICRO_BANKS_NANO(64*1024)},
- {"N512LC4" , 0x00100001, NUMICRO_BANKS_NANO(64*1024)},
- {"N512MC4" , 0x00100003, NUMICRO_BANKS_NANO(64*1024)},
-
- {"N512SC4" , 0x00100005, NUMICRO_BANKS_NANO(64*1024)},
- {"N512VD4" , 0x00100008, NUMICRO_BANKS_NANO(128*1024)},
- {"N512MD4" , 0x00100009, NUMICRO_BANKS_NANO(128*1024)},
- {"N512SD4" , 0x00100010, NUMICRO_BANKS_NANO(128*1024)},
- {"NANO110RC2BN" , 0x00111043, NUMICRO_BANKS_NANO(32*1024)},
- {"NANO110RD3BN" , 0x00111045, NUMICRO_BANKS_NANO(64*1024)},
- {"TX110VE3BN" , 0x00111036, NUMICRO_BANKS_NANO(128*1024)},
-
- /* NANO102/NANO112 */
- {"NANO112LB0AN" , 0x00111201, NUMICRO_BANKS_NANO(16*1024)},
- {"NANO112LB1AN" , 0x00111202, NUMICRO_BANKS_NANO(16*1024)},
- {"NANO112LC1AN" , 0x00111203, NUMICRO_BANKS_NANO(32*1024)},
- {"NANO112LC2AN" , 0x00111204, NUMICRO_BANKS_NANO(32*1024)},
- {"NANO112SB0AN" , 0x00111205, NUMICRO_BANKS_NANO(16*1024)},
- {"NANO112SB1AN" , 0x00111206, NUMICRO_BANKS_NANO(16*1024)},
- {"NANO112SC1AN" , 0x00111207, NUMICRO_BANKS_NANO(32*1024)},
- {"NANO112SC2AN" , 0x00111208, NUMICRO_BANKS_NANO(32*1024)},
- {"NANO112RB0AN" , 0x00111209, NUMICRO_BANKS_NANO(16*1024)},
- {"NANO112RB1AN" , 0x00111210, NUMICRO_BANKS_NANO(16*1024)},
- {"NANO112RC1AN" , 0x00111211, NUMICRO_BANKS_NANO(32*1024)},
- {"NANO112RC2AN" , 0x00111212, NUMICRO_BANKS_NANO(32*1024)},
- {"NANO112VB0AN" , 0x00111213, NUMICRO_BANKS_NANO(16*1024)},
- {"NANO112VB1AN" , 0x00111214, NUMICRO_BANKS_NANO(16*1024)},
- {"NANO112VC1AN" , 0x00111215, NUMICRO_BANKS_NANO(32*1024)},
- {"NANO112VC2AN" , 0x00111216, NUMICRO_BANKS_NANO(32*1024)},
- {"NANO102ZB0AN" , 0x00110201, NUMICRO_BANKS_NANO(16*1024)},
- {"NANO102ZB1AN" , 0x00110202, NUMICRO_BANKS_NANO(16*1024)},
- {"NANO102ZC1AN" , 0x00110203, NUMICRO_BANKS_NANO(32*1024)},
- {"NANO102ZC2AN" , 0x00110204, NUMICRO_BANKS_NANO(32*1024)},
- {"NANO102LB0AN" , 0x00110205, NUMICRO_BANKS_NANO(16*1024)},
- {"NANO102LB1AN" , 0x00110206, NUMICRO_BANKS_NANO(16*1024)},
- {"NANO102LC1AN" , 0x00110207, NUMICRO_BANKS_NANO(32*1024)},
- {"NANO102LC2AN" , 0x00110208, NUMICRO_BANKS_NANO(32*1024)},
- {"NANO102SB0AN" , 0x00110209, NUMICRO_BANKS_NANO(16*1024)},
- {"NANO102SB1AN" , 0x00110210, NUMICRO_BANKS_NANO(16*1024)},
- {"NANO102SC1AN" , 0x00110211, NUMICRO_BANKS_NANO(32*1024)},
- {"NANO102SC2AN" , 0x00110212, NUMICRO_BANKS_NANO(32*1024)},
-
- /* NUC103/NUC105/NUC123 */
- {"NUC123SC2AN" , 0x00012305, NUMICRO_BANKS_NUC100(36*1024)},
- {"NUC123SD4AN" , 0x00012315, NUMICRO_BANKS_NUC100(68*1024)},
- {"NUC123LC2AN" , 0x00012325, NUMICRO_BANKS_NUC100(36*1024)},
- {"NUC103LC2AN" , 0x00010325, NUMICRO_BANKS_NUC100(36*1024)},
- {"NUC105LC2AN" , 0x00010525, NUMICRO_BANKS_NUC100(36*1024)},
- {"NUC123LD4AN" , 0x00012335, NUMICRO_BANKS_NUC100(68*1024)},
- {"NUC103LD4AN" , 0x00010335, NUMICRO_BANKS_NUC100(68*1024)},
- {"NUC105LD4AN" , 0x00010535, NUMICRO_BANKS_NUC100(68*1024)},
- {"NUC123ZC2AN" , 0x00012345, NUMICRO_BANKS_NUC100(36*1024)},
- {"NUC103ZC2AN" , 0x00010345, NUMICRO_BANKS_NUC100(36*1024)},
- {"NUC105ZC2AN" , 0x00010545, NUMICRO_BANKS_NUC100(36*1024)},
- {"NUC123ZD4AN" , 0x00012355, NUMICRO_BANKS_NUC100(68*1024)},
- {"NUC103ZD4AN" , 0x00010355, NUMICRO_BANKS_NUC100(68*1024)},
- {"NUC105ZD4AN" , 0x00010555, NUMICRO_BANKS_NUC100(68*1024)},
-
- /* NUC200 */
- {"NUC200LC2AN" , 0x00020007, NUMICRO_BANKS_NUC100(32*1024)},
- {"NUC200LD2AN" , 0x00020004, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC200LE3AN" , 0x00020000, NUMICRO_BANKS_NUC100(128*1024)},
- {"NUC200SC1AN" , 0x00020035, NUMICRO_BANKS_NUC100(32*1024)},
- {"NUC200SD2AN" , 0x00020031, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC200SE3AN" , 0x00020027, NUMICRO_BANKS_NUC100(128*1024)},
- {"NUC200VE3AN" , 0x00020018, NUMICRO_BANKS_NUC100(128*1024)},
- {"NUC220LC2AN" , 0x00022007, NUMICRO_BANKS_NUC100(32*1024)},
- {"NUC220LD2AN" , 0x00022004, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC220LE3AN" , 0x00022000, NUMICRO_BANKS_NUC100(128*1024)},
- {"NUC220SC1AN" , 0x00022035, NUMICRO_BANKS_NUC100(32*1024)},
- {"NUC220SD2AN" , 0x00022031, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC220SE3AN" , 0x00022027, NUMICRO_BANKS_NUC100(128*1024)},
- {"NUC220VE3AN" , 0x00022018, NUMICRO_BANKS_NUC100(128*1024)},
- {"NUC230LC2AN" , 0x00023007, NUMICRO_BANKS_NUC100(32*1024)},
- {"NUC230LD2AN" , 0x00023004, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC230LE3AN" , 0x00023000, NUMICRO_BANKS_NUC100(128*1024)},
- {"NUC230SC1AN" , 0x00023035, NUMICRO_BANKS_NUC100(32*1024)},
- {"NUC230SD2AN" , 0x00023031, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC230SE3AN" , 0x00023027, NUMICRO_BANKS_NUC100(128*1024)},
- {"NUC230VE3AN" , 0x00023018, NUMICRO_BANKS_NUC100(128*1024)},
- {"NUC240LC2AN" , 0x00024007, NUMICRO_BANKS_NUC100(32*1024)},
- {"NUC240LD2AN" , 0x00024004, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC240LE3AN" , 0x00024000, NUMICRO_BANKS_NUC100(128*1024)},
- {"NUC240SC1AN" , 0x00024035, NUMICRO_BANKS_NUC100(32*1024)},
- {"NUC240SD2AN" , 0x00024031, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC240SE3AN" , 0x00024027, NUMICRO_BANKS_NUC100(128*1024)},
- {"NUC240VE3AN" , 0x00024018, NUMICRO_BANKS_NUC100(128*1024)},
-
- /* NUC200 NUC2XXAE */
- {"NUC230RC1AE" , 0x40013017, NUMICRO_BANKS_NUC100(32*1024)},
- {"NUC200LC2AE" , 0x10020007, NUMICRO_BANKS_NUC100(32*1024)},
- {"NUC200LD2AE" , 0x10020004, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC200LE3AE" , 0x10020000, NUMICRO_BANKS_NUC100(128*1024)},
- {"NUC200SC2AE" , 0x10020034, NUMICRO_BANKS_NUC100(32*1024)},
- {"NUC200SD2AE" , 0x10020031, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC200SE3AE" , 0x10020027, NUMICRO_BANKS_NUC100(128*1024)},
- {"NUC200VE3AE" , 0x10020018, NUMICRO_BANKS_NUC100(128*1024)},
- {"NUC230LC2AE" , 0x10023007, NUMICRO_BANKS_NUC100(32*1024)},
- {"NUC230LD2AE" , 0x10023004, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC230LE3AE" , 0x10023000, NUMICRO_BANKS_NUC100(128*1024)},
- {"NUC230SC2AE" , 0x10023034, NUMICRO_BANKS_NUC100(32*1024)},
- {"NUC230SD2AE" , 0x10023031, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC230SE3AE" , 0x10023027, NUMICRO_BANKS_NUC100(128*1024)},
- {"NUC230VE3AE" , 0x10023018, NUMICRO_BANKS_NUC100(128*1024)},
- {"NUC240LC2AE" , 0x10024007, NUMICRO_BANKS_NUC100(32*1024)},
- {"NUC240LD2AE" , 0x10024004, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC240LE3AE" , 0x10024000, NUMICRO_BANKS_NUC100(128*1024)},
- {"NUC240SC2AE" , 0x10024034, NUMICRO_BANKS_NUC100(32*1024)},
- {"NUC240SD2AE" , 0x10024031, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC240SE3AE" , 0x10024027, NUMICRO_BANKS_NUC100(128*1024)},
- {"NUC240VE3AE" , 0x10024018, NUMICRO_BANKS_NUC100(128*1024)},
-
- /* NUC100 Version D */
- {"NUC100LC1DN" , 0x30010008, NUMICRO_BANKS_NUC100(32*1024)},
- {"NUC100LD1DN" , 0x30010005, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC100LD2DN" , 0x30010004, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC100RC1DN" , 0x30010017, NUMICRO_BANKS_NUC100(32*1024)},
- {"NUC100RD1DN" , 0x30010014, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC100RD2DN" , 0x30010013, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC100LD3DN" , 0x30010003, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC100LE3DN" , 0x30010000, NUMICRO_BANKS_NUC100(128*1024)},
- {"NUC100RD3DN" , 0x30010012, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC100RE3DN" , 0x30010009, NUMICRO_BANKS_NUC100(128*1024)},
- {"NUC100VD2DN" , 0x30010022, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC100VD3DN" , 0x30010021, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC100VE3DN" , 0x30010018, NUMICRO_BANKS_NUC100(128*1024)},
- {"NUC120LC1DN" , 0x30012008, NUMICRO_BANKS_NUC100(32*1024)},
- {"NUC120LD1DN" , 0x30012005, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC120LD2DN" , 0x30012004, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC120RC1DN" , 0x30012017, NUMICRO_BANKS_NUC100(32*1024)},
- {"NUC120RD1DN" , 0x30012014, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC120RD2DN" , 0x30012013, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC120LD3DN" , 0x30012003, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC120LE3DN" , 0x30012000, NUMICRO_BANKS_NUC100(128*1024)},
- {"NUC120RD3DN" , 0x30012012, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC120RE3DN" , 0x30012009, NUMICRO_BANKS_NUC100(128*1024)},
- {"NUC120VD2DN" , 0x30012022, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC120VD3DN" , 0x30012021, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC120VE3DN" , 0x30012018, NUMICRO_BANKS_NUC100(...
[truncated message content] |
|
From: openocd-gerrit <ope...@us...> - 2023-01-15 15:01:31
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".
The branch, master has been updated
via 11ee500bffe488eba95cea37c99cee6b196e04ff (commit)
from 66da6f20e4df20511828424d835dfade7dd9d535 (commit)
Those revisions listed above that are new to this repository have
not appeared on any other notification email; so we list those
revisions in full, below.
- Log -----------------------------------------------------------------
commit 11ee500bffe488eba95cea37c99cee6b196e04ff
Author: Boris-Chengbiao Zhou <bob...@we...>
Date: Wed Oct 26 03:10:17 2022 +0200
target/armv7m: Rename xPSR to xpsr
The org.gnu.gdb.arm.m-system GDB feature defines the name in lowercase
letters.[1] Not adhering to the definition can cause issues with tools
interacting with the GDB which expect the correct casing.
[1]: https://sourceware.org/gdb/onlinedocs/gdb/ARM-Features.html
Change-Id: I0b6584a78f86b053947d79686baad5dac3ec4a00
Signed-off-by: Boris-Chengbiao Zhou <bob...@we...>
Reviewed-on: https://review.openocd.org/c/openocd/+/7292
Tested-by: jenkins
Reviewed-by: Tomas Vanek <va...@fb...>
Reviewed-by: Antonio Borneo <bor...@gm...>
diff --git a/src/target/armv7m.c b/src/target/armv7m.c
index 1b85315de..5745681d4 100644
--- a/src/target/armv7m.c
+++ b/src/target/armv7m.c
@@ -97,7 +97,7 @@ static const struct {
{ ARMV7M_R13, "sp", 32, REG_TYPE_DATA_PTR, "general", "org.gnu.gdb.arm.m-profile" },
{ ARMV7M_R14, "lr", 32, REG_TYPE_INT, "general", "org.gnu.gdb.arm.m-profile" },
{ ARMV7M_PC, "pc", 32, REG_TYPE_CODE_PTR, "general", "org.gnu.gdb.arm.m-profile" },
- { ARMV7M_XPSR, "xPSR", 32, REG_TYPE_INT, "general", "org.gnu.gdb.arm.m-profile" },
+ { ARMV7M_XPSR, "xpsr", 32, REG_TYPE_INT, "general", "org.gnu.gdb.arm.m-profile" },
{ ARMV7M_MSP, "msp", 32, REG_TYPE_DATA_PTR, "system", "org.gnu.gdb.arm.m-system" },
{ ARMV7M_PSP, "psp", 32, REG_TYPE_DATA_PTR, "system", "org.gnu.gdb.arm.m-system" },
-----------------------------------------------------------------------
Summary of changes:
src/target/armv7m.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
hooks/post-receive
--
Main OpenOCD repository
|
|
From: openocd-gerrit <ope...@us...> - 2023-01-15 15:01:10
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".
The branch, master has been updated
via 66da6f20e4df20511828424d835dfade7dd9d535 (commit)
from 30631224da59608d93f56bac0f68acd6c8fd32ac (commit)
Those revisions listed above that are new to this repository have
not appeared on any other notification email; so we list those
revisions in full, below.
- Log -----------------------------------------------------------------
commit 66da6f20e4df20511828424d835dfade7dd9d535
Author: Tarek BOCHKATI <tar...@st...>
Date: Thu Oct 20 20:48:48 2022 +0100
flash/stm32l4x: avoid multiple assignments
Change-Id: I6d8e0fbfa7e05f26295fc22733c65c11f7460b51
Signed-off-by: Tarek BOCHKATI <tar...@st...>
Reviewed-on: https://review.openocd.org/c/openocd/+/7282
Reviewed-by: Antonio Borneo <bor...@gm...>
Reviewed-by: Tomas Vanek <va...@fb...>
Tested-by: jenkins
diff --git a/src/flash/nor/stm32l4x.c b/src/flash/nor/stm32l4x.c
index 7a6ec3fd2..92d511c17 100644
--- a/src/flash/nor/stm32l4x.c
+++ b/src/flash/nor/stm32l4x.c
@@ -1740,7 +1740,8 @@ static int stm32l4_probe(struct flash_bank *bank)
/* Set flash write alignment boundaries.
* Ask the flash infrastructure to ensure required alignment */
- bank->write_start_alignment = bank->write_end_alignment = stm32l4_info->data_width;
+ bank->write_start_alignment = stm32l4_info->data_width;
+ bank->write_end_alignment = stm32l4_info->data_width;
/* Initialize the flash registers layout */
if (part_info->flags & F_HAS_L5_FLASH_REGS)
-----------------------------------------------------------------------
Summary of changes:
src/flash/nor/stm32l4x.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
hooks/post-receive
--
Main OpenOCD repository
|
|
From: openocd-gerrit <ope...@us...> - 2023-01-15 14:58:08
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".
The branch, master has been updated
via 30631224da59608d93f56bac0f68acd6c8fd32ac (commit)
from f2fc23e16b648c3d5600b5cc44bee69a1e697a3a (commit)
Those revisions listed above that are new to this repository have
not appeared on any other notification email; so we list those
revisions in full, below.
- Log -----------------------------------------------------------------
commit 30631224da59608d93f56bac0f68acd6c8fd32ac
Author: Jan Matyas <ma...@co...>
Date: Mon Oct 17 08:24:05 2022 +0200
adapter: Improve three adapter-related prints
- Do not warn the user about adapter speed not being set
if the selected adapter does not support configurable speed.
This would be confusing to users.
- Minor reword in the "adapter speed is not selected" warning.
- Print the adapter name in the "adapter doesn't support
configurable speed" log entry
- Another minor reword: autoselect --> autoselecting
Signed-off-by: Jan Matyas <ma...@co...>
Change-Id: I4c198b547544fd8199921f092153562c5f159134
Reviewed-on: https://review.openocd.org/c/openocd/+/7269
Tested-by: jenkins
Reviewed-by: Antonio Borneo <bor...@gm...>
diff --git a/src/jtag/adapter.c b/src/jtag/adapter.c
index b7feac575..eb73fcb9a 100644
--- a/src/jtag/adapter.c
+++ b/src/jtag/adapter.c
@@ -136,9 +136,11 @@ int adapter_init(struct command_context *cmd_ctx)
int retval;
- if (adapter_config.clock_mode == CLOCK_MODE_UNSELECTED) {
+ /* If the adapter supports configurable speed but the speed is not configured,
+ * provide a hint to the user. */
+ if (adapter_driver->speed && adapter_config.clock_mode == CLOCK_MODE_UNSELECTED) {
LOG_WARNING("An adapter speed is not selected in the init scripts."
- " OpenOCD will try to run the adapter at the low speed (%d kHz)",
+ " OpenOCD will try to run the adapter at very low speed (%d kHz).",
DEFAULT_CLOCK_SPEED_KHZ);
LOG_WARNING("To remove this warnings and achieve reasonable communication speed with the target,"
" set \"adapter speed\" or \"jtag_rclk\" in the init scripts.");
@@ -153,7 +155,7 @@ int adapter_init(struct command_context *cmd_ctx)
adapter_config.adapter_initialized = true;
if (!adapter_driver->speed) {
- LOG_INFO("This adapter doesn't support configurable speed");
+ LOG_INFO("Note: The adapter \"%s\" doesn't support configurable speed", adapter_driver->name);
return ERROR_OK;
}
diff --git a/src/transport/transport.c b/src/transport/transport.c
index d72a48baa..c05db3f00 100644
--- a/src/transport/transport.c
+++ b/src/transport/transport.c
@@ -104,7 +104,7 @@ int allow_transports(struct command_context *ctx, const char * const *vector)
/* autoselect if there's no choice ... */
if (!vector[1]) {
- LOG_INFO("only one transport option; autoselect '%s'", vector[0]);
+ LOG_INFO("only one transport option; autoselecting '%s'", vector[0]);
return transport_select(ctx, vector[0]);
}
-----------------------------------------------------------------------
Summary of changes:
src/jtag/adapter.c | 8 +++++---
src/transport/transport.c | 2 +-
2 files changed, 6 insertions(+), 4 deletions(-)
hooks/post-receive
--
Main OpenOCD repository
|
|
From: openocd-gerrit <ope...@us...> - 2023-01-15 14:57:18
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".
The branch, master has been updated
via f2fc23e16b648c3d5600b5cc44bee69a1e697a3a (commit)
via 27edeb775791a598a1e7997fd74078164e771ca6 (commit)
from 228fe7300c7df7aa05ba2c0bc19edde6d0156401 (commit)
Those revisions listed above that are new to this repository have
not appeared on any other notification email; so we list those
revisions in full, below.
- Log -----------------------------------------------------------------
commit f2fc23e16b648c3d5600b5cc44bee69a1e697a3a
Author: Antonio Borneo <bor...@gm...>
Date: Mon Oct 17 12:34:23 2022 +0200
riscv: drop deprecated command 'riscv test_sba_config_reg'
Change-Id: I51c1b1cb3de8cb86ee38280fa3f035f6f7a63dbc
Signed-off-by: Antonio Borneo <bor...@gm...>
Reviewed-on: https://review.openocd.org/c/openocd/+/7272
Reviewed-by: Jan Matyas <ma...@co...>
Reviewed-by: Tim Newsome <ti...@si...>
Tested-by: jenkins
diff --git a/src/target/riscv/riscv-013.c b/src/target/riscv/riscv-013.c
index 99d3873de..4e6c8dc36 100644
--- a/src/target/riscv/riscv-013.c
+++ b/src/target/riscv/riscv-013.c
@@ -65,12 +65,6 @@ static int read_memory(struct target *target, target_addr_t address,
uint32_t size, uint32_t count, uint8_t *buffer, uint32_t increment);
static int write_memory(struct target *target, target_addr_t address,
uint32_t size, uint32_t count, const uint8_t *buffer);
-static int riscv013_test_sba_config_reg(struct target *target, target_addr_t legal_address,
- uint32_t num_words, target_addr_t illegal_address, bool run_sbbusyerror_test);
-static void write_memory_sba_simple(struct target *target, target_addr_t addr, uint32_t *write_data,
- uint32_t write_size, uint32_t sbcs);
-static void read_memory_sba_simple(struct target *target, target_addr_t addr,
- uint32_t *rd_buf, uint32_t read_size, uint32_t sbcs);
/**
* Since almost everything can be accomplish by scanning the dbus register, all
@@ -2307,7 +2301,6 @@ static int init_target(struct command_context *cmd_ctx,
generic_info->dmi_read = &dmi_read;
generic_info->dmi_write = &dmi_write;
generic_info->read_memory = read_memory;
- generic_info->test_sba_config_reg = &riscv013_test_sba_config_reg;
generic_info->hart_count = &riscv013_hart_count;
generic_info->data_bits = &riscv013_data_bits;
generic_info->print_info = &riscv013_print_info;
@@ -4408,360 +4401,6 @@ void riscv013_fill_dmi_nop_u64(struct target *target, char *buf)
buf_set_u64((unsigned char *)buf, DTM_DMI_ADDRESS_OFFSET, info->abits, 0);
}
-/* Helper function for riscv013_test_sba_config_reg */
-static int get_max_sbaccess(struct target *target)
-{
- RISCV013_INFO(info);
-
- uint32_t sbaccess128 = get_field(info->sbcs, DM_SBCS_SBACCESS128);
- uint32_t sbaccess64 = get_field(info->sbcs, DM_SBCS_SBACCESS64);
- uint32_t sbaccess32 = get_field(info->sbcs, DM_SBCS_SBACCESS32);
- uint32_t sbaccess16 = get_field(info->sbcs, DM_SBCS_SBACCESS16);
- uint32_t sbaccess8 = get_field(info->sbcs, DM_SBCS_SBACCESS8);
-
- if (sbaccess128)
- return 4;
- else if (sbaccess64)
- return 3;
- else if (sbaccess32)
- return 2;
- else if (sbaccess16)
- return 1;
- else if (sbaccess8)
- return 0;
- else
- return -1;
-}
-
-static uint32_t get_num_sbdata_regs(struct target *target)
-{
- RISCV013_INFO(info);
-
- uint32_t sbaccess128 = get_field(info->sbcs, DM_SBCS_SBACCESS128);
- uint32_t sbaccess64 = get_field(info->sbcs, DM_SBCS_SBACCESS64);
- uint32_t sbaccess32 = get_field(info->sbcs, DM_SBCS_SBACCESS32);
-
- if (sbaccess128)
- return 4;
- else if (sbaccess64)
- return 2;
- else if (sbaccess32)
- return 1;
- else
- return 0;
-}
-
-static int riscv013_test_sba_config_reg(struct target *target,
- target_addr_t legal_address, uint32_t num_words,
- target_addr_t illegal_address, bool run_sbbusyerror_test)
-{
- LOG_INFO("Testing System Bus Access as defined by RISC-V Debug Spec v0.13");
-
- uint32_t tests_failed = 0;
-
- uint32_t rd_val;
- uint32_t sbcs_orig;
- int retval = dmi_read(target, &sbcs_orig, DM_SBCS);
- if (retval != ERROR_OK)
- return retval;
-
- uint32_t sbcs = sbcs_orig;
- bool test_passed;
-
- int max_sbaccess = get_max_sbaccess(target);
-
- if (max_sbaccess == -1) {
- LOG_ERROR("System Bus Access not supported in this config.");
- return ERROR_FAIL;
- }
-
- if (get_field(sbcs, DM_SBCS_SBVERSION) != 1) {
- LOG_ERROR("System Bus Access unsupported SBVERSION (%d). Only version 1 is supported.",
- get_field(sbcs, DM_SBCS_SBVERSION));
- return ERROR_FAIL;
- }
-
- uint32_t num_sbdata_regs = get_num_sbdata_regs(target);
- assert(num_sbdata_regs);
-
- uint32_t rd_buf[num_sbdata_regs];
-
- /* Test 1: Simple write/read test */
- test_passed = true;
- sbcs = set_field(sbcs_orig, DM_SBCS_SBAUTOINCREMENT, 0);
- dmi_write(target, DM_SBCS, sbcs);
-
- uint32_t test_patterns[4] = {0xdeadbeef, 0xfeedbabe, 0x12345678, 0x08675309};
- for (uint32_t sbaccess = 0; sbaccess <= (uint32_t)max_sbaccess; sbaccess++) {
- sbcs = set_field(sbcs, DM_SBCS_SBACCESS, sbaccess);
- dmi_write(target, DM_SBCS, sbcs);
-
- uint32_t compare_mask = (sbaccess == 0) ? 0xff : (sbaccess == 1) ? 0xffff : 0xffffffff;
-
- for (uint32_t i = 0; i < num_words; i++) {
- uint32_t addr = legal_address + (i << sbaccess);
- uint32_t wr_data[num_sbdata_regs];
- for (uint32_t j = 0; j < num_sbdata_regs; j++)
- wr_data[j] = test_patterns[j] + i;
- write_memory_sba_simple(target, addr, wr_data, num_sbdata_regs, sbcs);
- }
-
- for (uint32_t i = 0; i < num_words; i++) {
- uint32_t addr = legal_address + (i << sbaccess);
- read_memory_sba_simple(target, addr, rd_buf, num_sbdata_regs, sbcs);
- for (uint32_t j = 0; j < num_sbdata_regs; j++) {
- if (((test_patterns[j]+i)&compare_mask) != (rd_buf[j]&compare_mask)) {
- LOG_ERROR("System Bus Access Test 1: Error reading non-autoincremented address %x,"
- "expected val = %x, read val = %x", addr, test_patterns[j]+i, rd_buf[j]);
- test_passed = false;
- tests_failed++;
- }
- }
- }
- }
- if (test_passed)
- LOG_INFO("System Bus Access Test 1: Simple write/read test PASSED.");
-
- /* Test 2: Address autoincrement test */
- target_addr_t curr_addr;
- target_addr_t prev_addr;
- test_passed = true;
- sbcs = set_field(sbcs_orig, DM_SBCS_SBAUTOINCREMENT, 1);
- dmi_write(target, DM_SBCS, sbcs);
-
- for (uint32_t sbaccess = 0; sbaccess <= (uint32_t)max_sbaccess; sbaccess++) {
- sbcs = set_field(sbcs, DM_SBCS_SBACCESS, sbaccess);
- dmi_write(target, DM_SBCS, sbcs);
-
- dmi_write(target, DM_SBADDRESS0, legal_address);
- read_sbcs_nonbusy(target, &sbcs);
- curr_addr = legal_address;
- for (uint32_t i = 0; i < num_words; i++) {
- prev_addr = curr_addr;
- read_sbcs_nonbusy(target, &sbcs);
- curr_addr = sb_read_address(target);
- if ((curr_addr - prev_addr != (uint32_t)(1 << sbaccess)) && (i != 0)) {
- LOG_ERROR("System Bus Access Test 2: Error with address auto-increment, sbaccess = %x.", sbaccess);
- test_passed = false;
- tests_failed++;
- }
- dmi_write(target, DM_SBDATA0, i);
- }
-
- read_sbcs_nonbusy(target, &sbcs);
-
- dmi_write(target, DM_SBADDRESS0, legal_address);
-
- uint32_t val;
- sbcs = set_field(sbcs, DM_SBCS_SBREADONDATA, 1);
- dmi_write(target, DM_SBCS, sbcs);
- dmi_read(target, &val, DM_SBDATA0); /* Dummy read to trigger first system bus read */
- curr_addr = legal_address;
- for (uint32_t i = 0; i < num_words; i++) {
- prev_addr = curr_addr;
- read_sbcs_nonbusy(target, &sbcs);
- curr_addr = sb_read_address(target);
- if ((curr_addr - prev_addr != (uint32_t)(1 << sbaccess)) && (i != 0)) {
- LOG_ERROR("System Bus Access Test 2: Error with address auto-increment, sbaccess = %x", sbaccess);
- test_passed = false;
- tests_failed++;
- }
- dmi_read(target, &val, DM_SBDATA0);
- read_sbcs_nonbusy(target, &sbcs);
- if (i != val) {
- LOG_ERROR("System Bus Access Test 2: Error reading auto-incremented address,"
- "expected val = %x, read val = %x.", i, val);
- test_passed = false;
- tests_failed++;
- }
- }
- }
- if (test_passed)
- LOG_INFO("System Bus Access Test 2: Address auto-increment test PASSED.");
-
- /* Test 3: Read from illegal address */
- read_memory_sba_simple(target, illegal_address, rd_buf, 1, sbcs_orig);
-
- dmi_read(target, &rd_val, DM_SBCS);
- if (get_field(rd_val, DM_SBCS_SBERROR) == 2) {
- sbcs = set_field(sbcs_orig, DM_SBCS_SBERROR, 2);
- dmi_write(target, DM_SBCS, sbcs);
- dmi_read(target, &rd_val, DM_SBCS);
- if (get_field(rd_val, DM_SBCS_SBERROR) == 0)
- LOG_INFO("System Bus Access Test 3: Illegal address read test PASSED.");
- else
- LOG_ERROR("System Bus Access Test 3: Illegal address read test FAILED, unable to clear to 0.");
- } else {
- LOG_ERROR("System Bus Access Test 3: Illegal address read test FAILED, unable to set error code.");
- }
-
- /* Test 4: Write to illegal address */
- write_memory_sba_simple(target, illegal_address, test_patterns, 1, sbcs_orig);
-
- dmi_read(target, &rd_val, DM_SBCS);
- if (get_field(rd_val, DM_SBCS_SBERROR) == 2) {
- sbcs = set_field(sbcs_orig, DM_SBCS_SBERROR, 2);
- dmi_write(target, DM_SBCS, sbcs);
- dmi_read(target, &rd_val, DM_SBCS);
- if (get_field(rd_val, DM_SBCS_SBERROR) == 0)
- LOG_INFO("System Bus Access Test 4: Illegal address write test PASSED.");
- else {
- LOG_ERROR("System Bus Access Test 4: Illegal address write test FAILED, unable to clear to 0.");
- tests_failed++;
- }
- } else {
- LOG_ERROR("System Bus Access Test 4: Illegal address write test FAILED, unable to set error code.");
- tests_failed++;
- }
-
- /* Test 5: Write with unsupported sbaccess size */
- uint32_t sbaccess128 = get_field(sbcs_orig, DM_SBCS_SBACCESS128);
-
- if (sbaccess128) {
- LOG_INFO("System Bus Access Test 5: SBCS sbaccess error test PASSED, all sbaccess sizes supported.");
- } else {
- sbcs = set_field(sbcs_orig, DM_SBCS_SBACCESS, 4);
-
- write_memory_sba_simple(target, legal_address, test_patterns, 1, sbcs);
-
- dmi_read(target, &rd_val, DM_SBCS);
- if (get_field(rd_val, DM_SBCS_SBERROR) == 4) {
- sbcs = set_field(sbcs_orig, DM_SBCS_SBERROR, 4);
- dmi_write(target, DM_SBCS, sbcs);
- dmi_read(target, &rd_val, DM_SBCS);
- if (get_field(rd_val, DM_SBCS_SBERROR) == 0)
- LOG_INFO("System Bus Access Test 5: SBCS sbaccess error test PASSED.");
- else {
- LOG_ERROR("System Bus Access Test 5: SBCS sbaccess error test FAILED, unable to clear to 0.");
- tests_failed++;
- }
- } else {
- LOG_ERROR("System Bus Access Test 5: SBCS sbaccess error test FAILED, unable to set error code.");
- tests_failed++;
- }
- }
-
- /* Test 6: Write to misaligned address */
- sbcs = set_field(sbcs_orig, DM_SBCS_SBACCESS, 1);
-
- write_memory_sba_simple(target, legal_address+1, test_patterns, 1, sbcs);
-
- dmi_read(target, &rd_val, DM_SBCS);
- if (get_field(rd_val, DM_SBCS_SBERROR) == 3) {
- sbcs = set_field(sbcs_orig, DM_SBCS_SBERROR, 3);
- dmi_write(target, DM_SBCS, sbcs);
- dmi_read(target, &rd_val, DM_SBCS);
- if (get_field(rd_val, DM_SBCS_SBERROR) == 0)
- LOG_INFO("System Bus Access Test 6: SBCS address alignment error test PASSED");
- else {
- LOG_ERROR("System Bus Access Test 6: SBCS address alignment error test FAILED, unable to clear to 0.");
- tests_failed++;
- }
- } else {
- LOG_ERROR("System Bus Access Test 6: SBCS address alignment error test FAILED, unable to set error code.");
- tests_failed++;
- }
-
- /* Test 7: Set sbbusyerror, only run this case in simulation as it is likely
- * impossible to hit otherwise */
- if (run_sbbusyerror_test) {
- sbcs = set_field(sbcs_orig, DM_SBCS_SBREADONADDR, 1);
- dmi_write(target, DM_SBCS, sbcs);
-
- for (int i = 0; i < 16; i++)
- dmi_write(target, DM_SBDATA0, 0xdeadbeef);
-
- for (int i = 0; i < 16; i++)
- dmi_write(target, DM_SBADDRESS0, legal_address);
-
- dmi_read(target, &rd_val, DM_SBCS);
- if (get_field(rd_val, DM_SBCS_SBBUSYERROR)) {
- sbcs = set_field(sbcs_orig, DM_SBCS_SBBUSYERROR, 1);
- dmi_write(target, DM_SBCS, sbcs);
- dmi_read(target, &rd_val, DM_SBCS);
- if (get_field(rd_val, DM_SBCS_SBBUSYERROR) == 0)
- LOG_INFO("System Bus Access Test 7: SBCS sbbusyerror test PASSED.");
- else {
- LOG_ERROR("System Bus Access Test 7: SBCS sbbusyerror test FAILED, unable to clear to 0.");
- tests_failed++;
- }
- } else {
- LOG_ERROR("System Bus Access Test 7: SBCS sbbusyerror test FAILED, unable to set error code.");
- tests_failed++;
- }
- }
-
- if (tests_failed == 0) {
- LOG_INFO("ALL TESTS PASSED");
- return ERROR_OK;
- } else {
- LOG_ERROR("%d TESTS FAILED", tests_failed);
- return ERROR_FAIL;
- }
-
-}
-
-static void write_memory_sba_simple(struct target *target, target_addr_t addr,
- uint32_t *write_data, uint32_t write_size, uint32_t sbcs)
-{
- RISCV013_INFO(info);
-
- uint32_t rd_sbcs;
- uint32_t masked_addr;
-
- uint32_t sba_size = get_field(info->sbcs, DM_SBCS_SBASIZE);
-
- read_sbcs_nonbusy(target, &rd_sbcs);
-
- uint32_t sbcs_no_readonaddr = set_field(sbcs, DM_SBCS_SBREADONADDR, 0);
- dmi_write(target, DM_SBCS, sbcs_no_readonaddr);
-
- for (uint32_t i = 0; i < sba_size/32; i++) {
- masked_addr = (addr >> 32*i) & 0xffffffff;
-
- if (i != 3)
- dmi_write(target, DM_SBADDRESS0+i, masked_addr);
- else
- dmi_write(target, DM_SBADDRESS3, masked_addr);
- }
-
- /* Write SBDATA registers starting with highest address, since write to
- * SBDATA0 triggers write */
- for (int i = write_size-1; i >= 0; i--)
- dmi_write(target, DM_SBDATA0+i, write_data[i]);
-}
-
-static void read_memory_sba_simple(struct target *target, target_addr_t addr,
- uint32_t *rd_buf, uint32_t read_size, uint32_t sbcs)
-{
- RISCV013_INFO(info);
-
- uint32_t rd_sbcs;
- uint32_t masked_addr;
-
- uint32_t sba_size = get_field(info->sbcs, DM_SBCS_SBASIZE);
-
- read_sbcs_nonbusy(target, &rd_sbcs);
-
- uint32_t sbcs_readonaddr = set_field(sbcs, DM_SBCS_SBREADONADDR, 1);
- dmi_write(target, DM_SBCS, sbcs_readonaddr);
-
- /* Write addresses starting with highest address register */
- for (int i = sba_size/32-1; i >= 0; i--) {
- masked_addr = (addr >> 32*i) & 0xffffffff;
-
- if (i != 3)
- dmi_write(target, DM_SBADDRESS0+i, masked_addr);
- else
- dmi_write(target, DM_SBADDRESS3, masked_addr);
- }
-
- read_sbcs_nonbusy(target, &rd_sbcs);
-
- for (uint32_t i = 0; i < read_size; i++)
- dmi_read(target, &(rd_buf[i]), DM_SBDATA0+i);
-}
-
int riscv013_dmi_write_u64_bits(struct target *target)
{
RISCV013_INFO(info);
diff --git a/src/target/riscv/riscv.c b/src/target/riscv/riscv.c
index dcd25fa08..8dafa02b4 100644
--- a/src/target/riscv/riscv.c
+++ b/src/target/riscv/riscv.c
@@ -2711,38 +2711,6 @@ COMMAND_HANDLER(riscv_dmi_write)
}
}
-COMMAND_HANDLER(riscv_test_sba_config_reg)
-{
- LOG_WARNING("Command \"riscv test_sba_config_reg\" is deprecated. "
- "It will be removed in a future OpenOCD version.");
-
- if (CMD_ARGC != 4) {
- LOG_ERROR("Command takes exactly 4 arguments");
- return ERROR_COMMAND_SYNTAX_ERROR;
- }
-
- struct target *target = get_current_target(CMD_CTX);
- RISCV_INFO(r);
-
- target_addr_t legal_address;
- uint32_t num_words;
- target_addr_t illegal_address;
- bool run_sbbusyerror_test;
-
- COMMAND_PARSE_NUMBER(target_addr, CMD_ARGV[0], legal_address);
- COMMAND_PARSE_NUMBER(u32, CMD_ARGV[1], num_words);
- COMMAND_PARSE_NUMBER(target_addr, CMD_ARGV[2], illegal_address);
- COMMAND_PARSE_ON_OFF(CMD_ARGV[3], run_sbbusyerror_test);
-
- if (r->test_sba_config_reg) {
- return r->test_sba_config_reg(target, legal_address, num_words,
- illegal_address, run_sbbusyerror_test);
- } else {
- LOG_ERROR("test_sba_config_reg is not implemented for this target.");
- return ERROR_FAIL;
- }
-}
-
COMMAND_HANDLER(riscv_reset_delays)
{
int wait = 0;
@@ -2982,19 +2950,6 @@ static const struct command_registration riscv_exec_command_handlers[] = {
.usage = "address value",
.help = "Perform a 32-bit DMI write of value at address."
},
- {
- .name = "test_sba_config_reg",
- .handler = riscv_test_sba_config_reg,
- .mode = COMMAND_ANY,
- .usage = "legal_address num_words "
- "illegal_address run_sbbusyerror_test[on/off]",
- .help = "Perform a series of tests on the SBCS register. "
- "Inputs are a legal, 128-byte aligned address and a number of words to "
- "read/write starting at that address (i.e., address range [legal address, "
- "legal_address+word_size*num_words) must be legally readable/writable), "
- "an illegal, 128-byte aligned address for error flag/handling cases, "
- "and whether sbbusyerror test should be run."
- },
{
.name = "reset_delays",
.handler = riscv_reset_delays,
diff --git a/src/target/riscv/riscv.h b/src/target/riscv/riscv.h
index e7e4c650b..aba0864e6 100644
--- a/src/target/riscv/riscv.h
+++ b/src/target/riscv/riscv.h
@@ -174,9 +174,6 @@ struct riscv_info {
int (*dmi_read)(struct target *target, uint32_t *value, uint32_t address);
int (*dmi_write)(struct target *target, uint32_t address, uint32_t value);
- int (*test_sba_config_reg)(struct target *target, target_addr_t legal_address,
- uint32_t num_words, target_addr_t illegal_address, bool run_sbbusyerror_test);
-
int (*sample_memory)(struct target *target,
struct riscv_sample_buf *buf,
riscv_sample_config_t *config,
commit 27edeb775791a598a1e7997fd74078164e771ca6
Author: Antonio Borneo <bor...@gm...>
Date: Mon Oct 17 12:28:57 2022 +0200
riscv: drop deprecated command 'riscv set_prefer_sba'
Change-Id: I546efe4e1a6b673b26cfb4a74b5c3809fecda49c
Signed-off-by: Antonio Borneo <bor...@gm...>
Reviewed-on: https://review.openocd.org/c/openocd/+/7271
Tested-by: jenkins
Reviewed-by: Jan Matyas <ma...@co...>
diff --git a/src/target/riscv/riscv.c b/src/target/riscv/riscv.c
index 4f24fb41e..dcd25fa08 100644
--- a/src/target/riscv/riscv.c
+++ b/src/target/riscv/riscv.c
@@ -2367,37 +2367,6 @@ COMMAND_HANDLER(riscv_set_reset_timeout_sec)
return ERROR_OK;
}
-COMMAND_HANDLER(riscv_set_prefer_sba)
-{
- struct target *target = get_current_target(CMD_CTX);
- RISCV_INFO(r);
- bool prefer_sba;
- LOG_WARNING("`riscv set_prefer_sba` is deprecated. Please use `riscv set_mem_access` instead.");
- if (CMD_ARGC != 1) {
- LOG_ERROR("Command takes exactly 1 parameter");
- return ERROR_COMMAND_SYNTAX_ERROR;
- }
- COMMAND_PARSE_ON_OFF(CMD_ARGV[0], prefer_sba);
- if (prefer_sba) {
- /* Use system bus with highest priority */
- r->mem_access_methods[0] = RISCV_MEM_ACCESS_SYSBUS;
- r->mem_access_methods[1] = RISCV_MEM_ACCESS_PROGBUF;
- r->mem_access_methods[2] = RISCV_MEM_ACCESS_ABSTRACT;
- } else {
- /* Use progbuf with highest priority */
- r->mem_access_methods[0] = RISCV_MEM_ACCESS_PROGBUF;
- r->mem_access_methods[1] = RISCV_MEM_ACCESS_SYSBUS;
- r->mem_access_methods[2] = RISCV_MEM_ACCESS_ABSTRACT;
- }
-
- /* Reset warning flags */
- r->mem_access_progbuf_warn = true;
- r->mem_access_sysbus_warn = true;
- r->mem_access_abstract_warn = true;
-
- return ERROR_OK;
-}
-
COMMAND_HANDLER(riscv_set_mem_access)
{
struct target *target = get_current_target(CMD_CTX);
@@ -2948,14 +2917,6 @@ static const struct command_registration riscv_exec_command_handlers[] = {
.usage = "[sec]",
.help = "Set the wall-clock timeout (in seconds) after reset is deasserted"
},
- {
- .name = "set_prefer_sba",
- .handler = riscv_set_prefer_sba,
- .mode = COMMAND_ANY,
- .usage = "on|off",
- .help = "When on, prefer to use System Bus Access to access memory. "
- "When off (default), prefer to use the Program Buffer to access memory."
- },
{
.name = "set_mem_access",
.handler = riscv_set_mem_access,
-----------------------------------------------------------------------
Summary of changes:
src/target/riscv/riscv-013.c | 361 -------------------------------------------
src/target/riscv/riscv.c | 84 ----------
src/target/riscv/riscv.h | 3 -
3 files changed, 448 deletions(-)
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|
From: openocd-gerrit <ope...@us...> - 2023-01-15 14:56:57
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".
The branch, master has been updated
via 228fe7300c7df7aa05ba2c0bc19edde6d0156401 (commit)
from 8af4d4462fb1954ab4f5d97bc0513e3082a6bb52 (commit)
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- Log -----------------------------------------------------------------
commit 228fe7300c7df7aa05ba2c0bc19edde6d0156401
Author: Tomas Vanek <va...@fb...>
Date: Thu Nov 3 10:32:36 2022 +0100
tcl/target: remove rp2040-core0.cfg
rp2040-core0.cfg configuration file was intended for a special adapter
which selects a SWD multidrop target on its own. This means
that rp2040-core0.cfg is totally unusable with a standard SWD
adapter. The file was marked as deprecated in 0.12 release.
The reworked rp2040.cfg can be restricted to use just one core:
openocd ... -c 'set USE_CORE 0' -f target/rp2040.cfg
Remove the obsoleted config.
Change-Id: Id886471622bb4a8cb83f5c4c3660657407aaaf74
Signed-off-by: Tomas Vanek <va...@fb...>
Reviewed-on: https://review.openocd.org/c/openocd/+/7326
Tested-by: jenkins
Reviewed-by: Antonio Borneo <bor...@gm...>
diff --git a/tcl/target/rp2040-core0.cfg b/tcl/target/rp2040-core0.cfg
deleted file mode 100644
index 8a111bcbc..000000000
--- a/tcl/target/rp2040-core0.cfg
+++ /dev/null
@@ -1,52 +0,0 @@
-# SPDX-License-Identifier: GPL-2.0-or-later
-
-# RP2040 is a microcontroller with dual Cortex-M0+ core.
-# https://www.raspberrypi.com/documentation/microcontrollers/rp2040.html
-
-# The device requires multidrop SWD for debug.
-# This configuration file is intended for a special adapter
-# which selects a multidrop target on its own.
-# Cannot be used with a standard SWD adapter!
-
-echo "Warn : rp2040-core0.cfg configuration file is deprecated and will be"
-echo " removed in the next release. Use following parameters instead:"
-echo " -c 'set USE_CORE 0' -f target/rp2040.cfg"
-
-transport select swd
-
-source [find target/swj-dp.tcl]
-
-if { [info exists CHIPNAME] } {
- set _CHIPNAME $CHIPNAME
-} else {
- set _CHIPNAME rp2040
-}
-
-if { [info exists WORKAREASIZE] } {
- set _WORKAREASIZE $WORKAREASIZE
-} else {
- set _WORKAREASIZE 0x10000
-}
-
-if { [info exists CPUTAPID] } {
- set _CPUTAPID $CPUTAPID
-} else {
- set _CPUTAPID 0x01002927
-}
-
-swj_newdap $_CHIPNAME cpu -expected-id $_CPUTAPID
-dap create $_CHIPNAME.dap -chain-position $_CHIPNAME.cpu
-set _TARGETNAME $_CHIPNAME.cpu
-target create $_TARGETNAME cortex_m -dap $_CHIPNAME.dap
-
-# Backup the work area. The flash probe runs an algorithm on the target CPU.
-# The flash is probed during gdb connect if gdb_memory_map is enabled (by default).
-$_TARGETNAME configure -work-area-phys 0x20010000 -work-area-size $_WORKAREASIZE -work-area-backup 1
-
-set _FLASHNAME $_CHIPNAME.flash
-set _FLASHSIZE 0x200000
-set _FLASHBASE 0x10000000
-flash bank $_FLASHNAME rp2040_flash $_FLASHBASE $_FLASHSIZE 1 32 $_TARGETNAME
-
-# srst does not exist; use SYSRESETREQ to perform a soft reset
-cortex_m reset_config sysresetreq
-----------------------------------------------------------------------
Summary of changes:
tcl/target/rp2040-core0.cfg | 52 ---------------------------------------------
1 file changed, 52 deletions(-)
delete mode 100644 tcl/target/rp2040-core0.cfg
hooks/post-receive
--
Main OpenOCD repository
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|
From: openocd-gerrit <ope...@us...> - 2023-01-15 14:56:33
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".
The branch, master has been updated
via 8af4d4462fb1954ab4f5d97bc0513e3082a6bb52 (commit)
from 0979cbc5bcf0688d10815aaa1b938a6086e75f0e (commit)
Those revisions listed above that are new to this repository have
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- Log -----------------------------------------------------------------
commit 8af4d4462fb1954ab4f5d97bc0513e3082a6bb52
Author: Tomas Vanek <va...@fb...>
Date: Sun Oct 2 14:46:11 2022 +0200
tcl/target: add SMP mode to rp2040.cfg
Add the variable selected configuration for SMP debug with rtos hwthread.
Use SMP by default.
Change-Id: I1c37d91688a3ab58d65c15686737892965711adc
Signed-off-by: Tomas Vanek <va...@fb...>
Reviewed-on: https://review.openocd.org/c/openocd/+/7242
Tested-by: jenkins
Reviewed-by: Antonio Borneo <bor...@gm...>
diff --git a/tcl/target/rp2040.cfg b/tcl/target/rp2040.cfg
index ee455420b..0593e03ba 100644
--- a/tcl/target/rp2040.cfg
+++ b/tcl/target/rp2040.cfg
@@ -26,12 +26,12 @@ if { [info exists CPUTAPID] } {
set _CPUTAPID 0x01002927
}
-# Set to '0' or '1' for single core configuration,
-# anything else for isolated debugging of both cores
+# Set to '0' or '1' for single core configuration, 'SMP' for -rtos hwthread
+# handling of both cores, anything else for isolated debugging of both cores
if { [info exists USE_CORE] } {
set _USE_CORE $USE_CORE
} else {
- set _USE_CORE { 0 1 }
+ set _USE_CORE SMP
}
set _BOTH_CORES [expr { $_USE_CORE != 0 && $_USE_CORE != 1 }]
@@ -54,6 +54,12 @@ if { $_USE_CORE != 0 } {
$_TARGETNAME_1 cortex_m reset_config sysresetreq
}
+if {[string compare $_USE_CORE SMP] == 0} {
+ $_TARGETNAME_0 configure -rtos hwthread
+ $_TARGETNAME_1 configure -rtos hwthread
+ target smp $_TARGETNAME_0 $_TARGETNAME_1
+}
+
if { $_USE_CORE == 1 } {
set _FLASH_TARGET $_TARGETNAME_1
} else {
-----------------------------------------------------------------------
Summary of changes:
tcl/target/rp2040.cfg | 12 +++++++++---
1 file changed, 9 insertions(+), 3 deletions(-)
hooks/post-receive
--
Main OpenOCD repository
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From: openocd-gerrit <ope...@us...> - 2023-01-15 14:55:54
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".
The branch, master has been updated
via 0979cbc5bcf0688d10815aaa1b938a6086e75f0e (commit)
from 59763653c631625f195bf652f226f8537fe66832 (commit)
Those revisions listed above that are new to this repository have
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- Log -----------------------------------------------------------------
commit 0979cbc5bcf0688d10815aaa1b938a6086e75f0e
Author: Tomas Vanek <va...@fb...>
Date: Sun Oct 2 11:21:42 2022 +0200
flash/nor/rp2040: make SPI flash ID detection optional
Do not read ID from SPI flash and suppress autodetection
if non-zero flash bank size is configured.
Change-Id: Idcf9ee6ca17f9fa89964a60da7bf11e47b4af5e7
Signed-off-by: Tomas Vanek <va...@fb...>
Reviewed-on: https://review.openocd.org/c/openocd/+/7241
Tested-by: jenkins
Reviewed-by: Antonio Borneo <bor...@gm...>
diff --git a/src/flash/nor/rp2040.c b/src/flash/nor/rp2040.c
index feff9a6f9..b0d118bdb 100644
--- a/src/flash/nor/rp2040.c
+++ b/src/flash/nor/rp2040.c
@@ -50,6 +50,10 @@ struct rp2040_flash_bank {
const struct flash_device *dev;
};
+/* guessed SPI flash description if autodetection disabled (same as win w25q16jv) */
+static const struct flash_device rp2040_default_spi_device =
+ FLASH_ID("autodetect disabled", 0x03, 0x00, 0x02, 0xd8, 0xc7, 0, 0x100, 0x10000, 0);
+
static uint32_t rp2040_lookup_symbol(struct target *target, uint32_t tag, uint16_t *symbol)
{
uint32_t magic;
@@ -432,41 +436,48 @@ static int rp2040_flash_probe(struct flash_bank *bank)
return err;
}
- err = rp2040_stack_grab_and_prep(bank);
+ if (bank->size) {
+ /* size overridden, suppress reading SPI flash ID */
+ priv->dev = &rp2040_default_spi_device;
+ LOG_DEBUG("SPI flash autodetection disabled, using configured size");
- uint32_t device_id = 0;
- if (err == ERROR_OK)
- err = rp2040_spi_read_flash_id(target, &device_id);
+ } else {
+ /* zero bank size in cfg, read SPI flash ID and autodetect */
+ err = rp2040_stack_grab_and_prep(bank);
- rp2040_finalize_stack_free(bank);
+ uint32_t device_id = 0;
+ if (err == ERROR_OK)
+ err = rp2040_spi_read_flash_id(target, &device_id);
- if (err != ERROR_OK)
- return err;
+ rp2040_finalize_stack_free(bank);
- /* search for a SPI flash Device ID match */
- priv->dev = NULL;
- for (const struct flash_device *p = flash_devices; p->name ; p++)
- if (p->device_id == device_id) {
- priv->dev = p;
- break;
+ if (err != ERROR_OK)
+ return err;
+
+ /* search for a SPI flash Device ID match */
+ priv->dev = NULL;
+ for (const struct flash_device *p = flash_devices; p->name ; p++)
+ if (p->device_id == device_id) {
+ priv->dev = p;
+ break;
+ }
+
+ if (!priv->dev) {
+ LOG_ERROR("Unknown flash device (ID 0x%08" PRIx32 ")", device_id);
+ return ERROR_FAIL;
}
+ LOG_INFO("Found flash device '%s' (ID 0x%08" PRIx32 ")",
+ priv->dev->name, priv->dev->device_id);
- if (!priv->dev) {
- LOG_ERROR("Unknown flash device (ID 0x%08" PRIx32 ")", device_id);
- return ERROR_FAIL;
+ bank->size = priv->dev->size_in_bytes;
}
- LOG_INFO("Found flash device \'%s\' (ID 0x%08" PRIx32 ")",
- priv->dev->name, priv->dev->device_id);
-
/* the Boot ROM flash_range_program() routine requires page alignment */
bank->write_start_alignment = priv->dev->pagesize;
bank->write_end_alignment = priv->dev->pagesize;
- bank->size = priv->dev->size_in_bytes;
-
bank->num_sectors = bank->size / priv->dev->sectorsize;
- LOG_INFO("RP2040 B0 Flash Probe: %d bytes @" TARGET_ADDR_FMT ", in %d sectors\n",
+ LOG_INFO("RP2040 B0 Flash Probe: %" PRIu32 " bytes @" TARGET_ADDR_FMT ", in %u sectors\n",
bank->size, bank->base, bank->num_sectors);
bank->sectors = alloc_block_array(0, priv->dev->sectorsize, bank->num_sectors);
if (!bank->sectors)
-----------------------------------------------------------------------
Summary of changes:
src/flash/nor/rp2040.c | 55 ++++++++++++++++++++++++++++++--------------------
1 file changed, 33 insertions(+), 22 deletions(-)
hooks/post-receive
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From: openocd-gerrit <ope...@us...> - 2023-01-15 14:55:22
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".
The branch, master has been updated
via 59763653c631625f195bf652f226f8537fe66832 (commit)
from 083100fca3c5fd019517e38028d26a6c8e33a364 (commit)
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- Log -----------------------------------------------------------------
commit 59763653c631625f195bf652f226f8537fe66832
Author: Tomas Vanek <va...@fb...>
Date: Sat Oct 1 17:10:31 2022 +0200
target/cortex_m: add SMP support for Cortex-M
Cortex-M support for SMP multicore targets.
This SMP implementation unlike older ones does not act
on the first halted target found. It polls targets
until a SMP group is finished and stores eventual
'halted' events instead of emitting them. As soon as polling
of a group is done, poll proceeds with SMP related tasks.
This approach improves detection of a reason why debug
stopped - a correct reason is detected for all targets,
not only for the first found.
Drawback: SMP target group should be defined in the same
order as the targets were defined.
Obsolete gdb 'J' packet/smp_gdb command core switching is not implemented,
use with rtos hwthread.
Only one core is resumed if debug_execution is requested.
Some ideas taken from Graham Sanderson's [4936]
and src/target/aarch64.c
Added error checking of armv7m_restore_context().
Change-Id: I60f5b79e74b624dc2b5835ff10e38ac2ccb23792
Link: [4936]: target/cortex_m: Add smp support for Cortex M | https://review.openocd.org/c/openocd/+/4936
Signed-off-by: Tomas Vanek <va...@fb...>
Reviewed-on: https://review.openocd.org/c/openocd/+/7239
Tested-by: jenkins
Reviewed-by: Antonio Borneo <bor...@gm...>
diff --git a/src/target/cortex_m.c b/src/target/cortex_m.c
index 017a6d3a1..88e9bb299 100644
--- a/src/target/cortex_m.c
+++ b/src/target/cortex_m.c
@@ -28,6 +28,7 @@
#include "register.h"
#include "arm_opcodes.h"
#include "arm_semihosting.h"
+#include "smp.h"
#include <helper/time_support.h>
#include <rtt/rtt.h>
@@ -871,7 +872,7 @@ static int cortex_m_debug_entry(struct target *target)
return ERROR_OK;
}
-static int cortex_m_poll(struct target *target)
+static int cortex_m_poll_one(struct target *target)
{
int detected_failure = ERROR_OK;
int retval = ERROR_OK;
@@ -934,21 +935,26 @@ static int cortex_m_poll(struct target *target)
if ((prev_target_state == TARGET_RUNNING) || (prev_target_state == TARGET_RESET)) {
retval = cortex_m_debug_entry(target);
- if (retval != ERROR_OK)
- return retval;
- if (arm_semihosting(target, &retval) != 0)
+ /* arm_semihosting needs to know registers, don't run if debug entry returned error */
+ if (retval == ERROR_OK && arm_semihosting(target, &retval) != 0)
return retval;
- target_call_event_callbacks(target, TARGET_EVENT_HALTED);
+ if (target->smp) {
+ LOG_TARGET_DEBUG(target, "postpone target event 'halted'");
+ target->smp_halt_event_postponed = true;
+ } else {
+ /* regardless of errors returned in previous code update state */
+ target_call_event_callbacks(target, TARGET_EVENT_HALTED);
+ }
}
if (prev_target_state == TARGET_DEBUG_RUNNING) {
retval = cortex_m_debug_entry(target);
- if (retval != ERROR_OK)
- return retval;
target_call_event_callbacks(target, TARGET_EVENT_DEBUG_HALTED);
}
+ if (retval != ERROR_OK)
+ return retval;
}
if (target->state == TARGET_UNKNOWN) {
@@ -981,7 +987,104 @@ static int cortex_m_poll(struct target *target)
return retval;
}
-static int cortex_m_halt(struct target *target)
+static int cortex_m_halt_one(struct target *target);
+
+static int cortex_m_smp_halt_all(struct list_head *smp_targets)
+{
+ int retval = ERROR_OK;
+ struct target_list *head;
+
+ foreach_smp_target(head, smp_targets) {
+ struct target *curr = head->target;
+ if (!target_was_examined(curr))
+ continue;
+ if (curr->state == TARGET_HALTED)
+ continue;
+
+ int ret2 = cortex_m_halt_one(curr);
+ if (retval == ERROR_OK)
+ retval = ret2; /* store the first error code ignore others */
+ }
+ return retval;
+}
+
+static int cortex_m_smp_post_halt_poll(struct list_head *smp_targets)
+{
+ int retval = ERROR_OK;
+ struct target_list *head;
+
+ foreach_smp_target(head, smp_targets) {
+ struct target *curr = head->target;
+ if (!target_was_examined(curr))
+ continue;
+ /* skip targets that were already halted */
+ if (curr->state == TARGET_HALTED)
+ continue;
+
+ int ret2 = cortex_m_poll_one(curr);
+ if (retval == ERROR_OK)
+ retval = ret2; /* store the first error code ignore others */
+ }
+ return retval;
+}
+
+static int cortex_m_poll_smp(struct list_head *smp_targets)
+{
+ int retval = ERROR_OK;
+ struct target_list *head;
+ bool halted = false;
+
+ foreach_smp_target(head, smp_targets) {
+ struct target *curr = head->target;
+ if (curr->smp_halt_event_postponed) {
+ halted = true;
+ break;
+ }
+ }
+
+ if (halted) {
+ retval = cortex_m_smp_halt_all(smp_targets);
+
+ int ret2 = cortex_m_smp_post_halt_poll(smp_targets);
+ if (retval == ERROR_OK)
+ retval = ret2; /* store the first error code ignore others */
+
+ foreach_smp_target(head, smp_targets) {
+ struct target *curr = head->target;
+ if (!curr->smp_halt_event_postponed)
+ continue;
+
+ curr->smp_halt_event_postponed = false;
+ if (curr->state == TARGET_HALTED) {
+ LOG_TARGET_DEBUG(curr, "sending postponed target event 'halted'");
+ target_call_event_callbacks(curr, TARGET_EVENT_HALTED);
+ }
+ }
+ /* There is no need to set gdb_service->target
+ * as hwthread_update_threads() selects an interesting thread
+ * by its own
+ */
+ }
+ return retval;
+}
+
+static int cortex_m_poll(struct target *target)
+{
+ int retval = cortex_m_poll_one(target);
+
+ if (target->smp) {
+ struct target_list *last;
+ last = list_last_entry(target->smp_targets, struct target_list, lh);
+ if (target == last->target)
+ /* After the last target in SMP group has been polled
+ * check for postponed halted events and eventually halt and re-poll
+ * other targets */
+ cortex_m_poll_smp(target->smp_targets);
+ }
+ return retval;
+}
+
+static int cortex_m_halt_one(struct target *target)
{
LOG_TARGET_DEBUG(target, "target->state: %s", target_state_name(target));
@@ -1019,6 +1122,14 @@ static int cortex_m_halt(struct target *target)
return ERROR_OK;
}
+static int cortex_m_halt(struct target *target)
+{
+ if (target->smp)
+ return cortex_m_smp_halt_all(target->smp_targets);
+ else
+ return cortex_m_halt_one(target);
+}
+
static int cortex_m_soft_reset_halt(struct target *target)
{
struct cortex_m_common *cortex_m = target_to_cm(target);
@@ -1096,8 +1207,8 @@ void cortex_m_enable_breakpoints(struct target *target)
}
}
-static int cortex_m_resume(struct target *target, int current,
- target_addr_t address, int handle_breakpoints, int debug_execution)
+static int cortex_m_restore_one(struct target *target, bool current,
+ target_addr_t *address, bool handle_breakpoints, bool debug_execution)
{
struct armv7m_common *armv7m = target_to_armv7m(target);
struct breakpoint *breakpoint = NULL;
@@ -1105,7 +1216,7 @@ static int cortex_m_resume(struct target *target, int current,
struct reg *r;
if (target->state != TARGET_HALTED) {
- LOG_TARGET_WARNING(target, "target not halted");
+ LOG_TARGET_ERROR(target, "target not halted");
return ERROR_TARGET_NOT_HALTED;
}
@@ -1147,7 +1258,7 @@ static int cortex_m_resume(struct target *target, int current,
/* current = 1: continue on current pc, otherwise continue at <address> */
r = armv7m->arm.pc;
if (!current) {
- buf_set_u32(r->value, 0, 32, address);
+ buf_set_u32(r->value, 0, 32, *address);
r->dirty = true;
r->valid = true;
}
@@ -1161,8 +1272,12 @@ static int cortex_m_resume(struct target *target, int current,
armv7m_maybe_skip_bkpt_inst(target, NULL);
resume_pc = buf_get_u32(r->value, 0, 32);
+ if (current)
+ *address = resume_pc;
- armv7m_restore_context(target);
+ int retval = armv7m_restore_context(target);
+ if (retval != ERROR_OK)
+ return retval;
/* the front-end may request us not to handle breakpoints */
if (handle_breakpoints) {
@@ -1172,34 +1287,99 @@ static int cortex_m_resume(struct target *target, int current,
LOG_TARGET_DEBUG(target, "unset breakpoint at " TARGET_ADDR_FMT " (ID: %" PRIu32 ")",
breakpoint->address,
breakpoint->unique_id);
- cortex_m_unset_breakpoint(target, breakpoint);
- cortex_m_single_step_core(target);
- cortex_m_set_breakpoint(target, breakpoint);
+ retval = cortex_m_unset_breakpoint(target, breakpoint);
+ if (retval == ERROR_OK)
+ retval = cortex_m_single_step_core(target);
+ int ret2 = cortex_m_set_breakpoint(target, breakpoint);
+ if (retval != ERROR_OK)
+ return retval;
+ if (ret2 != ERROR_OK)
+ return ret2;
}
}
+ return ERROR_OK;
+}
+
+static int cortex_m_restart_one(struct target *target, bool debug_execution)
+{
+ struct armv7m_common *armv7m = target_to_armv7m(target);
+
/* Restart core */
cortex_m_set_maskints_for_run(target);
cortex_m_write_debug_halt_mask(target, 0, C_HALT);
target->debug_reason = DBG_REASON_NOTHALTED;
-
/* registers are now invalid */
register_cache_invalidate(armv7m->arm.core_cache);
if (!debug_execution) {
target->state = TARGET_RUNNING;
target_call_event_callbacks(target, TARGET_EVENT_RESUMED);
- LOG_TARGET_DEBUG(target, "target resumed at 0x%" PRIx32 "", resume_pc);
} else {
target->state = TARGET_DEBUG_RUNNING;
target_call_event_callbacks(target, TARGET_EVENT_DEBUG_RESUMED);
- LOG_TARGET_DEBUG(target, "target debug resumed at 0x%" PRIx32 "", resume_pc);
}
return ERROR_OK;
}
+static int cortex_m_restore_smp(struct target *target, bool handle_breakpoints)
+{
+ struct target_list *head;
+ target_addr_t address;
+ foreach_smp_target(head, target->smp_targets) {
+ struct target *curr = head->target;
+ /* skip calling target */
+ if (curr == target)
+ continue;
+ if (!target_was_examined(curr))
+ continue;
+ /* skip running targets */
+ if (curr->state == TARGET_RUNNING)
+ continue;
+
+ int retval = cortex_m_restore_one(curr, true, &address,
+ handle_breakpoints, false);
+ if (retval != ERROR_OK)
+ return retval;
+
+ retval = cortex_m_restart_one(curr, false);
+ if (retval != ERROR_OK)
+ return retval;
+
+ LOG_TARGET_DEBUG(curr, "SMP resumed at " TARGET_ADDR_FMT, address);
+ }
+ return ERROR_OK;
+}
+
+static int cortex_m_resume(struct target *target, int current,
+ target_addr_t address, int handle_breakpoints, int debug_execution)
+{
+ int retval = cortex_m_restore_one(target, !!current, &address, !!handle_breakpoints, !!debug_execution);
+ if (retval != ERROR_OK) {
+ LOG_TARGET_ERROR(target, "context restore failed, aborting resume");
+ return retval;
+ }
+
+ if (target->smp && !debug_execution) {
+ retval = cortex_m_restore_smp(target, !!handle_breakpoints);
+ if (retval != ERROR_OK)
+ LOG_WARNING("resume of a SMP target failed, trying to resume current one");
+ }
+
+ cortex_m_restart_one(target, !!debug_execution);
+ if (retval != ERROR_OK) {
+ LOG_TARGET_ERROR(target, "resume failed");
+ return retval;
+ }
+
+ LOG_TARGET_DEBUG(target, "%sresumed at " TARGET_ADDR_FMT,
+ debug_execution ? "debug " : "", address);
+
+ return ERROR_OK;
+}
+
/* int irqstepcount = 0; */
static int cortex_m_step(struct target *target, int current,
target_addr_t address, int handle_breakpoints)
@@ -1217,6 +1397,11 @@ static int cortex_m_step(struct target *target, int current,
return ERROR_TARGET_NOT_HALTED;
}
+ /* Just one of SMP cores will step. Set the gdb control
+ * target to current one or gdb miss gdb-end event */
+ if (target->smp && target->gdb_service)
+ target->gdb_service->target = target;
+
/* current = 1: continue on current pc, otherwise continue at <address> */
if (!current) {
buf_set_u32(pc->value, 0, 32, address);
@@ -2850,6 +3035,9 @@ static const struct command_registration cortex_m_exec_command_handlers[] = {
.help = "configure software reset handling",
.usage = "['sysresetreq'|'vectreset']",
},
+ {
+ .chain = smp_command_handlers,
+ },
COMMAND_REGISTRATION_DONE
};
static const struct command_registration cortex_m_command_handlers[] = {
diff --git a/src/target/target.h b/src/target/target.h
index d445c2975..ef9ba1062 100644
--- a/src/target/target.h
+++ b/src/target/target.h
@@ -193,6 +193,10 @@ struct target {
struct list_head *smp_targets; /* list all targets in this smp group/cluster
* The head of the list is shared between the
* cluster, thus here there is a pointer */
+ bool smp_halt_event_postponed; /* Some SMP implementations (currently Cortex-M) stores
+ * 'halted' events and emits them after all targets of
+ * the SMP group has been polled */
+
/* the gdb service is there in case of smp, we have only one gdb server
* for all smp target
* the target attached to the gdb is changing dynamically by changing
-----------------------------------------------------------------------
Summary of changes:
src/target/cortex_m.c | 226 +++++++++++++++++++++++++++++++++++++++++++++-----
src/target/target.h | 4 +
2 files changed, 211 insertions(+), 19 deletions(-)
hooks/post-receive
--
Main OpenOCD repository
|
|
From: openocd-gerrit <ope...@us...> - 2023-01-15 14:54:53
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".
The branch, master has been updated
via 083100fca3c5fd019517e38028d26a6c8e33a364 (commit)
from d0436b0cdabb2106701222628d78932c973a1e62 (commit)
Those revisions listed above that are new to this repository have
not appeared on any other notification email; so we list those
revisions in full, below.
- Log -----------------------------------------------------------------
commit 083100fca3c5fd019517e38028d26a6c8e33a364
Author: Tomas Vanek <va...@fb...>
Date: Sat Oct 1 17:00:51 2022 +0200
target/armv7m: check error in armv7m_restore_context()
Return error if arm.write_core_reg() fails.
Change-Id: Ide8f5aa5958532b202dc9f5e13d3250a706d832d
Signed-off-by: Tomas Vanek <va...@fb...>
Reviewed-on: https://review.openocd.org/c/openocd/+/7238
Tested-by: jenkins
Reviewed-by: Antonio Borneo <bor...@gm...>
diff --git a/src/target/armv7m.c b/src/target/armv7m.c
index 93df5877e..1b85315de 100644
--- a/src/target/armv7m.c
+++ b/src/target/armv7m.c
@@ -182,8 +182,11 @@ int armv7m_restore_context(struct target *target)
for (i = cache->num_regs - 1; i >= 0; i--) {
struct reg *r = &cache->reg_list[i];
- if (r->exist && r->dirty)
- armv7m->arm.write_core_reg(target, r, i, ARM_MODE_ANY, r->value);
+ if (r->exist && r->dirty) {
+ int retval = armv7m->arm.write_core_reg(target, r, i, ARM_MODE_ANY, r->value);
+ if (retval != ERROR_OK)
+ return retval;
+ }
}
return ERROR_OK;
-----------------------------------------------------------------------
Summary of changes:
src/target/armv7m.c | 7 +++++--
1 file changed, 5 insertions(+), 2 deletions(-)
hooks/post-receive
--
Main OpenOCD repository
|
|
From: openocd-gerrit <ope...@us...> - 2023-01-15 14:54:15
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".
The branch, master has been updated
via d0436b0cdabb2106701222628d78932c973a1e62 (commit)
from d96dc47ef67e427cd64a07d9825fd297e3a81633 (commit)
Those revisions listed above that are new to this repository have
not appeared on any other notification email; so we list those
revisions in full, below.
- Log -----------------------------------------------------------------
commit d0436b0cdabb2106701222628d78932c973a1e62
Author: Koudai Iwahori <ko...@go...>
Date: Tue Oct 4 04:21:35 2022 -0700
armv8: Add support of pointer authentication
When pointer authentication is enabled, some upper bits of the link
register (LR[63:VA_SIZE]) are used to store a signature. Therefore, GDB
need to remove the signature to get backtraces.
GDB has support of pointer authentication. When pointer authenticaion is
enabled, GDB requests 8-bytes mask to the target to remove the
signature. mask[63:VA_SIZE] should be all set and mask[VA_SIZE-1:0]
should be all cleared. GDB removes the signature by addr&~mask or
addr|mask.
I added a feature to provide the mask for pointer authentication.
Signed-off-by: Koudai Iwahori <ko...@go...>
Change-Id: I56fbbf9cc23619b6536ecd326f350c8bf137f322
Reviewed-on: https://review.openocd.org/c/openocd/+/7248
Tested-by: jenkins
Reviewed-by: Antonio Borneo <bor...@gm...>
diff --git a/doc/openocd.texi b/doc/openocd.texi
index c7fee3e71..aa1707b7d 100644
--- a/doc/openocd.texi
+++ b/doc/openocd.texi
@@ -10297,6 +10297,16 @@ the target, the exception catch must be disabled again with @command{$target_nam
Issuing the command without options prints the current configuration.
@end deffn
+@deffn {Command} {$target_name pauth} [@option{off}|@option{on}]
+Enable or disable pointer authentication features.
+When pointer authentication is used on ARM cores, GDB asks GDB servers for an 8-bytes mask to remove signature bits added by pointer authentication.
+If this feature is enabled, OpenOCD provides GDB with an 8-bytes mask.
+Pointer authentication feature is broken until gdb 12.1, going to be fixed.
+Consider using a newer version of gdb if you want to enable pauth feature.
+The default configuration is @option{off}.
+@end deffn
+
+
@section EnSilica eSi-RISC Architecture
eSi-RISC is a highly configurable microprocessor architecture for embedded systems
diff --git a/src/target/armv8.c b/src/target/armv8.c
index de0bddb3e..ff71a8e63 100644
--- a/src/target/armv8.c
+++ b/src/target/armv8.c
@@ -114,6 +114,166 @@ const char *armv8_mode_name(unsigned psr_mode)
return "UNRECOGNIZED";
}
+static uint8_t armv8_pa_size(uint32_t ps)
+{
+ uint8_t ret = 0;
+ switch (ps) {
+ case 0:
+ ret = 32;
+ break;
+ case 1:
+ ret = 36;
+ break;
+ case 2:
+ ret = 40;
+ break;
+ case 3:
+ ret = 42;
+ break;
+ case 4:
+ ret = 44;
+ break;
+ case 5:
+ ret = 48;
+ break;
+ default:
+ LOG_INFO("Unknown physical address size");
+ break;
+ }
+ return ret;
+}
+
+static __attribute__((unused)) int armv8_read_ttbcr32(struct target *target)
+{
+ struct armv8_common *armv8 = target_to_armv8(target);
+ struct arm_dpm *dpm = armv8->arm.dpm;
+ uint32_t ttbcr, ttbcr_n;
+ int retval = dpm->prepare(dpm);
+ if (retval != ERROR_OK)
+ goto done;
+ /* MRC p15,0,<Rt>,c2,c0,2 ; Read CP15 Translation Table Base Control Register*/
+ retval = dpm->instr_read_data_r0(dpm,
+ ARMV4_5_MRC(15, 0, 0, 2, 0, 2),
+ &ttbcr);
+ if (retval != ERROR_OK)
+ goto done;
+
+ LOG_DEBUG("ttbcr %" PRIx32, ttbcr);
+
+ ttbcr_n = ttbcr & 0x7;
+ armv8->armv8_mmu.ttbcr = ttbcr;
+
+ /*
+ * ARM Architecture Reference Manual (ARMv7-A and ARMv7-R edition),
+ * document # ARM DDI 0406C
+ */
+ armv8->armv8_mmu.ttbr_range[0] = 0xffffffff >> ttbcr_n;
+ armv8->armv8_mmu.ttbr_range[1] = 0xffffffff;
+ armv8->armv8_mmu.ttbr_mask[0] = 0xffffffff << (14 - ttbcr_n);
+ armv8->armv8_mmu.ttbr_mask[1] = 0xffffffff << 14;
+
+ LOG_DEBUG("ttbr1 %s, ttbr0_mask %" PRIx32 " ttbr1_mask %" PRIx32,
+ (ttbcr_n != 0) ? "used" : "not used",
+ armv8->armv8_mmu.ttbr_mask[0],
+ armv8->armv8_mmu.ttbr_mask[1]);
+
+done:
+ dpm->finish(dpm);
+ return retval;
+}
+
+static int armv8_read_ttbcr(struct target *target)
+{
+ struct armv8_common *armv8 = target_to_armv8(target);
+ struct arm_dpm *dpm = armv8->arm.dpm;
+ struct arm *arm = &armv8->arm;
+ uint32_t ttbcr;
+ uint64_t ttbcr_64;
+
+ int retval = dpm->prepare(dpm);
+ if (retval != ERROR_OK)
+ goto done;
+
+ /* clear ttrr1_used and ttbr0_mask */
+ memset(&armv8->armv8_mmu.ttbr1_used, 0, sizeof(armv8->armv8_mmu.ttbr1_used));
+ memset(&armv8->armv8_mmu.ttbr0_mask, 0, sizeof(armv8->armv8_mmu.ttbr0_mask));
+
+ switch (armv8_curel_from_core_mode(arm->core_mode)) {
+ case SYSTEM_CUREL_EL3:
+ retval = dpm->instr_read_data_r0(dpm,
+ ARMV8_MRS(SYSTEM_TCR_EL3, 0),
+ &ttbcr);
+ retval += dpm->instr_read_data_r0_64(dpm,
+ ARMV8_MRS(SYSTEM_TTBR0_EL3, 0),
+ &armv8->ttbr_base);
+ if (retval != ERROR_OK)
+ goto done;
+ armv8->va_size = 64 - (ttbcr & 0x3F);
+ armv8->pa_size = armv8_pa_size((ttbcr >> 16) & 7);
+ armv8->page_size = (ttbcr >> 14) & 3;
+ break;
+ case SYSTEM_CUREL_EL2:
+ retval = dpm->instr_read_data_r0(dpm,
+ ARMV8_MRS(SYSTEM_TCR_EL2, 0),
+ &ttbcr);
+ retval += dpm->instr_read_data_r0_64(dpm,
+ ARMV8_MRS(SYSTEM_TTBR0_EL2, 0),
+ &armv8->ttbr_base);
+ if (retval != ERROR_OK)
+ goto done;
+ armv8->va_size = 64 - (ttbcr & 0x3F);
+ armv8->pa_size = armv8_pa_size((ttbcr >> 16) & 7);
+ armv8->page_size = (ttbcr >> 14) & 3;
+ break;
+ case SYSTEM_CUREL_EL0:
+ armv8_dpm_modeswitch(dpm, ARMV8_64_EL1H);
+ /* fall through */
+ case SYSTEM_CUREL_EL1:
+ retval = dpm->instr_read_data_r0_64(dpm,
+ ARMV8_MRS(SYSTEM_TCR_EL1, 0),
+ &ttbcr_64);
+ armv8->va_size = 64 - (ttbcr_64 & 0x3F);
+ armv8->pa_size = armv8_pa_size((ttbcr_64 >> 32) & 7);
+ armv8->page_size = (ttbcr_64 >> 14) & 3;
+ armv8->armv8_mmu.ttbr1_used = (((ttbcr_64 >> 16) & 0x3F) != 0) ? 1 : 0;
+ armv8->armv8_mmu.ttbr0_mask = 0x0000FFFFFFFFFFFF;
+ retval += dpm->instr_read_data_r0_64(dpm,
+ ARMV8_MRS(SYSTEM_TTBR0_EL1 | (armv8->armv8_mmu.ttbr1_used), 0),
+ &armv8->ttbr_base);
+ if (retval != ERROR_OK)
+ goto done;
+ break;
+ default:
+ LOG_ERROR("unknown core state");
+ retval = ERROR_FAIL;
+ break;
+ }
+ if (retval != ERROR_OK)
+ goto done;
+
+ if (armv8->armv8_mmu.ttbr1_used == 1)
+ LOG_INFO("TTBR0 access above %" PRIx64, (uint64_t)(armv8->armv8_mmu.ttbr0_mask));
+
+done:
+ armv8_dpm_modeswitch(dpm, ARM_MODE_ANY);
+ dpm->finish(dpm);
+ return retval;
+}
+
+static int armv8_get_pauth_mask(struct armv8_common *armv8, uint64_t *mask)
+{
+ struct arm *arm = &armv8->arm;
+ int retval = ERROR_OK;
+ if (armv8->va_size == 0)
+ retval = armv8_read_ttbcr(arm->target);
+ if (retval != ERROR_OK)
+ return retval;
+
+ *mask = ~(((uint64_t)1 << armv8->va_size) - 1);
+
+ return retval;
+}
+
static int armv8_read_reg(struct armv8_common *armv8, int regnum, uint64_t *regval)
{
struct arm_dpm *dpm = &armv8->dpm;
@@ -191,6 +351,10 @@ static int armv8_read_reg(struct armv8_common *armv8, int regnum, uint64_t *regv
ARMV8_MRS(SYSTEM_SPSR_EL3, 0), &value);
value_64 = value;
break;
+ case ARMV8_PAUTH_CMASK:
+ case ARMV8_PAUTH_DMASK:
+ retval = armv8_get_pauth_mask(armv8, &value_64);
+ break;
default:
retval = ERROR_FAIL;
break;
@@ -772,152 +936,6 @@ static __attribute__((unused)) void armv8_show_fault_registers(struct target *ta
armv8_show_fault_registers32(armv8);
}
-static uint8_t armv8_pa_size(uint32_t ps)
-{
- uint8_t ret = 0;
- switch (ps) {
- case 0:
- ret = 32;
- break;
- case 1:
- ret = 36;
- break;
- case 2:
- ret = 40;
- break;
- case 3:
- ret = 42;
- break;
- case 4:
- ret = 44;
- break;
- case 5:
- ret = 48;
- break;
- default:
- LOG_INFO("Unknown physical address size");
- break;
- }
- return ret;
-}
-
-static __attribute__((unused)) int armv8_read_ttbcr32(struct target *target)
-{
- struct armv8_common *armv8 = target_to_armv8(target);
- struct arm_dpm *dpm = armv8->arm.dpm;
- uint32_t ttbcr, ttbcr_n;
- int retval = dpm->prepare(dpm);
- if (retval != ERROR_OK)
- goto done;
- /* MRC p15,0,<Rt>,c2,c0,2 ; Read CP15 Translation Table Base Control Register*/
- retval = dpm->instr_read_data_r0(dpm,
- ARMV4_5_MRC(15, 0, 0, 2, 0, 2),
- &ttbcr);
- if (retval != ERROR_OK)
- goto done;
-
- LOG_DEBUG("ttbcr %" PRIx32, ttbcr);
-
- ttbcr_n = ttbcr & 0x7;
- armv8->armv8_mmu.ttbcr = ttbcr;
-
- /*
- * ARM Architecture Reference Manual (ARMv7-A and ARMv7-R edition),
- * document # ARM DDI 0406C
- */
- armv8->armv8_mmu.ttbr_range[0] = 0xffffffff >> ttbcr_n;
- armv8->armv8_mmu.ttbr_range[1] = 0xffffffff;
- armv8->armv8_mmu.ttbr_mask[0] = 0xffffffff << (14 - ttbcr_n);
- armv8->armv8_mmu.ttbr_mask[1] = 0xffffffff << 14;
-
- LOG_DEBUG("ttbr1 %s, ttbr0_mask %" PRIx32 " ttbr1_mask %" PRIx32,
- (ttbcr_n != 0) ? "used" : "not used",
- armv8->armv8_mmu.ttbr_mask[0],
- armv8->armv8_mmu.ttbr_mask[1]);
-
-done:
- dpm->finish(dpm);
- return retval;
-}
-
-static __attribute__((unused)) int armv8_read_ttbcr(struct target *target)
-{
- struct armv8_common *armv8 = target_to_armv8(target);
- struct arm_dpm *dpm = armv8->arm.dpm;
- struct arm *arm = &armv8->arm;
- uint32_t ttbcr;
- uint64_t ttbcr_64;
-
- int retval = dpm->prepare(dpm);
- if (retval != ERROR_OK)
- goto done;
-
- /* clear ttrr1_used and ttbr0_mask */
- memset(&armv8->armv8_mmu.ttbr1_used, 0, sizeof(armv8->armv8_mmu.ttbr1_used));
- memset(&armv8->armv8_mmu.ttbr0_mask, 0, sizeof(armv8->armv8_mmu.ttbr0_mask));
-
- switch (armv8_curel_from_core_mode(arm->core_mode)) {
- case SYSTEM_CUREL_EL3:
- retval = dpm->instr_read_data_r0(dpm,
- ARMV8_MRS(SYSTEM_TCR_EL3, 0),
- &ttbcr);
- retval += dpm->instr_read_data_r0_64(dpm,
- ARMV8_MRS(SYSTEM_TTBR0_EL3, 0),
- &armv8->ttbr_base);
- if (retval != ERROR_OK)
- goto done;
- armv8->va_size = 64 - (ttbcr & 0x3F);
- armv8->pa_size = armv8_pa_size((ttbcr >> 16) & 7);
- armv8->page_size = (ttbcr >> 14) & 3;
- break;
- case SYSTEM_CUREL_EL2:
- retval = dpm->instr_read_data_r0(dpm,
- ARMV8_MRS(SYSTEM_TCR_EL2, 0),
- &ttbcr);
- retval += dpm->instr_read_data_r0_64(dpm,
- ARMV8_MRS(SYSTEM_TTBR0_EL2, 0),
- &armv8->ttbr_base);
- if (retval != ERROR_OK)
- goto done;
- armv8->va_size = 64 - (ttbcr & 0x3F);
- armv8->pa_size = armv8_pa_size((ttbcr >> 16) & 7);
- armv8->page_size = (ttbcr >> 14) & 3;
- break;
- case SYSTEM_CUREL_EL0:
- armv8_dpm_modeswitch(dpm, ARMV8_64_EL1H);
- /* fall through */
- case SYSTEM_CUREL_EL1:
- retval = dpm->instr_read_data_r0_64(dpm,
- ARMV8_MRS(SYSTEM_TCR_EL1, 0),
- &ttbcr_64);
- armv8->va_size = 64 - (ttbcr_64 & 0x3F);
- armv8->pa_size = armv8_pa_size((ttbcr_64 >> 32) & 7);
- armv8->page_size = (ttbcr_64 >> 14) & 3;
- armv8->armv8_mmu.ttbr1_used = (((ttbcr_64 >> 16) & 0x3F) != 0) ? 1 : 0;
- armv8->armv8_mmu.ttbr0_mask = 0x0000FFFFFFFFFFFF;
- retval += dpm->instr_read_data_r0_64(dpm,
- ARMV8_MRS(SYSTEM_TTBR0_EL1 | (armv8->armv8_mmu.ttbr1_used), 0),
- &armv8->ttbr_base);
- if (retval != ERROR_OK)
- goto done;
- break;
- default:
- LOG_ERROR("unknown core state");
- retval = ERROR_FAIL;
- break;
- }
- if (retval != ERROR_OK)
- goto done;
-
- if (armv8->armv8_mmu.ttbr1_used == 1)
- LOG_INFO("TTBR0 access above %" PRIx64, (uint64_t)(armv8->armv8_mmu.ttbr0_mask));
-
-done:
- armv8_dpm_modeswitch(dpm, ARM_MODE_ANY);
- dpm->finish(dpm);
- return retval;
-}
-
/* method adapted to cortex A : reused arm v4 v5 method*/
int armv8_mmu_translate_va(struct target *target, target_addr_t va, target_addr_t *val)
{
@@ -1083,6 +1101,15 @@ COMMAND_HANDLER(armv8_handle_exception_catch_command)
return ERROR_OK;
}
+COMMAND_HANDLER(armv8_pauth_command)
+{
+ struct target *target = get_current_target(CMD_CTX);
+ struct armv8_common *armv8 = target_to_armv8(target);
+ return CALL_COMMAND_HANDLER(handle_command_parse_bool,
+ &armv8->enable_pauth,
+ "pauth feature");
+}
+
int armv8_handle_cache_info_command(struct command_invocation *cmd,
struct armv8_cache_common *armv8_cache)
{
@@ -1421,6 +1448,8 @@ static const struct {
NULL},
{ ARMV8_SPSR_EL3, "SPSR_EL3", 32, ARMV8_64_EL3H, REG_TYPE_UINT32, "banked", "net.sourceforge.openocd.banked",
NULL},
+ { ARMV8_PAUTH_DMASK, "pauth_dmask", 64, ARM_MODE_ANY, REG_TYPE_UINT64, NULL, "org.gnu.gdb.aarch64.pauth", NULL},
+ { ARMV8_PAUTH_CMASK, "pauth_cmask", 64, ARM_MODE_ANY, REG_TYPE_UINT64, NULL, "org.gnu.gdb.aarch64.pauth", NULL},
};
static const struct {
@@ -1650,6 +1679,9 @@ struct reg_cache *armv8_build_reg_cache(struct target *target)
*reg_list[i].reg_data_type = *armv8_regs[i].data_type;
} else
LOG_ERROR("unable to allocate reg type list");
+
+ if (i == ARMV8_PAUTH_CMASK || i == ARMV8_PAUTH_DMASK)
+ reg_list[i].hidden = !armv8->enable_pauth;
}
arm->cpsr = reg_list + ARMV8_XPSR;
@@ -1745,6 +1777,17 @@ const struct command_registration armv8_command_handlers[] = {
.help = "configure exception catch",
.usage = "[(nsec_el1,nsec_el2,sec_el1,sec_el3)+,off]",
},
+ {
+ .name = "pauth",
+ .handler = armv8_pauth_command,
+ .mode = COMMAND_CONFIG,
+ .help = "enable or disable providing GDB with an 8-bytes mask to "
+ "remove signature bits added by pointer authentication."
+ "Pointer authentication feature is broken until gdb 12.1, going to be fixed. "
+ "Consider using a newer version of gdb if you want enable "
+ "pauth feature.",
+ .usage = "[on|off]",
+ },
COMMAND_REGISTRATION_DONE
};
diff --git a/src/target/armv8.h b/src/target/armv8.h
index 2ed3a65ac..54aa08634 100644
--- a/src/target/armv8.h
+++ b/src/target/armv8.h
@@ -98,6 +98,10 @@ enum {
ARMV8_ESR_EL3 = 75,
ARMV8_SPSR_EL3 = 76,
+ /* Pseudo registers defined by GDB to remove the pauth signature. */
+ ARMV8_PAUTH_DMASK = 77,
+ ARMV8_PAUTH_CMASK = 78,
+
ARMV8_LAST_REG,
};
@@ -205,6 +209,9 @@ struct armv8_common {
struct arm_cti *cti;
+ /* True if OpenOCD provides pointer auth related info to GDB */
+ bool enable_pauth;
+
/* last run-control command issued to this target (resume, halt, step) */
enum run_control_op last_run_control_op;
-----------------------------------------------------------------------
Summary of changes:
doc/openocd.texi | 10 ++
src/target/armv8.c | 335 ++++++++++++++++++++++++++++++-----------------------
src/target/armv8.h | 7 ++
3 files changed, 206 insertions(+), 146 deletions(-)
hooks/post-receive
--
Main OpenOCD repository
|
|
From: openocd-gerrit <ope...@us...> - 2023-01-15 14:51:51
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".
The branch, master has been updated
via d96dc47ef67e427cd64a07d9825fd297e3a81633 (commit)
from 9a7781ff8c9dea6ef5998238b1932094b8a226da (commit)
Those revisions listed above that are new to this repository have
not appeared on any other notification email; so we list those
revisions in full, below.
- Log -----------------------------------------------------------------
commit d96dc47ef67e427cd64a07d9825fd297e3a81633
Author: James G. Smith <js...@ra...>
Date: Wed May 26 10:08:26 2021 +0100
src/rtos/eCos : Support per-build configuration specific structure layouts
Extended feature. This is a large patch, but is self-contained to the
eCos support and does not affect any other openocd functionality. It
does NOT affect existing eCos RTOS plugin users where their
applications do not provide the extended symbolic helper
information. If the helper symbols are not available the rtos support
code will behave as before. This "dynamic" functionality is *required*
because eCos does NOT have a fixed/hardwired, known, layout for the
thread descriptor structure. The per-application build eCos
configuration can affect the shape of the thread descriptor structure
(field presence, and hence offsets of subsequent fields) such that
constant values cannot be used to consistently interpret all possible
eCos application configurations. For historical reasons, there is not
yet a consistent namespace for the helper symbols across eCos HALs
hence the support is currently limited to specific architectures
(Cortex-M and ARM/Cortex-A). No new Clang analyser warnings are raised
by this changeset.
Change-Id: Ib3a36877326eeb56595cbca55e21b9e59a59c98a
Signed-off-by: James G. Smith <js...@ra...>
Reviewed-on: https://review.openocd.org/c/openocd/+/6275
Reviewed-by: Alex Schuilenburg <ale...@gm...>
Reviewed-by: Antonio Borneo <bor...@gm...>
Tested-by: jenkins
diff --git a/src/rtos/eCos.c b/src/rtos/eCos.c
index 3f813ac38..963bb61cf 100644
--- a/src/rtos/eCos.c
+++ b/src/rtos/eCos.c
@@ -11,66 +11,446 @@
#include <jtag/jtag.h>
#include "target/target.h"
#include "target/target_type.h"
+#include "target/armv7m.h"
#include "rtos.h"
#include "helper/log.h"
#include "helper/types.h"
+#include "helper/bits.h"
+#include "rtos_standard_stackings.h"
#include "rtos_ecos_stackings.h"
+#include "server/gdb_server.h"
+
+/* Unfortunately for the moment we are limited to returning the hardwired
+ * register count (ARMV7M_NUM_CORE_REGS for Cortex-M) since the openocd RTOS
+ * support does not yet support accessing all per-thread "stacked"
+ * registers. e.g. For Cortex-M under eCos we have a per-thread BASEPRI, and for
+ * all eCos targets we may have per-thread VFP/FPU register state.
+ *
+ * So, for the moment, we continue to use the hardwired limit for the depth of
+ * the returned register description vector. The current openocd
+ * rtos_standard_stackings.c just provides the main core regs for the Cortex_M*
+ * targets regardless of whether FPU is present/enabled.
+ *
+ * However, this code is written with the expectation that we may eventually be
+ * able to provide more register information ("m-system" and "vfp" for example)
+ * and also with the expectation of supporting different register sets being
+ * returned depending on the per-thread Cortex-M eCos contex_m for
+ * example. Hence the fact that the eCos_stack_layout_*() functions below allow
+ * for the stack context descriptor vector to be returned by those calls
+ * allowing for eventual support where this code will potentially cache
+ * different sets of register descriptors for the different shapes of contexts
+ * in a *single* application/binary run-time.
+ *
+ * TODO: Extend openocd generic RTOS support to allow thread-specific system and
+ * FPU register state to be returned. */
+
+struct ecos_params;
static bool ecos_detect_rtos(struct target *target);
static int ecos_create(struct target *target);
static int ecos_update_threads(struct rtos *rtos);
static int ecos_get_thread_reg_list(struct rtos *rtos, int64_t thread_id, struct rtos_reg **reg_list, int *num_regs);
static int ecos_get_symbol_list_to_lookup(struct symbol_table_elem *symbol_list[]);
+static int ecos_stack_layout_cortexm(struct rtos *rtos, struct ecos_params *param,
+ int64_t stack_ptr, const struct rtos_register_stacking **si);
+static int ecos_stack_layout_arm(struct rtos *rtos, struct ecos_params *param,
+ int64_t stack_ptr, const struct rtos_register_stacking **si);
+
+/* The current eCos thread IDentifier uses 0 as an unused (not a valid thread
+ * ID) value. Currently the unique_id field is 16-bits, but the eCos SMP support
+ * convention is that only 12-bits of the ID will be used. This
+ * ECOS_MAX_THREAD_COUNT manifest is provided to limit the potential for
+ * interpreting stale/inconsistent thread list state when the debug host scans
+ * the thread list before the target RTOS has completed its initialisation. This
+ * support will need to revisited when eCos is re-engineered to support more
+ * than 16 CPU SMP setups. */
+#define ECOS_MAX_THREAD_COUNT (4095)
struct ecos_thread_state {
int value;
const char *desc;
};
-static const struct ecos_thread_state ecos_thread_states[] = {
- { 0, "Ready" },
- { 1, "Sleeping" },
- { 2, "Countsleep" },
- { 4, "Suspended" },
- { 8, "Creating" },
- { 16, "Exited" }
+/* The status is actually a logical-OR bitmask of states: */
+enum ecos_thread_state_flags {
+ RUNNING = 0, /* explicit no-bits-set value */
+ SLEEPING = BIT(0),
+ COUNTSLEEP = BIT(1),
+ SUSPENDED = BIT(2),
+ CREATING = BIT(3),
+ EXITED = BIT(4),
+ SLEEPSET = (SLEEPING | COUNTSLEEP)
+};
+
+/* Cyg_Thread:: reason codes for wake and sleep fields: */
+static const struct ecos_thread_state ecos_thread_reasons[] = {
+ { 0, "NONE" }, /* normally indicates "not yet started" */
+ { 1, "WAIT" }, /* wait with no timeout */
+ { 2, "DELAY" }, /* simple time delay */
+ { 3, "TIMEOUT" }, /* wait with timeout *or* timeout expired */
+ { 4, "BREAK" }, /* forced break out of sleep */
+ { 5, "DESTRUCT" }, /* wait on object being destroyed */
+ { 6, "EXIT" }, /* forced termination */
+ { 7, "DONE" } /* wait/delay completed */
+};
+
+static const char * const target_cortex_m[] = {
+ "cortex_m",
+ "hla_target",
+ NULL
+};
+
+static const char * const target_arm[] = {
+ "cortex_a",
+ "arm7tdmi",
+ "arm720t",
+ "arm9tdmi",
+ "arm920t",
+ "arm926ejs",
+ "arm946e",
+ "arm966e",
+ "arm11",
+ NULL
};
-#define ECOS_NUM_STATES ARRAY_SIZE(ecos_thread_states)
+/* Since individual eCos application configurations may have different thread
+ * object structure layouts depending on the actual build-time enabled features
+ * we provide support for applications built containing the relevant symbolic
+ * support to match the actual application binary being debugged, rather than
+ * relying on a set of default/fixed (and potentially incorrect)
+ * offsets. However, for backwards compatibility, we do *NOT* enforce the
+ * requirement for the common extra helper symbols to be present to allow the
+ * fallback to the simple fixed CM3 model to avoid affecting existing users of
+ * older eCos worlds. Similarly we need to provide support for per-thread
+ * register context offsets, as well as for per-application-configurations,
+ * since some targets can have different stacked state on a per-thread basis
+ * (e.g. "cortex_m"). This is why the stacking_info is now set at run-time
+ * rather than being fixed. */
struct ecos_params {
- const char *target_name;
+ const char * const *target_names; /* NULL terminated list of targets */
+ int (*target_stack_layout)(struct rtos *rtos, struct ecos_params *param,
+ int64_t stack_ptr, const struct rtos_register_stacking **si);
+ bool flush_common;
unsigned char pointer_width;
- unsigned char thread_stack_offset;
- unsigned char thread_name_offset;
- unsigned char thread_state_offset;
- unsigned char thread_next_offset;
- unsigned char thread_uniqueid_offset;
+ unsigned char uid_width;
+ unsigned char state_width;
+ unsigned int thread_stack_offset;
+ unsigned int thread_name_offset;
+ unsigned int thread_state_offset;
+ unsigned int thread_next_offset;
+ unsigned int thread_uniqueid_offset;
const struct rtos_register_stacking *stacking_info;
};
-static const struct ecos_params ecos_params_list[] = {
+/* As mentioned above we provide default offset values for the "cortex_m"
+ * targets for backwards compatibility with older eCos application builds and
+ * previous users of this RTOS specific support that do not have the
+ * configuration specific offsets provided in the symbol table. The support for
+ * other targets (e.g. "cortex_a") we do expect the application to provide the
+ * required symbolic information. We do not populate the stacking_info reference
+ * until we have had a chance to interrogate the symbol table. */
+
+static struct ecos_params ecos_params_list[] = {
+ {
+ .target_names = target_cortex_m,
+ .pointer_width = 4,
+ .uid_width = 2,
+ .state_width = 4,
+ .thread_stack_offset = 0x0c,
+ .thread_name_offset = 0x9c,
+ .thread_state_offset = 0x3c,
+ .thread_next_offset = 0xa0,
+ .thread_uniqueid_offset = 0x4c,
+ .target_stack_layout = ecos_stack_layout_cortexm,
+ .stacking_info = NULL
+ },
{
- "cortex_m", /* target_name */
- 4, /* pointer_width; */
- 0x0c, /* thread_stack_offset; */
- 0x9c, /* thread_name_offset; */
- 0x3c, /* thread_state_offset; */
- 0xa0, /* thread_next_offset */
- 0x4c, /* thread_uniqueid_offset */
- &rtos_ecos_cortex_m3_stacking /* stacking_info */
+ .target_names = target_arm,
+ .pointer_width = 0,
+ .uid_width = 0,
+ .state_width = 0,
+ .thread_stack_offset = 0,
+ .thread_name_offset = 0,
+ .thread_state_offset = 0,
+ .thread_next_offset = 0,
+ .thread_uniqueid_offset = 0,
+ .target_stack_layout = ecos_stack_layout_arm,
+ .stacking_info = NULL
}
};
+#define ECOS_NUM_PARAMS ARRAY_SIZE(ecos_params_list)
+
+/* To eventually allow for more than just the ARMV7M_NUM_CORE_REGS to be
+ * returned by the Cortex-M support, and to avoid run-time lookups we manually
+ * maintain our own mapping for the supplied stack register vector entries. This
+ * enum needs to match the rtos_ecos_regoff_cortexm[] vector. Admittedly the
+ * initial indices just match the corresponding ARMV7M_R* definitions, but after
+ * the base registers the ARMV7M_* number space does not match the vector we
+ * wish to populate in this eCos support code. */
+enum ecos_reglist_cortexm {
+ ECOS_REGLIST_R0 = 0,
+ ECOS_REGLIST_R1,
+ ECOS_REGLIST_R2,
+ ECOS_REGLIST_R3,
+ ECOS_REGLIST_R4,
+ ECOS_REGLIST_R5,
+ ECOS_REGLIST_R6,
+ ECOS_REGLIST_R7,
+ ECOS_REGLIST_R8,
+ ECOS_REGLIST_R9,
+ ECOS_REGLIST_R10,
+ ECOS_REGLIST_R11,
+ ECOS_REGLIST_R12,
+ ECOS_REGLIST_R13,
+ ECOS_REGLIST_R14,
+ ECOS_REGLIST_PC,
+ ECOS_REGLIST_XPSR, /* ARMV7M_NUM_CORE_REGS */
+ ECOS_REGLIST_BASEPRI,
+ ECOS_REGLIST_FPSCR, /* Following for FPU contexts */
+ ECOS_REGLIST_D0,
+ ECOS_REGLIST_D1,
+ ECOS_REGLIST_D2,
+ ECOS_REGLIST_D3,
+ ECOS_REGLIST_D4,
+ ECOS_REGLIST_D5,
+ ECOS_REGLIST_D6,
+ ECOS_REGLIST_D7,
+ ECOS_REGLIST_D8,
+ ECOS_REGLIST_D9,
+ ECOS_REGLIST_D10,
+ ECOS_REGLIST_D11,
+ ECOS_REGLIST_D12,
+ ECOS_REGLIST_D13,
+ ECOS_REGLIST_D14,
+ ECOS_REGLIST_D15
+};
+
+#define ECOS_CORTEXM_BASE_NUMREGS (ARMV7M_NUM_CORE_REGS)
+
+/* NOTE: The offsets in this vector are overwritten by the architecture specific
+ * layout functions depending on the specific application configuration. The
+ * ordering of this vector MUST match eCos_reglist. */
+static struct stack_register_offset rtos_ecos_regoff_cortexm[] = {
+ { ARMV7M_R0, -1, 32 }, /* r0 */
+ { ARMV7M_R1, -1, 32 }, /* r1 */
+ { ARMV7M_R2, -1, 32 }, /* r2 */
+ { ARMV7M_R3, -1, 32 }, /* r3 */
+ { ARMV7M_R4, -1, 32 }, /* r4 */
+ { ARMV7M_R5, -1, 32 }, /* r5 */
+ { ARMV7M_R6, -1, 32 }, /* r6 */
+ { ARMV7M_R7, -1, 32 }, /* r7 */
+ { ARMV7M_R8, -1, 32 }, /* r8 */
+ { ARMV7M_R9, -1, 32 }, /* r9 */
+ { ARMV7M_R10, -1, 32 }, /* r10 */
+ { ARMV7M_R11, -1, 32 }, /* r11 */
+ { ARMV7M_R12, -1, 32 }, /* r12 */
+ { ARMV7M_R13, -1, 32 }, /* sp */
+ { ARMV7M_R14, -1, 32 }, /* lr */
+ { ARMV7M_PC, -1, 32 }, /* pc */
+ { ARMV7M_XPSR, -1, 32 }, /* xPSR */
+ { ARMV7M_BASEPRI, -1, 32 }, /* BASEPRI */
+ { ARMV7M_FPSCR, -1, 32 }, /* FPSCR */
+ { ARMV7M_D0, -1, 64 }, /* D0 (S0/S1) */
+ { ARMV7M_D1, -1, 64 }, /* D1 (S2/S3) */
+ { ARMV7M_D2, -1, 64 }, /* D2 (S4/S5) */
+ { ARMV7M_D3, -1, 64 }, /* D3 (S6/S7) */
+ { ARMV7M_D4, -1, 64 }, /* D4 (S8/S9) */
+ { ARMV7M_D5, -1, 64 }, /* D5 (S10/S11) */
+ { ARMV7M_D6, -1, 64 }, /* D6 (S12/S13) */
+ { ARMV7M_D7, -1, 64 }, /* D7 (S14/S15) */
+ { ARMV7M_D8, -1, 64 }, /* D8 (S16/S17) */
+ { ARMV7M_D9, -1, 64 }, /* D9 (S18/S19) */
+ { ARMV7M_D10, -1, 64 }, /* D10 (S20/S21) */
+ { ARMV7M_D11, -1, 64 }, /* D11 (S22/S23) */
+ { ARMV7M_D12, -1, 64 }, /* D12 (S24/S25) */
+ { ARMV7M_D13, -1, 64 }, /* D13 (S26/S27) */
+ { ARMV7M_D14, -1, 64 }, /* D14 (S28/S29) */
+ { ARMV7M_D15, -1, 64 }, /* D15 (S30/S31) */
+};
+
+static struct stack_register_offset rtos_ecos_regoff_arm[] = {
+ { 0, -1, 32 }, /* r0 */
+ { 1, -1, 32 }, /* r1 */
+ { 2, -1, 32 }, /* r2 */
+ { 3, -1, 32 }, /* r3 */
+ { 4, -1, 32 }, /* r4 */
+ { 5, -1, 32 }, /* r5 */
+ { 6, -1, 32 }, /* r6 */
+ { 7, -1, 32 }, /* r7 */
+ { 8, -1, 32 }, /* r8 */
+ { 9, -1, 32 }, /* r9 */
+ { 10, -1, 32 }, /* r10 */
+ { 11, -1, 32 }, /* r11 (fp) */
+ { 12, -1, 32 }, /* r12 (ip) */
+ { 13, -1, 32 }, /* sp (r13) */
+ { 14, -1, 32 }, /* lr (r14) */
+ { 15, -1, 32 }, /* pc (r15) */
+ { 16, -1, 32 }, /* xPSR */
+};
+
+static struct rtos_register_stacking rtos_ecos_stacking = {
+ .stack_registers_size = 0,
+ .stack_growth_direction = -1,
+ .num_output_registers = 0,
+ .calculate_process_stack = NULL, /* stack_alignment */
+ .register_offsets = NULL
+};
+
+/* To avoid the run-time cost of matching explicit symbol names we push the
+ * lookup offsets to this *manually* maintained enumeration which must match the
+ * ecos_symbol_list[] order below. */
enum ecos_symbol_values {
ECOS_VAL_THREAD_LIST = 0,
- ECOS_VAL_CURRENT_THREAD_PTR = 1
+ ECOS_VAL_CURRENT_THREAD_PTR,
+ ECOS_VAL_COMMON_THREAD_NEXT_OFF,
+ ECOS_VAL_COMMON_THREAD_NEXT_SIZE,
+ ECOS_VAL_COMMON_THREAD_STATE_OFF,
+ ECOS_VAL_COMMON_THREAD_STATE_SIZE,
+ ECOS_VAL_COMMON_THREAD_SLEEP_OFF,
+ ECOS_VAL_COMMON_THREAD_SLEEP_SIZE,
+ ECOS_VAL_COMMON_THREAD_WAKE_OFF,
+ ECOS_VAL_COMMON_THREAD_WAKE_SIZE,
+ ECOS_VAL_COMMON_THREAD_ID_OFF,
+ ECOS_VAL_COMMON_THREAD_ID_SIZE,
+ ECOS_VAL_COMMON_THREAD_NAME_OFF,
+ ECOS_VAL_COMMON_THREAD_NAME_SIZE,
+ ECOS_VAL_COMMON_THREAD_PRI_OFF,
+ ECOS_VAL_COMMON_THREAD_PRI_SIZE,
+ ECOS_VAL_COMMON_THREAD_STACK_OFF,
+ ECOS_VAL_COMMON_THREAD_STACK_SIZE,
+ ECOS_VAL_CORTEXM_THREAD_SAVED,
+ ECOS_VAL_CORTEXM_CTX_THREAD_SIZE,
+ ECOS_VAL_CORTEXM_CTX_TYPE_OFF,
+ ECOS_VAL_CORTEXM_CTX_TYPE_SIZE,
+ ECOS_VAL_CORTEXM_CTX_BASEPRI_OFF,
+ ECOS_VAL_CORTEXM_CTX_BASEPRI_SIZE,
+ ECOS_VAL_CORTEXM_CTX_SP_OFF,
+ ECOS_VAL_CORTEXM_CTX_SP_SIZE,
+ ECOS_VAL_CORTEXM_CTX_REG_OFF,
+ ECOS_VAL_CORTEXM_CTX_REG_SIZE,
+ ECOS_VAL_CORTEXM_CTX_PC_OFF,
+ ECOS_VAL_CORTEXM_CTX_PC_SIZE,
+ ECOS_VAL_CORTEXM_VAL_EXCEPTION,
+ ECOS_VAL_CORTEXM_VAL_THREAD,
+ ECOS_VAL_CORTEXM_VAL_INTERRUPT,
+ ECOS_VAL_CORTEXM_VAL_FPU,
+ ECOS_VAL_CORTEXM_CTX_FPSCR_OFF,
+ ECOS_VAL_CORTEXM_CTX_FPSCR_SIZE,
+ ECOS_VAL_CORTEXM_CTX_S_OFF,
+ ECOS_VAL_CORTEXM_CTX_S_SIZE,
+ ECOS_VAL_ARM_REGSIZE,
+ ECOS_VAL_ARM_CTX_R0_OFF,
+ ECOS_VAL_ARM_CTX_R1_OFF,
+ ECOS_VAL_ARM_CTX_R2_OFF,
+ ECOS_VAL_ARM_CTX_R3_OFF,
+ ECOS_VAL_ARM_CTX_R4_OFF,
+ ECOS_VAL_ARM_CTX_R5_OFF,
+ ECOS_VAL_ARM_CTX_R6_OFF,
+ ECOS_VAL_ARM_CTX_R7_OFF,
+ ECOS_VAL_ARM_CTX_R8_OFF,
+ ECOS_VAL_ARM_CTX_R9_OFF,
+ ECOS_VAL_ARM_CTX_R10_OFF,
+ ECOS_VAL_ARM_CTX_FP_OFF,
+ ECOS_VAL_ARM_CTX_IP_OFF,
+ ECOS_VAL_ARM_CTX_SP_OFF,
+ ECOS_VAL_ARM_CTX_LR_OFF,
+ ECOS_VAL_ARM_CTX_PC_OFF,
+ ECOS_VAL_ARM_CTX_CPSR_OFF,
+ ECOS_VAL_ARM_FPUSIZE,
+ ECOS_VAL_ARM_CTX_FPSCR_OFF,
+ ECOS_VAL_ARM_SCOUNT,
+ ECOS_VAL_ARM_CTX_SVEC_OFF,
+ ECOS_VAL_ARM_VFPCOUNT,
+ ECOS_VAL_ARM_CTX_VFPVEC_OFF
};
-static const char * const ecos_symbol_list[] = {
- "Cyg_Thread::thread_list",
- "Cyg_Scheduler_Base::current_thread",
- NULL
+struct symbols {
+ const char *name;
+ const char * const *target_names; /* non-NULL when for a specific architecture */
+ bool optional;
+};
+
+#define ECOSSYM(_n, _o, _t) { .name = _n, .optional = (_o), .target_names = _t }
+
+/* Some of offset/size helper symbols are common to all eCos
+ * targets. Unfortunately, for historical reasons, some information is in
+ * architecture specific namespaces leading to some duplication and a larger
+ * vector below. */
+static const struct symbols ecos_symbol_list[] = {
+ ECOSSYM("Cyg_Thread::thread_list", false, NULL),
+ ECOSSYM("Cyg_Scheduler_Base::current_thread", false, NULL),
+ /* Following symbols *are* required for generic application-specific
+ * configuration support, but we mark as optional for backwards
+ * compatibility with the previous fixed Cortex-M3 only RTOS plugin
+ * implementation. */
+ ECOSSYM("__ecospro_syminfo.off.cyg_thread.list_next", true, NULL),
+ ECOSSYM("__ecospro_syminfo.size.cyg_thread.list_next", true, NULL),
+ ECOSSYM("__ecospro_syminfo.off.cyg_thread.state", true, NULL),
+ ECOSSYM("__ecospro_syminfo.size.cyg_thread.state", true, NULL),
+ ECOSSYM("__ecospro_syminfo.off.cyg_thread.sleep_reason", true, NULL),
+ ECOSSYM("__ecospro_syminfo.size.cyg_thread.sleep_reason", true, NULL),
+ ECOSSYM("__ecospro_syminfo.off.cyg_thread.wake_reason", true, NULL),
+ ECOSSYM("__ecospro_syminfo.size.cyg_thread.wake_reason", true, NULL),
+ ECOSSYM("__ecospro_syminfo.off.cyg_thread.unique_id", true, NULL),
+ ECOSSYM("__ecospro_syminfo.size.cyg_thread.unique_id", true, NULL),
+ ECOSSYM("__ecospro_syminfo.off.cyg_thread.name", true, NULL),
+ ECOSSYM("__ecospro_syminfo.size.cyg_thread.name", true, NULL),
+ ECOSSYM("__ecospro_syminfo.off.cyg_thread.priority", true, NULL),
+ ECOSSYM("__ecospro_syminfo.size.cyg_thread.priority", true, NULL),
+ ECOSSYM("__ecospro_syminfo.off.cyg_thread.stack_ptr", true, NULL),
+ ECOSSYM("__ecospro_syminfo.size.cyg_thread.stack_ptr", true, NULL),
+ /* optional Cortex-M: */
+ ECOSSYM("__ecospro_syminfo.cortexm.thread.saved", true, target_cortex_m),
+ ECOSSYM("__ecospro_syminfo.size.HAL_SavedRegisters.Thread", true, target_cortex_m),
+ ECOSSYM("__ecospro_syminfo.off.HAL_SavedRegisters.u.thread.type", true, target_cortex_m),
+ ECOSSYM("__ecospro_syminfo.size.HAL_SavedRegisters.u.thread.type", true, target_cortex_m),
+ ECOSSYM("__ecospro_syminfo.off.HAL_SavedRegisters.u.thread.basepri", true, target_cortex_m),
+ ECOSSYM("__ecospro_syminfo.size.HAL_SavedRegisters.u.thread.basepri", true, target_cortex_m),
+ ECOSSYM("__ecospro_syminfo.off.HAL_SavedRegisters.u.thread.sp", true, target_cortex_m),
+ ECOSSYM("__ecospro_syminfo.size.HAL_SavedRegisters.u.thread.sp", true, target_cortex_m),
+ ECOSSYM("__ecospro_syminfo.off.HAL_SavedRegisters.u.thread.r", true, target_cortex_m),
+ ECOSSYM("__ecospro_syminfo.size.HAL_SavedRegisters.u.thread.r", true, target_cortex_m),
+ ECOSSYM("__ecospro_syminfo.off.HAL_SavedRegisters.u.thread.pc", true, target_cortex_m),
+ ECOSSYM("__ecospro_syminfo.size.HAL_SavedRegisters.u.thread.pc", true, target_cortex_m),
+ ECOSSYM("__ecospro_syminfo.value.HAL_SAVEDREGISTERS.EXCEPTION", true, target_cortex_m),
+ ECOSSYM("__ecospro_syminfo.value.HAL_SAVEDREGISTERS.THREAD", true, target_cortex_m),
+ ECOSSYM("__ecospro_syminfo.value.HAL_SAVEDREGISTERS.INTERRUPT", true, target_cortex_m),
+ /* optional Cortex-M with H/W FPU configured: */
+ ECOSSYM("__ecospro_syminfo.value.HAL_SAVEDREGISTERS.WITH_FPU", true, target_cortex_m),
+ ECOSSYM("__ecospro_syminfo.off.HAL_SavedRegisters.u.thread.fpscr", true, target_cortex_m),
+ ECOSSYM("__ecospro_syminfo.size.HAL_SavedRegisters.u.thread.fpscr", true, target_cortex_m),
+ ECOSSYM("__ecospro_syminfo.off.HAL_SavedRegisters.u.thread.s", true, target_cortex_m),
+ ECOSSYM("__ecospro_syminfo.size.HAL_SavedRegisters.u.thread.s", true, target_cortex_m),
+ /* optional ARM: */
+ ECOSSYM("ARMREG_SIZE", true, target_arm),
+ ECOSSYM("armreg_r0", true, target_arm),
+ ECOSSYM("armreg_r1", true, target_arm),
+ ECOSSYM("armreg_r2", true, target_arm),
+ ECOSSYM("armreg_r3", true, target_arm),
+ ECOSSYM("armreg_r4", true, target_arm),
+ ECOSSYM("armreg_r5", true, target_arm),
+ ECOSSYM("armreg_r6", true, target_arm),
+ ECOSSYM("armreg_r7", true, target_arm),
+ ECOSSYM("armreg_r8", true, target_arm),
+ ECOSSYM("armreg_r9", true, target_arm),
+ ECOSSYM("armreg_r10", true, target_arm),
+ ECOSSYM("armreg_fp", true, target_arm),
+ ECOSSYM("armreg_ip", true, target_arm),
+ ECOSSYM("armreg_sp", true, target_arm),
+ ECOSSYM("armreg_lr", true, target_arm),
+ ECOSSYM("armreg_pc", true, target_arm),
+ ECOSSYM("armreg_cpsr", true, target_arm),
+ /* optional ARM FPU common: */
+ ECOSSYM("ARMREG_FPUCONTEXT_SIZE", true, target_arm),
+ ECOSSYM("armreg_fpscr", true, target_arm),
+ /* optional ARM FPU single-precision: */
+ ECOSSYM("ARMREG_S_COUNT", true, target_arm),
+ ECOSSYM("armreg_s_vec", true, target_arm),
+ /* optional ARM FPU double-precision: */
+ ECOSSYM("ARMREG_VFP_COUNT", true, target_arm),
+ ECOSSYM("armreg_vfp_vec", true, target_arm),
};
const struct rtos_type ecos_rtos = {
@@ -84,34 +464,280 @@ const struct rtos_type ecos_rtos = {
};
+static symbol_address_t ecos_value(struct rtos *rtos, unsigned int idx)
+{
+ if (idx < ARRAY_SIZE(ecos_symbol_list))
+ return rtos->symbols[idx].address;
+
+ /* We do not terminate, just return 0 in this case. */
+ LOG_ERROR("eCos: Invalid symbol index %u", idx);
+ return 0;
+}
+
+#define XMLENTRY(_c, _s) { .xc = (_c), .rs = (_s), .rlen = (sizeof(_s) - 1) }
+
+static const struct {
+ char xc;
+ const char *rs;
+ size_t rlen;
+} xmlchars[] = {
+ XMLENTRY('<', "<"),
+ XMLENTRY('&', "&"),
+ XMLENTRY('>', ">"),
+ XMLENTRY('\'', "'"),
+ XMLENTRY('"', """)
+};
+
+/** Escape any XML reserved characters in a string. */
+static bool ecos_escape_string(const char *raw, char *out, size_t limit)
+{
+ static const char *tokens = "<&>\'\"";
+ bool escaped = false;
+
+ if (!out || !limit)
+ return false;
+
+ (void)memset(out, '\0', limit);
+
+ while (raw && *raw && limit) {
+ size_t lok = strcspn(raw, tokens);
+ if (lok) {
+ size_t tocopy;
+ tocopy = ((limit < lok) ? limit : lok);
+ (void)memcpy(out, raw, tocopy);
+ limit -= tocopy;
+ out += tocopy;
+ raw += lok;
+ continue;
+ }
+
+ char *fidx = strchr(tokens, *raw);
+ if (!fidx) {
+ /* Should never happen assuming xmlchars
+ * vector and tokens string match. */
+ LOG_ERROR("eCos: Unexpected XML char %c", *raw);
+ continue;
+ }
+
+ uint32_t cidx = (fidx - tokens);
+ size_t tocopy = xmlchars[cidx].rlen;
+ if (limit < tocopy)
+ break;
+
+ escaped = true;
+ (void)memcpy(out, xmlchars[cidx].rs, tocopy);
+ limit -= tocopy;
+ out += tocopy;
+ raw++;
+ }
+
+ return escaped;
+}
+
+static int ecos_check_app_info(struct rtos *rtos, struct ecos_params *param)
+{
+ if (!rtos || !param)
+ return -1;
+
+ if (param->flush_common) {
+ if (debug_level >= LOG_LVL_DEBUG) {
+ for (unsigned int idx = 0; idx < ARRAY_SIZE(ecos_symbol_list); idx++) {
+ LOG_DEBUG("eCos: %s 0x%016" PRIX64 " %s",
+ rtos->symbols[idx].optional ? "OPTIONAL" : " ",
+ rtos->symbols[idx].address, rtos->symbols[idx].symbol_name);
+ }
+ }
+
+ /* If "__ecospro_syminfo.size.cyg_thread.list_next" is non-zero then we
+ * expect all of the generic thread structure symbols to have been
+ * provided. */
+ symbol_address_t thread_next_size = ecos_value(rtos, ECOS_VAL_COMMON_THREAD_NEXT_SIZE);
+ if (thread_next_size != 0) {
+ param->pointer_width = thread_next_size;
+ param->uid_width = ecos_value(rtos, ECOS_VAL_COMMON_THREAD_ID_SIZE);
+ param->state_width = ecos_value(rtos, ECOS_VAL_COMMON_THREAD_STATE_SIZE);
+ param->thread_stack_offset = ecos_value(rtos, ECOS_VAL_COMMON_THREAD_STACK_OFF);
+ param->thread_name_offset = ecos_value(rtos, ECOS_VAL_COMMON_THREAD_NAME_OFF);
+ param->thread_state_offset = ecos_value(rtos, ECOS_VAL_COMMON_THREAD_STATE_OFF);
+ param->thread_next_offset = ecos_value(rtos, ECOS_VAL_COMMON_THREAD_NEXT_OFF);
+ param->thread_uniqueid_offset = ecos_value(rtos, ECOS_VAL_COMMON_THREAD_ID_OFF);
+ }
+
+ if (param->uid_width != sizeof(uint16_t)) {
+ /* Currently all eCos configurations use a 16-bit field to hold the
+ * unique thread ID. */
+ LOG_WARNING("eCos: Unexpected unique_id width %" PRIu8, param->uid_width);
+ param->uid_width = (unsigned char)sizeof(uint16_t);
+ }
+
+ param->stacking_info = NULL;
+ param->flush_common = false;
+ }
+
+ return ERROR_OK;
+}
+
+/* The Cortex-M eCosPro "thread" contexts have a "type" indicator, which tracks
+ * the context state of (THREAD | EXCEPTION | INTERRUPT) and whether FPU
+ * registers are saved.
+ *
+ * For thread-aware debugging from GDB we are only interested in THREAD states
+ * and so do not need to implement support for INTERRUPT or EXCEPTION thread
+ * contexts since this code does not expose those stack contexts via the
+ * constructed thread list support. */
+static int ecos_stack_layout_cortexm(struct rtos *rtos,
+ struct ecos_params *param, int64_t stack_ptr,
+ const struct rtos_register_stacking **si)
+{
+ int retval = ERROR_OK;
+
+ /* CONSIDER: We could return
+ * ecos_value(rtos, ECOS_VAL_CORTEXM_THREAD_SAVED) as the actual PC
+ * address of a context switch, with the LR being set to the context PC
+ * field to give a true representation of where the thread switch
+ * occurs. However that would require extending the common
+ * rtos_generic_stack_read() code with suitable support for applying a
+ * supplied value, or just implementing our own version of that code that
+ * can inject data into what is passed onwards to GDB. */
+
+ /* UPDATE: When we can return VFP register state then we will NOT be
+ * basing the cached state on the single param->stacking_info value,
+ * since we will need a different stacking_info structure returned for
+ * each thread type when FPU support is enabled. The use of the single
+ * param->stacking_info is a holder whilst we are limited to the fixed
+ * ARMV7M_NUM_CORE_REGS set of descriptors. */
+
+ if (!param->stacking_info &&
+ ecos_value(rtos, ECOS_VAL_CORTEXM_THREAD_SAVED) &&
+ ecos_value(rtos, ECOS_VAL_CORTEXM_VAL_THREAD)) {
+ unsigned char numoutreg = ECOS_CORTEXM_BASE_NUMREGS;
+
+ rtos_ecos_stacking.stack_registers_size = ecos_value(rtos, ECOS_VAL_CORTEXM_CTX_THREAD_SIZE);
+ rtos_ecos_stacking.calculate_process_stack = rtos_generic_stack_align8;
+ rtos_ecos_stacking.register_offsets = rtos_ecos_regoff_cortexm;
+
+ rtos_ecos_regoff_cortexm[ECOS_REGLIST_R0].offset = (ecos_value(rtos, ECOS_VAL_CORTEXM_CTX_REG_OFF) + 0x00);
+ rtos_ecos_regoff_cortexm[ECOS_REGLIST_R1].offset = (ecos_value(rtos, ECOS_VAL_CORTEXM_CTX_REG_OFF) + 0x04);
+ rtos_ecos_regoff_cortexm[ECOS_REGLIST_R2].offset = (ecos_value(rtos, ECOS_VAL_CORTEXM_CTX_REG_OFF) + 0x08);
+ rtos_ecos_regoff_cortexm[ECOS_REGLIST_R3].offset = (ecos_value(rtos, ECOS_VAL_CORTEXM_CTX_REG_OFF) + 0x0C);
+ rtos_ecos_regoff_cortexm[ECOS_REGLIST_R4].offset = (ecos_value(rtos, ECOS_VAL_CORTEXM_CTX_REG_OFF) + 0x10);
+ rtos_ecos_regoff_cortexm[ECOS_REGLIST_R5].offset = (ecos_value(rtos, ECOS_VAL_CORTEXM_CTX_REG_OFF) + 0x14);
+ rtos_ecos_regoff_cortexm[ECOS_REGLIST_R6].offset = (ecos_value(rtos, ECOS_VAL_CORTEXM_CTX_REG_OFF) + 0x18);
+ rtos_ecos_regoff_cortexm[ECOS_REGLIST_R7].offset = (ecos_value(rtos, ECOS_VAL_CORTEXM_CTX_REG_OFF) + 0x1C);
+ rtos_ecos_regoff_cortexm[ECOS_REGLIST_R8].offset = (ecos_value(rtos, ECOS_VAL_CORTEXM_CTX_REG_OFF) + 0x20);
+ rtos_ecos_regoff_cortexm[ECOS_REGLIST_R9].offset = (ecos_value(rtos, ECOS_VAL_CORTEXM_CTX_REG_OFF) + 0x24);
+ rtos_ecos_regoff_cortexm[ECOS_REGLIST_R10].offset = (ecos_value(rtos, ECOS_VAL_CORTEXM_CTX_REG_OFF) + 0x28);
+ rtos_ecos_regoff_cortexm[ECOS_REGLIST_R11].offset = (ecos_value(rtos, ECOS_VAL_CORTEXM_CTX_REG_OFF) + 0x2C);
+ rtos_ecos_regoff_cortexm[ECOS_REGLIST_R12].offset = (ecos_value(rtos, ECOS_VAL_CORTEXM_CTX_REG_OFF) + 0x30);
+ /* Rather than using the stacked ECOS_VAL_CORTEXM_CTX_SP_OFF
+ * value we force the reported sp to be after the stacked
+ * register context. */
+ rtos_ecos_regoff_cortexm[ECOS_REGLIST_R13].offset = -2;
+ rtos_ecos_regoff_cortexm[ECOS_REGLIST_R14].offset = -1;
+ rtos_ecos_regoff_cortexm[ECOS_REGLIST_PC].offset = ecos_value(rtos, ECOS_VAL_CORTEXM_CTX_PC_OFF);
+ rtos_ecos_regoff_cortexm[ECOS_REGLIST_XPSR].offset = -1;
+
+ param->stacking_info = &rtos_ecos_stacking;
+
+ /* Common Cortex-M thread register offsets for the current
+ * symbol table: */
+ if (retval == ERROR_OK && param->stacking_info) {
+ if (numoutreg > ECOS_REGLIST_BASEPRI) {
+ rtos_ecos_regoff_cortexm[ECOS_REGLIST_BASEPRI].offset =
+ ecos_value(rtos, ECOS_VAL_CORTEXM_CTX_BASEPRI_OFF);
+ }
+
+ rtos_ecos_stacking.num_output_registers = numoutreg;
+ }
+ }
+
+ if (si)
+ *si = param->stacking_info;
+
+ return retval;
+}
+
+static int ecos_stack_layout_arm(struct rtos *rtos, struct ecos_params *param,
+ int64_t stack_ptr, const struct rtos_register_stacking **si)
+{
+ int retval = ERROR_OK;
+
+ if (!param->stacking_info && ecos_value(rtos, ECOS_VAL_ARM_REGSIZE)) {
+ /* When OpenOCD is extended to allow FPU registers to be returned from a
+ * stacked thread context we can check:
+ * if (0 != ecos_value(rtos, ECOS_VAL_ARM_FPUSIZE)) { FPU }
+ * for presence of FPU registers in the context. */
+
+ rtos_ecos_stacking.stack_registers_size = ecos_value(rtos, ECOS_VAL_ARM_REGSIZE);
+ rtos_ecos_stacking.num_output_registers = ARRAY_SIZE(rtos_ecos_regoff_arm);
+ rtos_ecos_stacking.register_offsets = rtos_ecos_regoff_arm;
+
+ rtos_ecos_regoff_arm[0].offset = ecos_value(rtos, ECOS_VAL_ARM_CTX_R0_OFF);
+ rtos_ecos_regoff_arm[1].offset = ecos_value(rtos, ECOS_VAL_ARM_CTX_R1_OFF);
+ rtos_ecos_regoff_arm[2].offset = ecos_value(rtos, ECOS_VAL_ARM_CTX_R2_OFF);
+ rtos_ecos_regoff_arm[3].offset = ecos_value(rtos, ECOS_VAL_ARM_CTX_R3_OFF);
+ rtos_ecos_regoff_arm[4].offset = ecos_value(rtos, ECOS_VAL_ARM_CTX_R4_OFF);
+ rtos_ecos_regoff_arm[5].offset = ecos_value(rtos, ECOS_VAL_ARM_CTX_R5_OFF);
+ rtos_ecos_regoff_arm[6].offset = ecos_value(rtos, ECOS_VAL_ARM_CTX_R6_OFF);
+ rtos_ecos_regoff_arm[7].offset = ecos_value(rtos, ECOS_VAL_ARM_CTX_R7_OFF);
+ rtos_ecos_regoff_arm[8].offset = ecos_value(rtos, ECOS_VAL_ARM_CTX_R8_OFF);
+ rtos_ecos_regoff_arm[9].offset = ecos_value(rtos, ECOS_VAL_ARM_CTX_R9_OFF);
+ rtos_ecos_regoff_arm[10].offset = ecos_value(rtos, ECOS_VAL_ARM_CTX_R10_OFF);
+ rtos_ecos_regoff_arm[11].offset = ecos_value(rtos, ECOS_VAL_ARM_CTX_FP_OFF);
+ rtos_ecos_regoff_arm[12].offset = ecos_value(rtos, ECOS_VAL_ARM_CTX_IP_OFF);
+ rtos_ecos_regoff_arm[13].offset = ecos_value(rtos, ECOS_VAL_ARM_CTX_SP_OFF);
+ rtos_ecos_regoff_arm[14].offset = ecos_value(rtos, ECOS_VAL_ARM_CTX_LR_OFF);
+ rtos_ecos_regoff_arm[15].offset = ecos_value(rtos, ECOS_VAL_ARM_CTX_PC_OFF);
+ rtos_ecos_regoff_arm[16].offset = ecos_value(rtos, ECOS_VAL_ARM_CTX_CPSR_OFF);
+
+ param->stacking_info = &rtos_ecos_stacking;
+ }
+
+ if (si)
+ *si = param->stacking_info;
+
+ return retval;
+}
+
+/* We see this function called on a new connection, it looks like before and
+ * after the "tar rem"/"tar extended-remote". It might be the only point we can
+ * decide to cache information (to check if the symbol table has changed). */
static int ecos_update_threads(struct rtos *rtos)
{
int retval;
int tasks_found = 0;
int thread_list_size = 0;
- const struct ecos_params *param;
+ struct ecos_params *param;
if (!rtos)
return -1;
+ /* wipe out previous thread details if any */
+ rtos_free_threadlist(rtos);
+
if (!rtos->rtos_specific_params)
return -3;
- param = (const struct ecos_params *) rtos->rtos_specific_params;
+ param = rtos->rtos_specific_params;
if (!rtos->symbols) {
+ /* NOTE: We only see this when connecting from GDB the first
+ * time before the application image is loaded. So it is not a
+ * hook for detecting an application change. */
+ param->flush_common = true;
LOG_ERROR("No symbols for eCos");
return -4;
}
+ retval = ecos_check_app_info(rtos, param);
+ if (retval != ERROR_OK)
+ return retval;
+
if (rtos->symbols[ECOS_VAL_THREAD_LIST].address == 0) {
LOG_ERROR("Don't have the thread list head");
return -2;
}
- /* wipe out previous thread details if any */
- rtos_free_threadlist(rtos);
-
/* determine the number of current threads */
uint32_t thread_list_head = rtos->symbols[ECOS_VAL_THREAD_LIST].address;
uint32_t thread_index;
@@ -120,50 +746,82 @@ static int ecos_update_threads(struct rtos *rtos)
param->pointer_width,
(uint8_t *) &thread_index);
uint32_t first_thread = thread_index;
- do {
- thread_list_size++;
- retval = target_read_buffer(rtos->target,
- thread_index + param->thread_next_offset,
- param->pointer_width,
- (uint8_t *) &thread_index);
- if (retval != ERROR_OK)
- return retval;
- } while (thread_index != first_thread);
+
+ /* Even if 0==first_thread indicates a system with no defined eCos
+ * threads, instead of early exiting here we fall through the code to
+ * allow the creation of a faked "Current Execution" descriptor as
+ * needed. */
+
+ if (first_thread) {
+ /* Since the OpenOCD RTOS support can attempt to obtain thread
+ * information on initial connection when the system *may* have
+ * undefined memory state it is possible for a simple thread count scan
+ * to produce invalid results. To avoid blocking indefinitely when
+ * encountering an invalid closed loop we limit the number of threads to
+ * the maximum possible, and if we pass that limit then something is
+ * wrong so treat the system as having no threads defined. */
+ do {
+ thread_list_size++;
+ if (thread_list_size > ECOS_MAX_THREAD_COUNT) {
+ /* Treat as "no threads" case: */
+ first_thread = 0;
+ thread_list_size = 0;
+ break;
+ }
+ retval = target_read_buffer(rtos->target,
+ thread_index + param->thread_next_offset,
+ param->pointer_width,
+ (uint8_t *)&thread_index);
+ if (retval != ERROR_OK)
+ return retval;
+ } while (thread_index != first_thread);
+ }
/* read the current thread id */
+ rtos->current_thread = 0;
+
uint32_t current_thread_addr;
retval = target_read_buffer(rtos->target,
rtos->symbols[ECOS_VAL_CURRENT_THREAD_PTR].address,
- 4,
+ param->pointer_width,
(uint8_t *)¤t_thread_addr);
- if (retval != ERROR_OK)
- return retval;
- rtos->current_thread = 0;
- retval = target_read_buffer(rtos->target,
- current_thread_addr + param->thread_uniqueid_offset,
- 2,
- (uint8_t *)&rtos->current_thread);
if (retval != ERROR_OK) {
- LOG_ERROR("Could not read eCos current thread from target");
+ LOG_ERROR("Reading active thread address");
return retval;
}
- if ((thread_list_size == 0) || (rtos->current_thread == 0)) {
+ if (current_thread_addr) {
+ uint16_t id = 0;
+ retval = target_read_buffer(rtos->target,
+ current_thread_addr + param->thread_uniqueid_offset,
+ param->uid_width,
+ (uint8_t *)&id);
+ if (retval != ERROR_OK) {
+ LOG_ERROR("Could not read eCos current thread from target");
+ return retval;
+ }
+ rtos->current_thread = (threadid_t)id;
+ }
+
+ if (thread_list_size == 0 || rtos->current_thread == 0) {
/* Either : No RTOS threads - there is always at least the current execution though */
/* OR : No current thread - all threads suspended - show the current execution
* of idling */
- char tmp_str[] = "Current Execution";
+ static const char tmp_str[] = "Current Execution";
thread_list_size++;
tasks_found++;
rtos->thread_details = malloc(
sizeof(struct thread_detail) * thread_list_size);
- rtos->thread_details->threadid = 1;
+ /* 1 is a valid eCos thread id, so we return 0 for this faked
+ * "current" CPU state: */
+ rtos->thread_details->threadid = 0;
rtos->thread_details->exists = true;
rtos->thread_details->extra_info_str = NULL;
rtos->thread_details->thread_name_str = malloc(sizeof(tmp_str));
strcpy(rtos->thread_details->thread_name_str, tmp_str);
- if (thread_list_size == 0) {
+ /* Early exit if current CPU state our only "thread": */
+ if (thread_list_size == 1) {
rtos->thread_count = 1;
return ERROR_OK;
}
@@ -176,18 +834,18 @@ static int ecos_update_threads(struct rtos *rtos)
/* loop over all threads */
thread_index = first_thread;
do {
-
#define ECOS_THREAD_NAME_STR_SIZE (200)
char tmp_str[ECOS_THREAD_NAME_STR_SIZE];
- unsigned int i = 0;
uint32_t name_ptr = 0;
uint32_t prev_thread_ptr;
- /* Save the thread pointer */
- uint16_t thread_id;
+ /* Save the thread ID. For eCos the thread has a unique ID distinct from
+ * the thread_index descriptor pointer. We present this scheduler ID
+ * instead of the descriptor memory address. */
+ uint16_t thread_id = 0;
retval = target_read_buffer(rtos->target,
thread_index + param->thread_uniqueid_offset,
- 2,
+ param->uid_width,
(uint8_t *)&thread_id);
if (retval != ERROR_OK) {
LOG_ERROR("Could not read eCos thread id from target");
@@ -195,7 +853,7 @@ static int ecos_update_threads(struct rtos *rtos)
}
rtos->thread_details[tasks_found].threadid = thread_id;
- /* read the name pointer */
+ /* Read the name pointer */
retval = target_read_buffer(rtos->target,
thread_index + param->thread_name_offset,
param->pointer_width,
@@ -217,8 +875,26 @@ static int ecos_update_threads(struct rtos *rtos)
}
tmp_str[ECOS_THREAD_NAME_STR_SIZE-1] = '\x00';
- if (tmp_str[0] == '\x00')
- strcpy(tmp_str, "No Name");
+ /* Since eCos can have arbitrary C string names we can sometimes
+ * get an internal warning from GDB about "not well-formed
+ * (invalid token)" since the XML post-processing done by GDB on
+ * the OpenOCD returned response containing the thread strings
+ * is not escaped. For example the eCos kernel testsuite
+ * application tm_basic uses the thread name "<<NULL>>" which
+ * will trigger this failure unless escaped. */
+ if (tmp_str[0] == '\x00') {
+ snprintf(tmp_str, ECOS_THREAD_NAME_STR_SIZE, "NoName:[0x%08" PRIX32 "]", thread_index);
+ } else {
+ /* The following is a workaround to avoid any issues
+ * from arbitrary eCos thread names causing GDB/OpenOCD
+ * issues. We limit the escaped thread name passed to
+ * GDB to the same length as the un-escaped just to
+ * avoid overly long strings. */
+ char esc_str[ECOS_THREAD_NAME_STR_SIZE];
+ bool escaped = ecos_escape_string(tmp_str, esc_str, sizeof(esc_str));
+ if (escaped)
+ strcpy(tmp_str, esc_str);
+ }
rtos->thread_details[tasks_found].thread_name_str =
malloc(strlen(tmp_str)+1);
@@ -228,28 +904,109 @@ static int ecos_update_threads(struct rtos *rtos)
int64_t thread_status = 0;
retval = target_read_buffer(rtos->target,
thread_index + param->thread_state_offset,
- 4,
+ param->state_width,
(uint8_t *)&thread_status);
if (retval != ERROR_OK) {
LOG_ERROR("Error reading thread state from eCos target");
return retval;
}
- for (i = 0; (i < ECOS_NUM_STATES) && (ecos_thread_states[i].value != thread_status); i++) {
- /*
- * empty
- */
- }
+ /* The thread_status is a BITMASK */
+ char state_desc[21]; /* Enough for "suspended+countsleep\0" maximum */
- const char *state_desc;
- if (i < ECOS_NUM_STATES)
- state_desc = ecos_thread_states[i].desc;
+ if (thread_status & SUSPENDED)
+ strcpy(state_desc, "suspended+");
else
- state_desc = "Unknown state";
+ state_desc[0] = '\0';
+
+ switch (thread_status & ~SUSPENDED) {
+ case RUNNING:
+ if (thread_index == current_thread_addr)
+ strcat(state_desc, "running");
+ else if (thread_status & SUSPENDED)
+ state_desc[9] = '\0'; /* Drop '+' from "suspended+" */
+ else
+ strcat(state_desc, "ready");
+ break;
+ case SLEEPING:
+ strcat(state_desc, "sleeping");
+ break;
+ case SLEEPSET:
+ case COUNTSLEEP:
+ strcat(state_desc, "counted sleep");
+ break;
+ case CREATING:
+ strcpy(state_desc, "creating");
+ break;
+ case EXITED:
+ strcpy(state_desc, "exited");
+ break;
+ default:
+ strcpy(state_desc, "unknown state");
+ break;
+ }
+
+ /* For the moment we do not bother decoding the wake reason for the
+ * active "running" thread, but it is useful providing the sleep reason
+ * for stacked threads. */
+ int64_t sleep_reason = 0; /* sleep reason */
+
+ if (thread_index != current_thread_addr &&
+ ecos_value(rtos, ECOS_VAL_COMMON_THREAD_SLEEP_SIZE)) {
+ retval = target_read_buffer(rtos->target,
+ (thread_index + ecos_value(rtos, ECOS_VAL_COMMON_THREAD_SLEEP_OFF)),
+ ecos_value(rtos, ECOS_VAL_COMMON_THREAD_SLEEP_SIZE),
+ (uint8_t *)&sleep_reason);
+ if (retval != ERROR_OK) {
+ LOG_ERROR("Error reading thread sleep reason from eCos target");
+ return retval;
+ }
+ if (sleep_reason < 0 ||
+ sleep_reason > (int64_t)ARRAY_SIZE(ecos_thread_reasons)) {
+ sleep_reason = 0;
+ }
+ }
+
+ /* We do not display anything for the Cyg_Thread::NONE reason */
+ size_t tr_extra = 0;
+ const char *reason_desc = NULL;
+ if (sleep_reason)
+ reason_desc = ecos_thread_reasons[sleep_reason].desc;
+ if (reason_desc)
+ tr_extra = 2 + strlen(reason_desc) + 1;
- rtos->thread_details[tasks_found].extra_info_str = malloc(strlen(
- state_desc)+8);
- sprintf(rtos->thread_details[tasks_found].extra_info_str, "State: %s", state_desc);
+ /* Display thread priority if available: */
+ int64_t priority = 0;
+ size_t pri_extra = 0;
+ if (ecos_value(rtos, ECOS_VAL_COMMON_THREAD_PRI_SIZE)) {
+ retval = target_read_buffer(rtos->target,
+ (thread_index + ecos_value(rtos, ECOS_VAL_COMMON_THREAD_PRI_OFF)),
+ ecos_value(rtos, ECOS_VAL_COMMON_THREAD_PRI_SIZE),
+ (uint8_t *)&priority);
+ if (retval != ERROR_OK) {
+ LOG_ERROR("Error reading thread priority from eCos target");
+ return retval;
+ }
+ pri_extra = (12 + 20); /* worst-case ", Priority: " */
+ }
+
+ size_t eilen = (8 + strlen(state_desc) + tr_extra + pri_extra);
+ char *eistr = malloc(eilen);
+ /* We do not need to treat a malloc failure as a fatal error here since
+ * the code below will just not report extra thread information if NULL,
+ * thus allowing all of the threads to be enumerated even with reduced
+ * information when the host is low on memory. However... */
+ if (!eistr) {
+ LOG_ERROR("OOM allocating extra information buffer");
+ return ERROR_FAIL;
+ }
+
+ int soff = snprintf(eistr, eilen, "State: %s", state_desc);
+ if (tr_extra && reason_desc)
+ soff += snprintf(&eistr[soff], (eilen - soff), " (%s)", reason_desc);
+ if (pri_extra)
+ (void)snprintf(&eistr[soff], (eilen - soff), ", Priority: %" PRId64 "", priority);
+ rtos->thread_details[tasks_found].extra_info_str = eistr;
rtos->thread_details[tasks_found].exists = true;
@@ -269,14 +1026,14 @@ static int ecos_update_threads(struct rtos *rtos)
} while (thread_index != first_thread);
rtos->thread_count = tasks_found;
- return 0;
+ return ERROR_OK;
}
static int ecos_get_thread_reg_list(struct rtos *rtos, int64_t thread_id,
struct rtos_reg **reg_list, int *num_regs)
{
int retval;
- const struct ecos_params *param;
+ struct ecos_params *param;
if (!rtos)
return -1;
@@ -287,7 +1044,22 @@ static int ecos_get_thread_reg_list(struct rtos *rtos, int64_t thread_id,
if (!rtos->rtos_specific_params)
return -3;
- param = (const struct ecos_params *) rtos->rtos_specific_params;
+ param = rtos->rtos_specific_params;
+
+ retval = ecos_check_app_info(rtos, param);
+ if (retval != ERROR_OK)
+ return retval;
+
+ /* We can get memory access errors reported by this function on
+ * re-connecting to a board with stale thread information in memory. The
+ * initial ecos_update_threads() is called twice and may read
+ * stale/invalid information depending on the memory state. This happens
+ * as part of the "target remote" connection so cannot be avoided by GDB
+ * scripting. It is not critical and allowing the application to run and
+ * initialise its BSS etc. will allow correct thread and register
+ * information to be obtained. This really only affects debug sessions
+ * where "info thr" is used before the initial run-time initialisation
+ * has occurred. */
/* Find the thread with that thread id */
uint16_t id = 0;
@@ -299,10 +1071,10 @@ static int ecos_get_thread_reg_list(struct rtos *rtos, int64_t thread_id,
while (!done) {
retval = target_read_buffer(rtos->target,
thread_index + param->thread_uniqueid_offset,
- 2,
+ param->uid_width,
(uint8_t *)&id);
if (retval != ERROR_OK) {
- LOG_ERROR("Error reading unique id from eCos thread");
+ LOG_ERROR("Error reading unique id from eCos thread 0x%08" PRIX32 "", thread_index);
return retval;
}
@@ -328,8 +1100,24 @@ static int ecos_get_thread_reg_list(struct rtos *rtos, int64_t thread_id,
return retval;
}
+ if (!stack_ptr) {
+ LOG_ERROR("NULL stack pointer in thread %" PRIu64, thread_id);
+ return -5;
+ }
+
+ const struct rtos_register_stacking *stacking_info = NULL;
+ if (param->target_stack_layout) {
+ retval = param->target_stack_layout(rtos, param, stack_ptr, &stacking_info);
+ if (retval != ERROR_OK) {
+ LOG_ERROR("Error reading stack layout for eCos thread");
+ return retval;
+ }
+ }
+ if (!stacking_info)
+ stacking_info = &rtos_ecos_cortex_m3_stacking;
+
return rtos_generic_stack_read(rtos->target,
- param->stacking_info,
+ stacking_info,
stack_ptr,
reg_list,
num_regs);
@@ -338,18 +1126,31 @@ static int ecos_get_thread_reg_list(struct rtos *rtos, int64_t thread_id,
return -1;
}
+/* NOTE: This is only called once when the first GDB connection is made to
+ * OpenOCD and not on subsequent connections (when the application symbol table
+ * may have changed, affecting the offsets of critical fields and the stacked
+ * context shape). */
static int ecos_get_symbol_list_to_lookup(struct symbol_table_elem *symbol_list[])
{
unsigned int i;
*symbol_list = calloc(
ARRAY_SIZE(ecos_symbol_list), sizeof(struct symbol_table_elem));
- for (i = 0; i < ARRAY_SIZE(ecos_symbol_list); i++)
- (*symbol_list)[i].symbol_name = ecos_symbol_list[i];
+ /* If the target reference was passed into this function we could limit
+ * the symbols we need to lookup to the target->type->name based
+ * range. For the moment we need to provide a single vector with all of
+ * the symbols across all of the supported architectures. */
+ for (i = 0; i < ARRAY_SIZE(ecos_symbol_list); i++) {
+ (*symbol_list)[i].symbol_name = ecos_symbol_list[i].name;
+ (*symbol_list)[i].optional = ecos_symbol_list[i].optional;
+ }
return 0;
}
+/* NOTE: Only called by rtos.c:rtos_qsymbol() when auto-detecting the RTOS. If
+ * the target configuration uses the explicit "-rtos" config option then this
+ * detection routine is NOT called. */
static bool ecos_detect_rtos(struct target *target)
{
if ((target->rtos->symbols) &&
@@ -360,15 +1161,67 @@ static bool ecos_detect_rtos(struct target *target)
return false;
}
+extern int rtos_thread_packet(struct connection *connection,
+ const char *packet, int packet_size);
+
+/* Since we should never have 0 as a valid eCos thread ID we use $Hg0 as the
+ * indicator of a new session as regards flushing any cached state. */
+static int ecos_packet_hook(struct connection *connection,
+ const char *packet, int packet_size)
+{
+ int64_t current_threadid;
+
+ if (packet[0] == 'H' && packet[1] == 'g') {
+ int numscan = sscanf(packet, "Hg%16" SCNx64, ¤t_threadid);
+ if (numscan == 1 && current_threadid == 0) {
+ struct target *target = get_target_from_connection(connection);
+ if (target && target->rtos && target->rtos->rtos_specific_params) {
+ struct ecos_params *param;
+ param = target->rtos->rtos_specific_params;
+ param->flush_common = true;
+ }
+ }
+ }
+
+ return rtos_thread_packet(connection, packet, packet_size);
+}
+
+/* Called at start of day when eCos detected or specified in config file. */
static int ecos_create(struct target *target)
{
- for (unsigned int i = 0; i < ARRAY_SIZE(ecos_params_list); i++)
- if (strcmp(ecos_params_list[i].target_name, target->type->name) == 0) {
- target->rtos->rtos_specific_params = (void *)&ecos_params_list[i];
- target->rtos->current_thread = 0;
- target->rtos->thread_details = NULL;
- return 0;
+ for (unsigned int i = 0; i < ARRAY_SIZE(ecos_params_list); i++) {
+ const char * const *tnames = ecos_params_list[i].target_names;
+ while (*tnames) {
+ if (strcmp(*tnames, target->type->name) == 0) {
+ /* LOG_DEBUG("eCos: matched target \"%s\"", target->type->name); */
+ target->rtos->rtos_specific_params = (void *)&ecos_params_list[i];
+ ecos_params_list[i].flush_common = true;
+ ecos_params_list[i].stacking_info = NULL;
+ target->rtos->current_thread = 0;
+ target->rtos->thread_details = NULL;
+
+ /* We use the $Hg0 packet as a new GDB connection "start-of-day" hook to
+ * force a re-cache of information. It is possible for a single OpenOCD
+ * session to be connected to a target with multiple GDB debug sessions
+ * started/stopped. With eCos it is possible for those GDB sessions to
+ * present applications with different offsets within a thread
+ * descriptor for fields used by this module, and for the stacked
+ * context within the connected target architecture to differ between
+ * applications and even between threads in a single application. So we
+ * need to ensure any information we cache is flushed on an application
+ * change, and GDB referencing an invalid eCos thread ID (0) is a good
+ * enough point, since we can accept the re-cache hit if that packet
+ * appears during an established session, whilst benefiting from not
+ * re-loading information on every update_threads or get_thread_reg_list
+ * call. */
+ target->rtos->gdb_thread_packet = ecos_packet_hook;
+ /* We do not currently use the target->rtos->gdb_target_for_threadid
+ * hook. */
+ return 0;
+ }
+ tnames++;
}
+ }
LOG_ERROR("Could not find target in eCos compatibility list");
return -1;
diff --git a/src/rtos/rtos_ecos_stackings.c b/src/rtos/rtos_ecos_stackings.c
index 0f54e86f7..86e176507 100644
--- a/src/rtos/rtos_ecos_stackings.c
+++ b/src/rtos/rtos_ecos_stackings.c
@@ -8,6 +8,13 @@
#include "rtos_standard_stackings.h"
#include "target/armv7m.h"
+/* For Cortex-M eCos applications the actual thread context register layout can
+ * be different between active threads of an application depending on whether
+ * the FPU is in use, configured for lazy FPU context saving, etc. */
+
+/* Default fixed thread register context description used for older eCos
+ * application builds without the necessary symbolic information describing the
+ * actual configuration-dependent offsets. */
static const struct stack_register_offset rtos_ecos_cortex_m3_stack_offsets[ARMV7M_NUM_CORE_REGS] = {
{ ARMV7M_R0, 0x0c, 32 }, /* r0 */
{ ARMV7M_R1, 0x10, 32 }, /* r1 */
-----------------------------------------------------------------------
Summary of changes:
src/rtos/eCos.c | 1033 ++++++++++++++++++++++++++++++++++++----
src/rtos/rtos_ecos_stackings.c | 7 +
2 files changed, 950 insertions(+), 90 deletions(-)
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Main OpenOCD repository
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|
From: openocd-gerrit <ope...@us...> - 2023-01-15 14:51:13
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".
The branch, master has been updated
via 9a7781ff8c9dea6ef5998238b1932094b8a226da (commit)
from 0708ccead4fbce07e3d78bb7380aca0aae8cb14d (commit)
Those revisions listed above that are new to this repository have
not appeared on any other notification email; so we list those
revisions in full, below.
- Log -----------------------------------------------------------------
commit 9a7781ff8c9dea6ef5998238b1932094b8a226da
Author: Fawaz Tirmizi <fa...@ri...>
Date: Fri Aug 19 14:22:06 2022 -0700
flash/nor/spi: Add issi is25lq040b to device list
The HiFive Inventor uses this flash chip, so adding it will allow for
openocd to be used to program it. These values were taken from the
chip's documentation.
Signed-off-by: Fawaz Tirmizi <fa...@ri...>
Change-Id: I15c9d35f99d4500f73134cdc2d1b9ab6279b491c
Reviewed-on: https://review.openocd.org/c/openocd/+/7135
Tested-by: jenkins
Reviewed-by: Antonio Borneo <bor...@gm...>
diff --git a/src/flash/nor/spi.c b/src/flash/nor/spi.c
index eed747b58..373a9a144 100644
--- a/src/flash/nor/spi.c
+++ b/src/flash/nor/spi.c
@@ -112,6 +112,7 @@ const struct flash_device flash_devices[] = {
FLASH_ID("gd gd25q128c", 0x03, 0xeb, 0x02, 0xd8, 0xc7, 0x001840c8, 0x100, 0x10000, 0x1000000),
FLASH_ID("gd gd25q256c", 0x13, 0x00, 0x12, 0xdc, 0xc7, 0x001940c8, 0x100, 0x10000, 0x2000000),
FLASH_ID("gd gd25q512mc", 0x13, 0x00, 0x12, 0xdc, 0xc7, 0x002040c8, 0x100, 0x10000, 0x4000000),
+ FLASH_ID("issi is25lq040b", 0x03, 0xeb, 0x02, 0x20, 0xc7, 0x0013409d, 0x100, 0x1000, 0x80000),
FLASH_ID("issi is25lp032", 0x03, 0x00, 0x02, 0xd8, 0xc7, 0x0016609d, 0x100, 0x10000, 0x400000),
FLASH_ID("issi is25lp064", 0x03, 0x00, 0x02, 0xd8, 0xc7, 0x0017609d, 0x100, 0x10000, 0x800000),
FLASH_ID("issi is25lp128d", 0x03, 0xeb, 0x02, 0xd8, 0xc7, 0x0018609d, 0x100, 0x10000, 0x1000000),
-----------------------------------------------------------------------
Summary of changes:
src/flash/nor/spi.c | 1 +
1 file changed, 1 insertion(+)
hooks/post-receive
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From: openocd-gerrit <ope...@us...> - 2023-01-15 14:48:25
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".
The branch, master has been updated
via 0708ccead4fbce07e3d78bb7380aca0aae8cb14d (commit)
from 0c28006cf2cf2d98ba2d73a73bf629e781f4ffb8 (commit)
Those revisions listed above that are new to this repository have
not appeared on any other notification email; so we list those
revisions in full, below.
- Log -----------------------------------------------------------------
commit 0708ccead4fbce07e3d78bb7380aca0aae8cb14d
Author: Erhan Kurubas <erh...@es...>
Date: Thu Sep 29 00:22:00 2022 +0200
target/xtensa: remove needless target_was_examined check
In any case flag will be set as examined.
Signed-off-by: Erhan Kurubas <erh...@es...>
Change-Id: I5177ee656f726a807269e2f4725223f50e49e855
Reviewed-on: https://review.openocd.org/c/openocd/+/7231
Tested-by: jenkins
Reviewed-by: Ian Thompson <ia...@ca...>
Reviewed-by: Antonio Borneo <bor...@gm...>
diff --git a/src/target/xtensa/xtensa.c b/src/target/xtensa/xtensa.c
index c2c047edb..b57e2d660 100644
--- a/src/target/xtensa/xtensa.c
+++ b/src/target/xtensa/xtensa.c
@@ -801,8 +801,7 @@ int xtensa_examine(struct target *target)
return ERROR_TARGET_FAILURE;
}
LOG_DEBUG("OCD_ID = %08" PRIx32, xtensa->dbg_mod.device_id);
- if (!target_was_examined(target))
- target_set_examined(target);
+ target_set_examined(target);
xtensa_smpbreak_write(xtensa, xtensa->smp_break);
return ERROR_OK;
}
-----------------------------------------------------------------------
Summary of changes:
src/target/xtensa/xtensa.c | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
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